1/*
  2 * Copyright 2012 Red Hat Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: Ben Skeggs
 23 */
 24
 25#include "drmP.h"
 26
 27#include "nouveau_drv.h"
 28#include "nouveau_ramht.h"
 29#include "nouveau_fence.h"
 30#include "nouveau_software.h"
 31#include "nouveau_hw.h"
 32
 33struct nv04_software_priv {
 34	struct nouveau_software_priv base;
 35};
 36
 37struct nv04_software_chan {
 38	struct nouveau_software_chan base;
 39};
 40
 41static int
 42mthd_flip(struct nouveau_channel *chan, u32 class, u32 mthd, u32 data)
 43{
 44
 45	struct nouveau_page_flip_state state;
 46
 47	if (!nouveau_finish_page_flip(chan, &state)) {
 48		nv_set_crtc_base(chan->dev, state.crtc, state.offset +
 49				 state.y * state.pitch +
 50				 state.x * state.bpp / 8);
 51	}
 52
 53	return 0;
 54}
 55
 56static int
 57nv04_software_context_new(struct nouveau_channel *chan, int engine)
 58{
 59	struct nv04_software_chan *pch;
 60
 61	pch = kzalloc(sizeof(*pch), GFP_KERNEL);
 62	if (!pch)
 63		return -ENOMEM;
 64
 65	nouveau_software_context_new(&pch->base);
 66	chan->engctx[engine] = pch;
 67	return 0;
 68}
 69
 70static void
 71nv04_software_context_del(struct nouveau_channel *chan, int engine)
 72{
 73	struct nv04_software_chan *pch = chan->engctx[engine];
 74	chan->engctx[engine] = NULL;
 75	kfree(pch);
 76}
 77
 78static int
 79nv04_software_object_new(struct nouveau_channel *chan, int engine,
 80			 u32 handle, u16 class)
 81{
 82	struct drm_device *dev = chan->dev;
 83	struct nouveau_gpuobj *obj = NULL;
 84	int ret;
 85
 86	ret = nouveau_gpuobj_new(dev, chan, 16, 16, 0, &obj);
 87	if (ret)
 88		return ret;
 89	obj->engine = 0;
 90	obj->class  = class;
 91
 92	ret = nouveau_ramht_insert(chan, handle, obj);
 93	nouveau_gpuobj_ref(NULL, &obj);
 94	return ret;
 95}
 96
 97static int
 98nv04_software_init(struct drm_device *dev, int engine)
 99{
100	return 0;
101}
102
103static int
104nv04_software_fini(struct drm_device *dev, int engine, bool suspend)
105{
106	return 0;
107}
108
109static void
110nv04_software_destroy(struct drm_device *dev, int engine)
111{
112	struct nv04_software_priv *psw = nv_engine(dev, engine);
113
114	NVOBJ_ENGINE_DEL(dev, SW);
115	kfree(psw);
116}
117
118int
119nv04_software_create(struct drm_device *dev)
120{
121	struct drm_nouveau_private *dev_priv = dev->dev_private;
122	struct nv04_software_priv *psw;
123
124	psw = kzalloc(sizeof(*psw), GFP_KERNEL);
125	if (!psw)
126		return -ENOMEM;
127
128	psw->base.base.destroy = nv04_software_destroy;
129	psw->base.base.init = nv04_software_init;
130	psw->base.base.fini = nv04_software_fini;
131	psw->base.base.context_new = nv04_software_context_new;
132	psw->base.base.context_del = nv04_software_context_del;
133	psw->base.base.object_new = nv04_software_object_new;
134	nouveau_software_create(&psw->base);
135
136	NVOBJ_ENGINE_ADD(dev, SW, &psw->base.base);
137	if (dev_priv->card_type <= NV_04) {
138		NVOBJ_CLASS(dev, 0x006e, SW);
139		NVOBJ_MTHD (dev, 0x006e, 0x0150, nv04_fence_mthd);
140		NVOBJ_MTHD (dev, 0x006e, 0x0500, mthd_flip);
141	} else {
142		NVOBJ_CLASS(dev, 0x016e, SW);
143		NVOBJ_MTHD (dev, 0x016e, 0x0500, mthd_flip);
144	}
145
146	return 0;
147}