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1/*
2 * PowerNV OPAL definitions.
3 *
4 * Copyright 2011 IBM Corp.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef _ASM_POWERPC_OPAL_H
13#define _ASM_POWERPC_OPAL_H
14
15#include <asm/opal-api.h>
16
17#ifndef __ASSEMBLY__
18
19#include <linux/notifier.h>
20
21/* We calculate number of sg entries based on PAGE_SIZE */
22#define SG_ENTRIES_PER_NODE ((PAGE_SIZE - 16) / sizeof(struct opal_sg_entry))
23
24/* /sys/firmware/opal */
25extern struct kobject *opal_kobj;
26
27/* /ibm,opal */
28extern struct device_node *opal_node;
29
30/* API functions */
31int64_t opal_invalid_call(void);
32int64_t opal_console_write(int64_t term_number, __be64 *length,
33 const uint8_t *buffer);
34int64_t opal_console_read(int64_t term_number, __be64 *length,
35 uint8_t *buffer);
36int64_t opal_console_write_buffer_space(int64_t term_number,
37 __be64 *length);
38int64_t opal_console_flush(int64_t term_number);
39int64_t opal_rtc_read(__be32 *year_month_day,
40 __be64 *hour_minute_second_millisecond);
41int64_t opal_rtc_write(uint32_t year_month_day,
42 uint64_t hour_minute_second_millisecond);
43int64_t opal_tpo_read(uint64_t token, __be32 *year_mon_day, __be32 *hour_min);
44int64_t opal_tpo_write(uint64_t token, uint32_t year_mon_day,
45 uint32_t hour_min);
46int64_t opal_cec_power_down(uint64_t request);
47int64_t opal_cec_reboot(void);
48int64_t opal_cec_reboot2(uint32_t reboot_type, char *diag);
49int64_t opal_read_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
50int64_t opal_write_nvram(uint64_t buffer, uint64_t size, uint64_t offset);
51int64_t opal_handle_interrupt(uint64_t isn, __be64 *outstanding_event_mask);
52int64_t opal_poll_events(__be64 *outstanding_event_mask);
53int64_t opal_pci_set_hub_tce_memory(uint64_t hub_id, uint64_t tce_mem_addr,
54 uint64_t tce_mem_size);
55int64_t opal_pci_set_phb_tce_memory(uint64_t phb_id, uint64_t tce_mem_addr,
56 uint64_t tce_mem_size);
57int64_t opal_pci_config_read_byte(uint64_t phb_id, uint64_t bus_dev_func,
58 uint64_t offset, uint8_t *data);
59int64_t opal_pci_config_read_half_word(uint64_t phb_id, uint64_t bus_dev_func,
60 uint64_t offset, __be16 *data);
61int64_t opal_pci_config_read_word(uint64_t phb_id, uint64_t bus_dev_func,
62 uint64_t offset, __be32 *data);
63int64_t opal_pci_config_write_byte(uint64_t phb_id, uint64_t bus_dev_func,
64 uint64_t offset, uint8_t data);
65int64_t opal_pci_config_write_half_word(uint64_t phb_id, uint64_t bus_dev_func,
66 uint64_t offset, uint16_t data);
67int64_t opal_pci_config_write_word(uint64_t phb_id, uint64_t bus_dev_func,
68 uint64_t offset, uint32_t data);
69int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority);
70int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority);
71int64_t opal_register_exception_handler(uint64_t opal_exception,
72 uint64_t handler_address,
73 uint64_t glue_cache_line);
74int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number,
75 uint8_t *freeze_state,
76 __be16 *pci_error_type,
77 __be64 *phb_status);
78int64_t opal_pci_eeh_freeze_clear(uint64_t phb_id, uint64_t pe_number,
79 uint64_t eeh_action_token);
80int64_t opal_pci_eeh_freeze_set(uint64_t phb_id, uint64_t pe_number,
81 uint64_t eeh_action_token);
82int64_t opal_pci_err_inject(uint64_t phb_id, uint32_t pe_no, uint32_t type,
83 uint32_t func, uint64_t addr, uint64_t mask);
84int64_t opal_pci_shpc(uint64_t phb_id, uint64_t shpc_action, uint8_t *state);
85
86
87
88int64_t opal_pci_phb_mmio_enable(uint64_t phb_id, uint16_t window_type,
89 uint16_t window_num, uint16_t enable);
90int64_t opal_pci_set_phb_mem_window(uint64_t phb_id, uint16_t window_type,
91 uint16_t window_num,
92 uint64_t starting_real_address,
93 uint64_t starting_pci_address,
94 uint64_t size);
95int64_t opal_pci_map_pe_mmio_window(uint64_t phb_id, uint16_t pe_number,
96 uint16_t window_type, uint16_t window_num,
97 uint16_t segment_num);
98int64_t opal_pci_set_phb_table_memory(uint64_t phb_id, uint64_t rtt_addr,
99 uint64_t ivt_addr, uint64_t ivt_len,
100 uint64_t reject_array_addr,
101 uint64_t peltv_addr);
102int64_t opal_pci_set_pe(uint64_t phb_id, uint64_t pe_number, uint64_t bus_dev_func,
103 uint8_t bus_compare, uint8_t dev_compare, uint8_t func_compare,
104 uint8_t pe_action);
105int64_t opal_pci_set_peltv(uint64_t phb_id, uint32_t parent_pe, uint32_t child_pe,
106 uint8_t state);
107int64_t opal_pci_set_mve(uint64_t phb_id, uint32_t mve_number, uint32_t pe_number);
108int64_t opal_pci_set_mve_enable(uint64_t phb_id, uint32_t mve_number,
109 uint32_t state);
110int64_t opal_pci_get_xive_reissue(uint64_t phb_id, uint32_t xive_number,
111 uint8_t *p_bit, uint8_t *q_bit);
112int64_t opal_pci_set_xive_reissue(uint64_t phb_id, uint32_t xive_number,
113 uint8_t p_bit, uint8_t q_bit);
114int64_t opal_pci_msi_eoi(uint64_t phb_id, uint32_t hw_irq);
115int64_t opal_pci_set_xive_pe(uint64_t phb_id, uint32_t pe_number,
116 uint32_t xive_num);
117int64_t opal_get_xive_source(uint64_t phb_id, uint32_t xive_num,
118 __be32 *interrupt_source_number);
119int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num,
120 uint8_t msi_range, __be32 *msi_address,
121 __be32 *message_data);
122int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number,
123 uint32_t xive_num, uint8_t msi_range,
124 __be64 *msi_address, __be32 *message_data);
125int64_t opal_start_cpu(uint64_t thread_number, uint64_t start_address);
126int64_t opal_query_cpu_status(uint64_t thread_number, uint8_t *thread_status);
127int64_t opal_write_oppanel(oppanel_line_t *lines, uint64_t num_lines);
128int64_t opal_pci_map_pe_dma_window(uint64_t phb_id, uint16_t pe_number, uint16_t window_id,
129 uint16_t tce_levels, uint64_t tce_table_addr,
130 uint64_t tce_table_size, uint64_t tce_page_size);
131int64_t opal_pci_map_pe_dma_window_real(uint64_t phb_id, uint16_t pe_number,
132 uint16_t dma_window_number, uint64_t pci_start_addr,
133 uint64_t pci_mem_size);
134int64_t opal_pci_reset(uint64_t phb_id, uint8_t reset_scope, uint8_t assert_state);
135
136int64_t opal_pci_get_hub_diag_data(uint64_t hub_id, void *diag_buffer,
137 uint64_t diag_buffer_len);
138int64_t opal_pci_get_phb_diag_data(uint64_t phb_id, void *diag_buffer,
139 uint64_t diag_buffer_len);
140int64_t opal_pci_get_phb_diag_data2(uint64_t phb_id, void *diag_buffer,
141 uint64_t diag_buffer_len);
142int64_t opal_pci_fence_phb(uint64_t phb_id);
143int64_t opal_pci_reinit(uint64_t phb_id, uint64_t reinit_scope, uint64_t data);
144int64_t opal_pci_mask_pe_error(uint64_t phb_id, uint16_t pe_number, uint8_t error_type, uint8_t mask_action);
145int64_t opal_set_slot_led_status(uint64_t phb_id, uint64_t slot_id, uint8_t led_type, uint8_t led_action);
146int64_t opal_get_epow_status(__be16 *epow_status, __be16 *num_epow_classes);
147int64_t opal_get_dpo_status(__be64 *dpo_timeout);
148int64_t opal_set_system_attention_led(uint8_t led_action);
149int64_t opal_pci_next_error(uint64_t phb_id, __be64 *first_frozen_pe,
150 __be16 *pci_error_type, __be16 *severity);
151int64_t opal_pci_poll(uint64_t phb_id);
152int64_t opal_return_cpu(void);
153int64_t opal_check_token(uint64_t token);
154int64_t opal_reinit_cpus(uint64_t flags);
155
156int64_t opal_xscom_read(uint32_t gcid, uint64_t pcb_addr, __be64 *val);
157int64_t opal_xscom_write(uint32_t gcid, uint64_t pcb_addr, uint64_t val);
158
159int64_t opal_lpc_write(uint32_t chip_id, enum OpalLPCAddressType addr_type,
160 uint32_t addr, uint32_t data, uint32_t sz);
161int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type,
162 uint32_t addr, __be32 *data, uint32_t sz);
163
164int64_t opal_read_elog(uint64_t buffer, uint64_t size, uint64_t log_id);
165int64_t opal_get_elog_size(__be64 *log_id, __be64 *size, __be64 *elog_type);
166int64_t opal_write_elog(uint64_t buffer, uint64_t size, uint64_t offset);
167int64_t opal_send_ack_elog(uint64_t log_id);
168void opal_resend_pending_logs(void);
169
170int64_t opal_validate_flash(uint64_t buffer, uint32_t *size, uint32_t *result);
171int64_t opal_manage_flash(uint8_t op);
172int64_t opal_update_flash(uint64_t blk_list);
173int64_t opal_dump_init(uint8_t dump_type);
174int64_t opal_dump_info(__be32 *dump_id, __be32 *dump_size);
175int64_t opal_dump_info2(__be32 *dump_id, __be32 *dump_size, __be32 *dump_type);
176int64_t opal_dump_read(uint32_t dump_id, uint64_t buffer);
177int64_t opal_dump_ack(uint32_t dump_id);
178int64_t opal_dump_resend_notification(void);
179
180int64_t opal_get_msg(uint64_t buffer, uint64_t size);
181int64_t opal_check_completion(uint64_t buffer, uint64_t size, uint64_t token);
182int64_t opal_sync_host_reboot(void);
183int64_t opal_get_param(uint64_t token, uint32_t param_id, uint64_t buffer,
184 uint64_t length);
185int64_t opal_set_param(uint64_t token, uint32_t param_id, uint64_t buffer,
186 uint64_t length);
187int64_t opal_sensor_read(uint32_t sensor_hndl, int token, __be32 *sensor_data);
188int64_t opal_handle_hmi(void);
189int64_t opal_register_dump_region(uint32_t id, uint64_t start, uint64_t end);
190int64_t opal_unregister_dump_region(uint32_t id);
191int64_t opal_slw_set_reg(uint64_t cpu_pir, uint64_t sprn, uint64_t val);
192int64_t opal_config_cpu_idle_state(uint64_t state, uint64_t flag);
193int64_t opal_pci_set_phb_cxl_mode(uint64_t phb_id, uint64_t mode, uint64_t pe_number);
194int64_t opal_ipmi_send(uint64_t interface, struct opal_ipmi_msg *msg,
195 uint64_t msg_len);
196int64_t opal_ipmi_recv(uint64_t interface, struct opal_ipmi_msg *msg,
197 uint64_t *msg_len);
198int64_t opal_i2c_request(uint64_t async_token, uint32_t bus_id,
199 struct opal_i2c_request *oreq);
200int64_t opal_prd_msg(struct opal_prd_msg *msg);
201int64_t opal_leds_get_ind(char *loc_code, __be64 *led_mask,
202 __be64 *led_value, __be64 *max_led_type);
203int64_t opal_leds_set_ind(uint64_t token, char *loc_code, const u64 led_mask,
204 const u64 led_value, __be64 *max_led_type);
205
206int64_t opal_flash_read(uint64_t id, uint64_t offset, uint64_t buf,
207 uint64_t size, uint64_t token);
208int64_t opal_flash_write(uint64_t id, uint64_t offset, uint64_t buf,
209 uint64_t size, uint64_t token);
210int64_t opal_flash_erase(uint64_t id, uint64_t offset, uint64_t size,
211 uint64_t token);
212
213/* Internal functions */
214extern int early_init_dt_scan_opal(unsigned long node, const char *uname,
215 int depth, void *data);
216extern int early_init_dt_scan_recoverable_ranges(unsigned long node,
217 const char *uname, int depth, void *data);
218
219extern int opal_get_chars(uint32_t vtermno, char *buf, int count);
220extern int opal_put_chars(uint32_t vtermno, const char *buf, int total_len);
221
222extern void hvc_opal_init_early(void);
223
224extern int opal_notifier_register(struct notifier_block *nb);
225extern int opal_notifier_unregister(struct notifier_block *nb);
226
227extern int opal_message_notifier_register(enum opal_msg_type msg_type,
228 struct notifier_block *nb);
229extern int opal_message_notifier_unregister(enum opal_msg_type msg_type,
230 struct notifier_block *nb);
231extern void opal_notifier_enable(void);
232extern void opal_notifier_disable(void);
233extern void opal_notifier_update_evt(uint64_t evt_mask, uint64_t evt_val);
234
235extern int __opal_async_get_token(void);
236extern int opal_async_get_token_interruptible(void);
237extern int __opal_async_release_token(int token);
238extern int opal_async_release_token(int token);
239extern int opal_async_wait_response(uint64_t token, struct opal_msg *msg);
240extern int opal_get_sensor_data(u32 sensor_hndl, u32 *sensor_data);
241
242struct rtc_time;
243extern unsigned long opal_get_boot_time(void);
244extern void opal_nvram_init(void);
245extern void opal_flash_update_init(void);
246extern void opal_flash_term_callback(void);
247extern int opal_elog_init(void);
248extern void opal_platform_dump_init(void);
249extern void opal_sys_param_init(void);
250extern void opal_msglog_init(void);
251extern void opal_msglog_sysfs_init(void);
252extern int opal_async_comp_init(void);
253extern int opal_sensor_init(void);
254extern int opal_hmi_handler_init(void);
255extern int opal_event_init(void);
256
257extern int opal_machine_check(struct pt_regs *regs);
258extern bool opal_mce_check_early_recovery(struct pt_regs *regs);
259extern int opal_hmi_exception_early(struct pt_regs *regs);
260extern int opal_handle_hmi_exception(struct pt_regs *regs);
261
262extern void opal_shutdown(void);
263extern int opal_resync_timebase(void);
264
265extern void opal_lpc_init(void);
266
267extern void opal_kmsg_init(void);
268
269extern int opal_event_request(unsigned int opal_event_nr);
270
271struct opal_sg_list *opal_vmalloc_to_sg_list(void *vmalloc_addr,
272 unsigned long vmalloc_size);
273void opal_free_sg_list(struct opal_sg_list *sg);
274
275extern int opal_error_code(int rc);
276
277ssize_t opal_msglog_copy(char *to, loff_t pos, size_t count);
278
279#endif /* __ASSEMBLY__ */
280
281#endif /* _ASM_POWERPC_OPAL_H */