1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Device Tree file for Marvell Armada 388 evaluation board
  4 * (DB-88F6820)
  5 *
  6 *  Copyright (C) 2014 Marvell
  7 *
  8 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  9 */
 10
 11/dts-v1/;
 12#include "armada-388.dtsi"
 13
 14/ {
 15	model = "Marvell Armada 385 Development Board";
 16	compatible = "marvell,a385-db", "marvell,armada388",
 17		"marvell,armada385", "marvell,armada380";
 18
 19	chosen {
 20		stdout-path = "serial0:115200n8";
 21	};
 22
 23	memory {
 24		device_type = "memory";
 25		reg = <0x00000000 0x10000000>; /* 256 MB */
 26	};
 27
 28	soc {
 29		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
 30			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000
 31			  MBUS_ID(0x09, 0x19) 0 0xf1100000 0x10000
 32			  MBUS_ID(0x09, 0x15) 0 0xf1110000 0x10000
 33			  MBUS_ID(0x0c, 0x04) 0 0xf1200000 0x100000>;
 34
 35		internal-regs {
 36			i2c@11000 {
 37				status = "okay";
 38				clock-frequency = <100000>;
 39			};
 40
 41			i2c@11100 {
 42				status = "okay";
 43				clock-frequency = <100000>;
 44			};
 45
 46			serial@12000 {
 47				status = "okay";
 48			};
 49
 50			ethernet@30000 {
 51				status = "okay";
 52				phy = <&phy1>;
 53				phy-mode = "rgmii-id";
 54				buffer-manager = <&bm>;
 55				bm,pool-long = <2>;
 56				bm,pool-short = <3>;
 57			};
 58
 59			usb@58000 {
 60				status = "ok";
 61			};
 62
 63			ethernet@70000 {
 64				status = "okay";
 65				phy = <&phy0>;
 66				phy-mode = "rgmii-id";
 67				buffer-manager = <&bm>;
 68				bm,pool-long = <0>;
 69				bm,pool-short = <1>;
 70			};
 71
 72			mdio@72004 {
 73				phy0: ethernet-phy@0 {
 74					reg = <0>;
 75				};
 76
 77				phy1: ethernet-phy@1 {
 78					reg = <1>;
 79				};
 80			};
 81
 82			sata@a8000 {
 83				status = "okay";
 84			};
 85
 86			sata@e0000 {
 87				status = "okay";
 88			};
 89
 90			bm@c8000 {
 91				status = "okay";
 92			};
 93
 94			flash@d0000 {
 95				status = "okay";
 96				num-cs = <1>;
 97				marvell,nand-keep-config;
 98				marvell,nand-enable-arbiter;
 99				nand-on-flash-bbt;
100				nand-ecc-strength = <4>;
101				nand-ecc-step-size = <512>;
102
103				partition@0 {
104					label = "U-Boot";
105					reg = <0 0x800000>;
106				};
107				partition@800000 {
108					label = "Linux";
109					reg = <0x800000 0x800000>;
110				};
111				partition@1000000 {
112					label = "Filesystem";
113					reg = <0x1000000 0x3f000000>;
114				};
115			};
116
117			sdhci@d8000 {
118				broken-cd;
119				wp-inverted;
120				bus-width = <8>;
121				status = "okay";
122				no-1-8-v;
123			};
124
125			usb3@f0000 {
126				status = "okay";
127			};
128
129			usb3@f8000 {
130				status = "okay";
131			};
132		};
133
134		bm-bppi {
135			status = "okay";
136		};
137
138		pcie {
139			status = "okay";
140			/*
141			 * The two PCIe units are accessible through
142			 * standard PCIe slots on the board.
143			 */
144			pcie@1,0 {
145				/* Port 0, Lane 0 */
146				status = "okay";
147			};
148			pcie@2,0 {
149				/* Port 1, Lane 0 */
150				status = "okay";
151			};
152		};
153	};
154};
155
156&spi0 {
157	status = "okay";
158
159	spi-flash@0 {
160		#address-cells = <1>;
161		#size-cells = <1>;
162		compatible = "w25q32", "jedec,spi-nor";
163		reg = <0>; /* Chip select 0 */
164		spi-max-frequency = <108000000>;
165	};
166};
167