Loading...
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Architecture specific OF callbacks.
4 */
5#include <linux/export.h>
6#include <linux/io.h>
7#include <linux/interrupt.h>
8#include <linux/list.h>
9#include <linux/of.h>
10#include <linux/of_fdt.h>
11#include <linux/of_address.h>
12#include <linux/of_platform.h>
13#include <linux/of_irq.h>
14#include <linux/libfdt.h>
15#include <linux/slab.h>
16#include <linux/pci.h>
17#include <linux/of_pci.h>
18#include <linux/initrd.h>
19
20#include <asm/irqdomain.h>
21#include <asm/hpet.h>
22#include <asm/apic.h>
23#include <asm/pci_x86.h>
24#include <asm/setup.h>
25#include <asm/i8259.h>
26
27__initdata u64 initial_dtb;
28char __initdata cmd_line[COMMAND_LINE_SIZE];
29
30int __initdata of_ioapic;
31
32void __init early_init_dt_scan_chosen_arch(unsigned long node)
33{
34 BUG();
35}
36
37void __init early_init_dt_add_memory_arch(u64 base, u64 size)
38{
39 BUG();
40}
41
42void __init add_dtb(u64 data)
43{
44 initial_dtb = data + offsetof(struct setup_data, data);
45}
46
47/*
48 * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
49 */
50static struct of_device_id __initdata ce4100_ids[] = {
51 { .compatible = "intel,ce4100-cp", },
52 { .compatible = "isa", },
53 { .compatible = "pci", },
54 {},
55};
56
57static int __init add_bus_probe(void)
58{
59 if (!of_have_populated_dt())
60 return 0;
61
62 return of_platform_bus_probe(NULL, ce4100_ids, NULL);
63}
64device_initcall(add_bus_probe);
65
66#ifdef CONFIG_PCI
67struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
68{
69 struct device_node *np;
70
71 for_each_node_by_type(np, "pci") {
72 const void *prop;
73 unsigned int bus_min;
74
75 prop = of_get_property(np, "bus-range", NULL);
76 if (!prop)
77 continue;
78 bus_min = be32_to_cpup(prop);
79 if (bus->number == bus_min)
80 return np;
81 }
82 return NULL;
83}
84
85static int x86_of_pci_irq_enable(struct pci_dev *dev)
86{
87 u32 virq;
88 int ret;
89 u8 pin;
90
91 ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
92 if (ret)
93 return ret;
94 if (!pin)
95 return 0;
96
97 virq = of_irq_parse_and_map_pci(dev, 0, 0);
98 if (virq == 0)
99 return -EINVAL;
100 dev->irq = virq;
101 return 0;
102}
103
104static void x86_of_pci_irq_disable(struct pci_dev *dev)
105{
106}
107
108void x86_of_pci_init(void)
109{
110 pcibios_enable_irq = x86_of_pci_irq_enable;
111 pcibios_disable_irq = x86_of_pci_irq_disable;
112}
113#endif
114
115static void __init dtb_setup_hpet(void)
116{
117#ifdef CONFIG_HPET_TIMER
118 struct device_node *dn;
119 struct resource r;
120 int ret;
121
122 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
123 if (!dn)
124 return;
125 ret = of_address_to_resource(dn, 0, &r);
126 if (ret) {
127 WARN_ON(1);
128 return;
129 }
130 hpet_address = r.start;
131#endif
132}
133
134#ifdef CONFIG_X86_LOCAL_APIC
135
136static void __init dtb_cpu_setup(void)
137{
138 struct device_node *dn;
139 u32 apic_id, version;
140 int ret;
141
142 version = GET_APIC_VERSION(apic_read(APIC_LVR));
143 for_each_node_by_type(dn, "cpu") {
144 ret = of_property_read_u32(dn, "reg", &apic_id);
145 if (ret < 0) {
146 pr_warn("%pOF: missing local APIC ID\n", dn);
147 continue;
148 }
149 generic_processor_info(apic_id, version);
150 }
151}
152
153static void __init dtb_lapic_setup(void)
154{
155 struct device_node *dn;
156 struct resource r;
157 unsigned long lapic_addr = APIC_DEFAULT_PHYS_BASE;
158 int ret;
159
160 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
161 if (dn) {
162 ret = of_address_to_resource(dn, 0, &r);
163 if (WARN_ON(ret))
164 return;
165 lapic_addr = r.start;
166 }
167
168 /* Did the boot loader setup the local APIC ? */
169 if (!boot_cpu_has(X86_FEATURE_APIC)) {
170 if (apic_force_enable(lapic_addr))
171 return;
172 }
173 smp_found_config = 1;
174 pic_mode = 1;
175 register_lapic_address(lapic_addr);
176}
177
178#endif /* CONFIG_X86_LOCAL_APIC */
179
180#ifdef CONFIG_X86_IO_APIC
181static unsigned int ioapic_id;
182
183struct of_ioapic_type {
184 u32 out_type;
185 u32 trigger;
186 u32 polarity;
187};
188
189static struct of_ioapic_type of_ioapic_type[] =
190{
191 {
192 .out_type = IRQ_TYPE_EDGE_RISING,
193 .trigger = IOAPIC_EDGE,
194 .polarity = 1,
195 },
196 {
197 .out_type = IRQ_TYPE_LEVEL_LOW,
198 .trigger = IOAPIC_LEVEL,
199 .polarity = 0,
200 },
201 {
202 .out_type = IRQ_TYPE_LEVEL_HIGH,
203 .trigger = IOAPIC_LEVEL,
204 .polarity = 1,
205 },
206 {
207 .out_type = IRQ_TYPE_EDGE_FALLING,
208 .trigger = IOAPIC_EDGE,
209 .polarity = 0,
210 },
211};
212
213static int dt_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
214 unsigned int nr_irqs, void *arg)
215{
216 struct irq_fwspec *fwspec = (struct irq_fwspec *)arg;
217 struct of_ioapic_type *it;
218 struct irq_alloc_info tmp;
219 int type_index;
220
221 if (WARN_ON(fwspec->param_count < 2))
222 return -EINVAL;
223
224 type_index = fwspec->param[1];
225 if (type_index >= ARRAY_SIZE(of_ioapic_type))
226 return -EINVAL;
227
228 it = &of_ioapic_type[type_index];
229 ioapic_set_alloc_attr(&tmp, NUMA_NO_NODE, it->trigger, it->polarity);
230 tmp.ioapic_id = mpc_ioapic_id(mp_irqdomain_ioapic_idx(domain));
231 tmp.ioapic_pin = fwspec->param[0];
232
233 return mp_irqdomain_alloc(domain, virq, nr_irqs, &tmp);
234}
235
236static const struct irq_domain_ops ioapic_irq_domain_ops = {
237 .alloc = dt_irqdomain_alloc,
238 .free = mp_irqdomain_free,
239 .activate = mp_irqdomain_activate,
240 .deactivate = mp_irqdomain_deactivate,
241};
242
243static void __init dtb_add_ioapic(struct device_node *dn)
244{
245 struct resource r;
246 int ret;
247 struct ioapic_domain_cfg cfg = {
248 .type = IOAPIC_DOMAIN_DYNAMIC,
249 .ops = &ioapic_irq_domain_ops,
250 .dev = dn,
251 };
252
253 ret = of_address_to_resource(dn, 0, &r);
254 if (ret) {
255 printk(KERN_ERR "Can't obtain address from device node %pOF.\n", dn);
256 return;
257 }
258 mp_register_ioapic(++ioapic_id, r.start, gsi_top, &cfg);
259}
260
261static void __init dtb_ioapic_setup(void)
262{
263 struct device_node *dn;
264
265 for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
266 dtb_add_ioapic(dn);
267
268 if (nr_ioapics) {
269 of_ioapic = 1;
270 return;
271 }
272 printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
273}
274#else
275static void __init dtb_ioapic_setup(void) {}
276#endif
277
278static void __init dtb_apic_setup(void)
279{
280#ifdef CONFIG_X86_LOCAL_APIC
281 dtb_lapic_setup();
282 dtb_cpu_setup();
283#endif
284 dtb_ioapic_setup();
285}
286
287#ifdef CONFIG_OF_EARLY_FLATTREE
288static void __init x86_flattree_get_config(void)
289{
290 u32 size, map_len;
291 void *dt;
292
293 if (!initial_dtb)
294 return;
295
296 map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128);
297
298 dt = early_memremap(initial_dtb, map_len);
299 size = fdt_totalsize(dt);
300 if (map_len < size) {
301 early_memunmap(dt, map_len);
302 dt = early_memremap(initial_dtb, size);
303 map_len = size;
304 }
305
306 early_init_dt_verify(dt);
307 unflatten_and_copy_device_tree();
308 early_memunmap(dt, map_len);
309}
310#else
311static inline void x86_flattree_get_config(void) { }
312#endif
313
314void __init x86_dtb_init(void)
315{
316 x86_flattree_get_config();
317
318 if (!of_have_populated_dt())
319 return;
320
321 dtb_setup_hpet();
322 dtb_apic_setup();
323}
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Architecture specific OF callbacks.
4 */
5#include <linux/export.h>
6#include <linux/io.h>
7#include <linux/interrupt.h>
8#include <linux/list.h>
9#include <linux/of.h>
10#include <linux/of_fdt.h>
11#include <linux/of_address.h>
12#include <linux/of_platform.h>
13#include <linux/of_irq.h>
14#include <linux/libfdt.h>
15#include <linux/slab.h>
16#include <linux/pci.h>
17#include <linux/of_pci.h>
18#include <linux/initrd.h>
19
20#include <asm/irqdomain.h>
21#include <asm/hpet.h>
22#include <asm/apic.h>
23#include <asm/io_apic.h>
24#include <asm/pci_x86.h>
25#include <asm/setup.h>
26#include <asm/i8259.h>
27#include <asm/prom.h>
28
29__initdata u64 initial_dtb;
30char __initdata cmd_line[COMMAND_LINE_SIZE];
31
32int __initdata of_ioapic;
33
34void __init add_dtb(u64 data)
35{
36 initial_dtb = data + offsetof(struct setup_data, data);
37}
38
39/*
40 * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
41 */
42static struct of_device_id __initdata ce4100_ids[] = {
43 { .compatible = "intel,ce4100-cp", },
44 { .compatible = "isa", },
45 { .compatible = "pci", },
46 {},
47};
48
49static int __init add_bus_probe(void)
50{
51 if (!of_have_populated_dt())
52 return 0;
53
54 return of_platform_bus_probe(NULL, ce4100_ids, NULL);
55}
56device_initcall(add_bus_probe);
57
58#ifdef CONFIG_PCI
59struct device_node *pcibios_get_phb_of_node(struct pci_bus *bus)
60{
61 struct device_node *np;
62
63 for_each_node_by_type(np, "pci") {
64 const void *prop;
65 unsigned int bus_min;
66
67 prop = of_get_property(np, "bus-range", NULL);
68 if (!prop)
69 continue;
70 bus_min = be32_to_cpup(prop);
71 if (bus->number == bus_min)
72 return np;
73 }
74 return NULL;
75}
76
77static int x86_of_pci_irq_enable(struct pci_dev *dev)
78{
79 u32 virq;
80 int ret;
81 u8 pin;
82
83 ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
84 if (ret)
85 return ret;
86 if (!pin)
87 return 0;
88
89 virq = of_irq_parse_and_map_pci(dev, 0, 0);
90 if (virq == 0)
91 return -EINVAL;
92 dev->irq = virq;
93 return 0;
94}
95
96static void x86_of_pci_irq_disable(struct pci_dev *dev)
97{
98}
99
100void x86_of_pci_init(void)
101{
102 pcibios_enable_irq = x86_of_pci_irq_enable;
103 pcibios_disable_irq = x86_of_pci_irq_disable;
104}
105#endif
106
107static void __init dtb_setup_hpet(void)
108{
109#ifdef CONFIG_HPET_TIMER
110 struct device_node *dn;
111 struct resource r;
112 int ret;
113
114 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-hpet");
115 if (!dn)
116 return;
117 ret = of_address_to_resource(dn, 0, &r);
118 if (ret) {
119 WARN_ON(1);
120 return;
121 }
122 hpet_address = r.start;
123#endif
124}
125
126#ifdef CONFIG_X86_LOCAL_APIC
127
128static void __init dtb_cpu_setup(void)
129{
130 struct device_node *dn;
131 u32 apic_id;
132
133 for_each_of_cpu_node(dn) {
134 apic_id = of_get_cpu_hwid(dn, 0);
135 if (apic_id == ~0U) {
136 pr_warn("%pOF: missing local APIC ID\n", dn);
137 continue;
138 }
139 generic_processor_info(apic_id);
140 }
141}
142
143static void __init dtb_lapic_setup(void)
144{
145 struct device_node *dn;
146 struct resource r;
147 unsigned long lapic_addr = APIC_DEFAULT_PHYS_BASE;
148 int ret;
149
150 dn = of_find_compatible_node(NULL, NULL, "intel,ce4100-lapic");
151 if (dn) {
152 ret = of_address_to_resource(dn, 0, &r);
153 if (WARN_ON(ret))
154 return;
155 lapic_addr = r.start;
156 }
157
158 /* Did the boot loader setup the local APIC ? */
159 if (!boot_cpu_has(X86_FEATURE_APIC)) {
160 /* Try force enabling, which registers the APIC address */
161 if (!apic_force_enable(lapic_addr))
162 return;
163 } else {
164 register_lapic_address(lapic_addr);
165 }
166 smp_found_config = 1;
167 pic_mode = !of_property_read_bool(dn, "intel,virtual-wire-mode");
168 pr_info("%s compatibility mode.\n", pic_mode ? "IMCR and PIC" : "Virtual Wire");
169}
170
171#endif /* CONFIG_X86_LOCAL_APIC */
172
173#ifdef CONFIG_X86_IO_APIC
174static unsigned int ioapic_id;
175
176struct of_ioapic_type {
177 u32 out_type;
178 u32 is_level;
179 u32 active_low;
180};
181
182static struct of_ioapic_type of_ioapic_type[] =
183{
184 {
185 .out_type = IRQ_TYPE_EDGE_FALLING,
186 .is_level = 0,
187 .active_low = 1,
188 },
189 {
190 .out_type = IRQ_TYPE_LEVEL_HIGH,
191 .is_level = 1,
192 .active_low = 0,
193 },
194 {
195 .out_type = IRQ_TYPE_LEVEL_LOW,
196 .is_level = 1,
197 .active_low = 1,
198 },
199 {
200 .out_type = IRQ_TYPE_EDGE_RISING,
201 .is_level = 0,
202 .active_low = 0,
203 },
204};
205
206static int dt_irqdomain_alloc(struct irq_domain *domain, unsigned int virq,
207 unsigned int nr_irqs, void *arg)
208{
209 struct irq_fwspec *fwspec = (struct irq_fwspec *)arg;
210 struct of_ioapic_type *it;
211 struct irq_alloc_info tmp;
212 int type_index;
213
214 if (WARN_ON(fwspec->param_count < 2))
215 return -EINVAL;
216
217 type_index = fwspec->param[1];
218 if (type_index >= ARRAY_SIZE(of_ioapic_type))
219 return -EINVAL;
220
221 it = &of_ioapic_type[type_index];
222 ioapic_set_alloc_attr(&tmp, NUMA_NO_NODE, it->is_level, it->active_low);
223 tmp.devid = mpc_ioapic_id(mp_irqdomain_ioapic_idx(domain));
224 tmp.ioapic.pin = fwspec->param[0];
225
226 return mp_irqdomain_alloc(domain, virq, nr_irqs, &tmp);
227}
228
229static const struct irq_domain_ops ioapic_irq_domain_ops = {
230 .alloc = dt_irqdomain_alloc,
231 .free = mp_irqdomain_free,
232 .activate = mp_irqdomain_activate,
233 .deactivate = mp_irqdomain_deactivate,
234};
235
236static void __init dtb_add_ioapic(struct device_node *dn)
237{
238 struct resource r;
239 int ret;
240 struct ioapic_domain_cfg cfg = {
241 .type = IOAPIC_DOMAIN_DYNAMIC,
242 .ops = &ioapic_irq_domain_ops,
243 .dev = dn,
244 };
245
246 ret = of_address_to_resource(dn, 0, &r);
247 if (ret) {
248 pr_err("Can't obtain address from device node %pOF.\n", dn);
249 return;
250 }
251 mp_register_ioapic(++ioapic_id, r.start, gsi_top, &cfg);
252}
253
254static void __init dtb_ioapic_setup(void)
255{
256 struct device_node *dn;
257
258 for_each_compatible_node(dn, NULL, "intel,ce4100-ioapic")
259 dtb_add_ioapic(dn);
260
261 if (nr_ioapics) {
262 of_ioapic = 1;
263 return;
264 }
265 pr_err("Error: No information about IO-APIC in OF.\n");
266}
267#else
268static void __init dtb_ioapic_setup(void) {}
269#endif
270
271static void __init dtb_apic_setup(void)
272{
273#ifdef CONFIG_X86_LOCAL_APIC
274 dtb_lapic_setup();
275 dtb_cpu_setup();
276#endif
277 dtb_ioapic_setup();
278}
279
280#ifdef CONFIG_OF_EARLY_FLATTREE
281void __init x86_flattree_get_config(void)
282{
283 u32 size, map_len;
284 void *dt;
285
286 if (!initial_dtb)
287 return;
288
289 map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK), (u64)128);
290
291 dt = early_memremap(initial_dtb, map_len);
292 size = fdt_totalsize(dt);
293 if (map_len < size) {
294 early_memunmap(dt, map_len);
295 dt = early_memremap(initial_dtb, size);
296 map_len = size;
297 }
298
299 early_init_dt_verify(dt);
300 unflatten_and_copy_device_tree();
301 early_memunmap(dt, map_len);
302}
303#endif
304
305void __init x86_dtb_init(void)
306{
307 if (!of_have_populated_dt())
308 return;
309
310 dtb_setup_hpet();
311 dtb_apic_setup();
312}