1/*
 2 *	Driver for Broadcom 63xx SOCs integrated PHYs
 3 *
 4 *	This program is free software; you can redistribute it and/or
 5 *	modify it under the terms of the GNU General Public License
 6 *	as published by the Free Software Foundation; either version
 7 *	2 of the License, or (at your option) any later version.
 8 */
 9#include "bcm-phy-lib.h"
10#include <linux/module.h>
11#include <linux/phy.h>
12
13#define MII_BCM63XX_IR		0x1a	/* interrupt register */
14#define MII_BCM63XX_IR_EN	0x4000	/* global interrupt enable */
15#define MII_BCM63XX_IR_DUPLEX	0x0800	/* duplex changed */
16#define MII_BCM63XX_IR_SPEED	0x0400	/* speed changed */
17#define MII_BCM63XX_IR_LINK	0x0200	/* link changed */
18#define MII_BCM63XX_IR_GMASK	0x0100	/* global interrupt mask */
19
20MODULE_DESCRIPTION("Broadcom 63xx internal PHY driver");
21MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
22MODULE_LICENSE("GPL");
23
24static int bcm63xx_config_intr(struct phy_device *phydev)
25{
26	int reg, err;
27
28	reg = phy_read(phydev, MII_BCM63XX_IR);
29	if (reg < 0)
30		return reg;
31
32	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
33		reg &= ~MII_BCM63XX_IR_GMASK;
34	else
35		reg |= MII_BCM63XX_IR_GMASK;
36
37	err = phy_write(phydev, MII_BCM63XX_IR, reg);
38	return err;
39}
40
41static int bcm63xx_config_init(struct phy_device *phydev)
42{
43	int reg, err;
44
 
 
 
45	reg = phy_read(phydev, MII_BCM63XX_IR);
46	if (reg < 0)
47		return reg;
48
49	/* Mask interrupts globally.  */
50	reg |= MII_BCM63XX_IR_GMASK;
51	err = phy_write(phydev, MII_BCM63XX_IR, reg);
52	if (err < 0)
53		return err;
54
55	/* Unmask events we are interested in  */
56	reg = ~(MII_BCM63XX_IR_DUPLEX |
57		MII_BCM63XX_IR_SPEED |
58		MII_BCM63XX_IR_LINK) |
59		MII_BCM63XX_IR_EN;
60	return phy_write(phydev, MII_BCM63XX_IR, reg);
61}
62
63static struct phy_driver bcm63xx_driver[] = {
64{
65	.phy_id		= 0x00406000,
66	.phy_id_mask	= 0xfffffc00,
67	.name		= "Broadcom BCM63XX (1)",
68	/* ASYM_PAUSE bit is marked RO in datasheet, so don't cheat */
69	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause),
70	.flags		= PHY_HAS_INTERRUPT | PHY_IS_INTERNAL,
71	.config_init	= bcm63xx_config_init,
72	.ack_interrupt	= bcm_phy_ack_intr,
73	.config_intr	= bcm63xx_config_intr,
74}, {
75	/* same phy as above, with just a different OUI */
76	.phy_id		= 0x002bdc00,
77	.phy_id_mask	= 0xfffffc00,
78	.name		= "Broadcom BCM63XX (2)",
79	.features	= (PHY_BASIC_FEATURES | SUPPORTED_Pause),
80	.flags		= PHY_HAS_INTERRUPT | PHY_IS_INTERNAL,
81	.config_init	= bcm63xx_config_init,
82	.ack_interrupt	= bcm_phy_ack_intr,
83	.config_intr	= bcm63xx_config_intr,
84} };
85
86module_phy_driver(bcm63xx_driver);
87
88static struct mdio_device_id __maybe_unused bcm63xx_tbl[] = {
89	{ 0x00406000, 0xfffffc00 },
90	{ 0x002bdc00, 0xfffffc00 },
91	{ }
92};
93
94MODULE_DEVICE_TABLE(mdio, bcm63xx_tbl);

 1// SPDX-License-Identifier: GPL-2.0+
 2/*
 3 *	Driver for Broadcom 63xx SOCs integrated PHYs
 
 
 
 
 
 4 */
 5#include "bcm-phy-lib.h"
 6#include <linux/module.h>
 7#include <linux/phy.h>
 8
 9#define MII_BCM63XX_IR		0x1a	/* interrupt register */
10#define MII_BCM63XX_IR_EN	0x4000	/* global interrupt enable */
11#define MII_BCM63XX_IR_DUPLEX	0x0800	/* duplex changed */
12#define MII_BCM63XX_IR_SPEED	0x0400	/* speed changed */
13#define MII_BCM63XX_IR_LINK	0x0200	/* link changed */
14#define MII_BCM63XX_IR_GMASK	0x0100	/* global interrupt mask */
15
16MODULE_DESCRIPTION("Broadcom 63xx internal PHY driver");
17MODULE_AUTHOR("Maxime Bizon <mbizon@freebox.fr>");
18MODULE_LICENSE("GPL");
19
20static int bcm63xx_config_intr(struct phy_device *phydev)
21{
22	int reg, err;
23
24	reg = phy_read(phydev, MII_BCM63XX_IR);
25	if (reg < 0)
26		return reg;
27
28	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
29		reg &= ~MII_BCM63XX_IR_GMASK;
30	else
31		reg |= MII_BCM63XX_IR_GMASK;
32
33	err = phy_write(phydev, MII_BCM63XX_IR, reg);
34	return err;
35}
36
37static int bcm63xx_config_init(struct phy_device *phydev)
38{
39	int reg, err;
40
41	/* ASYM_PAUSE bit is marked RO in datasheet, so don't cheat */
42	linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, phydev->supported);
43
44	reg = phy_read(phydev, MII_BCM63XX_IR);
45	if (reg < 0)
46		return reg;
47
48	/* Mask interrupts globally.  */
49	reg |= MII_BCM63XX_IR_GMASK;
50	err = phy_write(phydev, MII_BCM63XX_IR, reg);
51	if (err < 0)
52		return err;
53
54	/* Unmask events we are interested in  */
55	reg = ~(MII_BCM63XX_IR_DUPLEX |
56		MII_BCM63XX_IR_SPEED |
57		MII_BCM63XX_IR_LINK) |
58		MII_BCM63XX_IR_EN;
59	return phy_write(phydev, MII_BCM63XX_IR, reg);
60}
61
62static struct phy_driver bcm63xx_driver[] = {
63{
64	.phy_id		= 0x00406000,
65	.phy_id_mask	= 0xfffffc00,
66	.name		= "Broadcom BCM63XX (1)",
67	/* PHY_BASIC_FEATURES */
68	.flags		= PHY_IS_INTERNAL,
 
69	.config_init	= bcm63xx_config_init,
70	.ack_interrupt	= bcm_phy_ack_intr,
71	.config_intr	= bcm63xx_config_intr,
72}, {
73	/* same phy as above, with just a different OUI */
74	.phy_id		= 0x002bdc00,
75	.phy_id_mask	= 0xfffffc00,
76	.name		= "Broadcom BCM63XX (2)",
77	/* PHY_BASIC_FEATURES */
78	.flags		= PHY_IS_INTERNAL,
79	.config_init	= bcm63xx_config_init,
80	.ack_interrupt	= bcm_phy_ack_intr,
81	.config_intr	= bcm63xx_config_intr,
82} };
83
84module_phy_driver(bcm63xx_driver);
85
86static struct mdio_device_id __maybe_unused bcm63xx_tbl[] = {
87	{ 0x00406000, 0xfffffc00 },
88	{ 0x002bdc00, 0xfffffc00 },
89	{ }
90};
91
92MODULE_DEVICE_TABLE(mdio, bcm63xx_tbl);