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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
4 * device tree source
5*/
6
7#include <dt-bindings/sound/samsung-i2s.h>
8#include <dt-bindings/input/input.h>
9#include <dt-bindings/clock/maxim,max77686.h>
10#include "exynos4412.dtsi"
11#include "exynos4412-ppmu-common.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include "exynos-mfc-reserved-memory.dtsi"
14
15/ {
16 chosen {
17 stdout-path = &serial_1;
18 };
19
20 firmware@204f000 {
21 compatible = "samsung,secure-firmware";
22 reg = <0x0204F000 0x1000>;
23 };
24
25 gpio_keys {
26 compatible = "gpio-keys";
27 pinctrl-names = "default";
28 pinctrl-0 = <&gpio_power_key>;
29
30 power_key {
31 gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_POWER>;
33 label = "power key";
34 debounce-interval = <10>;
35 wakeup-source;
36 };
37 };
38
39 sound: sound {
40 compatible = "simple-audio-card";
41
42 simple-audio-card,format = "i2s";
43 simple-audio-card,bitclock-master = <&link0_codec>;
44 simple-audio-card,frame-master = <&link0_codec>;
45
46 simple-audio-card,cpu {
47 sound-dai = <&i2s0 0>;
48 system-clock-frequency = <19200000>;
49 };
50
51 link0_codec: simple-audio-card,codec {
52 sound-dai = <&max98090>;
53 clocks = <&i2s0 CLK_I2S_CDCLK>;
54 };
55 };
56
57 emmc_pwrseq: pwrseq {
58 pinctrl-0 = <&sd1_cd>;
59 pinctrl-names = "default";
60 compatible = "mmc-pwrseq-emmc";
61 reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
62 };
63
64 fixed-rate-clocks {
65 xxti {
66 compatible = "samsung,clock-xxti";
67 clock-frequency = <0>;
68 };
69
70 xusbxti {
71 compatible = "samsung,clock-xusbxti";
72 clock-frequency = <24000000>;
73 };
74 };
75
76 thermal-zones {
77 cpu_thermal: cpu-thermal {
78 cooling-maps {
79 cooling_map0: map0 {
80 /* Corresponds to 800MHz at freq_table */
81 cooling-device = <&cpu0 7 7>;
82 };
83 cooling_map1: map1 {
84 /* Corresponds to 200MHz at freq_table */
85 cooling-device = <&cpu0 13 13>;
86 };
87 };
88 };
89 };
90};
91
92&bus_dmc {
93 devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
94 vdd-supply = <&buck1_reg>;
95 status = "okay";
96};
97
98&bus_acp {
99 devfreq = <&bus_dmc>;
100 status = "okay";
101};
102
103&bus_c2c {
104 devfreq = <&bus_dmc>;
105 status = "okay";
106};
107
108&bus_leftbus {
109 devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
110 vdd-supply = <&buck3_reg>;
111 status = "okay";
112};
113
114&bus_rightbus {
115 devfreq = <&bus_leftbus>;
116 status = "okay";
117};
118
119&bus_display {
120 devfreq = <&bus_leftbus>;
121 status = "okay";
122};
123
124&bus_fsys {
125 devfreq = <&bus_leftbus>;
126 status = "okay";
127};
128
129&bus_peri {
130 devfreq = <&bus_leftbus>;
131 status = "okay";
132};
133
134&bus_mfc {
135 devfreq = <&bus_leftbus>;
136 status = "okay";
137};
138
139&camera {
140 status = "okay";
141 pinctrl-names = "default";
142 pinctrl-0 = <>;
143};
144
145&clock_audss {
146 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
147 <&clock_audss EXYNOS_MOUT_I2S>,
148 <&clock_audss EXYNOS_DOUT_SRP>,
149 <&clock_audss EXYNOS_DOUT_AUD_BUS>;
150 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
151 <&clock_audss EXYNOS_MOUT_AUDSS>;
152 assigned-clock-rates = <0>, <0>, <192000000>, <19200000>;
153};
154
155&cpu0 {
156 cpu0-supply = <&buck2_reg>;
157};
158
159/* RSTN signal for eMMC */
160&sd1_cd {
161 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
162 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
163};
164
165&pinctrl_1 {
166 gpio_power_key: power_key {
167 samsung,pins = "gpx1-3";
168 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
169 };
170
171 max77686_irq: max77686-irq {
172 samsung,pins = "gpx3-2";
173 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
174 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
175 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
176 };
177
178 hdmi_hpd: hdmi-hpd {
179 samsung,pins = "gpx3-7";
180 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
181 };
182};
183
184&ehci {
185 status = "okay";
186};
187
188&exynos_usbphy {
189 status = "okay";
190};
191
192&fimc_0 {
193 status = "okay";
194 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
195 <&clock CLK_SCLK_FIMC0>;
196 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
197 assigned-clock-rates = <0>, <176000000>;
198};
199
200&fimc_1 {
201 status = "okay";
202 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
203 <&clock CLK_SCLK_FIMC1>;
204 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
205 assigned-clock-rates = <0>, <176000000>;
206};
207
208&fimc_2 {
209 status = "okay";
210 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
211 <&clock CLK_SCLK_FIMC2>;
212 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
213 assigned-clock-rates = <0>, <176000000>;
214};
215
216&fimc_3 {
217 status = "okay";
218 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
219 <&clock CLK_SCLK_FIMC3>;
220 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
221 assigned-clock-rates = <0>, <176000000>;
222};
223
224&hdmi {
225 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&hdmi_hpd>;
228 vdd-supply = <&ldo8_reg>;
229 vdd_osc-supply = <&ldo10_reg>;
230 vdd_pll-supply = <&ldo8_reg>;
231 ddc = <&i2c_2>;
232 status = "okay";
233};
234
235&hdmicec {
236 status = "okay";
237};
238
239&hsotg {
240 dr_mode = "peripheral";
241 status = "okay";
242 vusb_d-supply = <&ldo15_reg>;
243 vusb_a-supply = <&ldo12_reg>;
244};
245
246&i2c_0 {
247 samsung,i2c-sda-delay = <100>;
248 samsung,i2c-max-bus-freq = <400000>;
249 status = "okay";
250
251 usb3503: usb3503@8 {
252 compatible = "smsc,usb3503";
253 reg = <0x08>;
254
255 intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
256 connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
257 reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
258 initial-mode = <1>;
259 };
260
261 max77686: pmic@9 {
262 compatible = "maxim,max77686";
263 interrupt-parent = <&gpx3>;
264 interrupts = <2 IRQ_TYPE_NONE>;
265 pinctrl-names = "default";
266 pinctrl-0 = <&max77686_irq>;
267 reg = <0x09>;
268 #clock-cells = <1>;
269
270 voltage-regulators {
271 ldo1_reg: LDO1 {
272 regulator-name = "VDD_ALIVE_1.0V";
273 regulator-min-microvolt = <1000000>;
274 regulator-max-microvolt = <1000000>;
275 regulator-always-on;
276 };
277
278 ldo2_reg: LDO2 {
279 regulator-name = "VDDQ_M1_2_1.8V";
280 regulator-min-microvolt = <1800000>;
281 regulator-max-microvolt = <1800000>;
282 regulator-always-on;
283 };
284
285 ldo3_reg: LDO3 {
286 regulator-name = "VDDQ_EXT_1.8V";
287 regulator-min-microvolt = <1800000>;
288 regulator-max-microvolt = <1800000>;
289 regulator-always-on;
290 };
291
292 ldo4_reg: LDO4 {
293 regulator-name = "VDDQ_MMC2_2.8V";
294 regulator-min-microvolt = <2800000>;
295 regulator-max-microvolt = <2800000>;
296 regulator-boot-on;
297 };
298
299 ldo5_reg: LDO5 {
300 regulator-name = "VDDQ_MMC1_3_1.8V";
301 regulator-min-microvolt = <1800000>;
302 regulator-max-microvolt = <1800000>;
303 regulator-always-on;
304 regulator-boot-on;
305 };
306
307 ldo6_reg: LDO6 {
308 regulator-name = "VDD10_MPLL_1.0V";
309 regulator-min-microvolt = <1000000>;
310 regulator-max-microvolt = <1000000>;
311 regulator-always-on;
312 };
313
314 ldo7_reg: LDO7 {
315 regulator-name = "VDD10_XPLL_1.0V";
316 regulator-min-microvolt = <1000000>;
317 regulator-max-microvolt = <1000000>;
318 regulator-always-on;
319 };
320
321 ldo8_reg: LDO8 {
322 regulator-name = "VDD10_HDMI_1.0V";
323 regulator-min-microvolt = <1000000>;
324 regulator-max-microvolt = <1000000>;
325 };
326
327 ldo10_reg: LDO10 {
328 regulator-name = "VDDQ_MIPIHSI_1.8V";
329 regulator-min-microvolt = <1800000>;
330 regulator-max-microvolt = <1800000>;
331 };
332
333 ldo11_reg: LDO11 {
334 regulator-name = "VDD18_ABB1_1.8V";
335 regulator-min-microvolt = <1800000>;
336 regulator-max-microvolt = <1800000>;
337 regulator-always-on;
338 };
339
340 ldo12_reg: LDO12 {
341 regulator-name = "VDD33_USB_3.3V";
342 regulator-min-microvolt = <3300000>;
343 regulator-max-microvolt = <3300000>;
344 regulator-always-on;
345 regulator-boot-on;
346 };
347
348 ldo13_reg: LDO13 {
349 regulator-name = "VDDQ_C2C_W_1.8V";
350 regulator-min-microvolt = <1800000>;
351 regulator-max-microvolt = <1800000>;
352 regulator-always-on;
353 regulator-boot-on;
354 };
355
356 ldo14_reg: LDO14 {
357 regulator-name = "VDD18_ABB0_2_1.8V";
358 regulator-min-microvolt = <1800000>;
359 regulator-max-microvolt = <1800000>;
360 regulator-always-on;
361 regulator-boot-on;
362 };
363
364 ldo15_reg: LDO15 {
365 regulator-name = "VDD10_HSIC_1.0V";
366 regulator-min-microvolt = <1000000>;
367 regulator-max-microvolt = <1000000>;
368 regulator-always-on;
369 regulator-boot-on;
370 };
371
372 ldo16_reg: LDO16 {
373 regulator-name = "VDD18_HSIC_1.8V";
374 regulator-min-microvolt = <1800000>;
375 regulator-max-microvolt = <1800000>;
376 regulator-always-on;
377 regulator-boot-on;
378 };
379
380 ldo20_reg: LDO20 {
381 regulator-name = "LDO20_1.8V";
382 regulator-min-microvolt = <1800000>;
383 regulator-max-microvolt = <1800000>;
384 regulator-boot-on;
385 };
386
387 ldo21_reg: LDO21 {
388 regulator-name = "TFLASH_2.8V";
389 regulator-min-microvolt = <2800000>;
390 regulator-max-microvolt = <2800000>;
391 regulator-boot-on;
392 };
393
394 ldo22_reg: LDO22 {
395 /*
396 * Only U3 uses it, so let it define the
397 * constraints
398 */
399 regulator-name = "LDO22";
400 regulator-boot-on;
401 };
402
403 ldo25_reg: LDO25 {
404 regulator-name = "VDDQ_LCD_1.8V";
405 regulator-min-microvolt = <1800000>;
406 regulator-max-microvolt = <1800000>;
407 regulator-always-on;
408 regulator-boot-on;
409 };
410
411 buck1_reg: BUCK1 {
412 regulator-name = "vdd_mif";
413 regulator-min-microvolt = <900000>;
414 regulator-max-microvolt = <1100000>;
415 regulator-always-on;
416 regulator-boot-on;
417 };
418
419 buck2_reg: BUCK2 {
420 regulator-name = "vdd_arm";
421 regulator-min-microvolt = <900000>;
422 regulator-max-microvolt = <1350000>;
423 regulator-always-on;
424 regulator-boot-on;
425 };
426
427 buck3_reg: BUCK3 {
428 regulator-name = "vdd_int";
429 regulator-min-microvolt = <900000>;
430 regulator-max-microvolt = <1050000>;
431 regulator-always-on;
432 regulator-boot-on;
433 };
434
435 buck4_reg: BUCK4 {
436 regulator-name = "vdd_g3d";
437 regulator-min-microvolt = <900000>;
438 regulator-max-microvolt = <1100000>;
439 regulator-microvolt-offset = <50000>;
440 };
441
442 buck5_reg: BUCK5 {
443 regulator-name = "VDDQ_CKEM1_2_1.2V";
444 regulator-min-microvolt = <1200000>;
445 regulator-max-microvolt = <1200000>;
446 regulator-always-on;
447 regulator-boot-on;
448 };
449
450 buck6_reg: BUCK6 {
451 regulator-name = "BUCK6_1.35V";
452 regulator-min-microvolt = <1350000>;
453 regulator-max-microvolt = <1350000>;
454 regulator-always-on;
455 regulator-boot-on;
456 };
457
458 buck7_reg: BUCK7 {
459 regulator-name = "BUCK7_2.0V";
460 regulator-min-microvolt = <2000000>;
461 regulator-max-microvolt = <2000000>;
462 regulator-always-on;
463 };
464
465 buck8_reg: BUCK8 {
466 /*
467 * Constraints set by specific board: X,
468 * X2 and U3.
469 */
470 regulator-name = "BUCK8_2.8V";
471 };
472 };
473 };
474};
475
476&i2c_1 {
477 status = "okay";
478 max98090: max98090@10 {
479 compatible = "maxim,max98090";
480 reg = <0x10>;
481 interrupt-parent = <&gpx0>;
482 interrupts = <0 IRQ_TYPE_NONE>;
483 clocks = <&i2s0 CLK_I2S_CDCLK>;
484 clock-names = "mclk";
485 #sound-dai-cells = <0>;
486 };
487};
488
489&i2c_2 {
490 status = "okay";
491};
492
493&i2c_8 {
494 status = "okay";
495};
496
497&i2s0 {
498 pinctrl-0 = <&i2s0_bus>;
499 pinctrl-names = "default";
500 status = "okay";
501};
502
503&mixer {
504 status = "okay";
505};
506
507&mshc_0 {
508 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
509 pinctrl-names = "default";
510 vmmc-supply = <&ldo20_reg>;
511 mmc-pwrseq = <&emmc_pwrseq>;
512 status = "okay";
513
514 broken-cd;
515 card-detect-delay = <200>;
516 samsung,dw-mshc-ciu-div = <3>;
517 samsung,dw-mshc-sdr-timing = <2 3>;
518 samsung,dw-mshc-ddr-timing = <1 2>;
519 bus-width = <8>;
520 cap-mmc-highspeed;
521};
522
523&rtc {
524 status = "okay";
525 clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
526 clock-names = "rtc", "rtc_src";
527};
528
529&sdhci_2 {
530 bus-width = <4>;
531 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
532 pinctrl-names = "default";
533 vmmc-supply = <&ldo21_reg>;
534 vqmmc-supply = <&ldo4_reg>;
535 cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>;
536 cd-inverted;
537 status = "okay";
538};
539
540&serial_0 {
541 status = "okay";
542};
543
544&serial_1 {
545 status = "okay";
546};
547
548&tmu {
549 vtmu-supply = <&ldo10_reg>;
550 status = "okay";
551};
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
4 * device tree source
5*/
6
7#include <dt-bindings/sound/samsung-i2s.h>
8#include <dt-bindings/input/input.h>
9#include <dt-bindings/clock/maxim,max77686.h>
10#include "exynos4412.dtsi"
11#include "exynos4412-ppmu-common.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include "exynos-mfc-reserved-memory.dtsi"
14
15/ {
16 chosen {
17 stdout-path = &serial_1;
18 };
19
20 firmware@204f000 {
21 compatible = "samsung,secure-firmware";
22 reg = <0x0204F000 0x1000>;
23 };
24
25 gpio_keys {
26 compatible = "gpio-keys";
27 pinctrl-names = "default";
28 pinctrl-0 = <&gpio_power_key>;
29
30 power_key {
31 gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_POWER>;
33 label = "power key";
34 debounce-interval = <10>;
35 wakeup-source;
36 };
37 };
38
39 sound: sound {
40 compatible = "hardkernel,odroid-xu4-audio";
41
42 cpu {
43 sound-dai = <&i2s0 0>;
44 };
45
46 codec {
47 sound-dai = <&hdmi>, <&max98090>;
48 };
49 };
50
51 emmc_pwrseq: pwrseq {
52 pinctrl-0 = <&emmc_rstn>;
53 pinctrl-names = "default";
54 compatible = "mmc-pwrseq-emmc";
55 reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
56 };
57
58 fixed-rate-clocks {
59 xxti {
60 compatible = "samsung,clock-xxti";
61 clock-frequency = <0>;
62 };
63
64 xusbxti {
65 compatible = "samsung,clock-xusbxti";
66 clock-frequency = <24000000>;
67 };
68 };
69
70 thermal-zones {
71 cpu_thermal: cpu-thermal {
72 cooling-maps {
73 cooling_map0: map0 {
74 /* Corresponds to 800MHz at freq_table */
75 cooling-device = <&cpu0 7 7>, <&cpu1 7 7>,
76 <&cpu2 7 7>, <&cpu3 7 7>;
77 };
78 cooling_map1: map1 {
79 /* Corresponds to 200MHz at freq_table */
80 cooling-device = <&cpu0 13 13>,
81 <&cpu1 13 13>,
82 <&cpu2 13 13>,
83 <&cpu3 13 13>;
84 };
85 };
86 };
87 };
88};
89
90&bus_dmc {
91 devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
92 vdd-supply = <&buck1_reg>;
93 status = "okay";
94};
95
96&bus_acp {
97 devfreq = <&bus_dmc>;
98 status = "okay";
99};
100
101&bus_c2c {
102 devfreq = <&bus_dmc>;
103 status = "okay";
104};
105
106&bus_leftbus {
107 devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
108 vdd-supply = <&buck3_reg>;
109 status = "okay";
110};
111
112&bus_rightbus {
113 devfreq = <&bus_leftbus>;
114 status = "okay";
115};
116
117&bus_display {
118 devfreq = <&bus_leftbus>;
119 status = "okay";
120};
121
122&bus_fsys {
123 devfreq = <&bus_leftbus>;
124 status = "okay";
125};
126
127&bus_peri {
128 devfreq = <&bus_leftbus>;
129 status = "okay";
130};
131
132&bus_mfc {
133 devfreq = <&bus_leftbus>;
134 status = "okay";
135};
136
137&camera {
138 status = "okay";
139 pinctrl-names = "default";
140 pinctrl-0 = <>;
141};
142
143&clock {
144 assigned-clocks = <&clock CLK_FOUT_EPLL>;
145 assigned-clock-rates = <45158401>;
146};
147
148&clock_audss {
149 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
150 <&clock_audss EXYNOS_MOUT_I2S>,
151 <&clock_audss EXYNOS_DOUT_SRP>,
152 <&clock_audss EXYNOS_DOUT_AUD_BUS>,
153 <&clock_audss EXYNOS_DOUT_I2S>;
154
155 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
156 <&clock_audss EXYNOS_MOUT_AUDSS>;
157
158 assigned-clock-rates = <0>, <0>,
159 <196608001>,
160 <(196608001 / 2)>,
161 <(196608001 / 8)>;
162};
163
164&cpu0 {
165 cpu0-supply = <&buck2_reg>;
166};
167
168&cpu0_opp_table {
169 opp-1000000000 {
170 opp-suspend;
171 };
172 opp-800000000 {
173 /delete-property/opp-suspend;
174 };
175};
176
177&pinctrl_1 {
178 gpio_power_key: power_key {
179 samsung,pins = "gpx1-3";
180 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
181 };
182
183 max77686_irq: max77686-irq {
184 samsung,pins = "gpx3-2";
185 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
186 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
187 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
188 };
189
190 hdmi_hpd: hdmi-hpd {
191 samsung,pins = "gpx3-7";
192 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
193 };
194
195 emmc_rstn: emmc-rstn {
196 samsung,pins = "gpk1-2";
197 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
198 };
199};
200
201&ehci {
202 status = "okay";
203};
204
205&exynos_usbphy {
206 status = "okay";
207};
208
209&fimc_0 {
210 status = "okay";
211 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
212 <&clock CLK_SCLK_FIMC0>;
213 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
214 assigned-clock-rates = <0>, <176000000>;
215};
216
217&fimc_1 {
218 status = "okay";
219 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
220 <&clock CLK_SCLK_FIMC1>;
221 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
222 assigned-clock-rates = <0>, <176000000>;
223};
224
225&fimc_2 {
226 status = "okay";
227 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
228 <&clock CLK_SCLK_FIMC2>;
229 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
230 assigned-clock-rates = <0>, <176000000>;
231};
232
233&fimc_3 {
234 status = "okay";
235 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
236 <&clock CLK_SCLK_FIMC3>;
237 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
238 assigned-clock-rates = <0>, <176000000>;
239};
240
241&gpu {
242 mali-supply = <&buck4_reg>;
243 status = "okay";
244};
245
246&hdmi {
247 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&hdmi_hpd>;
250 vdd-supply = <&ldo8_reg>;
251 vdd_osc-supply = <&ldo10_reg>;
252 vdd_pll-supply = <&ldo8_reg>;
253 ddc = <&i2c_2>;
254 status = "okay";
255};
256
257&hdmicec {
258 status = "okay";
259};
260
261&hsotg {
262 dr_mode = "peripheral";
263 status = "okay";
264 vusb_d-supply = <&ldo15_reg>;
265 vusb_a-supply = <&ldo12_reg>;
266};
267
268&i2c_0 {
269 samsung,i2c-sda-delay = <100>;
270 samsung,i2c-max-bus-freq = <400000>;
271 status = "okay";
272
273 usb3503: usb3503@8 {
274 compatible = "smsc,usb3503";
275 reg = <0x08>;
276
277 intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
278 connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
279 reset-gpios = <&gpx3 5 GPIO_ACTIVE_LOW>;
280 initial-mode = <1>;
281 };
282
283 max77686: pmic@9 {
284 compatible = "maxim,max77686";
285 interrupt-parent = <&gpx3>;
286 interrupts = <2 IRQ_TYPE_NONE>;
287 pinctrl-names = "default";
288 pinctrl-0 = <&max77686_irq>;
289 reg = <0x09>;
290 #clock-cells = <1>;
291
292 voltage-regulators {
293 ldo1_reg: LDO1 {
294 regulator-name = "VDD_ALIVE_1.0V";
295 regulator-min-microvolt = <1000000>;
296 regulator-max-microvolt = <1000000>;
297 regulator-always-on;
298 };
299
300 ldo2_reg: LDO2 {
301 regulator-name = "VDDQ_M1_2_1.8V";
302 regulator-min-microvolt = <1800000>;
303 regulator-max-microvolt = <1800000>;
304 regulator-always-on;
305 };
306
307 ldo3_reg: LDO3 {
308 regulator-name = "VDDQ_EXT_1.8V";
309 regulator-min-microvolt = <1800000>;
310 regulator-max-microvolt = <1800000>;
311 regulator-always-on;
312 };
313
314 ldo4_reg: LDO4 {
315 regulator-name = "VDDQ_MMC2_2.8V";
316 regulator-min-microvolt = <2800000>;
317 regulator-max-microvolt = <2800000>;
318 regulator-boot-on;
319 };
320
321 ldo5_reg: LDO5 {
322 regulator-name = "VDDQ_MMC1_3_1.8V";
323 regulator-min-microvolt = <1800000>;
324 regulator-max-microvolt = <1800000>;
325 regulator-always-on;
326 regulator-boot-on;
327 };
328
329 ldo6_reg: LDO6 {
330 regulator-name = "VDD10_MPLL_1.0V";
331 regulator-min-microvolt = <1000000>;
332 regulator-max-microvolt = <1000000>;
333 regulator-always-on;
334 };
335
336 ldo7_reg: LDO7 {
337 regulator-name = "VDD10_XPLL_1.0V";
338 regulator-min-microvolt = <1000000>;
339 regulator-max-microvolt = <1000000>;
340 regulator-always-on;
341 };
342
343 ldo8_reg: LDO8 {
344 regulator-name = "VDD10_HDMI_1.0V";
345 regulator-min-microvolt = <1000000>;
346 regulator-max-microvolt = <1000000>;
347 };
348
349 ldo10_reg: LDO10 {
350 regulator-name = "VDDQ_MIPIHSI_1.8V";
351 regulator-min-microvolt = <1800000>;
352 regulator-max-microvolt = <1800000>;
353 };
354
355 ldo11_reg: LDO11 {
356 regulator-name = "VDD18_ABB1_1.8V";
357 regulator-min-microvolt = <1800000>;
358 regulator-max-microvolt = <1800000>;
359 regulator-always-on;
360 };
361
362 ldo12_reg: LDO12 {
363 regulator-name = "VDD33_USB_3.3V";
364 regulator-min-microvolt = <3300000>;
365 regulator-max-microvolt = <3300000>;
366 regulator-always-on;
367 regulator-boot-on;
368 };
369
370 ldo13_reg: LDO13 {
371 regulator-name = "VDDQ_C2C_W_1.8V";
372 regulator-min-microvolt = <1800000>;
373 regulator-max-microvolt = <1800000>;
374 regulator-always-on;
375 regulator-boot-on;
376 };
377
378 ldo14_reg: LDO14 {
379 regulator-name = "VDD18_ABB0_2_1.8V";
380 regulator-min-microvolt = <1800000>;
381 regulator-max-microvolt = <1800000>;
382 regulator-always-on;
383 regulator-boot-on;
384 };
385
386 ldo15_reg: LDO15 {
387 regulator-name = "VDD10_HSIC_1.0V";
388 regulator-min-microvolt = <1000000>;
389 regulator-max-microvolt = <1000000>;
390 regulator-always-on;
391 regulator-boot-on;
392 };
393
394 ldo16_reg: LDO16 {
395 regulator-name = "VDD18_HSIC_1.8V";
396 regulator-min-microvolt = <1800000>;
397 regulator-max-microvolt = <1800000>;
398 regulator-always-on;
399 regulator-boot-on;
400 };
401
402 ldo20_reg: LDO20 {
403 regulator-name = "LDO20_1.8V";
404 regulator-min-microvolt = <1800000>;
405 regulator-max-microvolt = <1800000>;
406 };
407
408 ldo21_reg: LDO21 {
409 regulator-name = "TFLASH_2.8V";
410 regulator-min-microvolt = <2800000>;
411 regulator-max-microvolt = <2800000>;
412 regulator-boot-on;
413 };
414
415 ldo22_reg: LDO22 {
416 /*
417 * Only U3 uses it, so let it define the
418 * constraints
419 */
420 regulator-name = "LDO22";
421 regulator-boot-on;
422 };
423
424 ldo25_reg: LDO25 {
425 regulator-name = "VDDQ_LCD_1.8V";
426 regulator-min-microvolt = <1800000>;
427 regulator-max-microvolt = <1800000>;
428 regulator-always-on;
429 regulator-boot-on;
430 };
431
432 buck1_reg: BUCK1 {
433 regulator-name = "VDD_MIF";
434 regulator-min-microvolt = <900000>;
435 regulator-max-microvolt = <1100000>;
436 regulator-always-on;
437 regulator-boot-on;
438 };
439
440 buck2_reg: BUCK2 {
441 regulator-name = "VDD_ARM";
442 regulator-min-microvolt = <900000>;
443 regulator-max-microvolt = <1350000>;
444 regulator-always-on;
445 regulator-boot-on;
446 };
447
448 buck3_reg: BUCK3 {
449 regulator-name = "VDD_INT";
450 regulator-min-microvolt = <900000>;
451 regulator-max-microvolt = <1050000>;
452 regulator-always-on;
453 regulator-boot-on;
454 };
455
456 buck4_reg: BUCK4 {
457 regulator-name = "VDD_G3D";
458 regulator-min-microvolt = <900000>;
459 regulator-max-microvolt = <1100000>;
460 regulator-microvolt-offset = <50000>;
461 };
462
463 buck5_reg: BUCK5 {
464 regulator-name = "VDDQ_CKEM1_2_1.2V";
465 regulator-min-microvolt = <1200000>;
466 regulator-max-microvolt = <1200000>;
467 regulator-always-on;
468 regulator-boot-on;
469 };
470
471 buck6_reg: BUCK6 {
472 regulator-name = "BUCK6_1.35V";
473 regulator-min-microvolt = <1350000>;
474 regulator-max-microvolt = <1350000>;
475 regulator-always-on;
476 regulator-boot-on;
477 };
478
479 buck7_reg: BUCK7 {
480 regulator-name = "BUCK7_2.0V";
481 regulator-min-microvolt = <2000000>;
482 regulator-max-microvolt = <2000000>;
483 regulator-always-on;
484 };
485
486 buck8_reg: BUCK8 {
487 /*
488 * Constraints set by specific board: X,
489 * X2 and U3.
490 */
491 regulator-name = "BUCK8_2.8V";
492 };
493 };
494 };
495};
496
497&i2c_1 {
498 status = "okay";
499 max98090: max98090@10 {
500 compatible = "maxim,max98090";
501 reg = <0x10>;
502 interrupt-parent = <&gpx0>;
503 interrupts = <0 IRQ_TYPE_NONE>;
504 clocks = <&i2s0 CLK_I2S_CDCLK>;
505 clock-names = "mclk";
506 #sound-dai-cells = <0>;
507 };
508};
509
510&i2c_2 {
511 status = "okay";
512};
513
514&i2c_8 {
515 status = "okay";
516};
517
518&i2s0 {
519 pinctrl-0 = <&i2s0_bus>;
520 pinctrl-names = "default";
521 status = "okay";
522 assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
523 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
524};
525
526&mixer {
527 status = "okay";
528};
529
530&mshc_0 {
531 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
532 pinctrl-names = "default";
533 vmmc-supply = <&ldo20_reg>;
534 mmc-pwrseq = <&emmc_pwrseq>;
535 status = "okay";
536
537 broken-cd;
538 card-detect-delay = <200>;
539 samsung,dw-mshc-ciu-div = <3>;
540 samsung,dw-mshc-sdr-timing = <2 3>;
541 samsung,dw-mshc-ddr-timing = <1 2>;
542 bus-width = <8>;
543 cap-mmc-highspeed;
544};
545
546&rtc {
547 status = "okay";
548 clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
549 clock-names = "rtc", "rtc_src";
550};
551
552&sdhci_2 {
553 bus-width = <4>;
554 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
555 pinctrl-names = "default";
556 vmmc-supply = <&ldo21_reg>;
557 vqmmc-supply = <&ldo4_reg>;
558 cd-gpios = <&gpk2 2 GPIO_ACTIVE_LOW>;
559 status = "okay";
560};
561
562&serial_0 {
563 status = "okay";
564};
565
566&serial_1 {
567 status = "okay";
568};
569
570&tmu {
571 vtmu-supply = <&ldo10_reg>;
572 status = "okay";
573};