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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
4 * device tree source
5*/
6
7#include <dt-bindings/sound/samsung-i2s.h>
8#include <dt-bindings/input/input.h>
9#include <dt-bindings/clock/maxim,max77686.h>
10#include "exynos4412.dtsi"
11#include "exynos4412-ppmu-common.dtsi"
12#include <dt-bindings/gpio/gpio.h>
13#include "exynos-mfc-reserved-memory.dtsi"
14
15/ {
16 chosen {
17 stdout-path = &serial_1;
18 };
19
20 firmware@204f000 {
21 compatible = "samsung,secure-firmware";
22 reg = <0x0204F000 0x1000>;
23 };
24
25 gpio_keys {
26 compatible = "gpio-keys";
27 pinctrl-names = "default";
28 pinctrl-0 = <&gpio_power_key>;
29
30 power_key {
31 gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_POWER>;
33 label = "power key";
34 debounce-interval = <10>;
35 wakeup-source;
36 };
37 };
38
39 sound: sound {
40 compatible = "simple-audio-card";
41
42 simple-audio-card,format = "i2s";
43 simple-audio-card,bitclock-master = <&link0_codec>;
44 simple-audio-card,frame-master = <&link0_codec>;
45
46 simple-audio-card,cpu {
47 sound-dai = <&i2s0 0>;
48 system-clock-frequency = <19200000>;
49 };
50
51 link0_codec: simple-audio-card,codec {
52 sound-dai = <&max98090>;
53 clocks = <&i2s0 CLK_I2S_CDCLK>;
54 };
55 };
56
57 emmc_pwrseq: pwrseq {
58 pinctrl-0 = <&sd1_cd>;
59 pinctrl-names = "default";
60 compatible = "mmc-pwrseq-emmc";
61 reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
62 };
63
64 fixed-rate-clocks {
65 xxti {
66 compatible = "samsung,clock-xxti";
67 clock-frequency = <0>;
68 };
69
70 xusbxti {
71 compatible = "samsung,clock-xusbxti";
72 clock-frequency = <24000000>;
73 };
74 };
75
76 thermal-zones {
77 cpu_thermal: cpu-thermal {
78 cooling-maps {
79 cooling_map0: map0 {
80 /* Corresponds to 800MHz at freq_table */
81 cooling-device = <&cpu0 7 7>;
82 };
83 cooling_map1: map1 {
84 /* Corresponds to 200MHz at freq_table */
85 cooling-device = <&cpu0 13 13>;
86 };
87 };
88 };
89 };
90};
91
92&bus_dmc {
93 devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
94 vdd-supply = <&buck1_reg>;
95 status = "okay";
96};
97
98&bus_acp {
99 devfreq = <&bus_dmc>;
100 status = "okay";
101};
102
103&bus_c2c {
104 devfreq = <&bus_dmc>;
105 status = "okay";
106};
107
108&bus_leftbus {
109 devfreq-events = <&ppmu_leftbus_3>, <&ppmu_rightbus_3>;
110 vdd-supply = <&buck3_reg>;
111 status = "okay";
112};
113
114&bus_rightbus {
115 devfreq = <&bus_leftbus>;
116 status = "okay";
117};
118
119&bus_display {
120 devfreq = <&bus_leftbus>;
121 status = "okay";
122};
123
124&bus_fsys {
125 devfreq = <&bus_leftbus>;
126 status = "okay";
127};
128
129&bus_peri {
130 devfreq = <&bus_leftbus>;
131 status = "okay";
132};
133
134&bus_mfc {
135 devfreq = <&bus_leftbus>;
136 status = "okay";
137};
138
139&camera {
140 status = "okay";
141 pinctrl-names = "default";
142 pinctrl-0 = <>;
143};
144
145&clock_audss {
146 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
147 <&clock_audss EXYNOS_MOUT_I2S>,
148 <&clock_audss EXYNOS_DOUT_SRP>,
149 <&clock_audss EXYNOS_DOUT_AUD_BUS>;
150 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
151 <&clock_audss EXYNOS_MOUT_AUDSS>;
152 assigned-clock-rates = <0>, <0>, <192000000>, <19200000>;
153};
154
155&cpu0 {
156 cpu0-supply = <&buck2_reg>;
157};
158
159/* RSTN signal for eMMC */
160&sd1_cd {
161 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
162 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
163};
164
165&pinctrl_1 {
166 gpio_power_key: power_key {
167 samsung,pins = "gpx1-3";
168 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
169 };
170
171 max77686_irq: max77686-irq {
172 samsung,pins = "gpx3-2";
173 samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>;
174 samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
175 samsung,pin-drv = <EXYNOS4_PIN_DRV_LV1>;
176 };
177
178 hdmi_hpd: hdmi-hpd {
179 samsung,pins = "gpx3-7";
180 samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
181 };
182};
183
184&ehci {
185 status = "okay";
186};
187
188&exynos_usbphy {
189 status = "okay";
190};
191
192&fimc_0 {
193 status = "okay";
194 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
195 <&clock CLK_SCLK_FIMC0>;
196 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
197 assigned-clock-rates = <0>, <176000000>;
198};
199
200&fimc_1 {
201 status = "okay";
202 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
203 <&clock CLK_SCLK_FIMC1>;
204 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
205 assigned-clock-rates = <0>, <176000000>;
206};
207
208&fimc_2 {
209 status = "okay";
210 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
211 <&clock CLK_SCLK_FIMC2>;
212 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
213 assigned-clock-rates = <0>, <176000000>;
214};
215
216&fimc_3 {
217 status = "okay";
218 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
219 <&clock CLK_SCLK_FIMC3>;
220 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
221 assigned-clock-rates = <0>, <176000000>;
222};
223
224&hdmi {
225 hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
226 pinctrl-names = "default";
227 pinctrl-0 = <&hdmi_hpd>;
228 vdd-supply = <&ldo8_reg>;
229 vdd_osc-supply = <&ldo10_reg>;
230 vdd_pll-supply = <&ldo8_reg>;
231 ddc = <&i2c_2>;
232 status = "okay";
233};
234
235&hdmicec {
236 status = "okay";
237};
238
239&hsotg {
240 dr_mode = "peripheral";
241 status = "okay";
242 vusb_d-supply = <&ldo15_reg>;
243 vusb_a-supply = <&ldo12_reg>;
244};
245
246&i2c_0 {
247 samsung,i2c-sda-delay = <100>;
248 samsung,i2c-max-bus-freq = <400000>;
249 status = "okay";
250
251 usb3503: usb3503@8 {
252 compatible = "smsc,usb3503";
253 reg = <0x08>;
254
255 intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
256 connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
257 reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
258 initial-mode = <1>;
259 };
260
261 max77686: pmic@9 {
262 compatible = "maxim,max77686";
263 interrupt-parent = <&gpx3>;
264 interrupts = <2 IRQ_TYPE_NONE>;
265 pinctrl-names = "default";
266 pinctrl-0 = <&max77686_irq>;
267 reg = <0x09>;
268 #clock-cells = <1>;
269
270 voltage-regulators {
271 ldo1_reg: LDO1 {
272 regulator-name = "VDD_ALIVE_1.0V";
273 regulator-min-microvolt = <1000000>;
274 regulator-max-microvolt = <1000000>;
275 regulator-always-on;
276 };
277
278 ldo2_reg: LDO2 {
279 regulator-name = "VDDQ_M1_2_1.8V";
280 regulator-min-microvolt = <1800000>;
281 regulator-max-microvolt = <1800000>;
282 regulator-always-on;
283 };
284
285 ldo3_reg: LDO3 {
286 regulator-name = "VDDQ_EXT_1.8V";
287 regulator-min-microvolt = <1800000>;
288 regulator-max-microvolt = <1800000>;
289 regulator-always-on;
290 };
291
292 ldo4_reg: LDO4 {
293 regulator-name = "VDDQ_MMC2_2.8V";
294 regulator-min-microvolt = <2800000>;
295 regulator-max-microvolt = <2800000>;
296 regulator-boot-on;
297 };
298
299 ldo5_reg: LDO5 {
300 regulator-name = "VDDQ_MMC1_3_1.8V";
301 regulator-min-microvolt = <1800000>;
302 regulator-max-microvolt = <1800000>;
303 regulator-always-on;
304 regulator-boot-on;
305 };
306
307 ldo6_reg: LDO6 {
308 regulator-name = "VDD10_MPLL_1.0V";
309 regulator-min-microvolt = <1000000>;
310 regulator-max-microvolt = <1000000>;
311 regulator-always-on;
312 };
313
314 ldo7_reg: LDO7 {
315 regulator-name = "VDD10_XPLL_1.0V";
316 regulator-min-microvolt = <1000000>;
317 regulator-max-microvolt = <1000000>;
318 regulator-always-on;
319 };
320
321 ldo8_reg: LDO8 {
322 regulator-name = "VDD10_HDMI_1.0V";
323 regulator-min-microvolt = <1000000>;
324 regulator-max-microvolt = <1000000>;
325 };
326
327 ldo10_reg: LDO10 {
328 regulator-name = "VDDQ_MIPIHSI_1.8V";
329 regulator-min-microvolt = <1800000>;
330 regulator-max-microvolt = <1800000>;
331 };
332
333 ldo11_reg: LDO11 {
334 regulator-name = "VDD18_ABB1_1.8V";
335 regulator-min-microvolt = <1800000>;
336 regulator-max-microvolt = <1800000>;
337 regulator-always-on;
338 };
339
340 ldo12_reg: LDO12 {
341 regulator-name = "VDD33_USB_3.3V";
342 regulator-min-microvolt = <3300000>;
343 regulator-max-microvolt = <3300000>;
344 regulator-always-on;
345 regulator-boot-on;
346 };
347
348 ldo13_reg: LDO13 {
349 regulator-name = "VDDQ_C2C_W_1.8V";
350 regulator-min-microvolt = <1800000>;
351 regulator-max-microvolt = <1800000>;
352 regulator-always-on;
353 regulator-boot-on;
354 };
355
356 ldo14_reg: LDO14 {
357 regulator-name = "VDD18_ABB0_2_1.8V";
358 regulator-min-microvolt = <1800000>;
359 regulator-max-microvolt = <1800000>;
360 regulator-always-on;
361 regulator-boot-on;
362 };
363
364 ldo15_reg: LDO15 {
365 regulator-name = "VDD10_HSIC_1.0V";
366 regulator-min-microvolt = <1000000>;
367 regulator-max-microvolt = <1000000>;
368 regulator-always-on;
369 regulator-boot-on;
370 };
371
372 ldo16_reg: LDO16 {
373 regulator-name = "VDD18_HSIC_1.8V";
374 regulator-min-microvolt = <1800000>;
375 regulator-max-microvolt = <1800000>;
376 regulator-always-on;
377 regulator-boot-on;
378 };
379
380 ldo20_reg: LDO20 {
381 regulator-name = "LDO20_1.8V";
382 regulator-min-microvolt = <1800000>;
383 regulator-max-microvolt = <1800000>;
384 regulator-boot-on;
385 };
386
387 ldo21_reg: LDO21 {
388 regulator-name = "TFLASH_2.8V";
389 regulator-min-microvolt = <2800000>;
390 regulator-max-microvolt = <2800000>;
391 regulator-boot-on;
392 };
393
394 ldo22_reg: LDO22 {
395 /*
396 * Only U3 uses it, so let it define the
397 * constraints
398 */
399 regulator-name = "LDO22";
400 regulator-boot-on;
401 };
402
403 ldo25_reg: LDO25 {
404 regulator-name = "VDDQ_LCD_1.8V";
405 regulator-min-microvolt = <1800000>;
406 regulator-max-microvolt = <1800000>;
407 regulator-always-on;
408 regulator-boot-on;
409 };
410
411 buck1_reg: BUCK1 {
412 regulator-name = "vdd_mif";
413 regulator-min-microvolt = <900000>;
414 regulator-max-microvolt = <1100000>;
415 regulator-always-on;
416 regulator-boot-on;
417 };
418
419 buck2_reg: BUCK2 {
420 regulator-name = "vdd_arm";
421 regulator-min-microvolt = <900000>;
422 regulator-max-microvolt = <1350000>;
423 regulator-always-on;
424 regulator-boot-on;
425 };
426
427 buck3_reg: BUCK3 {
428 regulator-name = "vdd_int";
429 regulator-min-microvolt = <900000>;
430 regulator-max-microvolt = <1050000>;
431 regulator-always-on;
432 regulator-boot-on;
433 };
434
435 buck4_reg: BUCK4 {
436 regulator-name = "vdd_g3d";
437 regulator-min-microvolt = <900000>;
438 regulator-max-microvolt = <1100000>;
439 regulator-microvolt-offset = <50000>;
440 };
441
442 buck5_reg: BUCK5 {
443 regulator-name = "VDDQ_CKEM1_2_1.2V";
444 regulator-min-microvolt = <1200000>;
445 regulator-max-microvolt = <1200000>;
446 regulator-always-on;
447 regulator-boot-on;
448 };
449
450 buck6_reg: BUCK6 {
451 regulator-name = "BUCK6_1.35V";
452 regulator-min-microvolt = <1350000>;
453 regulator-max-microvolt = <1350000>;
454 regulator-always-on;
455 regulator-boot-on;
456 };
457
458 buck7_reg: BUCK7 {
459 regulator-name = "BUCK7_2.0V";
460 regulator-min-microvolt = <2000000>;
461 regulator-max-microvolt = <2000000>;
462 regulator-always-on;
463 };
464
465 buck8_reg: BUCK8 {
466 /*
467 * Constraints set by specific board: X,
468 * X2 and U3.
469 */
470 regulator-name = "BUCK8_2.8V";
471 };
472 };
473 };
474};
475
476&i2c_1 {
477 status = "okay";
478 max98090: max98090@10 {
479 compatible = "maxim,max98090";
480 reg = <0x10>;
481 interrupt-parent = <&gpx0>;
482 interrupts = <0 IRQ_TYPE_NONE>;
483 clocks = <&i2s0 CLK_I2S_CDCLK>;
484 clock-names = "mclk";
485 #sound-dai-cells = <0>;
486 };
487};
488
489&i2c_2 {
490 status = "okay";
491};
492
493&i2c_8 {
494 status = "okay";
495};
496
497&i2s0 {
498 pinctrl-0 = <&i2s0_bus>;
499 pinctrl-names = "default";
500 status = "okay";
501};
502
503&mixer {
504 status = "okay";
505};
506
507&mshc_0 {
508 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
509 pinctrl-names = "default";
510 vmmc-supply = <&ldo20_reg>;
511 mmc-pwrseq = <&emmc_pwrseq>;
512 status = "okay";
513
514 broken-cd;
515 card-detect-delay = <200>;
516 samsung,dw-mshc-ciu-div = <3>;
517 samsung,dw-mshc-sdr-timing = <2 3>;
518 samsung,dw-mshc-ddr-timing = <1 2>;
519 bus-width = <8>;
520 cap-mmc-highspeed;
521};
522
523&rtc {
524 status = "okay";
525 clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
526 clock-names = "rtc", "rtc_src";
527};
528
529&sdhci_2 {
530 bus-width = <4>;
531 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
532 pinctrl-names = "default";
533 vmmc-supply = <&ldo21_reg>;
534 vqmmc-supply = <&ldo4_reg>;
535 cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>;
536 cd-inverted;
537 status = "okay";
538};
539
540&serial_0 {
541 status = "okay";
542};
543
544&serial_1 {
545 status = "okay";
546};
547
548&tmu {
549 vtmu-supply = <&ldo10_reg>;
550 status = "okay";
551};
1/*
2 * Common definition for Hardkernel's Exynos4412 based ODROID-X/X2/U2/U3 boards
3 * device tree source
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8*/
9
10#include <dt-bindings/sound/samsung-i2s.h>
11#include <dt-bindings/input/input.h>
12#include <dt-bindings/clock/maxim,max77686.h>
13#include "exynos4412.dtsi"
14#include <dt-bindings/gpio/gpio.h>
15
16/ {
17 chosen {
18 stdout-path = &serial_1;
19 };
20
21 firmware@0204F000 {
22 compatible = "samsung,secure-firmware";
23 reg = <0x0204F000 0x1000>;
24 };
25
26 gpio_keys {
27 compatible = "gpio-keys";
28 pinctrl-names = "default";
29 pinctrl-0 = <&gpio_power_key>;
30
31 power_key {
32 interrupt-parent = <&gpx1>;
33 interrupts = <3 0>;
34 gpios = <&gpx1 3 GPIO_ACTIVE_LOW>;
35 linux,code = <KEY_POWER>;
36 label = "power key";
37 debounce-interval = <10>;
38 wakeup-source;
39 };
40 };
41
42 sound: sound {
43 compatible = "simple-audio-card";
44 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
45 <&clock_audss EXYNOS_MOUT_I2S>,
46 <&clock_audss EXYNOS_DOUT_SRP>,
47 <&clock_audss EXYNOS_DOUT_AUD_BUS>;
48 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
49 <&clock_audss EXYNOS_MOUT_AUDSS>;
50 assigned-clock-rates = <0>,
51 <0>,
52 <192000000>,
53 <19200000>;
54
55 simple-audio-card,format = "i2s";
56 simple-audio-card,bitclock-master = <&link0_codec>;
57 simple-audio-card,frame-master = <&link0_codec>;
58
59 simple-audio-card,cpu {
60 sound-dai = <&i2s0 0>;
61 system-clock-frequency = <19200000>;
62 };
63
64 link0_codec: simple-audio-card,codec {
65 sound-dai = <&max98090>;
66 clocks = <&i2s0 CLK_I2S_CDCLK>;
67 };
68 };
69
70 emmc_pwrseq: pwrseq {
71 pinctrl-0 = <&sd1_cd>;
72 pinctrl-names = "default";
73 compatible = "mmc-pwrseq-emmc";
74 reset-gpios = <&gpk1 2 GPIO_ACTIVE_LOW>;
75 };
76
77 camera {
78 status = "okay";
79 pinctrl-names = "default";
80 pinctrl-0 = <>;
81 };
82
83 fixed-rate-clocks {
84 xxti {
85 compatible = "samsung,clock-xxti";
86 clock-frequency = <0>;
87 };
88
89 xusbxti {
90 compatible = "samsung,clock-xusbxti";
91 clock-frequency = <24000000>;
92 };
93 };
94
95 thermal-zones {
96 cpu_thermal: cpu-thermal {
97 cooling-maps {
98 map0 {
99 /* Corresponds to 800MHz at freq_table */
100 cooling-device = <&cpu0 7 7>;
101 };
102 map1 {
103 /* Corresponds to 200MHz at freq_table */
104 cooling-device = <&cpu0 13 13>;
105 };
106 };
107 };
108 };
109};
110
111&cpu0 {
112 cpu0-supply = <&buck2_reg>;
113};
114
115/* RSTN signal for eMMC */
116&sd1_cd {
117 samsung,pin-pud = <0>;
118 samsung,pin-drv = <0>;
119};
120
121&pinctrl_1 {
122 gpio_power_key: power_key {
123 samsung,pins = "gpx1-3";
124 samsung,pin-pud = <0>;
125 };
126
127 max77686_irq: max77686-irq {
128 samsung,pins = "gpx3-2";
129 samsung,pin-function = <0>;
130 samsung,pin-pud = <0>;
131 samsung,pin-drv = <0>;
132 };
133
134 hdmi_hpd: hdmi-hpd {
135 samsung,pins = "gpx3-7";
136 samsung,pin-pud = <1>;
137 };
138};
139
140&ehci {
141 status = "okay";
142};
143
144&exynos_usbphy {
145 status = "okay";
146};
147
148&fimc_0 {
149 status = "okay";
150 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
151 <&clock CLK_SCLK_FIMC0>;
152 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
153 assigned-clock-rates = <0>, <176000000>;
154};
155
156&fimc_1 {
157 status = "okay";
158 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
159 <&clock CLK_SCLK_FIMC1>;
160 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
161 assigned-clock-rates = <0>, <176000000>;
162};
163
164&fimc_2 {
165 status = "okay";
166 assigned-clocks = <&clock CLK_MOUT_FIMC2>,
167 <&clock CLK_SCLK_FIMC2>;
168 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
169 assigned-clock-rates = <0>, <176000000>;
170};
171
172&fimc_3 {
173 status = "okay";
174 assigned-clocks = <&clock CLK_MOUT_FIMC3>,
175 <&clock CLK_SCLK_FIMC3>;
176 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
177 assigned-clock-rates = <0>, <176000000>;
178};
179
180&hdmi {
181 hpd-gpio = <&gpx3 7 GPIO_ACTIVE_HIGH>;
182 pinctrl-names = "default";
183 pinctrl-0 = <&hdmi_hpd>;
184 vdd-supply = <&ldo8_reg>;
185 vdd_osc-supply = <&ldo10_reg>;
186 vdd_pll-supply = <&ldo8_reg>;
187 ddc = <&i2c_2>;
188 status = "okay";
189};
190
191&hsotg {
192 dr_mode = "peripheral";
193 status = "okay";
194 vusb_d-supply = <&ldo15_reg>;
195 vusb_a-supply = <&ldo12_reg>;
196};
197
198&i2c_0 {
199 samsung,i2c-sda-delay = <100>;
200 samsung,i2c-max-bus-freq = <400000>;
201 status = "okay";
202
203 usb3503: usb3503@08 {
204 compatible = "smsc,usb3503";
205 reg = <0x08>;
206
207 intn-gpios = <&gpx3 0 GPIO_ACTIVE_HIGH>;
208 connect-gpios = <&gpx3 4 GPIO_ACTIVE_HIGH>;
209 reset-gpios = <&gpx3 5 GPIO_ACTIVE_HIGH>;
210 initial-mode = <1>;
211 };
212
213 max77686: pmic@09 {
214 compatible = "maxim,max77686";
215 interrupt-parent = <&gpx3>;
216 interrupts = <2 0>;
217 pinctrl-names = "default";
218 pinctrl-0 = <&max77686_irq>;
219 reg = <0x09>;
220 #clock-cells = <1>;
221
222 voltage-regulators {
223 ldo1_reg: LDO1 {
224 regulator-name = "VDD_ALIVE_1.0V";
225 regulator-min-microvolt = <1000000>;
226 regulator-max-microvolt = <1000000>;
227 regulator-always-on;
228 };
229
230 ldo2_reg: LDO2 {
231 regulator-name = "VDDQ_M1_2_1.8V";
232 regulator-min-microvolt = <1800000>;
233 regulator-max-microvolt = <1800000>;
234 regulator-always-on;
235 };
236
237 ldo3_reg: LDO3 {
238 regulator-name = "VDDQ_EXT_1.8V";
239 regulator-min-microvolt = <1800000>;
240 regulator-max-microvolt = <1800000>;
241 regulator-always-on;
242 };
243
244 ldo4_reg: LDO4 {
245 regulator-name = "VDDQ_MMC2_2.8V";
246 regulator-min-microvolt = <2800000>;
247 regulator-max-microvolt = <2800000>;
248 regulator-always-on;
249 regulator-boot-on;
250 };
251
252 ldo5_reg: LDO5 {
253 regulator-name = "VDDQ_MMC1_3_1.8V";
254 regulator-min-microvolt = <1800000>;
255 regulator-max-microvolt = <1800000>;
256 regulator-always-on;
257 regulator-boot-on;
258 };
259
260 ldo6_reg: LDO6 {
261 regulator-name = "VDD10_MPLL_1.0V";
262 regulator-min-microvolt = <1000000>;
263 regulator-max-microvolt = <1000000>;
264 regulator-always-on;
265 };
266
267 ldo7_reg: LDO7 {
268 regulator-name = "VDD10_XPLL_1.0V";
269 regulator-min-microvolt = <1000000>;
270 regulator-max-microvolt = <1000000>;
271 regulator-always-on;
272 };
273
274 ldo8_reg: LDO8 {
275 regulator-name = "VDD10_HDMI_1.0V";
276 regulator-min-microvolt = <1000000>;
277 regulator-max-microvolt = <1000000>;
278 };
279
280 ldo10_reg: LDO10 {
281 regulator-name = "VDDQ_MIPIHSI_1.8V";
282 regulator-min-microvolt = <1800000>;
283 regulator-max-microvolt = <1800000>;
284 };
285
286 ldo11_reg: LDO11 {
287 regulator-name = "VDD18_ABB1_1.8V";
288 regulator-min-microvolt = <1800000>;
289 regulator-max-microvolt = <1800000>;
290 regulator-always-on;
291 };
292
293 ldo12_reg: LDO12 {
294 regulator-name = "VDD33_USB_3.3V";
295 regulator-min-microvolt = <3300000>;
296 regulator-max-microvolt = <3300000>;
297 regulator-always-on;
298 regulator-boot-on;
299 };
300
301 ldo13_reg: LDO13 {
302 regulator-name = "VDDQ_C2C_W_1.8V";
303 regulator-min-microvolt = <1800000>;
304 regulator-max-microvolt = <1800000>;
305 regulator-always-on;
306 regulator-boot-on;
307 };
308
309 ldo14_reg: LDO14 {
310 regulator-name = "VDD18_ABB0_2_1.8V";
311 regulator-min-microvolt = <1800000>;
312 regulator-max-microvolt = <1800000>;
313 regulator-always-on;
314 regulator-boot-on;
315 };
316
317 ldo15_reg: LDO15 {
318 regulator-name = "VDD10_HSIC_1.0V";
319 regulator-min-microvolt = <1000000>;
320 regulator-max-microvolt = <1000000>;
321 regulator-always-on;
322 regulator-boot-on;
323 };
324
325 ldo16_reg: LDO16 {
326 regulator-name = "VDD18_HSIC_1.8V";
327 regulator-min-microvolt = <1800000>;
328 regulator-max-microvolt = <1800000>;
329 regulator-always-on;
330 regulator-boot-on;
331 };
332
333 ldo20_reg: LDO20 {
334 regulator-name = "LDO20_1.8V";
335 regulator-min-microvolt = <1800000>;
336 regulator-max-microvolt = <1800000>;
337 regulator-boot-on;
338 };
339
340 ldo21_reg: LDO21 {
341 regulator-name = "LDO21_3.3V";
342 regulator-min-microvolt = <3300000>;
343 regulator-max-microvolt = <3300000>;
344 regulator-always-on;
345 regulator-boot-on;
346 };
347
348 ldo25_reg: LDO25 {
349 regulator-name = "VDDQ_LCD_1.8V";
350 regulator-min-microvolt = <1800000>;
351 regulator-max-microvolt = <1800000>;
352 regulator-always-on;
353 regulator-boot-on;
354 };
355
356 buck1_reg: BUCK1 {
357 regulator-name = "vdd_mif";
358 regulator-min-microvolt = <1000000>;
359 regulator-max-microvolt = <1000000>;
360 regulator-always-on;
361 regulator-boot-on;
362 };
363
364 buck2_reg: BUCK2 {
365 regulator-name = "vdd_arm";
366 regulator-min-microvolt = <900000>;
367 regulator-max-microvolt = <1350000>;
368 regulator-always-on;
369 regulator-boot-on;
370 };
371
372 buck3_reg: BUCK3 {
373 regulator-name = "vdd_int";
374 regulator-min-microvolt = <1000000>;
375 regulator-max-microvolt = <1000000>;
376 regulator-always-on;
377 regulator-boot-on;
378 };
379
380 buck4_reg: BUCK4 {
381 regulator-name = "vdd_g3d";
382 regulator-min-microvolt = <900000>;
383 regulator-max-microvolt = <1100000>;
384 regulator-microvolt-offset = <50000>;
385 };
386
387 buck5_reg: BUCK5 {
388 regulator-name = "VDDQ_CKEM1_2_1.2V";
389 regulator-min-microvolt = <1200000>;
390 regulator-max-microvolt = <1200000>;
391 regulator-always-on;
392 regulator-boot-on;
393 };
394
395 buck6_reg: BUCK6 {
396 regulator-name = "BUCK6_1.35V";
397 regulator-min-microvolt = <1350000>;
398 regulator-max-microvolt = <1350000>;
399 regulator-always-on;
400 regulator-boot-on;
401 };
402
403 buck7_reg: BUCK7 {
404 regulator-name = "BUCK7_2.0V";
405 regulator-min-microvolt = <2000000>;
406 regulator-max-microvolt = <2000000>;
407 regulator-always-on;
408 };
409
410 buck8_reg: BUCK8 {
411 regulator-name = "BUCK8_2.8V";
412 regulator-min-microvolt = <2800000>;
413 regulator-max-microvolt = <2800000>;
414 };
415 };
416 };
417};
418
419&i2c_1 {
420 status = "okay";
421 max98090: max98090@10 {
422 compatible = "maxim,max98090";
423 reg = <0x10>;
424 interrupt-parent = <&gpx0>;
425 interrupts = <0 0>;
426 clocks = <&i2s0 CLK_I2S_CDCLK>;
427 clock-names = "mclk";
428 #sound-dai-cells = <0>;
429 };
430};
431
432&i2c_2 {
433 status = "okay";
434};
435
436&i2c_8 {
437 status = "okay";
438};
439
440&i2s0 {
441 pinctrl-0 = <&i2s0_bus>;
442 pinctrl-names = "default";
443 status = "okay";
444 clocks = <&clock_audss EXYNOS_I2S_BUS>,
445 <&clock_audss EXYNOS_DOUT_AUD_BUS>,
446 <&clock_audss EXYNOS_SCLK_I2S>;
447 clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
448};
449
450&mixer {
451 status = "okay";
452};
453
454&mshc_0 {
455 pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
456 pinctrl-names = "default";
457 vmmc-supply = <&ldo20_reg &buck8_reg>;
458 mmc-pwrseq = <&emmc_pwrseq>;
459 status = "okay";
460
461 num-slots = <1>;
462 broken-cd;
463 card-detect-delay = <200>;
464 samsung,dw-mshc-ciu-div = <3>;
465 samsung,dw-mshc-sdr-timing = <2 3>;
466 samsung,dw-mshc-ddr-timing = <1 2>;
467 bus-width = <8>;
468 cap-mmc-highspeed;
469};
470
471&rtc {
472 status = "okay";
473 clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;
474 clock-names = "rtc", "rtc_src";
475};
476
477&sdhci_2 {
478 bus-width = <4>;
479 pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
480 pinctrl-names = "default";
481 vmmc-supply = <&ldo4_reg &ldo21_reg>;
482 cd-gpios = <&gpk2 2 GPIO_ACTIVE_HIGH>;
483 cd-inverted;
484 status = "okay";
485};
486
487&serial_0 {
488 status = "okay";
489};
490
491&serial_1 {
492 status = "okay";
493};
494
495&tmu {
496 vtmu-supply = <&ldo10_reg>;
497 status = "okay";
498};
499
500&watchdog {
501 status = "okay";
502};