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1/*
2 * linux/arch/arm/kernel/smp.c
3 *
4 * Copyright (C) 2002 ARM Limited, All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10#include <linux/module.h>
11#include <linux/delay.h>
12#include <linux/init.h>
13#include <linux/spinlock.h>
14#include <linux/sched/mm.h>
15#include <linux/sched/hotplug.h>
16#include <linux/sched/task_stack.h>
17#include <linux/interrupt.h>
18#include <linux/cache.h>
19#include <linux/profile.h>
20#include <linux/errno.h>
21#include <linux/mm.h>
22#include <linux/err.h>
23#include <linux/cpu.h>
24#include <linux/seq_file.h>
25#include <linux/irq.h>
26#include <linux/nmi.h>
27#include <linux/percpu.h>
28#include <linux/clockchips.h>
29#include <linux/completion.h>
30#include <linux/cpufreq.h>
31#include <linux/irq_work.h>
32
33#include <linux/atomic.h>
34#include <asm/smp.h>
35#include <asm/cacheflush.h>
36#include <asm/cpu.h>
37#include <asm/cputype.h>
38#include <asm/exception.h>
39#include <asm/idmap.h>
40#include <asm/topology.h>
41#include <asm/mmu_context.h>
42#include <asm/pgtable.h>
43#include <asm/pgalloc.h>
44#include <asm/processor.h>
45#include <asm/sections.h>
46#include <asm/tlbflush.h>
47#include <asm/ptrace.h>
48#include <asm/smp_plat.h>
49#include <asm/virt.h>
50#include <asm/mach/arch.h>
51#include <asm/mpu.h>
52
53#define CREATE_TRACE_POINTS
54#include <trace/events/ipi.h>
55
56/*
57 * as from 2.5, kernels no longer have an init_tasks structure
58 * so we need some other way of telling a new secondary core
59 * where to place its SVC stack
60 */
61struct secondary_data secondary_data;
62
63/*
64 * control for which core is the next to come out of the secondary
65 * boot "holding pen"
66 */
67volatile int pen_release = -1;
68
69enum ipi_msg_type {
70 IPI_WAKEUP,
71 IPI_TIMER,
72 IPI_RESCHEDULE,
73 IPI_CALL_FUNC,
74 IPI_CPU_STOP,
75 IPI_IRQ_WORK,
76 IPI_COMPLETION,
77 IPI_CPU_BACKTRACE,
78 /*
79 * SGI8-15 can be reserved by secure firmware, and thus may
80 * not be usable by the kernel. Please keep the above limited
81 * to at most 8 entries.
82 */
83};
84
85static DECLARE_COMPLETION(cpu_running);
86
87static struct smp_operations smp_ops __ro_after_init;
88
89void __init smp_set_ops(const struct smp_operations *ops)
90{
91 if (ops)
92 smp_ops = *ops;
93};
94
95static unsigned long get_arch_pgd(pgd_t *pgd)
96{
97#ifdef CONFIG_ARM_LPAE
98 return __phys_to_pfn(virt_to_phys(pgd));
99#else
100 return virt_to_phys(pgd);
101#endif
102}
103
104int __cpu_up(unsigned int cpu, struct task_struct *idle)
105{
106 int ret;
107
108 if (!smp_ops.smp_boot_secondary)
109 return -ENOSYS;
110
111 /*
112 * We need to tell the secondary core where to find
113 * its stack and the page tables.
114 */
115 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
116#ifdef CONFIG_ARM_MPU
117 secondary_data.mpu_rgn_info = &mpu_rgn_info;
118#endif
119
120#ifdef CONFIG_MMU
121 secondary_data.pgdir = virt_to_phys(idmap_pgd);
122 secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
123#endif
124 sync_cache_w(&secondary_data);
125
126 /*
127 * Now bring the CPU into our world.
128 */
129 ret = smp_ops.smp_boot_secondary(cpu, idle);
130 if (ret == 0) {
131 /*
132 * CPU was successfully started, wait for it
133 * to come online or time out.
134 */
135 wait_for_completion_timeout(&cpu_running,
136 msecs_to_jiffies(1000));
137
138 if (!cpu_online(cpu)) {
139 pr_crit("CPU%u: failed to come online\n", cpu);
140 ret = -EIO;
141 }
142 } else {
143 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
144 }
145
146
147 memset(&secondary_data, 0, sizeof(secondary_data));
148 return ret;
149}
150
151/* platform specific SMP operations */
152void __init smp_init_cpus(void)
153{
154 if (smp_ops.smp_init_cpus)
155 smp_ops.smp_init_cpus();
156}
157
158int platform_can_secondary_boot(void)
159{
160 return !!smp_ops.smp_boot_secondary;
161}
162
163int platform_can_cpu_hotplug(void)
164{
165#ifdef CONFIG_HOTPLUG_CPU
166 if (smp_ops.cpu_kill)
167 return 1;
168#endif
169
170 return 0;
171}
172
173#ifdef CONFIG_HOTPLUG_CPU
174static int platform_cpu_kill(unsigned int cpu)
175{
176 if (smp_ops.cpu_kill)
177 return smp_ops.cpu_kill(cpu);
178 return 1;
179}
180
181static int platform_cpu_disable(unsigned int cpu)
182{
183 if (smp_ops.cpu_disable)
184 return smp_ops.cpu_disable(cpu);
185
186 return 0;
187}
188
189int platform_can_hotplug_cpu(unsigned int cpu)
190{
191 /* cpu_die must be specified to support hotplug */
192 if (!smp_ops.cpu_die)
193 return 0;
194
195 if (smp_ops.cpu_can_disable)
196 return smp_ops.cpu_can_disable(cpu);
197
198 /*
199 * By default, allow disabling all CPUs except the first one,
200 * since this is special on a lot of platforms, e.g. because
201 * of clock tick interrupts.
202 */
203 return cpu != 0;
204}
205
206/*
207 * __cpu_disable runs on the processor to be shutdown.
208 */
209int __cpu_disable(void)
210{
211 unsigned int cpu = smp_processor_id();
212 int ret;
213
214 ret = platform_cpu_disable(cpu);
215 if (ret)
216 return ret;
217
218 /*
219 * Take this CPU offline. Once we clear this, we can't return,
220 * and we must not schedule until we're ready to give up the cpu.
221 */
222 set_cpu_online(cpu, false);
223
224 /*
225 * OK - migrate IRQs away from this CPU
226 */
227 migrate_irqs();
228
229 /*
230 * Flush user cache and TLB mappings, and then remove this CPU
231 * from the vm mask set of all processes.
232 *
233 * Caches are flushed to the Level of Unification Inner Shareable
234 * to write-back dirty lines to unified caches shared by all CPUs.
235 */
236 flush_cache_louis();
237 local_flush_tlb_all();
238
239 clear_tasks_mm_cpumask(cpu);
240
241 return 0;
242}
243
244static DECLARE_COMPLETION(cpu_died);
245
246/*
247 * called on the thread which is asking for a CPU to be shutdown -
248 * waits until shutdown has completed, or it is timed out.
249 */
250void __cpu_die(unsigned int cpu)
251{
252 if (!wait_for_completion_timeout(&cpu_died, msecs_to_jiffies(5000))) {
253 pr_err("CPU%u: cpu didn't die\n", cpu);
254 return;
255 }
256 pr_debug("CPU%u: shutdown\n", cpu);
257
258 /*
259 * platform_cpu_kill() is generally expected to do the powering off
260 * and/or cutting of clocks to the dying CPU. Optionally, this may
261 * be done by the CPU which is dying in preference to supporting
262 * this call, but that means there is _no_ synchronisation between
263 * the requesting CPU and the dying CPU actually losing power.
264 */
265 if (!platform_cpu_kill(cpu))
266 pr_err("CPU%u: unable to kill\n", cpu);
267}
268
269/*
270 * Called from the idle thread for the CPU which has been shutdown.
271 *
272 * Note that we disable IRQs here, but do not re-enable them
273 * before returning to the caller. This is also the behaviour
274 * of the other hotplug-cpu capable cores, so presumably coming
275 * out of idle fixes this.
276 */
277void arch_cpu_idle_dead(void)
278{
279 unsigned int cpu = smp_processor_id();
280
281 idle_task_exit();
282
283 local_irq_disable();
284
285 /*
286 * Flush the data out of the L1 cache for this CPU. This must be
287 * before the completion to ensure that data is safely written out
288 * before platform_cpu_kill() gets called - which may disable
289 * *this* CPU and power down its cache.
290 */
291 flush_cache_louis();
292
293 /*
294 * Tell __cpu_die() that this CPU is now safe to dispose of. Once
295 * this returns, power and/or clocks can be removed at any point
296 * from this CPU and its cache by platform_cpu_kill().
297 */
298 complete(&cpu_died);
299
300 /*
301 * Ensure that the cache lines associated with that completion are
302 * written out. This covers the case where _this_ CPU is doing the
303 * powering down, to ensure that the completion is visible to the
304 * CPU waiting for this one.
305 */
306 flush_cache_louis();
307
308 /*
309 * The actual CPU shutdown procedure is at least platform (if not
310 * CPU) specific. This may remove power, or it may simply spin.
311 *
312 * Platforms are generally expected *NOT* to return from this call,
313 * although there are some which do because they have no way to
314 * power down the CPU. These platforms are the _only_ reason we
315 * have a return path which uses the fragment of assembly below.
316 *
317 * The return path should not be used for platforms which can
318 * power off the CPU.
319 */
320 if (smp_ops.cpu_die)
321 smp_ops.cpu_die(cpu);
322
323 pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
324 cpu);
325
326 /*
327 * Do not return to the idle loop - jump back to the secondary
328 * cpu initialisation. There's some initialisation which needs
329 * to be repeated to undo the effects of taking the CPU offline.
330 */
331 __asm__("mov sp, %0\n"
332 " mov fp, #0\n"
333 " b secondary_start_kernel"
334 :
335 : "r" (task_stack_page(current) + THREAD_SIZE - 8));
336}
337#endif /* CONFIG_HOTPLUG_CPU */
338
339/*
340 * Called by both boot and secondaries to move global data into
341 * per-processor storage.
342 */
343static void smp_store_cpu_info(unsigned int cpuid)
344{
345 struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
346
347 cpu_info->loops_per_jiffy = loops_per_jiffy;
348 cpu_info->cpuid = read_cpuid_id();
349
350 store_cpu_topology(cpuid);
351}
352
353/*
354 * This is the secondary CPU boot entry. We're using this CPUs
355 * idle thread stack, but a set of temporary page tables.
356 */
357asmlinkage void secondary_start_kernel(void)
358{
359 struct mm_struct *mm = &init_mm;
360 unsigned int cpu;
361
362 /*
363 * The identity mapping is uncached (strongly ordered), so
364 * switch away from it before attempting any exclusive accesses.
365 */
366 cpu_switch_mm(mm->pgd, mm);
367 local_flush_bp_all();
368 enter_lazy_tlb(mm, current);
369 local_flush_tlb_all();
370
371 /*
372 * All kernel threads share the same mm context; grab a
373 * reference and switch to it.
374 */
375 cpu = smp_processor_id();
376 mmgrab(mm);
377 current->active_mm = mm;
378 cpumask_set_cpu(cpu, mm_cpumask(mm));
379
380 cpu_init();
381
382#ifndef CONFIG_MMU
383 setup_vectors_base();
384#endif
385 pr_debug("CPU%u: Booted secondary processor\n", cpu);
386
387 preempt_disable();
388 trace_hardirqs_off();
389
390 /*
391 * Give the platform a chance to do its own initialisation.
392 */
393 if (smp_ops.smp_secondary_init)
394 smp_ops.smp_secondary_init(cpu);
395
396 notify_cpu_starting(cpu);
397
398 calibrate_delay();
399
400 smp_store_cpu_info(cpu);
401
402 /*
403 * OK, now it's safe to let the boot CPU continue. Wait for
404 * the CPU migration code to notice that the CPU is online
405 * before we continue - which happens after __cpu_up returns.
406 */
407 set_cpu_online(cpu, true);
408 complete(&cpu_running);
409
410 local_irq_enable();
411 local_fiq_enable();
412 local_abt_enable();
413
414 /*
415 * OK, it's off to the idle thread for us
416 */
417 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
418}
419
420void __init smp_cpus_done(unsigned int max_cpus)
421{
422 int cpu;
423 unsigned long bogosum = 0;
424
425 for_each_online_cpu(cpu)
426 bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
427
428 printk(KERN_INFO "SMP: Total of %d processors activated "
429 "(%lu.%02lu BogoMIPS).\n",
430 num_online_cpus(),
431 bogosum / (500000/HZ),
432 (bogosum / (5000/HZ)) % 100);
433
434 hyp_mode_check();
435}
436
437void __init smp_prepare_boot_cpu(void)
438{
439 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
440}
441
442void __init smp_prepare_cpus(unsigned int max_cpus)
443{
444 unsigned int ncores = num_possible_cpus();
445
446 init_cpu_topology();
447
448 smp_store_cpu_info(smp_processor_id());
449
450 /*
451 * are we trying to boot more cores than exist?
452 */
453 if (max_cpus > ncores)
454 max_cpus = ncores;
455 if (ncores > 1 && max_cpus) {
456 /*
457 * Initialise the present map, which describes the set of CPUs
458 * actually populated at the present time. A platform should
459 * re-initialize the map in the platforms smp_prepare_cpus()
460 * if present != possible (e.g. physical hotplug).
461 */
462 init_cpu_present(cpu_possible_mask);
463
464 /*
465 * Initialise the SCU if there are more than one CPU
466 * and let them know where to start.
467 */
468 if (smp_ops.smp_prepare_cpus)
469 smp_ops.smp_prepare_cpus(max_cpus);
470 }
471}
472
473static void (*__smp_cross_call)(const struct cpumask *, unsigned int);
474
475void __init set_smp_cross_call(void (*fn)(const struct cpumask *, unsigned int))
476{
477 if (!__smp_cross_call)
478 __smp_cross_call = fn;
479}
480
481static const char *ipi_types[NR_IPI] __tracepoint_string = {
482#define S(x,s) [x] = s
483 S(IPI_WAKEUP, "CPU wakeup interrupts"),
484 S(IPI_TIMER, "Timer broadcast interrupts"),
485 S(IPI_RESCHEDULE, "Rescheduling interrupts"),
486 S(IPI_CALL_FUNC, "Function call interrupts"),
487 S(IPI_CPU_STOP, "CPU stop interrupts"),
488 S(IPI_IRQ_WORK, "IRQ work interrupts"),
489 S(IPI_COMPLETION, "completion interrupts"),
490};
491
492static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
493{
494 trace_ipi_raise_rcuidle(target, ipi_types[ipinr]);
495 __smp_cross_call(target, ipinr);
496}
497
498void show_ipi_list(struct seq_file *p, int prec)
499{
500 unsigned int cpu, i;
501
502 for (i = 0; i < NR_IPI; i++) {
503 seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
504
505 for_each_online_cpu(cpu)
506 seq_printf(p, "%10u ",
507 __get_irq_stat(cpu, ipi_irqs[i]));
508
509 seq_printf(p, " %s\n", ipi_types[i]);
510 }
511}
512
513u64 smp_irq_stat_cpu(unsigned int cpu)
514{
515 u64 sum = 0;
516 int i;
517
518 for (i = 0; i < NR_IPI; i++)
519 sum += __get_irq_stat(cpu, ipi_irqs[i]);
520
521 return sum;
522}
523
524void arch_send_call_function_ipi_mask(const struct cpumask *mask)
525{
526 smp_cross_call(mask, IPI_CALL_FUNC);
527}
528
529void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
530{
531 smp_cross_call(mask, IPI_WAKEUP);
532}
533
534void arch_send_call_function_single_ipi(int cpu)
535{
536 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
537}
538
539#ifdef CONFIG_IRQ_WORK
540void arch_irq_work_raise(void)
541{
542 if (arch_irq_work_has_interrupt())
543 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
544}
545#endif
546
547#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
548void tick_broadcast(const struct cpumask *mask)
549{
550 smp_cross_call(mask, IPI_TIMER);
551}
552#endif
553
554static DEFINE_RAW_SPINLOCK(stop_lock);
555
556/*
557 * ipi_cpu_stop - handle IPI from smp_send_stop()
558 */
559static void ipi_cpu_stop(unsigned int cpu)
560{
561 if (system_state <= SYSTEM_RUNNING) {
562 raw_spin_lock(&stop_lock);
563 pr_crit("CPU%u: stopping\n", cpu);
564 dump_stack();
565 raw_spin_unlock(&stop_lock);
566 }
567
568 set_cpu_online(cpu, false);
569
570 local_fiq_disable();
571 local_irq_disable();
572
573 while (1)
574 cpu_relax();
575}
576
577static DEFINE_PER_CPU(struct completion *, cpu_completion);
578
579int register_ipi_completion(struct completion *completion, int cpu)
580{
581 per_cpu(cpu_completion, cpu) = completion;
582 return IPI_COMPLETION;
583}
584
585static void ipi_complete(unsigned int cpu)
586{
587 complete(per_cpu(cpu_completion, cpu));
588}
589
590/*
591 * Main handler for inter-processor interrupts
592 */
593asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
594{
595 handle_IPI(ipinr, regs);
596}
597
598void handle_IPI(int ipinr, struct pt_regs *regs)
599{
600 unsigned int cpu = smp_processor_id();
601 struct pt_regs *old_regs = set_irq_regs(regs);
602
603 if ((unsigned)ipinr < NR_IPI) {
604 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
605 __inc_irq_stat(cpu, ipi_irqs[ipinr]);
606 }
607
608 switch (ipinr) {
609 case IPI_WAKEUP:
610 break;
611
612#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
613 case IPI_TIMER:
614 irq_enter();
615 tick_receive_broadcast();
616 irq_exit();
617 break;
618#endif
619
620 case IPI_RESCHEDULE:
621 scheduler_ipi();
622 break;
623
624 case IPI_CALL_FUNC:
625 irq_enter();
626 generic_smp_call_function_interrupt();
627 irq_exit();
628 break;
629
630 case IPI_CPU_STOP:
631 irq_enter();
632 ipi_cpu_stop(cpu);
633 irq_exit();
634 break;
635
636#ifdef CONFIG_IRQ_WORK
637 case IPI_IRQ_WORK:
638 irq_enter();
639 irq_work_run();
640 irq_exit();
641 break;
642#endif
643
644 case IPI_COMPLETION:
645 irq_enter();
646 ipi_complete(cpu);
647 irq_exit();
648 break;
649
650 case IPI_CPU_BACKTRACE:
651 printk_nmi_enter();
652 irq_enter();
653 nmi_cpu_backtrace(regs);
654 irq_exit();
655 printk_nmi_exit();
656 break;
657
658 default:
659 pr_crit("CPU%u: Unknown IPI message 0x%x\n",
660 cpu, ipinr);
661 break;
662 }
663
664 if ((unsigned)ipinr < NR_IPI)
665 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
666 set_irq_regs(old_regs);
667}
668
669void smp_send_reschedule(int cpu)
670{
671 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
672}
673
674void smp_send_stop(void)
675{
676 unsigned long timeout;
677 struct cpumask mask;
678
679 cpumask_copy(&mask, cpu_online_mask);
680 cpumask_clear_cpu(smp_processor_id(), &mask);
681 if (!cpumask_empty(&mask))
682 smp_cross_call(&mask, IPI_CPU_STOP);
683
684 /* Wait up to one second for other CPUs to stop */
685 timeout = USEC_PER_SEC;
686 while (num_online_cpus() > 1 && timeout--)
687 udelay(1);
688
689 if (num_online_cpus() > 1)
690 pr_warn("SMP: failed to stop secondary CPUs\n");
691}
692
693/*
694 * not supported here
695 */
696int setup_profiling_timer(unsigned int multiplier)
697{
698 return -EINVAL;
699}
700
701#ifdef CONFIG_CPU_FREQ
702
703static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
704static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
705static unsigned long global_l_p_j_ref;
706static unsigned long global_l_p_j_ref_freq;
707
708static int cpufreq_callback(struct notifier_block *nb,
709 unsigned long val, void *data)
710{
711 struct cpufreq_freqs *freq = data;
712 int cpu = freq->cpu;
713
714 if (freq->flags & CPUFREQ_CONST_LOOPS)
715 return NOTIFY_OK;
716
717 if (!per_cpu(l_p_j_ref, cpu)) {
718 per_cpu(l_p_j_ref, cpu) =
719 per_cpu(cpu_data, cpu).loops_per_jiffy;
720 per_cpu(l_p_j_ref_freq, cpu) = freq->old;
721 if (!global_l_p_j_ref) {
722 global_l_p_j_ref = loops_per_jiffy;
723 global_l_p_j_ref_freq = freq->old;
724 }
725 }
726
727 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
728 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
729 loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
730 global_l_p_j_ref_freq,
731 freq->new);
732 per_cpu(cpu_data, cpu).loops_per_jiffy =
733 cpufreq_scale(per_cpu(l_p_j_ref, cpu),
734 per_cpu(l_p_j_ref_freq, cpu),
735 freq->new);
736 }
737 return NOTIFY_OK;
738}
739
740static struct notifier_block cpufreq_notifier = {
741 .notifier_call = cpufreq_callback,
742};
743
744static int __init register_cpufreq_notifier(void)
745{
746 return cpufreq_register_notifier(&cpufreq_notifier,
747 CPUFREQ_TRANSITION_NOTIFIER);
748}
749core_initcall(register_cpufreq_notifier);
750
751#endif
752
753static void raise_nmi(cpumask_t *mask)
754{
755 smp_cross_call(mask, IPI_CPU_BACKTRACE);
756}
757
758void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
759{
760 nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_nmi);
761}
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * linux/arch/arm/kernel/smp.c
4 *
5 * Copyright (C) 2002 ARM Limited, All Rights Reserved.
6 */
7#include <linux/module.h>
8#include <linux/delay.h>
9#include <linux/init.h>
10#include <linux/spinlock.h>
11#include <linux/sched/mm.h>
12#include <linux/sched/hotplug.h>
13#include <linux/sched/task_stack.h>
14#include <linux/interrupt.h>
15#include <linux/cache.h>
16#include <linux/profile.h>
17#include <linux/errno.h>
18#include <linux/mm.h>
19#include <linux/err.h>
20#include <linux/cpu.h>
21#include <linux/seq_file.h>
22#include <linux/irq.h>
23#include <linux/nmi.h>
24#include <linux/percpu.h>
25#include <linux/clockchips.h>
26#include <linux/completion.h>
27#include <linux/cpufreq.h>
28#include <linux/irq_work.h>
29#include <linux/kernel_stat.h>
30
31#include <linux/atomic.h>
32#include <asm/bugs.h>
33#include <asm/smp.h>
34#include <asm/cacheflush.h>
35#include <asm/cpu.h>
36#include <asm/cputype.h>
37#include <asm/exception.h>
38#include <asm/idmap.h>
39#include <asm/topology.h>
40#include <asm/mmu_context.h>
41#include <asm/procinfo.h>
42#include <asm/processor.h>
43#include <asm/sections.h>
44#include <asm/tlbflush.h>
45#include <asm/ptrace.h>
46#include <asm/smp_plat.h>
47#include <asm/virt.h>
48#include <asm/mach/arch.h>
49#include <asm/mpu.h>
50
51#define CREATE_TRACE_POINTS
52#include <trace/events/ipi.h>
53
54/*
55 * as from 2.5, kernels no longer have an init_tasks structure
56 * so we need some other way of telling a new secondary core
57 * where to place its SVC stack
58 */
59struct secondary_data secondary_data;
60
61enum ipi_msg_type {
62 IPI_WAKEUP,
63 IPI_TIMER,
64 IPI_RESCHEDULE,
65 IPI_CALL_FUNC,
66 IPI_CPU_STOP,
67 IPI_IRQ_WORK,
68 IPI_COMPLETION,
69 NR_IPI,
70 /*
71 * CPU_BACKTRACE is special and not included in NR_IPI
72 * or tracable with trace_ipi_*
73 */
74 IPI_CPU_BACKTRACE = NR_IPI,
75 /*
76 * SGI8-15 can be reserved by secure firmware, and thus may
77 * not be usable by the kernel. Please keep the above limited
78 * to at most 8 entries.
79 */
80 MAX_IPI
81};
82
83static int ipi_irq_base __read_mostly;
84static int nr_ipi __read_mostly = NR_IPI;
85static struct irq_desc *ipi_desc[MAX_IPI] __read_mostly;
86
87static void ipi_setup(int cpu);
88
89static DECLARE_COMPLETION(cpu_running);
90
91static struct smp_operations smp_ops __ro_after_init;
92
93void __init smp_set_ops(const struct smp_operations *ops)
94{
95 if (ops)
96 smp_ops = *ops;
97};
98
99static unsigned long get_arch_pgd(pgd_t *pgd)
100{
101#ifdef CONFIG_ARM_LPAE
102 return __phys_to_pfn(virt_to_phys(pgd));
103#else
104 return virt_to_phys(pgd);
105#endif
106}
107
108#if defined(CONFIG_BIG_LITTLE) && defined(CONFIG_HARDEN_BRANCH_PREDICTOR)
109static int secondary_biglittle_prepare(unsigned int cpu)
110{
111 if (!cpu_vtable[cpu])
112 cpu_vtable[cpu] = kzalloc(sizeof(*cpu_vtable[cpu]), GFP_KERNEL);
113
114 return cpu_vtable[cpu] ? 0 : -ENOMEM;
115}
116
117static void secondary_biglittle_init(void)
118{
119 init_proc_vtable(lookup_processor(read_cpuid_id())->proc);
120}
121#else
122static int secondary_biglittle_prepare(unsigned int cpu)
123{
124 return 0;
125}
126
127static void secondary_biglittle_init(void)
128{
129}
130#endif
131
132int __cpu_up(unsigned int cpu, struct task_struct *idle)
133{
134 int ret;
135
136 if (!smp_ops.smp_boot_secondary)
137 return -ENOSYS;
138
139 ret = secondary_biglittle_prepare(cpu);
140 if (ret)
141 return ret;
142
143 /*
144 * We need to tell the secondary core where to find
145 * its stack and the page tables.
146 */
147 secondary_data.stack = task_stack_page(idle) + THREAD_START_SP;
148#ifdef CONFIG_ARM_MPU
149 secondary_data.mpu_rgn_info = &mpu_rgn_info;
150#endif
151
152#ifdef CONFIG_MMU
153 secondary_data.pgdir = virt_to_phys(idmap_pgd);
154 secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir);
155#endif
156 sync_cache_w(&secondary_data);
157
158 /*
159 * Now bring the CPU into our world.
160 */
161 ret = smp_ops.smp_boot_secondary(cpu, idle);
162 if (ret == 0) {
163 /*
164 * CPU was successfully started, wait for it
165 * to come online or time out.
166 */
167 wait_for_completion_timeout(&cpu_running,
168 msecs_to_jiffies(1000));
169
170 if (!cpu_online(cpu)) {
171 pr_crit("CPU%u: failed to come online\n", cpu);
172 ret = -EIO;
173 }
174 } else {
175 pr_err("CPU%u: failed to boot: %d\n", cpu, ret);
176 }
177
178
179 memset(&secondary_data, 0, sizeof(secondary_data));
180 return ret;
181}
182
183/* platform specific SMP operations */
184void __init smp_init_cpus(void)
185{
186 if (smp_ops.smp_init_cpus)
187 smp_ops.smp_init_cpus();
188}
189
190int platform_can_secondary_boot(void)
191{
192 return !!smp_ops.smp_boot_secondary;
193}
194
195int platform_can_cpu_hotplug(void)
196{
197#ifdef CONFIG_HOTPLUG_CPU
198 if (smp_ops.cpu_kill)
199 return 1;
200#endif
201
202 return 0;
203}
204
205#ifdef CONFIG_HOTPLUG_CPU
206static int platform_cpu_kill(unsigned int cpu)
207{
208 if (smp_ops.cpu_kill)
209 return smp_ops.cpu_kill(cpu);
210 return 1;
211}
212
213static int platform_cpu_disable(unsigned int cpu)
214{
215 if (smp_ops.cpu_disable)
216 return smp_ops.cpu_disable(cpu);
217
218 return 0;
219}
220
221int platform_can_hotplug_cpu(unsigned int cpu)
222{
223 /* cpu_die must be specified to support hotplug */
224 if (!smp_ops.cpu_die)
225 return 0;
226
227 if (smp_ops.cpu_can_disable)
228 return smp_ops.cpu_can_disable(cpu);
229
230 /*
231 * By default, allow disabling all CPUs except the first one,
232 * since this is special on a lot of platforms, e.g. because
233 * of clock tick interrupts.
234 */
235 return cpu != 0;
236}
237
238static void ipi_teardown(int cpu)
239{
240 int i;
241
242 if (WARN_ON_ONCE(!ipi_irq_base))
243 return;
244
245 for (i = 0; i < nr_ipi; i++)
246 disable_percpu_irq(ipi_irq_base + i);
247}
248
249/*
250 * __cpu_disable runs on the processor to be shutdown.
251 */
252int __cpu_disable(void)
253{
254 unsigned int cpu = smp_processor_id();
255 int ret;
256
257 ret = platform_cpu_disable(cpu);
258 if (ret)
259 return ret;
260
261#ifdef CONFIG_GENERIC_ARCH_TOPOLOGY
262 remove_cpu_topology(cpu);
263#endif
264
265 /*
266 * Take this CPU offline. Once we clear this, we can't return,
267 * and we must not schedule until we're ready to give up the cpu.
268 */
269 set_cpu_online(cpu, false);
270 ipi_teardown(cpu);
271
272 /*
273 * OK - migrate IRQs away from this CPU
274 */
275 irq_migrate_all_off_this_cpu();
276
277 /*
278 * Flush user cache and TLB mappings, and then remove this CPU
279 * from the vm mask set of all processes.
280 *
281 * Caches are flushed to the Level of Unification Inner Shareable
282 * to write-back dirty lines to unified caches shared by all CPUs.
283 */
284 flush_cache_louis();
285 local_flush_tlb_all();
286
287 return 0;
288}
289
290/*
291 * called on the thread which is asking for a CPU to be shutdown -
292 * waits until shutdown has completed, or it is timed out.
293 */
294void __cpu_die(unsigned int cpu)
295{
296 if (!cpu_wait_death(cpu, 5)) {
297 pr_err("CPU%u: cpu didn't die\n", cpu);
298 return;
299 }
300 pr_debug("CPU%u: shutdown\n", cpu);
301
302 clear_tasks_mm_cpumask(cpu);
303 /*
304 * platform_cpu_kill() is generally expected to do the powering off
305 * and/or cutting of clocks to the dying CPU. Optionally, this may
306 * be done by the CPU which is dying in preference to supporting
307 * this call, but that means there is _no_ synchronisation between
308 * the requesting CPU and the dying CPU actually losing power.
309 */
310 if (!platform_cpu_kill(cpu))
311 pr_err("CPU%u: unable to kill\n", cpu);
312}
313
314/*
315 * Called from the idle thread for the CPU which has been shutdown.
316 *
317 * Note that we disable IRQs here, but do not re-enable them
318 * before returning to the caller. This is also the behaviour
319 * of the other hotplug-cpu capable cores, so presumably coming
320 * out of idle fixes this.
321 */
322void arch_cpu_idle_dead(void)
323{
324 unsigned int cpu = smp_processor_id();
325
326 idle_task_exit();
327
328 local_irq_disable();
329
330 /*
331 * Flush the data out of the L1 cache for this CPU. This must be
332 * before the completion to ensure that data is safely written out
333 * before platform_cpu_kill() gets called - which may disable
334 * *this* CPU and power down its cache.
335 */
336 flush_cache_louis();
337
338 /*
339 * Tell __cpu_die() that this CPU is now safe to dispose of. Once
340 * this returns, power and/or clocks can be removed at any point
341 * from this CPU and its cache by platform_cpu_kill().
342 */
343 (void)cpu_report_death();
344
345 /*
346 * Ensure that the cache lines associated with that completion are
347 * written out. This covers the case where _this_ CPU is doing the
348 * powering down, to ensure that the completion is visible to the
349 * CPU waiting for this one.
350 */
351 flush_cache_louis();
352
353 /*
354 * The actual CPU shutdown procedure is at least platform (if not
355 * CPU) specific. This may remove power, or it may simply spin.
356 *
357 * Platforms are generally expected *NOT* to return from this call,
358 * although there are some which do because they have no way to
359 * power down the CPU. These platforms are the _only_ reason we
360 * have a return path which uses the fragment of assembly below.
361 *
362 * The return path should not be used for platforms which can
363 * power off the CPU.
364 */
365 if (smp_ops.cpu_die)
366 smp_ops.cpu_die(cpu);
367
368 pr_warn("CPU%u: smp_ops.cpu_die() returned, trying to resuscitate\n",
369 cpu);
370
371 /*
372 * Do not return to the idle loop - jump back to the secondary
373 * cpu initialisation. There's some initialisation which needs
374 * to be repeated to undo the effects of taking the CPU offline.
375 */
376 __asm__("mov sp, %0\n"
377 " mov fp, #0\n"
378 " b secondary_start_kernel"
379 :
380 : "r" (task_stack_page(current) + THREAD_SIZE - 8));
381}
382#endif /* CONFIG_HOTPLUG_CPU */
383
384/*
385 * Called by both boot and secondaries to move global data into
386 * per-processor storage.
387 */
388static void smp_store_cpu_info(unsigned int cpuid)
389{
390 struct cpuinfo_arm *cpu_info = &per_cpu(cpu_data, cpuid);
391
392 cpu_info->loops_per_jiffy = loops_per_jiffy;
393 cpu_info->cpuid = read_cpuid_id();
394
395 store_cpu_topology(cpuid);
396 check_cpu_icache_size(cpuid);
397}
398
399/*
400 * This is the secondary CPU boot entry. We're using this CPUs
401 * idle thread stack, but a set of temporary page tables.
402 */
403asmlinkage void secondary_start_kernel(void)
404{
405 struct mm_struct *mm = &init_mm;
406 unsigned int cpu;
407
408 secondary_biglittle_init();
409
410 /*
411 * The identity mapping is uncached (strongly ordered), so
412 * switch away from it before attempting any exclusive accesses.
413 */
414 cpu_switch_mm(mm->pgd, mm);
415 local_flush_bp_all();
416 enter_lazy_tlb(mm, current);
417 local_flush_tlb_all();
418
419 /*
420 * All kernel threads share the same mm context; grab a
421 * reference and switch to it.
422 */
423 cpu = smp_processor_id();
424 mmgrab(mm);
425 current->active_mm = mm;
426 cpumask_set_cpu(cpu, mm_cpumask(mm));
427
428 cpu_init();
429
430#ifndef CONFIG_MMU
431 setup_vectors_base();
432#endif
433 pr_debug("CPU%u: Booted secondary processor\n", cpu);
434
435 trace_hardirqs_off();
436
437 /*
438 * Give the platform a chance to do its own initialisation.
439 */
440 if (smp_ops.smp_secondary_init)
441 smp_ops.smp_secondary_init(cpu);
442
443 notify_cpu_starting(cpu);
444
445 ipi_setup(cpu);
446
447 calibrate_delay();
448
449 smp_store_cpu_info(cpu);
450
451 /*
452 * OK, now it's safe to let the boot CPU continue. Wait for
453 * the CPU migration code to notice that the CPU is online
454 * before we continue - which happens after __cpu_up returns.
455 */
456 set_cpu_online(cpu, true);
457
458 check_other_bugs();
459
460 complete(&cpu_running);
461
462 local_irq_enable();
463 local_fiq_enable();
464 local_abt_enable();
465
466 /*
467 * OK, it's off to the idle thread for us
468 */
469 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
470}
471
472void __init smp_cpus_done(unsigned int max_cpus)
473{
474 int cpu;
475 unsigned long bogosum = 0;
476
477 for_each_online_cpu(cpu)
478 bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
479
480 printk(KERN_INFO "SMP: Total of %d processors activated "
481 "(%lu.%02lu BogoMIPS).\n",
482 num_online_cpus(),
483 bogosum / (500000/HZ),
484 (bogosum / (5000/HZ)) % 100);
485
486 hyp_mode_check();
487}
488
489void __init smp_prepare_boot_cpu(void)
490{
491 set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
492}
493
494void __init smp_prepare_cpus(unsigned int max_cpus)
495{
496 unsigned int ncores = num_possible_cpus();
497
498 init_cpu_topology();
499
500 smp_store_cpu_info(smp_processor_id());
501
502 /*
503 * are we trying to boot more cores than exist?
504 */
505 if (max_cpus > ncores)
506 max_cpus = ncores;
507 if (ncores > 1 && max_cpus) {
508 /*
509 * Initialise the present map, which describes the set of CPUs
510 * actually populated at the present time. A platform should
511 * re-initialize the map in the platforms smp_prepare_cpus()
512 * if present != possible (e.g. physical hotplug).
513 */
514 init_cpu_present(cpu_possible_mask);
515
516 /*
517 * Initialise the SCU if there are more than one CPU
518 * and let them know where to start.
519 */
520 if (smp_ops.smp_prepare_cpus)
521 smp_ops.smp_prepare_cpus(max_cpus);
522 }
523}
524
525static const char *ipi_types[NR_IPI] __tracepoint_string = {
526 [IPI_WAKEUP] = "CPU wakeup interrupts",
527 [IPI_TIMER] = "Timer broadcast interrupts",
528 [IPI_RESCHEDULE] = "Rescheduling interrupts",
529 [IPI_CALL_FUNC] = "Function call interrupts",
530 [IPI_CPU_STOP] = "CPU stop interrupts",
531 [IPI_IRQ_WORK] = "IRQ work interrupts",
532 [IPI_COMPLETION] = "completion interrupts",
533};
534
535static void smp_cross_call(const struct cpumask *target, unsigned int ipinr);
536
537void show_ipi_list(struct seq_file *p, int prec)
538{
539 unsigned int cpu, i;
540
541 for (i = 0; i < NR_IPI; i++) {
542 if (!ipi_desc[i])
543 continue;
544
545 seq_printf(p, "%*s%u: ", prec - 1, "IPI", i);
546
547 for_each_online_cpu(cpu)
548 seq_printf(p, "%10u ", irq_desc_kstat_cpu(ipi_desc[i], cpu));
549
550 seq_printf(p, " %s\n", ipi_types[i]);
551 }
552}
553
554void arch_send_call_function_ipi_mask(const struct cpumask *mask)
555{
556 smp_cross_call(mask, IPI_CALL_FUNC);
557}
558
559void arch_send_wakeup_ipi_mask(const struct cpumask *mask)
560{
561 smp_cross_call(mask, IPI_WAKEUP);
562}
563
564void arch_send_call_function_single_ipi(int cpu)
565{
566 smp_cross_call(cpumask_of(cpu), IPI_CALL_FUNC);
567}
568
569#ifdef CONFIG_IRQ_WORK
570void arch_irq_work_raise(void)
571{
572 if (arch_irq_work_has_interrupt())
573 smp_cross_call(cpumask_of(smp_processor_id()), IPI_IRQ_WORK);
574}
575#endif
576
577#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
578void tick_broadcast(const struct cpumask *mask)
579{
580 smp_cross_call(mask, IPI_TIMER);
581}
582#endif
583
584static DEFINE_RAW_SPINLOCK(stop_lock);
585
586/*
587 * ipi_cpu_stop - handle IPI from smp_send_stop()
588 */
589static void ipi_cpu_stop(unsigned int cpu)
590{
591 if (system_state <= SYSTEM_RUNNING) {
592 raw_spin_lock(&stop_lock);
593 pr_crit("CPU%u: stopping\n", cpu);
594 dump_stack();
595 raw_spin_unlock(&stop_lock);
596 }
597
598 set_cpu_online(cpu, false);
599
600 local_fiq_disable();
601 local_irq_disable();
602
603 while (1) {
604 cpu_relax();
605 wfe();
606 }
607}
608
609static DEFINE_PER_CPU(struct completion *, cpu_completion);
610
611int register_ipi_completion(struct completion *completion, int cpu)
612{
613 per_cpu(cpu_completion, cpu) = completion;
614 return IPI_COMPLETION;
615}
616
617static void ipi_complete(unsigned int cpu)
618{
619 complete(per_cpu(cpu_completion, cpu));
620}
621
622/*
623 * Main handler for inter-processor interrupts
624 */
625asmlinkage void __exception_irq_entry do_IPI(int ipinr, struct pt_regs *regs)
626{
627 handle_IPI(ipinr, regs);
628}
629
630static void do_handle_IPI(int ipinr)
631{
632 unsigned int cpu = smp_processor_id();
633
634 if ((unsigned)ipinr < NR_IPI)
635 trace_ipi_entry_rcuidle(ipi_types[ipinr]);
636
637 switch (ipinr) {
638 case IPI_WAKEUP:
639 break;
640
641#ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST
642 case IPI_TIMER:
643 tick_receive_broadcast();
644 break;
645#endif
646
647 case IPI_RESCHEDULE:
648 scheduler_ipi();
649 break;
650
651 case IPI_CALL_FUNC:
652 generic_smp_call_function_interrupt();
653 break;
654
655 case IPI_CPU_STOP:
656 ipi_cpu_stop(cpu);
657 break;
658
659#ifdef CONFIG_IRQ_WORK
660 case IPI_IRQ_WORK:
661 irq_work_run();
662 break;
663#endif
664
665 case IPI_COMPLETION:
666 ipi_complete(cpu);
667 break;
668
669 case IPI_CPU_BACKTRACE:
670 printk_nmi_enter();
671 nmi_cpu_backtrace(get_irq_regs());
672 printk_nmi_exit();
673 break;
674
675 default:
676 pr_crit("CPU%u: Unknown IPI message 0x%x\n",
677 cpu, ipinr);
678 break;
679 }
680
681 if ((unsigned)ipinr < NR_IPI)
682 trace_ipi_exit_rcuidle(ipi_types[ipinr]);
683}
684
685/* Legacy version, should go away once all irqchips have been converted */
686void handle_IPI(int ipinr, struct pt_regs *regs)
687{
688 struct pt_regs *old_regs = set_irq_regs(regs);
689
690 irq_enter();
691 do_handle_IPI(ipinr);
692 irq_exit();
693
694 set_irq_regs(old_regs);
695}
696
697static irqreturn_t ipi_handler(int irq, void *data)
698{
699 do_handle_IPI(irq - ipi_irq_base);
700 return IRQ_HANDLED;
701}
702
703static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
704{
705 trace_ipi_raise_rcuidle(target, ipi_types[ipinr]);
706 __ipi_send_mask(ipi_desc[ipinr], target);
707}
708
709static void ipi_setup(int cpu)
710{
711 int i;
712
713 if (WARN_ON_ONCE(!ipi_irq_base))
714 return;
715
716 for (i = 0; i < nr_ipi; i++)
717 enable_percpu_irq(ipi_irq_base + i, 0);
718}
719
720void __init set_smp_ipi_range(int ipi_base, int n)
721{
722 int i;
723
724 WARN_ON(n < MAX_IPI);
725 nr_ipi = min(n, MAX_IPI);
726
727 for (i = 0; i < nr_ipi; i++) {
728 int err;
729
730 err = request_percpu_irq(ipi_base + i, ipi_handler,
731 "IPI", &irq_stat);
732 WARN_ON(err);
733
734 ipi_desc[i] = irq_to_desc(ipi_base + i);
735 irq_set_status_flags(ipi_base + i, IRQ_HIDDEN);
736 }
737
738 ipi_irq_base = ipi_base;
739
740 /* Setup the boot CPU immediately */
741 ipi_setup(smp_processor_id());
742}
743
744void smp_send_reschedule(int cpu)
745{
746 smp_cross_call(cpumask_of(cpu), IPI_RESCHEDULE);
747}
748
749void smp_send_stop(void)
750{
751 unsigned long timeout;
752 struct cpumask mask;
753
754 cpumask_copy(&mask, cpu_online_mask);
755 cpumask_clear_cpu(smp_processor_id(), &mask);
756 if (!cpumask_empty(&mask))
757 smp_cross_call(&mask, IPI_CPU_STOP);
758
759 /* Wait up to one second for other CPUs to stop */
760 timeout = USEC_PER_SEC;
761 while (num_online_cpus() > 1 && timeout--)
762 udelay(1);
763
764 if (num_online_cpus() > 1)
765 pr_warn("SMP: failed to stop secondary CPUs\n");
766}
767
768/* In case panic() and panic() called at the same time on CPU1 and CPU2,
769 * and CPU 1 calls panic_smp_self_stop() before crash_smp_send_stop()
770 * CPU1 can't receive the ipi irqs from CPU2, CPU1 will be always online,
771 * kdump fails. So split out the panic_smp_self_stop() and add
772 * set_cpu_online(smp_processor_id(), false).
773 */
774void panic_smp_self_stop(void)
775{
776 pr_debug("CPU %u will stop doing anything useful since another CPU has paniced\n",
777 smp_processor_id());
778 set_cpu_online(smp_processor_id(), false);
779 while (1)
780 cpu_relax();
781}
782
783/*
784 * not supported here
785 */
786int setup_profiling_timer(unsigned int multiplier)
787{
788 return -EINVAL;
789}
790
791#ifdef CONFIG_CPU_FREQ
792
793static DEFINE_PER_CPU(unsigned long, l_p_j_ref);
794static DEFINE_PER_CPU(unsigned long, l_p_j_ref_freq);
795static unsigned long global_l_p_j_ref;
796static unsigned long global_l_p_j_ref_freq;
797
798static int cpufreq_callback(struct notifier_block *nb,
799 unsigned long val, void *data)
800{
801 struct cpufreq_freqs *freq = data;
802 struct cpumask *cpus = freq->policy->cpus;
803 int cpu, first = cpumask_first(cpus);
804 unsigned int lpj;
805
806 if (freq->flags & CPUFREQ_CONST_LOOPS)
807 return NOTIFY_OK;
808
809 if (!per_cpu(l_p_j_ref, first)) {
810 for_each_cpu(cpu, cpus) {
811 per_cpu(l_p_j_ref, cpu) =
812 per_cpu(cpu_data, cpu).loops_per_jiffy;
813 per_cpu(l_p_j_ref_freq, cpu) = freq->old;
814 }
815
816 if (!global_l_p_j_ref) {
817 global_l_p_j_ref = loops_per_jiffy;
818 global_l_p_j_ref_freq = freq->old;
819 }
820 }
821
822 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
823 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) {
824 loops_per_jiffy = cpufreq_scale(global_l_p_j_ref,
825 global_l_p_j_ref_freq,
826 freq->new);
827
828 lpj = cpufreq_scale(per_cpu(l_p_j_ref, first),
829 per_cpu(l_p_j_ref_freq, first), freq->new);
830 for_each_cpu(cpu, cpus)
831 per_cpu(cpu_data, cpu).loops_per_jiffy = lpj;
832 }
833 return NOTIFY_OK;
834}
835
836static struct notifier_block cpufreq_notifier = {
837 .notifier_call = cpufreq_callback,
838};
839
840static int __init register_cpufreq_notifier(void)
841{
842 return cpufreq_register_notifier(&cpufreq_notifier,
843 CPUFREQ_TRANSITION_NOTIFIER);
844}
845core_initcall(register_cpufreq_notifier);
846
847#endif
848
849static void raise_nmi(cpumask_t *mask)
850{
851 __ipi_send_mask(ipi_desc[IPI_CPU_BACKTRACE], mask);
852}
853
854void arch_trigger_cpumask_backtrace(const cpumask_t *mask, bool exclude_self)
855{
856 nmi_trigger_cpumask_backtrace(mask, exclude_self, raise_nmi);
857}