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1// SPDX-License-Identifier: GPL-2.0
2/**
3 * Test driver to test endpoint functionality
4 *
5 * Copyright (C) 2017 Texas Instruments
6 * Author: Kishon Vijay Abraham I <kishon@ti.com>
7 */
8
9#include <linux/crc32.h>
10#include <linux/delay.h>
11#include <linux/io.h>
12#include <linux/module.h>
13#include <linux/slab.h>
14#include <linux/pci_ids.h>
15#include <linux/random.h>
16
17#include <linux/pci-epc.h>
18#include <linux/pci-epf.h>
19#include <linux/pci_regs.h>
20
21#define COMMAND_RAISE_LEGACY_IRQ BIT(0)
22#define COMMAND_RAISE_MSI_IRQ BIT(1)
23#define MSI_NUMBER_SHIFT 2
24#define MSI_NUMBER_MASK (0x3f << MSI_NUMBER_SHIFT)
25#define COMMAND_READ BIT(8)
26#define COMMAND_WRITE BIT(9)
27#define COMMAND_COPY BIT(10)
28
29#define STATUS_READ_SUCCESS BIT(0)
30#define STATUS_READ_FAIL BIT(1)
31#define STATUS_WRITE_SUCCESS BIT(2)
32#define STATUS_WRITE_FAIL BIT(3)
33#define STATUS_COPY_SUCCESS BIT(4)
34#define STATUS_COPY_FAIL BIT(5)
35#define STATUS_IRQ_RAISED BIT(6)
36#define STATUS_SRC_ADDR_INVALID BIT(7)
37#define STATUS_DST_ADDR_INVALID BIT(8)
38
39#define TIMER_RESOLUTION 1
40
41static struct workqueue_struct *kpcitest_workqueue;
42
43struct pci_epf_test {
44 void *reg[6];
45 struct pci_epf *epf;
46 enum pci_barno test_reg_bar;
47 bool linkup_notifier;
48 struct delayed_work cmd_handler;
49};
50
51struct pci_epf_test_reg {
52 u32 magic;
53 u32 command;
54 u32 status;
55 u64 src_addr;
56 u64 dst_addr;
57 u32 size;
58 u32 checksum;
59} __packed;
60
61static struct pci_epf_header test_header = {
62 .vendorid = PCI_ANY_ID,
63 .deviceid = PCI_ANY_ID,
64 .baseclass_code = PCI_CLASS_OTHERS,
65 .interrupt_pin = PCI_INTERRUPT_INTA,
66};
67
68struct pci_epf_test_data {
69 enum pci_barno test_reg_bar;
70 bool linkup_notifier;
71};
72
73static size_t bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 };
74
75static int pci_epf_test_copy(struct pci_epf_test *epf_test)
76{
77 int ret;
78 void __iomem *src_addr;
79 void __iomem *dst_addr;
80 phys_addr_t src_phys_addr;
81 phys_addr_t dst_phys_addr;
82 struct pci_epf *epf = epf_test->epf;
83 struct device *dev = &epf->dev;
84 struct pci_epc *epc = epf->epc;
85 enum pci_barno test_reg_bar = epf_test->test_reg_bar;
86 struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
87
88 src_addr = pci_epc_mem_alloc_addr(epc, &src_phys_addr, reg->size);
89 if (!src_addr) {
90 dev_err(dev, "failed to allocate source address\n");
91 reg->status = STATUS_SRC_ADDR_INVALID;
92 ret = -ENOMEM;
93 goto err;
94 }
95
96 ret = pci_epc_map_addr(epc, epf->func_no, src_phys_addr, reg->src_addr,
97 reg->size);
98 if (ret) {
99 dev_err(dev, "failed to map source address\n");
100 reg->status = STATUS_SRC_ADDR_INVALID;
101 goto err_src_addr;
102 }
103
104 dst_addr = pci_epc_mem_alloc_addr(epc, &dst_phys_addr, reg->size);
105 if (!dst_addr) {
106 dev_err(dev, "failed to allocate destination address\n");
107 reg->status = STATUS_DST_ADDR_INVALID;
108 ret = -ENOMEM;
109 goto err_src_map_addr;
110 }
111
112 ret = pci_epc_map_addr(epc, epf->func_no, dst_phys_addr, reg->dst_addr,
113 reg->size);
114 if (ret) {
115 dev_err(dev, "failed to map destination address\n");
116 reg->status = STATUS_DST_ADDR_INVALID;
117 goto err_dst_addr;
118 }
119
120 memcpy(dst_addr, src_addr, reg->size);
121
122 pci_epc_unmap_addr(epc, epf->func_no, dst_phys_addr);
123
124err_dst_addr:
125 pci_epc_mem_free_addr(epc, dst_phys_addr, dst_addr, reg->size);
126
127err_src_map_addr:
128 pci_epc_unmap_addr(epc, epf->func_no, src_phys_addr);
129
130err_src_addr:
131 pci_epc_mem_free_addr(epc, src_phys_addr, src_addr, reg->size);
132
133err:
134 return ret;
135}
136
137static int pci_epf_test_read(struct pci_epf_test *epf_test)
138{
139 int ret;
140 void __iomem *src_addr;
141 void *buf;
142 u32 crc32;
143 phys_addr_t phys_addr;
144 struct pci_epf *epf = epf_test->epf;
145 struct device *dev = &epf->dev;
146 struct pci_epc *epc = epf->epc;
147 enum pci_barno test_reg_bar = epf_test->test_reg_bar;
148 struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
149
150 src_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, reg->size);
151 if (!src_addr) {
152 dev_err(dev, "failed to allocate address\n");
153 reg->status = STATUS_SRC_ADDR_INVALID;
154 ret = -ENOMEM;
155 goto err;
156 }
157
158 ret = pci_epc_map_addr(epc, epf->func_no, phys_addr, reg->src_addr,
159 reg->size);
160 if (ret) {
161 dev_err(dev, "failed to map address\n");
162 reg->status = STATUS_SRC_ADDR_INVALID;
163 goto err_addr;
164 }
165
166 buf = kzalloc(reg->size, GFP_KERNEL);
167 if (!buf) {
168 ret = -ENOMEM;
169 goto err_map_addr;
170 }
171
172 memcpy(buf, src_addr, reg->size);
173
174 crc32 = crc32_le(~0, buf, reg->size);
175 if (crc32 != reg->checksum)
176 ret = -EIO;
177
178 kfree(buf);
179
180err_map_addr:
181 pci_epc_unmap_addr(epc, epf->func_no, phys_addr);
182
183err_addr:
184 pci_epc_mem_free_addr(epc, phys_addr, src_addr, reg->size);
185
186err:
187 return ret;
188}
189
190static int pci_epf_test_write(struct pci_epf_test *epf_test)
191{
192 int ret;
193 void __iomem *dst_addr;
194 void *buf;
195 phys_addr_t phys_addr;
196 struct pci_epf *epf = epf_test->epf;
197 struct device *dev = &epf->dev;
198 struct pci_epc *epc = epf->epc;
199 enum pci_barno test_reg_bar = epf_test->test_reg_bar;
200 struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
201
202 dst_addr = pci_epc_mem_alloc_addr(epc, &phys_addr, reg->size);
203 if (!dst_addr) {
204 dev_err(dev, "failed to allocate address\n");
205 reg->status = STATUS_DST_ADDR_INVALID;
206 ret = -ENOMEM;
207 goto err;
208 }
209
210 ret = pci_epc_map_addr(epc, epf->func_no, phys_addr, reg->dst_addr,
211 reg->size);
212 if (ret) {
213 dev_err(dev, "failed to map address\n");
214 reg->status = STATUS_DST_ADDR_INVALID;
215 goto err_addr;
216 }
217
218 buf = kzalloc(reg->size, GFP_KERNEL);
219 if (!buf) {
220 ret = -ENOMEM;
221 goto err_map_addr;
222 }
223
224 get_random_bytes(buf, reg->size);
225 reg->checksum = crc32_le(~0, buf, reg->size);
226
227 memcpy(dst_addr, buf, reg->size);
228
229 /*
230 * wait 1ms inorder for the write to complete. Without this delay L3
231 * error in observed in the host system.
232 */
233 mdelay(1);
234
235 kfree(buf);
236
237err_map_addr:
238 pci_epc_unmap_addr(epc, epf->func_no, phys_addr);
239
240err_addr:
241 pci_epc_mem_free_addr(epc, phys_addr, dst_addr, reg->size);
242
243err:
244 return ret;
245}
246
247static void pci_epf_test_raise_irq(struct pci_epf_test *epf_test, u8 irq)
248{
249 u8 msi_count;
250 struct pci_epf *epf = epf_test->epf;
251 struct pci_epc *epc = epf->epc;
252 enum pci_barno test_reg_bar = epf_test->test_reg_bar;
253 struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
254
255 reg->status |= STATUS_IRQ_RAISED;
256 msi_count = pci_epc_get_msi(epc, epf->func_no);
257 if (irq > msi_count || msi_count <= 0)
258 pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_LEGACY, 0);
259 else
260 pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSI, irq);
261}
262
263static void pci_epf_test_cmd_handler(struct work_struct *work)
264{
265 int ret;
266 u8 irq;
267 u8 msi_count;
268 u32 command;
269 struct pci_epf_test *epf_test = container_of(work, struct pci_epf_test,
270 cmd_handler.work);
271 struct pci_epf *epf = epf_test->epf;
272 struct pci_epc *epc = epf->epc;
273 enum pci_barno test_reg_bar = epf_test->test_reg_bar;
274 struct pci_epf_test_reg *reg = epf_test->reg[test_reg_bar];
275
276 command = reg->command;
277 if (!command)
278 goto reset_handler;
279
280 reg->command = 0;
281 reg->status = 0;
282
283 irq = (command & MSI_NUMBER_MASK) >> MSI_NUMBER_SHIFT;
284
285 if (command & COMMAND_RAISE_LEGACY_IRQ) {
286 reg->status = STATUS_IRQ_RAISED;
287 pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_LEGACY, 0);
288 goto reset_handler;
289 }
290
291 if (command & COMMAND_WRITE) {
292 ret = pci_epf_test_write(epf_test);
293 if (ret)
294 reg->status |= STATUS_WRITE_FAIL;
295 else
296 reg->status |= STATUS_WRITE_SUCCESS;
297 pci_epf_test_raise_irq(epf_test, irq);
298 goto reset_handler;
299 }
300
301 if (command & COMMAND_READ) {
302 ret = pci_epf_test_read(epf_test);
303 if (!ret)
304 reg->status |= STATUS_READ_SUCCESS;
305 else
306 reg->status |= STATUS_READ_FAIL;
307 pci_epf_test_raise_irq(epf_test, irq);
308 goto reset_handler;
309 }
310
311 if (command & COMMAND_COPY) {
312 ret = pci_epf_test_copy(epf_test);
313 if (!ret)
314 reg->status |= STATUS_COPY_SUCCESS;
315 else
316 reg->status |= STATUS_COPY_FAIL;
317 pci_epf_test_raise_irq(epf_test, irq);
318 goto reset_handler;
319 }
320
321 if (command & COMMAND_RAISE_MSI_IRQ) {
322 msi_count = pci_epc_get_msi(epc, epf->func_no);
323 if (irq > msi_count || msi_count <= 0)
324 goto reset_handler;
325 reg->status = STATUS_IRQ_RAISED;
326 pci_epc_raise_irq(epc, epf->func_no, PCI_EPC_IRQ_MSI, irq);
327 goto reset_handler;
328 }
329
330reset_handler:
331 queue_delayed_work(kpcitest_workqueue, &epf_test->cmd_handler,
332 msecs_to_jiffies(1));
333}
334
335static void pci_epf_test_linkup(struct pci_epf *epf)
336{
337 struct pci_epf_test *epf_test = epf_get_drvdata(epf);
338
339 queue_delayed_work(kpcitest_workqueue, &epf_test->cmd_handler,
340 msecs_to_jiffies(1));
341}
342
343static void pci_epf_test_unbind(struct pci_epf *epf)
344{
345 struct pci_epf_test *epf_test = epf_get_drvdata(epf);
346 struct pci_epc *epc = epf->epc;
347 struct pci_epf_bar *epf_bar;
348 int bar;
349
350 cancel_delayed_work(&epf_test->cmd_handler);
351 pci_epc_stop(epc);
352 for (bar = BAR_0; bar <= BAR_5; bar++) {
353 epf_bar = &epf->bar[bar];
354
355 if (epf_test->reg[bar]) {
356 pci_epf_free_space(epf, epf_test->reg[bar], bar);
357 pci_epc_clear_bar(epc, epf->func_no, epf_bar);
358 }
359 }
360}
361
362static int pci_epf_test_set_bar(struct pci_epf *epf)
363{
364 int bar;
365 int ret;
366 struct pci_epf_bar *epf_bar;
367 struct pci_epc *epc = epf->epc;
368 struct device *dev = &epf->dev;
369 struct pci_epf_test *epf_test = epf_get_drvdata(epf);
370 enum pci_barno test_reg_bar = epf_test->test_reg_bar;
371
372 for (bar = BAR_0; bar <= BAR_5; bar++) {
373 epf_bar = &epf->bar[bar];
374
375 epf_bar->flags |= upper_32_bits(epf_bar->size) ?
376 PCI_BASE_ADDRESS_MEM_TYPE_64 :
377 PCI_BASE_ADDRESS_MEM_TYPE_32;
378
379 ret = pci_epc_set_bar(epc, epf->func_no, epf_bar);
380 if (ret) {
381 pci_epf_free_space(epf, epf_test->reg[bar], bar);
382 dev_err(dev, "failed to set BAR%d\n", bar);
383 if (bar == test_reg_bar)
384 return ret;
385 }
386 /*
387 * pci_epc_set_bar() sets PCI_BASE_ADDRESS_MEM_TYPE_64
388 * if the specific implementation required a 64-bit BAR,
389 * even if we only requested a 32-bit BAR.
390 */
391 if (epf_bar->flags & PCI_BASE_ADDRESS_MEM_TYPE_64)
392 bar++;
393 }
394
395 return 0;
396}
397
398static int pci_epf_test_alloc_space(struct pci_epf *epf)
399{
400 struct pci_epf_test *epf_test = epf_get_drvdata(epf);
401 struct device *dev = &epf->dev;
402 void *base;
403 int bar;
404 enum pci_barno test_reg_bar = epf_test->test_reg_bar;
405
406 base = pci_epf_alloc_space(epf, sizeof(struct pci_epf_test_reg),
407 test_reg_bar);
408 if (!base) {
409 dev_err(dev, "failed to allocated register space\n");
410 return -ENOMEM;
411 }
412 epf_test->reg[test_reg_bar] = base;
413
414 for (bar = BAR_0; bar <= BAR_5; bar++) {
415 if (bar == test_reg_bar)
416 continue;
417 base = pci_epf_alloc_space(epf, bar_size[bar], bar);
418 if (!base)
419 dev_err(dev, "failed to allocate space for BAR%d\n",
420 bar);
421 epf_test->reg[bar] = base;
422 }
423
424 return 0;
425}
426
427static int pci_epf_test_bind(struct pci_epf *epf)
428{
429 int ret;
430 struct pci_epf_test *epf_test = epf_get_drvdata(epf);
431 struct pci_epf_header *header = epf->header;
432 struct pci_epc *epc = epf->epc;
433 struct device *dev = &epf->dev;
434
435 if (WARN_ON_ONCE(!epc))
436 return -EINVAL;
437
438 ret = pci_epc_write_header(epc, epf->func_no, header);
439 if (ret) {
440 dev_err(dev, "configuration header write failed\n");
441 return ret;
442 }
443
444 ret = pci_epf_test_alloc_space(epf);
445 if (ret)
446 return ret;
447
448 ret = pci_epf_test_set_bar(epf);
449 if (ret)
450 return ret;
451
452 ret = pci_epc_set_msi(epc, epf->func_no, epf->msi_interrupts);
453 if (ret)
454 return ret;
455
456 if (!epf_test->linkup_notifier)
457 queue_work(kpcitest_workqueue, &epf_test->cmd_handler.work);
458
459 return 0;
460}
461
462static const struct pci_epf_device_id pci_epf_test_ids[] = {
463 {
464 .name = "pci_epf_test",
465 },
466 {},
467};
468
469static int pci_epf_test_probe(struct pci_epf *epf)
470{
471 struct pci_epf_test *epf_test;
472 struct device *dev = &epf->dev;
473 const struct pci_epf_device_id *match;
474 struct pci_epf_test_data *data;
475 enum pci_barno test_reg_bar = BAR_0;
476 bool linkup_notifier = true;
477
478 match = pci_epf_match_device(pci_epf_test_ids, epf);
479 data = (struct pci_epf_test_data *)match->driver_data;
480 if (data) {
481 test_reg_bar = data->test_reg_bar;
482 linkup_notifier = data->linkup_notifier;
483 }
484
485 epf_test = devm_kzalloc(dev, sizeof(*epf_test), GFP_KERNEL);
486 if (!epf_test)
487 return -ENOMEM;
488
489 epf->header = &test_header;
490 epf_test->epf = epf;
491 epf_test->test_reg_bar = test_reg_bar;
492 epf_test->linkup_notifier = linkup_notifier;
493
494 INIT_DELAYED_WORK(&epf_test->cmd_handler, pci_epf_test_cmd_handler);
495
496 epf_set_drvdata(epf, epf_test);
497 return 0;
498}
499
500static struct pci_epf_ops ops = {
501 .unbind = pci_epf_test_unbind,
502 .bind = pci_epf_test_bind,
503 .linkup = pci_epf_test_linkup,
504};
505
506static struct pci_epf_driver test_driver = {
507 .driver.name = "pci_epf_test",
508 .probe = pci_epf_test_probe,
509 .id_table = pci_epf_test_ids,
510 .ops = &ops,
511 .owner = THIS_MODULE,
512};
513
514static int __init pci_epf_test_init(void)
515{
516 int ret;
517
518 kpcitest_workqueue = alloc_workqueue("kpcitest",
519 WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
520 ret = pci_epf_register_driver(&test_driver);
521 if (ret) {
522 pr_err("failed to register pci epf test driver --> %d\n", ret);
523 return ret;
524 }
525
526 return 0;
527}
528module_init(pci_epf_test_init);
529
530static void __exit pci_epf_test_exit(void)
531{
532 pci_epf_unregister_driver(&test_driver);
533}
534module_exit(pci_epf_test_exit);
535
536MODULE_DESCRIPTION("PCI EPF TEST DRIVER");
537MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
538MODULE_LICENSE("GPL v2");