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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * at24.c - handle most I2C EEPROMs
4 *
5 * Copyright (C) 2005-2007 David Brownell
6 * Copyright (C) 2008 Wolfram Sang, Pengutronix
7 */
8
9#include <linux/kernel.h>
10#include <linux/init.h>
11#include <linux/module.h>
12#include <linux/of_device.h>
13#include <linux/slab.h>
14#include <linux/delay.h>
15#include <linux/mutex.h>
16#include <linux/mod_devicetable.h>
17#include <linux/log2.h>
18#include <linux/bitops.h>
19#include <linux/jiffies.h>
20#include <linux/property.h>
21#include <linux/acpi.h>
22#include <linux/i2c.h>
23#include <linux/nvmem-provider.h>
24#include <linux/regmap.h>
25#include <linux/platform_data/at24.h>
26#include <linux/pm_runtime.h>
27#include <linux/gpio/consumer.h>
28
29/*
30 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
31 * Differences between different vendor product lines (like Atmel AT24C or
32 * MicroChip 24LC, etc) won't much matter for typical read/write access.
33 * There are also I2C RAM chips, likewise interchangeable. One example
34 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
35 *
36 * However, misconfiguration can lose data. "Set 16-bit memory address"
37 * to a part with 8-bit addressing will overwrite data. Writing with too
38 * big a page size also loses data. And it's not safe to assume that the
39 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
40 * uses 0x51, for just one example.
41 *
42 * Accordingly, explicit board-specific configuration data should be used
43 * in almost all cases. (One partial exception is an SMBus used to access
44 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
45 *
46 * So this driver uses "new style" I2C driver binding, expecting to be
47 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
48 * similar kernel-resident tables; or, configuration data coming from
49 * a bootloader.
50 *
51 * Other than binding model, current differences from "eeprom" driver are
52 * that this one handles write access and isn't restricted to 24c02 devices.
53 * It also handles larger devices (32 kbit and up) with two-byte addresses,
54 * which won't work on pure SMBus systems.
55 */
56
57struct at24_client {
58 struct i2c_client *client;
59 struct regmap *regmap;
60};
61
62struct at24_data {
63 /*
64 * Lock protects against activities from other Linux tasks,
65 * but not from changes by other I2C masters.
66 */
67 struct mutex lock;
68
69 unsigned int write_max;
70 unsigned int num_addresses;
71 unsigned int offset_adj;
72
73 u32 byte_len;
74 u16 page_size;
75 u8 flags;
76
77 struct nvmem_device *nvmem;
78
79 struct gpio_desc *wp_gpio;
80
81 /*
82 * Some chips tie up multiple I2C addresses; dummy devices reserve
83 * them for us, and we'll use them with SMBus calls.
84 */
85 struct at24_client client[];
86};
87
88/*
89 * This parameter is to help this driver avoid blocking other drivers out
90 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
91 * clock, one 256 byte read takes about 1/43 second which is excessive;
92 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
93 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
94 *
95 * This value is forced to be a power of two so that writes align on pages.
96 */
97static unsigned int at24_io_limit = 128;
98module_param_named(io_limit, at24_io_limit, uint, 0);
99MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
100
101/*
102 * Specs often allow 5 msec for a page write, sometimes 20 msec;
103 * it's important to recover from write timeouts.
104 */
105static unsigned int at24_write_timeout = 25;
106module_param_named(write_timeout, at24_write_timeout, uint, 0);
107MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
108
109/*
110 * Both reads and writes fail if the previous write didn't complete yet. This
111 * macro loops a few times waiting at least long enough for one entire page
112 * write to work while making sure that at least one iteration is run before
113 * checking the break condition.
114 *
115 * It takes two parameters: a variable in which the future timeout in jiffies
116 * will be stored and a temporary variable holding the time of the last
117 * iteration of processing the request. Both should be unsigned integers
118 * holding at least 32 bits.
119 */
120#define at24_loop_until_timeout(tout, op_time) \
121 for (tout = jiffies + msecs_to_jiffies(at24_write_timeout), \
122 op_time = 0; \
123 op_time ? time_before(op_time, tout) : true; \
124 usleep_range(1000, 1500), op_time = jiffies)
125
126struct at24_chip_data {
127 /*
128 * these fields mirror their equivalents in
129 * struct at24_platform_data
130 */
131 u32 byte_len;
132 u8 flags;
133};
134
135#define AT24_CHIP_DATA(_name, _len, _flags) \
136 static const struct at24_chip_data _name = { \
137 .byte_len = _len, .flags = _flags, \
138 }
139
140/* needs 8 addresses as A0-A2 are ignored */
141AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
142/* old variants can't be handled with this generic entry! */
143AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
144AT24_CHIP_DATA(at24_data_24cs01, 16,
145 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
146AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
147AT24_CHIP_DATA(at24_data_24cs02, 16,
148 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
149AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
150 AT24_FLAG_MAC | AT24_FLAG_READONLY);
151AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
152 AT24_FLAG_MAC | AT24_FLAG_READONLY);
153/* spd is a 24c02 in memory DIMMs */
154AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
155 AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
156AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
157AT24_CHIP_DATA(at24_data_24cs04, 16,
158 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
159/* 24rf08 quirk is handled at i2c-core */
160AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
161AT24_CHIP_DATA(at24_data_24cs08, 16,
162 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
163AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
164AT24_CHIP_DATA(at24_data_24cs16, 16,
165 AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
166AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
167AT24_CHIP_DATA(at24_data_24cs32, 16,
168 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
169AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
170AT24_CHIP_DATA(at24_data_24cs64, 16,
171 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
172AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
173AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
174AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
175AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
176/* identical to 24c08 ? */
177AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
178
179static const struct i2c_device_id at24_ids[] = {
180 { "24c00", (kernel_ulong_t)&at24_data_24c00 },
181 { "24c01", (kernel_ulong_t)&at24_data_24c01 },
182 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
183 { "24c02", (kernel_ulong_t)&at24_data_24c02 },
184 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
185 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 },
186 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 },
187 { "spd", (kernel_ulong_t)&at24_data_spd },
188 { "24c04", (kernel_ulong_t)&at24_data_24c04 },
189 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
190 { "24c08", (kernel_ulong_t)&at24_data_24c08 },
191 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
192 { "24c16", (kernel_ulong_t)&at24_data_24c16 },
193 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
194 { "24c32", (kernel_ulong_t)&at24_data_24c32 },
195 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
196 { "24c64", (kernel_ulong_t)&at24_data_24c64 },
197 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
198 { "24c128", (kernel_ulong_t)&at24_data_24c128 },
199 { "24c256", (kernel_ulong_t)&at24_data_24c256 },
200 { "24c512", (kernel_ulong_t)&at24_data_24c512 },
201 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 },
202 { "at24", 0 },
203 { /* END OF LIST */ }
204};
205MODULE_DEVICE_TABLE(i2c, at24_ids);
206
207static const struct of_device_id at24_of_match[] = {
208 { .compatible = "atmel,24c00", .data = &at24_data_24c00 },
209 { .compatible = "atmel,24c01", .data = &at24_data_24c01 },
210 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 },
211 { .compatible = "atmel,24c02", .data = &at24_data_24c02 },
212 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 },
213 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 },
214 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 },
215 { .compatible = "atmel,spd", .data = &at24_data_spd },
216 { .compatible = "atmel,24c04", .data = &at24_data_24c04 },
217 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 },
218 { .compatible = "atmel,24c08", .data = &at24_data_24c08 },
219 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 },
220 { .compatible = "atmel,24c16", .data = &at24_data_24c16 },
221 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 },
222 { .compatible = "atmel,24c32", .data = &at24_data_24c32 },
223 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 },
224 { .compatible = "atmel,24c64", .data = &at24_data_24c64 },
225 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 },
226 { .compatible = "atmel,24c128", .data = &at24_data_24c128 },
227 { .compatible = "atmel,24c256", .data = &at24_data_24c256 },
228 { .compatible = "atmel,24c512", .data = &at24_data_24c512 },
229 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 },
230 { /* END OF LIST */ },
231};
232MODULE_DEVICE_TABLE(of, at24_of_match);
233
234static const struct acpi_device_id at24_acpi_ids[] = {
235 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 },
236 { /* END OF LIST */ }
237};
238MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
239
240/*
241 * This routine supports chips which consume multiple I2C addresses. It
242 * computes the addressing information to be used for a given r/w request.
243 * Assumes that sanity checks for offset happened at sysfs-layer.
244 *
245 * Slave address and byte offset derive from the offset. Always
246 * set the byte address; on a multi-master board, another master
247 * may have changed the chip's "current" address pointer.
248 */
249static struct at24_client *at24_translate_offset(struct at24_data *at24,
250 unsigned int *offset)
251{
252 unsigned int i;
253
254 if (at24->flags & AT24_FLAG_ADDR16) {
255 i = *offset >> 16;
256 *offset &= 0xffff;
257 } else {
258 i = *offset >> 8;
259 *offset &= 0xff;
260 }
261
262 return &at24->client[i];
263}
264
265static struct device *at24_base_client_dev(struct at24_data *at24)
266{
267 return &at24->client[0].client->dev;
268}
269
270static size_t at24_adjust_read_count(struct at24_data *at24,
271 unsigned int offset, size_t count)
272{
273 unsigned int bits;
274 size_t remainder;
275
276 /*
277 * In case of multi-address chips that don't rollover reads to
278 * the next slave address: truncate the count to the slave boundary,
279 * so that the read never straddles slaves.
280 */
281 if (at24->flags & AT24_FLAG_NO_RDROL) {
282 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
283 remainder = BIT(bits) - offset;
284 if (count > remainder)
285 count = remainder;
286 }
287
288 if (count > at24_io_limit)
289 count = at24_io_limit;
290
291 return count;
292}
293
294static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
295 unsigned int offset, size_t count)
296{
297 unsigned long timeout, read_time;
298 struct at24_client *at24_client;
299 struct i2c_client *client;
300 struct regmap *regmap;
301 int ret;
302
303 at24_client = at24_translate_offset(at24, &offset);
304 regmap = at24_client->regmap;
305 client = at24_client->client;
306 count = at24_adjust_read_count(at24, offset, count);
307
308 /* adjust offset for mac and serial read ops */
309 offset += at24->offset_adj;
310
311 at24_loop_until_timeout(timeout, read_time) {
312 ret = regmap_bulk_read(regmap, offset, buf, count);
313 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
314 count, offset, ret, jiffies);
315 if (!ret)
316 return count;
317 }
318
319 return -ETIMEDOUT;
320}
321
322/*
323 * Note that if the hardware write-protect pin is pulled high, the whole
324 * chip is normally write protected. But there are plenty of product
325 * variants here, including OTP fuses and partial chip protect.
326 *
327 * We only use page mode writes; the alternative is sloooow. These routines
328 * write at most one page.
329 */
330
331static size_t at24_adjust_write_count(struct at24_data *at24,
332 unsigned int offset, size_t count)
333{
334 unsigned int next_page;
335
336 /* write_max is at most a page */
337 if (count > at24->write_max)
338 count = at24->write_max;
339
340 /* Never roll over backwards, to the start of this page */
341 next_page = roundup(offset + 1, at24->page_size);
342 if (offset + count > next_page)
343 count = next_page - offset;
344
345 return count;
346}
347
348static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
349 unsigned int offset, size_t count)
350{
351 unsigned long timeout, write_time;
352 struct at24_client *at24_client;
353 struct i2c_client *client;
354 struct regmap *regmap;
355 int ret;
356
357 at24_client = at24_translate_offset(at24, &offset);
358 regmap = at24_client->regmap;
359 client = at24_client->client;
360 count = at24_adjust_write_count(at24, offset, count);
361
362 at24_loop_until_timeout(timeout, write_time) {
363 ret = regmap_bulk_write(regmap, offset, buf, count);
364 dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n",
365 count, offset, ret, jiffies);
366 if (!ret)
367 return count;
368 }
369
370 return -ETIMEDOUT;
371}
372
373static int at24_read(void *priv, unsigned int off, void *val, size_t count)
374{
375 struct at24_data *at24;
376 struct device *dev;
377 char *buf = val;
378 int ret;
379
380 at24 = priv;
381 dev = at24_base_client_dev(at24);
382
383 if (unlikely(!count))
384 return count;
385
386 if (off + count > at24->byte_len)
387 return -EINVAL;
388
389 ret = pm_runtime_get_sync(dev);
390 if (ret < 0) {
391 pm_runtime_put_noidle(dev);
392 return ret;
393 }
394
395 /*
396 * Read data from chip, protecting against concurrent updates
397 * from this host, but not from other I2C masters.
398 */
399 mutex_lock(&at24->lock);
400
401 while (count) {
402 ret = at24_regmap_read(at24, buf, off, count);
403 if (ret < 0) {
404 mutex_unlock(&at24->lock);
405 pm_runtime_put(dev);
406 return ret;
407 }
408 buf += ret;
409 off += ret;
410 count -= ret;
411 }
412
413 mutex_unlock(&at24->lock);
414
415 pm_runtime_put(dev);
416
417 return 0;
418}
419
420static int at24_write(void *priv, unsigned int off, void *val, size_t count)
421{
422 struct at24_data *at24;
423 struct device *dev;
424 char *buf = val;
425 int ret;
426
427 at24 = priv;
428 dev = at24_base_client_dev(at24);
429
430 if (unlikely(!count))
431 return -EINVAL;
432
433 if (off + count > at24->byte_len)
434 return -EINVAL;
435
436 ret = pm_runtime_get_sync(dev);
437 if (ret < 0) {
438 pm_runtime_put_noidle(dev);
439 return ret;
440 }
441
442 /*
443 * Write data to chip, protecting against concurrent updates
444 * from this host, but not from other I2C masters.
445 */
446 mutex_lock(&at24->lock);
447 gpiod_set_value_cansleep(at24->wp_gpio, 0);
448
449 while (count) {
450 ret = at24_regmap_write(at24, buf, off, count);
451 if (ret < 0) {
452 gpiod_set_value_cansleep(at24->wp_gpio, 1);
453 mutex_unlock(&at24->lock);
454 pm_runtime_put(dev);
455 return ret;
456 }
457 buf += ret;
458 off += ret;
459 count -= ret;
460 }
461
462 gpiod_set_value_cansleep(at24->wp_gpio, 1);
463 mutex_unlock(&at24->lock);
464
465 pm_runtime_put(dev);
466
467 return 0;
468}
469
470static void at24_properties_to_pdata(struct device *dev,
471 struct at24_platform_data *chip)
472{
473 int err;
474 u32 val;
475
476 if (device_property_present(dev, "read-only"))
477 chip->flags |= AT24_FLAG_READONLY;
478 if (device_property_present(dev, "no-read-rollover"))
479 chip->flags |= AT24_FLAG_NO_RDROL;
480
481 err = device_property_read_u32(dev, "size", &val);
482 if (!err)
483 chip->byte_len = val;
484
485 err = device_property_read_u32(dev, "pagesize", &val);
486 if (!err) {
487 chip->page_size = val;
488 } else {
489 /*
490 * This is slow, but we can't know all eeproms, so we better
491 * play safe. Specifying custom eeprom-types via platform_data
492 * is recommended anyhow.
493 */
494 chip->page_size = 1;
495 }
496}
497
498static int at24_get_pdata(struct device *dev, struct at24_platform_data *pdata)
499{
500 struct device_node *of_node = dev->of_node;
501 const struct at24_chip_data *cdata;
502 const struct i2c_device_id *id;
503 struct at24_platform_data *pd;
504
505 pd = dev_get_platdata(dev);
506 if (pd) {
507 memcpy(pdata, pd, sizeof(*pdata));
508 return 0;
509 }
510
511 id = i2c_match_id(at24_ids, to_i2c_client(dev));
512
513 /*
514 * The I2C core allows OF nodes compatibles to match against the
515 * I2C device ID table as a fallback, so check not only if an OF
516 * node is present but also if it matches an OF device ID entry.
517 */
518 if (of_node && of_match_device(at24_of_match, dev))
519 cdata = of_device_get_match_data(dev);
520 else if (id)
521 cdata = (void *)id->driver_data;
522 else
523 cdata = acpi_device_get_match_data(dev);
524
525 if (!cdata)
526 return -ENODEV;
527
528 pdata->byte_len = cdata->byte_len;
529 pdata->flags = cdata->flags;
530 at24_properties_to_pdata(dev, pdata);
531
532 return 0;
533}
534
535static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
536{
537 if (flags & AT24_FLAG_MAC) {
538 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
539 return 0xa0 - byte_len;
540 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
541 /*
542 * For 16 bit address pointers, the word address must contain
543 * a '10' sequence in bits 11 and 10 regardless of the
544 * intended position of the address pointer.
545 */
546 return 0x0800;
547 } else if (flags & AT24_FLAG_SERIAL) {
548 /*
549 * Otherwise the word address must begin with a '10' sequence,
550 * regardless of the intended address.
551 */
552 return 0x0080;
553 } else {
554 return 0;
555 }
556}
557
558static int at24_probe(struct i2c_client *client)
559{
560 struct regmap_config regmap_config = { };
561 struct nvmem_config nvmem_config = { };
562 struct at24_platform_data pdata = { };
563 struct device *dev = &client->dev;
564 bool i2c_fn_i2c, i2c_fn_block;
565 unsigned int i, num_addresses;
566 struct at24_data *at24;
567 struct regmap *regmap;
568 size_t at24_size;
569 bool writable;
570 u8 test_byte;
571 int err;
572
573 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
574 i2c_fn_block = i2c_check_functionality(client->adapter,
575 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
576
577 err = at24_get_pdata(dev, &pdata);
578 if (err)
579 return err;
580
581 if (!i2c_fn_i2c && !i2c_fn_block)
582 pdata.page_size = 1;
583
584 if (!pdata.page_size) {
585 dev_err(dev, "page_size must not be 0!\n");
586 return -EINVAL;
587 }
588
589 if (!is_power_of_2(pdata.page_size))
590 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
591
592 if (pdata.flags & AT24_FLAG_TAKE8ADDR)
593 num_addresses = 8;
594 else
595 num_addresses = DIV_ROUND_UP(pdata.byte_len,
596 (pdata.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
597
598 if ((pdata.flags & AT24_FLAG_SERIAL) && (pdata.flags & AT24_FLAG_MAC)) {
599 dev_err(dev,
600 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
601 return -EINVAL;
602 }
603
604 regmap_config.val_bits = 8;
605 regmap_config.reg_bits = (pdata.flags & AT24_FLAG_ADDR16) ? 16 : 8;
606 regmap_config.disable_locking = true;
607
608 regmap = devm_regmap_init_i2c(client, ®map_config);
609 if (IS_ERR(regmap))
610 return PTR_ERR(regmap);
611
612 at24_size = sizeof(*at24) + num_addresses * sizeof(struct at24_client);
613 at24 = devm_kzalloc(dev, at24_size, GFP_KERNEL);
614 if (!at24)
615 return -ENOMEM;
616
617 mutex_init(&at24->lock);
618 at24->byte_len = pdata.byte_len;
619 at24->page_size = pdata.page_size;
620 at24->flags = pdata.flags;
621 at24->num_addresses = num_addresses;
622 at24->offset_adj = at24_get_offset_adj(pdata.flags, pdata.byte_len);
623 at24->client[0].client = client;
624 at24->client[0].regmap = regmap;
625
626 at24->wp_gpio = devm_gpiod_get_optional(dev, "wp", GPIOD_OUT_HIGH);
627 if (IS_ERR(at24->wp_gpio))
628 return PTR_ERR(at24->wp_gpio);
629
630 writable = !(pdata.flags & AT24_FLAG_READONLY);
631 if (writable) {
632 at24->write_max = min_t(unsigned int,
633 pdata.page_size, at24_io_limit);
634 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
635 at24->write_max = I2C_SMBUS_BLOCK_MAX;
636 }
637
638 /* use dummy devices for multiple-address chips */
639 for (i = 1; i < num_addresses; i++) {
640 at24->client[i].client = i2c_new_dummy(client->adapter,
641 client->addr + i);
642 if (!at24->client[i].client) {
643 dev_err(dev, "address 0x%02x unavailable\n",
644 client->addr + i);
645 err = -EADDRINUSE;
646 goto err_clients;
647 }
648 at24->client[i].regmap = devm_regmap_init_i2c(
649 at24->client[i].client,
650 ®map_config);
651 if (IS_ERR(at24->client[i].regmap)) {
652 err = PTR_ERR(at24->client[i].regmap);
653 goto err_clients;
654 }
655 }
656
657 i2c_set_clientdata(client, at24);
658
659 /* enable runtime pm */
660 pm_runtime_set_active(dev);
661 pm_runtime_enable(dev);
662
663 /*
664 * Perform a one-byte test read to verify that the
665 * chip is functional.
666 */
667 err = at24_read(at24, 0, &test_byte, 1);
668 pm_runtime_idle(dev);
669 if (err) {
670 err = -ENODEV;
671 goto err_clients;
672 }
673
674 nvmem_config.name = dev_name(dev);
675 nvmem_config.dev = dev;
676 nvmem_config.read_only = !writable;
677 nvmem_config.root_only = true;
678 nvmem_config.owner = THIS_MODULE;
679 nvmem_config.compat = true;
680 nvmem_config.base_dev = dev;
681 nvmem_config.reg_read = at24_read;
682 nvmem_config.reg_write = at24_write;
683 nvmem_config.priv = at24;
684 nvmem_config.stride = 1;
685 nvmem_config.word_size = 1;
686 nvmem_config.size = pdata.byte_len;
687
688 at24->nvmem = nvmem_register(&nvmem_config);
689 if (IS_ERR(at24->nvmem)) {
690 err = PTR_ERR(at24->nvmem);
691 goto err_clients;
692 }
693
694 dev_info(dev, "%u byte %s EEPROM, %s, %u bytes/write\n",
695 pdata.byte_len, client->name,
696 writable ? "writable" : "read-only", at24->write_max);
697
698 /* export data to kernel code */
699 if (pdata.setup)
700 pdata.setup(at24->nvmem, pdata.context);
701
702 return 0;
703
704err_clients:
705 for (i = 1; i < num_addresses; i++)
706 if (at24->client[i].client)
707 i2c_unregister_device(at24->client[i].client);
708
709 pm_runtime_disable(dev);
710
711 return err;
712}
713
714static int at24_remove(struct i2c_client *client)
715{
716 struct at24_data *at24;
717 int i;
718
719 at24 = i2c_get_clientdata(client);
720
721 nvmem_unregister(at24->nvmem);
722
723 for (i = 1; i < at24->num_addresses; i++)
724 i2c_unregister_device(at24->client[i].client);
725
726 pm_runtime_disable(&client->dev);
727 pm_runtime_set_suspended(&client->dev);
728
729 return 0;
730}
731
732static struct i2c_driver at24_driver = {
733 .driver = {
734 .name = "at24",
735 .of_match_table = at24_of_match,
736 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
737 },
738 .probe_new = at24_probe,
739 .remove = at24_remove,
740 .id_table = at24_ids,
741};
742
743static int __init at24_init(void)
744{
745 if (!at24_io_limit) {
746 pr_err("at24: at24_io_limit must not be 0!\n");
747 return -EINVAL;
748 }
749
750 at24_io_limit = rounddown_pow_of_two(at24_io_limit);
751 return i2c_add_driver(&at24_driver);
752}
753module_init(at24_init);
754
755static void __exit at24_exit(void)
756{
757 i2c_del_driver(&at24_driver);
758}
759module_exit(at24_exit);
760
761MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
762MODULE_AUTHOR("David Brownell and Wolfram Sang");
763MODULE_LICENSE("GPL");
1/*
2 * at24.c - handle most I2C EEPROMs
3 *
4 * Copyright (C) 2005-2007 David Brownell
5 * Copyright (C) 2008 Wolfram Sang, Pengutronix
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
11 */
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/slab.h>
16#include <linux/delay.h>
17#include <linux/mutex.h>
18#include <linux/mod_devicetable.h>
19#include <linux/log2.h>
20#include <linux/bitops.h>
21#include <linux/jiffies.h>
22#include <linux/of.h>
23#include <linux/acpi.h>
24#include <linux/i2c.h>
25#include <linux/nvmem-provider.h>
26#include <linux/regmap.h>
27#include <linux/platform_data/at24.h>
28
29/*
30 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
31 * Differences between different vendor product lines (like Atmel AT24C or
32 * MicroChip 24LC, etc) won't much matter for typical read/write access.
33 * There are also I2C RAM chips, likewise interchangeable. One example
34 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
35 *
36 * However, misconfiguration can lose data. "Set 16-bit memory address"
37 * to a part with 8-bit addressing will overwrite data. Writing with too
38 * big a page size also loses data. And it's not safe to assume that the
39 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
40 * uses 0x51, for just one example.
41 *
42 * Accordingly, explicit board-specific configuration data should be used
43 * in almost all cases. (One partial exception is an SMBus used to access
44 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
45 *
46 * So this driver uses "new style" I2C driver binding, expecting to be
47 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
48 * similar kernel-resident tables; or, configuration data coming from
49 * a bootloader.
50 *
51 * Other than binding model, current differences from "eeprom" driver are
52 * that this one handles write access and isn't restricted to 24c02 devices.
53 * It also handles larger devices (32 kbit and up) with two-byte addresses,
54 * which won't work on pure SMBus systems.
55 */
56
57struct at24_data {
58 struct at24_platform_data chip;
59 int use_smbus;
60 int use_smbus_write;
61
62 /*
63 * Lock protects against activities from other Linux tasks,
64 * but not from changes by other I2C masters.
65 */
66 struct mutex lock;
67
68 u8 *writebuf;
69 unsigned write_max;
70 unsigned num_addresses;
71
72 struct regmap_config regmap_config;
73 struct nvmem_config nvmem_config;
74 struct nvmem_device *nvmem;
75
76 /*
77 * Some chips tie up multiple I2C addresses; dummy devices reserve
78 * them for us, and we'll use them with SMBus calls.
79 */
80 struct i2c_client *client[];
81};
82
83/*
84 * This parameter is to help this driver avoid blocking other drivers out
85 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
86 * clock, one 256 byte read takes about 1/43 second which is excessive;
87 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
88 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
89 *
90 * This value is forced to be a power of two so that writes align on pages.
91 */
92static unsigned io_limit = 128;
93module_param(io_limit, uint, 0);
94MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
95
96/*
97 * Specs often allow 5 msec for a page write, sometimes 20 msec;
98 * it's important to recover from write timeouts.
99 */
100static unsigned write_timeout = 25;
101module_param(write_timeout, uint, 0);
102MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
103
104#define AT24_SIZE_BYTELEN 5
105#define AT24_SIZE_FLAGS 8
106
107#define AT24_BITMASK(x) (BIT(x) - 1)
108
109/* create non-zero magic value for given eeprom parameters */
110#define AT24_DEVICE_MAGIC(_len, _flags) \
111 ((1 << AT24_SIZE_FLAGS | (_flags)) \
112 << AT24_SIZE_BYTELEN | ilog2(_len))
113
114static const struct i2c_device_id at24_ids[] = {
115 /* needs 8 addresses as A0-A2 are ignored */
116 { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) },
117 /* old variants can't be handled with this generic entry! */
118 { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) },
119 { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) },
120 /* spd is a 24c02 in memory DIMMs */
121 { "spd", AT24_DEVICE_MAGIC(2048 / 8,
122 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
123 { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) },
124 /* 24rf08 quirk is handled at i2c-core */
125 { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) },
126 { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) },
127 { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) },
128 { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) },
129 { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) },
130 { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) },
131 { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) },
132 { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) },
133 { "at24", 0 },
134 { /* END OF LIST */ }
135};
136MODULE_DEVICE_TABLE(i2c, at24_ids);
137
138static const struct acpi_device_id at24_acpi_ids[] = {
139 { "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) },
140 { }
141};
142MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
143
144/*-------------------------------------------------------------------------*/
145
146/*
147 * This routine supports chips which consume multiple I2C addresses. It
148 * computes the addressing information to be used for a given r/w request.
149 * Assumes that sanity checks for offset happened at sysfs-layer.
150 */
151static struct i2c_client *at24_translate_offset(struct at24_data *at24,
152 unsigned *offset)
153{
154 unsigned i;
155
156 if (at24->chip.flags & AT24_FLAG_ADDR16) {
157 i = *offset >> 16;
158 *offset &= 0xffff;
159 } else {
160 i = *offset >> 8;
161 *offset &= 0xff;
162 }
163
164 return at24->client[i];
165}
166
167static ssize_t at24_eeprom_read(struct at24_data *at24, char *buf,
168 unsigned offset, size_t count)
169{
170 struct i2c_msg msg[2];
171 u8 msgbuf[2];
172 struct i2c_client *client;
173 unsigned long timeout, read_time;
174 int status, i;
175
176 memset(msg, 0, sizeof(msg));
177
178 /*
179 * REVISIT some multi-address chips don't rollover page reads to
180 * the next slave address, so we may need to truncate the count.
181 * Those chips might need another quirk flag.
182 *
183 * If the real hardware used four adjacent 24c02 chips and that
184 * were misconfigured as one 24c08, that would be a similar effect:
185 * one "eeprom" file not four, but larger reads would fail when
186 * they crossed certain pages.
187 */
188
189 /*
190 * Slave address and byte offset derive from the offset. Always
191 * set the byte address; on a multi-master board, another master
192 * may have changed the chip's "current" address pointer.
193 */
194 client = at24_translate_offset(at24, &offset);
195
196 if (count > io_limit)
197 count = io_limit;
198
199 if (at24->use_smbus) {
200 /* Smaller eeproms can work given some SMBus extension calls */
201 if (count > I2C_SMBUS_BLOCK_MAX)
202 count = I2C_SMBUS_BLOCK_MAX;
203 } else {
204 /*
205 * When we have a better choice than SMBus calls, use a
206 * combined I2C message. Write address; then read up to
207 * io_limit data bytes. Note that read page rollover helps us
208 * here (unlike writes). msgbuf is u8 and will cast to our
209 * needs.
210 */
211 i = 0;
212 if (at24->chip.flags & AT24_FLAG_ADDR16)
213 msgbuf[i++] = offset >> 8;
214 msgbuf[i++] = offset;
215
216 msg[0].addr = client->addr;
217 msg[0].buf = msgbuf;
218 msg[0].len = i;
219
220 msg[1].addr = client->addr;
221 msg[1].flags = I2C_M_RD;
222 msg[1].buf = buf;
223 msg[1].len = count;
224 }
225
226 /*
227 * Reads fail if the previous write didn't complete yet. We may
228 * loop a few times until this one succeeds, waiting at least
229 * long enough for one entire page write to work.
230 */
231 timeout = jiffies + msecs_to_jiffies(write_timeout);
232 do {
233 read_time = jiffies;
234 if (at24->use_smbus) {
235 status = i2c_smbus_read_i2c_block_data_or_emulated(client, offset,
236 count, buf);
237 } else {
238 status = i2c_transfer(client->adapter, msg, 2);
239 if (status == 2)
240 status = count;
241 }
242 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
243 count, offset, status, jiffies);
244
245 if (status == count)
246 return count;
247
248 /* REVISIT: at HZ=100, this is sloooow */
249 msleep(1);
250 } while (time_before(read_time, timeout));
251
252 return -ETIMEDOUT;
253}
254
255static ssize_t at24_read(struct at24_data *at24,
256 char *buf, loff_t off, size_t count)
257{
258 ssize_t retval = 0;
259
260 if (unlikely(!count))
261 return count;
262
263 /*
264 * Read data from chip, protecting against concurrent updates
265 * from this host, but not from other I2C masters.
266 */
267 mutex_lock(&at24->lock);
268
269 while (count) {
270 ssize_t status;
271
272 status = at24_eeprom_read(at24, buf, off, count);
273 if (status <= 0) {
274 if (retval == 0)
275 retval = status;
276 break;
277 }
278 buf += status;
279 off += status;
280 count -= status;
281 retval += status;
282 }
283
284 mutex_unlock(&at24->lock);
285
286 return retval;
287}
288
289/*
290 * Note that if the hardware write-protect pin is pulled high, the whole
291 * chip is normally write protected. But there are plenty of product
292 * variants here, including OTP fuses and partial chip protect.
293 *
294 * We only use page mode writes; the alternative is sloooow. This routine
295 * writes at most one page.
296 */
297static ssize_t at24_eeprom_write(struct at24_data *at24, const char *buf,
298 unsigned offset, size_t count)
299{
300 struct i2c_client *client;
301 struct i2c_msg msg;
302 ssize_t status = 0;
303 unsigned long timeout, write_time;
304 unsigned next_page;
305
306 /* Get corresponding I2C address and adjust offset */
307 client = at24_translate_offset(at24, &offset);
308
309 /* write_max is at most a page */
310 if (count > at24->write_max)
311 count = at24->write_max;
312
313 /* Never roll over backwards, to the start of this page */
314 next_page = roundup(offset + 1, at24->chip.page_size);
315 if (offset + count > next_page)
316 count = next_page - offset;
317
318 /* If we'll use I2C calls for I/O, set up the message */
319 if (!at24->use_smbus) {
320 int i = 0;
321
322 msg.addr = client->addr;
323 msg.flags = 0;
324
325 /* msg.buf is u8 and casts will mask the values */
326 msg.buf = at24->writebuf;
327 if (at24->chip.flags & AT24_FLAG_ADDR16)
328 msg.buf[i++] = offset >> 8;
329
330 msg.buf[i++] = offset;
331 memcpy(&msg.buf[i], buf, count);
332 msg.len = i + count;
333 }
334
335 /*
336 * Writes fail if the previous one didn't complete yet. We may
337 * loop a few times until this one succeeds, waiting at least
338 * long enough for one entire page write to work.
339 */
340 timeout = jiffies + msecs_to_jiffies(write_timeout);
341 do {
342 write_time = jiffies;
343 if (at24->use_smbus_write) {
344 switch (at24->use_smbus_write) {
345 case I2C_SMBUS_I2C_BLOCK_DATA:
346 status = i2c_smbus_write_i2c_block_data(client,
347 offset, count, buf);
348 break;
349 case I2C_SMBUS_BYTE_DATA:
350 status = i2c_smbus_write_byte_data(client,
351 offset, buf[0]);
352 break;
353 }
354
355 if (status == 0)
356 status = count;
357 } else {
358 status = i2c_transfer(client->adapter, &msg, 1);
359 if (status == 1)
360 status = count;
361 }
362 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
363 count, offset, status, jiffies);
364
365 if (status == count)
366 return count;
367
368 /* REVISIT: at HZ=100, this is sloooow */
369 msleep(1);
370 } while (time_before(write_time, timeout));
371
372 return -ETIMEDOUT;
373}
374
375static ssize_t at24_write(struct at24_data *at24, const char *buf, loff_t off,
376 size_t count)
377{
378 ssize_t retval = 0;
379
380 if (unlikely(!count))
381 return count;
382
383 /*
384 * Write data to chip, protecting against concurrent updates
385 * from this host, but not from other I2C masters.
386 */
387 mutex_lock(&at24->lock);
388
389 while (count) {
390 ssize_t status;
391
392 status = at24_eeprom_write(at24, buf, off, count);
393 if (status <= 0) {
394 if (retval == 0)
395 retval = status;
396 break;
397 }
398 buf += status;
399 off += status;
400 count -= status;
401 retval += status;
402 }
403
404 mutex_unlock(&at24->lock);
405
406 return retval;
407}
408
409/*-------------------------------------------------------------------------*/
410
411/*
412 * Provide a regmap interface, which is registered with the NVMEM
413 * framework
414*/
415static int at24_regmap_read(void *context, const void *reg, size_t reg_size,
416 void *val, size_t val_size)
417{
418 struct at24_data *at24 = context;
419 off_t offset = *(u32 *)reg;
420 int err;
421
422 err = at24_read(at24, val, offset, val_size);
423 if (err)
424 return err;
425 return 0;
426}
427
428static int at24_regmap_write(void *context, const void *data, size_t count)
429{
430 struct at24_data *at24 = context;
431 const char *buf;
432 u32 offset;
433 size_t len;
434 int err;
435
436 memcpy(&offset, data, sizeof(offset));
437 buf = (const char *)data + sizeof(offset);
438 len = count - sizeof(offset);
439
440 err = at24_write(at24, buf, offset, len);
441 if (err)
442 return err;
443 return 0;
444}
445
446static const struct regmap_bus at24_regmap_bus = {
447 .read = at24_regmap_read,
448 .write = at24_regmap_write,
449 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
450};
451
452/*-------------------------------------------------------------------------*/
453
454#ifdef CONFIG_OF
455static void at24_get_ofdata(struct i2c_client *client,
456 struct at24_platform_data *chip)
457{
458 const __be32 *val;
459 struct device_node *node = client->dev.of_node;
460
461 if (node) {
462 if (of_get_property(node, "read-only", NULL))
463 chip->flags |= AT24_FLAG_READONLY;
464 val = of_get_property(node, "pagesize", NULL);
465 if (val)
466 chip->page_size = be32_to_cpup(val);
467 }
468}
469#else
470static void at24_get_ofdata(struct i2c_client *client,
471 struct at24_platform_data *chip)
472{ }
473#endif /* CONFIG_OF */
474
475static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
476{
477 struct at24_platform_data chip;
478 kernel_ulong_t magic = 0;
479 bool writable;
480 int use_smbus = 0;
481 int use_smbus_write = 0;
482 struct at24_data *at24;
483 int err;
484 unsigned i, num_addresses;
485 struct regmap *regmap;
486
487 if (client->dev.platform_data) {
488 chip = *(struct at24_platform_data *)client->dev.platform_data;
489 } else {
490 if (id) {
491 magic = id->driver_data;
492 } else {
493 const struct acpi_device_id *aid;
494
495 aid = acpi_match_device(at24_acpi_ids, &client->dev);
496 if (aid)
497 magic = aid->driver_data;
498 }
499 if (!magic)
500 return -ENODEV;
501
502 chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
503 magic >>= AT24_SIZE_BYTELEN;
504 chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
505 /*
506 * This is slow, but we can't know all eeproms, so we better
507 * play safe. Specifying custom eeprom-types via platform_data
508 * is recommended anyhow.
509 */
510 chip.page_size = 1;
511
512 /* update chipdata if OF is present */
513 at24_get_ofdata(client, &chip);
514
515 chip.setup = NULL;
516 chip.context = NULL;
517 }
518
519 if (!is_power_of_2(chip.byte_len))
520 dev_warn(&client->dev,
521 "byte_len looks suspicious (no power of 2)!\n");
522 if (!chip.page_size) {
523 dev_err(&client->dev, "page_size must not be 0!\n");
524 return -EINVAL;
525 }
526 if (!is_power_of_2(chip.page_size))
527 dev_warn(&client->dev,
528 "page_size looks suspicious (no power of 2)!\n");
529
530 /* Use I2C operations unless we're stuck with SMBus extensions. */
531 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
532 if (chip.flags & AT24_FLAG_ADDR16)
533 return -EPFNOSUPPORT;
534
535 if (i2c_check_functionality(client->adapter,
536 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
537 use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
538 } else if (i2c_check_functionality(client->adapter,
539 I2C_FUNC_SMBUS_READ_WORD_DATA)) {
540 use_smbus = I2C_SMBUS_WORD_DATA;
541 } else if (i2c_check_functionality(client->adapter,
542 I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
543 use_smbus = I2C_SMBUS_BYTE_DATA;
544 } else {
545 return -EPFNOSUPPORT;
546 }
547 }
548
549 /* Use I2C operations unless we're stuck with SMBus extensions. */
550 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
551 if (i2c_check_functionality(client->adapter,
552 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
553 use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA;
554 } else if (i2c_check_functionality(client->adapter,
555 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
556 use_smbus_write = I2C_SMBUS_BYTE_DATA;
557 chip.page_size = 1;
558 }
559 }
560
561 if (chip.flags & AT24_FLAG_TAKE8ADDR)
562 num_addresses = 8;
563 else
564 num_addresses = DIV_ROUND_UP(chip.byte_len,
565 (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
566
567 at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) +
568 num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
569 if (!at24)
570 return -ENOMEM;
571
572 mutex_init(&at24->lock);
573 at24->use_smbus = use_smbus;
574 at24->use_smbus_write = use_smbus_write;
575 at24->chip = chip;
576 at24->num_addresses = num_addresses;
577
578 writable = !(chip.flags & AT24_FLAG_READONLY);
579 if (writable) {
580 if (!use_smbus || use_smbus_write) {
581
582 unsigned write_max = chip.page_size;
583
584 if (write_max > io_limit)
585 write_max = io_limit;
586 if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
587 write_max = I2C_SMBUS_BLOCK_MAX;
588 at24->write_max = write_max;
589
590 /* buffer (data + address at the beginning) */
591 at24->writebuf = devm_kzalloc(&client->dev,
592 write_max + 2, GFP_KERNEL);
593 if (!at24->writebuf)
594 return -ENOMEM;
595 } else {
596 dev_warn(&client->dev,
597 "cannot write due to controller restrictions.");
598 }
599 }
600
601 at24->client[0] = client;
602
603 /* use dummy devices for multiple-address chips */
604 for (i = 1; i < num_addresses; i++) {
605 at24->client[i] = i2c_new_dummy(client->adapter,
606 client->addr + i);
607 if (!at24->client[i]) {
608 dev_err(&client->dev, "address 0x%02x unavailable\n",
609 client->addr + i);
610 err = -EADDRINUSE;
611 goto err_clients;
612 }
613 }
614
615 at24->regmap_config.reg_bits = 32;
616 at24->regmap_config.val_bits = 8;
617 at24->regmap_config.reg_stride = 1;
618 at24->regmap_config.max_register = chip.byte_len - 1;
619
620 regmap = devm_regmap_init(&client->dev, &at24_regmap_bus, at24,
621 &at24->regmap_config);
622 if (IS_ERR(regmap)) {
623 dev_err(&client->dev, "regmap init failed\n");
624 err = PTR_ERR(regmap);
625 goto err_clients;
626 }
627
628 at24->nvmem_config.name = dev_name(&client->dev);
629 at24->nvmem_config.dev = &client->dev;
630 at24->nvmem_config.read_only = !writable;
631 at24->nvmem_config.root_only = true;
632 at24->nvmem_config.owner = THIS_MODULE;
633 at24->nvmem_config.compat = true;
634 at24->nvmem_config.base_dev = &client->dev;
635
636 at24->nvmem = nvmem_register(&at24->nvmem_config);
637
638 if (IS_ERR(at24->nvmem)) {
639 err = PTR_ERR(at24->nvmem);
640 goto err_clients;
641 }
642
643 i2c_set_clientdata(client, at24);
644
645 dev_info(&client->dev, "%u byte %s EEPROM, %s, %u bytes/write\n",
646 chip.byte_len, client->name,
647 writable ? "writable" : "read-only", at24->write_max);
648 if (use_smbus == I2C_SMBUS_WORD_DATA ||
649 use_smbus == I2C_SMBUS_BYTE_DATA) {
650 dev_notice(&client->dev, "Falling back to %s reads, "
651 "performance will suffer\n", use_smbus ==
652 I2C_SMBUS_WORD_DATA ? "word" : "byte");
653 }
654
655 /* export data to kernel code */
656 if (chip.setup)
657 chip.setup(at24->nvmem, chip.context);
658
659 return 0;
660
661err_clients:
662 for (i = 1; i < num_addresses; i++)
663 if (at24->client[i])
664 i2c_unregister_device(at24->client[i]);
665
666 return err;
667}
668
669static int at24_remove(struct i2c_client *client)
670{
671 struct at24_data *at24;
672 int i;
673
674 at24 = i2c_get_clientdata(client);
675
676 nvmem_unregister(at24->nvmem);
677
678 for (i = 1; i < at24->num_addresses; i++)
679 i2c_unregister_device(at24->client[i]);
680
681 return 0;
682}
683
684/*-------------------------------------------------------------------------*/
685
686static struct i2c_driver at24_driver = {
687 .driver = {
688 .name = "at24",
689 .acpi_match_table = ACPI_PTR(at24_acpi_ids),
690 },
691 .probe = at24_probe,
692 .remove = at24_remove,
693 .id_table = at24_ids,
694};
695
696static int __init at24_init(void)
697{
698 if (!io_limit) {
699 pr_err("at24: io_limit must not be 0!\n");
700 return -EINVAL;
701 }
702
703 io_limit = rounddown_pow_of_two(io_limit);
704 return i2c_add_driver(&at24_driver);
705}
706module_init(at24_init);
707
708static void __exit at24_exit(void)
709{
710 i2c_del_driver(&at24_driver);
711}
712module_exit(at24_exit);
713
714MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
715MODULE_AUTHOR("David Brownell and Wolfram Sang");
716MODULE_LICENSE("GPL");