1/*
  2 * Copyright 2012-15 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 *
 24 */
 25#ifndef __DAL_MEM_INPUT_H__
 26#define __DAL_MEM_INPUT_H__
 27
 28#include "dc.h"
 29#include "include/grph_object_id.h"
 30
 31#include "dml/display_mode_structs.h"
 32
 33struct dchub_init_data;
 34struct cstate_pstate_watermarks_st {
 35	uint32_t cstate_exit_ns;
 36	uint32_t cstate_enter_plus_exit_ns;
 37	uint32_t pstate_change_ns;
 38};
 39
 40struct dcn_watermarks {
 41	uint32_t pte_meta_urgent_ns;
 42	uint32_t urgent_ns;
 43	struct cstate_pstate_watermarks_st cstate_pstate;
 44};
 45
 46struct dcn_watermark_set {
 47	struct dcn_watermarks a;
 48	struct dcn_watermarks b;
 49	struct dcn_watermarks c;
 50	struct dcn_watermarks d;
 51};
 52
 53struct dce_watermarks {
 54	int a_mark;
 55	int b_mark;
 56	int c_mark;
 57	int d_mark;
 58};
 59
 60struct stutter_modes {
 61	bool enhanced;
 62	bool quad_dmif_buffer;
 63	bool watermark_nb_pstate;
 64};
 65
 66struct mem_input {
 67	struct mem_input_funcs *funcs;
 68	struct dc_context *ctx;
 69	struct dc_plane_address request_address;
 70	struct dc_plane_address current_address;
 71	int inst;
 72	struct stutter_modes stutter_mode;
 73};
 74
 75struct vm_system_aperture_param {
 76	PHYSICAL_ADDRESS_LOC sys_default;
 77	PHYSICAL_ADDRESS_LOC sys_low;
 78	PHYSICAL_ADDRESS_LOC sys_high;
 79};
 80
 81struct vm_context0_param {
 82	PHYSICAL_ADDRESS_LOC pte_base;
 83	PHYSICAL_ADDRESS_LOC pte_start;
 84	PHYSICAL_ADDRESS_LOC pte_end;
 85	PHYSICAL_ADDRESS_LOC fault_default;
 86};
 87
 88struct mem_input_funcs {
 89	void (*mem_input_setup)(
 90			struct mem_input *mem_input,
 91			struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
 92			struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
 93			struct _vcs_dpi_display_rq_regs_st *rq_regs,
 94			struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
 95
 96	void (*dcc_control)(struct mem_input *mem_input, bool enable,
 97			bool independent_64b_blks);
 98	void (*mem_program_viewport)(
 99			struct mem_input *mem_input,
100			const struct rect *viewport,
101			const struct rect *viewport_c);
102
103	void (*mem_input_program_display_marks)(
104		struct mem_input *mem_input,
105		struct dce_watermarks nbp,
106		struct dce_watermarks stutter,
107		struct dce_watermarks urgent,
108		uint32_t total_dest_line_time_ns);
109
110	void (*mem_input_program_chroma_display_marks)(
111			struct mem_input *mem_input,
112			struct dce_watermarks nbp,
113			struct dce_watermarks stutter,
114			struct dce_watermarks urgent,
115			uint32_t total_dest_line_time_ns);
116
117	void (*allocate_mem_input)(
118		struct mem_input *mem_input,
119		uint32_t h_total,/* for current target */
120		uint32_t v_total,/* for current target */
121		uint32_t pix_clk_khz,/* for current target */
122		uint32_t total_streams_num);
123
124	void (*free_mem_input)(
125		struct mem_input *mem_input,
126		uint32_t paths_num);
127
128	bool (*mem_input_program_surface_flip_and_addr)(
129		struct mem_input *mem_input,
130		const struct dc_plane_address *address,
131		bool flip_immediate);
132
133	void (*mem_input_program_pte_vm)(
134		struct mem_input *mem_input,
135		enum surface_pixel_format format,
136		union dc_tiling_info *tiling_info,
137		enum dc_rotation_angle rotation);
138
139	void (*mem_input_set_vm_system_aperture_settings)(
140			struct mem_input *mem_input,
141			struct vm_system_aperture_param *apt);
142
143	void (*mem_input_set_vm_context0_settings)(
144			struct mem_input *mem_input,
145			const struct vm_context0_param *vm0);
146
147	void (*mem_input_program_surface_config)(
148		struct mem_input *mem_input,
149		enum surface_pixel_format format,
150		union dc_tiling_info *tiling_info,
151		union plane_size *plane_size,
152		enum dc_rotation_angle rotation,
153		struct dc_plane_dcc_param *dcc,
154		bool horizontal_mirror);
155
156	bool (*mem_input_is_flip_pending)(struct mem_input *mem_input);
157
158	void (*mem_input_update_dchub)(struct mem_input *mem_input,
159				struct dchub_init_data *dh_data);
160
161	void (*set_blank)(struct mem_input *mi, bool blank);
162	void (*set_hubp_blank_en)(struct mem_input *mi, bool blank);
163
164	void (*set_cursor_attributes)(
165			struct mem_input *mem_input,
166			const struct dc_cursor_attributes *attr);
167
168	void (*set_cursor_position)(
169			struct mem_input *mem_input,
170			const struct dc_cursor_position *pos,
171			const struct dc_cursor_mi_param *param);
172
173};
174
175#endif