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v4.17
  1// SPDX-License-Identifier: GPL-2.0
  2/ {
  3	model = "QNAP TS219 family";
  4	compatible = "qnap,ts219", "marvell,kirkwood";
  5
  6	memory {
  7		device_type = "memory";
  8		reg = <0x00000000 0x20000000>;
  9	};
 10
 11	chosen {
 12		bootargs = "console=ttyS0,115200n8";
 13		stdout-path = &uart0;
 14	};
 15
 
 
 
 
 
 
 
 
 
 
 16	ocp@f1000000 {
 17		i2c@11000 {
 18			status = "okay";
 19			clock-frequency = <400000>;
 20
 21			s35390a: s35390a@30 {
 22				compatible = "s35390a";
 23				reg = <0x30>;
 24			};
 25		};
 26		serial@12000 {
 27			status = "okay";
 28		};
 29		serial@12100 {
 30			status = "okay";
 31		};
 32		poweroff@12100 {
 33			compatible = "qnap,power-off";
 34			reg = <0x12100 0x100>;
 35			clocks = <&gate_clk 7>;
 36		};
 37		spi@10600 {
 38			status = "okay";
 39
 40			m25p128@0 {
 41				#address-cells = <1>;
 42				#size-cells = <1>;
 43				compatible = "m25p128", "jedec,spi-nor";
 44				reg = <0>;
 45				spi-max-frequency = <20000000>;
 46				mode = <0>;
 47
 48				partition@0 {
 49					reg = <0x00000000 0x00080000>;
 50					label = "U-Boot";
 51				};
 52
 53				partition@200000 {
 54					reg = <0x00200000 0x00200000>;
 55					label = "Kernel";
 56				};
 57
 58				partition@400000 {
 59					reg = <0x00400000 0x00900000>;
 60					label = "RootFS1";
 61				};
 62				partition@d00000 {
 63					reg = <0x00d00000 0x00300000>;
 64					label = "RootFS2";
 65				};
 66				partition@40000 {
 67					reg = <0x00080000 0x00040000>;
 68					label = "U-Boot Config";
 69				};
 70				partition@c0000 {
 71					reg = <0x000c0000 0x00140000>;
 72					label = "NAS Config";
 73				};
 74			};
 75		};
 76		sata@80000 {
 77			pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
 78			pinctrl-names = "default";
 79			status = "okay";
 80			nr-ports = <2>;
 81		};
 82	};
 83};
 84
 85&mdio {
 86	status = "okay";
 87
 88	ethphy0: ethernet-phy@X {
 89                /* overwrite reg property in board file */
 90	};
 91};
 92
 93&eth0 {
 94	status = "okay";
 95	ethernet0-port@0 {
 96		phy-handle = <&ethphy0>;
 97	};
 98};
 99
100&pciec {
101        status = "okay";
102};
103
104&pcie0 {
105	status = "okay";
106};
v4.6
 
  1/ {
  2	model = "QNAP TS219 family";
  3	compatible = "qnap,ts219", "marvell,kirkwood";
  4
  5	memory {
  6		device_type = "memory";
  7		reg = <0x00000000 0x20000000>;
  8	};
  9
 10	chosen {
 11		bootargs = "console=ttyS0,115200n8";
 12		stdout-path = &uart0;
 13	};
 14
 15	mbus {
 16		pcie-controller {
 17			status = "okay";
 18
 19			pcie@1,0 {
 20				status = "okay";
 21			};
 22		};
 23	};
 24
 25	ocp@f1000000 {
 26		i2c@11000 {
 27			status = "okay";
 28			clock-frequency = <400000>;
 29
 30			s35390a: s35390a@30 {
 31				compatible = "s35390a";
 32				reg = <0x30>;
 33			};
 34		};
 35		serial@12000 {
 36			status = "okay";
 37		};
 38		serial@12100 {
 39			status = "okay";
 40		};
 41		poweroff@12100 {
 42			compatible = "qnap,power-off";
 43			reg = <0x12100 0x100>;
 44			clocks = <&gate_clk 7>;
 45		};
 46		spi@10600 {
 47			status = "okay";
 48
 49			m25p128@0 {
 50				#address-cells = <1>;
 51				#size-cells = <1>;
 52				compatible = "m25p128", "jedec,spi-nor";
 53				reg = <0>;
 54				spi-max-frequency = <20000000>;
 55				mode = <0>;
 56
 57				partition@0000000 {
 58					reg = <0x00000000 0x00080000>;
 59					label = "U-Boot";
 60				};
 61
 62				partition@00200000 {
 63					reg = <0x00200000 0x00200000>;
 64					label = "Kernel";
 65				};
 66
 67				partition@00400000 {
 68					reg = <0x00400000 0x00900000>;
 69					label = "RootFS1";
 70				};
 71				partition@00d00000 {
 72					reg = <0x00d00000 0x00300000>;
 73					label = "RootFS2";
 74				};
 75				partition@00040000 {
 76					reg = <0x00080000 0x00040000>;
 77					label = "U-Boot Config";
 78				};
 79				partition@000c0000 {
 80					reg = <0x000c0000 0x00140000>;
 81					label = "NAS Config";
 82				};
 83			};
 84		};
 85		sata@80000 {
 86			pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
 87			pinctrl-names = "default";
 88			status = "okay";
 89			nr-ports = <2>;
 90		};
 91	};
 92};
 93
 94&mdio {
 95	status = "okay";
 96
 97	ethphy0: ethernet-phy {
 98                /* overwrite reg property in board file */
 99	};
100};
101
102&eth0 {
103	status = "okay";
104	ethernet0-port@0 {
105		phy-handle = <&ethphy0>;
106	};
 
 
 
 
 
 
 
 
107};