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v4.17
  1// SPDX-License-Identifier: GPL-2.0
  2/*
  3 * leon_pci.c: LEON Host PCI support
  4 *
  5 * Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom
  6 *
  7 * Code is partially derived from pcic.c
  8 */
  9
 10#include <linux/of_device.h>
 11#include <linux/kernel.h>
 12#include <linux/pci.h>
 13#include <linux/export.h>
 14#include <asm/leon.h>
 15#include <asm/leon_pci.h>
 16
 17/* The LEON architecture does not rely on a BIOS or bootloader to setup
 18 * PCI for us. The Linux generic routines are used to setup resources,
 19 * reset values of configuration-space register settings are preserved.
 20 *
 21 * PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
 22 * accessed through a Window which is translated to low 64KB in PCI space, the
 23 * first 4KB is not used so 60KB is available.
 24 */
 25void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
 26{
 27	LIST_HEAD(resources);
 28	struct pci_bus *root_bus;
 29	struct pci_host_bridge *bridge;
 30	int ret;
 31
 32	bridge = pci_alloc_host_bridge(0);
 33	if (!bridge)
 34		return;
 35
 36	pci_add_resource_offset(&resources, &info->io_space,
 37				info->io_space.start - 0x1000);
 38	pci_add_resource(&resources, &info->mem_space);
 39	info->busn.flags = IORESOURCE_BUS;
 40	pci_add_resource(&resources, &info->busn);
 41
 42	list_splice_init(&resources, &bridge->windows);
 43	bridge->dev.parent = &ofdev->dev;
 44	bridge->sysdata = info;
 45	bridge->busnr = 0;
 46	bridge->ops = info->ops;
 47	bridge->swizzle_irq = pci_common_swizzle;
 48	bridge->map_irq = info->map_irq;
 49
 50	ret = pci_scan_root_bus_bridge(bridge);
 51	if (ret) {
 52		pci_free_host_bridge(bridge);
 53		return;
 
 
 
 
 
 
 54	}
 55
 56	root_bus = bridge->bus;
 57
 58	/* Assign devices with resources */
 59	pci_assign_unassigned_resources();
 60	pci_bus_add_devices(root_bus);
 61}
 62
 63void pcibios_fixup_bus(struct pci_bus *pbus)
 64{
 65	struct pci_dev *dev;
 66	int i, has_io, has_mem;
 67	u16 cmd;
 68
 69	list_for_each_entry(dev, &pbus->devices, bus_list) {
 70		/*
 71		 * We can not rely on that the bootloader has enabled I/O
 72		 * or memory access to PCI devices. Instead we enable it here
 73		 * if the device has BARs of respective type.
 74		 */
 75		has_io = has_mem = 0;
 76		for (i = 0; i < PCI_ROM_RESOURCE; i++) {
 77			unsigned long f = dev->resource[i].flags;
 78			if (f & IORESOURCE_IO)
 79				has_io = 1;
 80			else if (f & IORESOURCE_MEM)
 81				has_mem = 1;
 82		}
 83		/* ROM BARs are mapped into 32-bit memory space */
 84		if (dev->resource[PCI_ROM_RESOURCE].end != 0) {
 85			dev->resource[PCI_ROM_RESOURCE].flags |=
 86							IORESOURCE_ROM_ENABLE;
 87			has_mem = 1;
 88		}
 89		pci_bus_read_config_word(pbus, dev->devfn, PCI_COMMAND, &cmd);
 90		if (has_io && !(cmd & PCI_COMMAND_IO)) {
 91#ifdef CONFIG_PCI_DEBUG
 92			printk(KERN_INFO "LEONPCI: Enabling I/O for dev %s\n",
 93					 pci_name(dev));
 94#endif
 95			cmd |= PCI_COMMAND_IO;
 96			pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
 97									cmd);
 98		}
 99		if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
100#ifdef CONFIG_PCI_DEBUG
101			printk(KERN_INFO "LEONPCI: Enabling MEMORY for dev"
102					 "%s\n", pci_name(dev));
103#endif
104			cmd |= PCI_COMMAND_MEMORY;
105			pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
106									cmd);
107		}
108	}
109}
v3.5.6
 
  1/*
  2 * leon_pci.c: LEON Host PCI support
  3 *
  4 * Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom
  5 *
  6 * Code is partially derived from pcic.c
  7 */
  8
  9#include <linux/of_device.h>
 10#include <linux/kernel.h>
 11#include <linux/pci.h>
 12#include <linux/export.h>
 13#include <asm/leon.h>
 14#include <asm/leon_pci.h>
 15
 16/* The LEON architecture does not rely on a BIOS or bootloader to setup
 17 * PCI for us. The Linux generic routines are used to setup resources,
 18 * reset values of configuration-space register settings are preserved.
 19 *
 20 * PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
 21 * accessed through a Window which is translated to low 64KB in PCI space, the
 22 * first 4KB is not used so 60KB is available.
 23 */
 24void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
 25{
 26	LIST_HEAD(resources);
 27	struct pci_bus *root_bus;
 
 
 
 
 
 
 28
 29	pci_add_resource_offset(&resources, &info->io_space,
 30				info->io_space.start - 0x1000);
 31	pci_add_resource(&resources, &info->mem_space);
 
 
 
 
 
 
 
 
 
 
 32
 33	root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
 34				     &resources);
 35	if (root_bus) {
 36		/* Setup IRQs of all devices using custom routines */
 37		pci_fixup_irqs(pci_common_swizzle, info->map_irq);
 38
 39		/* Assign devices with resources */
 40		pci_assign_unassigned_resources();
 41	} else {
 42		pci_free_resource_list(&resources);
 43	}
 
 
 
 
 
 
 44}
 45
 46void __devinit pcibios_fixup_bus(struct pci_bus *pbus)
 47{
 48	struct pci_dev *dev;
 49	int i, has_io, has_mem;
 50	u16 cmd;
 51
 52	list_for_each_entry(dev, &pbus->devices, bus_list) {
 53		/*
 54		 * We can not rely on that the bootloader has enabled I/O
 55		 * or memory access to PCI devices. Instead we enable it here
 56		 * if the device has BARs of respective type.
 57		 */
 58		has_io = has_mem = 0;
 59		for (i = 0; i < PCI_ROM_RESOURCE; i++) {
 60			unsigned long f = dev->resource[i].flags;
 61			if (f & IORESOURCE_IO)
 62				has_io = 1;
 63			else if (f & IORESOURCE_MEM)
 64				has_mem = 1;
 65		}
 66		/* ROM BARs are mapped into 32-bit memory space */
 67		if (dev->resource[PCI_ROM_RESOURCE].end != 0) {
 68			dev->resource[PCI_ROM_RESOURCE].flags |=
 69							IORESOURCE_ROM_ENABLE;
 70			has_mem = 1;
 71		}
 72		pci_bus_read_config_word(pbus, dev->devfn, PCI_COMMAND, &cmd);
 73		if (has_io && !(cmd & PCI_COMMAND_IO)) {
 74#ifdef CONFIG_PCI_DEBUG
 75			printk(KERN_INFO "LEONPCI: Enabling I/O for dev %s\n",
 76					 pci_name(dev));
 77#endif
 78			cmd |= PCI_COMMAND_IO;
 79			pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
 80									cmd);
 81		}
 82		if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
 83#ifdef CONFIG_PCI_DEBUG
 84			printk(KERN_INFO "LEONPCI: Enabling MEMORY for dev"
 85					 "%s\n", pci_name(dev));
 86#endif
 87			cmd |= PCI_COMMAND_MEMORY;
 88			pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
 89									cmd);
 90		}
 91	}
 92}
 93
 94/*
 95 * Other archs parse arguments here.
 96 */
 97char * __devinit pcibios_setup(char *str)
 98{
 99	return str;
100}
101
102resource_size_t pcibios_align_resource(void *data, const struct resource *res,
103				resource_size_t size, resource_size_t align)
104{
105	return res->start;
106}
107
108int pcibios_enable_device(struct pci_dev *dev, int mask)
109{
110	return pci_enable_resources(dev, mask);
111}
112
113void __devinit pcibios_update_irq(struct pci_dev *dev, int irq)
114{
115#ifdef CONFIG_PCI_DEBUG
116	printk(KERN_DEBUG "LEONPCI: Assigning IRQ %02d to %s\n", irq,
117		pci_name(dev));
118#endif
119	pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
120}
121
122/* in/out routines taken from pcic.c
123 *
124 * This probably belongs here rather than ioport.c because
125 * we do not want this crud linked into SBus kernels.
126 * Also, think for a moment about likes of floppy.c that
127 * include architecture specific parts. They may want to redefine ins/outs.
128 *
129 * We do not use horrible macros here because we want to
130 * advance pointer by sizeof(size).
131 */
132void outsb(unsigned long addr, const void *src, unsigned long count)
133{
134	while (count) {
135		count -= 1;
136		outb(*(const char *)src, addr);
137		src += 1;
138		/* addr += 1; */
139	}
140}
141EXPORT_SYMBOL(outsb);
142
143void outsw(unsigned long addr, const void *src, unsigned long count)
144{
145	while (count) {
146		count -= 2;
147		outw(*(const short *)src, addr);
148		src += 2;
149		/* addr += 2; */
150	}
151}
152EXPORT_SYMBOL(outsw);
153
154void outsl(unsigned long addr, const void *src, unsigned long count)
155{
156	while (count) {
157		count -= 4;
158		outl(*(const long *)src, addr);
159		src += 4;
160		/* addr += 4; */
161	}
162}
163EXPORT_SYMBOL(outsl);
164
165void insb(unsigned long addr, void *dst, unsigned long count)
166{
167	while (count) {
168		count -= 1;
169		*(unsigned char *)dst = inb(addr);
170		dst += 1;
171		/* addr += 1; */
172	}
173}
174EXPORT_SYMBOL(insb);
175
176void insw(unsigned long addr, void *dst, unsigned long count)
177{
178	while (count) {
179		count -= 2;
180		*(unsigned short *)dst = inw(addr);
181		dst += 2;
182		/* addr += 2; */
183	}
184}
185EXPORT_SYMBOL(insw);
186
187void insl(unsigned long addr, void *dst, unsigned long count)
188{
189	while (count) {
190		count -= 4;
191		/*
192		 * XXX I am sure we are in for an unaligned trap here.
193		 */
194		*(unsigned long *)dst = inl(addr);
195		dst += 4;
196		/* addr += 4; */
197	}
198}
199EXPORT_SYMBOL(insl);