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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * leon_pci.c: LEON Host PCI support
4 *
5 * Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom
6 *
7 * Code is partially derived from pcic.c
8 */
9
10#include <linux/of_device.h>
11#include <linux/kernel.h>
12#include <linux/pci.h>
13#include <linux/export.h>
14#include <asm/leon.h>
15#include <asm/leon_pci.h>
16
17/* The LEON architecture does not rely on a BIOS or bootloader to setup
18 * PCI for us. The Linux generic routines are used to setup resources,
19 * reset values of configuration-space register settings are preserved.
20 *
21 * PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
22 * accessed through a Window which is translated to low 64KB in PCI space, the
23 * first 4KB is not used so 60KB is available.
24 */
25void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
26{
27 LIST_HEAD(resources);
28 struct pci_bus *root_bus;
29 struct pci_host_bridge *bridge;
30 int ret;
31
32 bridge = pci_alloc_host_bridge(0);
33 if (!bridge)
34 return;
35
36 pci_add_resource_offset(&resources, &info->io_space,
37 info->io_space.start - 0x1000);
38 pci_add_resource(&resources, &info->mem_space);
39 info->busn.flags = IORESOURCE_BUS;
40 pci_add_resource(&resources, &info->busn);
41
42 list_splice_init(&resources, &bridge->windows);
43 bridge->dev.parent = &ofdev->dev;
44 bridge->sysdata = info;
45 bridge->busnr = 0;
46 bridge->ops = info->ops;
47 bridge->swizzle_irq = pci_common_swizzle;
48 bridge->map_irq = info->map_irq;
49
50 ret = pci_scan_root_bus_bridge(bridge);
51 if (ret) {
52 pci_free_host_bridge(bridge);
53 return;
54 }
55
56 root_bus = bridge->bus;
57
58 /* Assign devices with resources */
59 pci_assign_unassigned_resources();
60 pci_bus_add_devices(root_bus);
61}
62
63void pcibios_fixup_bus(struct pci_bus *pbus)
64{
65 struct pci_dev *dev;
66 int i, has_io, has_mem;
67 u16 cmd;
68
69 list_for_each_entry(dev, &pbus->devices, bus_list) {
70 /*
71 * We can not rely on that the bootloader has enabled I/O
72 * or memory access to PCI devices. Instead we enable it here
73 * if the device has BARs of respective type.
74 */
75 has_io = has_mem = 0;
76 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
77 unsigned long f = dev->resource[i].flags;
78 if (f & IORESOURCE_IO)
79 has_io = 1;
80 else if (f & IORESOURCE_MEM)
81 has_mem = 1;
82 }
83 /* ROM BARs are mapped into 32-bit memory space */
84 if (dev->resource[PCI_ROM_RESOURCE].end != 0) {
85 dev->resource[PCI_ROM_RESOURCE].flags |=
86 IORESOURCE_ROM_ENABLE;
87 has_mem = 1;
88 }
89 pci_bus_read_config_word(pbus, dev->devfn, PCI_COMMAND, &cmd);
90 if (has_io && !(cmd & PCI_COMMAND_IO)) {
91#ifdef CONFIG_PCI_DEBUG
92 printk(KERN_INFO "LEONPCI: Enabling I/O for dev %s\n",
93 pci_name(dev));
94#endif
95 cmd |= PCI_COMMAND_IO;
96 pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
97 cmd);
98 }
99 if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
100#ifdef CONFIG_PCI_DEBUG
101 printk(KERN_INFO "LEONPCI: Enabling MEMORY for dev"
102 "%s\n", pci_name(dev));
103#endif
104 cmd |= PCI_COMMAND_MEMORY;
105 pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
106 cmd);
107 }
108 }
109}
1/*
2 * leon_pci.c: LEON Host PCI support
3 *
4 * Copyright (C) 2011 Aeroflex Gaisler AB, Daniel Hellstrom
5 *
6 * Code is partially derived from pcic.c
7 */
8
9#include <linux/of_device.h>
10#include <linux/kernel.h>
11#include <linux/pci.h>
12#include <linux/export.h>
13#include <asm/leon.h>
14#include <asm/leon_pci.h>
15
16/* The LEON architecture does not rely on a BIOS or bootloader to setup
17 * PCI for us. The Linux generic routines are used to setup resources,
18 * reset values of configuration-space register settings are preserved.
19 *
20 * PCI Memory and Prefetchable Memory is direct-mapped. However I/O Space is
21 * accessed through a Window which is translated to low 64KB in PCI space, the
22 * first 4KB is not used so 60KB is available.
23 */
24void leon_pci_init(struct platform_device *ofdev, struct leon_pci_info *info)
25{
26 LIST_HEAD(resources);
27 struct pci_bus *root_bus;
28
29 pci_add_resource_offset(&resources, &info->io_space,
30 info->io_space.start - 0x1000);
31 pci_add_resource(&resources, &info->mem_space);
32 info->busn.flags = IORESOURCE_BUS;
33 pci_add_resource(&resources, &info->busn);
34
35 root_bus = pci_scan_root_bus(&ofdev->dev, 0, info->ops, info,
36 &resources);
37 if (root_bus) {
38 /* Setup IRQs of all devices using custom routines */
39 pci_fixup_irqs(pci_common_swizzle, info->map_irq);
40
41 /* Assign devices with resources */
42 pci_assign_unassigned_resources();
43 } else {
44 pci_free_resource_list(&resources);
45 }
46}
47
48void pcibios_fixup_bus(struct pci_bus *pbus)
49{
50 struct pci_dev *dev;
51 int i, has_io, has_mem;
52 u16 cmd;
53
54 list_for_each_entry(dev, &pbus->devices, bus_list) {
55 /*
56 * We can not rely on that the bootloader has enabled I/O
57 * or memory access to PCI devices. Instead we enable it here
58 * if the device has BARs of respective type.
59 */
60 has_io = has_mem = 0;
61 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
62 unsigned long f = dev->resource[i].flags;
63 if (f & IORESOURCE_IO)
64 has_io = 1;
65 else if (f & IORESOURCE_MEM)
66 has_mem = 1;
67 }
68 /* ROM BARs are mapped into 32-bit memory space */
69 if (dev->resource[PCI_ROM_RESOURCE].end != 0) {
70 dev->resource[PCI_ROM_RESOURCE].flags |=
71 IORESOURCE_ROM_ENABLE;
72 has_mem = 1;
73 }
74 pci_bus_read_config_word(pbus, dev->devfn, PCI_COMMAND, &cmd);
75 if (has_io && !(cmd & PCI_COMMAND_IO)) {
76#ifdef CONFIG_PCI_DEBUG
77 printk(KERN_INFO "LEONPCI: Enabling I/O for dev %s\n",
78 pci_name(dev));
79#endif
80 cmd |= PCI_COMMAND_IO;
81 pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
82 cmd);
83 }
84 if (has_mem && !(cmd & PCI_COMMAND_MEMORY)) {
85#ifdef CONFIG_PCI_DEBUG
86 printk(KERN_INFO "LEONPCI: Enabling MEMORY for dev"
87 "%s\n", pci_name(dev));
88#endif
89 cmd |= PCI_COMMAND_MEMORY;
90 pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND,
91 cmd);
92 }
93 }
94}
95
96resource_size_t pcibios_align_resource(void *data, const struct resource *res,
97 resource_size_t size, resource_size_t align)
98{
99 return res->start;
100}
101
102/* in/out routines taken from pcic.c
103 *
104 * This probably belongs here rather than ioport.c because
105 * we do not want this crud linked into SBus kernels.
106 * Also, think for a moment about likes of floppy.c that
107 * include architecture specific parts. They may want to redefine ins/outs.
108 *
109 * We do not use horrible macros here because we want to
110 * advance pointer by sizeof(size).
111 */
112void outsb(unsigned long addr, const void *src, unsigned long count)
113{
114 while (count) {
115 count -= 1;
116 outb(*(const char *)src, addr);
117 src += 1;
118 /* addr += 1; */
119 }
120}
121EXPORT_SYMBOL(outsb);
122
123void outsw(unsigned long addr, const void *src, unsigned long count)
124{
125 while (count) {
126 count -= 2;
127 outw(*(const short *)src, addr);
128 src += 2;
129 /* addr += 2; */
130 }
131}
132EXPORT_SYMBOL(outsw);
133
134void outsl(unsigned long addr, const void *src, unsigned long count)
135{
136 while (count) {
137 count -= 4;
138 outl(*(const long *)src, addr);
139 src += 4;
140 /* addr += 4; */
141 }
142}
143EXPORT_SYMBOL(outsl);
144
145void insb(unsigned long addr, void *dst, unsigned long count)
146{
147 while (count) {
148 count -= 1;
149 *(unsigned char *)dst = inb(addr);
150 dst += 1;
151 /* addr += 1; */
152 }
153}
154EXPORT_SYMBOL(insb);
155
156void insw(unsigned long addr, void *dst, unsigned long count)
157{
158 while (count) {
159 count -= 2;
160 *(unsigned short *)dst = inw(addr);
161 dst += 2;
162 /* addr += 2; */
163 }
164}
165EXPORT_SYMBOL(insw);
166
167void insl(unsigned long addr, void *dst, unsigned long count)
168{
169 while (count) {
170 count -= 4;
171 /*
172 * XXX I am sure we are in for an unaligned trap here.
173 */
174 *(unsigned long *)dst = inl(addr);
175 dst += 4;
176 /* addr += 4; */
177 }
178}
179EXPORT_SYMBOL(insl);