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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
4 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
5 *
6 * This file contains the core interrupt handling code, for irq-chip based
7 * architectures. Detailed information is available in
8 * Documentation/core-api/genericirq.rst
9 */
10
11#include <linux/irq.h>
12#include <linux/msi.h>
13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/kernel_stat.h>
16#include <linux/irqdomain.h>
17
18#include <trace/events/irq.h>
19
20#include "internals.h"
21
22static irqreturn_t bad_chained_irq(int irq, void *dev_id)
23{
24 WARN_ONCE(1, "Chained irq %d should not call an action\n", irq);
25 return IRQ_NONE;
26}
27
28/*
29 * Chained handlers should never call action on their IRQ. This default
30 * action will emit warning if such thing happens.
31 */
32struct irqaction chained_action = {
33 .handler = bad_chained_irq,
34};
35
36/**
37 * irq_set_chip - set the irq chip for an irq
38 * @irq: irq number
39 * @chip: pointer to irq chip description structure
40 */
41int irq_set_chip(unsigned int irq, struct irq_chip *chip)
42{
43 unsigned long flags;
44 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
45
46 if (!desc)
47 return -EINVAL;
48
49 if (!chip)
50 chip = &no_irq_chip;
51
52 desc->irq_data.chip = chip;
53 irq_put_desc_unlock(desc, flags);
54 /*
55 * For !CONFIG_SPARSE_IRQ make the irq show up in
56 * allocated_irqs.
57 */
58 irq_mark_irq(irq);
59 return 0;
60}
61EXPORT_SYMBOL(irq_set_chip);
62
63/**
64 * irq_set_type - set the irq trigger type for an irq
65 * @irq: irq number
66 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
67 */
68int irq_set_irq_type(unsigned int irq, unsigned int type)
69{
70 unsigned long flags;
71 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
72 int ret = 0;
73
74 if (!desc)
75 return -EINVAL;
76
77 ret = __irq_set_trigger(desc, type);
78 irq_put_desc_busunlock(desc, flags);
79 return ret;
80}
81EXPORT_SYMBOL(irq_set_irq_type);
82
83/**
84 * irq_set_handler_data - set irq handler data for an irq
85 * @irq: Interrupt number
86 * @data: Pointer to interrupt specific data
87 *
88 * Set the hardware irq controller data for an irq
89 */
90int irq_set_handler_data(unsigned int irq, void *data)
91{
92 unsigned long flags;
93 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
94
95 if (!desc)
96 return -EINVAL;
97 desc->irq_common_data.handler_data = data;
98 irq_put_desc_unlock(desc, flags);
99 return 0;
100}
101EXPORT_SYMBOL(irq_set_handler_data);
102
103/**
104 * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
105 * @irq_base: Interrupt number base
106 * @irq_offset: Interrupt number offset
107 * @entry: Pointer to MSI descriptor data
108 *
109 * Set the MSI descriptor entry for an irq at offset
110 */
111int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
112 struct msi_desc *entry)
113{
114 unsigned long flags;
115 struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
116
117 if (!desc)
118 return -EINVAL;
119 desc->irq_common_data.msi_desc = entry;
120 if (entry && !irq_offset)
121 entry->irq = irq_base;
122 irq_put_desc_unlock(desc, flags);
123 return 0;
124}
125
126/**
127 * irq_set_msi_desc - set MSI descriptor data for an irq
128 * @irq: Interrupt number
129 * @entry: Pointer to MSI descriptor data
130 *
131 * Set the MSI descriptor entry for an irq
132 */
133int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
134{
135 return irq_set_msi_desc_off(irq, 0, entry);
136}
137
138/**
139 * irq_set_chip_data - set irq chip data for an irq
140 * @irq: Interrupt number
141 * @data: Pointer to chip specific data
142 *
143 * Set the hardware irq chip data for an irq
144 */
145int irq_set_chip_data(unsigned int irq, void *data)
146{
147 unsigned long flags;
148 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
149
150 if (!desc)
151 return -EINVAL;
152 desc->irq_data.chip_data = data;
153 irq_put_desc_unlock(desc, flags);
154 return 0;
155}
156EXPORT_SYMBOL(irq_set_chip_data);
157
158struct irq_data *irq_get_irq_data(unsigned int irq)
159{
160 struct irq_desc *desc = irq_to_desc(irq);
161
162 return desc ? &desc->irq_data : NULL;
163}
164EXPORT_SYMBOL_GPL(irq_get_irq_data);
165
166static void irq_state_clr_disabled(struct irq_desc *desc)
167{
168 irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
169}
170
171static void irq_state_clr_masked(struct irq_desc *desc)
172{
173 irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
174}
175
176static void irq_state_clr_started(struct irq_desc *desc)
177{
178 irqd_clear(&desc->irq_data, IRQD_IRQ_STARTED);
179}
180
181static void irq_state_set_started(struct irq_desc *desc)
182{
183 irqd_set(&desc->irq_data, IRQD_IRQ_STARTED);
184}
185
186enum {
187 IRQ_STARTUP_NORMAL,
188 IRQ_STARTUP_MANAGED,
189 IRQ_STARTUP_ABORT,
190};
191
192#ifdef CONFIG_SMP
193static int
194__irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
195{
196 struct irq_data *d = irq_desc_get_irq_data(desc);
197
198 if (!irqd_affinity_is_managed(d))
199 return IRQ_STARTUP_NORMAL;
200
201 irqd_clr_managed_shutdown(d);
202
203 if (cpumask_any_and(aff, cpu_online_mask) >= nr_cpu_ids) {
204 /*
205 * Catch code which fiddles with enable_irq() on a managed
206 * and potentially shutdown IRQ. Chained interrupt
207 * installment or irq auto probing should not happen on
208 * managed irqs either.
209 */
210 if (WARN_ON_ONCE(force))
211 return IRQ_STARTUP_ABORT;
212 /*
213 * The interrupt was requested, but there is no online CPU
214 * in it's affinity mask. Put it into managed shutdown
215 * state and let the cpu hotplug mechanism start it up once
216 * a CPU in the mask becomes available.
217 */
218 return IRQ_STARTUP_ABORT;
219 }
220 /*
221 * Managed interrupts have reserved resources, so this should not
222 * happen.
223 */
224 if (WARN_ON(irq_domain_activate_irq(d, false)))
225 return IRQ_STARTUP_ABORT;
226 return IRQ_STARTUP_MANAGED;
227}
228#else
229static __always_inline int
230__irq_startup_managed(struct irq_desc *desc, struct cpumask *aff, bool force)
231{
232 return IRQ_STARTUP_NORMAL;
233}
234#endif
235
236static int __irq_startup(struct irq_desc *desc)
237{
238 struct irq_data *d = irq_desc_get_irq_data(desc);
239 int ret = 0;
240
241 /* Warn if this interrupt is not activated but try nevertheless */
242 WARN_ON_ONCE(!irqd_is_activated(d));
243
244 if (d->chip->irq_startup) {
245 ret = d->chip->irq_startup(d);
246 irq_state_clr_disabled(desc);
247 irq_state_clr_masked(desc);
248 } else {
249 irq_enable(desc);
250 }
251 irq_state_set_started(desc);
252 return ret;
253}
254
255int irq_startup(struct irq_desc *desc, bool resend, bool force)
256{
257 struct irq_data *d = irq_desc_get_irq_data(desc);
258 struct cpumask *aff = irq_data_get_affinity_mask(d);
259 int ret = 0;
260
261 desc->depth = 0;
262
263 if (irqd_is_started(d)) {
264 irq_enable(desc);
265 } else {
266 switch (__irq_startup_managed(desc, aff, force)) {
267 case IRQ_STARTUP_NORMAL:
268 ret = __irq_startup(desc);
269 irq_setup_affinity(desc);
270 break;
271 case IRQ_STARTUP_MANAGED:
272 irq_do_set_affinity(d, aff, false);
273 ret = __irq_startup(desc);
274 break;
275 case IRQ_STARTUP_ABORT:
276 irqd_set_managed_shutdown(d);
277 return 0;
278 }
279 }
280 if (resend)
281 check_irq_resend(desc);
282
283 return ret;
284}
285
286int irq_activate(struct irq_desc *desc)
287{
288 struct irq_data *d = irq_desc_get_irq_data(desc);
289
290 if (!irqd_affinity_is_managed(d))
291 return irq_domain_activate_irq(d, false);
292 return 0;
293}
294
295int irq_activate_and_startup(struct irq_desc *desc, bool resend)
296{
297 if (WARN_ON(irq_activate(desc)))
298 return 0;
299 return irq_startup(desc, resend, IRQ_START_FORCE);
300}
301
302static void __irq_disable(struct irq_desc *desc, bool mask);
303
304void irq_shutdown(struct irq_desc *desc)
305{
306 if (irqd_is_started(&desc->irq_data)) {
307 desc->depth = 1;
308 if (desc->irq_data.chip->irq_shutdown) {
309 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
310 irq_state_set_disabled(desc);
311 irq_state_set_masked(desc);
312 } else {
313 __irq_disable(desc, true);
314 }
315 irq_state_clr_started(desc);
316 }
317 /*
318 * This must be called even if the interrupt was never started up,
319 * because the activation can happen before the interrupt is
320 * available for request/startup. It has it's own state tracking so
321 * it's safe to call it unconditionally.
322 */
323 irq_domain_deactivate_irq(&desc->irq_data);
324}
325
326void irq_enable(struct irq_desc *desc)
327{
328 if (!irqd_irq_disabled(&desc->irq_data)) {
329 unmask_irq(desc);
330 } else {
331 irq_state_clr_disabled(desc);
332 if (desc->irq_data.chip->irq_enable) {
333 desc->irq_data.chip->irq_enable(&desc->irq_data);
334 irq_state_clr_masked(desc);
335 } else {
336 unmask_irq(desc);
337 }
338 }
339}
340
341static void __irq_disable(struct irq_desc *desc, bool mask)
342{
343 if (irqd_irq_disabled(&desc->irq_data)) {
344 if (mask)
345 mask_irq(desc);
346 } else {
347 irq_state_set_disabled(desc);
348 if (desc->irq_data.chip->irq_disable) {
349 desc->irq_data.chip->irq_disable(&desc->irq_data);
350 irq_state_set_masked(desc);
351 } else if (mask) {
352 mask_irq(desc);
353 }
354 }
355}
356
357/**
358 * irq_disable - Mark interrupt disabled
359 * @desc: irq descriptor which should be disabled
360 *
361 * If the chip does not implement the irq_disable callback, we
362 * use a lazy disable approach. That means we mark the interrupt
363 * disabled, but leave the hardware unmasked. That's an
364 * optimization because we avoid the hardware access for the
365 * common case where no interrupt happens after we marked it
366 * disabled. If an interrupt happens, then the interrupt flow
367 * handler masks the line at the hardware level and marks it
368 * pending.
369 *
370 * If the interrupt chip does not implement the irq_disable callback,
371 * a driver can disable the lazy approach for a particular irq line by
372 * calling 'irq_set_status_flags(irq, IRQ_DISABLE_UNLAZY)'. This can
373 * be used for devices which cannot disable the interrupt at the
374 * device level under certain circumstances and have to use
375 * disable_irq[_nosync] instead.
376 */
377void irq_disable(struct irq_desc *desc)
378{
379 __irq_disable(desc, irq_settings_disable_unlazy(desc));
380}
381
382void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
383{
384 if (desc->irq_data.chip->irq_enable)
385 desc->irq_data.chip->irq_enable(&desc->irq_data);
386 else
387 desc->irq_data.chip->irq_unmask(&desc->irq_data);
388 cpumask_set_cpu(cpu, desc->percpu_enabled);
389}
390
391void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
392{
393 if (desc->irq_data.chip->irq_disable)
394 desc->irq_data.chip->irq_disable(&desc->irq_data);
395 else
396 desc->irq_data.chip->irq_mask(&desc->irq_data);
397 cpumask_clear_cpu(cpu, desc->percpu_enabled);
398}
399
400static inline void mask_ack_irq(struct irq_desc *desc)
401{
402 if (desc->irq_data.chip->irq_mask_ack) {
403 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
404 irq_state_set_masked(desc);
405 } else {
406 mask_irq(desc);
407 if (desc->irq_data.chip->irq_ack)
408 desc->irq_data.chip->irq_ack(&desc->irq_data);
409 }
410}
411
412void mask_irq(struct irq_desc *desc)
413{
414 if (irqd_irq_masked(&desc->irq_data))
415 return;
416
417 if (desc->irq_data.chip->irq_mask) {
418 desc->irq_data.chip->irq_mask(&desc->irq_data);
419 irq_state_set_masked(desc);
420 }
421}
422
423void unmask_irq(struct irq_desc *desc)
424{
425 if (!irqd_irq_masked(&desc->irq_data))
426 return;
427
428 if (desc->irq_data.chip->irq_unmask) {
429 desc->irq_data.chip->irq_unmask(&desc->irq_data);
430 irq_state_clr_masked(desc);
431 }
432}
433
434void unmask_threaded_irq(struct irq_desc *desc)
435{
436 struct irq_chip *chip = desc->irq_data.chip;
437
438 if (chip->flags & IRQCHIP_EOI_THREADED)
439 chip->irq_eoi(&desc->irq_data);
440
441 unmask_irq(desc);
442}
443
444/*
445 * handle_nested_irq - Handle a nested irq from a irq thread
446 * @irq: the interrupt number
447 *
448 * Handle interrupts which are nested into a threaded interrupt
449 * handler. The handler function is called inside the calling
450 * threads context.
451 */
452void handle_nested_irq(unsigned int irq)
453{
454 struct irq_desc *desc = irq_to_desc(irq);
455 struct irqaction *action;
456 irqreturn_t action_ret;
457
458 might_sleep();
459
460 raw_spin_lock_irq(&desc->lock);
461
462 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
463
464 action = desc->action;
465 if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
466 desc->istate |= IRQS_PENDING;
467 goto out_unlock;
468 }
469
470 kstat_incr_irqs_this_cpu(desc);
471 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
472 raw_spin_unlock_irq(&desc->lock);
473
474 action_ret = IRQ_NONE;
475 for_each_action_of_desc(desc, action)
476 action_ret |= action->thread_fn(action->irq, action->dev_id);
477
478 if (!noirqdebug)
479 note_interrupt(desc, action_ret);
480
481 raw_spin_lock_irq(&desc->lock);
482 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
483
484out_unlock:
485 raw_spin_unlock_irq(&desc->lock);
486}
487EXPORT_SYMBOL_GPL(handle_nested_irq);
488
489static bool irq_check_poll(struct irq_desc *desc)
490{
491 if (!(desc->istate & IRQS_POLL_INPROGRESS))
492 return false;
493 return irq_wait_for_poll(desc);
494}
495
496static bool irq_may_run(struct irq_desc *desc)
497{
498 unsigned int mask = IRQD_IRQ_INPROGRESS | IRQD_WAKEUP_ARMED;
499
500 /*
501 * If the interrupt is not in progress and is not an armed
502 * wakeup interrupt, proceed.
503 */
504 if (!irqd_has_set(&desc->irq_data, mask))
505 return true;
506
507 /*
508 * If the interrupt is an armed wakeup source, mark it pending
509 * and suspended, disable it and notify the pm core about the
510 * event.
511 */
512 if (irq_pm_check_wakeup(desc))
513 return false;
514
515 /*
516 * Handle a potential concurrent poll on a different core.
517 */
518 return irq_check_poll(desc);
519}
520
521/**
522 * handle_simple_irq - Simple and software-decoded IRQs.
523 * @desc: the interrupt description structure for this irq
524 *
525 * Simple interrupts are either sent from a demultiplexing interrupt
526 * handler or come from hardware, where no interrupt hardware control
527 * is necessary.
528 *
529 * Note: The caller is expected to handle the ack, clear, mask and
530 * unmask issues if necessary.
531 */
532void handle_simple_irq(struct irq_desc *desc)
533{
534 raw_spin_lock(&desc->lock);
535
536 if (!irq_may_run(desc))
537 goto out_unlock;
538
539 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
540
541 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
542 desc->istate |= IRQS_PENDING;
543 goto out_unlock;
544 }
545
546 kstat_incr_irqs_this_cpu(desc);
547 handle_irq_event(desc);
548
549out_unlock:
550 raw_spin_unlock(&desc->lock);
551}
552EXPORT_SYMBOL_GPL(handle_simple_irq);
553
554/**
555 * handle_untracked_irq - Simple and software-decoded IRQs.
556 * @desc: the interrupt description structure for this irq
557 *
558 * Untracked interrupts are sent from a demultiplexing interrupt
559 * handler when the demultiplexer does not know which device it its
560 * multiplexed irq domain generated the interrupt. IRQ's handled
561 * through here are not subjected to stats tracking, randomness, or
562 * spurious interrupt detection.
563 *
564 * Note: Like handle_simple_irq, the caller is expected to handle
565 * the ack, clear, mask and unmask issues if necessary.
566 */
567void handle_untracked_irq(struct irq_desc *desc)
568{
569 unsigned int flags = 0;
570
571 raw_spin_lock(&desc->lock);
572
573 if (!irq_may_run(desc))
574 goto out_unlock;
575
576 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
577
578 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
579 desc->istate |= IRQS_PENDING;
580 goto out_unlock;
581 }
582
583 desc->istate &= ~IRQS_PENDING;
584 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
585 raw_spin_unlock(&desc->lock);
586
587 __handle_irq_event_percpu(desc, &flags);
588
589 raw_spin_lock(&desc->lock);
590 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
591
592out_unlock:
593 raw_spin_unlock(&desc->lock);
594}
595EXPORT_SYMBOL_GPL(handle_untracked_irq);
596
597/*
598 * Called unconditionally from handle_level_irq() and only for oneshot
599 * interrupts from handle_fasteoi_irq()
600 */
601static void cond_unmask_irq(struct irq_desc *desc)
602{
603 /*
604 * We need to unmask in the following cases:
605 * - Standard level irq (IRQF_ONESHOT is not set)
606 * - Oneshot irq which did not wake the thread (caused by a
607 * spurious interrupt or a primary handler handling it
608 * completely).
609 */
610 if (!irqd_irq_disabled(&desc->irq_data) &&
611 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
612 unmask_irq(desc);
613}
614
615/**
616 * handle_level_irq - Level type irq handler
617 * @desc: the interrupt description structure for this irq
618 *
619 * Level type interrupts are active as long as the hardware line has
620 * the active level. This may require to mask the interrupt and unmask
621 * it after the associated handler has acknowledged the device, so the
622 * interrupt line is back to inactive.
623 */
624void handle_level_irq(struct irq_desc *desc)
625{
626 raw_spin_lock(&desc->lock);
627 mask_ack_irq(desc);
628
629 if (!irq_may_run(desc))
630 goto out_unlock;
631
632 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
633
634 /*
635 * If its disabled or no action available
636 * keep it masked and get out of here
637 */
638 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
639 desc->istate |= IRQS_PENDING;
640 goto out_unlock;
641 }
642
643 kstat_incr_irqs_this_cpu(desc);
644 handle_irq_event(desc);
645
646 cond_unmask_irq(desc);
647
648out_unlock:
649 raw_spin_unlock(&desc->lock);
650}
651EXPORT_SYMBOL_GPL(handle_level_irq);
652
653#ifdef CONFIG_IRQ_PREFLOW_FASTEOI
654static inline void preflow_handler(struct irq_desc *desc)
655{
656 if (desc->preflow_handler)
657 desc->preflow_handler(&desc->irq_data);
658}
659#else
660static inline void preflow_handler(struct irq_desc *desc) { }
661#endif
662
663static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
664{
665 if (!(desc->istate & IRQS_ONESHOT)) {
666 chip->irq_eoi(&desc->irq_data);
667 return;
668 }
669 /*
670 * We need to unmask in the following cases:
671 * - Oneshot irq which did not wake the thread (caused by a
672 * spurious interrupt or a primary handler handling it
673 * completely).
674 */
675 if (!irqd_irq_disabled(&desc->irq_data) &&
676 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
677 chip->irq_eoi(&desc->irq_data);
678 unmask_irq(desc);
679 } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
680 chip->irq_eoi(&desc->irq_data);
681 }
682}
683
684/**
685 * handle_fasteoi_irq - irq handler for transparent controllers
686 * @desc: the interrupt description structure for this irq
687 *
688 * Only a single callback will be issued to the chip: an ->eoi()
689 * call when the interrupt has been serviced. This enables support
690 * for modern forms of interrupt handlers, which handle the flow
691 * details in hardware, transparently.
692 */
693void handle_fasteoi_irq(struct irq_desc *desc)
694{
695 struct irq_chip *chip = desc->irq_data.chip;
696
697 raw_spin_lock(&desc->lock);
698
699 if (!irq_may_run(desc))
700 goto out;
701
702 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
703
704 /*
705 * If its disabled or no action available
706 * then mask it and get out of here:
707 */
708 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
709 desc->istate |= IRQS_PENDING;
710 mask_irq(desc);
711 goto out;
712 }
713
714 kstat_incr_irqs_this_cpu(desc);
715 if (desc->istate & IRQS_ONESHOT)
716 mask_irq(desc);
717
718 preflow_handler(desc);
719 handle_irq_event(desc);
720
721 cond_unmask_eoi_irq(desc, chip);
722
723 raw_spin_unlock(&desc->lock);
724 return;
725out:
726 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
727 chip->irq_eoi(&desc->irq_data);
728 raw_spin_unlock(&desc->lock);
729}
730EXPORT_SYMBOL_GPL(handle_fasteoi_irq);
731
732/**
733 * handle_edge_irq - edge type IRQ handler
734 * @desc: the interrupt description structure for this irq
735 *
736 * Interrupt occures on the falling and/or rising edge of a hardware
737 * signal. The occurrence is latched into the irq controller hardware
738 * and must be acked in order to be reenabled. After the ack another
739 * interrupt can happen on the same source even before the first one
740 * is handled by the associated event handler. If this happens it
741 * might be necessary to disable (mask) the interrupt depending on the
742 * controller hardware. This requires to reenable the interrupt inside
743 * of the loop which handles the interrupts which have arrived while
744 * the handler was running. If all pending interrupts are handled, the
745 * loop is left.
746 */
747void handle_edge_irq(struct irq_desc *desc)
748{
749 raw_spin_lock(&desc->lock);
750
751 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
752
753 if (!irq_may_run(desc)) {
754 desc->istate |= IRQS_PENDING;
755 mask_ack_irq(desc);
756 goto out_unlock;
757 }
758
759 /*
760 * If its disabled or no action available then mask it and get
761 * out of here.
762 */
763 if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
764 desc->istate |= IRQS_PENDING;
765 mask_ack_irq(desc);
766 goto out_unlock;
767 }
768
769 kstat_incr_irqs_this_cpu(desc);
770
771 /* Start handling the irq */
772 desc->irq_data.chip->irq_ack(&desc->irq_data);
773
774 do {
775 if (unlikely(!desc->action)) {
776 mask_irq(desc);
777 goto out_unlock;
778 }
779
780 /*
781 * When another irq arrived while we were handling
782 * one, we could have masked the irq.
783 * Renable it, if it was not disabled in meantime.
784 */
785 if (unlikely(desc->istate & IRQS_PENDING)) {
786 if (!irqd_irq_disabled(&desc->irq_data) &&
787 irqd_irq_masked(&desc->irq_data))
788 unmask_irq(desc);
789 }
790
791 handle_irq_event(desc);
792
793 } while ((desc->istate & IRQS_PENDING) &&
794 !irqd_irq_disabled(&desc->irq_data));
795
796out_unlock:
797 raw_spin_unlock(&desc->lock);
798}
799EXPORT_SYMBOL(handle_edge_irq);
800
801#ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
802/**
803 * handle_edge_eoi_irq - edge eoi type IRQ handler
804 * @desc: the interrupt description structure for this irq
805 *
806 * Similar as the above handle_edge_irq, but using eoi and w/o the
807 * mask/unmask logic.
808 */
809void handle_edge_eoi_irq(struct irq_desc *desc)
810{
811 struct irq_chip *chip = irq_desc_get_chip(desc);
812
813 raw_spin_lock(&desc->lock);
814
815 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
816
817 if (!irq_may_run(desc)) {
818 desc->istate |= IRQS_PENDING;
819 goto out_eoi;
820 }
821
822 /*
823 * If its disabled or no action available then mask it and get
824 * out of here.
825 */
826 if (irqd_irq_disabled(&desc->irq_data) || !desc->action) {
827 desc->istate |= IRQS_PENDING;
828 goto out_eoi;
829 }
830
831 kstat_incr_irqs_this_cpu(desc);
832
833 do {
834 if (unlikely(!desc->action))
835 goto out_eoi;
836
837 handle_irq_event(desc);
838
839 } while ((desc->istate & IRQS_PENDING) &&
840 !irqd_irq_disabled(&desc->irq_data));
841
842out_eoi:
843 chip->irq_eoi(&desc->irq_data);
844 raw_spin_unlock(&desc->lock);
845}
846#endif
847
848/**
849 * handle_percpu_irq - Per CPU local irq handler
850 * @desc: the interrupt description structure for this irq
851 *
852 * Per CPU interrupts on SMP machines without locking requirements
853 */
854void handle_percpu_irq(struct irq_desc *desc)
855{
856 struct irq_chip *chip = irq_desc_get_chip(desc);
857
858 kstat_incr_irqs_this_cpu(desc);
859
860 if (chip->irq_ack)
861 chip->irq_ack(&desc->irq_data);
862
863 handle_irq_event_percpu(desc);
864
865 if (chip->irq_eoi)
866 chip->irq_eoi(&desc->irq_data);
867}
868
869/**
870 * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
871 * @desc: the interrupt description structure for this irq
872 *
873 * Per CPU interrupts on SMP machines without locking requirements. Same as
874 * handle_percpu_irq() above but with the following extras:
875 *
876 * action->percpu_dev_id is a pointer to percpu variables which
877 * contain the real device id for the cpu on which this handler is
878 * called
879 */
880void handle_percpu_devid_irq(struct irq_desc *desc)
881{
882 struct irq_chip *chip = irq_desc_get_chip(desc);
883 struct irqaction *action = desc->action;
884 unsigned int irq = irq_desc_get_irq(desc);
885 irqreturn_t res;
886
887 kstat_incr_irqs_this_cpu(desc);
888
889 if (chip->irq_ack)
890 chip->irq_ack(&desc->irq_data);
891
892 if (likely(action)) {
893 trace_irq_handler_entry(irq, action);
894 res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id));
895 trace_irq_handler_exit(irq, action, res);
896 } else {
897 unsigned int cpu = smp_processor_id();
898 bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled);
899
900 if (enabled)
901 irq_percpu_disable(desc, cpu);
902
903 pr_err_once("Spurious%s percpu IRQ%u on CPU%u\n",
904 enabled ? " and unmasked" : "", irq, cpu);
905 }
906
907 if (chip->irq_eoi)
908 chip->irq_eoi(&desc->irq_data);
909}
910
911static void
912__irq_do_set_handler(struct irq_desc *desc, irq_flow_handler_t handle,
913 int is_chained, const char *name)
914{
915 if (!handle) {
916 handle = handle_bad_irq;
917 } else {
918 struct irq_data *irq_data = &desc->irq_data;
919#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
920 /*
921 * With hierarchical domains we might run into a
922 * situation where the outermost chip is not yet set
923 * up, but the inner chips are there. Instead of
924 * bailing we install the handler, but obviously we
925 * cannot enable/startup the interrupt at this point.
926 */
927 while (irq_data) {
928 if (irq_data->chip != &no_irq_chip)
929 break;
930 /*
931 * Bail out if the outer chip is not set up
932 * and the interrrupt supposed to be started
933 * right away.
934 */
935 if (WARN_ON(is_chained))
936 return;
937 /* Try the parent */
938 irq_data = irq_data->parent_data;
939 }
940#endif
941 if (WARN_ON(!irq_data || irq_data->chip == &no_irq_chip))
942 return;
943 }
944
945 /* Uninstall? */
946 if (handle == handle_bad_irq) {
947 if (desc->irq_data.chip != &no_irq_chip)
948 mask_ack_irq(desc);
949 irq_state_set_disabled(desc);
950 if (is_chained)
951 desc->action = NULL;
952 desc->depth = 1;
953 }
954 desc->handle_irq = handle;
955 desc->name = name;
956
957 if (handle != handle_bad_irq && is_chained) {
958 unsigned int type = irqd_get_trigger_type(&desc->irq_data);
959
960 /*
961 * We're about to start this interrupt immediately,
962 * hence the need to set the trigger configuration.
963 * But the .set_type callback may have overridden the
964 * flow handler, ignoring that we're dealing with a
965 * chained interrupt. Reset it immediately because we
966 * do know better.
967 */
968 if (type != IRQ_TYPE_NONE) {
969 __irq_set_trigger(desc, type);
970 desc->handle_irq = handle;
971 }
972
973 irq_settings_set_noprobe(desc);
974 irq_settings_set_norequest(desc);
975 irq_settings_set_nothread(desc);
976 desc->action = &chained_action;
977 irq_activate_and_startup(desc, IRQ_RESEND);
978 }
979}
980
981void
982__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
983 const char *name)
984{
985 unsigned long flags;
986 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
987
988 if (!desc)
989 return;
990
991 __irq_do_set_handler(desc, handle, is_chained, name);
992 irq_put_desc_busunlock(desc, flags);
993}
994EXPORT_SYMBOL_GPL(__irq_set_handler);
995
996void
997irq_set_chained_handler_and_data(unsigned int irq, irq_flow_handler_t handle,
998 void *data)
999{
1000 unsigned long flags;
1001 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
1002
1003 if (!desc)
1004 return;
1005
1006 desc->irq_common_data.handler_data = data;
1007 __irq_do_set_handler(desc, handle, 1, NULL);
1008
1009 irq_put_desc_busunlock(desc, flags);
1010}
1011EXPORT_SYMBOL_GPL(irq_set_chained_handler_and_data);
1012
1013void
1014irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
1015 irq_flow_handler_t handle, const char *name)
1016{
1017 irq_set_chip(irq, chip);
1018 __irq_set_handler(irq, handle, 0, name);
1019}
1020EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
1021
1022void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
1023{
1024 unsigned long flags, trigger, tmp;
1025 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
1026
1027 if (!desc)
1028 return;
1029
1030 /*
1031 * Warn when a driver sets the no autoenable flag on an already
1032 * active interrupt.
1033 */
1034 WARN_ON_ONCE(!desc->depth && (set & _IRQ_NOAUTOEN));
1035
1036 irq_settings_clr_and_set(desc, clr, set);
1037
1038 trigger = irqd_get_trigger_type(&desc->irq_data);
1039
1040 irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
1041 IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
1042 if (irq_settings_has_no_balance_set(desc))
1043 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
1044 if (irq_settings_is_per_cpu(desc))
1045 irqd_set(&desc->irq_data, IRQD_PER_CPU);
1046 if (irq_settings_can_move_pcntxt(desc))
1047 irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
1048 if (irq_settings_is_level(desc))
1049 irqd_set(&desc->irq_data, IRQD_LEVEL);
1050
1051 tmp = irq_settings_get_trigger_mask(desc);
1052 if (tmp != IRQ_TYPE_NONE)
1053 trigger = tmp;
1054
1055 irqd_set(&desc->irq_data, trigger);
1056
1057 irq_put_desc_unlock(desc, flags);
1058}
1059EXPORT_SYMBOL_GPL(irq_modify_status);
1060
1061/**
1062 * irq_cpu_online - Invoke all irq_cpu_online functions.
1063 *
1064 * Iterate through all irqs and invoke the chip.irq_cpu_online()
1065 * for each.
1066 */
1067void irq_cpu_online(void)
1068{
1069 struct irq_desc *desc;
1070 struct irq_chip *chip;
1071 unsigned long flags;
1072 unsigned int irq;
1073
1074 for_each_active_irq(irq) {
1075 desc = irq_to_desc(irq);
1076 if (!desc)
1077 continue;
1078
1079 raw_spin_lock_irqsave(&desc->lock, flags);
1080
1081 chip = irq_data_get_irq_chip(&desc->irq_data);
1082 if (chip && chip->irq_cpu_online &&
1083 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
1084 !irqd_irq_disabled(&desc->irq_data)))
1085 chip->irq_cpu_online(&desc->irq_data);
1086
1087 raw_spin_unlock_irqrestore(&desc->lock, flags);
1088 }
1089}
1090
1091/**
1092 * irq_cpu_offline - Invoke all irq_cpu_offline functions.
1093 *
1094 * Iterate through all irqs and invoke the chip.irq_cpu_offline()
1095 * for each.
1096 */
1097void irq_cpu_offline(void)
1098{
1099 struct irq_desc *desc;
1100 struct irq_chip *chip;
1101 unsigned long flags;
1102 unsigned int irq;
1103
1104 for_each_active_irq(irq) {
1105 desc = irq_to_desc(irq);
1106 if (!desc)
1107 continue;
1108
1109 raw_spin_lock_irqsave(&desc->lock, flags);
1110
1111 chip = irq_data_get_irq_chip(&desc->irq_data);
1112 if (chip && chip->irq_cpu_offline &&
1113 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
1114 !irqd_irq_disabled(&desc->irq_data)))
1115 chip->irq_cpu_offline(&desc->irq_data);
1116
1117 raw_spin_unlock_irqrestore(&desc->lock, flags);
1118 }
1119}
1120
1121#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1122
1123#ifdef CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS
1124/**
1125 * handle_fasteoi_ack_irq - irq handler for edge hierarchy
1126 * stacked on transparent controllers
1127 *
1128 * @desc: the interrupt description structure for this irq
1129 *
1130 * Like handle_fasteoi_irq(), but for use with hierarchy where
1131 * the irq_chip also needs to have its ->irq_ack() function
1132 * called.
1133 */
1134void handle_fasteoi_ack_irq(struct irq_desc *desc)
1135{
1136 struct irq_chip *chip = desc->irq_data.chip;
1137
1138 raw_spin_lock(&desc->lock);
1139
1140 if (!irq_may_run(desc))
1141 goto out;
1142
1143 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
1144
1145 /*
1146 * If its disabled or no action available
1147 * then mask it and get out of here:
1148 */
1149 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
1150 desc->istate |= IRQS_PENDING;
1151 mask_irq(desc);
1152 goto out;
1153 }
1154
1155 kstat_incr_irqs_this_cpu(desc);
1156 if (desc->istate & IRQS_ONESHOT)
1157 mask_irq(desc);
1158
1159 /* Start handling the irq */
1160 desc->irq_data.chip->irq_ack(&desc->irq_data);
1161
1162 preflow_handler(desc);
1163 handle_irq_event(desc);
1164
1165 cond_unmask_eoi_irq(desc, chip);
1166
1167 raw_spin_unlock(&desc->lock);
1168 return;
1169out:
1170 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
1171 chip->irq_eoi(&desc->irq_data);
1172 raw_spin_unlock(&desc->lock);
1173}
1174EXPORT_SYMBOL_GPL(handle_fasteoi_ack_irq);
1175
1176/**
1177 * handle_fasteoi_mask_irq - irq handler for level hierarchy
1178 * stacked on transparent controllers
1179 *
1180 * @desc: the interrupt description structure for this irq
1181 *
1182 * Like handle_fasteoi_irq(), but for use with hierarchy where
1183 * the irq_chip also needs to have its ->irq_mask_ack() function
1184 * called.
1185 */
1186void handle_fasteoi_mask_irq(struct irq_desc *desc)
1187{
1188 struct irq_chip *chip = desc->irq_data.chip;
1189
1190 raw_spin_lock(&desc->lock);
1191 mask_ack_irq(desc);
1192
1193 if (!irq_may_run(desc))
1194 goto out;
1195
1196 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
1197
1198 /*
1199 * If its disabled or no action available
1200 * then mask it and get out of here:
1201 */
1202 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
1203 desc->istate |= IRQS_PENDING;
1204 mask_irq(desc);
1205 goto out;
1206 }
1207
1208 kstat_incr_irqs_this_cpu(desc);
1209 if (desc->istate & IRQS_ONESHOT)
1210 mask_irq(desc);
1211
1212 preflow_handler(desc);
1213 handle_irq_event(desc);
1214
1215 cond_unmask_eoi_irq(desc, chip);
1216
1217 raw_spin_unlock(&desc->lock);
1218 return;
1219out:
1220 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
1221 chip->irq_eoi(&desc->irq_data);
1222 raw_spin_unlock(&desc->lock);
1223}
1224EXPORT_SYMBOL_GPL(handle_fasteoi_mask_irq);
1225
1226#endif /* CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS */
1227
1228/**
1229 * irq_chip_enable_parent - Enable the parent interrupt (defaults to unmask if
1230 * NULL)
1231 * @data: Pointer to interrupt specific data
1232 */
1233void irq_chip_enable_parent(struct irq_data *data)
1234{
1235 data = data->parent_data;
1236 if (data->chip->irq_enable)
1237 data->chip->irq_enable(data);
1238 else
1239 data->chip->irq_unmask(data);
1240}
1241EXPORT_SYMBOL_GPL(irq_chip_enable_parent);
1242
1243/**
1244 * irq_chip_disable_parent - Disable the parent interrupt (defaults to mask if
1245 * NULL)
1246 * @data: Pointer to interrupt specific data
1247 */
1248void irq_chip_disable_parent(struct irq_data *data)
1249{
1250 data = data->parent_data;
1251 if (data->chip->irq_disable)
1252 data->chip->irq_disable(data);
1253 else
1254 data->chip->irq_mask(data);
1255}
1256EXPORT_SYMBOL_GPL(irq_chip_disable_parent);
1257
1258/**
1259 * irq_chip_ack_parent - Acknowledge the parent interrupt
1260 * @data: Pointer to interrupt specific data
1261 */
1262void irq_chip_ack_parent(struct irq_data *data)
1263{
1264 data = data->parent_data;
1265 data->chip->irq_ack(data);
1266}
1267EXPORT_SYMBOL_GPL(irq_chip_ack_parent);
1268
1269/**
1270 * irq_chip_mask_parent - Mask the parent interrupt
1271 * @data: Pointer to interrupt specific data
1272 */
1273void irq_chip_mask_parent(struct irq_data *data)
1274{
1275 data = data->parent_data;
1276 data->chip->irq_mask(data);
1277}
1278EXPORT_SYMBOL_GPL(irq_chip_mask_parent);
1279
1280/**
1281 * irq_chip_unmask_parent - Unmask the parent interrupt
1282 * @data: Pointer to interrupt specific data
1283 */
1284void irq_chip_unmask_parent(struct irq_data *data)
1285{
1286 data = data->parent_data;
1287 data->chip->irq_unmask(data);
1288}
1289EXPORT_SYMBOL_GPL(irq_chip_unmask_parent);
1290
1291/**
1292 * irq_chip_eoi_parent - Invoke EOI on the parent interrupt
1293 * @data: Pointer to interrupt specific data
1294 */
1295void irq_chip_eoi_parent(struct irq_data *data)
1296{
1297 data = data->parent_data;
1298 data->chip->irq_eoi(data);
1299}
1300EXPORT_SYMBOL_GPL(irq_chip_eoi_parent);
1301
1302/**
1303 * irq_chip_set_affinity_parent - Set affinity on the parent interrupt
1304 * @data: Pointer to interrupt specific data
1305 * @dest: The affinity mask to set
1306 * @force: Flag to enforce setting (disable online checks)
1307 *
1308 * Conditinal, as the underlying parent chip might not implement it.
1309 */
1310int irq_chip_set_affinity_parent(struct irq_data *data,
1311 const struct cpumask *dest, bool force)
1312{
1313 data = data->parent_data;
1314 if (data->chip->irq_set_affinity)
1315 return data->chip->irq_set_affinity(data, dest, force);
1316
1317 return -ENOSYS;
1318}
1319EXPORT_SYMBOL_GPL(irq_chip_set_affinity_parent);
1320
1321/**
1322 * irq_chip_set_type_parent - Set IRQ type on the parent interrupt
1323 * @data: Pointer to interrupt specific data
1324 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
1325 *
1326 * Conditional, as the underlying parent chip might not implement it.
1327 */
1328int irq_chip_set_type_parent(struct irq_data *data, unsigned int type)
1329{
1330 data = data->parent_data;
1331
1332 if (data->chip->irq_set_type)
1333 return data->chip->irq_set_type(data, type);
1334
1335 return -ENOSYS;
1336}
1337EXPORT_SYMBOL_GPL(irq_chip_set_type_parent);
1338
1339/**
1340 * irq_chip_retrigger_hierarchy - Retrigger an interrupt in hardware
1341 * @data: Pointer to interrupt specific data
1342 *
1343 * Iterate through the domain hierarchy of the interrupt and check
1344 * whether a hw retrigger function exists. If yes, invoke it.
1345 */
1346int irq_chip_retrigger_hierarchy(struct irq_data *data)
1347{
1348 for (data = data->parent_data; data; data = data->parent_data)
1349 if (data->chip && data->chip->irq_retrigger)
1350 return data->chip->irq_retrigger(data);
1351
1352 return 0;
1353}
1354
1355/**
1356 * irq_chip_set_vcpu_affinity_parent - Set vcpu affinity on the parent interrupt
1357 * @data: Pointer to interrupt specific data
1358 * @vcpu_info: The vcpu affinity information
1359 */
1360int irq_chip_set_vcpu_affinity_parent(struct irq_data *data, void *vcpu_info)
1361{
1362 data = data->parent_data;
1363 if (data->chip->irq_set_vcpu_affinity)
1364 return data->chip->irq_set_vcpu_affinity(data, vcpu_info);
1365
1366 return -ENOSYS;
1367}
1368
1369/**
1370 * irq_chip_set_wake_parent - Set/reset wake-up on the parent interrupt
1371 * @data: Pointer to interrupt specific data
1372 * @on: Whether to set or reset the wake-up capability of this irq
1373 *
1374 * Conditional, as the underlying parent chip might not implement it.
1375 */
1376int irq_chip_set_wake_parent(struct irq_data *data, unsigned int on)
1377{
1378 data = data->parent_data;
1379 if (data->chip->irq_set_wake)
1380 return data->chip->irq_set_wake(data, on);
1381
1382 return -ENOSYS;
1383}
1384#endif
1385
1386/**
1387 * irq_chip_compose_msi_msg - Componse msi message for a irq chip
1388 * @data: Pointer to interrupt specific data
1389 * @msg: Pointer to the MSI message
1390 *
1391 * For hierarchical domains we find the first chip in the hierarchy
1392 * which implements the irq_compose_msi_msg callback. For non
1393 * hierarchical we use the top level chip.
1394 */
1395int irq_chip_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
1396{
1397 struct irq_data *pos = NULL;
1398
1399#ifdef CONFIG_IRQ_DOMAIN_HIERARCHY
1400 for (; data; data = data->parent_data)
1401#endif
1402 if (data->chip && data->chip->irq_compose_msi_msg)
1403 pos = data;
1404 if (!pos)
1405 return -ENOSYS;
1406
1407 pos->chip->irq_compose_msi_msg(pos, msg);
1408
1409 return 0;
1410}
1411
1412/**
1413 * irq_chip_pm_get - Enable power for an IRQ chip
1414 * @data: Pointer to interrupt specific data
1415 *
1416 * Enable the power to the IRQ chip referenced by the interrupt data
1417 * structure.
1418 */
1419int irq_chip_pm_get(struct irq_data *data)
1420{
1421 int retval;
1422
1423 if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device) {
1424 retval = pm_runtime_get_sync(data->chip->parent_device);
1425 if (retval < 0) {
1426 pm_runtime_put_noidle(data->chip->parent_device);
1427 return retval;
1428 }
1429 }
1430
1431 return 0;
1432}
1433
1434/**
1435 * irq_chip_pm_put - Disable power for an IRQ chip
1436 * @data: Pointer to interrupt specific data
1437 *
1438 * Disable the power to the IRQ chip referenced by the interrupt data
1439 * structure, belongs. Note that power will only be disabled, once this
1440 * function has been called for all IRQs that have called irq_chip_pm_get().
1441 */
1442int irq_chip_pm_put(struct irq_data *data)
1443{
1444 int retval = 0;
1445
1446 if (IS_ENABLED(CONFIG_PM) && data->chip->parent_device)
1447 retval = pm_runtime_put(data->chip->parent_device);
1448
1449 return (retval < 0) ? retval : 0;
1450}
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
14#include <linux/msi.h>
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include <trace/events/irq.h>
20
21#include "internals.h"
22
23/**
24 * irq_set_chip - set the irq chip for an irq
25 * @irq: irq number
26 * @chip: pointer to irq chip description structure
27 */
28int irq_set_chip(unsigned int irq, struct irq_chip *chip)
29{
30 unsigned long flags;
31 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
32
33 if (!desc)
34 return -EINVAL;
35
36 if (!chip)
37 chip = &no_irq_chip;
38
39 desc->irq_data.chip = chip;
40 irq_put_desc_unlock(desc, flags);
41 /*
42 * For !CONFIG_SPARSE_IRQ make the irq show up in
43 * allocated_irqs. For the CONFIG_SPARSE_IRQ case, it is
44 * already marked, and this call is harmless.
45 */
46 irq_reserve_irq(irq);
47 return 0;
48}
49EXPORT_SYMBOL(irq_set_chip);
50
51/**
52 * irq_set_type - set the irq trigger type for an irq
53 * @irq: irq number
54 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
55 */
56int irq_set_irq_type(unsigned int irq, unsigned int type)
57{
58 unsigned long flags;
59 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
60 int ret = 0;
61
62 if (!desc)
63 return -EINVAL;
64
65 type &= IRQ_TYPE_SENSE_MASK;
66 ret = __irq_set_trigger(desc, irq, type);
67 irq_put_desc_busunlock(desc, flags);
68 return ret;
69}
70EXPORT_SYMBOL(irq_set_irq_type);
71
72/**
73 * irq_set_handler_data - set irq handler data for an irq
74 * @irq: Interrupt number
75 * @data: Pointer to interrupt specific data
76 *
77 * Set the hardware irq controller data for an irq
78 */
79int irq_set_handler_data(unsigned int irq, void *data)
80{
81 unsigned long flags;
82 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
83
84 if (!desc)
85 return -EINVAL;
86 desc->irq_data.handler_data = data;
87 irq_put_desc_unlock(desc, flags);
88 return 0;
89}
90EXPORT_SYMBOL(irq_set_handler_data);
91
92/**
93 * irq_set_msi_desc_off - set MSI descriptor data for an irq at offset
94 * @irq_base: Interrupt number base
95 * @irq_offset: Interrupt number offset
96 * @entry: Pointer to MSI descriptor data
97 *
98 * Set the MSI descriptor entry for an irq at offset
99 */
100int irq_set_msi_desc_off(unsigned int irq_base, unsigned int irq_offset,
101 struct msi_desc *entry)
102{
103 unsigned long flags;
104 struct irq_desc *desc = irq_get_desc_lock(irq_base + irq_offset, &flags, IRQ_GET_DESC_CHECK_GLOBAL);
105
106 if (!desc)
107 return -EINVAL;
108 desc->irq_data.msi_desc = entry;
109 if (entry && !irq_offset)
110 entry->irq = irq_base;
111 irq_put_desc_unlock(desc, flags);
112 return 0;
113}
114
115/**
116 * irq_set_msi_desc - set MSI descriptor data for an irq
117 * @irq: Interrupt number
118 * @entry: Pointer to MSI descriptor data
119 *
120 * Set the MSI descriptor entry for an irq
121 */
122int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
123{
124 return irq_set_msi_desc_off(irq, 0, entry);
125}
126
127/**
128 * irq_set_chip_data - set irq chip data for an irq
129 * @irq: Interrupt number
130 * @data: Pointer to chip specific data
131 *
132 * Set the hardware irq chip data for an irq
133 */
134int irq_set_chip_data(unsigned int irq, void *data)
135{
136 unsigned long flags;
137 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
138
139 if (!desc)
140 return -EINVAL;
141 desc->irq_data.chip_data = data;
142 irq_put_desc_unlock(desc, flags);
143 return 0;
144}
145EXPORT_SYMBOL(irq_set_chip_data);
146
147struct irq_data *irq_get_irq_data(unsigned int irq)
148{
149 struct irq_desc *desc = irq_to_desc(irq);
150
151 return desc ? &desc->irq_data : NULL;
152}
153EXPORT_SYMBOL_GPL(irq_get_irq_data);
154
155static void irq_state_clr_disabled(struct irq_desc *desc)
156{
157 irqd_clear(&desc->irq_data, IRQD_IRQ_DISABLED);
158}
159
160static void irq_state_set_disabled(struct irq_desc *desc)
161{
162 irqd_set(&desc->irq_data, IRQD_IRQ_DISABLED);
163}
164
165static void irq_state_clr_masked(struct irq_desc *desc)
166{
167 irqd_clear(&desc->irq_data, IRQD_IRQ_MASKED);
168}
169
170static void irq_state_set_masked(struct irq_desc *desc)
171{
172 irqd_set(&desc->irq_data, IRQD_IRQ_MASKED);
173}
174
175int irq_startup(struct irq_desc *desc, bool resend)
176{
177 int ret = 0;
178
179 irq_state_clr_disabled(desc);
180 desc->depth = 0;
181
182 if (desc->irq_data.chip->irq_startup) {
183 ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
184 irq_state_clr_masked(desc);
185 } else {
186 irq_enable(desc);
187 }
188 if (resend)
189 check_irq_resend(desc, desc->irq_data.irq);
190 return ret;
191}
192
193void irq_shutdown(struct irq_desc *desc)
194{
195 irq_state_set_disabled(desc);
196 desc->depth = 1;
197 if (desc->irq_data.chip->irq_shutdown)
198 desc->irq_data.chip->irq_shutdown(&desc->irq_data);
199 else if (desc->irq_data.chip->irq_disable)
200 desc->irq_data.chip->irq_disable(&desc->irq_data);
201 else
202 desc->irq_data.chip->irq_mask(&desc->irq_data);
203 irq_state_set_masked(desc);
204}
205
206void irq_enable(struct irq_desc *desc)
207{
208 irq_state_clr_disabled(desc);
209 if (desc->irq_data.chip->irq_enable)
210 desc->irq_data.chip->irq_enable(&desc->irq_data);
211 else
212 desc->irq_data.chip->irq_unmask(&desc->irq_data);
213 irq_state_clr_masked(desc);
214}
215
216/**
217 * irq_disable - Mark interrupt disabled
218 * @desc: irq descriptor which should be disabled
219 *
220 * If the chip does not implement the irq_disable callback, we
221 * use a lazy disable approach. That means we mark the interrupt
222 * disabled, but leave the hardware unmasked. That's an
223 * optimization because we avoid the hardware access for the
224 * common case where no interrupt happens after we marked it
225 * disabled. If an interrupt happens, then the interrupt flow
226 * handler masks the line at the hardware level and marks it
227 * pending.
228 */
229void irq_disable(struct irq_desc *desc)
230{
231 irq_state_set_disabled(desc);
232 if (desc->irq_data.chip->irq_disable) {
233 desc->irq_data.chip->irq_disable(&desc->irq_data);
234 irq_state_set_masked(desc);
235 }
236}
237
238void irq_percpu_enable(struct irq_desc *desc, unsigned int cpu)
239{
240 if (desc->irq_data.chip->irq_enable)
241 desc->irq_data.chip->irq_enable(&desc->irq_data);
242 else
243 desc->irq_data.chip->irq_unmask(&desc->irq_data);
244 cpumask_set_cpu(cpu, desc->percpu_enabled);
245}
246
247void irq_percpu_disable(struct irq_desc *desc, unsigned int cpu)
248{
249 if (desc->irq_data.chip->irq_disable)
250 desc->irq_data.chip->irq_disable(&desc->irq_data);
251 else
252 desc->irq_data.chip->irq_mask(&desc->irq_data);
253 cpumask_clear_cpu(cpu, desc->percpu_enabled);
254}
255
256static inline void mask_ack_irq(struct irq_desc *desc)
257{
258 if (desc->irq_data.chip->irq_mask_ack)
259 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
260 else {
261 desc->irq_data.chip->irq_mask(&desc->irq_data);
262 if (desc->irq_data.chip->irq_ack)
263 desc->irq_data.chip->irq_ack(&desc->irq_data);
264 }
265 irq_state_set_masked(desc);
266}
267
268void mask_irq(struct irq_desc *desc)
269{
270 if (desc->irq_data.chip->irq_mask) {
271 desc->irq_data.chip->irq_mask(&desc->irq_data);
272 irq_state_set_masked(desc);
273 }
274}
275
276void unmask_irq(struct irq_desc *desc)
277{
278 if (desc->irq_data.chip->irq_unmask) {
279 desc->irq_data.chip->irq_unmask(&desc->irq_data);
280 irq_state_clr_masked(desc);
281 }
282}
283
284void unmask_threaded_irq(struct irq_desc *desc)
285{
286 struct irq_chip *chip = desc->irq_data.chip;
287
288 if (chip->flags & IRQCHIP_EOI_THREADED)
289 chip->irq_eoi(&desc->irq_data);
290
291 if (chip->irq_unmask) {
292 chip->irq_unmask(&desc->irq_data);
293 irq_state_clr_masked(desc);
294 }
295}
296
297/*
298 * handle_nested_irq - Handle a nested irq from a irq thread
299 * @irq: the interrupt number
300 *
301 * Handle interrupts which are nested into a threaded interrupt
302 * handler. The handler function is called inside the calling
303 * threads context.
304 */
305void handle_nested_irq(unsigned int irq)
306{
307 struct irq_desc *desc = irq_to_desc(irq);
308 struct irqaction *action;
309 irqreturn_t action_ret;
310
311 might_sleep();
312
313 raw_spin_lock_irq(&desc->lock);
314
315 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
316 kstat_incr_irqs_this_cpu(irq, desc);
317
318 action = desc->action;
319 if (unlikely(!action || irqd_irq_disabled(&desc->irq_data))) {
320 desc->istate |= IRQS_PENDING;
321 goto out_unlock;
322 }
323
324 irqd_set(&desc->irq_data, IRQD_IRQ_INPROGRESS);
325 raw_spin_unlock_irq(&desc->lock);
326
327 action_ret = action->thread_fn(action->irq, action->dev_id);
328 if (!noirqdebug)
329 note_interrupt(irq, desc, action_ret);
330
331 raw_spin_lock_irq(&desc->lock);
332 irqd_clear(&desc->irq_data, IRQD_IRQ_INPROGRESS);
333
334out_unlock:
335 raw_spin_unlock_irq(&desc->lock);
336}
337EXPORT_SYMBOL_GPL(handle_nested_irq);
338
339static bool irq_check_poll(struct irq_desc *desc)
340{
341 if (!(desc->istate & IRQS_POLL_INPROGRESS))
342 return false;
343 return irq_wait_for_poll(desc);
344}
345
346/**
347 * handle_simple_irq - Simple and software-decoded IRQs.
348 * @irq: the interrupt number
349 * @desc: the interrupt description structure for this irq
350 *
351 * Simple interrupts are either sent from a demultiplexing interrupt
352 * handler or come from hardware, where no interrupt hardware control
353 * is necessary.
354 *
355 * Note: The caller is expected to handle the ack, clear, mask and
356 * unmask issues if necessary.
357 */
358void
359handle_simple_irq(unsigned int irq, struct irq_desc *desc)
360{
361 raw_spin_lock(&desc->lock);
362
363 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
364 if (!irq_check_poll(desc))
365 goto out_unlock;
366
367 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
368 kstat_incr_irqs_this_cpu(irq, desc);
369
370 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
371 desc->istate |= IRQS_PENDING;
372 goto out_unlock;
373 }
374
375 handle_irq_event(desc);
376
377out_unlock:
378 raw_spin_unlock(&desc->lock);
379}
380EXPORT_SYMBOL_GPL(handle_simple_irq);
381
382/*
383 * Called unconditionally from handle_level_irq() and only for oneshot
384 * interrupts from handle_fasteoi_irq()
385 */
386static void cond_unmask_irq(struct irq_desc *desc)
387{
388 /*
389 * We need to unmask in the following cases:
390 * - Standard level irq (IRQF_ONESHOT is not set)
391 * - Oneshot irq which did not wake the thread (caused by a
392 * spurious interrupt or a primary handler handling it
393 * completely).
394 */
395 if (!irqd_irq_disabled(&desc->irq_data) &&
396 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot)
397 unmask_irq(desc);
398}
399
400/**
401 * handle_level_irq - Level type irq handler
402 * @irq: the interrupt number
403 * @desc: the interrupt description structure for this irq
404 *
405 * Level type interrupts are active as long as the hardware line has
406 * the active level. This may require to mask the interrupt and unmask
407 * it after the associated handler has acknowledged the device, so the
408 * interrupt line is back to inactive.
409 */
410void
411handle_level_irq(unsigned int irq, struct irq_desc *desc)
412{
413 raw_spin_lock(&desc->lock);
414 mask_ack_irq(desc);
415
416 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
417 if (!irq_check_poll(desc))
418 goto out_unlock;
419
420 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
421 kstat_incr_irqs_this_cpu(irq, desc);
422
423 /*
424 * If its disabled or no action available
425 * keep it masked and get out of here
426 */
427 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
428 desc->istate |= IRQS_PENDING;
429 goto out_unlock;
430 }
431
432 handle_irq_event(desc);
433
434 cond_unmask_irq(desc);
435
436out_unlock:
437 raw_spin_unlock(&desc->lock);
438}
439EXPORT_SYMBOL_GPL(handle_level_irq);
440
441#ifdef CONFIG_IRQ_PREFLOW_FASTEOI
442static inline void preflow_handler(struct irq_desc *desc)
443{
444 if (desc->preflow_handler)
445 desc->preflow_handler(&desc->irq_data);
446}
447#else
448static inline void preflow_handler(struct irq_desc *desc) { }
449#endif
450
451static void cond_unmask_eoi_irq(struct irq_desc *desc, struct irq_chip *chip)
452{
453 if (!(desc->istate & IRQS_ONESHOT)) {
454 chip->irq_eoi(&desc->irq_data);
455 return;
456 }
457 /*
458 * We need to unmask in the following cases:
459 * - Oneshot irq which did not wake the thread (caused by a
460 * spurious interrupt or a primary handler handling it
461 * completely).
462 */
463 if (!irqd_irq_disabled(&desc->irq_data) &&
464 irqd_irq_masked(&desc->irq_data) && !desc->threads_oneshot) {
465 chip->irq_eoi(&desc->irq_data);
466 unmask_irq(desc);
467 } else if (!(chip->flags & IRQCHIP_EOI_THREADED)) {
468 chip->irq_eoi(&desc->irq_data);
469 }
470}
471
472/**
473 * handle_fasteoi_irq - irq handler for transparent controllers
474 * @irq: the interrupt number
475 * @desc: the interrupt description structure for this irq
476 *
477 * Only a single callback will be issued to the chip: an ->eoi()
478 * call when the interrupt has been serviced. This enables support
479 * for modern forms of interrupt handlers, which handle the flow
480 * details in hardware, transparently.
481 */
482void
483handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
484{
485 struct irq_chip *chip = desc->irq_data.chip;
486
487 raw_spin_lock(&desc->lock);
488
489 if (unlikely(irqd_irq_inprogress(&desc->irq_data)))
490 if (!irq_check_poll(desc))
491 goto out;
492
493 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
494 kstat_incr_irqs_this_cpu(irq, desc);
495
496 /*
497 * If its disabled or no action available
498 * then mask it and get out of here:
499 */
500 if (unlikely(!desc->action || irqd_irq_disabled(&desc->irq_data))) {
501 desc->istate |= IRQS_PENDING;
502 mask_irq(desc);
503 goto out;
504 }
505
506 if (desc->istate & IRQS_ONESHOT)
507 mask_irq(desc);
508
509 preflow_handler(desc);
510 handle_irq_event(desc);
511
512 cond_unmask_eoi_irq(desc, chip);
513
514 raw_spin_unlock(&desc->lock);
515 return;
516out:
517 if (!(chip->flags & IRQCHIP_EOI_IF_HANDLED))
518 chip->irq_eoi(&desc->irq_data);
519 raw_spin_unlock(&desc->lock);
520}
521
522/**
523 * handle_edge_irq - edge type IRQ handler
524 * @irq: the interrupt number
525 * @desc: the interrupt description structure for this irq
526 *
527 * Interrupt occures on the falling and/or rising edge of a hardware
528 * signal. The occurrence is latched into the irq controller hardware
529 * and must be acked in order to be reenabled. After the ack another
530 * interrupt can happen on the same source even before the first one
531 * is handled by the associated event handler. If this happens it
532 * might be necessary to disable (mask) the interrupt depending on the
533 * controller hardware. This requires to reenable the interrupt inside
534 * of the loop which handles the interrupts which have arrived while
535 * the handler was running. If all pending interrupts are handled, the
536 * loop is left.
537 */
538void
539handle_edge_irq(unsigned int irq, struct irq_desc *desc)
540{
541 raw_spin_lock(&desc->lock);
542
543 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
544 /*
545 * If we're currently running this IRQ, or its disabled,
546 * we shouldn't process the IRQ. Mark it pending, handle
547 * the necessary masking and go out
548 */
549 if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
550 irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
551 if (!irq_check_poll(desc)) {
552 desc->istate |= IRQS_PENDING;
553 mask_ack_irq(desc);
554 goto out_unlock;
555 }
556 }
557 kstat_incr_irqs_this_cpu(irq, desc);
558
559 /* Start handling the irq */
560 desc->irq_data.chip->irq_ack(&desc->irq_data);
561
562 do {
563 if (unlikely(!desc->action)) {
564 mask_irq(desc);
565 goto out_unlock;
566 }
567
568 /*
569 * When another irq arrived while we were handling
570 * one, we could have masked the irq.
571 * Renable it, if it was not disabled in meantime.
572 */
573 if (unlikely(desc->istate & IRQS_PENDING)) {
574 if (!irqd_irq_disabled(&desc->irq_data) &&
575 irqd_irq_masked(&desc->irq_data))
576 unmask_irq(desc);
577 }
578
579 handle_irq_event(desc);
580
581 } while ((desc->istate & IRQS_PENDING) &&
582 !irqd_irq_disabled(&desc->irq_data));
583
584out_unlock:
585 raw_spin_unlock(&desc->lock);
586}
587EXPORT_SYMBOL(handle_edge_irq);
588
589#ifdef CONFIG_IRQ_EDGE_EOI_HANDLER
590/**
591 * handle_edge_eoi_irq - edge eoi type IRQ handler
592 * @irq: the interrupt number
593 * @desc: the interrupt description structure for this irq
594 *
595 * Similar as the above handle_edge_irq, but using eoi and w/o the
596 * mask/unmask logic.
597 */
598void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc)
599{
600 struct irq_chip *chip = irq_desc_get_chip(desc);
601
602 raw_spin_lock(&desc->lock);
603
604 desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
605 /*
606 * If we're currently running this IRQ, or its disabled,
607 * we shouldn't process the IRQ. Mark it pending, handle
608 * the necessary masking and go out
609 */
610 if (unlikely(irqd_irq_disabled(&desc->irq_data) ||
611 irqd_irq_inprogress(&desc->irq_data) || !desc->action)) {
612 if (!irq_check_poll(desc)) {
613 desc->istate |= IRQS_PENDING;
614 goto out_eoi;
615 }
616 }
617 kstat_incr_irqs_this_cpu(irq, desc);
618
619 do {
620 if (unlikely(!desc->action))
621 goto out_eoi;
622
623 handle_irq_event(desc);
624
625 } while ((desc->istate & IRQS_PENDING) &&
626 !irqd_irq_disabled(&desc->irq_data));
627
628out_eoi:
629 chip->irq_eoi(&desc->irq_data);
630 raw_spin_unlock(&desc->lock);
631}
632#endif
633
634/**
635 * handle_percpu_irq - Per CPU local irq handler
636 * @irq: the interrupt number
637 * @desc: the interrupt description structure for this irq
638 *
639 * Per CPU interrupts on SMP machines without locking requirements
640 */
641void
642handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
643{
644 struct irq_chip *chip = irq_desc_get_chip(desc);
645
646 kstat_incr_irqs_this_cpu(irq, desc);
647
648 if (chip->irq_ack)
649 chip->irq_ack(&desc->irq_data);
650
651 handle_irq_event_percpu(desc, desc->action);
652
653 if (chip->irq_eoi)
654 chip->irq_eoi(&desc->irq_data);
655}
656
657/**
658 * handle_percpu_devid_irq - Per CPU local irq handler with per cpu dev ids
659 * @irq: the interrupt number
660 * @desc: the interrupt description structure for this irq
661 *
662 * Per CPU interrupts on SMP machines without locking requirements. Same as
663 * handle_percpu_irq() above but with the following extras:
664 *
665 * action->percpu_dev_id is a pointer to percpu variables which
666 * contain the real device id for the cpu on which this handler is
667 * called
668 */
669void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc)
670{
671 struct irq_chip *chip = irq_desc_get_chip(desc);
672 struct irqaction *action = desc->action;
673 void *dev_id = __this_cpu_ptr(action->percpu_dev_id);
674 irqreturn_t res;
675
676 kstat_incr_irqs_this_cpu(irq, desc);
677
678 if (chip->irq_ack)
679 chip->irq_ack(&desc->irq_data);
680
681 trace_irq_handler_entry(irq, action);
682 res = action->handler(irq, dev_id);
683 trace_irq_handler_exit(irq, action, res);
684
685 if (chip->irq_eoi)
686 chip->irq_eoi(&desc->irq_data);
687}
688
689void
690__irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
691 const char *name)
692{
693 unsigned long flags;
694 struct irq_desc *desc = irq_get_desc_buslock(irq, &flags, 0);
695
696 if (!desc)
697 return;
698
699 if (!handle) {
700 handle = handle_bad_irq;
701 } else {
702 if (WARN_ON(desc->irq_data.chip == &no_irq_chip))
703 goto out;
704 }
705
706 /* Uninstall? */
707 if (handle == handle_bad_irq) {
708 if (desc->irq_data.chip != &no_irq_chip)
709 mask_ack_irq(desc);
710 irq_state_set_disabled(desc);
711 desc->depth = 1;
712 }
713 desc->handle_irq = handle;
714 desc->name = name;
715
716 if (handle != handle_bad_irq && is_chained) {
717 irq_settings_set_noprobe(desc);
718 irq_settings_set_norequest(desc);
719 irq_settings_set_nothread(desc);
720 irq_startup(desc, true);
721 }
722out:
723 irq_put_desc_busunlock(desc, flags);
724}
725EXPORT_SYMBOL_GPL(__irq_set_handler);
726
727void
728irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
729 irq_flow_handler_t handle, const char *name)
730{
731 irq_set_chip(irq, chip);
732 __irq_set_handler(irq, handle, 0, name);
733}
734EXPORT_SYMBOL_GPL(irq_set_chip_and_handler_name);
735
736void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
737{
738 unsigned long flags;
739 struct irq_desc *desc = irq_get_desc_lock(irq, &flags, 0);
740
741 if (!desc)
742 return;
743 irq_settings_clr_and_set(desc, clr, set);
744
745 irqd_clear(&desc->irq_data, IRQD_NO_BALANCING | IRQD_PER_CPU |
746 IRQD_TRIGGER_MASK | IRQD_LEVEL | IRQD_MOVE_PCNTXT);
747 if (irq_settings_has_no_balance_set(desc))
748 irqd_set(&desc->irq_data, IRQD_NO_BALANCING);
749 if (irq_settings_is_per_cpu(desc))
750 irqd_set(&desc->irq_data, IRQD_PER_CPU);
751 if (irq_settings_can_move_pcntxt(desc))
752 irqd_set(&desc->irq_data, IRQD_MOVE_PCNTXT);
753 if (irq_settings_is_level(desc))
754 irqd_set(&desc->irq_data, IRQD_LEVEL);
755
756 irqd_set(&desc->irq_data, irq_settings_get_trigger_mask(desc));
757
758 irq_put_desc_unlock(desc, flags);
759}
760EXPORT_SYMBOL_GPL(irq_modify_status);
761
762/**
763 * irq_cpu_online - Invoke all irq_cpu_online functions.
764 *
765 * Iterate through all irqs and invoke the chip.irq_cpu_online()
766 * for each.
767 */
768void irq_cpu_online(void)
769{
770 struct irq_desc *desc;
771 struct irq_chip *chip;
772 unsigned long flags;
773 unsigned int irq;
774
775 for_each_active_irq(irq) {
776 desc = irq_to_desc(irq);
777 if (!desc)
778 continue;
779
780 raw_spin_lock_irqsave(&desc->lock, flags);
781
782 chip = irq_data_get_irq_chip(&desc->irq_data);
783 if (chip && chip->irq_cpu_online &&
784 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
785 !irqd_irq_disabled(&desc->irq_data)))
786 chip->irq_cpu_online(&desc->irq_data);
787
788 raw_spin_unlock_irqrestore(&desc->lock, flags);
789 }
790}
791
792/**
793 * irq_cpu_offline - Invoke all irq_cpu_offline functions.
794 *
795 * Iterate through all irqs and invoke the chip.irq_cpu_offline()
796 * for each.
797 */
798void irq_cpu_offline(void)
799{
800 struct irq_desc *desc;
801 struct irq_chip *chip;
802 unsigned long flags;
803 unsigned int irq;
804
805 for_each_active_irq(irq) {
806 desc = irq_to_desc(irq);
807 if (!desc)
808 continue;
809
810 raw_spin_lock_irqsave(&desc->lock, flags);
811
812 chip = irq_data_get_irq_chip(&desc->irq_data);
813 if (chip && chip->irq_cpu_offline &&
814 (!(chip->flags & IRQCHIP_ONOFFLINE_ENABLED) ||
815 !irqd_irq_disabled(&desc->irq_data)))
816 chip->irq_cpu_offline(&desc->irq_data);
817
818 raw_spin_unlock_irqrestore(&desc->lock, flags);
819 }
820}