1/*
  2 * Common boot and setup code for both 32-bit and 64-bit.
  3 * Extracted from arch/powerpc/kernel/setup_64.c.
  4 *
  5 * Copyright (C) 2001 PPC64 Team, IBM Corp
  6 *
  7 *      This program is free software; you can redistribute it and/or
  8 *      modify it under the terms of the GNU General Public License
  9 *      as published by the Free Software Foundation; either version
 10 *      2 of the License, or (at your option) any later version.
 11 */
 12
 13#undef DEBUG
 14
 15#include <linux/export.h>
 16#include <linux/string.h>
 17#include <linux/sched.h>
 18#include <linux/init.h>
 19#include <linux/kernel.h>
 20#include <linux/reboot.h>
 21#include <linux/delay.h>
 22#include <linux/initrd.h>
 23#include <linux/platform_device.h>
 24#include <linux/seq_file.h>
 25#include <linux/ioport.h>
 26#include <linux/console.h>
 27#include <linux/screen_info.h>
 28#include <linux/root_dev.h>
 29#include <linux/notifier.h>
 30#include <linux/cpu.h>
 31#include <linux/unistd.h>
 32#include <linux/serial.h>
 33#include <linux/serial_8250.h>
 
 34#include <linux/percpu.h>
 35#include <linux/memblock.h>
 36#include <linux/of_platform.h>
 37#include <linux/hugetlb.h>
 38#include <asm/debugfs.h>
 39#include <asm/io.h>
 40#include <asm/paca.h>
 41#include <asm/prom.h>
 42#include <asm/processor.h>
 43#include <asm/vdso_datapage.h>
 44#include <asm/pgtable.h>
 45#include <asm/smp.h>
 46#include <asm/elf.h>
 47#include <asm/machdep.h>
 48#include <asm/time.h>
 49#include <asm/cputable.h>
 50#include <asm/sections.h>
 51#include <asm/firmware.h>
 52#include <asm/btext.h>
 53#include <asm/nvram.h>
 54#include <asm/setup.h>
 55#include <asm/rtas.h>
 56#include <asm/iommu.h>
 57#include <asm/serial.h>
 58#include <asm/cache.h>
 59#include <asm/page.h>
 60#include <asm/mmu.h>
 61#include <asm/xmon.h>
 62#include <asm/cputhreads.h>
 63#include <mm/mmu_decl.h>
 64#include <asm/fadump.h>
 65#include <asm/udbg.h>
 66#include <asm/hugetlb.h>
 67#include <asm/livepatch.h>
 68#include <asm/mmu_context.h>
 69#include <asm/cpu_has_feature.h>
 70
 71#include "setup.h"
 72
 73#ifdef DEBUG
 74#include <asm/udbg.h>
 75#define DBG(fmt...) udbg_printf(fmt)
 76#else
 77#define DBG(fmt...)
 78#endif
 79
 80/* The main machine-dep calls structure
 81 */
 82struct machdep_calls ppc_md;
 83EXPORT_SYMBOL(ppc_md);
 84struct machdep_calls *machine_id;
 85EXPORT_SYMBOL(machine_id);
 86
 87int boot_cpuid = -1;
 88EXPORT_SYMBOL_GPL(boot_cpuid);
 89
 90/*
 91 * These are used in binfmt_elf.c to put aux entries on the stack
 92 * for each elf executable being started.
 93 */
 94int dcache_bsize;
 95int icache_bsize;
 96int ucache_bsize;
 97
 98
 99unsigned long klimit = (unsigned long) _end;
100
 
 
101/*
102 * This still seems to be needed... -- paulus
103 */ 
104struct screen_info screen_info = {
105	.orig_x = 0,
106	.orig_y = 25,
107	.orig_video_cols = 80,
108	.orig_video_lines = 25,
109	.orig_video_isVGA = 1,
110	.orig_video_points = 16
111};
112#if defined(CONFIG_FB_VGA16_MODULE)
113EXPORT_SYMBOL(screen_info);
114#endif
115
116/* Variables required to store legacy IO irq routing */
117int of_i8042_kbd_irq;
118EXPORT_SYMBOL_GPL(of_i8042_kbd_irq);
119int of_i8042_aux_irq;
120EXPORT_SYMBOL_GPL(of_i8042_aux_irq);
121
122#ifdef __DO_IRQ_CANON
123/* XXX should go elsewhere eventually */
124int ppc_do_canonicalize_irqs;
125EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
126#endif
127
128#ifdef CONFIG_CRASH_CORE
129/* This keeps a track of which one is the crashing cpu. */
130int crashing_cpu = -1;
131#endif
132
133/* also used by kexec */
134void machine_shutdown(void)
135{
136#ifdef CONFIG_FA_DUMP
137	/*
138	 * if fadump is active, cleanup the fadump registration before we
139	 * shutdown.
140	 */
141	fadump_cleanup();
142#endif
143
144	if (ppc_md.machine_shutdown)
145		ppc_md.machine_shutdown();
146}
147
148static void machine_hang(void)
149{
150	pr_emerg("System Halted, OK to turn off power\n");
151	local_irq_disable();
152	while (1)
153		;
154}
155
156void machine_restart(char *cmd)
157{
158	machine_shutdown();
159	if (ppc_md.restart)
160		ppc_md.restart(cmd);
161
162	smp_send_stop();
163
164	do_kernel_restart(cmd);
165	mdelay(1000);
166
167	machine_hang();
168}
169
170void machine_power_off(void)
171{
172	machine_shutdown();
173	if (pm_power_off)
174		pm_power_off();
175
176	smp_send_stop();
177	machine_hang();
 
 
 
178}
179/* Used by the G5 thermal driver */
180EXPORT_SYMBOL_GPL(machine_power_off);
181
182void (*pm_power_off)(void);
183EXPORT_SYMBOL_GPL(pm_power_off);
184
185void machine_halt(void)
186{
187	machine_shutdown();
188	if (ppc_md.halt)
189		ppc_md.halt();
190
191	smp_send_stop();
192	machine_hang();
 
 
 
193}
194
195
196#ifdef CONFIG_TAU
197extern u32 cpu_temp(unsigned long cpu);
198extern u32 cpu_temp_both(unsigned long cpu);
199#endif /* CONFIG_TAU */
200
201#ifdef CONFIG_SMP
202DEFINE_PER_CPU(unsigned int, cpu_pvr);
203#endif
204
205static void show_cpuinfo_summary(struct seq_file *m)
206{
207	struct device_node *root;
208	const char *model = NULL;
209#if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
210	unsigned long bogosum = 0;
211	int i;
212	for_each_online_cpu(i)
213		bogosum += loops_per_jiffy;
214	seq_printf(m, "total bogomips\t: %lu.%02lu\n",
215		   bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
216#endif /* CONFIG_SMP && CONFIG_PPC32 */
217	seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
218	if (ppc_md.name)
219		seq_printf(m, "platform\t: %s\n", ppc_md.name);
220	root = of_find_node_by_path("/");
221	if (root)
222		model = of_get_property(root, "model", NULL);
223	if (model)
224		seq_printf(m, "model\t\t: %s\n", model);
225	of_node_put(root);
226
227	if (ppc_md.show_cpuinfo != NULL)
228		ppc_md.show_cpuinfo(m);
229
230#ifdef CONFIG_PPC32
231	/* Display the amount of memory */
232	seq_printf(m, "Memory\t\t: %d MB\n",
233		   (unsigned int)(total_memory / (1024 * 1024)));
234#endif
235}
236
237static int show_cpuinfo(struct seq_file *m, void *v)
238{
239	unsigned long cpu_id = (unsigned long)v - 1;
240	unsigned int pvr;
241	unsigned long proc_freq;
242	unsigned short maj;
243	unsigned short min;
244
 
 
 
 
 
 
 
 
245#ifdef CONFIG_SMP
246	pvr = per_cpu(cpu_pvr, cpu_id);
247#else
248	pvr = mfspr(SPRN_PVR);
249#endif
250	maj = (pvr >> 8) & 0xFF;
251	min = pvr & 0xFF;
252
253	seq_printf(m, "processor\t: %lu\n", cpu_id);
254	seq_printf(m, "cpu\t\t: ");
255
256	if (cur_cpu_spec->pvr_mask && cur_cpu_spec->cpu_name)
257		seq_printf(m, "%s", cur_cpu_spec->cpu_name);
258	else
259		seq_printf(m, "unknown (%08x)", pvr);
260
261#ifdef CONFIG_ALTIVEC
262	if (cpu_has_feature(CPU_FTR_ALTIVEC))
263		seq_printf(m, ", altivec supported");
264#endif /* CONFIG_ALTIVEC */
265
266	seq_printf(m, "\n");
267
268#ifdef CONFIG_TAU
269	if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
270#ifdef CONFIG_TAU_AVERAGE
271		/* more straightforward, but potentially misleading */
272		seq_printf(m,  "temperature \t: %u C (uncalibrated)\n",
273			   cpu_temp(cpu_id));
274#else
275		/* show the actual temp sensor range */
276		u32 temp;
277		temp = cpu_temp_both(cpu_id);
278		seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
279			   temp & 0xff, temp >> 16);
280#endif
281	}
282#endif /* CONFIG_TAU */
283
284	/*
285	 * Platforms that have variable clock rates, should implement
286	 * the method ppc_md.get_proc_freq() that reports the clock
287	 * rate of a given cpu. The rest can use ppc_proc_freq to
288	 * report the clock rate that is same across all cpus.
289	 */
290	if (ppc_md.get_proc_freq)
291		proc_freq = ppc_md.get_proc_freq(cpu_id);
292	else
293		proc_freq = ppc_proc_freq;
294
295	if (proc_freq)
296		seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
297			   proc_freq / 1000000, proc_freq % 1000000);
298
299	if (ppc_md.show_percpuinfo != NULL)
300		ppc_md.show_percpuinfo(m, cpu_id);
301
302	/* If we are a Freescale core do a simple check so
303	 * we dont have to keep adding cases in the future */
304	if (PVR_VER(pvr) & 0x8000) {
305		switch (PVR_VER(pvr)) {
306		case 0x8000:	/* 7441/7450/7451, Voyager */
307		case 0x8001:	/* 7445/7455, Apollo 6 */
308		case 0x8002:	/* 7447/7457, Apollo 7 */
309		case 0x8003:	/* 7447A, Apollo 7 PM */
310		case 0x8004:	/* 7448, Apollo 8 */
311		case 0x800c:	/* 7410, Nitro */
312			maj = ((pvr >> 8) & 0xF);
313			min = PVR_MIN(pvr);
314			break;
315		default:	/* e500/book-e */
316			maj = PVR_MAJ(pvr);
317			min = PVR_MIN(pvr);
318			break;
319		}
320	} else {
321		switch (PVR_VER(pvr)) {
322			case 0x0020:	/* 403 family */
323				maj = PVR_MAJ(pvr) + 1;
324				min = PVR_MIN(pvr);
325				break;
326			case 0x1008:	/* 740P/750P ?? */
327				maj = ((pvr >> 8) & 0xFF) - 1;
328				min = pvr & 0xFF;
329				break;
330			case 0x004e: /* POWER9 bits 12-15 give chip type */
331				maj = (pvr >> 8) & 0x0F;
332				min = pvr & 0xFF;
333				break;
334			default:
335				maj = (pvr >> 8) & 0xFF;
336				min = pvr & 0xFF;
337				break;
338		}
339	}
340
341	seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
342		   maj, min, PVR_VER(pvr), PVR_REV(pvr));
343
344#ifdef CONFIG_PPC32
345	seq_printf(m, "bogomips\t: %lu.%02lu\n",
346		   loops_per_jiffy / (500000/HZ),
347		   (loops_per_jiffy / (5000/HZ)) % 100);
348#endif
 
 
349	seq_printf(m, "\n");
 
 
 
350
351	/* If this is the last cpu, print the summary */
352	if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
353		show_cpuinfo_summary(m);
354
355	return 0;
356}
357
358static void *c_start(struct seq_file *m, loff_t *pos)
359{
360	if (*pos == 0)	/* just in case, cpu 0 is not the first */
361		*pos = cpumask_first(cpu_online_mask);
362	else
363		*pos = cpumask_next(*pos - 1, cpu_online_mask);
364	if ((*pos) < nr_cpu_ids)
365		return (void *)(unsigned long)(*pos + 1);
366	return NULL;
367}
368
369static void *c_next(struct seq_file *m, void *v, loff_t *pos)
370{
371	(*pos)++;
372	return c_start(m, pos);
373}
374
375static void c_stop(struct seq_file *m, void *v)
376{
377}
378
379const struct seq_operations cpuinfo_op = {
380	.start	= c_start,
381	.next	= c_next,
382	.stop	= c_stop,
383	.show	= show_cpuinfo,
384};
385
386void __init check_for_initrd(void)
387{
388#ifdef CONFIG_BLK_DEV_INITRD
389	DBG(" -> check_for_initrd()  initrd_start=0x%lx  initrd_end=0x%lx\n",
390	    initrd_start, initrd_end);
391
392	/* If we were passed an initrd, set the ROOT_DEV properly if the values
393	 * look sensible. If not, clear initrd reference.
394	 */
395	if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
396	    initrd_end > initrd_start)
397		ROOT_DEV = Root_RAM0;
398	else
399		initrd_start = initrd_end = 0;
400
401	if (initrd_start)
402		pr_info("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
403
404	DBG(" <- check_for_initrd()\n");
405#endif /* CONFIG_BLK_DEV_INITRD */
406}
407
408#ifdef CONFIG_SMP
409
410int threads_per_core, threads_per_subcore, threads_shift;
411cpumask_t threads_core_mask;
412EXPORT_SYMBOL_GPL(threads_per_core);
413EXPORT_SYMBOL_GPL(threads_per_subcore);
414EXPORT_SYMBOL_GPL(threads_shift);
415EXPORT_SYMBOL_GPL(threads_core_mask);
416
417static void __init cpu_init_thread_core_maps(int tpc)
418{
419	int i;
420
421	threads_per_core = tpc;
422	threads_per_subcore = tpc;
423	cpumask_clear(&threads_core_mask);
424
425	/* This implementation only supports power of 2 number of threads
426	 * for simplicity and performance
427	 */
428	threads_shift = ilog2(tpc);
429	BUG_ON(tpc != (1 << threads_shift));
430
431	for (i = 0; i < tpc; i++)
432		cpumask_set_cpu(i, &threads_core_mask);
433
434	printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
435	       tpc, tpc > 1 ? "s" : "");
436	printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
437}
438
439
440u32 *cpu_to_phys_id = NULL;
441
442/**
443 * setup_cpu_maps - initialize the following cpu maps:
444 *                  cpu_possible_mask
445 *                  cpu_present_mask
446 *
447 * Having the possible map set up early allows us to restrict allocations
448 * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
449 *
450 * We do not initialize the online map here; cpus set their own bits in
451 * cpu_online_mask as they come up.
452 *
453 * This function is valid only for Open Firmware systems.  finish_device_tree
454 * must be called before using this.
455 *
456 * While we're here, we may as well set the "physical" cpu ids in the paca.
457 *
458 * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
459 */
460void __init smp_setup_cpu_maps(void)
461{
462	struct device_node *dn;
463	int cpu = 0;
464	int nthreads = 1;
465
466	DBG("smp_setup_cpu_maps()\n");
467
468	cpu_to_phys_id = __va(memblock_alloc(nr_cpu_ids * sizeof(u32),
469							__alignof__(u32)));
470	memset(cpu_to_phys_id, 0, nr_cpu_ids * sizeof(u32));
471
472	for_each_node_by_type(dn, "cpu") {
473		const __be32 *intserv;
474		__be32 cpu_be;
475		int j, len;
476
477		DBG("  * %pOF...\n", dn);
478
479		intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
480				&len);
481		if (intserv) {
 
482			DBG("    ibm,ppc-interrupt-server#s -> %d threads\n",
483			    nthreads);
484		} else {
485			DBG("    no ibm,ppc-interrupt-server#s -> 1 thread\n");
486			intserv = of_get_property(dn, "reg", &len);
487			if (!intserv) {
488				cpu_be = cpu_to_be32(cpu);
489				/* XXX: what is this? uninitialized?? */
490				intserv = &cpu_be;	/* assume logical == phys */
491				len = 4;
492			}
493		}
494
495		nthreads = len / sizeof(int);
496
497		for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
498			bool avail;
499
500			DBG("    thread %d -> cpu %d (hard id %d)\n",
501			    j, cpu, be32_to_cpu(intserv[j]));
502
503			avail = of_device_is_available(dn);
504			if (!avail)
505				avail = !of_property_match_string(dn,
506						"enable-method", "spin-table");
507
508			set_cpu_present(cpu, avail);
509			set_cpu_possible(cpu, true);
510			cpu_to_phys_id[cpu] = be32_to_cpu(intserv[j]);
511			cpu++;
512		}
513
514		if (cpu >= nr_cpu_ids) {
515			of_node_put(dn);
516			break;
517		}
518	}
519
520	/* If no SMT supported, nthreads is forced to 1 */
521	if (!cpu_has_feature(CPU_FTR_SMT)) {
522		DBG("  SMT disabled ! nthreads forced to 1\n");
523		nthreads = 1;
524	}
525
526#ifdef CONFIG_PPC64
527	/*
528	 * On pSeries LPAR, we need to know how many cpus
529	 * could possibly be added to this partition.
530	 */
531	if (firmware_has_feature(FW_FEATURE_LPAR) &&
532	    (dn = of_find_node_by_path("/rtas"))) {
533		int num_addr_cell, num_size_cell, maxcpus;
534		const __be32 *ireg;
535
536		num_addr_cell = of_n_addr_cells(dn);
537		num_size_cell = of_n_size_cells(dn);
538
539		ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
540
541		if (!ireg)
542			goto out;
543
544		maxcpus = be32_to_cpup(ireg + num_addr_cell + num_size_cell);
545
546		/* Double maxcpus for processors which have SMT capability */
547		if (cpu_has_feature(CPU_FTR_SMT))
548			maxcpus *= nthreads;
549
550		if (maxcpus > nr_cpu_ids) {
551			printk(KERN_WARNING
552			       "Partition configured for %d cpus, "
553			       "operating system maximum is %u.\n",
554			       maxcpus, nr_cpu_ids);
555			maxcpus = nr_cpu_ids;
556		} else
557			printk(KERN_INFO "Partition configured for %d cpus.\n",
558			       maxcpus);
559
560		for (cpu = 0; cpu < maxcpus; cpu++)
561			set_cpu_possible(cpu, true);
562	out:
563		of_node_put(dn);
564	}
565	vdso_data->processorCount = num_present_cpus();
566#endif /* CONFIG_PPC64 */
567
568        /* Initialize CPU <=> thread mapping/
569	 *
570	 * WARNING: We assume that the number of threads is the same for
571	 * every CPU in the system. If that is not the case, then some code
572	 * here will have to be reworked
573	 */
574	cpu_init_thread_core_maps(nthreads);
575
576	/* Now that possible cpus are set, set nr_cpu_ids for later use */
577	setup_nr_cpu_ids();
578
579	free_unused_pacas();
580}
581#endif /* CONFIG_SMP */
582
583#ifdef CONFIG_PCSPKR_PLATFORM
584static __init int add_pcspkr(void)
585{
586	struct device_node *np;
587	struct platform_device *pd;
588	int ret;
589
590	np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
591	of_node_put(np);
592	if (!np)
593		return -ENODEV;
594
595	pd = platform_device_alloc("pcspkr", -1);
596	if (!pd)
597		return -ENOMEM;
598
599	ret = platform_device_add(pd);
600	if (ret)
601		platform_device_put(pd);
602
603	return ret;
604}
605device_initcall(add_pcspkr);
606#endif	/* CONFIG_PCSPKR_PLATFORM */
607
608void probe_machine(void)
609{
610	extern struct machdep_calls __machine_desc_start;
611	extern struct machdep_calls __machine_desc_end;
612	unsigned int i;
613
614	/*
615	 * Iterate all ppc_md structures until we find the proper
616	 * one for the current machine type
617	 */
618	DBG("Probing machine type ...\n");
619
620	/*
621	 * Check ppc_md is empty, if not we have a bug, ie, we setup an
622	 * entry before probe_machine() which will be overwritten
623	 */
624	for (i = 0; i < (sizeof(ppc_md) / sizeof(void *)); i++) {
625		if (((void **)&ppc_md)[i]) {
626			printk(KERN_ERR "Entry %d in ppc_md non empty before"
627			       " machine probe !\n", i);
628		}
629	}
630
631	for (machine_id = &__machine_desc_start;
632	     machine_id < &__machine_desc_end;
633	     machine_id++) {
634		DBG("  %s ...", machine_id->name);
635		memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
636		if (ppc_md.probe()) {
637			DBG(" match !\n");
638			break;
639		}
640		DBG("\n");
641	}
642	/* What can we do if we didn't find ? */
643	if (machine_id >= &__machine_desc_end) {
644		DBG("No suitable machine found !\n");
645		for (;;);
646	}
647
648	printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
649}
650
651/* Match a class of boards, not a specific device configuration. */
652int check_legacy_ioport(unsigned long base_port)
653{
654	struct device_node *parent, *np = NULL;
655	int ret = -ENODEV;
656
657	switch(base_port) {
658	case I8042_DATA_REG:
659		if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
660			np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
661		if (np) {
662			parent = of_get_parent(np);
663
664			of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
665			if (!of_i8042_kbd_irq)
666				of_i8042_kbd_irq = 1;
667
668			of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
669			if (!of_i8042_aux_irq)
670				of_i8042_aux_irq = 12;
671
672			of_node_put(np);
673			np = parent;
674			break;
675		}
676		np = of_find_node_by_type(NULL, "8042");
677		/* Pegasos has no device_type on its 8042 node, look for the
678		 * name instead */
679		if (!np)
680			np = of_find_node_by_name(NULL, "8042");
681		if (np) {
682			of_i8042_kbd_irq = 1;
683			of_i8042_aux_irq = 12;
684		}
685		break;
686	case FDC_BASE: /* FDC1 */
687		np = of_find_node_by_type(NULL, "fdc");
688		break;
689	default:
690		/* ipmi is supposed to fail here */
691		break;
692	}
693	if (!np)
694		return ret;
695	parent = of_get_parent(np);
696	if (parent) {
697		if (strcmp(parent->type, "isa") == 0)
698			ret = 0;
699		of_node_put(parent);
700	}
701	of_node_put(np);
702	return ret;
703}
704EXPORT_SYMBOL(check_legacy_ioport);
705
706static int ppc_panic_event(struct notifier_block *this,
707                             unsigned long event, void *ptr)
708{
709	/*
710	 * If firmware-assisted dump has been registered then trigger
711	 * firmware-assisted dump and let firmware handle everything else.
712	 */
713	crash_fadump(NULL, ptr);
714	ppc_md.panic(ptr);  /* May not return */
715	return NOTIFY_DONE;
716}
717
718static struct notifier_block ppc_panic_block = {
719	.notifier_call = ppc_panic_event,
720	.priority = INT_MIN /* may not return; must be done last */
721};
722
723void __init setup_panic(void)
724{
725	if (!ppc_md.panic)
726		return;
727	atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
728}
729
730#ifdef CONFIG_CHECK_CACHE_COHERENCY
731/*
732 * For platforms that have configurable cache-coherency.  This function
733 * checks that the cache coherency setting of the kernel matches the setting
734 * left by the firmware, as indicated in the device tree.  Since a mismatch
735 * will eventually result in DMA failures, we print * and error and call
736 * BUG() in that case.
737 */
738
739#ifdef CONFIG_NOT_COHERENT_CACHE
740#define KERNEL_COHERENCY	0
741#else
742#define KERNEL_COHERENCY	1
743#endif
744
745static int __init check_cache_coherency(void)
746{
747	struct device_node *np;
748	const void *prop;
749	int devtree_coherency;
750
751	np = of_find_node_by_path("/");
752	prop = of_get_property(np, "coherency-off", NULL);
753	of_node_put(np);
754
755	devtree_coherency = prop ? 0 : 1;
756
757	if (devtree_coherency != KERNEL_COHERENCY) {
758		printk(KERN_ERR
759			"kernel coherency:%s != device tree_coherency:%s\n",
760			KERNEL_COHERENCY ? "on" : "off",
761			devtree_coherency ? "on" : "off");
762		BUG();
763	}
764
765	return 0;
766}
767
768late_initcall(check_cache_coherency);
769#endif /* CONFIG_CHECK_CACHE_COHERENCY */
770
771#ifdef CONFIG_DEBUG_FS
772struct dentry *powerpc_debugfs_root;
773EXPORT_SYMBOL(powerpc_debugfs_root);
774
775static int powerpc_debugfs_init(void)
776{
777	powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
778
779	return powerpc_debugfs_root == NULL;
780}
781arch_initcall(powerpc_debugfs_init);
782#endif
783
784void ppc_printk_progress(char *s, unsigned short hex)
785{
786	pr_info("%s\n", s);
787}
788
789void arch_setup_pdev_archdata(struct platform_device *pdev)
790{
791	pdev->archdata.dma_mask = DMA_BIT_MASK(32);
792	pdev->dev.dma_mask = &pdev->archdata.dma_mask;
793 	set_dma_ops(&pdev->dev, &dma_nommu_ops);
794}
795
796static __init void print_system_info(void)
 
797{
798	pr_info("-----------------------------------------------------\n");
799#ifdef CONFIG_PPC_BOOK3S_64
800	pr_info("ppc64_pft_size    = 0x%llx\n", ppc64_pft_size);
801#endif
802#ifdef CONFIG_PPC_STD_MMU_32
803	pr_info("Hash_size         = 0x%lx\n", Hash_size);
804#endif
805	pr_info("phys_mem_size     = 0x%llx\n",
806		(unsigned long long)memblock_phys_mem_size());
807
808	pr_info("dcache_bsize      = 0x%x\n", dcache_bsize);
809	pr_info("icache_bsize      = 0x%x\n", icache_bsize);
810	if (ucache_bsize != 0)
811		pr_info("ucache_bsize      = 0x%x\n", ucache_bsize);
812
813	pr_info("cpu_features      = 0x%016lx\n", cur_cpu_spec->cpu_features);
814	pr_info("  possible        = 0x%016lx\n",
815		(unsigned long)CPU_FTRS_POSSIBLE);
816	pr_info("  always          = 0x%016lx\n",
817		(unsigned long)CPU_FTRS_ALWAYS);
818	pr_info("cpu_user_features = 0x%08x 0x%08x\n",
819		cur_cpu_spec->cpu_user_features,
820		cur_cpu_spec->cpu_user_features2);
821	pr_info("mmu_features      = 0x%08x\n", cur_cpu_spec->mmu_features);
822#ifdef CONFIG_PPC64
823	pr_info("firmware_features = 0x%016lx\n", powerpc_firmware_features);
824#endif
825
826#ifdef CONFIG_PPC_BOOK3S_64
827	if (htab_address)
828		pr_info("htab_address      = 0x%p\n", htab_address);
829	if (htab_hash_mask)
830		pr_info("htab_hash_mask    = 0x%lx\n", htab_hash_mask);
831#endif
832#ifdef CONFIG_PPC_STD_MMU_32
833	if (Hash)
834		pr_info("Hash              = 0x%p\n", Hash);
835	if (Hash_mask)
836		pr_info("Hash_mask         = 0x%lx\n", Hash_mask);
837#endif
838
839	if (PHYSICAL_START > 0)
840		pr_info("physical_start    = 0x%llx\n",
841		       (unsigned long long)PHYSICAL_START);
842	pr_info("-----------------------------------------------------\n");
843}
 
844
845#ifdef CONFIG_SMP
846static void smp_setup_pacas(void)
847{
848	int cpu;
849
850	for_each_possible_cpu(cpu) {
851		if (cpu == smp_processor_id())
852			continue;
853		allocate_paca(cpu);
854		set_hard_smp_processor_id(cpu, cpu_to_phys_id[cpu]);
855	}
856
857	memblock_free(__pa(cpu_to_phys_id), nr_cpu_ids * sizeof(u32));
858	cpu_to_phys_id = NULL;
859}
860#endif
 
861
862/*
863 * Called into from start_kernel this initializes memblock, which is used
864 * to manage page allocation until mem_init is called.
865 */
866void __init setup_arch(char **cmdline_p)
867{
868	*cmdline_p = boot_command_line;
869
870	/* Set a half-reasonable default so udelay does something sensible */
871	loops_per_jiffy = 500000000 / HZ;
872
873	/* Unflatten the device-tree passed by prom_init or kexec */
874	unflatten_device_tree();
875
876	/*
877	 * Initialize cache line/block info from device-tree (on ppc64) or
878	 * just cputable (on ppc32).
879	 */
880	initialize_cache_info();
881
882	/* Initialize RTAS if available. */
883	rtas_initialize();
884
885	/* Check if we have an initrd provided via the device-tree. */
886	check_for_initrd();
887
888	/* Probe the machine type, establish ppc_md. */
889	probe_machine();
890
891	/* Setup panic notifier if requested by the platform. */
892	setup_panic();
893
894	/*
895	 * Configure ppc_md.power_save (ppc32 only, 64-bit machines do
896	 * it from their respective probe() function.
897	 */
898	setup_power_save();
899
900	/* Discover standard serial ports. */
901	find_legacy_serial_ports();
902
903	/* Register early console with the printk subsystem. */
904	register_early_udbg_console();
905
906	/* Setup the various CPU maps based on the device-tree. */
907	smp_setup_cpu_maps();
908
909	/* Initialize xmon. */
910	xmon_setup();
911
912	/* Check the SMT related command line arguments (ppc64). */
913	check_smt_enabled();
914
915	/* Parse memory topology */
916	mem_topology_setup();
917
918	/*
919	 * Release secondary cpus out of their spinloops at 0x60 now that
920	 * we can map physical -> logical CPU ids.
921	 *
922	 * Freescale Book3e parts spin in a loop provided by firmware,
923	 * so smp_release_cpus() does nothing for them.
924	 */
925#ifdef CONFIG_SMP
926	smp_setup_pacas();
927
928	/* On BookE, setup per-core TLB data structures. */
929	setup_tlb_core_data();
930
931	smp_release_cpus();
932#endif
933
934	/* Print various info about the machine that has been gathered so far. */
935	print_system_info();
936
937	/* Reserve large chunks of memory for use by CMA for KVM. */
938	kvm_cma_reserve();
939
940	klp_init_thread_info(&init_thread_info);
941
942	init_mm.start_code = (unsigned long)_stext;
943	init_mm.end_code = (unsigned long) _etext;
944	init_mm.end_data = (unsigned long) _edata;
945	init_mm.brk = klimit;
946
947#ifdef CONFIG_PPC_MM_SLICES
948#ifdef CONFIG_PPC64
949	if (!radix_enabled())
950		init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW_USER64;
951#elif defined(CONFIG_PPC_8xx)
952	init_mm.context.slb_addr_limit = DEFAULT_MAP_WINDOW;
953#else
954#error	"context.addr_limit not initialized."
955#endif
956#endif
957
958#ifdef CONFIG_SPAPR_TCE_IOMMU
959	mm_iommu_init(&init_mm);
960#endif
961	irqstack_early_init();
962	exc_lvl_early_init();
963	emergency_stack_init();
964
965	initmem_init();
966
967#ifdef CONFIG_DUMMY_CONSOLE
968	conswitchp = &dummy_con;
969#endif
970	if (ppc_md.setup_arch)
971		ppc_md.setup_arch();
972
973	paging_init();
974
975	/* Initialize the MMU context management stuff. */
976	mmu_context_init();
977
978#ifdef CONFIG_PPC64
979	/* Interrupt code needs to be 64K-aligned. */
980	if ((unsigned long)_stext & 0xffff)
981		panic("Kernelbase not 64K-aligned (0x%lx)!\n",
982		      (unsigned long)_stext);
983#endif
984}