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v3.5.6
 
  1/* drivers/rtc/rtc-s3c.c
  2 *
  3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4 *		http://www.samsung.com/
  5 *
  6 * Copyright (c) 2004,2006 Simtec Electronics
  7 *	Ben Dooks, <ben@simtec.co.uk>
  8 *	http://armlinux.simtec.co.uk/
  9 *
 10 * This program is free software; you can redistribute it and/or modify
 11 * it under the terms of the GNU General Public License version 2 as
 12 * published by the Free Software Foundation.
 13 *
 14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
 15*/
 16
 17#include <linux/module.h>
 18#include <linux/fs.h>
 19#include <linux/string.h>
 20#include <linux/init.h>
 21#include <linux/platform_device.h>
 22#include <linux/interrupt.h>
 23#include <linux/rtc.h>
 24#include <linux/bcd.h>
 25#include <linux/clk.h>
 26#include <linux/log2.h>
 27#include <linux/slab.h>
 28#include <linux/of.h>
 
 
 29
 30#include <mach/hardware.h>
 31#include <asm/uaccess.h>
 32#include <asm/io.h>
 33#include <asm/irq.h>
 34#include <plat/regs-rtc.h>
 35
 36enum s3c_cpu_type {
 37	TYPE_S3C2410,
 38	TYPE_S3C2416,
 39	TYPE_S3C2443,
 40	TYPE_S3C64XX,
 41};
 
 
 
 
 42
 43struct s3c_rtc_drv_data {
 44	int cpu_type;
 
 
 45};
 46
 47/* I have yet to find an S3C implementation with more than one
 48 * of these rtc blocks in */
 49
 50static struct resource *s3c_rtc_mem;
 
 
 
 51
 52static struct clk *rtc_clk;
 53static void __iomem *s3c_rtc_base;
 54static int s3c_rtc_alarmno = NO_IRQ;
 55static int s3c_rtc_tickno  = NO_IRQ;
 56static bool wake_en;
 57static enum s3c_cpu_type s3c_rtc_cpu_type;
 58
 59static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
 60
 61static void s3c_rtc_alarm_clk_enable(bool enable)
 62{
 63	static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock);
 64	static bool alarm_clk_enabled;
 65	unsigned long irq_flags;
 66
 67	spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags);
 68	if (enable) {
 69		if (!alarm_clk_enabled) {
 70			clk_enable(rtc_clk);
 71			alarm_clk_enabled = true;
 72		}
 73	} else {
 74		if (alarm_clk_enabled) {
 75			clk_disable(rtc_clk);
 76			alarm_clk_enabled = false;
 77		}
 78	}
 79	spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags);
 80}
 81
 82/* IRQ Handlers */
 83
 84static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
 85{
 86	struct rtc_device *rdev = id;
 87
 88	clk_enable(rtc_clk);
 89	rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
 90
 91	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
 92		writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
 93
 94	clk_disable(rtc_clk);
 95
 96	s3c_rtc_alarm_clk_enable(false);
 97
 98	return IRQ_HANDLED;
 99}
100
101static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
 
102{
103	struct rtc_device *rdev = id;
104
105	clk_enable(rtc_clk);
106	rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
107
108	if (s3c_rtc_cpu_type == TYPE_S3C64XX)
109		writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
110
111	clk_disable(rtc_clk);
112	return IRQ_HANDLED;
113}
114
115/* Update control registers */
116static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
117{
 
 
118	unsigned int tmp;
 
119
120	pr_debug("%s: aie=%d\n", __func__, enabled);
121
122	clk_enable(rtc_clk);
123	tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
 
 
 
124
125	if (enabled)
126		tmp |= S3C2410_RTCALM_ALMEN;
127
128	writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
129	clk_disable(rtc_clk);
130
131	s3c_rtc_alarm_clk_enable(enabled);
132
133	return 0;
134}
135
136static int s3c_rtc_setfreq(struct device *dev, int freq)
137{
138	struct platform_device *pdev = to_platform_device(dev);
139	struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
140	unsigned int tmp = 0;
141	int val;
142
143	if (!is_power_of_2(freq))
144		return -EINVAL;
145
146	clk_enable(rtc_clk);
147	spin_lock_irq(&s3c_rtc_pie_lock);
148
149	if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
150		tmp = readb(s3c_rtc_base + S3C2410_TICNT);
151		tmp &= S3C2410_TICNT_ENABLE;
152	}
153
154	val = (rtc_dev->max_user_freq / freq) - 1;
155
156	if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
157		tmp |= S3C2443_TICNT_PART(val);
158		writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
 
159
160		if (s3c_rtc_cpu_type == TYPE_S3C2416)
161			writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
162	} else {
163		tmp |= val;
164	}
165
166	writel(tmp, s3c_rtc_base + S3C2410_TICNT);
167	spin_unlock_irq(&s3c_rtc_pie_lock);
168	clk_disable(rtc_clk);
169
170	return 0;
171}
172
173/* Time read/write */
174
175static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
176{
177	unsigned int have_retried = 0;
178	void __iomem *base = s3c_rtc_base;
179
180	clk_enable(rtc_clk);
181 retry_get_time:
182	rtc_tm->tm_min  = readb(base + S3C2410_RTCMIN);
183	rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
184	rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
185	rtc_tm->tm_mon  = readb(base + S3C2410_RTCMON);
186	rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
187	rtc_tm->tm_sec  = readb(base + S3C2410_RTCSEC);
 
 
 
188
189	/* the only way to work out wether the system was mid-update
 
190	 * when we read it is to check the second counter, and if it
191	 * is zero, then we re-try the entire read
192	 */
193
194	if (rtc_tm->tm_sec == 0 && !have_retried) {
195		have_retried = 1;
196		goto retry_get_time;
197	}
198
199	rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
200	rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
201	rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
202	rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
203	rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
204	rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
205
206	rtc_tm->tm_year += 100;
207
208	pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
209		 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
210		 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
211
212	rtc_tm->tm_mon -= 1;
 
 
 
 
 
213
214	clk_disable(rtc_clk);
215	return rtc_valid_tm(rtc_tm);
216}
217
218static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
 
219{
220	void __iomem *base = s3c_rtc_base;
221	int year = tm->tm_year - 100;
222
223	pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
224		 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
225		 tm->tm_hour, tm->tm_min, tm->tm_sec);
 
 
 
 
 
 
 
226
227	/* we get around y2k by simply not supporting it */
228
229	if (year < 0 || year >= 100) {
230		dev_err(dev, "rtc only supports 100 years\n");
231		return -EINVAL;
232	}
 
 
 
233
234	clk_enable(rtc_clk);
235	writeb(bin2bcd(tm->tm_sec),  base + S3C2410_RTCSEC);
236	writeb(bin2bcd(tm->tm_min),  base + S3C2410_RTCMIN);
237	writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
238	writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
239	writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
240	writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
241	clk_disable(rtc_clk);
242
 
243	return 0;
244}
245
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
246static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
247{
 
248	struct rtc_time *alm_tm = &alrm->time;
249	void __iomem *base = s3c_rtc_base;
250	unsigned int alm_en;
 
251
252	clk_enable(rtc_clk);
253	alm_tm->tm_sec  = readb(base + S3C2410_ALMSEC);
254	alm_tm->tm_min  = readb(base + S3C2410_ALMMIN);
255	alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
256	alm_tm->tm_mon  = readb(base + S3C2410_ALMMON);
257	alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
258	alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
 
 
 
259
260	alm_en = readb(base + S3C2410_RTCALM);
261
262	alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
263
264	pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
265		 alm_en,
266		 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
267		 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
268
 
269
270	/* decode the alarm enable field */
271
272	if (alm_en & S3C2410_RTCALM_SECEN)
273		alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
274	else
275		alm_tm->tm_sec = -1;
276
277	if (alm_en & S3C2410_RTCALM_MINEN)
278		alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
279	else
280		alm_tm->tm_min = -1;
281
282	if (alm_en & S3C2410_RTCALM_HOUREN)
283		alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
284	else
285		alm_tm->tm_hour = -1;
286
287	if (alm_en & S3C2410_RTCALM_DAYEN)
288		alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
289	else
290		alm_tm->tm_mday = -1;
291
292	if (alm_en & S3C2410_RTCALM_MONEN) {
293		alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
294		alm_tm->tm_mon -= 1;
295	} else {
296		alm_tm->tm_mon = -1;
297	}
298
299	if (alm_en & S3C2410_RTCALM_YEAREN)
300		alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
301	else
302		alm_tm->tm_year = -1;
303
304	clk_disable(rtc_clk);
305	return 0;
306}
307
308static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
309{
 
310	struct rtc_time *tm = &alrm->time;
311	void __iomem *base = s3c_rtc_base;
312	unsigned int alrm_en;
 
 
 
313
314	clk_enable(rtc_clk);
315	pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
316		 alrm->enabled,
317		 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
318		 tm->tm_hour, tm->tm_min, tm->tm_sec);
319
320	alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
321	writeb(0x00, base + S3C2410_RTCALM);
322
323	if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
324		alrm_en |= S3C2410_RTCALM_SECEN;
325		writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
326	}
327
328	if (tm->tm_min < 60 && tm->tm_min >= 0) {
329		alrm_en |= S3C2410_RTCALM_MINEN;
330		writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
331	}
332
333	if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
334		alrm_en |= S3C2410_RTCALM_HOUREN;
335		writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
336	}
337
338	pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
 
 
 
339
340	writeb(alrm_en, base + S3C2410_RTCALM);
 
 
 
341
342	s3c_rtc_setaie(dev, alrm->enabled);
343
344	clk_disable(rtc_clk);
345	return 0;
346}
347
348static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
349{
350	unsigned int ticnt;
351
352	clk_enable(rtc_clk);
353	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
354		ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
355		ticnt &= S3C64XX_RTCCON_TICEN;
356	} else {
357		ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
358		ticnt &= S3C2410_TICNT_ENABLE;
359	}
360
361	seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt  ? "yes" : "no");
362	clk_disable(rtc_clk);
363	return 0;
364}
365
366static const struct rtc_class_ops s3c_rtcops = {
367	.read_time	= s3c_rtc_gettime,
368	.set_time	= s3c_rtc_settime,
369	.read_alarm	= s3c_rtc_getalarm,
370	.set_alarm	= s3c_rtc_setalarm,
371	.proc		= s3c_rtc_proc,
372	.alarm_irq_enable = s3c_rtc_setaie,
373};
374
375static void s3c_rtc_enable(struct platform_device *pdev, int en)
376{
377	void __iomem *base = s3c_rtc_base;
378	unsigned int tmp;
379
380	if (s3c_rtc_base == NULL)
381		return;
382
383	clk_enable(rtc_clk);
384	if (!en) {
385		tmp = readw(base + S3C2410_RTCCON);
386		if (s3c_rtc_cpu_type == TYPE_S3C64XX)
387			tmp &= ~S3C64XX_RTCCON_TICEN;
388		tmp &= ~S3C2410_RTCCON_RTCEN;
389		writew(tmp, base + S3C2410_RTCCON);
390
391		if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
392			tmp = readb(base + S3C2410_TICNT);
393			tmp &= ~S3C2410_TICNT_ENABLE;
394			writeb(tmp, base + S3C2410_TICNT);
395		}
396	} else {
397		/* re-enable the device, and check it is ok */
398
399		if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
400			dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
401
402			tmp = readw(base + S3C2410_RTCCON);
403			writew(tmp | S3C2410_RTCCON_RTCEN,
404				base + S3C2410_RTCCON);
405		}
406
407		if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
408			dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
409
410			tmp = readw(base + S3C2410_RTCCON);
411			writew(tmp & ~S3C2410_RTCCON_CNTSEL,
412				base + S3C2410_RTCCON);
413		}
414
415		if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
416			dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
417
418			tmp = readw(base + S3C2410_RTCCON);
419			writew(tmp & ~S3C2410_RTCCON_CLKRST,
420				base + S3C2410_RTCCON);
421		}
422	}
423	clk_disable(rtc_clk);
424}
425
426static int __devexit s3c_rtc_remove(struct platform_device *dev)
427{
428	struct rtc_device *rtc = platform_get_drvdata(dev);
429
430	free_irq(s3c_rtc_alarmno, rtc);
431	free_irq(s3c_rtc_tickno, rtc);
432
433	platform_set_drvdata(dev, NULL);
434	rtc_device_unregister(rtc);
435
436	s3c_rtc_setaie(&dev->dev, 0);
437
438	clk_put(rtc_clk);
439	rtc_clk = NULL;
 
440
441	iounmap(s3c_rtc_base);
442	release_resource(s3c_rtc_mem);
443	kfree(s3c_rtc_mem);
444
445	return 0;
446}
447
448static const struct of_device_id s3c_rtc_dt_match[];
449
450static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
451{
452#ifdef CONFIG_OF
453	struct s3c_rtc_drv_data *data;
454	if (pdev->dev.of_node) {
455		const struct of_device_id *match;
456		match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
457		data = (struct s3c_rtc_drv_data *) match->data;
458		return data->cpu_type;
459	}
460#endif
461	return platform_get_device_id(pdev)->driver_data;
462}
463
464static int __devinit s3c_rtc_probe(struct platform_device *pdev)
465{
466	struct rtc_device *rtc;
467	struct rtc_time rtc_tm;
468	struct resource *res;
469	int ret;
470	int tmp;
471
472	pr_debug("%s: probe=%p\n", __func__, pdev);
473
474	/* find the IRQs */
475
476	s3c_rtc_tickno = platform_get_irq(pdev, 1);
477	if (s3c_rtc_tickno < 0) {
478		dev_err(&pdev->dev, "no irq for rtc tick\n");
479		return -ENOENT;
480	}
481
482	s3c_rtc_alarmno = platform_get_irq(pdev, 0);
483	if (s3c_rtc_alarmno < 0) {
484		dev_err(&pdev->dev, "no irq for alarm\n");
485		return -ENOENT;
486	}
487
488	pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
489		 s3c_rtc_tickno, s3c_rtc_alarmno);
 
 
490
491	/* get the memory region */
 
 
 
492
493	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
494	if (res == NULL) {
495		dev_err(&pdev->dev, "failed to get memory region resource\n");
496		return -ENOENT;
 
 
 
 
 
497	}
 
498
499	s3c_rtc_mem = request_mem_region(res->start, resource_size(res),
500					 pdev->name);
501
502	if (s3c_rtc_mem == NULL) {
503		dev_err(&pdev->dev, "failed to reserve memory region\n");
504		ret = -ENOENT;
505		goto err_nores;
506	}
507
508	s3c_rtc_base = ioremap(res->start, resource_size(res));
509	if (s3c_rtc_base == NULL) {
510		dev_err(&pdev->dev, "failed ioremap()\n");
511		ret = -EINVAL;
512		goto err_nomap;
513	}
514
515	rtc_clk = clk_get(&pdev->dev, "rtc");
516	if (IS_ERR(rtc_clk)) {
517		dev_err(&pdev->dev, "failed to find rtc clock source\n");
518		ret = PTR_ERR(rtc_clk);
519		rtc_clk = NULL;
520		goto err_clk;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
521	}
522
523	clk_enable(rtc_clk);
 
 
524
525	/* check to see if everything is setup correctly */
 
 
526
527	s3c_rtc_enable(pdev, 1);
528
529	pr_debug("s3c2410_rtc: RTCCON=%02x\n",
530		 readw(s3c_rtc_base + S3C2410_RTCCON));
531
532	device_init_wakeup(&pdev->dev, 1);
533
534	/* register RTC and exit */
535
536	rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
537				  THIS_MODULE);
538
539	if (IS_ERR(rtc)) {
540		dev_err(&pdev->dev, "cannot attach rtc\n");
541		ret = PTR_ERR(rtc);
542		goto err_nortc;
543	}
544
545	s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev);
546
547	/* Check RTC Time */
548
549	s3c_rtc_gettime(NULL, &rtc_tm);
550
551	if (rtc_valid_tm(&rtc_tm)) {
552		rtc_tm.tm_year	= 100;
553		rtc_tm.tm_mon	= 0;
554		rtc_tm.tm_mday	= 1;
555		rtc_tm.tm_hour	= 0;
556		rtc_tm.tm_min	= 0;
557		rtc_tm.tm_sec	= 0;
558
559		s3c_rtc_settime(NULL, &rtc_tm);
560
561		dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
562	}
563
564	if (s3c_rtc_cpu_type != TYPE_S3C2410)
565		rtc->max_user_freq = 32768;
566	else
567		rtc->max_user_freq = 128;
568
569	if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
570		tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
571		tmp |= S3C2443_RTCCON_TICSEL;
572		writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
573	}
574
575	platform_set_drvdata(pdev, rtc);
576
577	s3c_rtc_setfreq(&pdev->dev, 1);
578
579	ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
580			  0,  "s3c2410-rtc alarm", rtc);
581	if (ret) {
582		dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
583		goto err_alarm_irq;
584	}
585
586	ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
587			  0,  "s3c2410-rtc tick", rtc);
588	if (ret) {
589		dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
590		free_irq(s3c_rtc_alarmno, rtc);
591		goto err_tick_irq;
592	}
593
594	clk_disable(rtc_clk);
595
596	return 0;
597
598 err_tick_irq:
599	free_irq(s3c_rtc_alarmno, rtc);
 
 
 
 
 
 
600
601 err_alarm_irq:
602	platform_set_drvdata(pdev, NULL);
603	rtc_device_unregister(rtc);
604
605 err_nortc:
606	s3c_rtc_enable(pdev, 0);
607	clk_disable(rtc_clk);
608	clk_put(rtc_clk);
609
610 err_clk:
611	iounmap(s3c_rtc_base);
612
613 err_nomap:
614	release_resource(s3c_rtc_mem);
615
616 err_nores:
617	return ret;
618}
619
620#ifdef CONFIG_PM
621
622/* RTC Power management control */
623
624static int ticnt_save, ticnt_en_save;
625
626static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
627{
628	clk_enable(rtc_clk);
629	/* save TICNT for anyone using periodic interrupts */
630	ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
631	if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
632		ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
633		ticnt_en_save &= S3C64XX_RTCCON_TICEN;
634	}
635	s3c_rtc_enable(pdev, 0);
636
637	if (device_may_wakeup(&pdev->dev) && !wake_en) {
638		if (enable_irq_wake(s3c_rtc_alarmno) == 0)
639			wake_en = true;
 
 
 
 
 
 
 
640		else
641			dev_err(&pdev->dev, "enable_irq_wake failed\n");
642	}
643	clk_disable(rtc_clk);
644
645	return 0;
646}
647
648static int s3c_rtc_resume(struct platform_device *pdev)
649{
650	unsigned int tmp;
651
652	clk_enable(rtc_clk);
653	s3c_rtc_enable(pdev, 1);
654	writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
655	if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
656		tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
657		writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
658	}
659
660	if (device_may_wakeup(&pdev->dev) && wake_en) {
661		disable_irq_wake(s3c_rtc_alarmno);
662		wake_en = false;
 
 
663	}
664	clk_disable(rtc_clk);
665
666	return 0;
667}
668#else
669#define s3c_rtc_suspend NULL
670#define s3c_rtc_resume  NULL
671#endif
 
672
673#ifdef CONFIG_OF
674static struct s3c_rtc_drv_data s3c_rtc_drv_data_array[] = {
675	[TYPE_S3C2410] = { TYPE_S3C2410 },
676	[TYPE_S3C2416] = { TYPE_S3C2416 },
677	[TYPE_S3C2443] = { TYPE_S3C2443 },
678	[TYPE_S3C64XX] = { TYPE_S3C64XX },
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
679};
680
681static const struct of_device_id s3c_rtc_dt_match[] = {
682	{
683		.compatible = "samsung,s3c2410-rtc",
684		.data = &s3c_rtc_drv_data_array[TYPE_S3C2410],
685	}, {
686		.compatible = "samsung,s3c2416-rtc",
687		.data = &s3c_rtc_drv_data_array[TYPE_S3C2416],
688	}, {
689		.compatible = "samsung,s3c2443-rtc",
690		.data = &s3c_rtc_drv_data_array[TYPE_S3C2443],
691	}, {
692		.compatible = "samsung,s3c6410-rtc",
693		.data = &s3c_rtc_drv_data_array[TYPE_S3C64XX],
694	},
695	{},
696};
697MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
698#else
699#define s3c_rtc_dt_match NULL
700#endif
701
702static struct platform_device_id s3c_rtc_driver_ids[] = {
703	{
704		.name		= "s3c2410-rtc",
705		.driver_data	= TYPE_S3C2410,
706	}, {
707		.name		= "s3c2416-rtc",
708		.driver_data	= TYPE_S3C2416,
709	}, {
710		.name		= "s3c2443-rtc",
711		.driver_data	= TYPE_S3C2443,
712	}, {
713		.name		= "s3c64xx-rtc",
714		.driver_data	= TYPE_S3C64XX,
715	},
716	{ }
717};
718
719MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
720
721static struct platform_driver s3c_rtc_driver = {
722	.probe		= s3c_rtc_probe,
723	.remove		= __devexit_p(s3c_rtc_remove),
724	.suspend	= s3c_rtc_suspend,
725	.resume		= s3c_rtc_resume,
726	.id_table	= s3c_rtc_driver_ids,
727	.driver		= {
728		.name	= "s3c-rtc",
729		.owner	= THIS_MODULE,
730		.of_match_table	= s3c_rtc_dt_match,
731	},
732};
733
734module_platform_driver(s3c_rtc_driver);
735
736MODULE_DESCRIPTION("Samsung S3C RTC Driver");
737MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
738MODULE_LICENSE("GPL");
739MODULE_ALIAS("platform:s3c2410-rtc");
v6.8
  1// SPDX-License-Identifier: GPL-2.0-only
  2/* drivers/rtc/rtc-s3c.c
  3 *
  4 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  5 *		http://www.samsung.com/
  6 *
  7 * Copyright (c) 2004,2006 Simtec Electronics
  8 *	Ben Dooks, <ben@simtec.co.uk>
  9 *	http://armlinux.simtec.co.uk/
 10 *
 
 
 
 
 11 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
 12*/
 13
 14#include <linux/module.h>
 15#include <linux/fs.h>
 16#include <linux/string.h>
 17#include <linux/init.h>
 18#include <linux/platform_device.h>
 19#include <linux/interrupt.h>
 20#include <linux/rtc.h>
 21#include <linux/bcd.h>
 22#include <linux/clk.h>
 23#include <linux/log2.h>
 24#include <linux/slab.h>
 25#include <linux/of.h>
 26#include <linux/uaccess.h>
 27#include <linux/io.h>
 28
 
 
 
 29#include <asm/irq.h>
 30#include "rtc-s3c.h"
 31
 32struct s3c_rtc {
 33	struct device *dev;
 34	struct rtc_device *rtc;
 35
 36	void __iomem *base;
 37	struct clk *rtc_clk;
 38	struct clk *rtc_src_clk;
 39	bool alarm_enabled;
 40
 41	const struct s3c_rtc_data *data;
 42
 43	int irq_alarm;
 44	spinlock_t alarm_lock;
 45
 46	bool wake_en;
 47};
 48
 49struct s3c_rtc_data {
 50	bool needs_src_clk;
 51
 52	void (*irq_handler) (struct s3c_rtc *info, int mask);
 53	void (*enable) (struct s3c_rtc *info);
 54	void (*disable) (struct s3c_rtc *info);
 55};
 56
 57static int s3c_rtc_enable_clk(struct s3c_rtc *info)
 58{
 59	int ret;
 60
 61	ret = clk_enable(info->rtc_clk);
 62	if (ret)
 63		return ret;
 64
 65	if (info->data->needs_src_clk) {
 66		ret = clk_enable(info->rtc_src_clk);
 67		if (ret) {
 68			clk_disable(info->rtc_clk);
 69			return ret;
 
 
 
 
 
 
 
 
 
 
 
 
 70		}
 71	}
 72	return 0;
 73}
 74
 75static void s3c_rtc_disable_clk(struct s3c_rtc *info)
 
 
 76{
 77	if (info->data->needs_src_clk)
 78		clk_disable(info->rtc_src_clk);
 79	clk_disable(info->rtc_clk);
 
 
 
 
 
 
 
 
 
 
 80}
 81
 82/* IRQ Handler */
 83static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
 84{
 85	struct s3c_rtc *info = (struct s3c_rtc *)id;
 
 
 
 86
 87	if (info->data->irq_handler)
 88		info->data->irq_handler(info, S3C2410_INTP_ALM);
 89
 
 90	return IRQ_HANDLED;
 91}
 92
 93/* Update control registers */
 94static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
 95{
 96	struct s3c_rtc *info = dev_get_drvdata(dev);
 97	unsigned long flags;
 98	unsigned int tmp;
 99	int ret;
100
101	dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
102
103	ret = s3c_rtc_enable_clk(info);
104	if (ret)
105		return ret;
106
107	tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
108
109	if (enabled)
110		tmp |= S3C2410_RTCALM_ALMEN;
111
112	writeb(tmp, info->base + S3C2410_RTCALM);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
113
114	spin_lock_irqsave(&info->alarm_lock, flags);
115
116	if (info->alarm_enabled && !enabled)
117		s3c_rtc_disable_clk(info);
118	else if (!info->alarm_enabled && enabled)
119		ret = s3c_rtc_enable_clk(info);
120
121	info->alarm_enabled = enabled;
122	spin_unlock_irqrestore(&info->alarm_lock, flags);
 
 
 
123
124	s3c_rtc_disable_clk(info);
 
 
125
126	return ret;
127}
128
129/* Read time from RTC and convert it from BCD */
130static int s3c_rtc_read_time(struct s3c_rtc *info, struct rtc_time *tm)
 
131{
132	unsigned int have_retried = 0;
133	int ret;
134
135	ret = s3c_rtc_enable_clk(info);
136	if (ret)
137		return ret;
138
139retry_get_time:
140	tm->tm_min  = readb(info->base + S3C2410_RTCMIN);
141	tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
142	tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
143	tm->tm_mon  = readb(info->base + S3C2410_RTCMON);
144	tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
145	tm->tm_sec  = readb(info->base + S3C2410_RTCSEC);
146
147	/*
148	 * The only way to work out whether the system was mid-update
149	 * when we read it is to check the second counter, and if it
150	 * is zero, then we re-try the entire read
151	 */
152	if (tm->tm_sec == 0 && !have_retried) {
 
153		have_retried = 1;
154		goto retry_get_time;
155	}
156
157	s3c_rtc_disable_clk(info);
 
 
 
 
 
 
 
 
 
 
 
158
159	tm->tm_sec  = bcd2bin(tm->tm_sec);
160	tm->tm_min  = bcd2bin(tm->tm_min);
161	tm->tm_hour = bcd2bin(tm->tm_hour);
162	tm->tm_mday = bcd2bin(tm->tm_mday);
163	tm->tm_mon  = bcd2bin(tm->tm_mon);
164	tm->tm_year = bcd2bin(tm->tm_year);
165
166	return 0;
 
167}
168
169/* Convert time to BCD and write it to RTC */
170static int s3c_rtc_write_time(struct s3c_rtc *info, const struct rtc_time *tm)
171{
172	int ret;
 
173
174	ret = s3c_rtc_enable_clk(info);
175	if (ret)
176		return ret;
177
178	writeb(bin2bcd(tm->tm_sec),  info->base + S3C2410_RTCSEC);
179	writeb(bin2bcd(tm->tm_min),  info->base + S3C2410_RTCMIN);
180	writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
181	writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
182	writeb(bin2bcd(tm->tm_mon),  info->base + S3C2410_RTCMON);
183	writeb(bin2bcd(tm->tm_year), info->base + S3C2410_RTCYEAR);
184
185	s3c_rtc_disable_clk(info);
186
187	return 0;
188}
189
190static int s3c_rtc_gettime(struct device *dev, struct rtc_time *tm)
191{
192	struct s3c_rtc *info = dev_get_drvdata(dev);
193	int ret;
194
195	ret = s3c_rtc_read_time(info, tm);
196	if (ret)
197		return ret;
198
199	/* Convert internal representation to actual date/time */
200	tm->tm_year += 100;
201	tm->tm_mon -= 1;
 
202
203	dev_dbg(dev, "read time %ptR\n", tm);
204	return 0;
205}
206
207static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
208{
209	struct s3c_rtc *info = dev_get_drvdata(dev);
210	struct rtc_time rtc_tm = *tm;
211
212	dev_dbg(dev, "set time %ptR\n", tm);
213
214	/*
215	 * Convert actual date/time to internal representation.
216	 * We get around Y2K by simply not supporting it.
217	 */
218	rtc_tm.tm_year -= 100;
219	rtc_tm.tm_mon += 1;
220
221	return s3c_rtc_write_time(info, &rtc_tm);
222}
223
224static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
225{
226	struct s3c_rtc *info = dev_get_drvdata(dev);
227	struct rtc_time *alm_tm = &alrm->time;
 
228	unsigned int alm_en;
229	int ret;
230
231	ret = s3c_rtc_enable_clk(info);
232	if (ret)
233		return ret;
234
235	alm_tm->tm_sec  = readb(info->base + S3C2410_ALMSEC);
236	alm_tm->tm_min  = readb(info->base + S3C2410_ALMMIN);
237	alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
238	alm_tm->tm_mon  = readb(info->base + S3C2410_ALMMON);
239	alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
240	alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
241
242	alm_en = readb(info->base + S3C2410_RTCALM);
243
244	s3c_rtc_disable_clk(info);
245
246	alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
 
 
 
247
248	dev_dbg(dev, "read alarm %d, %ptR\n", alm_en, alm_tm);
249
250	/* decode the alarm enable field */
 
251	if (alm_en & S3C2410_RTCALM_SECEN)
252		alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
 
 
253
254	if (alm_en & S3C2410_RTCALM_MINEN)
255		alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
 
 
256
257	if (alm_en & S3C2410_RTCALM_HOUREN)
258		alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
 
 
259
260	if (alm_en & S3C2410_RTCALM_DAYEN)
261		alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
 
 
262
263	if (alm_en & S3C2410_RTCALM_MONEN) {
264		alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
265		alm_tm->tm_mon -= 1;
 
 
266	}
267
268	if (alm_en & S3C2410_RTCALM_YEAREN)
269		alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
 
 
270
 
271	return 0;
272}
273
274static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
275{
276	struct s3c_rtc *info = dev_get_drvdata(dev);
277	struct rtc_time *tm = &alrm->time;
 
278	unsigned int alrm_en;
279	int ret;
280
281	dev_dbg(dev, "s3c_rtc_setalarm: %d, %ptR\n", alrm->enabled, tm);
282
283	ret = s3c_rtc_enable_clk(info);
284	if (ret)
285		return ret;
 
 
286
287	alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
288	writeb(0x00, info->base + S3C2410_RTCALM);
289
290	if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
291		alrm_en |= S3C2410_RTCALM_SECEN;
292		writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
293	}
294
295	if (tm->tm_min < 60 && tm->tm_min >= 0) {
296		alrm_en |= S3C2410_RTCALM_MINEN;
297		writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
298	}
299
300	if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
301		alrm_en |= S3C2410_RTCALM_HOUREN;
302		writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
303	}
304
305	if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
306		alrm_en |= S3C2410_RTCALM_MONEN;
307		writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
308	}
309
310	if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
311		alrm_en |= S3C2410_RTCALM_DAYEN;
312		writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
313	}
314
315	dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
316
317	writeb(alrm_en, info->base + S3C2410_RTCALM);
 
 
318
319	s3c_rtc_setaie(dev, alrm->enabled);
 
 
320
321	s3c_rtc_disable_clk(info);
 
 
 
 
 
 
 
322
 
 
323	return 0;
324}
325
326static const struct rtc_class_ops s3c_rtcops = {
327	.read_time	= s3c_rtc_gettime,
328	.set_time	= s3c_rtc_settime,
329	.read_alarm	= s3c_rtc_getalarm,
330	.set_alarm	= s3c_rtc_setalarm,
 
331	.alarm_irq_enable = s3c_rtc_setaie,
332};
333
334static void s3c24xx_rtc_enable(struct s3c_rtc *info)
335{
336	unsigned int con, tmp;
 
 
 
 
337
338	con = readw(info->base + S3C2410_RTCCON);
339	/* re-enable the device, and check it is ok */
340	if ((con & S3C2410_RTCCON_RTCEN) == 0) {
341		dev_info(info->dev, "rtc disabled, re-enabling\n");
 
 
 
 
 
 
 
 
 
 
 
 
 
 
342
343		tmp = readw(info->base + S3C2410_RTCCON);
344		writew(tmp | S3C2410_RTCCON_RTCEN, info->base + S3C2410_RTCCON);
345	}
 
346
347	if (con & S3C2410_RTCCON_CNTSEL) {
348		dev_info(info->dev, "removing RTCCON_CNTSEL\n");
349
350		tmp = readw(info->base + S3C2410_RTCCON);
351		writew(tmp & ~S3C2410_RTCCON_CNTSEL,
352		       info->base + S3C2410_RTCCON);
353	}
354
355	if (con & S3C2410_RTCCON_CLKRST) {
356		dev_info(info->dev, "removing RTCCON_CLKRST\n");
357
358		tmp = readw(info->base + S3C2410_RTCCON);
359		writew(tmp & ~S3C2410_RTCCON_CLKRST,
360		       info->base + S3C2410_RTCCON);
 
361	}
 
362}
363
364static void s3c24xx_rtc_disable(struct s3c_rtc *info)
365{
366	unsigned int con;
 
 
 
 
 
 
 
 
367
368	con = readw(info->base + S3C2410_RTCCON);
369	con &= ~S3C2410_RTCCON_RTCEN;
370	writew(con, info->base + S3C2410_RTCCON);
371
372	con = readb(info->base + S3C2410_TICNT);
373	con &= ~S3C2410_TICNT_ENABLE;
374	writeb(con, info->base + S3C2410_TICNT);
 
 
375}
376
377static void s3c6410_rtc_disable(struct s3c_rtc *info)
 
 
378{
379	unsigned int con;
380
381	con = readw(info->base + S3C2410_RTCCON);
382	con &= ~S3C64XX_RTCCON_TICEN;
383	con &= ~S3C2410_RTCCON_RTCEN;
384	writew(con, info->base + S3C2410_RTCCON);
 
 
 
 
385}
386
387static void s3c_rtc_remove(struct platform_device *pdev)
388{
389	struct s3c_rtc *info = platform_get_drvdata(pdev);
 
 
 
 
 
 
 
 
390
391	s3c_rtc_setaie(info->dev, 0);
 
 
 
 
 
 
 
 
 
 
392
393	if (info->data->needs_src_clk)
394		clk_unprepare(info->rtc_src_clk);
395	clk_unprepare(info->rtc_clk);
396}
397
398static int s3c_rtc_probe(struct platform_device *pdev)
399{
400	struct s3c_rtc *info = NULL;
401	int ret;
402
403	info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
404	if (!info)
405		return -ENOMEM;
406
407	info->dev = &pdev->dev;
408	info->data = of_device_get_match_data(&pdev->dev);
409	if (!info->data) {
410		dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
411		return -EINVAL;
412	}
413	spin_lock_init(&info->alarm_lock);
414
415	platform_set_drvdata(pdev, info);
 
416
417	info->irq_alarm = platform_get_irq(pdev, 0);
418	if (info->irq_alarm < 0)
419		return info->irq_alarm;
 
 
420
421	dev_dbg(&pdev->dev, "s3c2410_rtc: alarm irq %d\n", info->irq_alarm);
 
 
 
 
 
422
423	/* get the memory region */
424	info->base = devm_platform_ioremap_resource(pdev, 0);
425	if (IS_ERR(info->base))
426		return PTR_ERR(info->base);
427
428	info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
429	if (IS_ERR(info->rtc_clk))
430		return dev_err_probe(&pdev->dev, PTR_ERR(info->rtc_clk),
431				     "failed to find rtc clock\n");
432	ret = clk_prepare_enable(info->rtc_clk);
433	if (ret)
434		return ret;
435
436	if (info->data->needs_src_clk) {
437		info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
438		if (IS_ERR(info->rtc_src_clk)) {
439			ret = dev_err_probe(&pdev->dev, PTR_ERR(info->rtc_src_clk),
440					    "failed to find rtc source clock\n");
441			goto err_src_clk;
442		}
443		ret = clk_prepare_enable(info->rtc_src_clk);
444		if (ret)
445			goto err_src_clk;
446	}
447
448	/* disable RTC enable bits potentially set by the bootloader */
449	if (info->data->disable)
450		info->data->disable(info);
451
452	/* check to see if everything is setup correctly */
453	if (info->data->enable)
454		info->data->enable(info);
455
456	dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
457		readw(info->base + S3C2410_RTCCON));
 
 
458
459	device_init_wakeup(&pdev->dev, 1);
460
461	info->rtc = devm_rtc_allocate_device(&pdev->dev);
462	if (IS_ERR(info->rtc)) {
463		ret = PTR_ERR(info->rtc);
 
 
 
 
 
464		goto err_nortc;
465	}
466
467	info->rtc->ops = &s3c_rtcops;
468	info->rtc->range_min = RTC_TIMESTAMP_BEGIN_2000;
469	info->rtc->range_max = RTC_TIMESTAMP_END_2099;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
470
471	ret = devm_rtc_register_device(info->rtc);
472	if (ret)
473		goto err_nortc;
 
 
 
 
 
474
475	ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
476			       0, "s3c2410-rtc alarm", info);
477	if (ret) {
478		dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
479		goto err_nortc;
 
480	}
481
482	s3c_rtc_disable_clk(info);
483
484	return 0;
485
486err_nortc:
487	if (info->data->disable)
488		info->data->disable(info);
489
490	if (info->data->needs_src_clk)
491		clk_disable_unprepare(info->rtc_src_clk);
492err_src_clk:
493	clk_disable_unprepare(info->rtc_clk);
494
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
495	return ret;
496}
497
498#ifdef CONFIG_PM_SLEEP
 
 
499
500static int s3c_rtc_suspend(struct device *dev)
 
 
501{
502	struct s3c_rtc *info = dev_get_drvdata(dev);
503	int ret;
 
 
 
 
 
 
504
505	ret = s3c_rtc_enable_clk(info);
506	if (ret)
507		return ret;
508
509	if (info->data->disable)
510		info->data->disable(info);
511
512	if (device_may_wakeup(dev) && !info->wake_en) {
513		if (enable_irq_wake(info->irq_alarm) == 0)
514			info->wake_en = true;
515		else
516			dev_err(dev, "enable_irq_wake failed\n");
517	}
 
518
519	return 0;
520}
521
522static int s3c_rtc_resume(struct device *dev)
523{
524	struct s3c_rtc *info = dev_get_drvdata(dev);
525
526	if (info->data->enable)
527		info->data->enable(info);
 
 
 
 
 
528
529	s3c_rtc_disable_clk(info);
530
531	if (device_may_wakeup(dev) && info->wake_en) {
532		disable_irq_wake(info->irq_alarm);
533		info->wake_en = false;
534	}
 
535
536	return 0;
537}
 
 
 
538#endif
539static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
540
541static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
542{
543	rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
544}
545
546static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
547{
548	rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
549	writeb(mask, info->base + S3C2410_INTP);
550}
551
552static struct s3c_rtc_data const s3c2410_rtc_data = {
553	.irq_handler		= s3c24xx_rtc_irq,
554	.enable			= s3c24xx_rtc_enable,
555	.disable		= s3c24xx_rtc_disable,
556};
557
558static struct s3c_rtc_data const s3c2416_rtc_data = {
559	.irq_handler		= s3c24xx_rtc_irq,
560	.enable			= s3c24xx_rtc_enable,
561	.disable		= s3c24xx_rtc_disable,
562};
563
564static struct s3c_rtc_data const s3c2443_rtc_data = {
565	.irq_handler		= s3c24xx_rtc_irq,
566	.enable			= s3c24xx_rtc_enable,
567	.disable		= s3c24xx_rtc_disable,
568};
569
570static struct s3c_rtc_data const s3c6410_rtc_data = {
571	.needs_src_clk		= true,
572	.irq_handler		= s3c6410_rtc_irq,
573	.enable			= s3c24xx_rtc_enable,
574	.disable		= s3c6410_rtc_disable,
575};
576
577static const __maybe_unused struct of_device_id s3c_rtc_dt_match[] = {
578	{
579		.compatible = "samsung,s3c2410-rtc",
580		.data = &s3c2410_rtc_data,
581	}, {
582		.compatible = "samsung,s3c2416-rtc",
583		.data = &s3c2416_rtc_data,
584	}, {
585		.compatible = "samsung,s3c2443-rtc",
586		.data = &s3c2443_rtc_data,
587	}, {
588		.compatible = "samsung,s3c6410-rtc",
589		.data = &s3c6410_rtc_data,
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
590	}, {
591		.compatible = "samsung,exynos3250-rtc",
592		.data = &s3c6410_rtc_data,
 
 
 
593	},
594	{ /* sentinel */ },
595};
596MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
 
597
598static struct platform_driver s3c_rtc_driver = {
599	.probe		= s3c_rtc_probe,
600	.remove_new	= s3c_rtc_remove,
 
 
 
601	.driver		= {
602		.name	= "s3c-rtc",
603		.pm	= &s3c_rtc_pm_ops,
604		.of_match_table	= of_match_ptr(s3c_rtc_dt_match),
605	},
606};
 
607module_platform_driver(s3c_rtc_driver);
608
609MODULE_DESCRIPTION("Samsung S3C RTC Driver");
610MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
611MODULE_LICENSE("GPL");
612MODULE_ALIAS("platform:s3c2410-rtc");