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1/* drivers/rtc/rtc-s3c.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
26#include <linux/log2.h>
27#include <linux/slab.h>
28#include <linux/of.h>
29
30#include <mach/hardware.h>
31#include <asm/uaccess.h>
32#include <asm/io.h>
33#include <asm/irq.h>
34#include <plat/regs-rtc.h>
35
36enum s3c_cpu_type {
37 TYPE_S3C2410,
38 TYPE_S3C2416,
39 TYPE_S3C2443,
40 TYPE_S3C64XX,
41};
42
43struct s3c_rtc_drv_data {
44 int cpu_type;
45};
46
47/* I have yet to find an S3C implementation with more than one
48 * of these rtc blocks in */
49
50static struct resource *s3c_rtc_mem;
51
52static struct clk *rtc_clk;
53static void __iomem *s3c_rtc_base;
54static int s3c_rtc_alarmno = NO_IRQ;
55static int s3c_rtc_tickno = NO_IRQ;
56static bool wake_en;
57static enum s3c_cpu_type s3c_rtc_cpu_type;
58
59static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
60
61static void s3c_rtc_alarm_clk_enable(bool enable)
62{
63 static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock);
64 static bool alarm_clk_enabled;
65 unsigned long irq_flags;
66
67 spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags);
68 if (enable) {
69 if (!alarm_clk_enabled) {
70 clk_enable(rtc_clk);
71 alarm_clk_enabled = true;
72 }
73 } else {
74 if (alarm_clk_enabled) {
75 clk_disable(rtc_clk);
76 alarm_clk_enabled = false;
77 }
78 }
79 spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags);
80}
81
82/* IRQ Handlers */
83
84static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
85{
86 struct rtc_device *rdev = id;
87
88 clk_enable(rtc_clk);
89 rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
90
91 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
92 writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
93
94 clk_disable(rtc_clk);
95
96 s3c_rtc_alarm_clk_enable(false);
97
98 return IRQ_HANDLED;
99}
100
101static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
102{
103 struct rtc_device *rdev = id;
104
105 clk_enable(rtc_clk);
106 rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
107
108 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
109 writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
110
111 clk_disable(rtc_clk);
112 return IRQ_HANDLED;
113}
114
115/* Update control registers */
116static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
117{
118 unsigned int tmp;
119
120 pr_debug("%s: aie=%d\n", __func__, enabled);
121
122 clk_enable(rtc_clk);
123 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
124
125 if (enabled)
126 tmp |= S3C2410_RTCALM_ALMEN;
127
128 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
129 clk_disable(rtc_clk);
130
131 s3c_rtc_alarm_clk_enable(enabled);
132
133 return 0;
134}
135
136static int s3c_rtc_setfreq(struct device *dev, int freq)
137{
138 struct platform_device *pdev = to_platform_device(dev);
139 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
140 unsigned int tmp = 0;
141 int val;
142
143 if (!is_power_of_2(freq))
144 return -EINVAL;
145
146 clk_enable(rtc_clk);
147 spin_lock_irq(&s3c_rtc_pie_lock);
148
149 if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
150 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
151 tmp &= S3C2410_TICNT_ENABLE;
152 }
153
154 val = (rtc_dev->max_user_freq / freq) - 1;
155
156 if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
157 tmp |= S3C2443_TICNT_PART(val);
158 writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
159
160 if (s3c_rtc_cpu_type == TYPE_S3C2416)
161 writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
162 } else {
163 tmp |= val;
164 }
165
166 writel(tmp, s3c_rtc_base + S3C2410_TICNT);
167 spin_unlock_irq(&s3c_rtc_pie_lock);
168 clk_disable(rtc_clk);
169
170 return 0;
171}
172
173/* Time read/write */
174
175static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
176{
177 unsigned int have_retried = 0;
178 void __iomem *base = s3c_rtc_base;
179
180 clk_enable(rtc_clk);
181 retry_get_time:
182 rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
183 rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
184 rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
185 rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
186 rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
187 rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
188
189 /* the only way to work out wether the system was mid-update
190 * when we read it is to check the second counter, and if it
191 * is zero, then we re-try the entire read
192 */
193
194 if (rtc_tm->tm_sec == 0 && !have_retried) {
195 have_retried = 1;
196 goto retry_get_time;
197 }
198
199 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
200 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
201 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
202 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
203 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
204 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
205
206 rtc_tm->tm_year += 100;
207
208 pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
209 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
210 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
211
212 rtc_tm->tm_mon -= 1;
213
214 clk_disable(rtc_clk);
215 return rtc_valid_tm(rtc_tm);
216}
217
218static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
219{
220 void __iomem *base = s3c_rtc_base;
221 int year = tm->tm_year - 100;
222
223 pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
224 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
225 tm->tm_hour, tm->tm_min, tm->tm_sec);
226
227 /* we get around y2k by simply not supporting it */
228
229 if (year < 0 || year >= 100) {
230 dev_err(dev, "rtc only supports 100 years\n");
231 return -EINVAL;
232 }
233
234 clk_enable(rtc_clk);
235 writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
236 writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
237 writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
238 writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
239 writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
240 writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
241 clk_disable(rtc_clk);
242
243 return 0;
244}
245
246static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
247{
248 struct rtc_time *alm_tm = &alrm->time;
249 void __iomem *base = s3c_rtc_base;
250 unsigned int alm_en;
251
252 clk_enable(rtc_clk);
253 alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
254 alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
255 alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
256 alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
257 alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
258 alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
259
260 alm_en = readb(base + S3C2410_RTCALM);
261
262 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
263
264 pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
265 alm_en,
266 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
267 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
268
269
270 /* decode the alarm enable field */
271
272 if (alm_en & S3C2410_RTCALM_SECEN)
273 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
274 else
275 alm_tm->tm_sec = -1;
276
277 if (alm_en & S3C2410_RTCALM_MINEN)
278 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
279 else
280 alm_tm->tm_min = -1;
281
282 if (alm_en & S3C2410_RTCALM_HOUREN)
283 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
284 else
285 alm_tm->tm_hour = -1;
286
287 if (alm_en & S3C2410_RTCALM_DAYEN)
288 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
289 else
290 alm_tm->tm_mday = -1;
291
292 if (alm_en & S3C2410_RTCALM_MONEN) {
293 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
294 alm_tm->tm_mon -= 1;
295 } else {
296 alm_tm->tm_mon = -1;
297 }
298
299 if (alm_en & S3C2410_RTCALM_YEAREN)
300 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
301 else
302 alm_tm->tm_year = -1;
303
304 clk_disable(rtc_clk);
305 return 0;
306}
307
308static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
309{
310 struct rtc_time *tm = &alrm->time;
311 void __iomem *base = s3c_rtc_base;
312 unsigned int alrm_en;
313
314 clk_enable(rtc_clk);
315 pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
316 alrm->enabled,
317 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
318 tm->tm_hour, tm->tm_min, tm->tm_sec);
319
320 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
321 writeb(0x00, base + S3C2410_RTCALM);
322
323 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
324 alrm_en |= S3C2410_RTCALM_SECEN;
325 writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
326 }
327
328 if (tm->tm_min < 60 && tm->tm_min >= 0) {
329 alrm_en |= S3C2410_RTCALM_MINEN;
330 writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
331 }
332
333 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
334 alrm_en |= S3C2410_RTCALM_HOUREN;
335 writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
336 }
337
338 pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
339
340 writeb(alrm_en, base + S3C2410_RTCALM);
341
342 s3c_rtc_setaie(dev, alrm->enabled);
343
344 clk_disable(rtc_clk);
345 return 0;
346}
347
348static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
349{
350 unsigned int ticnt;
351
352 clk_enable(rtc_clk);
353 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
354 ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
355 ticnt &= S3C64XX_RTCCON_TICEN;
356 } else {
357 ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
358 ticnt &= S3C2410_TICNT_ENABLE;
359 }
360
361 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
362 clk_disable(rtc_clk);
363 return 0;
364}
365
366static const struct rtc_class_ops s3c_rtcops = {
367 .read_time = s3c_rtc_gettime,
368 .set_time = s3c_rtc_settime,
369 .read_alarm = s3c_rtc_getalarm,
370 .set_alarm = s3c_rtc_setalarm,
371 .proc = s3c_rtc_proc,
372 .alarm_irq_enable = s3c_rtc_setaie,
373};
374
375static void s3c_rtc_enable(struct platform_device *pdev, int en)
376{
377 void __iomem *base = s3c_rtc_base;
378 unsigned int tmp;
379
380 if (s3c_rtc_base == NULL)
381 return;
382
383 clk_enable(rtc_clk);
384 if (!en) {
385 tmp = readw(base + S3C2410_RTCCON);
386 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
387 tmp &= ~S3C64XX_RTCCON_TICEN;
388 tmp &= ~S3C2410_RTCCON_RTCEN;
389 writew(tmp, base + S3C2410_RTCCON);
390
391 if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
392 tmp = readb(base + S3C2410_TICNT);
393 tmp &= ~S3C2410_TICNT_ENABLE;
394 writeb(tmp, base + S3C2410_TICNT);
395 }
396 } else {
397 /* re-enable the device, and check it is ok */
398
399 if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
400 dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
401
402 tmp = readw(base + S3C2410_RTCCON);
403 writew(tmp | S3C2410_RTCCON_RTCEN,
404 base + S3C2410_RTCCON);
405 }
406
407 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
408 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
409
410 tmp = readw(base + S3C2410_RTCCON);
411 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
412 base + S3C2410_RTCCON);
413 }
414
415 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
416 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
417
418 tmp = readw(base + S3C2410_RTCCON);
419 writew(tmp & ~S3C2410_RTCCON_CLKRST,
420 base + S3C2410_RTCCON);
421 }
422 }
423 clk_disable(rtc_clk);
424}
425
426static int __devexit s3c_rtc_remove(struct platform_device *dev)
427{
428 struct rtc_device *rtc = platform_get_drvdata(dev);
429
430 free_irq(s3c_rtc_alarmno, rtc);
431 free_irq(s3c_rtc_tickno, rtc);
432
433 platform_set_drvdata(dev, NULL);
434 rtc_device_unregister(rtc);
435
436 s3c_rtc_setaie(&dev->dev, 0);
437
438 clk_put(rtc_clk);
439 rtc_clk = NULL;
440
441 iounmap(s3c_rtc_base);
442 release_resource(s3c_rtc_mem);
443 kfree(s3c_rtc_mem);
444
445 return 0;
446}
447
448static const struct of_device_id s3c_rtc_dt_match[];
449
450static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
451{
452#ifdef CONFIG_OF
453 struct s3c_rtc_drv_data *data;
454 if (pdev->dev.of_node) {
455 const struct of_device_id *match;
456 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
457 data = (struct s3c_rtc_drv_data *) match->data;
458 return data->cpu_type;
459 }
460#endif
461 return platform_get_device_id(pdev)->driver_data;
462}
463
464static int __devinit s3c_rtc_probe(struct platform_device *pdev)
465{
466 struct rtc_device *rtc;
467 struct rtc_time rtc_tm;
468 struct resource *res;
469 int ret;
470 int tmp;
471
472 pr_debug("%s: probe=%p\n", __func__, pdev);
473
474 /* find the IRQs */
475
476 s3c_rtc_tickno = platform_get_irq(pdev, 1);
477 if (s3c_rtc_tickno < 0) {
478 dev_err(&pdev->dev, "no irq for rtc tick\n");
479 return -ENOENT;
480 }
481
482 s3c_rtc_alarmno = platform_get_irq(pdev, 0);
483 if (s3c_rtc_alarmno < 0) {
484 dev_err(&pdev->dev, "no irq for alarm\n");
485 return -ENOENT;
486 }
487
488 pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
489 s3c_rtc_tickno, s3c_rtc_alarmno);
490
491 /* get the memory region */
492
493 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
494 if (res == NULL) {
495 dev_err(&pdev->dev, "failed to get memory region resource\n");
496 return -ENOENT;
497 }
498
499 s3c_rtc_mem = request_mem_region(res->start, resource_size(res),
500 pdev->name);
501
502 if (s3c_rtc_mem == NULL) {
503 dev_err(&pdev->dev, "failed to reserve memory region\n");
504 ret = -ENOENT;
505 goto err_nores;
506 }
507
508 s3c_rtc_base = ioremap(res->start, resource_size(res));
509 if (s3c_rtc_base == NULL) {
510 dev_err(&pdev->dev, "failed ioremap()\n");
511 ret = -EINVAL;
512 goto err_nomap;
513 }
514
515 rtc_clk = clk_get(&pdev->dev, "rtc");
516 if (IS_ERR(rtc_clk)) {
517 dev_err(&pdev->dev, "failed to find rtc clock source\n");
518 ret = PTR_ERR(rtc_clk);
519 rtc_clk = NULL;
520 goto err_clk;
521 }
522
523 clk_enable(rtc_clk);
524
525 /* check to see if everything is setup correctly */
526
527 s3c_rtc_enable(pdev, 1);
528
529 pr_debug("s3c2410_rtc: RTCCON=%02x\n",
530 readw(s3c_rtc_base + S3C2410_RTCCON));
531
532 device_init_wakeup(&pdev->dev, 1);
533
534 /* register RTC and exit */
535
536 rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
537 THIS_MODULE);
538
539 if (IS_ERR(rtc)) {
540 dev_err(&pdev->dev, "cannot attach rtc\n");
541 ret = PTR_ERR(rtc);
542 goto err_nortc;
543 }
544
545 s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev);
546
547 /* Check RTC Time */
548
549 s3c_rtc_gettime(NULL, &rtc_tm);
550
551 if (rtc_valid_tm(&rtc_tm)) {
552 rtc_tm.tm_year = 100;
553 rtc_tm.tm_mon = 0;
554 rtc_tm.tm_mday = 1;
555 rtc_tm.tm_hour = 0;
556 rtc_tm.tm_min = 0;
557 rtc_tm.tm_sec = 0;
558
559 s3c_rtc_settime(NULL, &rtc_tm);
560
561 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
562 }
563
564 if (s3c_rtc_cpu_type != TYPE_S3C2410)
565 rtc->max_user_freq = 32768;
566 else
567 rtc->max_user_freq = 128;
568
569 if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
570 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
571 tmp |= S3C2443_RTCCON_TICSEL;
572 writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
573 }
574
575 platform_set_drvdata(pdev, rtc);
576
577 s3c_rtc_setfreq(&pdev->dev, 1);
578
579 ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
580 0, "s3c2410-rtc alarm", rtc);
581 if (ret) {
582 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
583 goto err_alarm_irq;
584 }
585
586 ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
587 0, "s3c2410-rtc tick", rtc);
588 if (ret) {
589 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
590 free_irq(s3c_rtc_alarmno, rtc);
591 goto err_tick_irq;
592 }
593
594 clk_disable(rtc_clk);
595
596 return 0;
597
598 err_tick_irq:
599 free_irq(s3c_rtc_alarmno, rtc);
600
601 err_alarm_irq:
602 platform_set_drvdata(pdev, NULL);
603 rtc_device_unregister(rtc);
604
605 err_nortc:
606 s3c_rtc_enable(pdev, 0);
607 clk_disable(rtc_clk);
608 clk_put(rtc_clk);
609
610 err_clk:
611 iounmap(s3c_rtc_base);
612
613 err_nomap:
614 release_resource(s3c_rtc_mem);
615
616 err_nores:
617 return ret;
618}
619
620#ifdef CONFIG_PM
621
622/* RTC Power management control */
623
624static int ticnt_save, ticnt_en_save;
625
626static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
627{
628 clk_enable(rtc_clk);
629 /* save TICNT for anyone using periodic interrupts */
630 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
631 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
632 ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
633 ticnt_en_save &= S3C64XX_RTCCON_TICEN;
634 }
635 s3c_rtc_enable(pdev, 0);
636
637 if (device_may_wakeup(&pdev->dev) && !wake_en) {
638 if (enable_irq_wake(s3c_rtc_alarmno) == 0)
639 wake_en = true;
640 else
641 dev_err(&pdev->dev, "enable_irq_wake failed\n");
642 }
643 clk_disable(rtc_clk);
644
645 return 0;
646}
647
648static int s3c_rtc_resume(struct platform_device *pdev)
649{
650 unsigned int tmp;
651
652 clk_enable(rtc_clk);
653 s3c_rtc_enable(pdev, 1);
654 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
655 if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
656 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
657 writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
658 }
659
660 if (device_may_wakeup(&pdev->dev) && wake_en) {
661 disable_irq_wake(s3c_rtc_alarmno);
662 wake_en = false;
663 }
664 clk_disable(rtc_clk);
665
666 return 0;
667}
668#else
669#define s3c_rtc_suspend NULL
670#define s3c_rtc_resume NULL
671#endif
672
673#ifdef CONFIG_OF
674static struct s3c_rtc_drv_data s3c_rtc_drv_data_array[] = {
675 [TYPE_S3C2410] = { TYPE_S3C2410 },
676 [TYPE_S3C2416] = { TYPE_S3C2416 },
677 [TYPE_S3C2443] = { TYPE_S3C2443 },
678 [TYPE_S3C64XX] = { TYPE_S3C64XX },
679};
680
681static const struct of_device_id s3c_rtc_dt_match[] = {
682 {
683 .compatible = "samsung,s3c2410-rtc",
684 .data = &s3c_rtc_drv_data_array[TYPE_S3C2410],
685 }, {
686 .compatible = "samsung,s3c2416-rtc",
687 .data = &s3c_rtc_drv_data_array[TYPE_S3C2416],
688 }, {
689 .compatible = "samsung,s3c2443-rtc",
690 .data = &s3c_rtc_drv_data_array[TYPE_S3C2443],
691 }, {
692 .compatible = "samsung,s3c6410-rtc",
693 .data = &s3c_rtc_drv_data_array[TYPE_S3C64XX],
694 },
695 {},
696};
697MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
698#else
699#define s3c_rtc_dt_match NULL
700#endif
701
702static struct platform_device_id s3c_rtc_driver_ids[] = {
703 {
704 .name = "s3c2410-rtc",
705 .driver_data = TYPE_S3C2410,
706 }, {
707 .name = "s3c2416-rtc",
708 .driver_data = TYPE_S3C2416,
709 }, {
710 .name = "s3c2443-rtc",
711 .driver_data = TYPE_S3C2443,
712 }, {
713 .name = "s3c64xx-rtc",
714 .driver_data = TYPE_S3C64XX,
715 },
716 { }
717};
718
719MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
720
721static struct platform_driver s3c_rtc_driver = {
722 .probe = s3c_rtc_probe,
723 .remove = __devexit_p(s3c_rtc_remove),
724 .suspend = s3c_rtc_suspend,
725 .resume = s3c_rtc_resume,
726 .id_table = s3c_rtc_driver_ids,
727 .driver = {
728 .name = "s3c-rtc",
729 .owner = THIS_MODULE,
730 .of_match_table = s3c_rtc_dt_match,
731 },
732};
733
734module_platform_driver(s3c_rtc_driver);
735
736MODULE_DESCRIPTION("Samsung S3C RTC Driver");
737MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
738MODULE_LICENSE("GPL");
739MODULE_ALIAS("platform:s3c2410-rtc");
1/* drivers/rtc/rtc-s3c.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
26#include <linux/log2.h>
27#include <linux/slab.h>
28#include <linux/of.h>
29#include <linux/uaccess.h>
30#include <linux/io.h>
31
32#include <asm/irq.h>
33#include "rtc-s3c.h"
34
35struct s3c_rtc {
36 struct device *dev;
37 struct rtc_device *rtc;
38
39 void __iomem *base;
40 struct clk *rtc_clk;
41 struct clk *rtc_src_clk;
42 bool clk_disabled;
43
44 const struct s3c_rtc_data *data;
45
46 int irq_alarm;
47 int irq_tick;
48
49 spinlock_t pie_lock;
50 spinlock_t alarm_clk_lock;
51
52 int ticnt_save;
53 int ticnt_en_save;
54 bool wake_en;
55};
56
57struct s3c_rtc_data {
58 int max_user_freq;
59 bool needs_src_clk;
60
61 void (*irq_handler) (struct s3c_rtc *info, int mask);
62 void (*set_freq) (struct s3c_rtc *info, int freq);
63 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
64 void (*select_tick_clk) (struct s3c_rtc *info);
65 void (*save_tick_cnt) (struct s3c_rtc *info);
66 void (*restore_tick_cnt) (struct s3c_rtc *info);
67 void (*enable) (struct s3c_rtc *info);
68 void (*disable) (struct s3c_rtc *info);
69};
70
71static int s3c_rtc_enable_clk(struct s3c_rtc *info)
72{
73 unsigned long irq_flags;
74 int ret = 0;
75
76 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
77
78 if (info->clk_disabled) {
79 ret = clk_enable(info->rtc_clk);
80 if (ret)
81 goto out;
82
83 if (info->data->needs_src_clk) {
84 ret = clk_enable(info->rtc_src_clk);
85 if (ret) {
86 clk_disable(info->rtc_clk);
87 goto out;
88 }
89 }
90 info->clk_disabled = false;
91 }
92
93out:
94 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
95
96 return ret;
97}
98
99static void s3c_rtc_disable_clk(struct s3c_rtc *info)
100{
101 unsigned long irq_flags;
102
103 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
104 if (!info->clk_disabled) {
105 if (info->data->needs_src_clk)
106 clk_disable(info->rtc_src_clk);
107 clk_disable(info->rtc_clk);
108 info->clk_disabled = true;
109 }
110 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
111}
112
113/* IRQ Handlers */
114static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
115{
116 struct s3c_rtc *info = (struct s3c_rtc *)id;
117
118 if (info->data->irq_handler)
119 info->data->irq_handler(info, S3C2410_INTP_TIC);
120
121 return IRQ_HANDLED;
122}
123
124static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
125{
126 struct s3c_rtc *info = (struct s3c_rtc *)id;
127
128 if (info->data->irq_handler)
129 info->data->irq_handler(info, S3C2410_INTP_ALM);
130
131 return IRQ_HANDLED;
132}
133
134/* Update control registers */
135static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
136{
137 struct s3c_rtc *info = dev_get_drvdata(dev);
138 unsigned int tmp;
139 int ret;
140
141 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
142
143 ret = s3c_rtc_enable_clk(info);
144 if (ret)
145 return ret;
146
147 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
148
149 if (enabled)
150 tmp |= S3C2410_RTCALM_ALMEN;
151
152 writeb(tmp, info->base + S3C2410_RTCALM);
153
154 s3c_rtc_disable_clk(info);
155
156 if (enabled) {
157 ret = s3c_rtc_enable_clk(info);
158 if (ret)
159 return ret;
160 } else {
161 s3c_rtc_disable_clk(info);
162 }
163
164 return 0;
165}
166
167/* Set RTC frequency */
168static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
169{
170 int ret;
171
172 if (!is_power_of_2(freq))
173 return -EINVAL;
174
175 ret = s3c_rtc_enable_clk(info);
176 if (ret)
177 return ret;
178 spin_lock_irq(&info->pie_lock);
179
180 if (info->data->set_freq)
181 info->data->set_freq(info, freq);
182
183 spin_unlock_irq(&info->pie_lock);
184 s3c_rtc_disable_clk(info);
185
186 return 0;
187}
188
189/* Time read/write */
190static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
191{
192 struct s3c_rtc *info = dev_get_drvdata(dev);
193 unsigned int have_retried = 0;
194 int ret;
195
196 ret = s3c_rtc_enable_clk(info);
197 if (ret)
198 return ret;
199
200retry_get_time:
201 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
202 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
203 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
204 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
205 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
206 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
207
208 /* the only way to work out whether the system was mid-update
209 * when we read it is to check the second counter, and if it
210 * is zero, then we re-try the entire read
211 */
212
213 if (rtc_tm->tm_sec == 0 && !have_retried) {
214 have_retried = 1;
215 goto retry_get_time;
216 }
217
218 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
219 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
220 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
221 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
222 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
223 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
224
225 s3c_rtc_disable_clk(info);
226
227 rtc_tm->tm_year += 100;
228
229 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
230 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
231 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
232
233 rtc_tm->tm_mon -= 1;
234
235 return 0;
236}
237
238static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
239{
240 struct s3c_rtc *info = dev_get_drvdata(dev);
241 int year = tm->tm_year - 100;
242 int ret;
243
244 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
245 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
246 tm->tm_hour, tm->tm_min, tm->tm_sec);
247
248 /* we get around y2k by simply not supporting it */
249
250 if (year < 0 || year >= 100) {
251 dev_err(dev, "rtc only supports 100 years\n");
252 return -EINVAL;
253 }
254
255 ret = s3c_rtc_enable_clk(info);
256 if (ret)
257 return ret;
258
259 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
260 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
261 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
262 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
263 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
264 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
265
266 s3c_rtc_disable_clk(info);
267
268 return 0;
269}
270
271static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
272{
273 struct s3c_rtc *info = dev_get_drvdata(dev);
274 struct rtc_time *alm_tm = &alrm->time;
275 unsigned int alm_en;
276 int ret;
277
278 ret = s3c_rtc_enable_clk(info);
279 if (ret)
280 return ret;
281
282 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
283 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
284 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
285 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
286 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
287 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
288
289 alm_en = readb(info->base + S3C2410_RTCALM);
290
291 s3c_rtc_disable_clk(info);
292
293 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
294
295 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
296 alm_en,
297 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
298 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
299
300 /* decode the alarm enable field */
301 if (alm_en & S3C2410_RTCALM_SECEN)
302 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
303
304 if (alm_en & S3C2410_RTCALM_MINEN)
305 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
306
307 if (alm_en & S3C2410_RTCALM_HOUREN)
308 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
309
310 if (alm_en & S3C2410_RTCALM_DAYEN)
311 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
312
313 if (alm_en & S3C2410_RTCALM_MONEN) {
314 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
315 alm_tm->tm_mon -= 1;
316 }
317
318 if (alm_en & S3C2410_RTCALM_YEAREN)
319 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
320
321 return 0;
322}
323
324static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
325{
326 struct s3c_rtc *info = dev_get_drvdata(dev);
327 struct rtc_time *tm = &alrm->time;
328 unsigned int alrm_en;
329 int ret;
330 int year = tm->tm_year - 100;
331
332 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
333 alrm->enabled,
334 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
335 tm->tm_hour, tm->tm_min, tm->tm_sec);
336
337 ret = s3c_rtc_enable_clk(info);
338 if (ret)
339 return ret;
340
341 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
342 writeb(0x00, info->base + S3C2410_RTCALM);
343
344 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
345 alrm_en |= S3C2410_RTCALM_SECEN;
346 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
347 }
348
349 if (tm->tm_min < 60 && tm->tm_min >= 0) {
350 alrm_en |= S3C2410_RTCALM_MINEN;
351 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
352 }
353
354 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
355 alrm_en |= S3C2410_RTCALM_HOUREN;
356 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
357 }
358
359 if (year < 100 && year >= 0) {
360 alrm_en |= S3C2410_RTCALM_YEAREN;
361 writeb(bin2bcd(year), info->base + S3C2410_ALMYEAR);
362 }
363
364 if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
365 alrm_en |= S3C2410_RTCALM_MONEN;
366 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
367 }
368
369 if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
370 alrm_en |= S3C2410_RTCALM_DAYEN;
371 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
372 }
373
374 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
375
376 writeb(alrm_en, info->base + S3C2410_RTCALM);
377
378 s3c_rtc_disable_clk(info);
379
380 s3c_rtc_setaie(dev, alrm->enabled);
381
382 return 0;
383}
384
385static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
386{
387 struct s3c_rtc *info = dev_get_drvdata(dev);
388 int ret;
389
390 ret = s3c_rtc_enable_clk(info);
391 if (ret)
392 return ret;
393
394 if (info->data->enable_tick)
395 info->data->enable_tick(info, seq);
396
397 s3c_rtc_disable_clk(info);
398
399 return 0;
400}
401
402static const struct rtc_class_ops s3c_rtcops = {
403 .read_time = s3c_rtc_gettime,
404 .set_time = s3c_rtc_settime,
405 .read_alarm = s3c_rtc_getalarm,
406 .set_alarm = s3c_rtc_setalarm,
407 .proc = s3c_rtc_proc,
408 .alarm_irq_enable = s3c_rtc_setaie,
409};
410
411static void s3c24xx_rtc_enable(struct s3c_rtc *info)
412{
413 unsigned int con, tmp;
414
415 con = readw(info->base + S3C2410_RTCCON);
416 /* re-enable the device, and check it is ok */
417 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
418 dev_info(info->dev, "rtc disabled, re-enabling\n");
419
420 tmp = readw(info->base + S3C2410_RTCCON);
421 writew(tmp | S3C2410_RTCCON_RTCEN, info->base + S3C2410_RTCCON);
422 }
423
424 if (con & S3C2410_RTCCON_CNTSEL) {
425 dev_info(info->dev, "removing RTCCON_CNTSEL\n");
426
427 tmp = readw(info->base + S3C2410_RTCCON);
428 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
429 info->base + S3C2410_RTCCON);
430 }
431
432 if (con & S3C2410_RTCCON_CLKRST) {
433 dev_info(info->dev, "removing RTCCON_CLKRST\n");
434
435 tmp = readw(info->base + S3C2410_RTCCON);
436 writew(tmp & ~S3C2410_RTCCON_CLKRST,
437 info->base + S3C2410_RTCCON);
438 }
439}
440
441static void s3c24xx_rtc_disable(struct s3c_rtc *info)
442{
443 unsigned int con;
444
445 con = readw(info->base + S3C2410_RTCCON);
446 con &= ~S3C2410_RTCCON_RTCEN;
447 writew(con, info->base + S3C2410_RTCCON);
448
449 con = readb(info->base + S3C2410_TICNT);
450 con &= ~S3C2410_TICNT_ENABLE;
451 writeb(con, info->base + S3C2410_TICNT);
452}
453
454static void s3c6410_rtc_disable(struct s3c_rtc *info)
455{
456 unsigned int con;
457
458 con = readw(info->base + S3C2410_RTCCON);
459 con &= ~S3C64XX_RTCCON_TICEN;
460 con &= ~S3C2410_RTCCON_RTCEN;
461 writew(con, info->base + S3C2410_RTCCON);
462}
463
464static int s3c_rtc_remove(struct platform_device *pdev)
465{
466 struct s3c_rtc *info = platform_get_drvdata(pdev);
467
468 s3c_rtc_setaie(info->dev, 0);
469
470 if (info->data->needs_src_clk)
471 clk_unprepare(info->rtc_src_clk);
472 clk_unprepare(info->rtc_clk);
473
474 return 0;
475}
476
477static const struct of_device_id s3c_rtc_dt_match[];
478
479static const struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
480{
481 const struct of_device_id *match;
482
483 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
484 return match->data;
485}
486
487static int s3c_rtc_probe(struct platform_device *pdev)
488{
489 struct s3c_rtc *info = NULL;
490 struct rtc_time rtc_tm;
491 struct resource *res;
492 int ret;
493
494 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
495 if (!info)
496 return -ENOMEM;
497
498 /* find the IRQs */
499 info->irq_tick = platform_get_irq(pdev, 1);
500 if (info->irq_tick < 0) {
501 dev_err(&pdev->dev, "no irq for rtc tick\n");
502 return info->irq_tick;
503 }
504
505 info->dev = &pdev->dev;
506 info->data = s3c_rtc_get_data(pdev);
507 if (!info->data) {
508 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
509 return -EINVAL;
510 }
511 spin_lock_init(&info->pie_lock);
512 spin_lock_init(&info->alarm_clk_lock);
513
514 platform_set_drvdata(pdev, info);
515
516 info->irq_alarm = platform_get_irq(pdev, 0);
517 if (info->irq_alarm < 0) {
518 dev_err(&pdev->dev, "no irq for alarm\n");
519 return info->irq_alarm;
520 }
521
522 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
523 info->irq_tick, info->irq_alarm);
524
525 /* get the memory region */
526 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
527 info->base = devm_ioremap_resource(&pdev->dev, res);
528 if (IS_ERR(info->base))
529 return PTR_ERR(info->base);
530
531 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
532 if (IS_ERR(info->rtc_clk)) {
533 ret = PTR_ERR(info->rtc_clk);
534 if (ret != -EPROBE_DEFER)
535 dev_err(&pdev->dev, "failed to find rtc clock\n");
536 else
537 dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n");
538 return ret;
539 }
540 ret = clk_prepare_enable(info->rtc_clk);
541 if (ret)
542 return ret;
543
544 if (info->data->needs_src_clk) {
545 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
546 if (IS_ERR(info->rtc_src_clk)) {
547 ret = PTR_ERR(info->rtc_src_clk);
548 if (ret != -EPROBE_DEFER)
549 dev_err(&pdev->dev,
550 "failed to find rtc source clock\n");
551 else
552 dev_dbg(&pdev->dev,
553 "probe deferred due to missing rtc src clk\n");
554 goto err_src_clk;
555 }
556 ret = clk_prepare_enable(info->rtc_src_clk);
557 if (ret)
558 goto err_src_clk;
559 }
560
561 /* check to see if everything is setup correctly */
562 if (info->data->enable)
563 info->data->enable(info);
564
565 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
566 readw(info->base + S3C2410_RTCCON));
567
568 device_init_wakeup(&pdev->dev, 1);
569
570 /* Check RTC Time */
571 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
572 rtc_tm.tm_year = 100;
573 rtc_tm.tm_mon = 0;
574 rtc_tm.tm_mday = 1;
575 rtc_tm.tm_hour = 0;
576 rtc_tm.tm_min = 0;
577 rtc_tm.tm_sec = 0;
578
579 s3c_rtc_settime(&pdev->dev, &rtc_tm);
580
581 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
582 }
583
584 /* register RTC and exit */
585 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
586 THIS_MODULE);
587 if (IS_ERR(info->rtc)) {
588 dev_err(&pdev->dev, "cannot attach rtc\n");
589 ret = PTR_ERR(info->rtc);
590 goto err_nortc;
591 }
592
593 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
594 0, "s3c2410-rtc alarm", info);
595 if (ret) {
596 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
597 goto err_nortc;
598 }
599
600 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
601 0, "s3c2410-rtc tick", info);
602 if (ret) {
603 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
604 goto err_nortc;
605 }
606
607 if (info->data->select_tick_clk)
608 info->data->select_tick_clk(info);
609
610 s3c_rtc_setfreq(info, 1);
611
612 return 0;
613
614err_nortc:
615 if (info->data->disable)
616 info->data->disable(info);
617
618 if (info->data->needs_src_clk)
619 clk_disable_unprepare(info->rtc_src_clk);
620err_src_clk:
621 clk_disable_unprepare(info->rtc_clk);
622
623 return ret;
624}
625
626#ifdef CONFIG_PM_SLEEP
627
628static int s3c_rtc_suspend(struct device *dev)
629{
630 struct s3c_rtc *info = dev_get_drvdata(dev);
631 int ret;
632
633 ret = s3c_rtc_enable_clk(info);
634 if (ret)
635 return ret;
636
637 /* save TICNT for anyone using periodic interrupts */
638 if (info->data->save_tick_cnt)
639 info->data->save_tick_cnt(info);
640
641 if (info->data->disable)
642 info->data->disable(info);
643
644 if (device_may_wakeup(dev) && !info->wake_en) {
645 if (enable_irq_wake(info->irq_alarm) == 0)
646 info->wake_en = true;
647 else
648 dev_err(dev, "enable_irq_wake failed\n");
649 }
650
651 return 0;
652}
653
654static int s3c_rtc_resume(struct device *dev)
655{
656 struct s3c_rtc *info = dev_get_drvdata(dev);
657
658 if (info->data->enable)
659 info->data->enable(info);
660
661 if (info->data->restore_tick_cnt)
662 info->data->restore_tick_cnt(info);
663
664 s3c_rtc_disable_clk(info);
665
666 if (device_may_wakeup(dev) && info->wake_en) {
667 disable_irq_wake(info->irq_alarm);
668 info->wake_en = false;
669 }
670
671 return 0;
672}
673#endif
674static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
675
676static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
677{
678 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
679}
680
681static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
682{
683 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
684 writeb(mask, info->base + S3C2410_INTP);
685}
686
687static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
688{
689 unsigned int tmp = 0;
690 int val;
691
692 tmp = readb(info->base + S3C2410_TICNT);
693 tmp &= S3C2410_TICNT_ENABLE;
694
695 val = (info->rtc->max_user_freq / freq) - 1;
696 tmp |= val;
697
698 writel(tmp, info->base + S3C2410_TICNT);
699}
700
701static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
702{
703 unsigned int tmp = 0;
704 int val;
705
706 tmp = readb(info->base + S3C2410_TICNT);
707 tmp &= S3C2410_TICNT_ENABLE;
708
709 val = (info->rtc->max_user_freq / freq) - 1;
710
711 tmp |= S3C2443_TICNT_PART(val);
712 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
713
714 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
715
716 writel(tmp, info->base + S3C2410_TICNT);
717}
718
719static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
720{
721 unsigned int tmp = 0;
722 int val;
723
724 tmp = readb(info->base + S3C2410_TICNT);
725 tmp &= S3C2410_TICNT_ENABLE;
726
727 val = (info->rtc->max_user_freq / freq) - 1;
728
729 tmp |= S3C2443_TICNT_PART(val);
730 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
731
732 writel(tmp, info->base + S3C2410_TICNT);
733}
734
735static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
736{
737 int val;
738
739 val = (info->rtc->max_user_freq / freq) - 1;
740 writel(val, info->base + S3C2410_TICNT);
741}
742
743static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
744{
745 unsigned int ticnt;
746
747 ticnt = readb(info->base + S3C2410_TICNT);
748 ticnt &= S3C2410_TICNT_ENABLE;
749
750 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
751}
752
753static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
754{
755 unsigned int con;
756
757 con = readw(info->base + S3C2410_RTCCON);
758 con |= S3C2443_RTCCON_TICSEL;
759 writew(con, info->base + S3C2410_RTCCON);
760}
761
762static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
763{
764 unsigned int ticnt;
765
766 ticnt = readw(info->base + S3C2410_RTCCON);
767 ticnt &= S3C64XX_RTCCON_TICEN;
768
769 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
770}
771
772static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
773{
774 info->ticnt_save = readb(info->base + S3C2410_TICNT);
775}
776
777static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
778{
779 writeb(info->ticnt_save, info->base + S3C2410_TICNT);
780}
781
782static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
783{
784 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
785 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
786 info->ticnt_save = readl(info->base + S3C2410_TICNT);
787}
788
789static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
790{
791 unsigned int con;
792
793 writel(info->ticnt_save, info->base + S3C2410_TICNT);
794 if (info->ticnt_en_save) {
795 con = readw(info->base + S3C2410_RTCCON);
796 writew(con | info->ticnt_en_save, info->base + S3C2410_RTCCON);
797 }
798}
799
800static struct s3c_rtc_data const s3c2410_rtc_data = {
801 .max_user_freq = 128,
802 .irq_handler = s3c24xx_rtc_irq,
803 .set_freq = s3c2410_rtc_setfreq,
804 .enable_tick = s3c24xx_rtc_enable_tick,
805 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
806 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
807 .enable = s3c24xx_rtc_enable,
808 .disable = s3c24xx_rtc_disable,
809};
810
811static struct s3c_rtc_data const s3c2416_rtc_data = {
812 .max_user_freq = 32768,
813 .irq_handler = s3c24xx_rtc_irq,
814 .set_freq = s3c2416_rtc_setfreq,
815 .enable_tick = s3c24xx_rtc_enable_tick,
816 .select_tick_clk = s3c2416_rtc_select_tick_clk,
817 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
818 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
819 .enable = s3c24xx_rtc_enable,
820 .disable = s3c24xx_rtc_disable,
821};
822
823static struct s3c_rtc_data const s3c2443_rtc_data = {
824 .max_user_freq = 32768,
825 .irq_handler = s3c24xx_rtc_irq,
826 .set_freq = s3c2443_rtc_setfreq,
827 .enable_tick = s3c24xx_rtc_enable_tick,
828 .select_tick_clk = s3c2416_rtc_select_tick_clk,
829 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
830 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
831 .enable = s3c24xx_rtc_enable,
832 .disable = s3c24xx_rtc_disable,
833};
834
835static struct s3c_rtc_data const s3c6410_rtc_data = {
836 .max_user_freq = 32768,
837 .needs_src_clk = true,
838 .irq_handler = s3c6410_rtc_irq,
839 .set_freq = s3c6410_rtc_setfreq,
840 .enable_tick = s3c6410_rtc_enable_tick,
841 .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
842 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
843 .enable = s3c24xx_rtc_enable,
844 .disable = s3c6410_rtc_disable,
845};
846
847static const struct of_device_id s3c_rtc_dt_match[] = {
848 {
849 .compatible = "samsung,s3c2410-rtc",
850 .data = &s3c2410_rtc_data,
851 }, {
852 .compatible = "samsung,s3c2416-rtc",
853 .data = &s3c2416_rtc_data,
854 }, {
855 .compatible = "samsung,s3c2443-rtc",
856 .data = &s3c2443_rtc_data,
857 }, {
858 .compatible = "samsung,s3c6410-rtc",
859 .data = &s3c6410_rtc_data,
860 }, {
861 .compatible = "samsung,exynos3250-rtc",
862 .data = &s3c6410_rtc_data,
863 },
864 { /* sentinel */ },
865};
866MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
867
868static struct platform_driver s3c_rtc_driver = {
869 .probe = s3c_rtc_probe,
870 .remove = s3c_rtc_remove,
871 .driver = {
872 .name = "s3c-rtc",
873 .pm = &s3c_rtc_pm_ops,
874 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
875 },
876};
877module_platform_driver(s3c_rtc_driver);
878
879MODULE_DESCRIPTION("Samsung S3C RTC Driver");
880MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
881MODULE_LICENSE("GPL");
882MODULE_ALIAS("platform:s3c2410-rtc");