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1/*
2 * unaligned.c: Unaligned load/store trap handling with special
3 * cases for the kernel to do them more quickly.
4 *
5 * Copyright (C) 1996,2008 David S. Miller (davem@davemloft.net)
6 * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
7 */
8
9
10#include <linux/jiffies.h>
11#include <linux/kernel.h>
12#include <linux/sched.h>
13#include <linux/mm.h>
14#include <linux/module.h>
15#include <asm/asi.h>
16#include <asm/ptrace.h>
17#include <asm/pstate.h>
18#include <asm/processor.h>
19#include <asm/uaccess.h>
20#include <linux/smp.h>
21#include <linux/bitops.h>
22#include <linux/perf_event.h>
23#include <linux/ratelimit.h>
24#include <asm/fpumacro.h>
25#include <asm/cacheflush.h>
26
27enum direction {
28 load, /* ld, ldd, ldh, ldsh */
29 store, /* st, std, sth, stsh */
30 both, /* Swap, ldstub, cas, ... */
31 fpld,
32 fpst,
33 invalid,
34};
35
36static inline enum direction decode_direction(unsigned int insn)
37{
38 unsigned long tmp = (insn >> 21) & 1;
39
40 if (!tmp)
41 return load;
42 else {
43 switch ((insn>>19)&0xf) {
44 case 15: /* swap* */
45 return both;
46 default:
47 return store;
48 }
49 }
50}
51
52/* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
53static inline int decode_access_size(struct pt_regs *regs, unsigned int insn)
54{
55 unsigned int tmp;
56
57 tmp = ((insn >> 19) & 0xf);
58 if (tmp == 11 || tmp == 14) /* ldx/stx */
59 return 8;
60 tmp &= 3;
61 if (!tmp)
62 return 4;
63 else if (tmp == 3)
64 return 16; /* ldd/std - Although it is actually 8 */
65 else if (tmp == 2)
66 return 2;
67 else {
68 printk("Impossible unaligned trap. insn=%08x\n", insn);
69 die_if_kernel("Byte sized unaligned access?!?!", regs);
70
71 /* GCC should never warn that control reaches the end
72 * of this function without returning a value because
73 * die_if_kernel() is marked with attribute 'noreturn'.
74 * Alas, some versions do...
75 */
76
77 return 0;
78 }
79}
80
81static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
82{
83 if (insn & 0x800000) {
84 if (insn & 0x2000)
85 return (unsigned char)(regs->tstate >> 24); /* %asi */
86 else
87 return (unsigned char)(insn >> 5); /* imm_asi */
88 } else
89 return ASI_P;
90}
91
92/* 0x400000 = signed, 0 = unsigned */
93static inline int decode_signedness(unsigned int insn)
94{
95 return (insn & 0x400000);
96}
97
98static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
99 unsigned int rd, int from_kernel)
100{
101 if (rs2 >= 16 || rs1 >= 16 || rd >= 16) {
102 if (from_kernel != 0)
103 __asm__ __volatile__("flushw");
104 else
105 flushw_user();
106 }
107}
108
109static inline long sign_extend_imm13(long imm)
110{
111 return imm << 51 >> 51;
112}
113
114static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
115{
116 unsigned long value;
117
118 if (reg < 16)
119 return (!reg ? 0 : regs->u_regs[reg]);
120 if (regs->tstate & TSTATE_PRIV) {
121 struct reg_window *win;
122 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
123 value = win->locals[reg - 16];
124 } else if (test_thread_flag(TIF_32BIT)) {
125 struct reg_window32 __user *win32;
126 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
127 get_user(value, &win32->locals[reg - 16]);
128 } else {
129 struct reg_window __user *win;
130 win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
131 get_user(value, &win->locals[reg - 16]);
132 }
133 return value;
134}
135
136static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
137{
138 if (reg < 16)
139 return ®s->u_regs[reg];
140 if (regs->tstate & TSTATE_PRIV) {
141 struct reg_window *win;
142 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
143 return &win->locals[reg - 16];
144 } else if (test_thread_flag(TIF_32BIT)) {
145 struct reg_window32 *win32;
146 win32 = (struct reg_window32 *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
147 return (unsigned long *)&win32->locals[reg - 16];
148 } else {
149 struct reg_window *win;
150 win = (struct reg_window *)(regs->u_regs[UREG_FP] + STACK_BIAS);
151 return &win->locals[reg - 16];
152 }
153}
154
155unsigned long compute_effective_address(struct pt_regs *regs,
156 unsigned int insn, unsigned int rd)
157{
158 unsigned int rs1 = (insn >> 14) & 0x1f;
159 unsigned int rs2 = insn & 0x1f;
160 int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
161
162 if (insn & 0x2000) {
163 maybe_flush_windows(rs1, 0, rd, from_kernel);
164 return (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
165 } else {
166 maybe_flush_windows(rs1, rs2, rd, from_kernel);
167 return (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
168 }
169}
170
171/* This is just to make gcc think die_if_kernel does return... */
172static void __used unaligned_panic(char *str, struct pt_regs *regs)
173{
174 die_if_kernel(str, regs);
175}
176
177extern int do_int_load(unsigned long *dest_reg, int size,
178 unsigned long *saddr, int is_signed, int asi);
179
180extern int __do_int_store(unsigned long *dst_addr, int size,
181 unsigned long src_val, int asi);
182
183static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr,
184 struct pt_regs *regs, int asi, int orig_asi)
185{
186 unsigned long zero = 0;
187 unsigned long *src_val_p = &zero;
188 unsigned long src_val;
189
190 if (size == 16) {
191 size = 8;
192 zero = (((long)(reg_num ?
193 (unsigned)fetch_reg(reg_num, regs) : 0)) << 32) |
194 (unsigned)fetch_reg(reg_num + 1, regs);
195 } else if (reg_num) {
196 src_val_p = fetch_reg_addr(reg_num, regs);
197 }
198 src_val = *src_val_p;
199 if (unlikely(asi != orig_asi)) {
200 switch (size) {
201 case 2:
202 src_val = swab16(src_val);
203 break;
204 case 4:
205 src_val = swab32(src_val);
206 break;
207 case 8:
208 src_val = swab64(src_val);
209 break;
210 case 16:
211 default:
212 BUG();
213 break;
214 }
215 }
216 return __do_int_store(dst_addr, size, src_val, asi);
217}
218
219static inline void advance(struct pt_regs *regs)
220{
221 regs->tpc = regs->tnpc;
222 regs->tnpc += 4;
223 if (test_thread_flag(TIF_32BIT)) {
224 regs->tpc &= 0xffffffff;
225 regs->tnpc &= 0xffffffff;
226 }
227}
228
229static inline int floating_point_load_or_store_p(unsigned int insn)
230{
231 return (insn >> 24) & 1;
232}
233
234static inline int ok_for_kernel(unsigned int insn)
235{
236 return !floating_point_load_or_store_p(insn);
237}
238
239static void kernel_mna_trap_fault(int fixup_tstate_asi)
240{
241 struct pt_regs *regs = current_thread_info()->kern_una_regs;
242 unsigned int insn = current_thread_info()->kern_una_insn;
243 const struct exception_table_entry *entry;
244
245 entry = search_exception_tables(regs->tpc);
246 if (!entry) {
247 unsigned long address;
248
249 address = compute_effective_address(regs, insn,
250 ((insn >> 25) & 0x1f));
251 if (address < PAGE_SIZE) {
252 printk(KERN_ALERT "Unable to handle kernel NULL "
253 "pointer dereference in mna handler");
254 } else
255 printk(KERN_ALERT "Unable to handle kernel paging "
256 "request in mna handler");
257 printk(KERN_ALERT " at virtual address %016lx\n",address);
258 printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
259 (current->mm ? CTX_HWBITS(current->mm->context) :
260 CTX_HWBITS(current->active_mm->context)));
261 printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
262 (current->mm ? (unsigned long) current->mm->pgd :
263 (unsigned long) current->active_mm->pgd));
264 die_if_kernel("Oops", regs);
265 /* Not reached */
266 }
267 regs->tpc = entry->fixup;
268 regs->tnpc = regs->tpc + 4;
269
270 if (fixup_tstate_asi) {
271 regs->tstate &= ~TSTATE_ASI;
272 regs->tstate |= (ASI_AIUS << 24UL);
273 }
274}
275
276static void log_unaligned(struct pt_regs *regs)
277{
278 static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5);
279
280 if (__ratelimit(&ratelimit)) {
281 printk("Kernel unaligned access at TPC[%lx] %pS\n",
282 regs->tpc, (void *) regs->tpc);
283 }
284}
285
286asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
287{
288 enum direction dir = decode_direction(insn);
289 int size = decode_access_size(regs, insn);
290 int orig_asi, asi;
291
292 current_thread_info()->kern_una_regs = regs;
293 current_thread_info()->kern_una_insn = insn;
294
295 orig_asi = asi = decode_asi(insn, regs);
296
297 /* If this is a {get,put}_user() on an unaligned userspace pointer,
298 * just signal a fault and do not log the event.
299 */
300 if (asi == ASI_AIUS) {
301 kernel_mna_trap_fault(0);
302 return;
303 }
304
305 log_unaligned(regs);
306
307 if (!ok_for_kernel(insn) || dir == both) {
308 printk("Unsupported unaligned load/store trap for kernel "
309 "at <%016lx>.\n", regs->tpc);
310 unaligned_panic("Kernel does fpu/atomic "
311 "unaligned load/store.", regs);
312
313 kernel_mna_trap_fault(0);
314 } else {
315 unsigned long addr, *reg_addr;
316 int err;
317
318 addr = compute_effective_address(regs, insn,
319 ((insn >> 25) & 0x1f));
320 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
321 switch (asi) {
322 case ASI_NL:
323 case ASI_AIUPL:
324 case ASI_AIUSL:
325 case ASI_PL:
326 case ASI_SL:
327 case ASI_PNFL:
328 case ASI_SNFL:
329 asi &= ~0x08;
330 break;
331 }
332 switch (dir) {
333 case load:
334 reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs);
335 err = do_int_load(reg_addr, size,
336 (unsigned long *) addr,
337 decode_signedness(insn), asi);
338 if (likely(!err) && unlikely(asi != orig_asi)) {
339 unsigned long val_in = *reg_addr;
340 switch (size) {
341 case 2:
342 val_in = swab16(val_in);
343 break;
344 case 4:
345 val_in = swab32(val_in);
346 break;
347 case 8:
348 val_in = swab64(val_in);
349 break;
350 case 16:
351 default:
352 BUG();
353 break;
354 }
355 *reg_addr = val_in;
356 }
357 break;
358
359 case store:
360 err = do_int_store(((insn>>25)&0x1f), size,
361 (unsigned long *) addr, regs,
362 asi, orig_asi);
363 break;
364
365 default:
366 panic("Impossible kernel unaligned trap.");
367 /* Not reached... */
368 }
369 if (unlikely(err))
370 kernel_mna_trap_fault(1);
371 else
372 advance(regs);
373 }
374}
375
376int handle_popc(u32 insn, struct pt_regs *regs)
377{
378 int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
379 int ret, rd = ((insn >> 25) & 0x1f);
380 u64 value;
381
382 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
383 if (insn & 0x2000) {
384 maybe_flush_windows(0, 0, rd, from_kernel);
385 value = sign_extend_imm13(insn);
386 } else {
387 maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
388 value = fetch_reg(insn & 0x1f, regs);
389 }
390 ret = hweight64(value);
391 if (rd < 16) {
392 if (rd)
393 regs->u_regs[rd] = ret;
394 } else {
395 if (test_thread_flag(TIF_32BIT)) {
396 struct reg_window32 __user *win32;
397 win32 = (struct reg_window32 __user *)((unsigned long)((u32)regs->u_regs[UREG_FP]));
398 put_user(ret, &win32->locals[rd - 16]);
399 } else {
400 struct reg_window __user *win;
401 win = (struct reg_window __user *)(regs->u_regs[UREG_FP] + STACK_BIAS);
402 put_user(ret, &win->locals[rd - 16]);
403 }
404 }
405 advance(regs);
406 return 1;
407}
408
409extern void do_fpother(struct pt_regs *regs);
410extern void do_privact(struct pt_regs *regs);
411extern void spitfire_data_access_exception(struct pt_regs *regs,
412 unsigned long sfsr,
413 unsigned long sfar);
414extern void sun4v_data_access_exception(struct pt_regs *regs,
415 unsigned long addr,
416 unsigned long type_ctx);
417
418int handle_ldf_stq(u32 insn, struct pt_regs *regs)
419{
420 unsigned long addr = compute_effective_address(regs, insn, 0);
421 int freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
422 struct fpustate *f = FPUSTATE;
423 int asi = decode_asi(insn, regs);
424 int flag = (freg < 32) ? FPRS_DL : FPRS_DU;
425
426 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
427
428 save_and_clear_fpu();
429 current_thread_info()->xfsr[0] &= ~0x1c000;
430 if (freg & 3) {
431 current_thread_info()->xfsr[0] |= (6 << 14) /* invalid_fp_register */;
432 do_fpother(regs);
433 return 0;
434 }
435 if (insn & 0x200000) {
436 /* STQ */
437 u64 first = 0, second = 0;
438
439 if (current_thread_info()->fpsaved[0] & flag) {
440 first = *(u64 *)&f->regs[freg];
441 second = *(u64 *)&f->regs[freg+2];
442 }
443 if (asi < 0x80) {
444 do_privact(regs);
445 return 1;
446 }
447 switch (asi) {
448 case ASI_P:
449 case ASI_S: break;
450 case ASI_PL:
451 case ASI_SL:
452 {
453 /* Need to convert endians */
454 u64 tmp = __swab64p(&first);
455
456 first = __swab64p(&second);
457 second = tmp;
458 break;
459 }
460 default:
461 if (tlb_type == hypervisor)
462 sun4v_data_access_exception(regs, addr, 0);
463 else
464 spitfire_data_access_exception(regs, 0, addr);
465 return 1;
466 }
467 if (put_user (first >> 32, (u32 __user *)addr) ||
468 __put_user ((u32)first, (u32 __user *)(addr + 4)) ||
469 __put_user (second >> 32, (u32 __user *)(addr + 8)) ||
470 __put_user ((u32)second, (u32 __user *)(addr + 12))) {
471 if (tlb_type == hypervisor)
472 sun4v_data_access_exception(regs, addr, 0);
473 else
474 spitfire_data_access_exception(regs, 0, addr);
475 return 1;
476 }
477 } else {
478 /* LDF, LDDF, LDQF */
479 u32 data[4] __attribute__ ((aligned(8)));
480 int size, i;
481 int err;
482
483 if (asi < 0x80) {
484 do_privact(regs);
485 return 1;
486 } else if (asi > ASI_SNFL) {
487 if (tlb_type == hypervisor)
488 sun4v_data_access_exception(regs, addr, 0);
489 else
490 spitfire_data_access_exception(regs, 0, addr);
491 return 1;
492 }
493 switch (insn & 0x180000) {
494 case 0x000000: size = 1; break;
495 case 0x100000: size = 4; break;
496 default: size = 2; break;
497 }
498 for (i = 0; i < size; i++)
499 data[i] = 0;
500
501 err = get_user (data[0], (u32 __user *) addr);
502 if (!err) {
503 for (i = 1; i < size; i++)
504 err |= __get_user (data[i], (u32 __user *)(addr + 4*i));
505 }
506 if (err && !(asi & 0x2 /* NF */)) {
507 if (tlb_type == hypervisor)
508 sun4v_data_access_exception(regs, addr, 0);
509 else
510 spitfire_data_access_exception(regs, 0, addr);
511 return 1;
512 }
513 if (asi & 0x8) /* Little */ {
514 u64 tmp;
515
516 switch (size) {
517 case 1: data[0] = le32_to_cpup(data + 0); break;
518 default:*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 0));
519 break;
520 case 4: tmp = le64_to_cpup((u64 *)(data + 0));
521 *(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 2));
522 *(u64 *)(data + 2) = tmp;
523 break;
524 }
525 }
526 if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
527 current_thread_info()->fpsaved[0] = FPRS_FEF;
528 current_thread_info()->gsr[0] = 0;
529 }
530 if (!(current_thread_info()->fpsaved[0] & flag)) {
531 if (freg < 32)
532 memset(f->regs, 0, 32*sizeof(u32));
533 else
534 memset(f->regs+32, 0, 32*sizeof(u32));
535 }
536 memcpy(f->regs + freg, data, size * 4);
537 current_thread_info()->fpsaved[0] |= flag;
538 }
539 advance(regs);
540 return 1;
541}
542
543void handle_ld_nf(u32 insn, struct pt_regs *regs)
544{
545 int rd = ((insn >> 25) & 0x1f);
546 int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
547 unsigned long *reg;
548
549 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
550
551 maybe_flush_windows(0, 0, rd, from_kernel);
552 reg = fetch_reg_addr(rd, regs);
553 if (from_kernel || rd < 16) {
554 reg[0] = 0;
555 if ((insn & 0x780000) == 0x180000)
556 reg[1] = 0;
557 } else if (test_thread_flag(TIF_32BIT)) {
558 put_user(0, (int __user *) reg);
559 if ((insn & 0x780000) == 0x180000)
560 put_user(0, ((int __user *) reg) + 1);
561 } else {
562 put_user(0, (unsigned long __user *) reg);
563 if ((insn & 0x780000) == 0x180000)
564 put_user(0, (unsigned long __user *) reg + 1);
565 }
566 advance(regs);
567}
568
569void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
570{
571 unsigned long pc = regs->tpc;
572 unsigned long tstate = regs->tstate;
573 u32 insn;
574 u64 value;
575 u8 freg;
576 int flag;
577 struct fpustate *f = FPUSTATE;
578
579 if (tstate & TSTATE_PRIV)
580 die_if_kernel("lddfmna from kernel", regs);
581 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, sfar);
582 if (test_thread_flag(TIF_32BIT))
583 pc = (u32)pc;
584 if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
585 int asi = decode_asi(insn, regs);
586 u32 first, second;
587 int err;
588
589 if ((asi > ASI_SNFL) ||
590 (asi < ASI_P))
591 goto daex;
592 first = second = 0;
593 err = get_user(first, (u32 __user *)sfar);
594 if (!err)
595 err = get_user(second, (u32 __user *)(sfar + 4));
596 if (err) {
597 if (!(asi & 0x2))
598 goto daex;
599 first = second = 0;
600 }
601 save_and_clear_fpu();
602 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
603 value = (((u64)first) << 32) | second;
604 if (asi & 0x8) /* Little */
605 value = __swab64p(&value);
606 flag = (freg < 32) ? FPRS_DL : FPRS_DU;
607 if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
608 current_thread_info()->fpsaved[0] = FPRS_FEF;
609 current_thread_info()->gsr[0] = 0;
610 }
611 if (!(current_thread_info()->fpsaved[0] & flag)) {
612 if (freg < 32)
613 memset(f->regs, 0, 32*sizeof(u32));
614 else
615 memset(f->regs+32, 0, 32*sizeof(u32));
616 }
617 *(u64 *)(f->regs + freg) = value;
618 current_thread_info()->fpsaved[0] |= flag;
619 } else {
620daex:
621 if (tlb_type == hypervisor)
622 sun4v_data_access_exception(regs, sfar, sfsr);
623 else
624 spitfire_data_access_exception(regs, sfsr, sfar);
625 return;
626 }
627 advance(regs);
628}
629
630void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
631{
632 unsigned long pc = regs->tpc;
633 unsigned long tstate = regs->tstate;
634 u32 insn;
635 u64 value;
636 u8 freg;
637 int flag;
638 struct fpustate *f = FPUSTATE;
639
640 if (tstate & TSTATE_PRIV)
641 die_if_kernel("stdfmna from kernel", regs);
642 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, sfar);
643 if (test_thread_flag(TIF_32BIT))
644 pc = (u32)pc;
645 if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
646 int asi = decode_asi(insn, regs);
647 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
648 value = 0;
649 flag = (freg < 32) ? FPRS_DL : FPRS_DU;
650 if ((asi > ASI_SNFL) ||
651 (asi < ASI_P))
652 goto daex;
653 save_and_clear_fpu();
654 if (current_thread_info()->fpsaved[0] & flag)
655 value = *(u64 *)&f->regs[freg];
656 switch (asi) {
657 case ASI_P:
658 case ASI_S: break;
659 case ASI_PL:
660 case ASI_SL:
661 value = __swab64p(&value); break;
662 default: goto daex;
663 }
664 if (put_user (value >> 32, (u32 __user *) sfar) ||
665 __put_user ((u32)value, (u32 __user *)(sfar + 4)))
666 goto daex;
667 } else {
668daex:
669 if (tlb_type == hypervisor)
670 sun4v_data_access_exception(regs, sfar, sfsr);
671 else
672 spitfire_data_access_exception(regs, sfsr, sfar);
673 return;
674 }
675 advance(regs);
676}
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * unaligned.c: Unaligned load/store trap handling with special
4 * cases for the kernel to do them more quickly.
5 *
6 * Copyright (C) 1996,2008 David S. Miller (davem@davemloft.net)
7 * Copyright (C) 1996,1997 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
8 */
9
10
11#include <linux/jiffies.h>
12#include <linux/kernel.h>
13#include <linux/sched.h>
14#include <linux/mm.h>
15#include <linux/extable.h>
16#include <asm/asi.h>
17#include <asm/ptrace.h>
18#include <asm/pstate.h>
19#include <asm/processor.h>
20#include <linux/uaccess.h>
21#include <linux/smp.h>
22#include <linux/bitops.h>
23#include <linux/perf_event.h>
24#include <linux/ratelimit.h>
25#include <linux/context_tracking.h>
26#include <asm/fpumacro.h>
27#include <asm/cacheflush.h>
28#include <asm/setup.h>
29
30#include "entry.h"
31#include "kernel.h"
32
33enum direction {
34 load, /* ld, ldd, ldh, ldsh */
35 store, /* st, std, sth, stsh */
36 both, /* Swap, ldstub, cas, ... */
37 fpld,
38 fpst,
39 invalid,
40};
41
42static inline enum direction decode_direction(unsigned int insn)
43{
44 unsigned long tmp = (insn >> 21) & 1;
45
46 if (!tmp)
47 return load;
48 else {
49 switch ((insn>>19)&0xf) {
50 case 15: /* swap* */
51 return both;
52 default:
53 return store;
54 }
55 }
56}
57
58/* 16 = double-word, 8 = extra-word, 4 = word, 2 = half-word */
59static inline int decode_access_size(struct pt_regs *regs, unsigned int insn)
60{
61 unsigned int tmp;
62
63 tmp = ((insn >> 19) & 0xf);
64 if (tmp == 11 || tmp == 14) /* ldx/stx */
65 return 8;
66 tmp &= 3;
67 if (!tmp)
68 return 4;
69 else if (tmp == 3)
70 return 16; /* ldd/std - Although it is actually 8 */
71 else if (tmp == 2)
72 return 2;
73 else {
74 printk("Impossible unaligned trap. insn=%08x\n", insn);
75 die_if_kernel("Byte sized unaligned access?!?!", regs);
76
77 /* GCC should never warn that control reaches the end
78 * of this function without returning a value because
79 * die_if_kernel() is marked with attribute 'noreturn'.
80 * Alas, some versions do...
81 */
82
83 return 0;
84 }
85}
86
87static inline int decode_asi(unsigned int insn, struct pt_regs *regs)
88{
89 if (insn & 0x800000) {
90 if (insn & 0x2000)
91 return (unsigned char)(regs->tstate >> 24); /* %asi */
92 else
93 return (unsigned char)(insn >> 5); /* imm_asi */
94 } else
95 return ASI_P;
96}
97
98/* 0x400000 = signed, 0 = unsigned */
99static inline int decode_signedness(unsigned int insn)
100{
101 return (insn & 0x400000);
102}
103
104static inline void maybe_flush_windows(unsigned int rs1, unsigned int rs2,
105 unsigned int rd, int from_kernel)
106{
107 if (rs2 >= 16 || rs1 >= 16 || rd >= 16) {
108 if (from_kernel != 0)
109 __asm__ __volatile__("flushw");
110 else
111 flushw_user();
112 }
113}
114
115static inline long sign_extend_imm13(long imm)
116{
117 return imm << 51 >> 51;
118}
119
120static unsigned long fetch_reg(unsigned int reg, struct pt_regs *regs)
121{
122 unsigned long value, fp;
123
124 if (reg < 16)
125 return (!reg ? 0 : regs->u_regs[reg]);
126
127 fp = regs->u_regs[UREG_FP];
128
129 if (regs->tstate & TSTATE_PRIV) {
130 struct reg_window *win;
131 win = (struct reg_window *)(fp + STACK_BIAS);
132 value = win->locals[reg - 16];
133 } else if (!test_thread_64bit_stack(fp)) {
134 struct reg_window32 __user *win32;
135 win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
136 get_user(value, &win32->locals[reg - 16]);
137 } else {
138 struct reg_window __user *win;
139 win = (struct reg_window __user *)(fp + STACK_BIAS);
140 get_user(value, &win->locals[reg - 16]);
141 }
142 return value;
143}
144
145static unsigned long *fetch_reg_addr(unsigned int reg, struct pt_regs *regs)
146{
147 unsigned long fp;
148
149 if (reg < 16)
150 return ®s->u_regs[reg];
151
152 fp = regs->u_regs[UREG_FP];
153
154 if (regs->tstate & TSTATE_PRIV) {
155 struct reg_window *win;
156 win = (struct reg_window *)(fp + STACK_BIAS);
157 return &win->locals[reg - 16];
158 } else if (!test_thread_64bit_stack(fp)) {
159 struct reg_window32 *win32;
160 win32 = (struct reg_window32 *)((unsigned long)((u32)fp));
161 return (unsigned long *)&win32->locals[reg - 16];
162 } else {
163 struct reg_window *win;
164 win = (struct reg_window *)(fp + STACK_BIAS);
165 return &win->locals[reg - 16];
166 }
167}
168
169unsigned long compute_effective_address(struct pt_regs *regs,
170 unsigned int insn, unsigned int rd)
171{
172 int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
173 unsigned int rs1 = (insn >> 14) & 0x1f;
174 unsigned int rs2 = insn & 0x1f;
175 unsigned long addr;
176
177 if (insn & 0x2000) {
178 maybe_flush_windows(rs1, 0, rd, from_kernel);
179 addr = (fetch_reg(rs1, regs) + sign_extend_imm13(insn));
180 } else {
181 maybe_flush_windows(rs1, rs2, rd, from_kernel);
182 addr = (fetch_reg(rs1, regs) + fetch_reg(rs2, regs));
183 }
184
185 if (!from_kernel && test_thread_flag(TIF_32BIT))
186 addr &= 0xffffffff;
187
188 return addr;
189}
190
191/* This is just to make gcc think die_if_kernel does return... */
192static void __used unaligned_panic(char *str, struct pt_regs *regs)
193{
194 die_if_kernel(str, regs);
195}
196
197extern int do_int_load(unsigned long *dest_reg, int size,
198 unsigned long *saddr, int is_signed, int asi);
199
200extern int __do_int_store(unsigned long *dst_addr, int size,
201 unsigned long src_val, int asi);
202
203static inline int do_int_store(int reg_num, int size, unsigned long *dst_addr,
204 struct pt_regs *regs, int asi, int orig_asi)
205{
206 unsigned long zero = 0;
207 unsigned long *src_val_p = &zero;
208 unsigned long src_val;
209
210 if (size == 16) {
211 size = 8;
212 zero = (((long)(reg_num ?
213 (unsigned int)fetch_reg(reg_num, regs) : 0)) << 32) |
214 (unsigned int)fetch_reg(reg_num + 1, regs);
215 } else if (reg_num) {
216 src_val_p = fetch_reg_addr(reg_num, regs);
217 }
218 src_val = *src_val_p;
219 if (unlikely(asi != orig_asi)) {
220 switch (size) {
221 case 2:
222 src_val = swab16(src_val);
223 break;
224 case 4:
225 src_val = swab32(src_val);
226 break;
227 case 8:
228 src_val = swab64(src_val);
229 break;
230 case 16:
231 default:
232 BUG();
233 break;
234 }
235 }
236 return __do_int_store(dst_addr, size, src_val, asi);
237}
238
239static inline void advance(struct pt_regs *regs)
240{
241 regs->tpc = regs->tnpc;
242 regs->tnpc += 4;
243 if (test_thread_flag(TIF_32BIT)) {
244 regs->tpc &= 0xffffffff;
245 regs->tnpc &= 0xffffffff;
246 }
247}
248
249static inline int floating_point_load_or_store_p(unsigned int insn)
250{
251 return (insn >> 24) & 1;
252}
253
254static inline int ok_for_kernel(unsigned int insn)
255{
256 return !floating_point_load_or_store_p(insn);
257}
258
259static void kernel_mna_trap_fault(int fixup_tstate_asi)
260{
261 struct pt_regs *regs = current_thread_info()->kern_una_regs;
262 unsigned int insn = current_thread_info()->kern_una_insn;
263 const struct exception_table_entry *entry;
264
265 entry = search_exception_tables(regs->tpc);
266 if (!entry) {
267 unsigned long address;
268
269 address = compute_effective_address(regs, insn,
270 ((insn >> 25) & 0x1f));
271 if (address < PAGE_SIZE) {
272 printk(KERN_ALERT "Unable to handle kernel NULL "
273 "pointer dereference in mna handler");
274 } else
275 printk(KERN_ALERT "Unable to handle kernel paging "
276 "request in mna handler");
277 printk(KERN_ALERT " at virtual address %016lx\n",address);
278 printk(KERN_ALERT "current->{active_,}mm->context = %016lx\n",
279 (current->mm ? CTX_HWBITS(current->mm->context) :
280 CTX_HWBITS(current->active_mm->context)));
281 printk(KERN_ALERT "current->{active_,}mm->pgd = %016lx\n",
282 (current->mm ? (unsigned long) current->mm->pgd :
283 (unsigned long) current->active_mm->pgd));
284 die_if_kernel("Oops", regs);
285 /* Not reached */
286 }
287 regs->tpc = entry->fixup;
288 regs->tnpc = regs->tpc + 4;
289
290 if (fixup_tstate_asi) {
291 regs->tstate &= ~TSTATE_ASI;
292 regs->tstate |= (ASI_AIUS << 24UL);
293 }
294}
295
296static void log_unaligned(struct pt_regs *regs)
297{
298 static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 5);
299
300 if (__ratelimit(&ratelimit)) {
301 printk("Kernel unaligned access at TPC[%lx] %pS\n",
302 regs->tpc, (void *) regs->tpc);
303 }
304}
305
306asmlinkage void kernel_unaligned_trap(struct pt_regs *regs, unsigned int insn)
307{
308 enum direction dir = decode_direction(insn);
309 int size = decode_access_size(regs, insn);
310 int orig_asi, asi;
311
312 current_thread_info()->kern_una_regs = regs;
313 current_thread_info()->kern_una_insn = insn;
314
315 orig_asi = asi = decode_asi(insn, regs);
316
317 /* If this is a {get,put}_user() on an unaligned userspace pointer,
318 * just signal a fault and do not log the event.
319 */
320 if (asi == ASI_AIUS) {
321 kernel_mna_trap_fault(0);
322 return;
323 }
324
325 log_unaligned(regs);
326
327 if (!ok_for_kernel(insn) || dir == both) {
328 printk("Unsupported unaligned load/store trap for kernel "
329 "at <%016lx>.\n", regs->tpc);
330 unaligned_panic("Kernel does fpu/atomic "
331 "unaligned load/store.", regs);
332
333 kernel_mna_trap_fault(0);
334 } else {
335 unsigned long addr, *reg_addr;
336 int err;
337
338 addr = compute_effective_address(regs, insn,
339 ((insn >> 25) & 0x1f));
340 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, addr);
341 switch (asi) {
342 case ASI_NL:
343 case ASI_AIUPL:
344 case ASI_AIUSL:
345 case ASI_PL:
346 case ASI_SL:
347 case ASI_PNFL:
348 case ASI_SNFL:
349 asi &= ~0x08;
350 break;
351 }
352 switch (dir) {
353 case load:
354 reg_addr = fetch_reg_addr(((insn>>25)&0x1f), regs);
355 err = do_int_load(reg_addr, size,
356 (unsigned long *) addr,
357 decode_signedness(insn), asi);
358 if (likely(!err) && unlikely(asi != orig_asi)) {
359 unsigned long val_in = *reg_addr;
360 switch (size) {
361 case 2:
362 val_in = swab16(val_in);
363 break;
364 case 4:
365 val_in = swab32(val_in);
366 break;
367 case 8:
368 val_in = swab64(val_in);
369 break;
370 case 16:
371 default:
372 BUG();
373 break;
374 }
375 *reg_addr = val_in;
376 }
377 break;
378
379 case store:
380 err = do_int_store(((insn>>25)&0x1f), size,
381 (unsigned long *) addr, regs,
382 asi, orig_asi);
383 break;
384
385 default:
386 panic("Impossible kernel unaligned trap.");
387 /* Not reached... */
388 }
389 if (unlikely(err))
390 kernel_mna_trap_fault(1);
391 else
392 advance(regs);
393 }
394}
395
396int handle_popc(u32 insn, struct pt_regs *regs)
397{
398 int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
399 int ret, rd = ((insn >> 25) & 0x1f);
400 u64 value;
401
402 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
403 if (insn & 0x2000) {
404 maybe_flush_windows(0, 0, rd, from_kernel);
405 value = sign_extend_imm13(insn);
406 } else {
407 maybe_flush_windows(0, insn & 0x1f, rd, from_kernel);
408 value = fetch_reg(insn & 0x1f, regs);
409 }
410 ret = hweight64(value);
411 if (rd < 16) {
412 if (rd)
413 regs->u_regs[rd] = ret;
414 } else {
415 unsigned long fp = regs->u_regs[UREG_FP];
416
417 if (!test_thread_64bit_stack(fp)) {
418 struct reg_window32 __user *win32;
419 win32 = (struct reg_window32 __user *)((unsigned long)((u32)fp));
420 put_user(ret, &win32->locals[rd - 16]);
421 } else {
422 struct reg_window __user *win;
423 win = (struct reg_window __user *)(fp + STACK_BIAS);
424 put_user(ret, &win->locals[rd - 16]);
425 }
426 }
427 advance(regs);
428 return 1;
429}
430
431extern void do_fpother(struct pt_regs *regs);
432extern void do_privact(struct pt_regs *regs);
433extern void sun4v_data_access_exception(struct pt_regs *regs,
434 unsigned long addr,
435 unsigned long type_ctx);
436
437int handle_ldf_stq(u32 insn, struct pt_regs *regs)
438{
439 unsigned long addr = compute_effective_address(regs, insn, 0);
440 int freg;
441 struct fpustate *f = FPUSTATE;
442 int asi = decode_asi(insn, regs);
443 int flag;
444
445 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
446
447 save_and_clear_fpu();
448 current_thread_info()->xfsr[0] &= ~0x1c000;
449 if (insn & 0x200000) {
450 /* STQ */
451 u64 first = 0, second = 0;
452
453 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
454 flag = (freg < 32) ? FPRS_DL : FPRS_DU;
455 if (freg & 3) {
456 current_thread_info()->xfsr[0] |= (6 << 14) /* invalid_fp_register */;
457 do_fpother(regs);
458 return 0;
459 }
460 if (current_thread_info()->fpsaved[0] & flag) {
461 first = *(u64 *)&f->regs[freg];
462 second = *(u64 *)&f->regs[freg+2];
463 }
464 if (asi < 0x80) {
465 do_privact(regs);
466 return 1;
467 }
468 switch (asi) {
469 case ASI_P:
470 case ASI_S: break;
471 case ASI_PL:
472 case ASI_SL:
473 {
474 /* Need to convert endians */
475 u64 tmp = __swab64p(&first);
476
477 first = __swab64p(&second);
478 second = tmp;
479 break;
480 }
481 default:
482 if (tlb_type == hypervisor)
483 sun4v_data_access_exception(regs, addr, 0);
484 else
485 spitfire_data_access_exception(regs, 0, addr);
486 return 1;
487 }
488 if (put_user (first >> 32, (u32 __user *)addr) ||
489 __put_user ((u32)first, (u32 __user *)(addr + 4)) ||
490 __put_user (second >> 32, (u32 __user *)(addr + 8)) ||
491 __put_user ((u32)second, (u32 __user *)(addr + 12))) {
492 if (tlb_type == hypervisor)
493 sun4v_data_access_exception(regs, addr, 0);
494 else
495 spitfire_data_access_exception(regs, 0, addr);
496 return 1;
497 }
498 } else {
499 /* LDF, LDDF, LDQF */
500 u32 data[4] __attribute__ ((aligned(8)));
501 int size, i;
502 int err;
503
504 if (asi < 0x80) {
505 do_privact(regs);
506 return 1;
507 } else if (asi > ASI_SNFL) {
508 if (tlb_type == hypervisor)
509 sun4v_data_access_exception(regs, addr, 0);
510 else
511 spitfire_data_access_exception(regs, 0, addr);
512 return 1;
513 }
514 switch (insn & 0x180000) {
515 case 0x000000: size = 1; break;
516 case 0x100000: size = 4; break;
517 default: size = 2; break;
518 }
519 if (size == 1)
520 freg = (insn >> 25) & 0x1f;
521 else
522 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
523 flag = (freg < 32) ? FPRS_DL : FPRS_DU;
524
525 for (i = 0; i < size; i++)
526 data[i] = 0;
527
528 err = get_user (data[0], (u32 __user *) addr);
529 if (!err) {
530 for (i = 1; i < size; i++)
531 err |= __get_user (data[i], (u32 __user *)(addr + 4*i));
532 }
533 if (err && !(asi & 0x2 /* NF */)) {
534 if (tlb_type == hypervisor)
535 sun4v_data_access_exception(regs, addr, 0);
536 else
537 spitfire_data_access_exception(regs, 0, addr);
538 return 1;
539 }
540 if (asi & 0x8) /* Little */ {
541 u64 tmp;
542
543 switch (size) {
544 case 1: data[0] = le32_to_cpup(data + 0); break;
545 default:*(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 0));
546 break;
547 case 4: tmp = le64_to_cpup((u64 *)(data + 0));
548 *(u64 *)(data + 0) = le64_to_cpup((u64 *)(data + 2));
549 *(u64 *)(data + 2) = tmp;
550 break;
551 }
552 }
553 if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
554 current_thread_info()->fpsaved[0] = FPRS_FEF;
555 current_thread_info()->gsr[0] = 0;
556 }
557 if (!(current_thread_info()->fpsaved[0] & flag)) {
558 if (freg < 32)
559 memset(f->regs, 0, 32*sizeof(u32));
560 else
561 memset(f->regs+32, 0, 32*sizeof(u32));
562 }
563 memcpy(f->regs + freg, data, size * 4);
564 current_thread_info()->fpsaved[0] |= flag;
565 }
566 advance(regs);
567 return 1;
568}
569
570void handle_ld_nf(u32 insn, struct pt_regs *regs)
571{
572 int rd = ((insn >> 25) & 0x1f);
573 int from_kernel = (regs->tstate & TSTATE_PRIV) != 0;
574 unsigned long *reg;
575
576 perf_sw_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, regs, 0);
577
578 maybe_flush_windows(0, 0, rd, from_kernel);
579 reg = fetch_reg_addr(rd, regs);
580 if (from_kernel || rd < 16) {
581 reg[0] = 0;
582 if ((insn & 0x780000) == 0x180000)
583 reg[1] = 0;
584 } else if (!test_thread_64bit_stack(regs->u_regs[UREG_FP])) {
585 put_user(0, (int __user *) reg);
586 if ((insn & 0x780000) == 0x180000)
587 put_user(0, ((int __user *) reg) + 1);
588 } else {
589 put_user(0, (unsigned long __user *) reg);
590 if ((insn & 0x780000) == 0x180000)
591 put_user(0, (unsigned long __user *) reg + 1);
592 }
593 advance(regs);
594}
595
596void handle_lddfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
597{
598 enum ctx_state prev_state = exception_enter();
599 unsigned long pc = regs->tpc;
600 unsigned long tstate = regs->tstate;
601 u32 insn;
602 u64 value;
603 u8 freg;
604 int flag;
605 struct fpustate *f = FPUSTATE;
606
607 if (tstate & TSTATE_PRIV)
608 die_if_kernel("lddfmna from kernel", regs);
609 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, sfar);
610 if (test_thread_flag(TIF_32BIT))
611 pc = (u32)pc;
612 if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
613 int asi = decode_asi(insn, regs);
614 u32 first, second;
615 int err;
616
617 if ((asi > ASI_SNFL) ||
618 (asi < ASI_P))
619 goto daex;
620 first = second = 0;
621 err = get_user(first, (u32 __user *)sfar);
622 if (!err)
623 err = get_user(second, (u32 __user *)(sfar + 4));
624 if (err) {
625 if (!(asi & 0x2))
626 goto daex;
627 first = second = 0;
628 }
629 save_and_clear_fpu();
630 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
631 value = (((u64)first) << 32) | second;
632 if (asi & 0x8) /* Little */
633 value = __swab64p(&value);
634 flag = (freg < 32) ? FPRS_DL : FPRS_DU;
635 if (!(current_thread_info()->fpsaved[0] & FPRS_FEF)) {
636 current_thread_info()->fpsaved[0] = FPRS_FEF;
637 current_thread_info()->gsr[0] = 0;
638 }
639 if (!(current_thread_info()->fpsaved[0] & flag)) {
640 if (freg < 32)
641 memset(f->regs, 0, 32*sizeof(u32));
642 else
643 memset(f->regs+32, 0, 32*sizeof(u32));
644 }
645 *(u64 *)(f->regs + freg) = value;
646 current_thread_info()->fpsaved[0] |= flag;
647 } else {
648daex:
649 if (tlb_type == hypervisor)
650 sun4v_data_access_exception(regs, sfar, sfsr);
651 else
652 spitfire_data_access_exception(regs, sfsr, sfar);
653 goto out;
654 }
655 advance(regs);
656out:
657 exception_exit(prev_state);
658}
659
660void handle_stdfmna(struct pt_regs *regs, unsigned long sfar, unsigned long sfsr)
661{
662 enum ctx_state prev_state = exception_enter();
663 unsigned long pc = regs->tpc;
664 unsigned long tstate = regs->tstate;
665 u32 insn;
666 u64 value;
667 u8 freg;
668 int flag;
669 struct fpustate *f = FPUSTATE;
670
671 if (tstate & TSTATE_PRIV)
672 die_if_kernel("stdfmna from kernel", regs);
673 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, sfar);
674 if (test_thread_flag(TIF_32BIT))
675 pc = (u32)pc;
676 if (get_user(insn, (u32 __user *) pc) != -EFAULT) {
677 int asi = decode_asi(insn, regs);
678 freg = ((insn >> 25) & 0x1e) | ((insn >> 20) & 0x20);
679 value = 0;
680 flag = (freg < 32) ? FPRS_DL : FPRS_DU;
681 if ((asi > ASI_SNFL) ||
682 (asi < ASI_P))
683 goto daex;
684 save_and_clear_fpu();
685 if (current_thread_info()->fpsaved[0] & flag)
686 value = *(u64 *)&f->regs[freg];
687 switch (asi) {
688 case ASI_P:
689 case ASI_S: break;
690 case ASI_PL:
691 case ASI_SL:
692 value = __swab64p(&value); break;
693 default: goto daex;
694 }
695 if (put_user (value >> 32, (u32 __user *) sfar) ||
696 __put_user ((u32)value, (u32 __user *)(sfar + 4)))
697 goto daex;
698 } else {
699daex:
700 if (tlb_type == hypervisor)
701 sun4v_data_access_exception(regs, sfar, sfsr);
702 else
703 spitfire_data_access_exception(regs, sfsr, sfar);
704 goto out;
705 }
706 advance(regs);
707out:
708 exception_exit(prev_state);
709}