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v3.5.6
 
  1/*
  2 * OMAP3/OMAP4 smartreflex device file
  3 *
  4 * Author: Thara Gopinath	<thara@ti.com>
  5 *
  6 * Based originally on code from smartreflex.c
  7 * Copyright (C) 2010 Texas Instruments, Inc.
  8 * Thara Gopinath <thara@ti.com>
  9 *
 10 * Copyright (C) 2008 Nokia Corporation
 11 * Kalle Jokiniemi
 12 *
 13 * Copyright (C) 2007 Texas Instruments, Inc.
 14 * Lesly A M <x0080970@ti.com>
 15 *
 16 * This program is free software; you can redistribute it and/or modify
 17 * it under the terms of the GNU General Public License version 2 as
 18 * published by the Free Software Foundation.
 19 */
 
 20
 21#include <linux/err.h>
 22#include <linux/slab.h>
 23#include <linux/io.h>
 24
 25#include <plat/omap_device.h>
 26
 27#include "smartreflex.h"
 28#include "voltage.h"
 29#include "control.h"
 30#include "pm.h"
 31
 32static bool sr_enable_on_init;
 33
 34/* Read EFUSE values from control registers for OMAP3430 */
 35static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
 36				struct omap_sr_data *sr_data)
 37{
 38	struct omap_sr_nvalue_table *nvalue_table;
 39	int i, count = 0;
 
 
 
 40
 41	while (volt_data[count].volt_nominal)
 42		count++;
 43
 44	nvalue_table = kzalloc(sizeof(struct omap_sr_nvalue_table)*count,
 45			GFP_KERNEL);
 
 46
 47	for (i = 0; i < count; i++) {
 48		u32 v;
 
 49		/*
 50		 * In OMAP4 the efuse registers are 24 bit aligned.
 51		 * A __raw_readl will fail for non-32 bit aligned address
 52		 * and hence the 8-bit read and shift.
 53		 */
 54		if (cpu_is_omap44xx()) {
 55			u16 offset = volt_data[i].sr_efuse_offs;
 56
 57			v = omap_ctrl_readb(offset) |
 58				omap_ctrl_readb(offset + 1) << 8 |
 59				omap_ctrl_readb(offset + 2) << 16;
 60		} else {
 61			 v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
 62		}
 63
 64		nvalue_table[i].efuse_offs = volt_data[i].sr_efuse_offs;
 65		nvalue_table[i].nvalue = v;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 66	}
 67
 68	sr_data->nvalue_table = nvalue_table;
 69	sr_data->nvalue_count = count;
 70}
 71
 72static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
 
 
 73{
 74	struct omap_sr_data *sr_data;
 75	struct platform_device *pdev;
 76	struct omap_volt_data *volt_data;
 77	struct omap_smartreflex_dev_attr *sr_dev_attr;
 78	char *name = "smartreflex";
 79	static int i;
 80
 81	sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
 82	if (!sr_data) {
 83		pr_err("%s: Unable to allocate memory for %s sr_data.Error!\n",
 84			__func__, oh->name);
 85		return -ENOMEM;
 86	}
 
 87
 88	sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
 89	if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
 90		pr_err("%s: No voltage domain specified for %s."
 91				"Cannot initialize\n", __func__,
 92					oh->name);
 93		goto exit;
 94	}
 95
 96	sr_data->ip_type = oh->class->rev;
 
 
 
 
 97	sr_data->senn_mod = 0x1;
 98	sr_data->senp_mod = 0x1;
 99
100	sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
101	if (IS_ERR(sr_data->voltdm)) {
 
 
 
 
 
 
 
 
 
 
 
 
 
102		pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
103			__func__, sr_dev_attr->sensor_voltdm_name);
104		goto exit;
105	}
106
107	omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
108	if (!volt_data) {
109		pr_warning("%s: No Voltage table registerd fo VDD%d."
110			"Something really wrong\n\n", __func__, i + 1);
111		goto exit;
112	}
113
114	sr_set_nvalues(volt_data, sr_data);
115
116	sr_data->enable_on_init = sr_enable_on_init;
117
118	pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
119				 NULL, 0, 0);
120	if (IS_ERR(pdev))
121		pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
122			__func__, name, oh->name);
123exit:
124	i++;
125	kfree(sr_data);
126	return 0;
127}
128
129/*
130 * API to be called from board files to enable smartreflex
131 * autocompensation at init.
132 */
133void __init omap_enable_smartreflex_on_init(void)
 
 
 
 
 
 
 
 
 
 
 
134{
135	sr_enable_on_init = true;
136}
 
 
 
 
 
 
 
 
 
 
 
 
137
138int __init omap_devinit_smartreflex(void)
139{
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
140	return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);
141}
v6.13.7
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * OMAP3/OMAP4 smartreflex device file
  4 *
  5 * Author: Thara Gopinath	<thara@ti.com>
  6 *
  7 * Based originally on code from smartreflex.c
  8 * Copyright (C) 2010 Texas Instruments, Inc.
  9 * Thara Gopinath <thara@ti.com>
 10 *
 11 * Copyright (C) 2008 Nokia Corporation
 12 * Kalle Jokiniemi
 13 *
 14 * Copyright (C) 2007 Texas Instruments, Inc.
 15 * Lesly A M <x0080970@ti.com>
 
 
 
 
 16 */
 17#include <linux/power/smartreflex.h>
 18
 19#include <linux/err.h>
 20#include <linux/slab.h>
 21#include <linux/io.h>
 22
 23#include "soc.h"
 24#include "omap_device.h"
 
 25#include "voltage.h"
 26#include "control.h"
 27#include "pm.h"
 28
 
 
 29/* Read EFUSE values from control registers for OMAP3430 */
 30static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
 31				struct omap_sr_data *sr_data)
 32{
 33	struct omap_sr_nvalue_table *nvalue_table;
 34	int i, j, count = 0;
 35
 36	sr_data->nvalue_count = 0;
 37	sr_data->nvalue_table = NULL;
 38
 39	while (volt_data[count].volt_nominal)
 40		count++;
 41
 42	nvalue_table = kcalloc(count, sizeof(*nvalue_table), GFP_KERNEL);
 43	if (!nvalue_table)
 44		return;
 45
 46	for (i = 0, j = 0; i < count; i++) {
 47		u32 v;
 48
 49		/*
 50		 * In OMAP4 the efuse registers are 24 bit aligned.
 51		 * A readl_relaxed will fail for non-32 bit aligned address
 52		 * and hence the 8-bit read and shift.
 53		 */
 54		if (cpu_is_omap44xx()) {
 55			u16 offset = volt_data[i].sr_efuse_offs;
 56
 57			v = omap_ctrl_readb(offset) |
 58				omap_ctrl_readb(offset + 1) << 8 |
 59				omap_ctrl_readb(offset + 2) << 16;
 60		} else {
 61			v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
 62		}
 63
 64		/*
 65		 * Many OMAP SoCs don't have the eFuse values set.
 66		 * For example, pretty much all OMAP3xxx before
 67		 * ES3.something.
 68		 *
 69		 * XXX There needs to be some way for board files or
 70		 * userspace to add these in.
 71		 */
 72		if (v == 0)
 73			continue;
 74
 75		nvalue_table[j].nvalue = v;
 76		nvalue_table[j].efuse_offs = volt_data[i].sr_efuse_offs;
 77		nvalue_table[j].errminlimit = volt_data[i].sr_errminlimit;
 78		nvalue_table[j].volt_nominal = volt_data[i].volt_nominal;
 79
 80		j++;
 81	}
 82
 83	sr_data->nvalue_table = nvalue_table;
 84	sr_data->nvalue_count = j;
 85}
 86
 87extern struct omap_sr_data omap_sr_pdata[];
 88
 89static int __init sr_init_by_name(const char *name, const char *voltdm)
 90{
 91	struct omap_sr_data *sr_data = NULL;
 
 92	struct omap_volt_data *volt_data;
 
 
 93	static int i;
 94
 95	if (!strncmp(name, "smartreflex_mpu_iva", 20) ||
 96	    !strncmp(name, "smartreflex_mpu", 16))
 97		sr_data = &omap_sr_pdata[OMAP_SR_MPU];
 98	else if (!strncmp(name, "smartreflex_core", 17))
 99		sr_data = &omap_sr_pdata[OMAP_SR_CORE];
100	else if (!strncmp(name, "smartreflex_iva", 16))
101		sr_data = &omap_sr_pdata[OMAP_SR_IVA];
102
103	if (!sr_data) {
104		pr_err("%s: Unknown instance %s\n", __func__, name);
105		return -EINVAL;
 
 
 
106	}
107
108	sr_data->name = name;
109	if (cpu_is_omap343x())
110		sr_data->ip_type = 1;
111	else
112		sr_data->ip_type = 2;
113	sr_data->senn_mod = 0x1;
114	sr_data->senp_mod = 0x1;
115
116	if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
117		sr_data->err_weight = OMAP3430_SR_ERRWEIGHT;
118		sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
119		sr_data->accum_data = OMAP3430_SR_ACCUMDATA;
120		if (!(strcmp(sr_data->name, "smartreflex_mpu"))) {
121			sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
122			sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
123		} else {
124			sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
125			sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
126		}
127	}
128
129	sr_data->voltdm = voltdm_lookup(voltdm);
130	if (!sr_data->voltdm) {
131		pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
132			__func__, voltdm);
133		goto exit;
134	}
135
136	omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
137	if (!volt_data) {
138		pr_err("%s: No Voltage table registered for VDD%d\n",
139		       __func__, i + 1);
140		goto exit;
141	}
142
143	sr_set_nvalues(volt_data, sr_data);
144
 
 
 
 
 
 
 
145exit:
146	i++;
147
148	return 0;
149}
150
151#ifdef CONFIG_OMAP_HWMOD
152static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
153{
154	struct omap_smartreflex_dev_attr *sr_dev_attr;
155
156	sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
157	if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
158		pr_err("%s: No voltage domain specified for %s. Cannot initialize\n",
159		       __func__, oh->name);
160		return 0;
161	}
162
163	return sr_init_by_name(oh->name, sr_dev_attr->sensor_voltdm_name);
164}
165#else
166static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
167{
168	return -EINVAL;
169}
170#endif
171
172static const char * const omap4_sr_instances[] = {
173	"mpu",
174	"iva",
175	"core",
176};
177
178static const char * const dra7_sr_instances[] = {
179	"mpu",
180	"core",
181};
182
183int __init omap_devinit_smartreflex(void)
184{
185	const char * const *sr_inst = NULL;
186	int i, nr_sr = 0;
187
188	if (soc_is_omap44xx()) {
189		sr_inst = omap4_sr_instances;
190		nr_sr = ARRAY_SIZE(omap4_sr_instances);
191
192	} else if (soc_is_dra7xx()) {
193		sr_inst = dra7_sr_instances;
194		nr_sr = ARRAY_SIZE(dra7_sr_instances);
195	}
196
197	if (nr_sr) {
198		const char *name, *voltdm;
199
200		for (i = 0; i < nr_sr; i++) {
201			name = kasprintf(GFP_KERNEL, "smartreflex_%s", sr_inst[i]);
202			voltdm = sr_inst[i];
203			sr_init_by_name(name, voltdm);
204		}
205
206		return 0;
207	}
208
209	return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);
210}