Linux Audio

Check our new training course

Linux kernel drivers training

Mar 31-Apr 9, 2025, special US time zones
Register
Loading...
v3.5.6
  1/*
  2 * OMAP3/OMAP4 smartreflex device file
  3 *
  4 * Author: Thara Gopinath	<thara@ti.com>
  5 *
  6 * Based originally on code from smartreflex.c
  7 * Copyright (C) 2010 Texas Instruments, Inc.
  8 * Thara Gopinath <thara@ti.com>
  9 *
 10 * Copyright (C) 2008 Nokia Corporation
 11 * Kalle Jokiniemi
 12 *
 13 * Copyright (C) 2007 Texas Instruments, Inc.
 14 * Lesly A M <x0080970@ti.com>
 15 *
 16 * This program is free software; you can redistribute it and/or modify
 17 * it under the terms of the GNU General Public License version 2 as
 18 * published by the Free Software Foundation.
 19 */
 
 20
 21#include <linux/err.h>
 22#include <linux/slab.h>
 23#include <linux/io.h>
 24
 25#include <plat/omap_device.h>
 26
 27#include "smartreflex.h"
 28#include "voltage.h"
 29#include "control.h"
 30#include "pm.h"
 31
 32static bool sr_enable_on_init;
 33
 34/* Read EFUSE values from control registers for OMAP3430 */
 35static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
 36				struct omap_sr_data *sr_data)
 37{
 38	struct omap_sr_nvalue_table *nvalue_table;
 39	int i, count = 0;
 
 
 
 40
 41	while (volt_data[count].volt_nominal)
 42		count++;
 43
 44	nvalue_table = kzalloc(sizeof(struct omap_sr_nvalue_table)*count,
 45			GFP_KERNEL);
 
 46
 47	for (i = 0; i < count; i++) {
 48		u32 v;
 
 49		/*
 50		 * In OMAP4 the efuse registers are 24 bit aligned.
 51		 * A __raw_readl will fail for non-32 bit aligned address
 52		 * and hence the 8-bit read and shift.
 53		 */
 54		if (cpu_is_omap44xx()) {
 55			u16 offset = volt_data[i].sr_efuse_offs;
 56
 57			v = omap_ctrl_readb(offset) |
 58				omap_ctrl_readb(offset + 1) << 8 |
 59				omap_ctrl_readb(offset + 2) << 16;
 60		} else {
 61			 v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
 62		}
 63
 64		nvalue_table[i].efuse_offs = volt_data[i].sr_efuse_offs;
 65		nvalue_table[i].nvalue = v;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 66	}
 67
 68	sr_data->nvalue_table = nvalue_table;
 69	sr_data->nvalue_count = count;
 70}
 71
 
 
 72static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
 73{
 74	struct omap_sr_data *sr_data;
 75	struct platform_device *pdev;
 76	struct omap_volt_data *volt_data;
 77	struct omap_smartreflex_dev_attr *sr_dev_attr;
 78	char *name = "smartreflex";
 79	static int i;
 80
 81	sr_data = kzalloc(sizeof(struct omap_sr_data), GFP_KERNEL);
 
 
 
 
 
 
 
 82	if (!sr_data) {
 83		pr_err("%s: Unable to allocate memory for %s sr_data.Error!\n",
 84			__func__, oh->name);
 85		return -ENOMEM;
 86	}
 87
 88	sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
 89	if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
 90		pr_err("%s: No voltage domain specified for %s."
 91				"Cannot initialize\n", __func__,
 92					oh->name);
 93		goto exit;
 94	}
 95
 
 96	sr_data->ip_type = oh->class->rev;
 97	sr_data->senn_mod = 0x1;
 98	sr_data->senp_mod = 0x1;
 99
 
 
 
 
 
 
 
 
 
 
 
 
 
100	sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
101	if (IS_ERR(sr_data->voltdm)) {
102		pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
103			__func__, sr_dev_attr->sensor_voltdm_name);
104		goto exit;
105	}
106
107	omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
108	if (!volt_data) {
109		pr_warning("%s: No Voltage table registerd fo VDD%d."
110			"Something really wrong\n\n", __func__, i + 1);
111		goto exit;
112	}
113
114	sr_set_nvalues(volt_data, sr_data);
115
116	sr_data->enable_on_init = sr_enable_on_init;
117
118	pdev = omap_device_build(name, i, oh, sr_data, sizeof(*sr_data),
119				 NULL, 0, 0);
120	if (IS_ERR(pdev))
121		pr_warning("%s: Could not build omap_device for %s: %s.\n\n",
122			__func__, name, oh->name);
123exit:
124	i++;
125	kfree(sr_data);
126	return 0;
127}
128
129/*
130 * API to be called from board files to enable smartreflex
131 * autocompensation at init.
132 */
133void __init omap_enable_smartreflex_on_init(void)
134{
135	sr_enable_on_init = true;
136}
137
138int __init omap_devinit_smartreflex(void)
139{
140	return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);
141}
v4.17
  1/*
  2 * OMAP3/OMAP4 smartreflex device file
  3 *
  4 * Author: Thara Gopinath	<thara@ti.com>
  5 *
  6 * Based originally on code from smartreflex.c
  7 * Copyright (C) 2010 Texas Instruments, Inc.
  8 * Thara Gopinath <thara@ti.com>
  9 *
 10 * Copyright (C) 2008 Nokia Corporation
 11 * Kalle Jokiniemi
 12 *
 13 * Copyright (C) 2007 Texas Instruments, Inc.
 14 * Lesly A M <x0080970@ti.com>
 15 *
 16 * This program is free software; you can redistribute it and/or modify
 17 * it under the terms of the GNU General Public License version 2 as
 18 * published by the Free Software Foundation.
 19 */
 20#include <linux/power/smartreflex.h>
 21
 22#include <linux/err.h>
 23#include <linux/slab.h>
 24#include <linux/io.h>
 25
 26#include "soc.h"
 27#include "omap_device.h"
 
 28#include "voltage.h"
 29#include "control.h"
 30#include "pm.h"
 31
 32static bool sr_enable_on_init;
 33
 34/* Read EFUSE values from control registers for OMAP3430 */
 35static void __init sr_set_nvalues(struct omap_volt_data *volt_data,
 36				struct omap_sr_data *sr_data)
 37{
 38	struct omap_sr_nvalue_table *nvalue_table;
 39	int i, j, count = 0;
 40
 41	sr_data->nvalue_count = 0;
 42	sr_data->nvalue_table = NULL;
 43
 44	while (volt_data[count].volt_nominal)
 45		count++;
 46
 47	nvalue_table = kcalloc(count, sizeof(*nvalue_table), GFP_KERNEL);
 48	if (!nvalue_table)
 49		return;
 50
 51	for (i = 0, j = 0; i < count; i++) {
 52		u32 v;
 53
 54		/*
 55		 * In OMAP4 the efuse registers are 24 bit aligned.
 56		 * A readl_relaxed will fail for non-32 bit aligned address
 57		 * and hence the 8-bit read and shift.
 58		 */
 59		if (cpu_is_omap44xx()) {
 60			u16 offset = volt_data[i].sr_efuse_offs;
 61
 62			v = omap_ctrl_readb(offset) |
 63				omap_ctrl_readb(offset + 1) << 8 |
 64				omap_ctrl_readb(offset + 2) << 16;
 65		} else {
 66			v = omap_ctrl_readl(volt_data[i].sr_efuse_offs);
 67		}
 68
 69		/*
 70		 * Many OMAP SoCs don't have the eFuse values set.
 71		 * For example, pretty much all OMAP3xxx before
 72		 * ES3.something.
 73		 *
 74		 * XXX There needs to be some way for board files or
 75		 * userspace to add these in.
 76		 */
 77		if (v == 0)
 78			continue;
 79
 80		nvalue_table[j].nvalue = v;
 81		nvalue_table[j].efuse_offs = volt_data[i].sr_efuse_offs;
 82		nvalue_table[j].errminlimit = volt_data[i].sr_errminlimit;
 83		nvalue_table[j].volt_nominal = volt_data[i].volt_nominal;
 84
 85		j++;
 86	}
 87
 88	sr_data->nvalue_table = nvalue_table;
 89	sr_data->nvalue_count = j;
 90}
 91
 92extern struct omap_sr_data omap_sr_pdata[];
 93
 94static int __init sr_dev_init(struct omap_hwmod *oh, void *user)
 95{
 96	struct omap_sr_data *sr_data = NULL;
 
 97	struct omap_volt_data *volt_data;
 98	struct omap_smartreflex_dev_attr *sr_dev_attr;
 
 99	static int i;
100
101	if (!strncmp(oh->name, "smartreflex_mpu_iva", 20) ||
102	    !strncmp(oh->name, "smartreflex_mpu", 16))
103		sr_data = &omap_sr_pdata[OMAP_SR_MPU];
104	else if (!strncmp(oh->name, "smartreflex_core", 17))
105		sr_data = &omap_sr_pdata[OMAP_SR_CORE];
106	else if (!strncmp(oh->name, "smartreflex_iva", 16))
107		sr_data = &omap_sr_pdata[OMAP_SR_IVA];
108
109	if (!sr_data) {
110		pr_err("%s: Unknown instance %s\n", __func__, oh->name);
111		return -EINVAL;
 
112	}
113
114	sr_dev_attr = (struct omap_smartreflex_dev_attr *)oh->dev_attr;
115	if (!sr_dev_attr || !sr_dev_attr->sensor_voltdm_name) {
116		pr_err("%s: No voltage domain specified for %s. Cannot initialize\n",
117		       __func__, oh->name);
 
118		goto exit;
119	}
120
121	sr_data->name = oh->name;
122	sr_data->ip_type = oh->class->rev;
123	sr_data->senn_mod = 0x1;
124	sr_data->senp_mod = 0x1;
125
126	if (cpu_is_omap34xx() || cpu_is_omap44xx()) {
127		sr_data->err_weight = OMAP3430_SR_ERRWEIGHT;
128		sr_data->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT;
129		sr_data->accum_data = OMAP3430_SR_ACCUMDATA;
130		if (!(strcmp(sr_data->name, "smartreflex_mpu"))) {
131			sr_data->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT;
132			sr_data->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT;
133		} else {
134			sr_data->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT;
135			sr_data->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT;
136		}
137	}
138
139	sr_data->voltdm = voltdm_lookup(sr_dev_attr->sensor_voltdm_name);
140	if (!sr_data->voltdm) {
141		pr_err("%s: Unable to get voltage domain pointer for VDD %s\n",
142			__func__, sr_dev_attr->sensor_voltdm_name);
143		goto exit;
144	}
145
146	omap_voltage_get_volttable(sr_data->voltdm, &volt_data);
147	if (!volt_data) {
148		pr_err("%s: No Voltage table registered for VDD%d\n",
149		       __func__, i + 1);
150		goto exit;
151	}
152
153	sr_set_nvalues(volt_data, sr_data);
154
155	sr_data->enable_on_init = sr_enable_on_init;
156
 
 
 
 
 
157exit:
158	i++;
159
160	return 0;
161}
162
163/*
164 * API to be called from board files to enable smartreflex
165 * autocompensation at init.
166 */
167void __init omap_enable_smartreflex_on_init(void)
168{
169	sr_enable_on_init = true;
170}
171
172int __init omap_devinit_smartreflex(void)
173{
174	return omap_hwmod_for_each_by_class("smartreflex", sr_dev_init, NULL);
175}