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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright(C) 2015 Linaro Limited. All rights reserved.
4 * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
5 */
6
7#include <linux/coresight.h>
8#include <linux/coresight-pmu.h>
9#include <linux/cpumask.h>
10#include <linux/device.h>
11#include <linux/list.h>
12#include <linux/mm.h>
13#include <linux/init.h>
14#include <linux/perf_event.h>
15#include <linux/percpu-defs.h>
16#include <linux/slab.h>
17#include <linux/stringhash.h>
18#include <linux/types.h>
19#include <linux/workqueue.h>
20
21#include "coresight-etm-perf.h"
22#include "coresight-priv.h"
23
24static struct pmu etm_pmu;
25static bool etm_perf_up;
26
27static DEFINE_PER_CPU(struct perf_output_handle, ctx_handle);
28static DEFINE_PER_CPU(struct coresight_device *, csdev_src);
29
30/* ETMv3.5/PTM's ETMCR is 'config' */
31PMU_FORMAT_ATTR(cycacc, "config:" __stringify(ETM_OPT_CYCACC));
32PMU_FORMAT_ATTR(contextid, "config:" __stringify(ETM_OPT_CTXTID));
33PMU_FORMAT_ATTR(timestamp, "config:" __stringify(ETM_OPT_TS));
34PMU_FORMAT_ATTR(retstack, "config:" __stringify(ETM_OPT_RETSTK));
35/* Sink ID - same for all ETMs */
36PMU_FORMAT_ATTR(sinkid, "config2:0-31");
37
38static struct attribute *etm_config_formats_attr[] = {
39 &format_attr_cycacc.attr,
40 &format_attr_contextid.attr,
41 &format_attr_timestamp.attr,
42 &format_attr_retstack.attr,
43 &format_attr_sinkid.attr,
44 NULL,
45};
46
47static const struct attribute_group etm_pmu_format_group = {
48 .name = "format",
49 .attrs = etm_config_formats_attr,
50};
51
52static struct attribute *etm_config_sinks_attr[] = {
53 NULL,
54};
55
56static const struct attribute_group etm_pmu_sinks_group = {
57 .name = "sinks",
58 .attrs = etm_config_sinks_attr,
59};
60
61static const struct attribute_group *etm_pmu_attr_groups[] = {
62 &etm_pmu_format_group,
63 &etm_pmu_sinks_group,
64 NULL,
65};
66
67static inline struct list_head **
68etm_event_cpu_path_ptr(struct etm_event_data *data, int cpu)
69{
70 return per_cpu_ptr(data->path, cpu);
71}
72
73static inline struct list_head *
74etm_event_cpu_path(struct etm_event_data *data, int cpu)
75{
76 return *etm_event_cpu_path_ptr(data, cpu);
77}
78
79static void etm_event_read(struct perf_event *event) {}
80
81static int etm_addr_filters_alloc(struct perf_event *event)
82{
83 struct etm_filters *filters;
84 int node = event->cpu == -1 ? -1 : cpu_to_node(event->cpu);
85
86 filters = kzalloc_node(sizeof(struct etm_filters), GFP_KERNEL, node);
87 if (!filters)
88 return -ENOMEM;
89
90 if (event->parent)
91 memcpy(filters, event->parent->hw.addr_filters,
92 sizeof(*filters));
93
94 event->hw.addr_filters = filters;
95
96 return 0;
97}
98
99static void etm_event_destroy(struct perf_event *event)
100{
101 kfree(event->hw.addr_filters);
102 event->hw.addr_filters = NULL;
103}
104
105static int etm_event_init(struct perf_event *event)
106{
107 int ret = 0;
108
109 if (event->attr.type != etm_pmu.type) {
110 ret = -ENOENT;
111 goto out;
112 }
113
114 ret = etm_addr_filters_alloc(event);
115 if (ret)
116 goto out;
117
118 event->destroy = etm_event_destroy;
119out:
120 return ret;
121}
122
123static void free_sink_buffer(struct etm_event_data *event_data)
124{
125 int cpu;
126 cpumask_t *mask = &event_data->mask;
127 struct coresight_device *sink;
128
129 if (WARN_ON(cpumask_empty(mask)))
130 return;
131
132 if (!event_data->snk_config)
133 return;
134
135 cpu = cpumask_first(mask);
136 sink = coresight_get_sink(etm_event_cpu_path(event_data, cpu));
137 sink_ops(sink)->free_buffer(event_data->snk_config);
138}
139
140static void free_event_data(struct work_struct *work)
141{
142 int cpu;
143 cpumask_t *mask;
144 struct etm_event_data *event_data;
145
146 event_data = container_of(work, struct etm_event_data, work);
147 mask = &event_data->mask;
148
149 /* Free the sink buffers, if there are any */
150 free_sink_buffer(event_data);
151
152 for_each_cpu(cpu, mask) {
153 struct list_head **ppath;
154
155 ppath = etm_event_cpu_path_ptr(event_data, cpu);
156 if (!(IS_ERR_OR_NULL(*ppath)))
157 coresight_release_path(*ppath);
158 *ppath = NULL;
159 }
160
161 free_percpu(event_data->path);
162 kfree(event_data);
163}
164
165static void *alloc_event_data(int cpu)
166{
167 cpumask_t *mask;
168 struct etm_event_data *event_data;
169
170 /* First get memory for the session's data */
171 event_data = kzalloc(sizeof(struct etm_event_data), GFP_KERNEL);
172 if (!event_data)
173 return NULL;
174
175
176 mask = &event_data->mask;
177 if (cpu != -1)
178 cpumask_set_cpu(cpu, mask);
179 else
180 cpumask_copy(mask, cpu_present_mask);
181
182 /*
183 * Each CPU has a single path between source and destination. As such
184 * allocate an array using CPU numbers as indexes. That way a path
185 * for any CPU can easily be accessed at any given time. We proceed
186 * the same way for sessions involving a single CPU. The cost of
187 * unused memory when dealing with single CPU trace scenarios is small
188 * compared to the cost of searching through an optimized array.
189 */
190 event_data->path = alloc_percpu(struct list_head *);
191
192 if (!event_data->path) {
193 kfree(event_data);
194 return NULL;
195 }
196
197 return event_data;
198}
199
200static void etm_free_aux(void *data)
201{
202 struct etm_event_data *event_data = data;
203
204 schedule_work(&event_data->work);
205}
206
207static void *etm_setup_aux(struct perf_event *event, void **pages,
208 int nr_pages, bool overwrite)
209{
210 u32 id;
211 int cpu = event->cpu;
212 cpumask_t *mask;
213 struct coresight_device *sink;
214 struct etm_event_data *event_data = NULL;
215
216 event_data = alloc_event_data(cpu);
217 if (!event_data)
218 return NULL;
219 INIT_WORK(&event_data->work, free_event_data);
220
221 /* First get the selected sink from user space. */
222 if (event->attr.config2) {
223 id = (u32)event->attr.config2;
224 sink = coresight_get_sink_by_id(id);
225 } else {
226 sink = coresight_get_enabled_sink(true);
227 }
228
229 mask = &event_data->mask;
230
231 /*
232 * Setup the path for each CPU in a trace session. We try to build
233 * trace path for each CPU in the mask. If we don't find an ETM
234 * for the CPU or fail to build a path, we clear the CPU from the
235 * mask and continue with the rest. If ever we try to trace on those
236 * CPUs, we can handle it and fail the session.
237 */
238 for_each_cpu(cpu, mask) {
239 struct list_head *path;
240 struct coresight_device *csdev;
241
242 csdev = per_cpu(csdev_src, cpu);
243 /*
244 * If there is no ETM associated with this CPU clear it from
245 * the mask and continue with the rest. If ever we try to trace
246 * on this CPU, we handle it accordingly.
247 */
248 if (!csdev) {
249 cpumask_clear_cpu(cpu, mask);
250 continue;
251 }
252
253 /*
254 * No sink provided - look for a default sink for one of the
255 * devices. At present we only support topology where all CPUs
256 * use the same sink [N:1], so only need to find one sink. The
257 * coresight_build_path later will remove any CPU that does not
258 * attach to the sink, or if we have not found a sink.
259 */
260 if (!sink)
261 sink = coresight_find_default_sink(csdev);
262
263 /*
264 * Building a path doesn't enable it, it simply builds a
265 * list of devices from source to sink that can be
266 * referenced later when the path is actually needed.
267 */
268 path = coresight_build_path(csdev, sink);
269 if (IS_ERR(path)) {
270 cpumask_clear_cpu(cpu, mask);
271 continue;
272 }
273
274 *etm_event_cpu_path_ptr(event_data, cpu) = path;
275 }
276
277 /* no sink found for any CPU - cannot trace */
278 if (!sink)
279 goto err;
280
281 /* If we don't have any CPUs ready for tracing, abort */
282 cpu = cpumask_first(mask);
283 if (cpu >= nr_cpu_ids)
284 goto err;
285
286 if (!sink_ops(sink)->alloc_buffer || !sink_ops(sink)->free_buffer)
287 goto err;
288
289 /* Allocate the sink buffer for this session */
290 event_data->snk_config =
291 sink_ops(sink)->alloc_buffer(sink, event, pages,
292 nr_pages, overwrite);
293 if (!event_data->snk_config)
294 goto err;
295
296out:
297 return event_data;
298
299err:
300 etm_free_aux(event_data);
301 event_data = NULL;
302 goto out;
303}
304
305static void etm_event_start(struct perf_event *event, int flags)
306{
307 int cpu = smp_processor_id();
308 struct etm_event_data *event_data;
309 struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle);
310 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
311 struct list_head *path;
312
313 if (!csdev)
314 goto fail;
315
316 /*
317 * Deal with the ring buffer API and get a handle on the
318 * session's information.
319 */
320 event_data = perf_aux_output_begin(handle, event);
321 if (!event_data)
322 goto fail;
323
324 path = etm_event_cpu_path(event_data, cpu);
325 /* We need a sink, no need to continue without one */
326 sink = coresight_get_sink(path);
327 if (WARN_ON_ONCE(!sink))
328 goto fail_end_stop;
329
330 /* Nothing will happen without a path */
331 if (coresight_enable_path(path, CS_MODE_PERF, handle))
332 goto fail_end_stop;
333
334 /* Tell the perf core the event is alive */
335 event->hw.state = 0;
336
337 /* Finally enable the tracer */
338 if (source_ops(csdev)->enable(csdev, event, CS_MODE_PERF))
339 goto fail_disable_path;
340
341out:
342 return;
343
344fail_disable_path:
345 coresight_disable_path(path);
346fail_end_stop:
347 perf_aux_output_flag(handle, PERF_AUX_FLAG_TRUNCATED);
348 perf_aux_output_end(handle, 0);
349fail:
350 event->hw.state = PERF_HES_STOPPED;
351 goto out;
352}
353
354static void etm_event_stop(struct perf_event *event, int mode)
355{
356 int cpu = smp_processor_id();
357 unsigned long size;
358 struct coresight_device *sink, *csdev = per_cpu(csdev_src, cpu);
359 struct perf_output_handle *handle = this_cpu_ptr(&ctx_handle);
360 struct etm_event_data *event_data = perf_get_aux(handle);
361 struct list_head *path;
362
363 if (event->hw.state == PERF_HES_STOPPED)
364 return;
365
366 if (!csdev)
367 return;
368
369 path = etm_event_cpu_path(event_data, cpu);
370 if (!path)
371 return;
372
373 sink = coresight_get_sink(path);
374 if (!sink)
375 return;
376
377 /* stop tracer */
378 source_ops(csdev)->disable(csdev, event);
379
380 /* tell the core */
381 event->hw.state = PERF_HES_STOPPED;
382
383 if (mode & PERF_EF_UPDATE) {
384 if (WARN_ON_ONCE(handle->event != event))
385 return;
386
387 /* update trace information */
388 if (!sink_ops(sink)->update_buffer)
389 return;
390
391 size = sink_ops(sink)->update_buffer(sink, handle,
392 event_data->snk_config);
393 perf_aux_output_end(handle, size);
394 }
395
396 /* Disabling the path make its elements available to other sessions */
397 coresight_disable_path(path);
398}
399
400static int etm_event_add(struct perf_event *event, int mode)
401{
402 int ret = 0;
403 struct hw_perf_event *hwc = &event->hw;
404
405 if (mode & PERF_EF_START) {
406 etm_event_start(event, 0);
407 if (hwc->state & PERF_HES_STOPPED)
408 ret = -EINVAL;
409 } else {
410 hwc->state = PERF_HES_STOPPED;
411 }
412
413 return ret;
414}
415
416static void etm_event_del(struct perf_event *event, int mode)
417{
418 etm_event_stop(event, PERF_EF_UPDATE);
419}
420
421static int etm_addr_filters_validate(struct list_head *filters)
422{
423 bool range = false, address = false;
424 int index = 0;
425 struct perf_addr_filter *filter;
426
427 list_for_each_entry(filter, filters, entry) {
428 /*
429 * No need to go further if there's no more
430 * room for filters.
431 */
432 if (++index > ETM_ADDR_CMP_MAX)
433 return -EOPNOTSUPP;
434
435 /* filter::size==0 means single address trigger */
436 if (filter->size) {
437 /*
438 * The existing code relies on START/STOP filters
439 * being address filters.
440 */
441 if (filter->action == PERF_ADDR_FILTER_ACTION_START ||
442 filter->action == PERF_ADDR_FILTER_ACTION_STOP)
443 return -EOPNOTSUPP;
444
445 range = true;
446 } else
447 address = true;
448
449 /*
450 * At this time we don't allow range and start/stop filtering
451 * to cohabitate, they have to be mutually exclusive.
452 */
453 if (range && address)
454 return -EOPNOTSUPP;
455 }
456
457 return 0;
458}
459
460static void etm_addr_filters_sync(struct perf_event *event)
461{
462 struct perf_addr_filters_head *head = perf_event_addr_filters(event);
463 unsigned long start, stop;
464 struct perf_addr_filter_range *fr = event->addr_filter_ranges;
465 struct etm_filters *filters = event->hw.addr_filters;
466 struct etm_filter *etm_filter;
467 struct perf_addr_filter *filter;
468 int i = 0;
469
470 list_for_each_entry(filter, &head->list, entry) {
471 start = fr[i].start;
472 stop = start + fr[i].size;
473 etm_filter = &filters->etm_filter[i];
474
475 switch (filter->action) {
476 case PERF_ADDR_FILTER_ACTION_FILTER:
477 etm_filter->start_addr = start;
478 etm_filter->stop_addr = stop;
479 etm_filter->type = ETM_ADDR_TYPE_RANGE;
480 break;
481 case PERF_ADDR_FILTER_ACTION_START:
482 etm_filter->start_addr = start;
483 etm_filter->type = ETM_ADDR_TYPE_START;
484 break;
485 case PERF_ADDR_FILTER_ACTION_STOP:
486 etm_filter->stop_addr = stop;
487 etm_filter->type = ETM_ADDR_TYPE_STOP;
488 break;
489 }
490 i++;
491 }
492
493 filters->nr_filters = i;
494}
495
496int etm_perf_symlink(struct coresight_device *csdev, bool link)
497{
498 char entry[sizeof("cpu9999999")];
499 int ret = 0, cpu = source_ops(csdev)->cpu_id(csdev);
500 struct device *pmu_dev = etm_pmu.dev;
501 struct device *cs_dev = &csdev->dev;
502
503 sprintf(entry, "cpu%d", cpu);
504
505 if (!etm_perf_up)
506 return -EPROBE_DEFER;
507
508 if (link) {
509 ret = sysfs_create_link(&pmu_dev->kobj, &cs_dev->kobj, entry);
510 if (ret)
511 return ret;
512 per_cpu(csdev_src, cpu) = csdev;
513 } else {
514 sysfs_remove_link(&pmu_dev->kobj, entry);
515 per_cpu(csdev_src, cpu) = NULL;
516 }
517
518 return 0;
519}
520
521static ssize_t etm_perf_sink_name_show(struct device *dev,
522 struct device_attribute *dattr,
523 char *buf)
524{
525 struct dev_ext_attribute *ea;
526
527 ea = container_of(dattr, struct dev_ext_attribute, attr);
528 return scnprintf(buf, PAGE_SIZE, "0x%lx\n", (unsigned long)(ea->var));
529}
530
531int etm_perf_add_symlink_sink(struct coresight_device *csdev)
532{
533 int ret;
534 unsigned long hash;
535 const char *name;
536 struct device *pmu_dev = etm_pmu.dev;
537 struct device *dev = &csdev->dev;
538 struct dev_ext_attribute *ea;
539
540 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
541 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
542 return -EINVAL;
543
544 if (csdev->ea != NULL)
545 return -EINVAL;
546
547 if (!etm_perf_up)
548 return -EPROBE_DEFER;
549
550 ea = devm_kzalloc(dev, sizeof(*ea), GFP_KERNEL);
551 if (!ea)
552 return -ENOMEM;
553
554 name = dev_name(dev);
555 /* See function coresight_get_sink_by_id() to know where this is used */
556 hash = hashlen_hash(hashlen_string(NULL, name));
557
558 sysfs_attr_init(&ea->attr.attr);
559 ea->attr.attr.name = devm_kstrdup(dev, name, GFP_KERNEL);
560 if (!ea->attr.attr.name)
561 return -ENOMEM;
562
563 ea->attr.attr.mode = 0444;
564 ea->attr.show = etm_perf_sink_name_show;
565 ea->var = (unsigned long *)hash;
566
567 ret = sysfs_add_file_to_group(&pmu_dev->kobj,
568 &ea->attr.attr, "sinks");
569
570 if (!ret)
571 csdev->ea = ea;
572
573 return ret;
574}
575
576void etm_perf_del_symlink_sink(struct coresight_device *csdev)
577{
578 struct device *pmu_dev = etm_pmu.dev;
579 struct dev_ext_attribute *ea = csdev->ea;
580
581 if (csdev->type != CORESIGHT_DEV_TYPE_SINK &&
582 csdev->type != CORESIGHT_DEV_TYPE_LINKSINK)
583 return;
584
585 if (!ea)
586 return;
587
588 sysfs_remove_file_from_group(&pmu_dev->kobj,
589 &ea->attr.attr, "sinks");
590 csdev->ea = NULL;
591}
592
593static int __init etm_perf_init(void)
594{
595 int ret;
596
597 etm_pmu.capabilities = (PERF_PMU_CAP_EXCLUSIVE |
598 PERF_PMU_CAP_ITRACE);
599
600 etm_pmu.attr_groups = etm_pmu_attr_groups;
601 etm_pmu.task_ctx_nr = perf_sw_context;
602 etm_pmu.read = etm_event_read;
603 etm_pmu.event_init = etm_event_init;
604 etm_pmu.setup_aux = etm_setup_aux;
605 etm_pmu.free_aux = etm_free_aux;
606 etm_pmu.start = etm_event_start;
607 etm_pmu.stop = etm_event_stop;
608 etm_pmu.add = etm_event_add;
609 etm_pmu.del = etm_event_del;
610 etm_pmu.addr_filters_sync = etm_addr_filters_sync;
611 etm_pmu.addr_filters_validate = etm_addr_filters_validate;
612 etm_pmu.nr_addr_filters = ETM_ADDR_CMP_MAX;
613
614 ret = perf_pmu_register(&etm_pmu, CORESIGHT_ETM_PMU_NAME, -1);
615 if (ret == 0)
616 etm_perf_up = true;
617
618 return ret;
619}
620device_initcall(etm_perf_init);