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1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/interrupt.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
42#include <linux/slab.h>
43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/mii.h>
46#include <linux/ethtool.h>
47#include <linux/if_vlan.h>
48#include <linux/cpu.h>
49#include <linux/smp.h>
50#include <linux/pm_qos.h>
51#include <linux/pm_runtime.h>
52#include <linux/aer.h>
53#include <linux/prefetch.h>
54
55#include "e1000.h"
56
57#define DRV_EXTRAVERSION "-k"
58
59#define DRV_VERSION "2.0.0" DRV_EXTRAVERSION
60char e1000e_driver_name[] = "e1000e";
61const char e1000e_driver_version[] = DRV_VERSION;
62
63#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
64static int debug = -1;
65module_param(debug, int, 0);
66MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
67
68static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state);
69
70static const struct e1000_info *e1000_info_tbl[] = {
71 [board_82571] = &e1000_82571_info,
72 [board_82572] = &e1000_82572_info,
73 [board_82573] = &e1000_82573_info,
74 [board_82574] = &e1000_82574_info,
75 [board_82583] = &e1000_82583_info,
76 [board_80003es2lan] = &e1000_es2_info,
77 [board_ich8lan] = &e1000_ich8_info,
78 [board_ich9lan] = &e1000_ich9_info,
79 [board_ich10lan] = &e1000_ich10_info,
80 [board_pchlan] = &e1000_pch_info,
81 [board_pch2lan] = &e1000_pch2_info,
82 [board_pch_lpt] = &e1000_pch_lpt_info,
83};
84
85struct e1000_reg_info {
86 u32 ofs;
87 char *name;
88};
89
90#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
91#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
92#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
93#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
94#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
95
96#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
97#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
98#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
99#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
100#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
101
102static const struct e1000_reg_info e1000_reg_info_tbl[] = {
103
104 /* General Registers */
105 {E1000_CTRL, "CTRL"},
106 {E1000_STATUS, "STATUS"},
107 {E1000_CTRL_EXT, "CTRL_EXT"},
108
109 /* Interrupt Registers */
110 {E1000_ICR, "ICR"},
111
112 /* Rx Registers */
113 {E1000_RCTL, "RCTL"},
114 {E1000_RDLEN(0), "RDLEN"},
115 {E1000_RDH(0), "RDH"},
116 {E1000_RDT(0), "RDT"},
117 {E1000_RDTR, "RDTR"},
118 {E1000_RXDCTL(0), "RXDCTL"},
119 {E1000_ERT, "ERT"},
120 {E1000_RDBAL(0), "RDBAL"},
121 {E1000_RDBAH(0), "RDBAH"},
122 {E1000_RDFH, "RDFH"},
123 {E1000_RDFT, "RDFT"},
124 {E1000_RDFHS, "RDFHS"},
125 {E1000_RDFTS, "RDFTS"},
126 {E1000_RDFPC, "RDFPC"},
127
128 /* Tx Registers */
129 {E1000_TCTL, "TCTL"},
130 {E1000_TDBAL(0), "TDBAL"},
131 {E1000_TDBAH(0), "TDBAH"},
132 {E1000_TDLEN(0), "TDLEN"},
133 {E1000_TDH(0), "TDH"},
134 {E1000_TDT(0), "TDT"},
135 {E1000_TIDV, "TIDV"},
136 {E1000_TXDCTL(0), "TXDCTL"},
137 {E1000_TADV, "TADV"},
138 {E1000_TARC(0), "TARC"},
139 {E1000_TDFH, "TDFH"},
140 {E1000_TDFT, "TDFT"},
141 {E1000_TDFHS, "TDFHS"},
142 {E1000_TDFTS, "TDFTS"},
143 {E1000_TDFPC, "TDFPC"},
144
145 /* List Terminator */
146 {0, NULL}
147};
148
149/*
150 * e1000_regdump - register printout routine
151 */
152static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
153{
154 int n = 0;
155 char rname[16];
156 u32 regs[8];
157
158 switch (reginfo->ofs) {
159 case E1000_RXDCTL(0):
160 for (n = 0; n < 2; n++)
161 regs[n] = __er32(hw, E1000_RXDCTL(n));
162 break;
163 case E1000_TXDCTL(0):
164 for (n = 0; n < 2; n++)
165 regs[n] = __er32(hw, E1000_TXDCTL(n));
166 break;
167 case E1000_TARC(0):
168 for (n = 0; n < 2; n++)
169 regs[n] = __er32(hw, E1000_TARC(n));
170 break;
171 default:
172 pr_info("%-15s %08x\n",
173 reginfo->name, __er32(hw, reginfo->ofs));
174 return;
175 }
176
177 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
178 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
179}
180
181/*
182 * e1000e_dump - Print registers, Tx-ring and Rx-ring
183 */
184static void e1000e_dump(struct e1000_adapter *adapter)
185{
186 struct net_device *netdev = adapter->netdev;
187 struct e1000_hw *hw = &adapter->hw;
188 struct e1000_reg_info *reginfo;
189 struct e1000_ring *tx_ring = adapter->tx_ring;
190 struct e1000_tx_desc *tx_desc;
191 struct my_u0 {
192 __le64 a;
193 __le64 b;
194 } *u0;
195 struct e1000_buffer *buffer_info;
196 struct e1000_ring *rx_ring = adapter->rx_ring;
197 union e1000_rx_desc_packet_split *rx_desc_ps;
198 union e1000_rx_desc_extended *rx_desc;
199 struct my_u1 {
200 __le64 a;
201 __le64 b;
202 __le64 c;
203 __le64 d;
204 } *u1;
205 u32 staterr;
206 int i = 0;
207
208 if (!netif_msg_hw(adapter))
209 return;
210
211 /* Print netdevice Info */
212 if (netdev) {
213 dev_info(&adapter->pdev->dev, "Net device Info\n");
214 pr_info("Device Name state trans_start last_rx\n");
215 pr_info("%-15s %016lX %016lX %016lX\n",
216 netdev->name, netdev->state, netdev->trans_start,
217 netdev->last_rx);
218 }
219
220 /* Print Registers */
221 dev_info(&adapter->pdev->dev, "Register Dump\n");
222 pr_info(" Register Name Value\n");
223 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
224 reginfo->name; reginfo++) {
225 e1000_regdump(hw, reginfo);
226 }
227
228 /* Print Tx Ring Summary */
229 if (!netdev || !netif_running(netdev))
230 return;
231
232 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
233 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
234 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
235 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
236 0, tx_ring->next_to_use, tx_ring->next_to_clean,
237 (unsigned long long)buffer_info->dma,
238 buffer_info->length,
239 buffer_info->next_to_watch,
240 (unsigned long long)buffer_info->time_stamp);
241
242 /* Print Tx Ring */
243 if (!netif_msg_tx_done(adapter))
244 goto rx_ring_summary;
245
246 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
247
248 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
249 *
250 * Legacy Transmit Descriptor
251 * +--------------------------------------------------------------+
252 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
253 * +--------------------------------------------------------------+
254 * 8 | Special | CSS | Status | CMD | CSO | Length |
255 * +--------------------------------------------------------------+
256 * 63 48 47 36 35 32 31 24 23 16 15 0
257 *
258 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
259 * 63 48 47 40 39 32 31 16 15 8 7 0
260 * +----------------------------------------------------------------+
261 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
262 * +----------------------------------------------------------------+
263 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
264 * +----------------------------------------------------------------+
265 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
266 *
267 * Extended Data Descriptor (DTYP=0x1)
268 * +----------------------------------------------------------------+
269 * 0 | Buffer Address [63:0] |
270 * +----------------------------------------------------------------+
271 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
272 * +----------------------------------------------------------------+
273 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
274 */
275 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
276 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
277 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
278 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
279 const char *next_desc;
280 tx_desc = E1000_TX_DESC(*tx_ring, i);
281 buffer_info = &tx_ring->buffer_info[i];
282 u0 = (struct my_u0 *)tx_desc;
283 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
284 next_desc = " NTC/U";
285 else if (i == tx_ring->next_to_use)
286 next_desc = " NTU";
287 else if (i == tx_ring->next_to_clean)
288 next_desc = " NTC";
289 else
290 next_desc = "";
291 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
292 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
293 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
294 i,
295 (unsigned long long)le64_to_cpu(u0->a),
296 (unsigned long long)le64_to_cpu(u0->b),
297 (unsigned long long)buffer_info->dma,
298 buffer_info->length, buffer_info->next_to_watch,
299 (unsigned long long)buffer_info->time_stamp,
300 buffer_info->skb, next_desc);
301
302 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
303 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
304 16, 1, phys_to_virt(buffer_info->dma),
305 buffer_info->length, true);
306 }
307
308 /* Print Rx Ring Summary */
309rx_ring_summary:
310 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
311 pr_info("Queue [NTU] [NTC]\n");
312 pr_info(" %5d %5X %5X\n",
313 0, rx_ring->next_to_use, rx_ring->next_to_clean);
314
315 /* Print Rx Ring */
316 if (!netif_msg_rx_status(adapter))
317 return;
318
319 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
320 switch (adapter->rx_ps_pages) {
321 case 1:
322 case 2:
323 case 3:
324 /* [Extended] Packet Split Receive Descriptor Format
325 *
326 * +-----------------------------------------------------+
327 * 0 | Buffer Address 0 [63:0] |
328 * +-----------------------------------------------------+
329 * 8 | Buffer Address 1 [63:0] |
330 * +-----------------------------------------------------+
331 * 16 | Buffer Address 2 [63:0] |
332 * +-----------------------------------------------------+
333 * 24 | Buffer Address 3 [63:0] |
334 * +-----------------------------------------------------+
335 */
336 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
337 /* [Extended] Receive Descriptor (Write-Back) Format
338 *
339 * 63 48 47 32 31 13 12 8 7 4 3 0
340 * +------------------------------------------------------+
341 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
342 * | Checksum | Ident | | Queue | | Type |
343 * +------------------------------------------------------+
344 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
345 * +------------------------------------------------------+
346 * 63 48 47 32 31 20 19 0
347 */
348 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
349 for (i = 0; i < rx_ring->count; i++) {
350 const char *next_desc;
351 buffer_info = &rx_ring->buffer_info[i];
352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
353 u1 = (struct my_u1 *)rx_desc_ps;
354 staterr =
355 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
356
357 if (i == rx_ring->next_to_use)
358 next_desc = " NTU";
359 else if (i == rx_ring->next_to_clean)
360 next_desc = " NTC";
361 else
362 next_desc = "";
363
364 if (staterr & E1000_RXD_STAT_DD) {
365 /* Descriptor Done */
366 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
367 "RWB", i,
368 (unsigned long long)le64_to_cpu(u1->a),
369 (unsigned long long)le64_to_cpu(u1->b),
370 (unsigned long long)le64_to_cpu(u1->c),
371 (unsigned long long)le64_to_cpu(u1->d),
372 buffer_info->skb, next_desc);
373 } else {
374 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
375 "R ", i,
376 (unsigned long long)le64_to_cpu(u1->a),
377 (unsigned long long)le64_to_cpu(u1->b),
378 (unsigned long long)le64_to_cpu(u1->c),
379 (unsigned long long)le64_to_cpu(u1->d),
380 (unsigned long long)buffer_info->dma,
381 buffer_info->skb, next_desc);
382
383 if (netif_msg_pktdata(adapter))
384 print_hex_dump(KERN_INFO, "",
385 DUMP_PREFIX_ADDRESS, 16, 1,
386 phys_to_virt(buffer_info->dma),
387 adapter->rx_ps_bsize0, true);
388 }
389 }
390 break;
391 default:
392 case 0:
393 /* Extended Receive Descriptor (Read) Format
394 *
395 * +-----------------------------------------------------+
396 * 0 | Buffer Address [63:0] |
397 * +-----------------------------------------------------+
398 * 8 | Reserved |
399 * +-----------------------------------------------------+
400 */
401 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
402 /* Extended Receive Descriptor (Write-Back) Format
403 *
404 * 63 48 47 32 31 24 23 4 3 0
405 * +------------------------------------------------------+
406 * | RSS Hash | | | |
407 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
408 * | Packet | IP | | | Type |
409 * | Checksum | Ident | | | |
410 * +------------------------------------------------------+
411 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
412 * +------------------------------------------------------+
413 * 63 48 47 32 31 20 19 0
414 */
415 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
416
417 for (i = 0; i < rx_ring->count; i++) {
418 const char *next_desc;
419
420 buffer_info = &rx_ring->buffer_info[i];
421 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
422 u1 = (struct my_u1 *)rx_desc;
423 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
424
425 if (i == rx_ring->next_to_use)
426 next_desc = " NTU";
427 else if (i == rx_ring->next_to_clean)
428 next_desc = " NTC";
429 else
430 next_desc = "";
431
432 if (staterr & E1000_RXD_STAT_DD) {
433 /* Descriptor Done */
434 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
435 "RWB", i,
436 (unsigned long long)le64_to_cpu(u1->a),
437 (unsigned long long)le64_to_cpu(u1->b),
438 buffer_info->skb, next_desc);
439 } else {
440 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
441 "R ", i,
442 (unsigned long long)le64_to_cpu(u1->a),
443 (unsigned long long)le64_to_cpu(u1->b),
444 (unsigned long long)buffer_info->dma,
445 buffer_info->skb, next_desc);
446
447 if (netif_msg_pktdata(adapter))
448 print_hex_dump(KERN_INFO, "",
449 DUMP_PREFIX_ADDRESS, 16,
450 1,
451 phys_to_virt
452 (buffer_info->dma),
453 adapter->rx_buffer_len,
454 true);
455 }
456 }
457 }
458}
459
460/**
461 * e1000_desc_unused - calculate if we have unused descriptors
462 **/
463static int e1000_desc_unused(struct e1000_ring *ring)
464{
465 if (ring->next_to_clean > ring->next_to_use)
466 return ring->next_to_clean - ring->next_to_use - 1;
467
468 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
469}
470
471/**
472 * e1000_receive_skb - helper function to handle Rx indications
473 * @adapter: board private structure
474 * @status: descriptor status field as written by hardware
475 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
476 * @skb: pointer to sk_buff to be indicated to stack
477 **/
478static void e1000_receive_skb(struct e1000_adapter *adapter,
479 struct net_device *netdev, struct sk_buff *skb,
480 u8 status, __le16 vlan)
481{
482 u16 tag = le16_to_cpu(vlan);
483 skb->protocol = eth_type_trans(skb, netdev);
484
485 if (status & E1000_RXD_STAT_VP)
486 __vlan_hwaccel_put_tag(skb, tag);
487
488 napi_gro_receive(&adapter->napi, skb);
489}
490
491/**
492 * e1000_rx_checksum - Receive Checksum Offload
493 * @adapter: board private structure
494 * @status_err: receive descriptor status and error fields
495 * @csum: receive descriptor csum field
496 * @sk_buff: socket buffer with received data
497 **/
498static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
499 struct sk_buff *skb)
500{
501 u16 status = (u16)status_err;
502 u8 errors = (u8)(status_err >> 24);
503
504 skb_checksum_none_assert(skb);
505
506 /* Rx checksum disabled */
507 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
508 return;
509
510 /* Ignore Checksum bit is set */
511 if (status & E1000_RXD_STAT_IXSM)
512 return;
513
514 /* TCP/UDP checksum error bit or IP checksum error bit is set */
515 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
516 /* let the stack verify checksum errors */
517 adapter->hw_csum_err++;
518 return;
519 }
520
521 /* TCP/UDP Checksum has not been calculated */
522 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
523 return;
524
525 /* It must be a TCP or UDP packet with a valid checksum */
526 skb->ip_summed = CHECKSUM_UNNECESSARY;
527 adapter->hw_csum_good++;
528}
529
530static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
531{
532 struct e1000_adapter *adapter = rx_ring->adapter;
533 struct e1000_hw *hw = &adapter->hw;
534 s32 ret_val = __ew32_prepare(hw);
535
536 writel(i, rx_ring->tail);
537
538 if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
539 u32 rctl = er32(RCTL);
540 ew32(RCTL, rctl & ~E1000_RCTL_EN);
541 e_err("ME firmware caused invalid RDT - resetting\n");
542 schedule_work(&adapter->reset_task);
543 }
544}
545
546static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
547{
548 struct e1000_adapter *adapter = tx_ring->adapter;
549 struct e1000_hw *hw = &adapter->hw;
550 s32 ret_val = __ew32_prepare(hw);
551
552 writel(i, tx_ring->tail);
553
554 if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
555 u32 tctl = er32(TCTL);
556 ew32(TCTL, tctl & ~E1000_TCTL_EN);
557 e_err("ME firmware caused invalid TDT - resetting\n");
558 schedule_work(&adapter->reset_task);
559 }
560}
561
562/**
563 * e1000_alloc_rx_buffers - Replace used receive buffers
564 * @rx_ring: Rx descriptor ring
565 **/
566static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
567 int cleaned_count, gfp_t gfp)
568{
569 struct e1000_adapter *adapter = rx_ring->adapter;
570 struct net_device *netdev = adapter->netdev;
571 struct pci_dev *pdev = adapter->pdev;
572 union e1000_rx_desc_extended *rx_desc;
573 struct e1000_buffer *buffer_info;
574 struct sk_buff *skb;
575 unsigned int i;
576 unsigned int bufsz = adapter->rx_buffer_len;
577
578 i = rx_ring->next_to_use;
579 buffer_info = &rx_ring->buffer_info[i];
580
581 while (cleaned_count--) {
582 skb = buffer_info->skb;
583 if (skb) {
584 skb_trim(skb, 0);
585 goto map_skb;
586 }
587
588 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
589 if (!skb) {
590 /* Better luck next round */
591 adapter->alloc_rx_buff_failed++;
592 break;
593 }
594
595 buffer_info->skb = skb;
596map_skb:
597 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
598 adapter->rx_buffer_len,
599 DMA_FROM_DEVICE);
600 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
601 dev_err(&pdev->dev, "Rx DMA map failed\n");
602 adapter->rx_dma_failed++;
603 break;
604 }
605
606 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
607 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
608
609 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
610 /*
611 * Force memory writes to complete before letting h/w
612 * know there are new descriptors to fetch. (Only
613 * applicable for weak-ordered memory model archs,
614 * such as IA-64).
615 */
616 wmb();
617 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
618 e1000e_update_rdt_wa(rx_ring, i);
619 else
620 writel(i, rx_ring->tail);
621 }
622 i++;
623 if (i == rx_ring->count)
624 i = 0;
625 buffer_info = &rx_ring->buffer_info[i];
626 }
627
628 rx_ring->next_to_use = i;
629}
630
631/**
632 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
633 * @rx_ring: Rx descriptor ring
634 **/
635static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
636 int cleaned_count, gfp_t gfp)
637{
638 struct e1000_adapter *adapter = rx_ring->adapter;
639 struct net_device *netdev = adapter->netdev;
640 struct pci_dev *pdev = adapter->pdev;
641 union e1000_rx_desc_packet_split *rx_desc;
642 struct e1000_buffer *buffer_info;
643 struct e1000_ps_page *ps_page;
644 struct sk_buff *skb;
645 unsigned int i, j;
646
647 i = rx_ring->next_to_use;
648 buffer_info = &rx_ring->buffer_info[i];
649
650 while (cleaned_count--) {
651 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
652
653 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
654 ps_page = &buffer_info->ps_pages[j];
655 if (j >= adapter->rx_ps_pages) {
656 /* all unused desc entries get hw null ptr */
657 rx_desc->read.buffer_addr[j + 1] =
658 ~cpu_to_le64(0);
659 continue;
660 }
661 if (!ps_page->page) {
662 ps_page->page = alloc_page(gfp);
663 if (!ps_page->page) {
664 adapter->alloc_rx_buff_failed++;
665 goto no_buffers;
666 }
667 ps_page->dma = dma_map_page(&pdev->dev,
668 ps_page->page,
669 0, PAGE_SIZE,
670 DMA_FROM_DEVICE);
671 if (dma_mapping_error(&pdev->dev,
672 ps_page->dma)) {
673 dev_err(&adapter->pdev->dev,
674 "Rx DMA page map failed\n");
675 adapter->rx_dma_failed++;
676 goto no_buffers;
677 }
678 }
679 /*
680 * Refresh the desc even if buffer_addrs
681 * didn't change because each write-back
682 * erases this info.
683 */
684 rx_desc->read.buffer_addr[j + 1] =
685 cpu_to_le64(ps_page->dma);
686 }
687
688 skb = __netdev_alloc_skb_ip_align(netdev,
689 adapter->rx_ps_bsize0,
690 gfp);
691
692 if (!skb) {
693 adapter->alloc_rx_buff_failed++;
694 break;
695 }
696
697 buffer_info->skb = skb;
698 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
699 adapter->rx_ps_bsize0,
700 DMA_FROM_DEVICE);
701 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
702 dev_err(&pdev->dev, "Rx DMA map failed\n");
703 adapter->rx_dma_failed++;
704 /* cleanup skb */
705 dev_kfree_skb_any(skb);
706 buffer_info->skb = NULL;
707 break;
708 }
709
710 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
711
712 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
713 /*
714 * Force memory writes to complete before letting h/w
715 * know there are new descriptors to fetch. (Only
716 * applicable for weak-ordered memory model archs,
717 * such as IA-64).
718 */
719 wmb();
720 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
721 e1000e_update_rdt_wa(rx_ring, i << 1);
722 else
723 writel(i << 1, rx_ring->tail);
724 }
725
726 i++;
727 if (i == rx_ring->count)
728 i = 0;
729 buffer_info = &rx_ring->buffer_info[i];
730 }
731
732no_buffers:
733 rx_ring->next_to_use = i;
734}
735
736/**
737 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
738 * @rx_ring: Rx descriptor ring
739 * @cleaned_count: number of buffers to allocate this pass
740 **/
741
742static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
743 int cleaned_count, gfp_t gfp)
744{
745 struct e1000_adapter *adapter = rx_ring->adapter;
746 struct net_device *netdev = adapter->netdev;
747 struct pci_dev *pdev = adapter->pdev;
748 union e1000_rx_desc_extended *rx_desc;
749 struct e1000_buffer *buffer_info;
750 struct sk_buff *skb;
751 unsigned int i;
752 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
753
754 i = rx_ring->next_to_use;
755 buffer_info = &rx_ring->buffer_info[i];
756
757 while (cleaned_count--) {
758 skb = buffer_info->skb;
759 if (skb) {
760 skb_trim(skb, 0);
761 goto check_page;
762 }
763
764 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
765 if (unlikely(!skb)) {
766 /* Better luck next round */
767 adapter->alloc_rx_buff_failed++;
768 break;
769 }
770
771 buffer_info->skb = skb;
772check_page:
773 /* allocate a new page if necessary */
774 if (!buffer_info->page) {
775 buffer_info->page = alloc_page(gfp);
776 if (unlikely(!buffer_info->page)) {
777 adapter->alloc_rx_buff_failed++;
778 break;
779 }
780 }
781
782 if (!buffer_info->dma)
783 buffer_info->dma = dma_map_page(&pdev->dev,
784 buffer_info->page, 0,
785 PAGE_SIZE,
786 DMA_FROM_DEVICE);
787
788 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
789 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
790
791 if (unlikely(++i == rx_ring->count))
792 i = 0;
793 buffer_info = &rx_ring->buffer_info[i];
794 }
795
796 if (likely(rx_ring->next_to_use != i)) {
797 rx_ring->next_to_use = i;
798 if (unlikely(i-- == 0))
799 i = (rx_ring->count - 1);
800
801 /* Force memory writes to complete before letting h/w
802 * know there are new descriptors to fetch. (Only
803 * applicable for weak-ordered memory model archs,
804 * such as IA-64). */
805 wmb();
806 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
807 e1000e_update_rdt_wa(rx_ring, i);
808 else
809 writel(i, rx_ring->tail);
810 }
811}
812
813static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
814 struct sk_buff *skb)
815{
816 if (netdev->features & NETIF_F_RXHASH)
817 skb->rxhash = le32_to_cpu(rss);
818}
819
820/**
821 * e1000_clean_rx_irq - Send received data up the network stack
822 * @rx_ring: Rx descriptor ring
823 *
824 * the return value indicates whether actual cleaning was done, there
825 * is no guarantee that everything was cleaned
826 **/
827static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
828 int work_to_do)
829{
830 struct e1000_adapter *adapter = rx_ring->adapter;
831 struct net_device *netdev = adapter->netdev;
832 struct pci_dev *pdev = adapter->pdev;
833 struct e1000_hw *hw = &adapter->hw;
834 union e1000_rx_desc_extended *rx_desc, *next_rxd;
835 struct e1000_buffer *buffer_info, *next_buffer;
836 u32 length, staterr;
837 unsigned int i;
838 int cleaned_count = 0;
839 bool cleaned = false;
840 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
841
842 i = rx_ring->next_to_clean;
843 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
844 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
845 buffer_info = &rx_ring->buffer_info[i];
846
847 while (staterr & E1000_RXD_STAT_DD) {
848 struct sk_buff *skb;
849
850 if (*work_done >= work_to_do)
851 break;
852 (*work_done)++;
853 rmb(); /* read descriptor and rx_buffer_info after status DD */
854
855 skb = buffer_info->skb;
856 buffer_info->skb = NULL;
857
858 prefetch(skb->data - NET_IP_ALIGN);
859
860 i++;
861 if (i == rx_ring->count)
862 i = 0;
863 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
864 prefetch(next_rxd);
865
866 next_buffer = &rx_ring->buffer_info[i];
867
868 cleaned = true;
869 cleaned_count++;
870 dma_unmap_single(&pdev->dev,
871 buffer_info->dma,
872 adapter->rx_buffer_len,
873 DMA_FROM_DEVICE);
874 buffer_info->dma = 0;
875
876 length = le16_to_cpu(rx_desc->wb.upper.length);
877
878 /*
879 * !EOP means multiple descriptors were used to store a single
880 * packet, if that's the case we need to toss it. In fact, we
881 * need to toss every packet with the EOP bit clear and the
882 * next frame that _does_ have the EOP bit set, as it is by
883 * definition only a frame fragment
884 */
885 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
886 adapter->flags2 |= FLAG2_IS_DISCARDING;
887
888 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
889 /* All receives must fit into a single buffer */
890 e_dbg("Receive packet consumed multiple buffers\n");
891 /* recycle */
892 buffer_info->skb = skb;
893 if (staterr & E1000_RXD_STAT_EOP)
894 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
895 goto next_desc;
896 }
897
898 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
899 !(netdev->features & NETIF_F_RXALL))) {
900 /* recycle */
901 buffer_info->skb = skb;
902 goto next_desc;
903 }
904
905 /* adjust length to remove Ethernet CRC */
906 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
907 /* If configured to store CRC, don't subtract FCS,
908 * but keep the FCS bytes out of the total_rx_bytes
909 * counter
910 */
911 if (netdev->features & NETIF_F_RXFCS)
912 total_rx_bytes -= 4;
913 else
914 length -= 4;
915 }
916
917 total_rx_bytes += length;
918 total_rx_packets++;
919
920 /*
921 * code added for copybreak, this should improve
922 * performance for small packets with large amounts
923 * of reassembly being done in the stack
924 */
925 if (length < copybreak) {
926 struct sk_buff *new_skb =
927 netdev_alloc_skb_ip_align(netdev, length);
928 if (new_skb) {
929 skb_copy_to_linear_data_offset(new_skb,
930 -NET_IP_ALIGN,
931 (skb->data -
932 NET_IP_ALIGN),
933 (length +
934 NET_IP_ALIGN));
935 /* save the skb in buffer_info as good */
936 buffer_info->skb = skb;
937 skb = new_skb;
938 }
939 /* else just continue with the old one */
940 }
941 /* end copybreak code */
942 skb_put(skb, length);
943
944 /* Receive Checksum Offload */
945 e1000_rx_checksum(adapter, staterr, skb);
946
947 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
948
949 e1000_receive_skb(adapter, netdev, skb, staterr,
950 rx_desc->wb.upper.vlan);
951
952next_desc:
953 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
954
955 /* return some buffers to hardware, one at a time is too slow */
956 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
957 adapter->alloc_rx_buf(rx_ring, cleaned_count,
958 GFP_ATOMIC);
959 cleaned_count = 0;
960 }
961
962 /* use prefetched values */
963 rx_desc = next_rxd;
964 buffer_info = next_buffer;
965
966 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
967 }
968 rx_ring->next_to_clean = i;
969
970 cleaned_count = e1000_desc_unused(rx_ring);
971 if (cleaned_count)
972 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
973
974 adapter->total_rx_bytes += total_rx_bytes;
975 adapter->total_rx_packets += total_rx_packets;
976 return cleaned;
977}
978
979static void e1000_put_txbuf(struct e1000_ring *tx_ring,
980 struct e1000_buffer *buffer_info)
981{
982 struct e1000_adapter *adapter = tx_ring->adapter;
983
984 if (buffer_info->dma) {
985 if (buffer_info->mapped_as_page)
986 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
987 buffer_info->length, DMA_TO_DEVICE);
988 else
989 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
990 buffer_info->length, DMA_TO_DEVICE);
991 buffer_info->dma = 0;
992 }
993 if (buffer_info->skb) {
994 dev_kfree_skb_any(buffer_info->skb);
995 buffer_info->skb = NULL;
996 }
997 buffer_info->time_stamp = 0;
998}
999
1000static void e1000_print_hw_hang(struct work_struct *work)
1001{
1002 struct e1000_adapter *adapter = container_of(work,
1003 struct e1000_adapter,
1004 print_hang_task);
1005 struct net_device *netdev = adapter->netdev;
1006 struct e1000_ring *tx_ring = adapter->tx_ring;
1007 unsigned int i = tx_ring->next_to_clean;
1008 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1009 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1010 struct e1000_hw *hw = &adapter->hw;
1011 u16 phy_status, phy_1000t_status, phy_ext_status;
1012 u16 pci_status;
1013
1014 if (test_bit(__E1000_DOWN, &adapter->state))
1015 return;
1016
1017 if (!adapter->tx_hang_recheck &&
1018 (adapter->flags2 & FLAG2_DMA_BURST)) {
1019 /*
1020 * May be block on write-back, flush and detect again
1021 * flush pending descriptor writebacks to memory
1022 */
1023 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1024 /* execute the writes immediately */
1025 e1e_flush();
1026 /*
1027 * Due to rare timing issues, write to TIDV again to ensure
1028 * the write is successful
1029 */
1030 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1031 /* execute the writes immediately */
1032 e1e_flush();
1033 adapter->tx_hang_recheck = true;
1034 return;
1035 }
1036 /* Real hang detected */
1037 adapter->tx_hang_recheck = false;
1038 netif_stop_queue(netdev);
1039
1040 e1e_rphy(hw, PHY_STATUS, &phy_status);
1041 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
1042 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
1043
1044 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1045
1046 /* detected Hardware unit hang */
1047 e_err("Detected Hardware Unit Hang:\n"
1048 " TDH <%x>\n"
1049 " TDT <%x>\n"
1050 " next_to_use <%x>\n"
1051 " next_to_clean <%x>\n"
1052 "buffer_info[next_to_clean]:\n"
1053 " time_stamp <%lx>\n"
1054 " next_to_watch <%x>\n"
1055 " jiffies <%lx>\n"
1056 " next_to_watch.status <%x>\n"
1057 "MAC Status <%x>\n"
1058 "PHY Status <%x>\n"
1059 "PHY 1000BASE-T Status <%x>\n"
1060 "PHY Extended Status <%x>\n"
1061 "PCI Status <%x>\n",
1062 readl(tx_ring->head),
1063 readl(tx_ring->tail),
1064 tx_ring->next_to_use,
1065 tx_ring->next_to_clean,
1066 tx_ring->buffer_info[eop].time_stamp,
1067 eop,
1068 jiffies,
1069 eop_desc->upper.fields.status,
1070 er32(STATUS),
1071 phy_status,
1072 phy_1000t_status,
1073 phy_ext_status,
1074 pci_status);
1075
1076 /* Suggest workaround for known h/w issue */
1077 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1078 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1079}
1080
1081/**
1082 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1083 * @tx_ring: Tx descriptor ring
1084 *
1085 * the return value indicates whether actual cleaning was done, there
1086 * is no guarantee that everything was cleaned
1087 **/
1088static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1089{
1090 struct e1000_adapter *adapter = tx_ring->adapter;
1091 struct net_device *netdev = adapter->netdev;
1092 struct e1000_hw *hw = &adapter->hw;
1093 struct e1000_tx_desc *tx_desc, *eop_desc;
1094 struct e1000_buffer *buffer_info;
1095 unsigned int i, eop;
1096 unsigned int count = 0;
1097 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1098 unsigned int bytes_compl = 0, pkts_compl = 0;
1099
1100 i = tx_ring->next_to_clean;
1101 eop = tx_ring->buffer_info[i].next_to_watch;
1102 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1103
1104 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1105 (count < tx_ring->count)) {
1106 bool cleaned = false;
1107 rmb(); /* read buffer_info after eop_desc */
1108 for (; !cleaned; count++) {
1109 tx_desc = E1000_TX_DESC(*tx_ring, i);
1110 buffer_info = &tx_ring->buffer_info[i];
1111 cleaned = (i == eop);
1112
1113 if (cleaned) {
1114 total_tx_packets += buffer_info->segs;
1115 total_tx_bytes += buffer_info->bytecount;
1116 if (buffer_info->skb) {
1117 bytes_compl += buffer_info->skb->len;
1118 pkts_compl++;
1119 }
1120 }
1121
1122 e1000_put_txbuf(tx_ring, buffer_info);
1123 tx_desc->upper.data = 0;
1124
1125 i++;
1126 if (i == tx_ring->count)
1127 i = 0;
1128 }
1129
1130 if (i == tx_ring->next_to_use)
1131 break;
1132 eop = tx_ring->buffer_info[i].next_to_watch;
1133 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1134 }
1135
1136 tx_ring->next_to_clean = i;
1137
1138 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1139
1140#define TX_WAKE_THRESHOLD 32
1141 if (count && netif_carrier_ok(netdev) &&
1142 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1143 /* Make sure that anybody stopping the queue after this
1144 * sees the new next_to_clean.
1145 */
1146 smp_mb();
1147
1148 if (netif_queue_stopped(netdev) &&
1149 !(test_bit(__E1000_DOWN, &adapter->state))) {
1150 netif_wake_queue(netdev);
1151 ++adapter->restart_queue;
1152 }
1153 }
1154
1155 if (adapter->detect_tx_hung) {
1156 /*
1157 * Detect a transmit hang in hardware, this serializes the
1158 * check with the clearing of time_stamp and movement of i
1159 */
1160 adapter->detect_tx_hung = false;
1161 if (tx_ring->buffer_info[i].time_stamp &&
1162 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1163 + (adapter->tx_timeout_factor * HZ)) &&
1164 !(er32(STATUS) & E1000_STATUS_TXOFF))
1165 schedule_work(&adapter->print_hang_task);
1166 else
1167 adapter->tx_hang_recheck = false;
1168 }
1169 adapter->total_tx_bytes += total_tx_bytes;
1170 adapter->total_tx_packets += total_tx_packets;
1171 return count < tx_ring->count;
1172}
1173
1174/**
1175 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1176 * @rx_ring: Rx descriptor ring
1177 *
1178 * the return value indicates whether actual cleaning was done, there
1179 * is no guarantee that everything was cleaned
1180 **/
1181static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1182 int work_to_do)
1183{
1184 struct e1000_adapter *adapter = rx_ring->adapter;
1185 struct e1000_hw *hw = &adapter->hw;
1186 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1187 struct net_device *netdev = adapter->netdev;
1188 struct pci_dev *pdev = adapter->pdev;
1189 struct e1000_buffer *buffer_info, *next_buffer;
1190 struct e1000_ps_page *ps_page;
1191 struct sk_buff *skb;
1192 unsigned int i, j;
1193 u32 length, staterr;
1194 int cleaned_count = 0;
1195 bool cleaned = false;
1196 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1197
1198 i = rx_ring->next_to_clean;
1199 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1200 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1201 buffer_info = &rx_ring->buffer_info[i];
1202
1203 while (staterr & E1000_RXD_STAT_DD) {
1204 if (*work_done >= work_to_do)
1205 break;
1206 (*work_done)++;
1207 skb = buffer_info->skb;
1208 rmb(); /* read descriptor and rx_buffer_info after status DD */
1209
1210 /* in the packet split case this is header only */
1211 prefetch(skb->data - NET_IP_ALIGN);
1212
1213 i++;
1214 if (i == rx_ring->count)
1215 i = 0;
1216 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1217 prefetch(next_rxd);
1218
1219 next_buffer = &rx_ring->buffer_info[i];
1220
1221 cleaned = true;
1222 cleaned_count++;
1223 dma_unmap_single(&pdev->dev, buffer_info->dma,
1224 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1225 buffer_info->dma = 0;
1226
1227 /* see !EOP comment in other Rx routine */
1228 if (!(staterr & E1000_RXD_STAT_EOP))
1229 adapter->flags2 |= FLAG2_IS_DISCARDING;
1230
1231 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1232 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1233 dev_kfree_skb_irq(skb);
1234 if (staterr & E1000_RXD_STAT_EOP)
1235 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1236 goto next_desc;
1237 }
1238
1239 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1240 !(netdev->features & NETIF_F_RXALL))) {
1241 dev_kfree_skb_irq(skb);
1242 goto next_desc;
1243 }
1244
1245 length = le16_to_cpu(rx_desc->wb.middle.length0);
1246
1247 if (!length) {
1248 e_dbg("Last part of the packet spanning multiple descriptors\n");
1249 dev_kfree_skb_irq(skb);
1250 goto next_desc;
1251 }
1252
1253 /* Good Receive */
1254 skb_put(skb, length);
1255
1256 {
1257 /*
1258 * this looks ugly, but it seems compiler issues make
1259 * it more efficient than reusing j
1260 */
1261 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1262
1263 /*
1264 * page alloc/put takes too long and effects small
1265 * packet throughput, so unsplit small packets and
1266 * save the alloc/put only valid in softirq (napi)
1267 * context to call kmap_*
1268 */
1269 if (l1 && (l1 <= copybreak) &&
1270 ((length + l1) <= adapter->rx_ps_bsize0)) {
1271 u8 *vaddr;
1272
1273 ps_page = &buffer_info->ps_pages[0];
1274
1275 /*
1276 * there is no documentation about how to call
1277 * kmap_atomic, so we can't hold the mapping
1278 * very long
1279 */
1280 dma_sync_single_for_cpu(&pdev->dev,
1281 ps_page->dma,
1282 PAGE_SIZE,
1283 DMA_FROM_DEVICE);
1284 vaddr = kmap_atomic(ps_page->page);
1285 memcpy(skb_tail_pointer(skb), vaddr, l1);
1286 kunmap_atomic(vaddr);
1287 dma_sync_single_for_device(&pdev->dev,
1288 ps_page->dma,
1289 PAGE_SIZE,
1290 DMA_FROM_DEVICE);
1291
1292 /* remove the CRC */
1293 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1294 if (!(netdev->features & NETIF_F_RXFCS))
1295 l1 -= 4;
1296 }
1297
1298 skb_put(skb, l1);
1299 goto copydone;
1300 } /* if */
1301 }
1302
1303 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1304 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1305 if (!length)
1306 break;
1307
1308 ps_page = &buffer_info->ps_pages[j];
1309 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1310 DMA_FROM_DEVICE);
1311 ps_page->dma = 0;
1312 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1313 ps_page->page = NULL;
1314 skb->len += length;
1315 skb->data_len += length;
1316 skb->truesize += PAGE_SIZE;
1317 }
1318
1319 /* strip the ethernet crc, problem is we're using pages now so
1320 * this whole operation can get a little cpu intensive
1321 */
1322 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1323 if (!(netdev->features & NETIF_F_RXFCS))
1324 pskb_trim(skb, skb->len - 4);
1325 }
1326
1327copydone:
1328 total_rx_bytes += skb->len;
1329 total_rx_packets++;
1330
1331 e1000_rx_checksum(adapter, staterr, skb);
1332
1333 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1334
1335 if (rx_desc->wb.upper.header_status &
1336 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1337 adapter->rx_hdr_split++;
1338
1339 e1000_receive_skb(adapter, netdev, skb,
1340 staterr, rx_desc->wb.middle.vlan);
1341
1342next_desc:
1343 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1344 buffer_info->skb = NULL;
1345
1346 /* return some buffers to hardware, one at a time is too slow */
1347 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1348 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1349 GFP_ATOMIC);
1350 cleaned_count = 0;
1351 }
1352
1353 /* use prefetched values */
1354 rx_desc = next_rxd;
1355 buffer_info = next_buffer;
1356
1357 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1358 }
1359 rx_ring->next_to_clean = i;
1360
1361 cleaned_count = e1000_desc_unused(rx_ring);
1362 if (cleaned_count)
1363 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1364
1365 adapter->total_rx_bytes += total_rx_bytes;
1366 adapter->total_rx_packets += total_rx_packets;
1367 return cleaned;
1368}
1369
1370/**
1371 * e1000_consume_page - helper function
1372 **/
1373static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1374 u16 length)
1375{
1376 bi->page = NULL;
1377 skb->len += length;
1378 skb->data_len += length;
1379 skb->truesize += PAGE_SIZE;
1380}
1381
1382/**
1383 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1384 * @adapter: board private structure
1385 *
1386 * the return value indicates whether actual cleaning was done, there
1387 * is no guarantee that everything was cleaned
1388 **/
1389static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1390 int work_to_do)
1391{
1392 struct e1000_adapter *adapter = rx_ring->adapter;
1393 struct net_device *netdev = adapter->netdev;
1394 struct pci_dev *pdev = adapter->pdev;
1395 union e1000_rx_desc_extended *rx_desc, *next_rxd;
1396 struct e1000_buffer *buffer_info, *next_buffer;
1397 u32 length, staterr;
1398 unsigned int i;
1399 int cleaned_count = 0;
1400 bool cleaned = false;
1401 unsigned int total_rx_bytes=0, total_rx_packets=0;
1402
1403 i = rx_ring->next_to_clean;
1404 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1405 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1406 buffer_info = &rx_ring->buffer_info[i];
1407
1408 while (staterr & E1000_RXD_STAT_DD) {
1409 struct sk_buff *skb;
1410
1411 if (*work_done >= work_to_do)
1412 break;
1413 (*work_done)++;
1414 rmb(); /* read descriptor and rx_buffer_info after status DD */
1415
1416 skb = buffer_info->skb;
1417 buffer_info->skb = NULL;
1418
1419 ++i;
1420 if (i == rx_ring->count)
1421 i = 0;
1422 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1423 prefetch(next_rxd);
1424
1425 next_buffer = &rx_ring->buffer_info[i];
1426
1427 cleaned = true;
1428 cleaned_count++;
1429 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1430 DMA_FROM_DEVICE);
1431 buffer_info->dma = 0;
1432
1433 length = le16_to_cpu(rx_desc->wb.upper.length);
1434
1435 /* errors is only valid for DD + EOP descriptors */
1436 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1437 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1438 !(netdev->features & NETIF_F_RXALL)))) {
1439 /* recycle both page and skb */
1440 buffer_info->skb = skb;
1441 /* an error means any chain goes out the window too */
1442 if (rx_ring->rx_skb_top)
1443 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1444 rx_ring->rx_skb_top = NULL;
1445 goto next_desc;
1446 }
1447
1448#define rxtop (rx_ring->rx_skb_top)
1449 if (!(staterr & E1000_RXD_STAT_EOP)) {
1450 /* this descriptor is only the beginning (or middle) */
1451 if (!rxtop) {
1452 /* this is the beginning of a chain */
1453 rxtop = skb;
1454 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1455 0, length);
1456 } else {
1457 /* this is the middle of a chain */
1458 skb_fill_page_desc(rxtop,
1459 skb_shinfo(rxtop)->nr_frags,
1460 buffer_info->page, 0, length);
1461 /* re-use the skb, only consumed the page */
1462 buffer_info->skb = skb;
1463 }
1464 e1000_consume_page(buffer_info, rxtop, length);
1465 goto next_desc;
1466 } else {
1467 if (rxtop) {
1468 /* end of the chain */
1469 skb_fill_page_desc(rxtop,
1470 skb_shinfo(rxtop)->nr_frags,
1471 buffer_info->page, 0, length);
1472 /* re-use the current skb, we only consumed the
1473 * page */
1474 buffer_info->skb = skb;
1475 skb = rxtop;
1476 rxtop = NULL;
1477 e1000_consume_page(buffer_info, skb, length);
1478 } else {
1479 /* no chain, got EOP, this buf is the packet
1480 * copybreak to save the put_page/alloc_page */
1481 if (length <= copybreak &&
1482 skb_tailroom(skb) >= length) {
1483 u8 *vaddr;
1484 vaddr = kmap_atomic(buffer_info->page);
1485 memcpy(skb_tail_pointer(skb), vaddr,
1486 length);
1487 kunmap_atomic(vaddr);
1488 /* re-use the page, so don't erase
1489 * buffer_info->page */
1490 skb_put(skb, length);
1491 } else {
1492 skb_fill_page_desc(skb, 0,
1493 buffer_info->page, 0,
1494 length);
1495 e1000_consume_page(buffer_info, skb,
1496 length);
1497 }
1498 }
1499 }
1500
1501 /* Receive Checksum Offload */
1502 e1000_rx_checksum(adapter, staterr, skb);
1503
1504 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1505
1506 /* probably a little skewed due to removing CRC */
1507 total_rx_bytes += skb->len;
1508 total_rx_packets++;
1509
1510 /* eth type trans needs skb->data to point to something */
1511 if (!pskb_may_pull(skb, ETH_HLEN)) {
1512 e_err("pskb_may_pull failed.\n");
1513 dev_kfree_skb_irq(skb);
1514 goto next_desc;
1515 }
1516
1517 e1000_receive_skb(adapter, netdev, skb, staterr,
1518 rx_desc->wb.upper.vlan);
1519
1520next_desc:
1521 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1522
1523 /* return some buffers to hardware, one at a time is too slow */
1524 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1525 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1526 GFP_ATOMIC);
1527 cleaned_count = 0;
1528 }
1529
1530 /* use prefetched values */
1531 rx_desc = next_rxd;
1532 buffer_info = next_buffer;
1533
1534 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1535 }
1536 rx_ring->next_to_clean = i;
1537
1538 cleaned_count = e1000_desc_unused(rx_ring);
1539 if (cleaned_count)
1540 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1541
1542 adapter->total_rx_bytes += total_rx_bytes;
1543 adapter->total_rx_packets += total_rx_packets;
1544 return cleaned;
1545}
1546
1547/**
1548 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1549 * @rx_ring: Rx descriptor ring
1550 **/
1551static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1552{
1553 struct e1000_adapter *adapter = rx_ring->adapter;
1554 struct e1000_buffer *buffer_info;
1555 struct e1000_ps_page *ps_page;
1556 struct pci_dev *pdev = adapter->pdev;
1557 unsigned int i, j;
1558
1559 /* Free all the Rx ring sk_buffs */
1560 for (i = 0; i < rx_ring->count; i++) {
1561 buffer_info = &rx_ring->buffer_info[i];
1562 if (buffer_info->dma) {
1563 if (adapter->clean_rx == e1000_clean_rx_irq)
1564 dma_unmap_single(&pdev->dev, buffer_info->dma,
1565 adapter->rx_buffer_len,
1566 DMA_FROM_DEVICE);
1567 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1568 dma_unmap_page(&pdev->dev, buffer_info->dma,
1569 PAGE_SIZE,
1570 DMA_FROM_DEVICE);
1571 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1572 dma_unmap_single(&pdev->dev, buffer_info->dma,
1573 adapter->rx_ps_bsize0,
1574 DMA_FROM_DEVICE);
1575 buffer_info->dma = 0;
1576 }
1577
1578 if (buffer_info->page) {
1579 put_page(buffer_info->page);
1580 buffer_info->page = NULL;
1581 }
1582
1583 if (buffer_info->skb) {
1584 dev_kfree_skb(buffer_info->skb);
1585 buffer_info->skb = NULL;
1586 }
1587
1588 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1589 ps_page = &buffer_info->ps_pages[j];
1590 if (!ps_page->page)
1591 break;
1592 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1593 DMA_FROM_DEVICE);
1594 ps_page->dma = 0;
1595 put_page(ps_page->page);
1596 ps_page->page = NULL;
1597 }
1598 }
1599
1600 /* there also may be some cached data from a chained receive */
1601 if (rx_ring->rx_skb_top) {
1602 dev_kfree_skb(rx_ring->rx_skb_top);
1603 rx_ring->rx_skb_top = NULL;
1604 }
1605
1606 /* Zero out the descriptor ring */
1607 memset(rx_ring->desc, 0, rx_ring->size);
1608
1609 rx_ring->next_to_clean = 0;
1610 rx_ring->next_to_use = 0;
1611 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1612
1613 writel(0, rx_ring->head);
1614 if (rx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
1615 e1000e_update_rdt_wa(rx_ring, 0);
1616 else
1617 writel(0, rx_ring->tail);
1618}
1619
1620static void e1000e_downshift_workaround(struct work_struct *work)
1621{
1622 struct e1000_adapter *adapter = container_of(work,
1623 struct e1000_adapter, downshift_task);
1624
1625 if (test_bit(__E1000_DOWN, &adapter->state))
1626 return;
1627
1628 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1629}
1630
1631/**
1632 * e1000_intr_msi - Interrupt Handler
1633 * @irq: interrupt number
1634 * @data: pointer to a network interface device structure
1635 **/
1636static irqreturn_t e1000_intr_msi(int irq, void *data)
1637{
1638 struct net_device *netdev = data;
1639 struct e1000_adapter *adapter = netdev_priv(netdev);
1640 struct e1000_hw *hw = &adapter->hw;
1641 u32 icr = er32(ICR);
1642
1643 /*
1644 * read ICR disables interrupts using IAM
1645 */
1646
1647 if (icr & E1000_ICR_LSC) {
1648 hw->mac.get_link_status = true;
1649 /*
1650 * ICH8 workaround-- Call gig speed drop workaround on cable
1651 * disconnect (LSC) before accessing any PHY registers
1652 */
1653 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1654 (!(er32(STATUS) & E1000_STATUS_LU)))
1655 schedule_work(&adapter->downshift_task);
1656
1657 /*
1658 * 80003ES2LAN workaround-- For packet buffer work-around on
1659 * link down event; disable receives here in the ISR and reset
1660 * adapter in watchdog
1661 */
1662 if (netif_carrier_ok(netdev) &&
1663 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1664 /* disable receives */
1665 u32 rctl = er32(RCTL);
1666 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1667 adapter->flags |= FLAG_RX_RESTART_NOW;
1668 }
1669 /* guard against interrupt when we're going down */
1670 if (!test_bit(__E1000_DOWN, &adapter->state))
1671 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1672 }
1673
1674 if (napi_schedule_prep(&adapter->napi)) {
1675 adapter->total_tx_bytes = 0;
1676 adapter->total_tx_packets = 0;
1677 adapter->total_rx_bytes = 0;
1678 adapter->total_rx_packets = 0;
1679 __napi_schedule(&adapter->napi);
1680 }
1681
1682 return IRQ_HANDLED;
1683}
1684
1685/**
1686 * e1000_intr - Interrupt Handler
1687 * @irq: interrupt number
1688 * @data: pointer to a network interface device structure
1689 **/
1690static irqreturn_t e1000_intr(int irq, void *data)
1691{
1692 struct net_device *netdev = data;
1693 struct e1000_adapter *adapter = netdev_priv(netdev);
1694 struct e1000_hw *hw = &adapter->hw;
1695 u32 rctl, icr = er32(ICR);
1696
1697 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1698 return IRQ_NONE; /* Not our interrupt */
1699
1700 /*
1701 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1702 * not set, then the adapter didn't send an interrupt
1703 */
1704 if (!(icr & E1000_ICR_INT_ASSERTED))
1705 return IRQ_NONE;
1706
1707 /*
1708 * Interrupt Auto-Mask...upon reading ICR,
1709 * interrupts are masked. No need for the
1710 * IMC write
1711 */
1712
1713 if (icr & E1000_ICR_LSC) {
1714 hw->mac.get_link_status = true;
1715 /*
1716 * ICH8 workaround-- Call gig speed drop workaround on cable
1717 * disconnect (LSC) before accessing any PHY registers
1718 */
1719 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1720 (!(er32(STATUS) & E1000_STATUS_LU)))
1721 schedule_work(&adapter->downshift_task);
1722
1723 /*
1724 * 80003ES2LAN workaround--
1725 * For packet buffer work-around on link down event;
1726 * disable receives here in the ISR and
1727 * reset adapter in watchdog
1728 */
1729 if (netif_carrier_ok(netdev) &&
1730 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1731 /* disable receives */
1732 rctl = er32(RCTL);
1733 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1734 adapter->flags |= FLAG_RX_RESTART_NOW;
1735 }
1736 /* guard against interrupt when we're going down */
1737 if (!test_bit(__E1000_DOWN, &adapter->state))
1738 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1739 }
1740
1741 if (napi_schedule_prep(&adapter->napi)) {
1742 adapter->total_tx_bytes = 0;
1743 adapter->total_tx_packets = 0;
1744 adapter->total_rx_bytes = 0;
1745 adapter->total_rx_packets = 0;
1746 __napi_schedule(&adapter->napi);
1747 }
1748
1749 return IRQ_HANDLED;
1750}
1751
1752static irqreturn_t e1000_msix_other(int irq, void *data)
1753{
1754 struct net_device *netdev = data;
1755 struct e1000_adapter *adapter = netdev_priv(netdev);
1756 struct e1000_hw *hw = &adapter->hw;
1757 u32 icr = er32(ICR);
1758
1759 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1760 if (!test_bit(__E1000_DOWN, &adapter->state))
1761 ew32(IMS, E1000_IMS_OTHER);
1762 return IRQ_NONE;
1763 }
1764
1765 if (icr & adapter->eiac_mask)
1766 ew32(ICS, (icr & adapter->eiac_mask));
1767
1768 if (icr & E1000_ICR_OTHER) {
1769 if (!(icr & E1000_ICR_LSC))
1770 goto no_link_interrupt;
1771 hw->mac.get_link_status = true;
1772 /* guard against interrupt when we're going down */
1773 if (!test_bit(__E1000_DOWN, &adapter->state))
1774 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1775 }
1776
1777no_link_interrupt:
1778 if (!test_bit(__E1000_DOWN, &adapter->state))
1779 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1780
1781 return IRQ_HANDLED;
1782}
1783
1784
1785static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1786{
1787 struct net_device *netdev = data;
1788 struct e1000_adapter *adapter = netdev_priv(netdev);
1789 struct e1000_hw *hw = &adapter->hw;
1790 struct e1000_ring *tx_ring = adapter->tx_ring;
1791
1792
1793 adapter->total_tx_bytes = 0;
1794 adapter->total_tx_packets = 0;
1795
1796 if (!e1000_clean_tx_irq(tx_ring))
1797 /* Ring was not completely cleaned, so fire another interrupt */
1798 ew32(ICS, tx_ring->ims_val);
1799
1800 return IRQ_HANDLED;
1801}
1802
1803static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1804{
1805 struct net_device *netdev = data;
1806 struct e1000_adapter *adapter = netdev_priv(netdev);
1807 struct e1000_ring *rx_ring = adapter->rx_ring;
1808
1809 /* Write the ITR value calculated at the end of the
1810 * previous interrupt.
1811 */
1812 if (rx_ring->set_itr) {
1813 writel(1000000000 / (rx_ring->itr_val * 256),
1814 rx_ring->itr_register);
1815 rx_ring->set_itr = 0;
1816 }
1817
1818 if (napi_schedule_prep(&adapter->napi)) {
1819 adapter->total_rx_bytes = 0;
1820 adapter->total_rx_packets = 0;
1821 __napi_schedule(&adapter->napi);
1822 }
1823 return IRQ_HANDLED;
1824}
1825
1826/**
1827 * e1000_configure_msix - Configure MSI-X hardware
1828 *
1829 * e1000_configure_msix sets up the hardware to properly
1830 * generate MSI-X interrupts.
1831 **/
1832static void e1000_configure_msix(struct e1000_adapter *adapter)
1833{
1834 struct e1000_hw *hw = &adapter->hw;
1835 struct e1000_ring *rx_ring = adapter->rx_ring;
1836 struct e1000_ring *tx_ring = adapter->tx_ring;
1837 int vector = 0;
1838 u32 ctrl_ext, ivar = 0;
1839
1840 adapter->eiac_mask = 0;
1841
1842 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1843 if (hw->mac.type == e1000_82574) {
1844 u32 rfctl = er32(RFCTL);
1845 rfctl |= E1000_RFCTL_ACK_DIS;
1846 ew32(RFCTL, rfctl);
1847 }
1848
1849#define E1000_IVAR_INT_ALLOC_VALID 0x8
1850 /* Configure Rx vector */
1851 rx_ring->ims_val = E1000_IMS_RXQ0;
1852 adapter->eiac_mask |= rx_ring->ims_val;
1853 if (rx_ring->itr_val)
1854 writel(1000000000 / (rx_ring->itr_val * 256),
1855 rx_ring->itr_register);
1856 else
1857 writel(1, rx_ring->itr_register);
1858 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1859
1860 /* Configure Tx vector */
1861 tx_ring->ims_val = E1000_IMS_TXQ0;
1862 vector++;
1863 if (tx_ring->itr_val)
1864 writel(1000000000 / (tx_ring->itr_val * 256),
1865 tx_ring->itr_register);
1866 else
1867 writel(1, tx_ring->itr_register);
1868 adapter->eiac_mask |= tx_ring->ims_val;
1869 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1870
1871 /* set vector for Other Causes, e.g. link changes */
1872 vector++;
1873 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1874 if (rx_ring->itr_val)
1875 writel(1000000000 / (rx_ring->itr_val * 256),
1876 hw->hw_addr + E1000_EITR_82574(vector));
1877 else
1878 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1879
1880 /* Cause Tx interrupts on every write back */
1881 ivar |= (1 << 31);
1882
1883 ew32(IVAR, ivar);
1884
1885 /* enable MSI-X PBA support */
1886 ctrl_ext = er32(CTRL_EXT);
1887 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1888
1889 /* Auto-Mask Other interrupts upon ICR read */
1890#define E1000_EIAC_MASK_82574 0x01F00000
1891 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1892 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1893 ew32(CTRL_EXT, ctrl_ext);
1894 e1e_flush();
1895}
1896
1897void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1898{
1899 if (adapter->msix_entries) {
1900 pci_disable_msix(adapter->pdev);
1901 kfree(adapter->msix_entries);
1902 adapter->msix_entries = NULL;
1903 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1904 pci_disable_msi(adapter->pdev);
1905 adapter->flags &= ~FLAG_MSI_ENABLED;
1906 }
1907}
1908
1909/**
1910 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1911 *
1912 * Attempt to configure interrupts using the best available
1913 * capabilities of the hardware and kernel.
1914 **/
1915void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1916{
1917 int err;
1918 int i;
1919
1920 switch (adapter->int_mode) {
1921 case E1000E_INT_MODE_MSIX:
1922 if (adapter->flags & FLAG_HAS_MSIX) {
1923 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1924 adapter->msix_entries = kcalloc(adapter->num_vectors,
1925 sizeof(struct msix_entry),
1926 GFP_KERNEL);
1927 if (adapter->msix_entries) {
1928 for (i = 0; i < adapter->num_vectors; i++)
1929 adapter->msix_entries[i].entry = i;
1930
1931 err = pci_enable_msix(adapter->pdev,
1932 adapter->msix_entries,
1933 adapter->num_vectors);
1934 if (err == 0)
1935 return;
1936 }
1937 /* MSI-X failed, so fall through and try MSI */
1938 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
1939 e1000e_reset_interrupt_capability(adapter);
1940 }
1941 adapter->int_mode = E1000E_INT_MODE_MSI;
1942 /* Fall through */
1943 case E1000E_INT_MODE_MSI:
1944 if (!pci_enable_msi(adapter->pdev)) {
1945 adapter->flags |= FLAG_MSI_ENABLED;
1946 } else {
1947 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1948 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
1949 }
1950 /* Fall through */
1951 case E1000E_INT_MODE_LEGACY:
1952 /* Don't do anything; this is the system default */
1953 break;
1954 }
1955
1956 /* store the number of vectors being used */
1957 adapter->num_vectors = 1;
1958}
1959
1960/**
1961 * e1000_request_msix - Initialize MSI-X interrupts
1962 *
1963 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1964 * kernel.
1965 **/
1966static int e1000_request_msix(struct e1000_adapter *adapter)
1967{
1968 struct net_device *netdev = adapter->netdev;
1969 int err = 0, vector = 0;
1970
1971 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1972 snprintf(adapter->rx_ring->name,
1973 sizeof(adapter->rx_ring->name) - 1,
1974 "%s-rx-0", netdev->name);
1975 else
1976 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1977 err = request_irq(adapter->msix_entries[vector].vector,
1978 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
1979 netdev);
1980 if (err)
1981 return err;
1982 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
1983 E1000_EITR_82574(vector);
1984 adapter->rx_ring->itr_val = adapter->itr;
1985 vector++;
1986
1987 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1988 snprintf(adapter->tx_ring->name,
1989 sizeof(adapter->tx_ring->name) - 1,
1990 "%s-tx-0", netdev->name);
1991 else
1992 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1993 err = request_irq(adapter->msix_entries[vector].vector,
1994 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
1995 netdev);
1996 if (err)
1997 return err;
1998 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
1999 E1000_EITR_82574(vector);
2000 adapter->tx_ring->itr_val = adapter->itr;
2001 vector++;
2002
2003 err = request_irq(adapter->msix_entries[vector].vector,
2004 e1000_msix_other, 0, netdev->name, netdev);
2005 if (err)
2006 return err;
2007
2008 e1000_configure_msix(adapter);
2009
2010 return 0;
2011}
2012
2013/**
2014 * e1000_request_irq - initialize interrupts
2015 *
2016 * Attempts to configure interrupts using the best available
2017 * capabilities of the hardware and kernel.
2018 **/
2019static int e1000_request_irq(struct e1000_adapter *adapter)
2020{
2021 struct net_device *netdev = adapter->netdev;
2022 int err;
2023
2024 if (adapter->msix_entries) {
2025 err = e1000_request_msix(adapter);
2026 if (!err)
2027 return err;
2028 /* fall back to MSI */
2029 e1000e_reset_interrupt_capability(adapter);
2030 adapter->int_mode = E1000E_INT_MODE_MSI;
2031 e1000e_set_interrupt_capability(adapter);
2032 }
2033 if (adapter->flags & FLAG_MSI_ENABLED) {
2034 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2035 netdev->name, netdev);
2036 if (!err)
2037 return err;
2038
2039 /* fall back to legacy interrupt */
2040 e1000e_reset_interrupt_capability(adapter);
2041 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2042 }
2043
2044 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2045 netdev->name, netdev);
2046 if (err)
2047 e_err("Unable to allocate interrupt, Error: %d\n", err);
2048
2049 return err;
2050}
2051
2052static void e1000_free_irq(struct e1000_adapter *adapter)
2053{
2054 struct net_device *netdev = adapter->netdev;
2055
2056 if (adapter->msix_entries) {
2057 int vector = 0;
2058
2059 free_irq(adapter->msix_entries[vector].vector, netdev);
2060 vector++;
2061
2062 free_irq(adapter->msix_entries[vector].vector, netdev);
2063 vector++;
2064
2065 /* Other Causes interrupt vector */
2066 free_irq(adapter->msix_entries[vector].vector, netdev);
2067 return;
2068 }
2069
2070 free_irq(adapter->pdev->irq, netdev);
2071}
2072
2073/**
2074 * e1000_irq_disable - Mask off interrupt generation on the NIC
2075 **/
2076static void e1000_irq_disable(struct e1000_adapter *adapter)
2077{
2078 struct e1000_hw *hw = &adapter->hw;
2079
2080 ew32(IMC, ~0);
2081 if (adapter->msix_entries)
2082 ew32(EIAC_82574, 0);
2083 e1e_flush();
2084
2085 if (adapter->msix_entries) {
2086 int i;
2087 for (i = 0; i < adapter->num_vectors; i++)
2088 synchronize_irq(adapter->msix_entries[i].vector);
2089 } else {
2090 synchronize_irq(adapter->pdev->irq);
2091 }
2092}
2093
2094/**
2095 * e1000_irq_enable - Enable default interrupt generation settings
2096 **/
2097static void e1000_irq_enable(struct e1000_adapter *adapter)
2098{
2099 struct e1000_hw *hw = &adapter->hw;
2100
2101 if (adapter->msix_entries) {
2102 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2103 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2104 } else {
2105 ew32(IMS, IMS_ENABLE_MASK);
2106 }
2107 e1e_flush();
2108}
2109
2110/**
2111 * e1000e_get_hw_control - get control of the h/w from f/w
2112 * @adapter: address of board private structure
2113 *
2114 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2115 * For ASF and Pass Through versions of f/w this means that
2116 * the driver is loaded. For AMT version (only with 82573)
2117 * of the f/w this means that the network i/f is open.
2118 **/
2119void e1000e_get_hw_control(struct e1000_adapter *adapter)
2120{
2121 struct e1000_hw *hw = &adapter->hw;
2122 u32 ctrl_ext;
2123 u32 swsm;
2124
2125 /* Let firmware know the driver has taken over */
2126 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2127 swsm = er32(SWSM);
2128 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2129 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2130 ctrl_ext = er32(CTRL_EXT);
2131 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2132 }
2133}
2134
2135/**
2136 * e1000e_release_hw_control - release control of the h/w to f/w
2137 * @adapter: address of board private structure
2138 *
2139 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2140 * For ASF and Pass Through versions of f/w this means that the
2141 * driver is no longer loaded. For AMT version (only with 82573) i
2142 * of the f/w this means that the network i/f is closed.
2143 *
2144 **/
2145void e1000e_release_hw_control(struct e1000_adapter *adapter)
2146{
2147 struct e1000_hw *hw = &adapter->hw;
2148 u32 ctrl_ext;
2149 u32 swsm;
2150
2151 /* Let firmware taken over control of h/w */
2152 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2153 swsm = er32(SWSM);
2154 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2155 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2156 ctrl_ext = er32(CTRL_EXT);
2157 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2158 }
2159}
2160
2161/**
2162 * @e1000_alloc_ring - allocate memory for a ring structure
2163 **/
2164static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2165 struct e1000_ring *ring)
2166{
2167 struct pci_dev *pdev = adapter->pdev;
2168
2169 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2170 GFP_KERNEL);
2171 if (!ring->desc)
2172 return -ENOMEM;
2173
2174 return 0;
2175}
2176
2177/**
2178 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2179 * @tx_ring: Tx descriptor ring
2180 *
2181 * Return 0 on success, negative on failure
2182 **/
2183int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2184{
2185 struct e1000_adapter *adapter = tx_ring->adapter;
2186 int err = -ENOMEM, size;
2187
2188 size = sizeof(struct e1000_buffer) * tx_ring->count;
2189 tx_ring->buffer_info = vzalloc(size);
2190 if (!tx_ring->buffer_info)
2191 goto err;
2192
2193 /* round up to nearest 4K */
2194 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2195 tx_ring->size = ALIGN(tx_ring->size, 4096);
2196
2197 err = e1000_alloc_ring_dma(adapter, tx_ring);
2198 if (err)
2199 goto err;
2200
2201 tx_ring->next_to_use = 0;
2202 tx_ring->next_to_clean = 0;
2203
2204 return 0;
2205err:
2206 vfree(tx_ring->buffer_info);
2207 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2208 return err;
2209}
2210
2211/**
2212 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2213 * @rx_ring: Rx descriptor ring
2214 *
2215 * Returns 0 on success, negative on failure
2216 **/
2217int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2218{
2219 struct e1000_adapter *adapter = rx_ring->adapter;
2220 struct e1000_buffer *buffer_info;
2221 int i, size, desc_len, err = -ENOMEM;
2222
2223 size = sizeof(struct e1000_buffer) * rx_ring->count;
2224 rx_ring->buffer_info = vzalloc(size);
2225 if (!rx_ring->buffer_info)
2226 goto err;
2227
2228 for (i = 0; i < rx_ring->count; i++) {
2229 buffer_info = &rx_ring->buffer_info[i];
2230 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2231 sizeof(struct e1000_ps_page),
2232 GFP_KERNEL);
2233 if (!buffer_info->ps_pages)
2234 goto err_pages;
2235 }
2236
2237 desc_len = sizeof(union e1000_rx_desc_packet_split);
2238
2239 /* Round up to nearest 4K */
2240 rx_ring->size = rx_ring->count * desc_len;
2241 rx_ring->size = ALIGN(rx_ring->size, 4096);
2242
2243 err = e1000_alloc_ring_dma(adapter, rx_ring);
2244 if (err)
2245 goto err_pages;
2246
2247 rx_ring->next_to_clean = 0;
2248 rx_ring->next_to_use = 0;
2249 rx_ring->rx_skb_top = NULL;
2250
2251 return 0;
2252
2253err_pages:
2254 for (i = 0; i < rx_ring->count; i++) {
2255 buffer_info = &rx_ring->buffer_info[i];
2256 kfree(buffer_info->ps_pages);
2257 }
2258err:
2259 vfree(rx_ring->buffer_info);
2260 e_err("Unable to allocate memory for the receive descriptor ring\n");
2261 return err;
2262}
2263
2264/**
2265 * e1000_clean_tx_ring - Free Tx Buffers
2266 * @tx_ring: Tx descriptor ring
2267 **/
2268static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2269{
2270 struct e1000_adapter *adapter = tx_ring->adapter;
2271 struct e1000_buffer *buffer_info;
2272 unsigned long size;
2273 unsigned int i;
2274
2275 for (i = 0; i < tx_ring->count; i++) {
2276 buffer_info = &tx_ring->buffer_info[i];
2277 e1000_put_txbuf(tx_ring, buffer_info);
2278 }
2279
2280 netdev_reset_queue(adapter->netdev);
2281 size = sizeof(struct e1000_buffer) * tx_ring->count;
2282 memset(tx_ring->buffer_info, 0, size);
2283
2284 memset(tx_ring->desc, 0, tx_ring->size);
2285
2286 tx_ring->next_to_use = 0;
2287 tx_ring->next_to_clean = 0;
2288
2289 writel(0, tx_ring->head);
2290 if (tx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2291 e1000e_update_tdt_wa(tx_ring, 0);
2292 else
2293 writel(0, tx_ring->tail);
2294}
2295
2296/**
2297 * e1000e_free_tx_resources - Free Tx Resources per Queue
2298 * @tx_ring: Tx descriptor ring
2299 *
2300 * Free all transmit software resources
2301 **/
2302void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2303{
2304 struct e1000_adapter *adapter = tx_ring->adapter;
2305 struct pci_dev *pdev = adapter->pdev;
2306
2307 e1000_clean_tx_ring(tx_ring);
2308
2309 vfree(tx_ring->buffer_info);
2310 tx_ring->buffer_info = NULL;
2311
2312 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2313 tx_ring->dma);
2314 tx_ring->desc = NULL;
2315}
2316
2317/**
2318 * e1000e_free_rx_resources - Free Rx Resources
2319 * @rx_ring: Rx descriptor ring
2320 *
2321 * Free all receive software resources
2322 **/
2323void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2324{
2325 struct e1000_adapter *adapter = rx_ring->adapter;
2326 struct pci_dev *pdev = adapter->pdev;
2327 int i;
2328
2329 e1000_clean_rx_ring(rx_ring);
2330
2331 for (i = 0; i < rx_ring->count; i++)
2332 kfree(rx_ring->buffer_info[i].ps_pages);
2333
2334 vfree(rx_ring->buffer_info);
2335 rx_ring->buffer_info = NULL;
2336
2337 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2338 rx_ring->dma);
2339 rx_ring->desc = NULL;
2340}
2341
2342/**
2343 * e1000_update_itr - update the dynamic ITR value based on statistics
2344 * @adapter: pointer to adapter
2345 * @itr_setting: current adapter->itr
2346 * @packets: the number of packets during this measurement interval
2347 * @bytes: the number of bytes during this measurement interval
2348 *
2349 * Stores a new ITR value based on packets and byte
2350 * counts during the last interrupt. The advantage of per interrupt
2351 * computation is faster updates and more accurate ITR for the current
2352 * traffic pattern. Constants in this function were computed
2353 * based on theoretical maximum wire speed and thresholds were set based
2354 * on testing data as well as attempting to minimize response time
2355 * while increasing bulk throughput. This functionality is controlled
2356 * by the InterruptThrottleRate module parameter.
2357 **/
2358static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2359 u16 itr_setting, int packets,
2360 int bytes)
2361{
2362 unsigned int retval = itr_setting;
2363
2364 if (packets == 0)
2365 return itr_setting;
2366
2367 switch (itr_setting) {
2368 case lowest_latency:
2369 /* handle TSO and jumbo frames */
2370 if (bytes/packets > 8000)
2371 retval = bulk_latency;
2372 else if ((packets < 5) && (bytes > 512))
2373 retval = low_latency;
2374 break;
2375 case low_latency: /* 50 usec aka 20000 ints/s */
2376 if (bytes > 10000) {
2377 /* this if handles the TSO accounting */
2378 if (bytes/packets > 8000)
2379 retval = bulk_latency;
2380 else if ((packets < 10) || ((bytes/packets) > 1200))
2381 retval = bulk_latency;
2382 else if ((packets > 35))
2383 retval = lowest_latency;
2384 } else if (bytes/packets > 2000) {
2385 retval = bulk_latency;
2386 } else if (packets <= 2 && bytes < 512) {
2387 retval = lowest_latency;
2388 }
2389 break;
2390 case bulk_latency: /* 250 usec aka 4000 ints/s */
2391 if (bytes > 25000) {
2392 if (packets > 35)
2393 retval = low_latency;
2394 } else if (bytes < 6000) {
2395 retval = low_latency;
2396 }
2397 break;
2398 }
2399
2400 return retval;
2401}
2402
2403static void e1000_set_itr(struct e1000_adapter *adapter)
2404{
2405 struct e1000_hw *hw = &adapter->hw;
2406 u16 current_itr;
2407 u32 new_itr = adapter->itr;
2408
2409 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2410 if (adapter->link_speed != SPEED_1000) {
2411 current_itr = 0;
2412 new_itr = 4000;
2413 goto set_itr_now;
2414 }
2415
2416 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2417 new_itr = 0;
2418 goto set_itr_now;
2419 }
2420
2421 adapter->tx_itr = e1000_update_itr(adapter,
2422 adapter->tx_itr,
2423 adapter->total_tx_packets,
2424 adapter->total_tx_bytes);
2425 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2426 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2427 adapter->tx_itr = low_latency;
2428
2429 adapter->rx_itr = e1000_update_itr(adapter,
2430 adapter->rx_itr,
2431 adapter->total_rx_packets,
2432 adapter->total_rx_bytes);
2433 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2434 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2435 adapter->rx_itr = low_latency;
2436
2437 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2438
2439 switch (current_itr) {
2440 /* counts and packets in update_itr are dependent on these numbers */
2441 case lowest_latency:
2442 new_itr = 70000;
2443 break;
2444 case low_latency:
2445 new_itr = 20000; /* aka hwitr = ~200 */
2446 break;
2447 case bulk_latency:
2448 new_itr = 4000;
2449 break;
2450 default:
2451 break;
2452 }
2453
2454set_itr_now:
2455 if (new_itr != adapter->itr) {
2456 /*
2457 * this attempts to bias the interrupt rate towards Bulk
2458 * by adding intermediate steps when interrupt rate is
2459 * increasing
2460 */
2461 new_itr = new_itr > adapter->itr ?
2462 min(adapter->itr + (new_itr >> 2), new_itr) :
2463 new_itr;
2464 adapter->itr = new_itr;
2465 adapter->rx_ring->itr_val = new_itr;
2466 if (adapter->msix_entries)
2467 adapter->rx_ring->set_itr = 1;
2468 else
2469 if (new_itr)
2470 ew32(ITR, 1000000000 / (new_itr * 256));
2471 else
2472 ew32(ITR, 0);
2473 }
2474}
2475
2476/**
2477 * e1000_alloc_queues - Allocate memory for all rings
2478 * @adapter: board private structure to initialize
2479 **/
2480static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2481{
2482 int size = sizeof(struct e1000_ring);
2483
2484 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2485 if (!adapter->tx_ring)
2486 goto err;
2487 adapter->tx_ring->count = adapter->tx_ring_count;
2488 adapter->tx_ring->adapter = adapter;
2489
2490 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2491 if (!adapter->rx_ring)
2492 goto err;
2493 adapter->rx_ring->count = adapter->rx_ring_count;
2494 adapter->rx_ring->adapter = adapter;
2495
2496 return 0;
2497err:
2498 e_err("Unable to allocate memory for queues\n");
2499 kfree(adapter->rx_ring);
2500 kfree(adapter->tx_ring);
2501 return -ENOMEM;
2502}
2503
2504/**
2505 * e1000e_poll - NAPI Rx polling callback
2506 * @napi: struct associated with this polling callback
2507 * @weight: number of packets driver is allowed to process this poll
2508 **/
2509static int e1000e_poll(struct napi_struct *napi, int weight)
2510{
2511 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2512 napi);
2513 struct e1000_hw *hw = &adapter->hw;
2514 struct net_device *poll_dev = adapter->netdev;
2515 int tx_cleaned = 1, work_done = 0;
2516
2517 adapter = netdev_priv(poll_dev);
2518
2519 if (!adapter->msix_entries ||
2520 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2521 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2522
2523 adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2524
2525 if (!tx_cleaned)
2526 work_done = weight;
2527
2528 /* If weight not fully consumed, exit the polling mode */
2529 if (work_done < weight) {
2530 if (adapter->itr_setting & 3)
2531 e1000_set_itr(adapter);
2532 napi_complete(napi);
2533 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2534 if (adapter->msix_entries)
2535 ew32(IMS, adapter->rx_ring->ims_val);
2536 else
2537 e1000_irq_enable(adapter);
2538 }
2539 }
2540
2541 return work_done;
2542}
2543
2544static int e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2545{
2546 struct e1000_adapter *adapter = netdev_priv(netdev);
2547 struct e1000_hw *hw = &adapter->hw;
2548 u32 vfta, index;
2549
2550 /* don't update vlan cookie if already programmed */
2551 if ((adapter->hw.mng_cookie.status &
2552 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2553 (vid == adapter->mng_vlan_id))
2554 return 0;
2555
2556 /* add VID to filter table */
2557 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2558 index = (vid >> 5) & 0x7F;
2559 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2560 vfta |= (1 << (vid & 0x1F));
2561 hw->mac.ops.write_vfta(hw, index, vfta);
2562 }
2563
2564 set_bit(vid, adapter->active_vlans);
2565
2566 return 0;
2567}
2568
2569static int e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2570{
2571 struct e1000_adapter *adapter = netdev_priv(netdev);
2572 struct e1000_hw *hw = &adapter->hw;
2573 u32 vfta, index;
2574
2575 if ((adapter->hw.mng_cookie.status &
2576 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2577 (vid == adapter->mng_vlan_id)) {
2578 /* release control to f/w */
2579 e1000e_release_hw_control(adapter);
2580 return 0;
2581 }
2582
2583 /* remove VID from filter table */
2584 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2585 index = (vid >> 5) & 0x7F;
2586 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2587 vfta &= ~(1 << (vid & 0x1F));
2588 hw->mac.ops.write_vfta(hw, index, vfta);
2589 }
2590
2591 clear_bit(vid, adapter->active_vlans);
2592
2593 return 0;
2594}
2595
2596/**
2597 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2598 * @adapter: board private structure to initialize
2599 **/
2600static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2601{
2602 struct net_device *netdev = adapter->netdev;
2603 struct e1000_hw *hw = &adapter->hw;
2604 u32 rctl;
2605
2606 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2607 /* disable VLAN receive filtering */
2608 rctl = er32(RCTL);
2609 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2610 ew32(RCTL, rctl);
2611
2612 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2613 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
2614 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2615 }
2616 }
2617}
2618
2619/**
2620 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2621 * @adapter: board private structure to initialize
2622 **/
2623static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2624{
2625 struct e1000_hw *hw = &adapter->hw;
2626 u32 rctl;
2627
2628 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2629 /* enable VLAN receive filtering */
2630 rctl = er32(RCTL);
2631 rctl |= E1000_RCTL_VFE;
2632 rctl &= ~E1000_RCTL_CFIEN;
2633 ew32(RCTL, rctl);
2634 }
2635}
2636
2637/**
2638 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2639 * @adapter: board private structure to initialize
2640 **/
2641static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2642{
2643 struct e1000_hw *hw = &adapter->hw;
2644 u32 ctrl;
2645
2646 /* disable VLAN tag insert/strip */
2647 ctrl = er32(CTRL);
2648 ctrl &= ~E1000_CTRL_VME;
2649 ew32(CTRL, ctrl);
2650}
2651
2652/**
2653 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2654 * @adapter: board private structure to initialize
2655 **/
2656static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2657{
2658 struct e1000_hw *hw = &adapter->hw;
2659 u32 ctrl;
2660
2661 /* enable VLAN tag insert/strip */
2662 ctrl = er32(CTRL);
2663 ctrl |= E1000_CTRL_VME;
2664 ew32(CTRL, ctrl);
2665}
2666
2667static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2668{
2669 struct net_device *netdev = adapter->netdev;
2670 u16 vid = adapter->hw.mng_cookie.vlan_id;
2671 u16 old_vid = adapter->mng_vlan_id;
2672
2673 if (adapter->hw.mng_cookie.status &
2674 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2675 e1000_vlan_rx_add_vid(netdev, vid);
2676 adapter->mng_vlan_id = vid;
2677 }
2678
2679 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2680 e1000_vlan_rx_kill_vid(netdev, old_vid);
2681}
2682
2683static void e1000_restore_vlan(struct e1000_adapter *adapter)
2684{
2685 u16 vid;
2686
2687 e1000_vlan_rx_add_vid(adapter->netdev, 0);
2688
2689 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2690 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2691}
2692
2693static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2694{
2695 struct e1000_hw *hw = &adapter->hw;
2696 u32 manc, manc2h, mdef, i, j;
2697
2698 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2699 return;
2700
2701 manc = er32(MANC);
2702
2703 /*
2704 * enable receiving management packets to the host. this will probably
2705 * generate destination unreachable messages from the host OS, but
2706 * the packets will be handled on SMBUS
2707 */
2708 manc |= E1000_MANC_EN_MNG2HOST;
2709 manc2h = er32(MANC2H);
2710
2711 switch (hw->mac.type) {
2712 default:
2713 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2714 break;
2715 case e1000_82574:
2716 case e1000_82583:
2717 /*
2718 * Check if IPMI pass-through decision filter already exists;
2719 * if so, enable it.
2720 */
2721 for (i = 0, j = 0; i < 8; i++) {
2722 mdef = er32(MDEF(i));
2723
2724 /* Ignore filters with anything other than IPMI ports */
2725 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2726 continue;
2727
2728 /* Enable this decision filter in MANC2H */
2729 if (mdef)
2730 manc2h |= (1 << i);
2731
2732 j |= mdef;
2733 }
2734
2735 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2736 break;
2737
2738 /* Create new decision filter in an empty filter */
2739 for (i = 0, j = 0; i < 8; i++)
2740 if (er32(MDEF(i)) == 0) {
2741 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2742 E1000_MDEF_PORT_664));
2743 manc2h |= (1 << 1);
2744 j++;
2745 break;
2746 }
2747
2748 if (!j)
2749 e_warn("Unable to create IPMI pass-through filter\n");
2750 break;
2751 }
2752
2753 ew32(MANC2H, manc2h);
2754 ew32(MANC, manc);
2755}
2756
2757/**
2758 * e1000_configure_tx - Configure Transmit Unit after Reset
2759 * @adapter: board private structure
2760 *
2761 * Configure the Tx unit of the MAC after a reset.
2762 **/
2763static void e1000_configure_tx(struct e1000_adapter *adapter)
2764{
2765 struct e1000_hw *hw = &adapter->hw;
2766 struct e1000_ring *tx_ring = adapter->tx_ring;
2767 u64 tdba;
2768 u32 tdlen, tarc;
2769
2770 /* Setup the HW Tx Head and Tail descriptor pointers */
2771 tdba = tx_ring->dma;
2772 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2773 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2774 ew32(TDBAH(0), (tdba >> 32));
2775 ew32(TDLEN(0), tdlen);
2776 ew32(TDH(0), 0);
2777 ew32(TDT(0), 0);
2778 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2779 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2780
2781 /* Set the Tx Interrupt Delay register */
2782 ew32(TIDV, adapter->tx_int_delay);
2783 /* Tx irq moderation */
2784 ew32(TADV, adapter->tx_abs_int_delay);
2785
2786 if (adapter->flags2 & FLAG2_DMA_BURST) {
2787 u32 txdctl = er32(TXDCTL(0));
2788 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2789 E1000_TXDCTL_WTHRESH);
2790 /*
2791 * set up some performance related parameters to encourage the
2792 * hardware to use the bus more efficiently in bursts, depends
2793 * on the tx_int_delay to be enabled,
2794 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2795 * hthresh = 1 ==> prefetch when one or more available
2796 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2797 * BEWARE: this seems to work but should be considered first if
2798 * there are Tx hangs or other Tx related bugs
2799 */
2800 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2801 ew32(TXDCTL(0), txdctl);
2802 }
2803 /* erratum work around: set txdctl the same for both queues */
2804 ew32(TXDCTL(1), er32(TXDCTL(0)));
2805
2806 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2807 tarc = er32(TARC(0));
2808 /*
2809 * set the speed mode bit, we'll clear it if we're not at
2810 * gigabit link later
2811 */
2812#define SPEED_MODE_BIT (1 << 21)
2813 tarc |= SPEED_MODE_BIT;
2814 ew32(TARC(0), tarc);
2815 }
2816
2817 /* errata: program both queues to unweighted RR */
2818 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2819 tarc = er32(TARC(0));
2820 tarc |= 1;
2821 ew32(TARC(0), tarc);
2822 tarc = er32(TARC(1));
2823 tarc |= 1;
2824 ew32(TARC(1), tarc);
2825 }
2826
2827 /* Setup Transmit Descriptor Settings for eop descriptor */
2828 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2829
2830 /* only set IDE if we are delaying interrupts using the timers */
2831 if (adapter->tx_int_delay)
2832 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2833
2834 /* enable Report Status bit */
2835 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2836
2837 hw->mac.ops.config_collision_dist(hw);
2838}
2839
2840/**
2841 * e1000_setup_rctl - configure the receive control registers
2842 * @adapter: Board private structure
2843 **/
2844#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2845 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2846static void e1000_setup_rctl(struct e1000_adapter *adapter)
2847{
2848 struct e1000_hw *hw = &adapter->hw;
2849 u32 rctl, rfctl;
2850 u32 pages = 0;
2851
2852 /* Workaround Si errata on PCHx - configure jumbo frame flow */
2853 if (hw->mac.type >= e1000_pch2lan) {
2854 s32 ret_val;
2855
2856 if (adapter->netdev->mtu > ETH_DATA_LEN)
2857 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2858 else
2859 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2860
2861 if (ret_val)
2862 e_dbg("failed to enable jumbo frame workaround mode\n");
2863 }
2864
2865 /* Program MC offset vector base */
2866 rctl = er32(RCTL);
2867 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2868 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2869 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2870 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2871
2872 /* Do not Store bad packets */
2873 rctl &= ~E1000_RCTL_SBP;
2874
2875 /* Enable Long Packet receive */
2876 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2877 rctl &= ~E1000_RCTL_LPE;
2878 else
2879 rctl |= E1000_RCTL_LPE;
2880
2881 /* Some systems expect that the CRC is included in SMBUS traffic. The
2882 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2883 * host memory when this is enabled
2884 */
2885 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2886 rctl |= E1000_RCTL_SECRC;
2887
2888 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2889 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2890 u16 phy_data;
2891
2892 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2893 phy_data &= 0xfff8;
2894 phy_data |= (1 << 2);
2895 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2896
2897 e1e_rphy(hw, 22, &phy_data);
2898 phy_data &= 0x0fff;
2899 phy_data |= (1 << 14);
2900 e1e_wphy(hw, 0x10, 0x2823);
2901 e1e_wphy(hw, 0x11, 0x0003);
2902 e1e_wphy(hw, 22, phy_data);
2903 }
2904
2905 /* Setup buffer sizes */
2906 rctl &= ~E1000_RCTL_SZ_4096;
2907 rctl |= E1000_RCTL_BSEX;
2908 switch (adapter->rx_buffer_len) {
2909 case 2048:
2910 default:
2911 rctl |= E1000_RCTL_SZ_2048;
2912 rctl &= ~E1000_RCTL_BSEX;
2913 break;
2914 case 4096:
2915 rctl |= E1000_RCTL_SZ_4096;
2916 break;
2917 case 8192:
2918 rctl |= E1000_RCTL_SZ_8192;
2919 break;
2920 case 16384:
2921 rctl |= E1000_RCTL_SZ_16384;
2922 break;
2923 }
2924
2925 /* Enable Extended Status in all Receive Descriptors */
2926 rfctl = er32(RFCTL);
2927 rfctl |= E1000_RFCTL_EXTEN;
2928 ew32(RFCTL, rfctl);
2929
2930 /*
2931 * 82571 and greater support packet-split where the protocol
2932 * header is placed in skb->data and the packet data is
2933 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2934 * In the case of a non-split, skb->data is linearly filled,
2935 * followed by the page buffers. Therefore, skb->data is
2936 * sized to hold the largest protocol header.
2937 *
2938 * allocations using alloc_page take too long for regular MTU
2939 * so only enable packet split for jumbo frames
2940 *
2941 * Using pages when the page size is greater than 16k wastes
2942 * a lot of memory, since we allocate 3 pages at all times
2943 * per packet.
2944 */
2945 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
2946 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
2947 adapter->rx_ps_pages = pages;
2948 else
2949 adapter->rx_ps_pages = 0;
2950
2951 if (adapter->rx_ps_pages) {
2952 u32 psrctl = 0;
2953
2954 /* Enable Packet split descriptors */
2955 rctl |= E1000_RCTL_DTYP_PS;
2956
2957 psrctl |= adapter->rx_ps_bsize0 >>
2958 E1000_PSRCTL_BSIZE0_SHIFT;
2959
2960 switch (adapter->rx_ps_pages) {
2961 case 3:
2962 psrctl |= PAGE_SIZE <<
2963 E1000_PSRCTL_BSIZE3_SHIFT;
2964 case 2:
2965 psrctl |= PAGE_SIZE <<
2966 E1000_PSRCTL_BSIZE2_SHIFT;
2967 case 1:
2968 psrctl |= PAGE_SIZE >>
2969 E1000_PSRCTL_BSIZE1_SHIFT;
2970 break;
2971 }
2972
2973 ew32(PSRCTL, psrctl);
2974 }
2975
2976 /* This is useful for sniffing bad packets. */
2977 if (adapter->netdev->features & NETIF_F_RXALL) {
2978 /* UPE and MPE will be handled by normal PROMISC logic
2979 * in e1000e_set_rx_mode */
2980 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
2981 E1000_RCTL_BAM | /* RX All Bcast Pkts */
2982 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
2983
2984 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
2985 E1000_RCTL_DPF | /* Allow filtered pause */
2986 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
2987 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
2988 * and that breaks VLANs.
2989 */
2990 }
2991
2992 ew32(RCTL, rctl);
2993 /* just started the receive unit, no need to restart */
2994 adapter->flags &= ~FLAG_RX_RESTART_NOW;
2995}
2996
2997/**
2998 * e1000_configure_rx - Configure Receive Unit after Reset
2999 * @adapter: board private structure
3000 *
3001 * Configure the Rx unit of the MAC after a reset.
3002 **/
3003static void e1000_configure_rx(struct e1000_adapter *adapter)
3004{
3005 struct e1000_hw *hw = &adapter->hw;
3006 struct e1000_ring *rx_ring = adapter->rx_ring;
3007 u64 rdba;
3008 u32 rdlen, rctl, rxcsum, ctrl_ext;
3009
3010 if (adapter->rx_ps_pages) {
3011 /* this is a 32 byte descriptor */
3012 rdlen = rx_ring->count *
3013 sizeof(union e1000_rx_desc_packet_split);
3014 adapter->clean_rx = e1000_clean_rx_irq_ps;
3015 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3016 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3017 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3018 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3019 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3020 } else {
3021 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3022 adapter->clean_rx = e1000_clean_rx_irq;
3023 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3024 }
3025
3026 /* disable receives while setting up the descriptors */
3027 rctl = er32(RCTL);
3028 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3029 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3030 e1e_flush();
3031 usleep_range(10000, 20000);
3032
3033 if (adapter->flags2 & FLAG2_DMA_BURST) {
3034 /*
3035 * set the writeback threshold (only takes effect if the RDTR
3036 * is set). set GRAN=1 and write back up to 0x4 worth, and
3037 * enable prefetching of 0x20 Rx descriptors
3038 * granularity = 01
3039 * wthresh = 04,
3040 * hthresh = 04,
3041 * pthresh = 0x20
3042 */
3043 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3044 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3045
3046 /*
3047 * override the delay timers for enabling bursting, only if
3048 * the value was not set by the user via module options
3049 */
3050 if (adapter->rx_int_delay == DEFAULT_RDTR)
3051 adapter->rx_int_delay = BURST_RDTR;
3052 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3053 adapter->rx_abs_int_delay = BURST_RADV;
3054 }
3055
3056 /* set the Receive Delay Timer Register */
3057 ew32(RDTR, adapter->rx_int_delay);
3058
3059 /* irq moderation */
3060 ew32(RADV, adapter->rx_abs_int_delay);
3061 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3062 ew32(ITR, 1000000000 / (adapter->itr * 256));
3063
3064 ctrl_ext = er32(CTRL_EXT);
3065 /* Auto-Mask interrupts upon ICR access */
3066 ctrl_ext |= E1000_CTRL_EXT_IAME;
3067 ew32(IAM, 0xffffffff);
3068 ew32(CTRL_EXT, ctrl_ext);
3069 e1e_flush();
3070
3071 /*
3072 * Setup the HW Rx Head and Tail Descriptor Pointers and
3073 * the Base and Length of the Rx Descriptor Ring
3074 */
3075 rdba = rx_ring->dma;
3076 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3077 ew32(RDBAH(0), (rdba >> 32));
3078 ew32(RDLEN(0), rdlen);
3079 ew32(RDH(0), 0);
3080 ew32(RDT(0), 0);
3081 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3082 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3083
3084 /* Enable Receive Checksum Offload for TCP and UDP */
3085 rxcsum = er32(RXCSUM);
3086 if (adapter->netdev->features & NETIF_F_RXCSUM)
3087 rxcsum |= E1000_RXCSUM_TUOFL;
3088 else
3089 rxcsum &= ~E1000_RXCSUM_TUOFL;
3090 ew32(RXCSUM, rxcsum);
3091
3092 if (adapter->hw.mac.type == e1000_pch2lan) {
3093 /*
3094 * With jumbo frames, excessive C-state transition
3095 * latencies result in dropped transactions.
3096 */
3097 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3098 u32 rxdctl = er32(RXDCTL(0));
3099 ew32(RXDCTL(0), rxdctl | 0x3);
3100 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55);
3101 } else {
3102 pm_qos_update_request(&adapter->netdev->pm_qos_req,
3103 PM_QOS_DEFAULT_VALUE);
3104 }
3105 }
3106
3107 /* Enable Receives */
3108 ew32(RCTL, rctl);
3109}
3110
3111/**
3112 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3113 * @netdev: network interface device structure
3114 *
3115 * Writes multicast address list to the MTA hash table.
3116 * Returns: -ENOMEM on failure
3117 * 0 on no addresses written
3118 * X on writing X addresses to MTA
3119 */
3120static int e1000e_write_mc_addr_list(struct net_device *netdev)
3121{
3122 struct e1000_adapter *adapter = netdev_priv(netdev);
3123 struct e1000_hw *hw = &adapter->hw;
3124 struct netdev_hw_addr *ha;
3125 u8 *mta_list;
3126 int i;
3127
3128 if (netdev_mc_empty(netdev)) {
3129 /* nothing to program, so clear mc list */
3130 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3131 return 0;
3132 }
3133
3134 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3135 if (!mta_list)
3136 return -ENOMEM;
3137
3138 /* update_mc_addr_list expects a packed array of only addresses. */
3139 i = 0;
3140 netdev_for_each_mc_addr(ha, netdev)
3141 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3142
3143 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3144 kfree(mta_list);
3145
3146 return netdev_mc_count(netdev);
3147}
3148
3149/**
3150 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3151 * @netdev: network interface device structure
3152 *
3153 * Writes unicast address list to the RAR table.
3154 * Returns: -ENOMEM on failure/insufficient address space
3155 * 0 on no addresses written
3156 * X on writing X addresses to the RAR table
3157 **/
3158static int e1000e_write_uc_addr_list(struct net_device *netdev)
3159{
3160 struct e1000_adapter *adapter = netdev_priv(netdev);
3161 struct e1000_hw *hw = &adapter->hw;
3162 unsigned int rar_entries = hw->mac.rar_entry_count;
3163 int count = 0;
3164
3165 /* save a rar entry for our hardware address */
3166 rar_entries--;
3167
3168 /* save a rar entry for the LAA workaround */
3169 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3170 rar_entries--;
3171
3172 /* return ENOMEM indicating insufficient memory for addresses */
3173 if (netdev_uc_count(netdev) > rar_entries)
3174 return -ENOMEM;
3175
3176 if (!netdev_uc_empty(netdev) && rar_entries) {
3177 struct netdev_hw_addr *ha;
3178
3179 /*
3180 * write the addresses in reverse order to avoid write
3181 * combining
3182 */
3183 netdev_for_each_uc_addr(ha, netdev) {
3184 if (!rar_entries)
3185 break;
3186 hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3187 count++;
3188 }
3189 }
3190
3191 /* zero out the remaining RAR entries not used above */
3192 for (; rar_entries > 0; rar_entries--) {
3193 ew32(RAH(rar_entries), 0);
3194 ew32(RAL(rar_entries), 0);
3195 }
3196 e1e_flush();
3197
3198 return count;
3199}
3200
3201/**
3202 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3203 * @netdev: network interface device structure
3204 *
3205 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3206 * address list or the network interface flags are updated. This routine is
3207 * responsible for configuring the hardware for proper unicast, multicast,
3208 * promiscuous mode, and all-multi behavior.
3209 **/
3210static void e1000e_set_rx_mode(struct net_device *netdev)
3211{
3212 struct e1000_adapter *adapter = netdev_priv(netdev);
3213 struct e1000_hw *hw = &adapter->hw;
3214 u32 rctl;
3215
3216 /* Check for Promiscuous and All Multicast modes */
3217 rctl = er32(RCTL);
3218
3219 /* clear the affected bits */
3220 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3221
3222 if (netdev->flags & IFF_PROMISC) {
3223 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3224 /* Do not hardware filter VLANs in promisc mode */
3225 e1000e_vlan_filter_disable(adapter);
3226 } else {
3227 int count;
3228
3229 if (netdev->flags & IFF_ALLMULTI) {
3230 rctl |= E1000_RCTL_MPE;
3231 } else {
3232 /*
3233 * Write addresses to the MTA, if the attempt fails
3234 * then we should just turn on promiscuous mode so
3235 * that we can at least receive multicast traffic
3236 */
3237 count = e1000e_write_mc_addr_list(netdev);
3238 if (count < 0)
3239 rctl |= E1000_RCTL_MPE;
3240 }
3241 e1000e_vlan_filter_enable(adapter);
3242 /*
3243 * Write addresses to available RAR registers, if there is not
3244 * sufficient space to store all the addresses then enable
3245 * unicast promiscuous mode
3246 */
3247 count = e1000e_write_uc_addr_list(netdev);
3248 if (count < 0)
3249 rctl |= E1000_RCTL_UPE;
3250 }
3251
3252 ew32(RCTL, rctl);
3253
3254 if (netdev->features & NETIF_F_HW_VLAN_RX)
3255 e1000e_vlan_strip_enable(adapter);
3256 else
3257 e1000e_vlan_strip_disable(adapter);
3258}
3259
3260static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3261{
3262 struct e1000_hw *hw = &adapter->hw;
3263 u32 mrqc, rxcsum;
3264 int i;
3265 static const u32 rsskey[10] = {
3266 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0,
3267 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe
3268 };
3269
3270 /* Fill out hash function seed */
3271 for (i = 0; i < 10; i++)
3272 ew32(RSSRK(i), rsskey[i]);
3273
3274 /* Direct all traffic to queue 0 */
3275 for (i = 0; i < 32; i++)
3276 ew32(RETA(i), 0);
3277
3278 /*
3279 * Disable raw packet checksumming so that RSS hash is placed in
3280 * descriptor on writeback.
3281 */
3282 rxcsum = er32(RXCSUM);
3283 rxcsum |= E1000_RXCSUM_PCSD;
3284
3285 ew32(RXCSUM, rxcsum);
3286
3287 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3288 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3289 E1000_MRQC_RSS_FIELD_IPV6 |
3290 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3291 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3292
3293 ew32(MRQC, mrqc);
3294}
3295
3296/**
3297 * e1000_configure - configure the hardware for Rx and Tx
3298 * @adapter: private board structure
3299 **/
3300static void e1000_configure(struct e1000_adapter *adapter)
3301{
3302 struct e1000_ring *rx_ring = adapter->rx_ring;
3303
3304 e1000e_set_rx_mode(adapter->netdev);
3305
3306 e1000_restore_vlan(adapter);
3307 e1000_init_manageability_pt(adapter);
3308
3309 e1000_configure_tx(adapter);
3310
3311 if (adapter->netdev->features & NETIF_F_RXHASH)
3312 e1000e_setup_rss_hash(adapter);
3313 e1000_setup_rctl(adapter);
3314 e1000_configure_rx(adapter);
3315 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3316}
3317
3318/**
3319 * e1000e_power_up_phy - restore link in case the phy was powered down
3320 * @adapter: address of board private structure
3321 *
3322 * The phy may be powered down to save power and turn off link when the
3323 * driver is unloaded and wake on lan is not enabled (among others)
3324 * *** this routine MUST be followed by a call to e1000e_reset ***
3325 **/
3326void e1000e_power_up_phy(struct e1000_adapter *adapter)
3327{
3328 if (adapter->hw.phy.ops.power_up)
3329 adapter->hw.phy.ops.power_up(&adapter->hw);
3330
3331 adapter->hw.mac.ops.setup_link(&adapter->hw);
3332}
3333
3334/**
3335 * e1000_power_down_phy - Power down the PHY
3336 *
3337 * Power down the PHY so no link is implied when interface is down.
3338 * The PHY cannot be powered down if management or WoL is active.
3339 */
3340static void e1000_power_down_phy(struct e1000_adapter *adapter)
3341{
3342 /* WoL is enabled */
3343 if (adapter->wol)
3344 return;
3345
3346 if (adapter->hw.phy.ops.power_down)
3347 adapter->hw.phy.ops.power_down(&adapter->hw);
3348}
3349
3350/**
3351 * e1000e_reset - bring the hardware into a known good state
3352 *
3353 * This function boots the hardware and enables some settings that
3354 * require a configuration cycle of the hardware - those cannot be
3355 * set/changed during runtime. After reset the device needs to be
3356 * properly configured for Rx, Tx etc.
3357 */
3358void e1000e_reset(struct e1000_adapter *adapter)
3359{
3360 struct e1000_mac_info *mac = &adapter->hw.mac;
3361 struct e1000_fc_info *fc = &adapter->hw.fc;
3362 struct e1000_hw *hw = &adapter->hw;
3363 u32 tx_space, min_tx_space, min_rx_space;
3364 u32 pba = adapter->pba;
3365 u16 hwm;
3366
3367 /* reset Packet Buffer Allocation to default */
3368 ew32(PBA, pba);
3369
3370 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
3371 /*
3372 * To maintain wire speed transmits, the Tx FIFO should be
3373 * large enough to accommodate two full transmit packets,
3374 * rounded up to the next 1KB and expressed in KB. Likewise,
3375 * the Rx FIFO should be large enough to accommodate at least
3376 * one full receive packet and is similarly rounded up and
3377 * expressed in KB.
3378 */
3379 pba = er32(PBA);
3380 /* upper 16 bits has Tx packet buffer allocation size in KB */
3381 tx_space = pba >> 16;
3382 /* lower 16 bits has Rx packet buffer allocation size in KB */
3383 pba &= 0xffff;
3384 /*
3385 * the Tx fifo also stores 16 bytes of information about the Tx
3386 * but don't include ethernet FCS because hardware appends it
3387 */
3388 min_tx_space = (adapter->max_frame_size +
3389 sizeof(struct e1000_tx_desc) -
3390 ETH_FCS_LEN) * 2;
3391 min_tx_space = ALIGN(min_tx_space, 1024);
3392 min_tx_space >>= 10;
3393 /* software strips receive CRC, so leave room for it */
3394 min_rx_space = adapter->max_frame_size;
3395 min_rx_space = ALIGN(min_rx_space, 1024);
3396 min_rx_space >>= 10;
3397
3398 /*
3399 * If current Tx allocation is less than the min Tx FIFO size,
3400 * and the min Tx FIFO size is less than the current Rx FIFO
3401 * allocation, take space away from current Rx allocation
3402 */
3403 if ((tx_space < min_tx_space) &&
3404 ((min_tx_space - tx_space) < pba)) {
3405 pba -= min_tx_space - tx_space;
3406
3407 /*
3408 * if short on Rx space, Rx wins and must trump Tx
3409 * adjustment or use Early Receive if available
3410 */
3411 if (pba < min_rx_space)
3412 pba = min_rx_space;
3413 }
3414
3415 ew32(PBA, pba);
3416 }
3417
3418 /*
3419 * flow control settings
3420 *
3421 * The high water mark must be low enough to fit one full frame
3422 * (or the size used for early receive) above it in the Rx FIFO.
3423 * Set it to the lower of:
3424 * - 90% of the Rx FIFO size, and
3425 * - the full Rx FIFO size minus one full frame
3426 */
3427 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3428 fc->pause_time = 0xFFFF;
3429 else
3430 fc->pause_time = E1000_FC_PAUSE_TIME;
3431 fc->send_xon = true;
3432 fc->current_mode = fc->requested_mode;
3433
3434 switch (hw->mac.type) {
3435 case e1000_ich9lan:
3436 case e1000_ich10lan:
3437 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3438 pba = 14;
3439 ew32(PBA, pba);
3440 fc->high_water = 0x2800;
3441 fc->low_water = fc->high_water - 8;
3442 break;
3443 }
3444 /* fall-through */
3445 default:
3446 hwm = min(((pba << 10) * 9 / 10),
3447 ((pba << 10) - adapter->max_frame_size));
3448
3449 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3450 fc->low_water = fc->high_water - 8;
3451 break;
3452 case e1000_pchlan:
3453 /*
3454 * Workaround PCH LOM adapter hangs with certain network
3455 * loads. If hangs persist, try disabling Tx flow control.
3456 */
3457 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3458 fc->high_water = 0x3500;
3459 fc->low_water = 0x1500;
3460 } else {
3461 fc->high_water = 0x5000;
3462 fc->low_water = 0x3000;
3463 }
3464 fc->refresh_time = 0x1000;
3465 break;
3466 case e1000_pch2lan:
3467 case e1000_pch_lpt:
3468 fc->high_water = 0x05C20;
3469 fc->low_water = 0x05048;
3470 fc->pause_time = 0x0650;
3471 fc->refresh_time = 0x0400;
3472 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3473 pba = 14;
3474 ew32(PBA, pba);
3475 }
3476 break;
3477 }
3478
3479 /*
3480 * Alignment of Tx data is on an arbitrary byte boundary with the
3481 * maximum size per Tx descriptor limited only to the transmit
3482 * allocation of the packet buffer minus 96 bytes with an upper
3483 * limit of 24KB due to receive synchronization limitations.
3484 */
3485 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
3486 24 << 10);
3487
3488 /*
3489 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3490 * fit in receive buffer.
3491 */
3492 if (adapter->itr_setting & 0x3) {
3493 if ((adapter->max_frame_size * 2) > (pba << 10)) {
3494 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3495 dev_info(&adapter->pdev->dev,
3496 "Interrupt Throttle Rate turned off\n");
3497 adapter->flags2 |= FLAG2_DISABLE_AIM;
3498 ew32(ITR, 0);
3499 }
3500 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3501 dev_info(&adapter->pdev->dev,
3502 "Interrupt Throttle Rate turned on\n");
3503 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3504 adapter->itr = 20000;
3505 ew32(ITR, 1000000000 / (adapter->itr * 256));
3506 }
3507 }
3508
3509 /* Allow time for pending master requests to run */
3510 mac->ops.reset_hw(hw);
3511
3512 /*
3513 * For parts with AMT enabled, let the firmware know
3514 * that the network interface is in control
3515 */
3516 if (adapter->flags & FLAG_HAS_AMT)
3517 e1000e_get_hw_control(adapter);
3518
3519 ew32(WUC, 0);
3520
3521 if (mac->ops.init_hw(hw))
3522 e_err("Hardware Error\n");
3523
3524 e1000_update_mng_vlan(adapter);
3525
3526 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3527 ew32(VET, ETH_P_8021Q);
3528
3529 e1000e_reset_adaptive(hw);
3530
3531 if (!netif_running(adapter->netdev) &&
3532 !test_bit(__E1000_TESTING, &adapter->state)) {
3533 e1000_power_down_phy(adapter);
3534 return;
3535 }
3536
3537 e1000_get_phy_info(hw);
3538
3539 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3540 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
3541 u16 phy_data = 0;
3542 /*
3543 * speed up time to link by disabling smart power down, ignore
3544 * the return value of this function because there is nothing
3545 * different we would do if it failed
3546 */
3547 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3548 phy_data &= ~IGP02E1000_PM_SPD;
3549 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3550 }
3551}
3552
3553int e1000e_up(struct e1000_adapter *adapter)
3554{
3555 struct e1000_hw *hw = &adapter->hw;
3556
3557 /* hardware has been reset, we need to reload some things */
3558 e1000_configure(adapter);
3559
3560 clear_bit(__E1000_DOWN, &adapter->state);
3561
3562 if (adapter->msix_entries)
3563 e1000_configure_msix(adapter);
3564 e1000_irq_enable(adapter);
3565
3566 netif_start_queue(adapter->netdev);
3567
3568 /* fire a link change interrupt to start the watchdog */
3569 if (adapter->msix_entries)
3570 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3571 else
3572 ew32(ICS, E1000_ICS_LSC);
3573
3574 return 0;
3575}
3576
3577static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3578{
3579 struct e1000_hw *hw = &adapter->hw;
3580
3581 if (!(adapter->flags2 & FLAG2_DMA_BURST))
3582 return;
3583
3584 /* flush pending descriptor writebacks to memory */
3585 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3586 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3587
3588 /* execute the writes immediately */
3589 e1e_flush();
3590
3591 /*
3592 * due to rare timing issues, write to TIDV/RDTR again to ensure the
3593 * write is successful
3594 */
3595 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3596 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3597
3598 /* execute the writes immediately */
3599 e1e_flush();
3600}
3601
3602static void e1000e_update_stats(struct e1000_adapter *adapter);
3603
3604void e1000e_down(struct e1000_adapter *adapter)
3605{
3606 struct net_device *netdev = adapter->netdev;
3607 struct e1000_hw *hw = &adapter->hw;
3608 u32 tctl, rctl;
3609
3610 /*
3611 * signal that we're down so the interrupt handler does not
3612 * reschedule our watchdog timer
3613 */
3614 set_bit(__E1000_DOWN, &adapter->state);
3615
3616 /* disable receives in the hardware */
3617 rctl = er32(RCTL);
3618 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3619 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3620 /* flush and sleep below */
3621
3622 netif_stop_queue(netdev);
3623
3624 /* disable transmits in the hardware */
3625 tctl = er32(TCTL);
3626 tctl &= ~E1000_TCTL_EN;
3627 ew32(TCTL, tctl);
3628
3629 /* flush both disables and wait for them to finish */
3630 e1e_flush();
3631 usleep_range(10000, 20000);
3632
3633 e1000_irq_disable(adapter);
3634
3635 del_timer_sync(&adapter->watchdog_timer);
3636 del_timer_sync(&adapter->phy_info_timer);
3637
3638 netif_carrier_off(netdev);
3639
3640 spin_lock(&adapter->stats64_lock);
3641 e1000e_update_stats(adapter);
3642 spin_unlock(&adapter->stats64_lock);
3643
3644 e1000e_flush_descriptors(adapter);
3645 e1000_clean_tx_ring(adapter->tx_ring);
3646 e1000_clean_rx_ring(adapter->rx_ring);
3647
3648 adapter->link_speed = 0;
3649 adapter->link_duplex = 0;
3650
3651 if (!pci_channel_offline(adapter->pdev))
3652 e1000e_reset(adapter);
3653
3654 /*
3655 * TODO: for power management, we could drop the link and
3656 * pci_disable_device here.
3657 */
3658}
3659
3660void e1000e_reinit_locked(struct e1000_adapter *adapter)
3661{
3662 might_sleep();
3663 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3664 usleep_range(1000, 2000);
3665 e1000e_down(adapter);
3666 e1000e_up(adapter);
3667 clear_bit(__E1000_RESETTING, &adapter->state);
3668}
3669
3670/**
3671 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3672 * @adapter: board private structure to initialize
3673 *
3674 * e1000_sw_init initializes the Adapter private data structure.
3675 * Fields are initialized based on PCI device information and
3676 * OS network device settings (MTU size).
3677 **/
3678static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3679{
3680 struct net_device *netdev = adapter->netdev;
3681
3682 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3683 adapter->rx_ps_bsize0 = 128;
3684 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3685 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3686 adapter->tx_ring_count = E1000_DEFAULT_TXD;
3687 adapter->rx_ring_count = E1000_DEFAULT_RXD;
3688
3689 spin_lock_init(&adapter->stats64_lock);
3690
3691 e1000e_set_interrupt_capability(adapter);
3692
3693 if (e1000_alloc_queues(adapter))
3694 return -ENOMEM;
3695
3696 /* Explicitly disable IRQ since the NIC can be in any state. */
3697 e1000_irq_disable(adapter);
3698
3699 set_bit(__E1000_DOWN, &adapter->state);
3700 return 0;
3701}
3702
3703/**
3704 * e1000_intr_msi_test - Interrupt Handler
3705 * @irq: interrupt number
3706 * @data: pointer to a network interface device structure
3707 **/
3708static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3709{
3710 struct net_device *netdev = data;
3711 struct e1000_adapter *adapter = netdev_priv(netdev);
3712 struct e1000_hw *hw = &adapter->hw;
3713 u32 icr = er32(ICR);
3714
3715 e_dbg("icr is %08X\n", icr);
3716 if (icr & E1000_ICR_RXSEQ) {
3717 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3718 wmb();
3719 }
3720
3721 return IRQ_HANDLED;
3722}
3723
3724/**
3725 * e1000_test_msi_interrupt - Returns 0 for successful test
3726 * @adapter: board private struct
3727 *
3728 * code flow taken from tg3.c
3729 **/
3730static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3731{
3732 struct net_device *netdev = adapter->netdev;
3733 struct e1000_hw *hw = &adapter->hw;
3734 int err;
3735
3736 /* poll_enable hasn't been called yet, so don't need disable */
3737 /* clear any pending events */
3738 er32(ICR);
3739
3740 /* free the real vector and request a test handler */
3741 e1000_free_irq(adapter);
3742 e1000e_reset_interrupt_capability(adapter);
3743
3744 /* Assume that the test fails, if it succeeds then the test
3745 * MSI irq handler will unset this flag */
3746 adapter->flags |= FLAG_MSI_TEST_FAILED;
3747
3748 err = pci_enable_msi(adapter->pdev);
3749 if (err)
3750 goto msi_test_failed;
3751
3752 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
3753 netdev->name, netdev);
3754 if (err) {
3755 pci_disable_msi(adapter->pdev);
3756 goto msi_test_failed;
3757 }
3758
3759 wmb();
3760
3761 e1000_irq_enable(adapter);
3762
3763 /* fire an unusual interrupt on the test handler */
3764 ew32(ICS, E1000_ICS_RXSEQ);
3765 e1e_flush();
3766 msleep(100);
3767
3768 e1000_irq_disable(adapter);
3769
3770 rmb();
3771
3772 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
3773 adapter->int_mode = E1000E_INT_MODE_LEGACY;
3774 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3775 } else {
3776 e_dbg("MSI interrupt test succeeded!\n");
3777 }
3778
3779 free_irq(adapter->pdev->irq, netdev);
3780 pci_disable_msi(adapter->pdev);
3781
3782msi_test_failed:
3783 e1000e_set_interrupt_capability(adapter);
3784 return e1000_request_irq(adapter);
3785}
3786
3787/**
3788 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3789 * @adapter: board private struct
3790 *
3791 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3792 **/
3793static int e1000_test_msi(struct e1000_adapter *adapter)
3794{
3795 int err;
3796 u16 pci_cmd;
3797
3798 if (!(adapter->flags & FLAG_MSI_ENABLED))
3799 return 0;
3800
3801 /* disable SERR in case the MSI write causes a master abort */
3802 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3803 if (pci_cmd & PCI_COMMAND_SERR)
3804 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3805 pci_cmd & ~PCI_COMMAND_SERR);
3806
3807 err = e1000_test_msi_interrupt(adapter);
3808
3809 /* re-enable SERR */
3810 if (pci_cmd & PCI_COMMAND_SERR) {
3811 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3812 pci_cmd |= PCI_COMMAND_SERR;
3813 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3814 }
3815
3816 return err;
3817}
3818
3819/**
3820 * e1000_open - Called when a network interface is made active
3821 * @netdev: network interface device structure
3822 *
3823 * Returns 0 on success, negative value on failure
3824 *
3825 * The open entry point is called when a network interface is made
3826 * active by the system (IFF_UP). At this point all resources needed
3827 * for transmit and receive operations are allocated, the interrupt
3828 * handler is registered with the OS, the watchdog timer is started,
3829 * and the stack is notified that the interface is ready.
3830 **/
3831static int e1000_open(struct net_device *netdev)
3832{
3833 struct e1000_adapter *adapter = netdev_priv(netdev);
3834 struct e1000_hw *hw = &adapter->hw;
3835 struct pci_dev *pdev = adapter->pdev;
3836 int err;
3837
3838 /* disallow open during test */
3839 if (test_bit(__E1000_TESTING, &adapter->state))
3840 return -EBUSY;
3841
3842 pm_runtime_get_sync(&pdev->dev);
3843
3844 netif_carrier_off(netdev);
3845
3846 /* allocate transmit descriptors */
3847 err = e1000e_setup_tx_resources(adapter->tx_ring);
3848 if (err)
3849 goto err_setup_tx;
3850
3851 /* allocate receive descriptors */
3852 err = e1000e_setup_rx_resources(adapter->rx_ring);
3853 if (err)
3854 goto err_setup_rx;
3855
3856 /*
3857 * If AMT is enabled, let the firmware know that the network
3858 * interface is now open and reset the part to a known state.
3859 */
3860 if (adapter->flags & FLAG_HAS_AMT) {
3861 e1000e_get_hw_control(adapter);
3862 e1000e_reset(adapter);
3863 }
3864
3865 e1000e_power_up_phy(adapter);
3866
3867 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3868 if ((adapter->hw.mng_cookie.status &
3869 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3870 e1000_update_mng_vlan(adapter);
3871
3872 /* DMA latency requirement to workaround jumbo issue */
3873 if (adapter->hw.mac.type == e1000_pch2lan)
3874 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3875 PM_QOS_CPU_DMA_LATENCY,
3876 PM_QOS_DEFAULT_VALUE);
3877
3878 /*
3879 * before we allocate an interrupt, we must be ready to handle it.
3880 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3881 * as soon as we call pci_request_irq, so we have to setup our
3882 * clean_rx handler before we do so.
3883 */
3884 e1000_configure(adapter);
3885
3886 err = e1000_request_irq(adapter);
3887 if (err)
3888 goto err_req_irq;
3889
3890 /*
3891 * Work around PCIe errata with MSI interrupts causing some chipsets to
3892 * ignore e1000e MSI messages, which means we need to test our MSI
3893 * interrupt now
3894 */
3895 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
3896 err = e1000_test_msi(adapter);
3897 if (err) {
3898 e_err("Interrupt allocation failed\n");
3899 goto err_req_irq;
3900 }
3901 }
3902
3903 /* From here on the code is the same as e1000e_up() */
3904 clear_bit(__E1000_DOWN, &adapter->state);
3905
3906 napi_enable(&adapter->napi);
3907
3908 e1000_irq_enable(adapter);
3909
3910 adapter->tx_hang_recheck = false;
3911 netif_start_queue(netdev);
3912
3913 adapter->idle_check = true;
3914 pm_runtime_put(&pdev->dev);
3915
3916 /* fire a link status change interrupt to start the watchdog */
3917 if (adapter->msix_entries)
3918 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3919 else
3920 ew32(ICS, E1000_ICS_LSC);
3921
3922 return 0;
3923
3924err_req_irq:
3925 e1000e_release_hw_control(adapter);
3926 e1000_power_down_phy(adapter);
3927 e1000e_free_rx_resources(adapter->rx_ring);
3928err_setup_rx:
3929 e1000e_free_tx_resources(adapter->tx_ring);
3930err_setup_tx:
3931 e1000e_reset(adapter);
3932 pm_runtime_put_sync(&pdev->dev);
3933
3934 return err;
3935}
3936
3937/**
3938 * e1000_close - Disables a network interface
3939 * @netdev: network interface device structure
3940 *
3941 * Returns 0, this is not allowed to fail
3942 *
3943 * The close entry point is called when an interface is de-activated
3944 * by the OS. The hardware is still under the drivers control, but
3945 * needs to be disabled. A global MAC reset is issued to stop the
3946 * hardware, and all transmit and receive resources are freed.
3947 **/
3948static int e1000_close(struct net_device *netdev)
3949{
3950 struct e1000_adapter *adapter = netdev_priv(netdev);
3951 struct pci_dev *pdev = adapter->pdev;
3952 int count = E1000_CHECK_RESET_COUNT;
3953
3954 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
3955 usleep_range(10000, 20000);
3956
3957 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3958
3959 pm_runtime_get_sync(&pdev->dev);
3960
3961 napi_disable(&adapter->napi);
3962
3963 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3964 e1000e_down(adapter);
3965 e1000_free_irq(adapter);
3966 }
3967 e1000_power_down_phy(adapter);
3968
3969 e1000e_free_tx_resources(adapter->tx_ring);
3970 e1000e_free_rx_resources(adapter->rx_ring);
3971
3972 /*
3973 * kill manageability vlan ID if supported, but not if a vlan with
3974 * the same ID is registered on the host OS (let 8021q kill it)
3975 */
3976 if (adapter->hw.mng_cookie.status &
3977 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
3978 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3979
3980 /*
3981 * If AMT is enabled, let the firmware know that the network
3982 * interface is now closed
3983 */
3984 if ((adapter->flags & FLAG_HAS_AMT) &&
3985 !test_bit(__E1000_TESTING, &adapter->state))
3986 e1000e_release_hw_control(adapter);
3987
3988 if (adapter->hw.mac.type == e1000_pch2lan)
3989 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
3990
3991 pm_runtime_put_sync(&pdev->dev);
3992
3993 return 0;
3994}
3995/**
3996 * e1000_set_mac - Change the Ethernet Address of the NIC
3997 * @netdev: network interface device structure
3998 * @p: pointer to an address structure
3999 *
4000 * Returns 0 on success, negative on failure
4001 **/
4002static int e1000_set_mac(struct net_device *netdev, void *p)
4003{
4004 struct e1000_adapter *adapter = netdev_priv(netdev);
4005 struct e1000_hw *hw = &adapter->hw;
4006 struct sockaddr *addr = p;
4007
4008 if (!is_valid_ether_addr(addr->sa_data))
4009 return -EADDRNOTAVAIL;
4010
4011 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4012 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4013
4014 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4015
4016 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4017 /* activate the work around */
4018 e1000e_set_laa_state_82571(&adapter->hw, 1);
4019
4020 /*
4021 * Hold a copy of the LAA in RAR[14] This is done so that
4022 * between the time RAR[0] gets clobbered and the time it
4023 * gets fixed (in e1000_watchdog), the actual LAA is in one
4024 * of the RARs and no incoming packets directed to this port
4025 * are dropped. Eventually the LAA will be in RAR[0] and
4026 * RAR[14]
4027 */
4028 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4029 adapter->hw.mac.rar_entry_count - 1);
4030 }
4031
4032 return 0;
4033}
4034
4035/**
4036 * e1000e_update_phy_task - work thread to update phy
4037 * @work: pointer to our work struct
4038 *
4039 * this worker thread exists because we must acquire a
4040 * semaphore to read the phy, which we could msleep while
4041 * waiting for it, and we can't msleep in a timer.
4042 **/
4043static void e1000e_update_phy_task(struct work_struct *work)
4044{
4045 struct e1000_adapter *adapter = container_of(work,
4046 struct e1000_adapter, update_phy_task);
4047
4048 if (test_bit(__E1000_DOWN, &adapter->state))
4049 return;
4050
4051 e1000_get_phy_info(&adapter->hw);
4052}
4053
4054/*
4055 * Need to wait a few seconds after link up to get diagnostic information from
4056 * the phy
4057 */
4058static void e1000_update_phy_info(unsigned long data)
4059{
4060 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4061
4062 if (test_bit(__E1000_DOWN, &adapter->state))
4063 return;
4064
4065 schedule_work(&adapter->update_phy_task);
4066}
4067
4068/**
4069 * e1000e_update_phy_stats - Update the PHY statistics counters
4070 * @adapter: board private structure
4071 *
4072 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4073 **/
4074static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4075{
4076 struct e1000_hw *hw = &adapter->hw;
4077 s32 ret_val;
4078 u16 phy_data;
4079
4080 ret_val = hw->phy.ops.acquire(hw);
4081 if (ret_val)
4082 return;
4083
4084 /*
4085 * A page set is expensive so check if already on desired page.
4086 * If not, set to the page with the PHY status registers.
4087 */
4088 hw->phy.addr = 1;
4089 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4090 &phy_data);
4091 if (ret_val)
4092 goto release;
4093 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4094 ret_val = hw->phy.ops.set_page(hw,
4095 HV_STATS_PAGE << IGP_PAGE_SHIFT);
4096 if (ret_val)
4097 goto release;
4098 }
4099
4100 /* Single Collision Count */
4101 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4102 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4103 if (!ret_val)
4104 adapter->stats.scc += phy_data;
4105
4106 /* Excessive Collision Count */
4107 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4108 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4109 if (!ret_val)
4110 adapter->stats.ecol += phy_data;
4111
4112 /* Multiple Collision Count */
4113 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4114 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4115 if (!ret_val)
4116 adapter->stats.mcc += phy_data;
4117
4118 /* Late Collision Count */
4119 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4120 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4121 if (!ret_val)
4122 adapter->stats.latecol += phy_data;
4123
4124 /* Collision Count - also used for adaptive IFS */
4125 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4126 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4127 if (!ret_val)
4128 hw->mac.collision_delta = phy_data;
4129
4130 /* Defer Count */
4131 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4132 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4133 if (!ret_val)
4134 adapter->stats.dc += phy_data;
4135
4136 /* Transmit with no CRS */
4137 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4138 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4139 if (!ret_val)
4140 adapter->stats.tncrs += phy_data;
4141
4142release:
4143 hw->phy.ops.release(hw);
4144}
4145
4146/**
4147 * e1000e_update_stats - Update the board statistics counters
4148 * @adapter: board private structure
4149 **/
4150static void e1000e_update_stats(struct e1000_adapter *adapter)
4151{
4152 struct net_device *netdev = adapter->netdev;
4153 struct e1000_hw *hw = &adapter->hw;
4154 struct pci_dev *pdev = adapter->pdev;
4155
4156 /*
4157 * Prevent stats update while adapter is being reset, or if the pci
4158 * connection is down.
4159 */
4160 if (adapter->link_speed == 0)
4161 return;
4162 if (pci_channel_offline(pdev))
4163 return;
4164
4165 adapter->stats.crcerrs += er32(CRCERRS);
4166 adapter->stats.gprc += er32(GPRC);
4167 adapter->stats.gorc += er32(GORCL);
4168 er32(GORCH); /* Clear gorc */
4169 adapter->stats.bprc += er32(BPRC);
4170 adapter->stats.mprc += er32(MPRC);
4171 adapter->stats.roc += er32(ROC);
4172
4173 adapter->stats.mpc += er32(MPC);
4174
4175 /* Half-duplex statistics */
4176 if (adapter->link_duplex == HALF_DUPLEX) {
4177 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4178 e1000e_update_phy_stats(adapter);
4179 } else {
4180 adapter->stats.scc += er32(SCC);
4181 adapter->stats.ecol += er32(ECOL);
4182 adapter->stats.mcc += er32(MCC);
4183 adapter->stats.latecol += er32(LATECOL);
4184 adapter->stats.dc += er32(DC);
4185
4186 hw->mac.collision_delta = er32(COLC);
4187
4188 if ((hw->mac.type != e1000_82574) &&
4189 (hw->mac.type != e1000_82583))
4190 adapter->stats.tncrs += er32(TNCRS);
4191 }
4192 adapter->stats.colc += hw->mac.collision_delta;
4193 }
4194
4195 adapter->stats.xonrxc += er32(XONRXC);
4196 adapter->stats.xontxc += er32(XONTXC);
4197 adapter->stats.xoffrxc += er32(XOFFRXC);
4198 adapter->stats.xofftxc += er32(XOFFTXC);
4199 adapter->stats.gptc += er32(GPTC);
4200 adapter->stats.gotc += er32(GOTCL);
4201 er32(GOTCH); /* Clear gotc */
4202 adapter->stats.rnbc += er32(RNBC);
4203 adapter->stats.ruc += er32(RUC);
4204
4205 adapter->stats.mptc += er32(MPTC);
4206 adapter->stats.bptc += er32(BPTC);
4207
4208 /* used for adaptive IFS */
4209
4210 hw->mac.tx_packet_delta = er32(TPT);
4211 adapter->stats.tpt += hw->mac.tx_packet_delta;
4212
4213 adapter->stats.algnerrc += er32(ALGNERRC);
4214 adapter->stats.rxerrc += er32(RXERRC);
4215 adapter->stats.cexterr += er32(CEXTERR);
4216 adapter->stats.tsctc += er32(TSCTC);
4217 adapter->stats.tsctfc += er32(TSCTFC);
4218
4219 /* Fill out the OS statistics structure */
4220 netdev->stats.multicast = adapter->stats.mprc;
4221 netdev->stats.collisions = adapter->stats.colc;
4222
4223 /* Rx Errors */
4224
4225 /*
4226 * RLEC on some newer hardware can be incorrect so build
4227 * our own version based on RUC and ROC
4228 */
4229 netdev->stats.rx_errors = adapter->stats.rxerrc +
4230 adapter->stats.crcerrs + adapter->stats.algnerrc +
4231 adapter->stats.ruc + adapter->stats.roc +
4232 adapter->stats.cexterr;
4233 netdev->stats.rx_length_errors = adapter->stats.ruc +
4234 adapter->stats.roc;
4235 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4236 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4237 netdev->stats.rx_missed_errors = adapter->stats.mpc;
4238
4239 /* Tx Errors */
4240 netdev->stats.tx_errors = adapter->stats.ecol +
4241 adapter->stats.latecol;
4242 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4243 netdev->stats.tx_window_errors = adapter->stats.latecol;
4244 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4245
4246 /* Tx Dropped needs to be maintained elsewhere */
4247
4248 /* Management Stats */
4249 adapter->stats.mgptc += er32(MGTPTC);
4250 adapter->stats.mgprc += er32(MGTPRC);
4251 adapter->stats.mgpdc += er32(MGTPDC);
4252}
4253
4254/**
4255 * e1000_phy_read_status - Update the PHY register status snapshot
4256 * @adapter: board private structure
4257 **/
4258static void e1000_phy_read_status(struct e1000_adapter *adapter)
4259{
4260 struct e1000_hw *hw = &adapter->hw;
4261 struct e1000_phy_regs *phy = &adapter->phy_regs;
4262
4263 if ((er32(STATUS) & E1000_STATUS_LU) &&
4264 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4265 int ret_val;
4266
4267 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4268 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4269 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4270 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4271 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4272 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4273 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4274 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4275 if (ret_val)
4276 e_warn("Error reading PHY register\n");
4277 } else {
4278 /*
4279 * Do not read PHY registers if link is not up
4280 * Set values to typical power-on defaults
4281 */
4282 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4283 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4284 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4285 BMSR_ERCAP);
4286 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4287 ADVERTISE_ALL | ADVERTISE_CSMA);
4288 phy->lpa = 0;
4289 phy->expansion = EXPANSION_ENABLENPAGE;
4290 phy->ctrl1000 = ADVERTISE_1000FULL;
4291 phy->stat1000 = 0;
4292 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4293 }
4294}
4295
4296static void e1000_print_link_info(struct e1000_adapter *adapter)
4297{
4298 struct e1000_hw *hw = &adapter->hw;
4299 u32 ctrl = er32(CTRL);
4300
4301 /* Link status message must follow this format for user tools */
4302 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4303 adapter->netdev->name,
4304 adapter->link_speed,
4305 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
4306 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
4307 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
4308 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
4309}
4310
4311static bool e1000e_has_link(struct e1000_adapter *adapter)
4312{
4313 struct e1000_hw *hw = &adapter->hw;
4314 bool link_active = false;
4315 s32 ret_val = 0;
4316
4317 /*
4318 * get_link_status is set on LSC (link status) interrupt or
4319 * Rx sequence error interrupt. get_link_status will stay
4320 * false until the check_for_link establishes link
4321 * for copper adapters ONLY
4322 */
4323 switch (hw->phy.media_type) {
4324 case e1000_media_type_copper:
4325 if (hw->mac.get_link_status) {
4326 ret_val = hw->mac.ops.check_for_link(hw);
4327 link_active = !hw->mac.get_link_status;
4328 } else {
4329 link_active = true;
4330 }
4331 break;
4332 case e1000_media_type_fiber:
4333 ret_val = hw->mac.ops.check_for_link(hw);
4334 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4335 break;
4336 case e1000_media_type_internal_serdes:
4337 ret_val = hw->mac.ops.check_for_link(hw);
4338 link_active = adapter->hw.mac.serdes_has_link;
4339 break;
4340 default:
4341 case e1000_media_type_unknown:
4342 break;
4343 }
4344
4345 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4346 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4347 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
4348 e_info("Gigabit has been disabled, downgrading speed\n");
4349 }
4350
4351 return link_active;
4352}
4353
4354static void e1000e_enable_receives(struct e1000_adapter *adapter)
4355{
4356 /* make sure the receive unit is started */
4357 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4358 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4359 struct e1000_hw *hw = &adapter->hw;
4360 u32 rctl = er32(RCTL);
4361 ew32(RCTL, rctl | E1000_RCTL_EN);
4362 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4363 }
4364}
4365
4366static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4367{
4368 struct e1000_hw *hw = &adapter->hw;
4369
4370 /*
4371 * With 82574 controllers, PHY needs to be checked periodically
4372 * for hung state and reset, if two calls return true
4373 */
4374 if (e1000_check_phy_82574(hw))
4375 adapter->phy_hang_count++;
4376 else
4377 adapter->phy_hang_count = 0;
4378
4379 if (adapter->phy_hang_count > 1) {
4380 adapter->phy_hang_count = 0;
4381 schedule_work(&adapter->reset_task);
4382 }
4383}
4384
4385/**
4386 * e1000_watchdog - Timer Call-back
4387 * @data: pointer to adapter cast into an unsigned long
4388 **/
4389static void e1000_watchdog(unsigned long data)
4390{
4391 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4392
4393 /* Do the rest outside of interrupt context */
4394 schedule_work(&adapter->watchdog_task);
4395
4396 /* TODO: make this use queue_delayed_work() */
4397}
4398
4399static void e1000_watchdog_task(struct work_struct *work)
4400{
4401 struct e1000_adapter *adapter = container_of(work,
4402 struct e1000_adapter, watchdog_task);
4403 struct net_device *netdev = adapter->netdev;
4404 struct e1000_mac_info *mac = &adapter->hw.mac;
4405 struct e1000_phy_info *phy = &adapter->hw.phy;
4406 struct e1000_ring *tx_ring = adapter->tx_ring;
4407 struct e1000_hw *hw = &adapter->hw;
4408 u32 link, tctl;
4409
4410 if (test_bit(__E1000_DOWN, &adapter->state))
4411 return;
4412
4413 link = e1000e_has_link(adapter);
4414 if ((netif_carrier_ok(netdev)) && link) {
4415 /* Cancel scheduled suspend requests. */
4416 pm_runtime_resume(netdev->dev.parent);
4417
4418 e1000e_enable_receives(adapter);
4419 goto link_up;
4420 }
4421
4422 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4423 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4424 e1000_update_mng_vlan(adapter);
4425
4426 if (link) {
4427 if (!netif_carrier_ok(netdev)) {
4428 bool txb2b = true;
4429
4430 /* Cancel scheduled suspend requests. */
4431 pm_runtime_resume(netdev->dev.parent);
4432
4433 /* update snapshot of PHY registers on LSC */
4434 e1000_phy_read_status(adapter);
4435 mac->ops.get_link_up_info(&adapter->hw,
4436 &adapter->link_speed,
4437 &adapter->link_duplex);
4438 e1000_print_link_info(adapter);
4439 /*
4440 * On supported PHYs, check for duplex mismatch only
4441 * if link has autonegotiated at 10/100 half
4442 */
4443 if ((hw->phy.type == e1000_phy_igp_3 ||
4444 hw->phy.type == e1000_phy_bm) &&
4445 (hw->mac.autoneg == true) &&
4446 (adapter->link_speed == SPEED_10 ||
4447 adapter->link_speed == SPEED_100) &&
4448 (adapter->link_duplex == HALF_DUPLEX)) {
4449 u16 autoneg_exp;
4450
4451 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4452
4453 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4454 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
4455 }
4456
4457 /* adjust timeout factor according to speed/duplex */
4458 adapter->tx_timeout_factor = 1;
4459 switch (adapter->link_speed) {
4460 case SPEED_10:
4461 txb2b = false;
4462 adapter->tx_timeout_factor = 16;
4463 break;
4464 case SPEED_100:
4465 txb2b = false;
4466 adapter->tx_timeout_factor = 10;
4467 break;
4468 }
4469
4470 /*
4471 * workaround: re-program speed mode bit after
4472 * link-up event
4473 */
4474 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4475 !txb2b) {
4476 u32 tarc0;
4477 tarc0 = er32(TARC(0));
4478 tarc0 &= ~SPEED_MODE_BIT;
4479 ew32(TARC(0), tarc0);
4480 }
4481
4482 /*
4483 * disable TSO for pcie and 10/100 speeds, to avoid
4484 * some hardware issues
4485 */
4486 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4487 switch (adapter->link_speed) {
4488 case SPEED_10:
4489 case SPEED_100:
4490 e_info("10/100 speed: disabling TSO\n");
4491 netdev->features &= ~NETIF_F_TSO;
4492 netdev->features &= ~NETIF_F_TSO6;
4493 break;
4494 case SPEED_1000:
4495 netdev->features |= NETIF_F_TSO;
4496 netdev->features |= NETIF_F_TSO6;
4497 break;
4498 default:
4499 /* oops */
4500 break;
4501 }
4502 }
4503
4504 /*
4505 * enable transmits in the hardware, need to do this
4506 * after setting TARC(0)
4507 */
4508 tctl = er32(TCTL);
4509 tctl |= E1000_TCTL_EN;
4510 ew32(TCTL, tctl);
4511
4512 /*
4513 * Perform any post-link-up configuration before
4514 * reporting link up.
4515 */
4516 if (phy->ops.cfg_on_link_up)
4517 phy->ops.cfg_on_link_up(hw);
4518
4519 netif_carrier_on(netdev);
4520
4521 if (!test_bit(__E1000_DOWN, &adapter->state))
4522 mod_timer(&adapter->phy_info_timer,
4523 round_jiffies(jiffies + 2 * HZ));
4524 }
4525 } else {
4526 if (netif_carrier_ok(netdev)) {
4527 adapter->link_speed = 0;
4528 adapter->link_duplex = 0;
4529 /* Link status message must follow this format */
4530 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4531 adapter->netdev->name);
4532 netif_carrier_off(netdev);
4533 if (!test_bit(__E1000_DOWN, &adapter->state))
4534 mod_timer(&adapter->phy_info_timer,
4535 round_jiffies(jiffies + 2 * HZ));
4536
4537 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4538 schedule_work(&adapter->reset_task);
4539 else
4540 pm_schedule_suspend(netdev->dev.parent,
4541 LINK_TIMEOUT);
4542 }
4543 }
4544
4545link_up:
4546 spin_lock(&adapter->stats64_lock);
4547 e1000e_update_stats(adapter);
4548
4549 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4550 adapter->tpt_old = adapter->stats.tpt;
4551 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4552 adapter->colc_old = adapter->stats.colc;
4553
4554 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4555 adapter->gorc_old = adapter->stats.gorc;
4556 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4557 adapter->gotc_old = adapter->stats.gotc;
4558 spin_unlock(&adapter->stats64_lock);
4559
4560 e1000e_update_adaptive(&adapter->hw);
4561
4562 if (!netif_carrier_ok(netdev) &&
4563 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) {
4564 /*
4565 * We've lost link, so the controller stops DMA,
4566 * but we've got queued Tx work that's never going
4567 * to get done, so reset controller to flush Tx.
4568 * (Do the reset outside of interrupt context).
4569 */
4570 schedule_work(&adapter->reset_task);
4571 /* return immediately since reset is imminent */
4572 return;
4573 }
4574
4575 /* Simple mode for Interrupt Throttle Rate (ITR) */
4576 if (adapter->itr_setting == 4) {
4577 /*
4578 * Symmetric Tx/Rx gets a reduced ITR=2000;
4579 * Total asymmetrical Tx or Rx gets ITR=8000;
4580 * everyone else is between 2000-8000.
4581 */
4582 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4583 u32 dif = (adapter->gotc > adapter->gorc ?
4584 adapter->gotc - adapter->gorc :
4585 adapter->gorc - adapter->gotc) / 10000;
4586 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4587
4588 ew32(ITR, 1000000000 / (itr * 256));
4589 }
4590
4591 /* Cause software interrupt to ensure Rx ring is cleaned */
4592 if (adapter->msix_entries)
4593 ew32(ICS, adapter->rx_ring->ims_val);
4594 else
4595 ew32(ICS, E1000_ICS_RXDMT0);
4596
4597 /* flush pending descriptors to memory before detecting Tx hang */
4598 e1000e_flush_descriptors(adapter);
4599
4600 /* Force detection of hung controller every watchdog period */
4601 adapter->detect_tx_hung = true;
4602
4603 /*
4604 * With 82571 controllers, LAA may be overwritten due to controller
4605 * reset from the other port. Set the appropriate LAA in RAR[0]
4606 */
4607 if (e1000e_get_laa_state_82571(hw))
4608 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
4609
4610 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4611 e1000e_check_82574_phy_workaround(adapter);
4612
4613 /* Reset the timer */
4614 if (!test_bit(__E1000_DOWN, &adapter->state))
4615 mod_timer(&adapter->watchdog_timer,
4616 round_jiffies(jiffies + 2 * HZ));
4617}
4618
4619#define E1000_TX_FLAGS_CSUM 0x00000001
4620#define E1000_TX_FLAGS_VLAN 0x00000002
4621#define E1000_TX_FLAGS_TSO 0x00000004
4622#define E1000_TX_FLAGS_IPV4 0x00000008
4623#define E1000_TX_FLAGS_NO_FCS 0x00000010
4624#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4625#define E1000_TX_FLAGS_VLAN_SHIFT 16
4626
4627static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb)
4628{
4629 struct e1000_context_desc *context_desc;
4630 struct e1000_buffer *buffer_info;
4631 unsigned int i;
4632 u32 cmd_length = 0;
4633 u16 ipcse = 0, tucse, mss;
4634 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4635
4636 if (!skb_is_gso(skb))
4637 return 0;
4638
4639 if (skb_header_cloned(skb)) {
4640 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4641
4642 if (err)
4643 return err;
4644 }
4645
4646 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4647 mss = skb_shinfo(skb)->gso_size;
4648 if (skb->protocol == htons(ETH_P_IP)) {
4649 struct iphdr *iph = ip_hdr(skb);
4650 iph->tot_len = 0;
4651 iph->check = 0;
4652 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4653 0, IPPROTO_TCP, 0);
4654 cmd_length = E1000_TXD_CMD_IP;
4655 ipcse = skb_transport_offset(skb) - 1;
4656 } else if (skb_is_gso_v6(skb)) {
4657 ipv6_hdr(skb)->payload_len = 0;
4658 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4659 &ipv6_hdr(skb)->daddr,
4660 0, IPPROTO_TCP, 0);
4661 ipcse = 0;
4662 }
4663 ipcss = skb_network_offset(skb);
4664 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4665 tucss = skb_transport_offset(skb);
4666 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4667 tucse = 0;
4668
4669 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4670 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4671
4672 i = tx_ring->next_to_use;
4673 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4674 buffer_info = &tx_ring->buffer_info[i];
4675
4676 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4677 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4678 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4679 context_desc->upper_setup.tcp_fields.tucss = tucss;
4680 context_desc->upper_setup.tcp_fields.tucso = tucso;
4681 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4682 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4683 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4684 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4685
4686 buffer_info->time_stamp = jiffies;
4687 buffer_info->next_to_watch = i;
4688
4689 i++;
4690 if (i == tx_ring->count)
4691 i = 0;
4692 tx_ring->next_to_use = i;
4693
4694 return 1;
4695}
4696
4697static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb)
4698{
4699 struct e1000_adapter *adapter = tx_ring->adapter;
4700 struct e1000_context_desc *context_desc;
4701 struct e1000_buffer *buffer_info;
4702 unsigned int i;
4703 u8 css;
4704 u32 cmd_len = E1000_TXD_CMD_DEXT;
4705 __be16 protocol;
4706
4707 if (skb->ip_summed != CHECKSUM_PARTIAL)
4708 return 0;
4709
4710 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4711 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4712 else
4713 protocol = skb->protocol;
4714
4715 switch (protocol) {
4716 case cpu_to_be16(ETH_P_IP):
4717 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4718 cmd_len |= E1000_TXD_CMD_TCP;
4719 break;
4720 case cpu_to_be16(ETH_P_IPV6):
4721 /* XXX not handling all IPV6 headers */
4722 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4723 cmd_len |= E1000_TXD_CMD_TCP;
4724 break;
4725 default:
4726 if (unlikely(net_ratelimit()))
4727 e_warn("checksum_partial proto=%x!\n",
4728 be16_to_cpu(protocol));
4729 break;
4730 }
4731
4732 css = skb_checksum_start_offset(skb);
4733
4734 i = tx_ring->next_to_use;
4735 buffer_info = &tx_ring->buffer_info[i];
4736 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4737
4738 context_desc->lower_setup.ip_config = 0;
4739 context_desc->upper_setup.tcp_fields.tucss = css;
4740 context_desc->upper_setup.tcp_fields.tucso =
4741 css + skb->csum_offset;
4742 context_desc->upper_setup.tcp_fields.tucse = 0;
4743 context_desc->tcp_seg_setup.data = 0;
4744 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4745
4746 buffer_info->time_stamp = jiffies;
4747 buffer_info->next_to_watch = i;
4748
4749 i++;
4750 if (i == tx_ring->count)
4751 i = 0;
4752 tx_ring->next_to_use = i;
4753
4754 return 1;
4755}
4756
4757static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
4758 unsigned int first, unsigned int max_per_txd,
4759 unsigned int nr_frags)
4760{
4761 struct e1000_adapter *adapter = tx_ring->adapter;
4762 struct pci_dev *pdev = adapter->pdev;
4763 struct e1000_buffer *buffer_info;
4764 unsigned int len = skb_headlen(skb);
4765 unsigned int offset = 0, size, count = 0, i;
4766 unsigned int f, bytecount, segs;
4767
4768 i = tx_ring->next_to_use;
4769
4770 while (len) {
4771 buffer_info = &tx_ring->buffer_info[i];
4772 size = min(len, max_per_txd);
4773
4774 buffer_info->length = size;
4775 buffer_info->time_stamp = jiffies;
4776 buffer_info->next_to_watch = i;
4777 buffer_info->dma = dma_map_single(&pdev->dev,
4778 skb->data + offset,
4779 size, DMA_TO_DEVICE);
4780 buffer_info->mapped_as_page = false;
4781 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
4782 goto dma_error;
4783
4784 len -= size;
4785 offset += size;
4786 count++;
4787
4788 if (len) {
4789 i++;
4790 if (i == tx_ring->count)
4791 i = 0;
4792 }
4793 }
4794
4795 for (f = 0; f < nr_frags; f++) {
4796 const struct skb_frag_struct *frag;
4797
4798 frag = &skb_shinfo(skb)->frags[f];
4799 len = skb_frag_size(frag);
4800 offset = 0;
4801
4802 while (len) {
4803 i++;
4804 if (i == tx_ring->count)
4805 i = 0;
4806
4807 buffer_info = &tx_ring->buffer_info[i];
4808 size = min(len, max_per_txd);
4809
4810 buffer_info->length = size;
4811 buffer_info->time_stamp = jiffies;
4812 buffer_info->next_to_watch = i;
4813 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
4814 offset, size, DMA_TO_DEVICE);
4815 buffer_info->mapped_as_page = true;
4816 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
4817 goto dma_error;
4818
4819 len -= size;
4820 offset += size;
4821 count++;
4822 }
4823 }
4824
4825 segs = skb_shinfo(skb)->gso_segs ? : 1;
4826 /* multiply data chunks by size of headers */
4827 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4828
4829 tx_ring->buffer_info[i].skb = skb;
4830 tx_ring->buffer_info[i].segs = segs;
4831 tx_ring->buffer_info[i].bytecount = bytecount;
4832 tx_ring->buffer_info[first].next_to_watch = i;
4833
4834 return count;
4835
4836dma_error:
4837 dev_err(&pdev->dev, "Tx DMA map failed\n");
4838 buffer_info->dma = 0;
4839 if (count)
4840 count--;
4841
4842 while (count--) {
4843 if (i == 0)
4844 i += tx_ring->count;
4845 i--;
4846 buffer_info = &tx_ring->buffer_info[i];
4847 e1000_put_txbuf(tx_ring, buffer_info);
4848 }
4849
4850 return 0;
4851}
4852
4853static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
4854{
4855 struct e1000_adapter *adapter = tx_ring->adapter;
4856 struct e1000_tx_desc *tx_desc = NULL;
4857 struct e1000_buffer *buffer_info;
4858 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4859 unsigned int i;
4860
4861 if (tx_flags & E1000_TX_FLAGS_TSO) {
4862 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4863 E1000_TXD_CMD_TSE;
4864 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4865
4866 if (tx_flags & E1000_TX_FLAGS_IPV4)
4867 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4868 }
4869
4870 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4871 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4872 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4873 }
4874
4875 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4876 txd_lower |= E1000_TXD_CMD_VLE;
4877 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4878 }
4879
4880 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
4881 txd_lower &= ~(E1000_TXD_CMD_IFCS);
4882
4883 i = tx_ring->next_to_use;
4884
4885 do {
4886 buffer_info = &tx_ring->buffer_info[i];
4887 tx_desc = E1000_TX_DESC(*tx_ring, i);
4888 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4889 tx_desc->lower.data =
4890 cpu_to_le32(txd_lower | buffer_info->length);
4891 tx_desc->upper.data = cpu_to_le32(txd_upper);
4892
4893 i++;
4894 if (i == tx_ring->count)
4895 i = 0;
4896 } while (--count > 0);
4897
4898 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4899
4900 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
4901 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
4902 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
4903
4904 /*
4905 * Force memory writes to complete before letting h/w
4906 * know there are new descriptors to fetch. (Only
4907 * applicable for weak-ordered memory model archs,
4908 * such as IA-64).
4909 */
4910 wmb();
4911
4912 tx_ring->next_to_use = i;
4913
4914 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
4915 e1000e_update_tdt_wa(tx_ring, i);
4916 else
4917 writel(i, tx_ring->tail);
4918
4919 /*
4920 * we need this if more than one processor can write to our tail
4921 * at a time, it synchronizes IO on IA64/Altix systems
4922 */
4923 mmiowb();
4924}
4925
4926#define MINIMUM_DHCP_PACKET_SIZE 282
4927static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4928 struct sk_buff *skb)
4929{
4930 struct e1000_hw *hw = &adapter->hw;
4931 u16 length, offset;
4932
4933 if (vlan_tx_tag_present(skb)) {
4934 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4935 (adapter->hw.mng_cookie.status &
4936 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4937 return 0;
4938 }
4939
4940 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4941 return 0;
4942
4943 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4944 return 0;
4945
4946 {
4947 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4948 struct udphdr *udp;
4949
4950 if (ip->protocol != IPPROTO_UDP)
4951 return 0;
4952
4953 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4954 if (ntohs(udp->dest) != 67)
4955 return 0;
4956
4957 offset = (u8 *)udp + 8 - skb->data;
4958 length = skb->len - offset;
4959 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4960 }
4961
4962 return 0;
4963}
4964
4965static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
4966{
4967 struct e1000_adapter *adapter = tx_ring->adapter;
4968
4969 netif_stop_queue(adapter->netdev);
4970 /*
4971 * Herbert's original patch had:
4972 * smp_mb__after_netif_stop_queue();
4973 * but since that doesn't exist yet, just open code it.
4974 */
4975 smp_mb();
4976
4977 /*
4978 * We need to check again in a case another CPU has just
4979 * made room available.
4980 */
4981 if (e1000_desc_unused(tx_ring) < size)
4982 return -EBUSY;
4983
4984 /* A reprieve! */
4985 netif_start_queue(adapter->netdev);
4986 ++adapter->restart_queue;
4987 return 0;
4988}
4989
4990static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
4991{
4992 BUG_ON(size > tx_ring->count);
4993
4994 if (e1000_desc_unused(tx_ring) >= size)
4995 return 0;
4996 return __e1000_maybe_stop_tx(tx_ring, size);
4997}
4998
4999static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5000 struct net_device *netdev)
5001{
5002 struct e1000_adapter *adapter = netdev_priv(netdev);
5003 struct e1000_ring *tx_ring = adapter->tx_ring;
5004 unsigned int first;
5005 unsigned int tx_flags = 0;
5006 unsigned int len = skb_headlen(skb);
5007 unsigned int nr_frags;
5008 unsigned int mss;
5009 int count = 0;
5010 int tso;
5011 unsigned int f;
5012
5013 if (test_bit(__E1000_DOWN, &adapter->state)) {
5014 dev_kfree_skb_any(skb);
5015 return NETDEV_TX_OK;
5016 }
5017
5018 if (skb->len <= 0) {
5019 dev_kfree_skb_any(skb);
5020 return NETDEV_TX_OK;
5021 }
5022
5023 mss = skb_shinfo(skb)->gso_size;
5024 if (mss) {
5025 u8 hdr_len;
5026
5027 /*
5028 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
5029 * points to just header, pull a few bytes of payload from
5030 * frags into skb->data
5031 */
5032 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5033 /*
5034 * we do this workaround for ES2LAN, but it is un-necessary,
5035 * avoiding it could save a lot of cycles
5036 */
5037 if (skb->data_len && (hdr_len == len)) {
5038 unsigned int pull_size;
5039
5040 pull_size = min_t(unsigned int, 4, skb->data_len);
5041 if (!__pskb_pull_tail(skb, pull_size)) {
5042 e_err("__pskb_pull_tail failed.\n");
5043 dev_kfree_skb_any(skb);
5044 return NETDEV_TX_OK;
5045 }
5046 len = skb_headlen(skb);
5047 }
5048 }
5049
5050 /* reserve a descriptor for the offload context */
5051 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5052 count++;
5053 count++;
5054
5055 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5056
5057 nr_frags = skb_shinfo(skb)->nr_frags;
5058 for (f = 0; f < nr_frags; f++)
5059 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5060 adapter->tx_fifo_limit);
5061
5062 if (adapter->hw.mac.tx_pkt_filtering)
5063 e1000_transfer_dhcp_info(adapter, skb);
5064
5065 /*
5066 * need: count + 2 desc gap to keep tail from touching
5067 * head, otherwise try next time
5068 */
5069 if (e1000_maybe_stop_tx(tx_ring, count + 2))
5070 return NETDEV_TX_BUSY;
5071
5072 if (vlan_tx_tag_present(skb)) {
5073 tx_flags |= E1000_TX_FLAGS_VLAN;
5074 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
5075 }
5076
5077 first = tx_ring->next_to_use;
5078
5079 tso = e1000_tso(tx_ring, skb);
5080 if (tso < 0) {
5081 dev_kfree_skb_any(skb);
5082 return NETDEV_TX_OK;
5083 }
5084
5085 if (tso)
5086 tx_flags |= E1000_TX_FLAGS_TSO;
5087 else if (e1000_tx_csum(tx_ring, skb))
5088 tx_flags |= E1000_TX_FLAGS_CSUM;
5089
5090 /*
5091 * Old method was to assume IPv4 packet by default if TSO was enabled.
5092 * 82571 hardware supports TSO capabilities for IPv6 as well...
5093 * no longer assume, we must.
5094 */
5095 if (skb->protocol == htons(ETH_P_IP))
5096 tx_flags |= E1000_TX_FLAGS_IPV4;
5097
5098 if (unlikely(skb->no_fcs))
5099 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5100
5101 /* if count is 0 then mapping error has occurred */
5102 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5103 nr_frags);
5104 if (count) {
5105 skb_tx_timestamp(skb);
5106
5107 netdev_sent_queue(netdev, skb->len);
5108 e1000_tx_queue(tx_ring, tx_flags, count);
5109 /* Make sure there is space in the ring for the next send. */
5110 e1000_maybe_stop_tx(tx_ring,
5111 (MAX_SKB_FRAGS *
5112 DIV_ROUND_UP(PAGE_SIZE,
5113 adapter->tx_fifo_limit) + 2));
5114 } else {
5115 dev_kfree_skb_any(skb);
5116 tx_ring->buffer_info[first].time_stamp = 0;
5117 tx_ring->next_to_use = first;
5118 }
5119
5120 return NETDEV_TX_OK;
5121}
5122
5123/**
5124 * e1000_tx_timeout - Respond to a Tx Hang
5125 * @netdev: network interface device structure
5126 **/
5127static void e1000_tx_timeout(struct net_device *netdev)
5128{
5129 struct e1000_adapter *adapter = netdev_priv(netdev);
5130
5131 /* Do the reset outside of interrupt context */
5132 adapter->tx_timeout_count++;
5133 schedule_work(&adapter->reset_task);
5134}
5135
5136static void e1000_reset_task(struct work_struct *work)
5137{
5138 struct e1000_adapter *adapter;
5139 adapter = container_of(work, struct e1000_adapter, reset_task);
5140
5141 /* don't run the task if already down */
5142 if (test_bit(__E1000_DOWN, &adapter->state))
5143 return;
5144
5145 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5146 (adapter->flags & FLAG_RX_RESTART_NOW))) {
5147 e1000e_dump(adapter);
5148 e_err("Reset adapter\n");
5149 }
5150 e1000e_reinit_locked(adapter);
5151}
5152
5153/**
5154 * e1000_get_stats64 - Get System Network Statistics
5155 * @netdev: network interface device structure
5156 * @stats: rtnl_link_stats64 pointer
5157 *
5158 * Returns the address of the device statistics structure.
5159 **/
5160struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5161 struct rtnl_link_stats64 *stats)
5162{
5163 struct e1000_adapter *adapter = netdev_priv(netdev);
5164
5165 memset(stats, 0, sizeof(struct rtnl_link_stats64));
5166 spin_lock(&adapter->stats64_lock);
5167 e1000e_update_stats(adapter);
5168 /* Fill out the OS statistics structure */
5169 stats->rx_bytes = adapter->stats.gorc;
5170 stats->rx_packets = adapter->stats.gprc;
5171 stats->tx_bytes = adapter->stats.gotc;
5172 stats->tx_packets = adapter->stats.gptc;
5173 stats->multicast = adapter->stats.mprc;
5174 stats->collisions = adapter->stats.colc;
5175
5176 /* Rx Errors */
5177
5178 /*
5179 * RLEC on some newer hardware can be incorrect so build
5180 * our own version based on RUC and ROC
5181 */
5182 stats->rx_errors = adapter->stats.rxerrc +
5183 adapter->stats.crcerrs + adapter->stats.algnerrc +
5184 adapter->stats.ruc + adapter->stats.roc +
5185 adapter->stats.cexterr;
5186 stats->rx_length_errors = adapter->stats.ruc +
5187 adapter->stats.roc;
5188 stats->rx_crc_errors = adapter->stats.crcerrs;
5189 stats->rx_frame_errors = adapter->stats.algnerrc;
5190 stats->rx_missed_errors = adapter->stats.mpc;
5191
5192 /* Tx Errors */
5193 stats->tx_errors = adapter->stats.ecol +
5194 adapter->stats.latecol;
5195 stats->tx_aborted_errors = adapter->stats.ecol;
5196 stats->tx_window_errors = adapter->stats.latecol;
5197 stats->tx_carrier_errors = adapter->stats.tncrs;
5198
5199 /* Tx Dropped needs to be maintained elsewhere */
5200
5201 spin_unlock(&adapter->stats64_lock);
5202 return stats;
5203}
5204
5205/**
5206 * e1000_change_mtu - Change the Maximum Transfer Unit
5207 * @netdev: network interface device structure
5208 * @new_mtu: new value for maximum frame size
5209 *
5210 * Returns 0 on success, negative on failure
5211 **/
5212static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5213{
5214 struct e1000_adapter *adapter = netdev_priv(netdev);
5215 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5216
5217 /* Jumbo frame support */
5218 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
5219 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5220 e_err("Jumbo Frames not supported.\n");
5221 return -EINVAL;
5222 }
5223
5224 /* Supported frame sizes */
5225 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5226 (max_frame > adapter->max_hw_frame_size)) {
5227 e_err("Unsupported MTU setting\n");
5228 return -EINVAL;
5229 }
5230
5231 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
5232 if ((adapter->hw.mac.type >= e1000_pch2lan) &&
5233 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5234 (new_mtu > ETH_DATA_LEN)) {
5235 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
5236 return -EINVAL;
5237 }
5238
5239 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5240 usleep_range(1000, 2000);
5241 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5242 adapter->max_frame_size = max_frame;
5243 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5244 netdev->mtu = new_mtu;
5245 if (netif_running(netdev))
5246 e1000e_down(adapter);
5247
5248 /*
5249 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5250 * means we reserve 2 more, this pushes us to allocate from the next
5251 * larger slab size.
5252 * i.e. RXBUFFER_2048 --> size-4096 slab
5253 * However with the new *_jumbo_rx* routines, jumbo receives will use
5254 * fragmented skbs
5255 */
5256
5257 if (max_frame <= 2048)
5258 adapter->rx_buffer_len = 2048;
5259 else
5260 adapter->rx_buffer_len = 4096;
5261
5262 /* adjust allocation if LPE protects us, and we aren't using SBP */
5263 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5264 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5265 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
5266 + ETH_FCS_LEN;
5267
5268 if (netif_running(netdev))
5269 e1000e_up(adapter);
5270 else
5271 e1000e_reset(adapter);
5272
5273 clear_bit(__E1000_RESETTING, &adapter->state);
5274
5275 return 0;
5276}
5277
5278static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5279 int cmd)
5280{
5281 struct e1000_adapter *adapter = netdev_priv(netdev);
5282 struct mii_ioctl_data *data = if_mii(ifr);
5283
5284 if (adapter->hw.phy.media_type != e1000_media_type_copper)
5285 return -EOPNOTSUPP;
5286
5287 switch (cmd) {
5288 case SIOCGMIIPHY:
5289 data->phy_id = adapter->hw.phy.addr;
5290 break;
5291 case SIOCGMIIREG:
5292 e1000_phy_read_status(adapter);
5293
5294 switch (data->reg_num & 0x1F) {
5295 case MII_BMCR:
5296 data->val_out = adapter->phy_regs.bmcr;
5297 break;
5298 case MII_BMSR:
5299 data->val_out = adapter->phy_regs.bmsr;
5300 break;
5301 case MII_PHYSID1:
5302 data->val_out = (adapter->hw.phy.id >> 16);
5303 break;
5304 case MII_PHYSID2:
5305 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5306 break;
5307 case MII_ADVERTISE:
5308 data->val_out = adapter->phy_regs.advertise;
5309 break;
5310 case MII_LPA:
5311 data->val_out = adapter->phy_regs.lpa;
5312 break;
5313 case MII_EXPANSION:
5314 data->val_out = adapter->phy_regs.expansion;
5315 break;
5316 case MII_CTRL1000:
5317 data->val_out = adapter->phy_regs.ctrl1000;
5318 break;
5319 case MII_STAT1000:
5320 data->val_out = adapter->phy_regs.stat1000;
5321 break;
5322 case MII_ESTATUS:
5323 data->val_out = adapter->phy_regs.estatus;
5324 break;
5325 default:
5326 return -EIO;
5327 }
5328 break;
5329 case SIOCSMIIREG:
5330 default:
5331 return -EOPNOTSUPP;
5332 }
5333 return 0;
5334}
5335
5336static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5337{
5338 switch (cmd) {
5339 case SIOCGMIIPHY:
5340 case SIOCGMIIREG:
5341 case SIOCSMIIREG:
5342 return e1000_mii_ioctl(netdev, ifr, cmd);
5343 default:
5344 return -EOPNOTSUPP;
5345 }
5346}
5347
5348static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5349{
5350 struct e1000_hw *hw = &adapter->hw;
5351 u32 i, mac_reg;
5352 u16 phy_reg, wuc_enable;
5353 int retval = 0;
5354
5355 /* copy MAC RARs to PHY RARs */
5356 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
5357
5358 retval = hw->phy.ops.acquire(hw);
5359 if (retval) {
5360 e_err("Could not acquire PHY\n");
5361 return retval;
5362 }
5363
5364 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
5365 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5366 if (retval)
5367 goto release;
5368
5369 /* copy MAC MTA to PHY MTA - only needed for pchlan */
5370 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5371 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5372 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
5373 (u16)(mac_reg & 0xFFFF));
5374 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
5375 (u16)((mac_reg >> 16) & 0xFFFF));
5376 }
5377
5378 /* configure PHY Rx Control register */
5379 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
5380 mac_reg = er32(RCTL);
5381 if (mac_reg & E1000_RCTL_UPE)
5382 phy_reg |= BM_RCTL_UPE;
5383 if (mac_reg & E1000_RCTL_MPE)
5384 phy_reg |= BM_RCTL_MPE;
5385 phy_reg &= ~(BM_RCTL_MO_MASK);
5386 if (mac_reg & E1000_RCTL_MO_3)
5387 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5388 << BM_RCTL_MO_SHIFT);
5389 if (mac_reg & E1000_RCTL_BAM)
5390 phy_reg |= BM_RCTL_BAM;
5391 if (mac_reg & E1000_RCTL_PMCF)
5392 phy_reg |= BM_RCTL_PMCF;
5393 mac_reg = er32(CTRL);
5394 if (mac_reg & E1000_CTRL_RFCE)
5395 phy_reg |= BM_RCTL_RFCE;
5396 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
5397
5398 /* enable PHY wakeup in MAC register */
5399 ew32(WUFC, wufc);
5400 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5401
5402 /* configure and enable PHY wakeup in PHY registers */
5403 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
5404 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5405
5406 /* activate PHY wakeup */
5407 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5408 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5409 if (retval)
5410 e_err("Could not set PHY Host Wakeup bit\n");
5411release:
5412 hw->phy.ops.release(hw);
5413
5414 return retval;
5415}
5416
5417static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5418 bool runtime)
5419{
5420 struct net_device *netdev = pci_get_drvdata(pdev);
5421 struct e1000_adapter *adapter = netdev_priv(netdev);
5422 struct e1000_hw *hw = &adapter->hw;
5423 u32 ctrl, ctrl_ext, rctl, status;
5424 /* Runtime suspend should only enable wakeup for link changes */
5425 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
5426 int retval = 0;
5427
5428 netif_device_detach(netdev);
5429
5430 if (netif_running(netdev)) {
5431 int count = E1000_CHECK_RESET_COUNT;
5432
5433 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
5434 usleep_range(10000, 20000);
5435
5436 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5437 e1000e_down(adapter);
5438 e1000_free_irq(adapter);
5439 }
5440 e1000e_reset_interrupt_capability(adapter);
5441
5442 retval = pci_save_state(pdev);
5443 if (retval)
5444 return retval;
5445
5446 status = er32(STATUS);
5447 if (status & E1000_STATUS_LU)
5448 wufc &= ~E1000_WUFC_LNKC;
5449
5450 if (wufc) {
5451 e1000_setup_rctl(adapter);
5452 e1000e_set_rx_mode(netdev);
5453
5454 /* turn on all-multi mode if wake on multicast is enabled */
5455 if (wufc & E1000_WUFC_MC) {
5456 rctl = er32(RCTL);
5457 rctl |= E1000_RCTL_MPE;
5458 ew32(RCTL, rctl);
5459 }
5460
5461 ctrl = er32(CTRL);
5462 /* advertise wake from D3Cold */
5463 #define E1000_CTRL_ADVD3WUC 0x00100000
5464 /* phy power management enable */
5465 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5466 ctrl |= E1000_CTRL_ADVD3WUC;
5467 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5468 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
5469 ew32(CTRL, ctrl);
5470
5471 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5472 adapter->hw.phy.media_type ==
5473 e1000_media_type_internal_serdes) {
5474 /* keep the laser running in D3 */
5475 ctrl_ext = er32(CTRL_EXT);
5476 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
5477 ew32(CTRL_EXT, ctrl_ext);
5478 }
5479
5480 if (adapter->flags & FLAG_IS_ICH)
5481 e1000_suspend_workarounds_ich8lan(&adapter->hw);
5482
5483 /* Allow time for pending master requests to run */
5484 e1000e_disable_pcie_master(&adapter->hw);
5485
5486 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5487 /* enable wakeup by the PHY */
5488 retval = e1000_init_phy_wakeup(adapter, wufc);
5489 if (retval)
5490 return retval;
5491 } else {
5492 /* enable wakeup by the MAC */
5493 ew32(WUFC, wufc);
5494 ew32(WUC, E1000_WUC_PME_EN);
5495 }
5496 } else {
5497 ew32(WUC, 0);
5498 ew32(WUFC, 0);
5499 }
5500
5501 *enable_wake = !!wufc;
5502
5503 /* make sure adapter isn't asleep if manageability is enabled */
5504 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5505 (hw->mac.ops.check_mng_mode(hw)))
5506 *enable_wake = true;
5507
5508 if (adapter->hw.phy.type == e1000_phy_igp_3)
5509 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5510
5511 /*
5512 * Release control of h/w to f/w. If f/w is AMT enabled, this
5513 * would have already happened in close and is redundant.
5514 */
5515 e1000e_release_hw_control(adapter);
5516
5517 pci_disable_device(pdev);
5518
5519 return 0;
5520}
5521
5522static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5523{
5524 if (sleep && wake) {
5525 pci_prepare_to_sleep(pdev);
5526 return;
5527 }
5528
5529 pci_wake_from_d3(pdev, wake);
5530 pci_set_power_state(pdev, PCI_D3hot);
5531}
5532
5533static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5534 bool wake)
5535{
5536 struct net_device *netdev = pci_get_drvdata(pdev);
5537 struct e1000_adapter *adapter = netdev_priv(netdev);
5538
5539 /*
5540 * The pci-e switch on some quad port adapters will report a
5541 * correctable error when the MAC transitions from D0 to D3. To
5542 * prevent this we need to mask off the correctable errors on the
5543 * downstream port of the pci-e switch.
5544 */
5545 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5546 struct pci_dev *us_dev = pdev->bus->self;
5547 int pos = pci_pcie_cap(us_dev);
5548 u16 devctl;
5549
5550 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5551 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5552 (devctl & ~PCI_EXP_DEVCTL_CERE));
5553
5554 e1000_power_off(pdev, sleep, wake);
5555
5556 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5557 } else {
5558 e1000_power_off(pdev, sleep, wake);
5559 }
5560}
5561
5562#ifdef CONFIG_PCIEASPM
5563static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5564{
5565 pci_disable_link_state_locked(pdev, state);
5566}
5567#else
5568static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5569{
5570 int pos;
5571 u16 reg16;
5572
5573 /*
5574 * Both device and parent should have the same ASPM setting.
5575 * Disable ASPM in downstream component first and then upstream.
5576 */
5577 pos = pci_pcie_cap(pdev);
5578 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, ®16);
5579 reg16 &= ~state;
5580 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5581
5582 if (!pdev->bus->self)
5583 return;
5584
5585 pos = pci_pcie_cap(pdev->bus->self);
5586 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, ®16);
5587 reg16 &= ~state;
5588 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5589}
5590#endif
5591static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5592{
5593 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5594 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5595 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5596
5597 __e1000e_disable_aspm(pdev, state);
5598}
5599
5600#ifdef CONFIG_PM
5601static bool e1000e_pm_ready(struct e1000_adapter *adapter)
5602{
5603 return !!adapter->tx_ring->buffer_info;
5604}
5605
5606static int __e1000_resume(struct pci_dev *pdev)
5607{
5608 struct net_device *netdev = pci_get_drvdata(pdev);
5609 struct e1000_adapter *adapter = netdev_priv(netdev);
5610 struct e1000_hw *hw = &adapter->hw;
5611 u16 aspm_disable_flag = 0;
5612 u32 err;
5613
5614 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5615 aspm_disable_flag = PCIE_LINK_STATE_L0S;
5616 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5617 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5618 if (aspm_disable_flag)
5619 e1000e_disable_aspm(pdev, aspm_disable_flag);
5620
5621 pci_set_power_state(pdev, PCI_D0);
5622 pci_restore_state(pdev);
5623 pci_save_state(pdev);
5624
5625 e1000e_set_interrupt_capability(adapter);
5626 if (netif_running(netdev)) {
5627 err = e1000_request_irq(adapter);
5628 if (err)
5629 return err;
5630 }
5631
5632 if (hw->mac.type >= e1000_pch2lan)
5633 e1000_resume_workarounds_pchlan(&adapter->hw);
5634
5635 e1000e_power_up_phy(adapter);
5636
5637 /* report the system wakeup cause from S3/S4 */
5638 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5639 u16 phy_data;
5640
5641 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5642 if (phy_data) {
5643 e_info("PHY Wakeup cause - %s\n",
5644 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5645 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5646 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5647 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5648 phy_data & E1000_WUS_LNKC ?
5649 "Link Status Change" : "other");
5650 }
5651 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5652 } else {
5653 u32 wus = er32(WUS);
5654 if (wus) {
5655 e_info("MAC Wakeup cause - %s\n",
5656 wus & E1000_WUS_EX ? "Unicast Packet" :
5657 wus & E1000_WUS_MC ? "Multicast Packet" :
5658 wus & E1000_WUS_BC ? "Broadcast Packet" :
5659 wus & E1000_WUS_MAG ? "Magic Packet" :
5660 wus & E1000_WUS_LNKC ? "Link Status Change" :
5661 "other");
5662 }
5663 ew32(WUS, ~0);
5664 }
5665
5666 e1000e_reset(adapter);
5667
5668 e1000_init_manageability_pt(adapter);
5669
5670 if (netif_running(netdev))
5671 e1000e_up(adapter);
5672
5673 netif_device_attach(netdev);
5674
5675 /*
5676 * If the controller has AMT, do not set DRV_LOAD until the interface
5677 * is up. For all other cases, let the f/w know that the h/w is now
5678 * under the control of the driver.
5679 */
5680 if (!(adapter->flags & FLAG_HAS_AMT))
5681 e1000e_get_hw_control(adapter);
5682
5683 return 0;
5684}
5685
5686#ifdef CONFIG_PM_SLEEP
5687static int e1000_suspend(struct device *dev)
5688{
5689 struct pci_dev *pdev = to_pci_dev(dev);
5690 int retval;
5691 bool wake;
5692
5693 retval = __e1000_shutdown(pdev, &wake, false);
5694 if (!retval)
5695 e1000_complete_shutdown(pdev, true, wake);
5696
5697 return retval;
5698}
5699
5700static int e1000_resume(struct device *dev)
5701{
5702 struct pci_dev *pdev = to_pci_dev(dev);
5703 struct net_device *netdev = pci_get_drvdata(pdev);
5704 struct e1000_adapter *adapter = netdev_priv(netdev);
5705
5706 if (e1000e_pm_ready(adapter))
5707 adapter->idle_check = true;
5708
5709 return __e1000_resume(pdev);
5710}
5711#endif /* CONFIG_PM_SLEEP */
5712
5713#ifdef CONFIG_PM_RUNTIME
5714static int e1000_runtime_suspend(struct device *dev)
5715{
5716 struct pci_dev *pdev = to_pci_dev(dev);
5717 struct net_device *netdev = pci_get_drvdata(pdev);
5718 struct e1000_adapter *adapter = netdev_priv(netdev);
5719
5720 if (e1000e_pm_ready(adapter)) {
5721 bool wake;
5722
5723 __e1000_shutdown(pdev, &wake, true);
5724 }
5725
5726 return 0;
5727}
5728
5729static int e1000_idle(struct device *dev)
5730{
5731 struct pci_dev *pdev = to_pci_dev(dev);
5732 struct net_device *netdev = pci_get_drvdata(pdev);
5733 struct e1000_adapter *adapter = netdev_priv(netdev);
5734
5735 if (!e1000e_pm_ready(adapter))
5736 return 0;
5737
5738 if (adapter->idle_check) {
5739 adapter->idle_check = false;
5740 if (!e1000e_has_link(adapter))
5741 pm_schedule_suspend(dev, MSEC_PER_SEC);
5742 }
5743
5744 return -EBUSY;
5745}
5746
5747static int e1000_runtime_resume(struct device *dev)
5748{
5749 struct pci_dev *pdev = to_pci_dev(dev);
5750 struct net_device *netdev = pci_get_drvdata(pdev);
5751 struct e1000_adapter *adapter = netdev_priv(netdev);
5752
5753 if (!e1000e_pm_ready(adapter))
5754 return 0;
5755
5756 adapter->idle_check = !dev->power.runtime_auto;
5757 return __e1000_resume(pdev);
5758}
5759#endif /* CONFIG_PM_RUNTIME */
5760#endif /* CONFIG_PM */
5761
5762static void e1000_shutdown(struct pci_dev *pdev)
5763{
5764 bool wake = false;
5765
5766 __e1000_shutdown(pdev, &wake, false);
5767
5768 if (system_state == SYSTEM_POWER_OFF)
5769 e1000_complete_shutdown(pdev, false, wake);
5770}
5771
5772#ifdef CONFIG_NET_POLL_CONTROLLER
5773
5774static irqreturn_t e1000_intr_msix(int irq, void *data)
5775{
5776 struct net_device *netdev = data;
5777 struct e1000_adapter *adapter = netdev_priv(netdev);
5778
5779 if (adapter->msix_entries) {
5780 int vector, msix_irq;
5781
5782 vector = 0;
5783 msix_irq = adapter->msix_entries[vector].vector;
5784 disable_irq(msix_irq);
5785 e1000_intr_msix_rx(msix_irq, netdev);
5786 enable_irq(msix_irq);
5787
5788 vector++;
5789 msix_irq = adapter->msix_entries[vector].vector;
5790 disable_irq(msix_irq);
5791 e1000_intr_msix_tx(msix_irq, netdev);
5792 enable_irq(msix_irq);
5793
5794 vector++;
5795 msix_irq = adapter->msix_entries[vector].vector;
5796 disable_irq(msix_irq);
5797 e1000_msix_other(msix_irq, netdev);
5798 enable_irq(msix_irq);
5799 }
5800
5801 return IRQ_HANDLED;
5802}
5803
5804/*
5805 * Polling 'interrupt' - used by things like netconsole to send skbs
5806 * without having to re-enable interrupts. It's not called while
5807 * the interrupt routine is executing.
5808 */
5809static void e1000_netpoll(struct net_device *netdev)
5810{
5811 struct e1000_adapter *adapter = netdev_priv(netdev);
5812
5813 switch (adapter->int_mode) {
5814 case E1000E_INT_MODE_MSIX:
5815 e1000_intr_msix(adapter->pdev->irq, netdev);
5816 break;
5817 case E1000E_INT_MODE_MSI:
5818 disable_irq(adapter->pdev->irq);
5819 e1000_intr_msi(adapter->pdev->irq, netdev);
5820 enable_irq(adapter->pdev->irq);
5821 break;
5822 default: /* E1000E_INT_MODE_LEGACY */
5823 disable_irq(adapter->pdev->irq);
5824 e1000_intr(adapter->pdev->irq, netdev);
5825 enable_irq(adapter->pdev->irq);
5826 break;
5827 }
5828}
5829#endif
5830
5831/**
5832 * e1000_io_error_detected - called when PCI error is detected
5833 * @pdev: Pointer to PCI device
5834 * @state: The current pci connection state
5835 *
5836 * This function is called after a PCI bus error affecting
5837 * this device has been detected.
5838 */
5839static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5840 pci_channel_state_t state)
5841{
5842 struct net_device *netdev = pci_get_drvdata(pdev);
5843 struct e1000_adapter *adapter = netdev_priv(netdev);
5844
5845 netif_device_detach(netdev);
5846
5847 if (state == pci_channel_io_perm_failure)
5848 return PCI_ERS_RESULT_DISCONNECT;
5849
5850 if (netif_running(netdev))
5851 e1000e_down(adapter);
5852 pci_disable_device(pdev);
5853
5854 /* Request a slot slot reset. */
5855 return PCI_ERS_RESULT_NEED_RESET;
5856}
5857
5858/**
5859 * e1000_io_slot_reset - called after the pci bus has been reset.
5860 * @pdev: Pointer to PCI device
5861 *
5862 * Restart the card from scratch, as if from a cold-boot. Implementation
5863 * resembles the first-half of the e1000_resume routine.
5864 */
5865static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5866{
5867 struct net_device *netdev = pci_get_drvdata(pdev);
5868 struct e1000_adapter *adapter = netdev_priv(netdev);
5869 struct e1000_hw *hw = &adapter->hw;
5870 u16 aspm_disable_flag = 0;
5871 int err;
5872 pci_ers_result_t result;
5873
5874 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5875 aspm_disable_flag = PCIE_LINK_STATE_L0S;
5876 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5877 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5878 if (aspm_disable_flag)
5879 e1000e_disable_aspm(pdev, aspm_disable_flag);
5880
5881 err = pci_enable_device_mem(pdev);
5882 if (err) {
5883 dev_err(&pdev->dev,
5884 "Cannot re-enable PCI device after reset.\n");
5885 result = PCI_ERS_RESULT_DISCONNECT;
5886 } else {
5887 pci_set_master(pdev);
5888 pdev->state_saved = true;
5889 pci_restore_state(pdev);
5890
5891 pci_enable_wake(pdev, PCI_D3hot, 0);
5892 pci_enable_wake(pdev, PCI_D3cold, 0);
5893
5894 e1000e_reset(adapter);
5895 ew32(WUS, ~0);
5896 result = PCI_ERS_RESULT_RECOVERED;
5897 }
5898
5899 pci_cleanup_aer_uncorrect_error_status(pdev);
5900
5901 return result;
5902}
5903
5904/**
5905 * e1000_io_resume - called when traffic can start flowing again.
5906 * @pdev: Pointer to PCI device
5907 *
5908 * This callback is called when the error recovery driver tells us that
5909 * its OK to resume normal operation. Implementation resembles the
5910 * second-half of the e1000_resume routine.
5911 */
5912static void e1000_io_resume(struct pci_dev *pdev)
5913{
5914 struct net_device *netdev = pci_get_drvdata(pdev);
5915 struct e1000_adapter *adapter = netdev_priv(netdev);
5916
5917 e1000_init_manageability_pt(adapter);
5918
5919 if (netif_running(netdev)) {
5920 if (e1000e_up(adapter)) {
5921 dev_err(&pdev->dev,
5922 "can't bring device back up after reset\n");
5923 return;
5924 }
5925 }
5926
5927 netif_device_attach(netdev);
5928
5929 /*
5930 * If the controller has AMT, do not set DRV_LOAD until the interface
5931 * is up. For all other cases, let the f/w know that the h/w is now
5932 * under the control of the driver.
5933 */
5934 if (!(adapter->flags & FLAG_HAS_AMT))
5935 e1000e_get_hw_control(adapter);
5936
5937}
5938
5939static void e1000_print_device_info(struct e1000_adapter *adapter)
5940{
5941 struct e1000_hw *hw = &adapter->hw;
5942 struct net_device *netdev = adapter->netdev;
5943 u32 ret_val;
5944 u8 pba_str[E1000_PBANUM_LENGTH];
5945
5946 /* print bus type/speed/width info */
5947 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
5948 /* bus width */
5949 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5950 "Width x1"),
5951 /* MAC address */
5952 netdev->dev_addr);
5953 e_info("Intel(R) PRO/%s Network Connection\n",
5954 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
5955 ret_val = e1000_read_pba_string_generic(hw, pba_str,
5956 E1000_PBANUM_LENGTH);
5957 if (ret_val)
5958 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
5959 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
5960 hw->mac.type, hw->phy.type, pba_str);
5961}
5962
5963static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5964{
5965 struct e1000_hw *hw = &adapter->hw;
5966 int ret_val;
5967 u16 buf = 0;
5968
5969 if (hw->mac.type != e1000_82573)
5970 return;
5971
5972 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
5973 le16_to_cpus(&buf);
5974 if (!ret_val && (!(buf & (1 << 0)))) {
5975 /* Deep Smart Power Down (DSPD) */
5976 dev_warn(&adapter->pdev->dev,
5977 "Warning: detected DSPD enabled in EEPROM\n");
5978 }
5979}
5980
5981static int e1000_set_features(struct net_device *netdev,
5982 netdev_features_t features)
5983{
5984 struct e1000_adapter *adapter = netdev_priv(netdev);
5985 netdev_features_t changed = features ^ netdev->features;
5986
5987 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
5988 adapter->flags |= FLAG_TSO_FORCE;
5989
5990 if (!(changed & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX |
5991 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
5992 NETIF_F_RXALL)))
5993 return 0;
5994
5995 if (changed & NETIF_F_RXFCS) {
5996 if (features & NETIF_F_RXFCS) {
5997 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
5998 } else {
5999 /* We need to take it back to defaults, which might mean
6000 * stripping is still disabled at the adapter level.
6001 */
6002 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6003 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6004 else
6005 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6006 }
6007 }
6008
6009 netdev->features = features;
6010
6011 if (netif_running(netdev))
6012 e1000e_reinit_locked(adapter);
6013 else
6014 e1000e_reset(adapter);
6015
6016 return 0;
6017}
6018
6019static const struct net_device_ops e1000e_netdev_ops = {
6020 .ndo_open = e1000_open,
6021 .ndo_stop = e1000_close,
6022 .ndo_start_xmit = e1000_xmit_frame,
6023 .ndo_get_stats64 = e1000e_get_stats64,
6024 .ndo_set_rx_mode = e1000e_set_rx_mode,
6025 .ndo_set_mac_address = e1000_set_mac,
6026 .ndo_change_mtu = e1000_change_mtu,
6027 .ndo_do_ioctl = e1000_ioctl,
6028 .ndo_tx_timeout = e1000_tx_timeout,
6029 .ndo_validate_addr = eth_validate_addr,
6030
6031 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
6032 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
6033#ifdef CONFIG_NET_POLL_CONTROLLER
6034 .ndo_poll_controller = e1000_netpoll,
6035#endif
6036 .ndo_set_features = e1000_set_features,
6037};
6038
6039/**
6040 * e1000_probe - Device Initialization Routine
6041 * @pdev: PCI device information struct
6042 * @ent: entry in e1000_pci_tbl
6043 *
6044 * Returns 0 on success, negative on failure
6045 *
6046 * e1000_probe initializes an adapter identified by a pci_dev structure.
6047 * The OS initialization, configuring of the adapter private structure,
6048 * and a hardware reset occur.
6049 **/
6050static int __devinit e1000_probe(struct pci_dev *pdev,
6051 const struct pci_device_id *ent)
6052{
6053 struct net_device *netdev;
6054 struct e1000_adapter *adapter;
6055 struct e1000_hw *hw;
6056 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
6057 resource_size_t mmio_start, mmio_len;
6058 resource_size_t flash_start, flash_len;
6059 static int cards_found;
6060 u16 aspm_disable_flag = 0;
6061 int i, err, pci_using_dac;
6062 u16 eeprom_data = 0;
6063 u16 eeprom_apme_mask = E1000_EEPROM_APME;
6064
6065 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
6066 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6067 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
6068 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6069 if (aspm_disable_flag)
6070 e1000e_disable_aspm(pdev, aspm_disable_flag);
6071
6072 err = pci_enable_device_mem(pdev);
6073 if (err)
6074 return err;
6075
6076 pci_using_dac = 0;
6077 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
6078 if (!err) {
6079 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
6080 if (!err)
6081 pci_using_dac = 1;
6082 } else {
6083 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
6084 if (err) {
6085 err = dma_set_coherent_mask(&pdev->dev,
6086 DMA_BIT_MASK(32));
6087 if (err) {
6088 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
6089 goto err_dma;
6090 }
6091 }
6092 }
6093
6094 err = pci_request_selected_regions_exclusive(pdev,
6095 pci_select_bars(pdev, IORESOURCE_MEM),
6096 e1000e_driver_name);
6097 if (err)
6098 goto err_pci_reg;
6099
6100 /* AER (Advanced Error Reporting) hooks */
6101 pci_enable_pcie_error_reporting(pdev);
6102
6103 pci_set_master(pdev);
6104 /* PCI config space info */
6105 err = pci_save_state(pdev);
6106 if (err)
6107 goto err_alloc_etherdev;
6108
6109 err = -ENOMEM;
6110 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6111 if (!netdev)
6112 goto err_alloc_etherdev;
6113
6114 SET_NETDEV_DEV(netdev, &pdev->dev);
6115
6116 netdev->irq = pdev->irq;
6117
6118 pci_set_drvdata(pdev, netdev);
6119 adapter = netdev_priv(netdev);
6120 hw = &adapter->hw;
6121 adapter->netdev = netdev;
6122 adapter->pdev = pdev;
6123 adapter->ei = ei;
6124 adapter->pba = ei->pba;
6125 adapter->flags = ei->flags;
6126 adapter->flags2 = ei->flags2;
6127 adapter->hw.adapter = adapter;
6128 adapter->hw.mac.type = ei->mac;
6129 adapter->max_hw_frame_size = ei->max_hw_frame_size;
6130 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
6131
6132 mmio_start = pci_resource_start(pdev, 0);
6133 mmio_len = pci_resource_len(pdev, 0);
6134
6135 err = -EIO;
6136 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6137 if (!adapter->hw.hw_addr)
6138 goto err_ioremap;
6139
6140 if ((adapter->flags & FLAG_HAS_FLASH) &&
6141 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
6142 flash_start = pci_resource_start(pdev, 1);
6143 flash_len = pci_resource_len(pdev, 1);
6144 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6145 if (!adapter->hw.flash_address)
6146 goto err_flashmap;
6147 }
6148
6149 /* construct the net_device struct */
6150 netdev->netdev_ops = &e1000e_netdev_ops;
6151 e1000e_set_ethtool_ops(netdev);
6152 netdev->watchdog_timeo = 5 * HZ;
6153 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
6154 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
6155
6156 netdev->mem_start = mmio_start;
6157 netdev->mem_end = mmio_start + mmio_len;
6158
6159 adapter->bd_number = cards_found++;
6160
6161 e1000e_check_options(adapter);
6162
6163 /* setup adapter struct */
6164 err = e1000_sw_init(adapter);
6165 if (err)
6166 goto err_sw_init;
6167
6168 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
6169 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
6170 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
6171
6172 err = ei->get_variants(adapter);
6173 if (err)
6174 goto err_hw_init;
6175
6176 if ((adapter->flags & FLAG_IS_ICH) &&
6177 (adapter->flags & FLAG_READ_ONLY_NVM))
6178 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
6179
6180 hw->mac.ops.get_bus_info(&adapter->hw);
6181
6182 adapter->hw.phy.autoneg_wait_to_complete = 0;
6183
6184 /* Copper options */
6185 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
6186 adapter->hw.phy.mdix = AUTO_ALL_MODES;
6187 adapter->hw.phy.disable_polarity_correction = 0;
6188 adapter->hw.phy.ms_type = e1000_ms_hw_default;
6189 }
6190
6191 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
6192 e_info("PHY reset is blocked due to SOL/IDER session.\n");
6193
6194 /* Set initial default active device features */
6195 netdev->features = (NETIF_F_SG |
6196 NETIF_F_HW_VLAN_RX |
6197 NETIF_F_HW_VLAN_TX |
6198 NETIF_F_TSO |
6199 NETIF_F_TSO6 |
6200 NETIF_F_RXHASH |
6201 NETIF_F_RXCSUM |
6202 NETIF_F_HW_CSUM);
6203
6204 /* Set user-changeable features (subset of all device features) */
6205 netdev->hw_features = netdev->features;
6206 netdev->hw_features |= NETIF_F_RXFCS;
6207 netdev->priv_flags |= IFF_SUPP_NOFCS;
6208 netdev->hw_features |= NETIF_F_RXALL;
6209
6210 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
6211 netdev->features |= NETIF_F_HW_VLAN_FILTER;
6212
6213 netdev->vlan_features |= (NETIF_F_SG |
6214 NETIF_F_TSO |
6215 NETIF_F_TSO6 |
6216 NETIF_F_HW_CSUM);
6217
6218 netdev->priv_flags |= IFF_UNICAST_FLT;
6219
6220 if (pci_using_dac) {
6221 netdev->features |= NETIF_F_HIGHDMA;
6222 netdev->vlan_features |= NETIF_F_HIGHDMA;
6223 }
6224
6225 if (e1000e_enable_mng_pass_thru(&adapter->hw))
6226 adapter->flags |= FLAG_MNG_PT_ENABLED;
6227
6228 /*
6229 * before reading the NVM, reset the controller to
6230 * put the device in a known good starting state
6231 */
6232 adapter->hw.mac.ops.reset_hw(&adapter->hw);
6233
6234 /*
6235 * systems with ASPM and others may see the checksum fail on the first
6236 * attempt. Let's give it a few tries
6237 */
6238 for (i = 0;; i++) {
6239 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
6240 break;
6241 if (i == 2) {
6242 e_err("The NVM Checksum Is Not Valid\n");
6243 err = -EIO;
6244 goto err_eeprom;
6245 }
6246 }
6247
6248 e1000_eeprom_checks(adapter);
6249
6250 /* copy the MAC address */
6251 if (e1000e_read_mac_addr(&adapter->hw))
6252 e_err("NVM Read Error while reading MAC address\n");
6253
6254 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
6255 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
6256
6257 if (!is_valid_ether_addr(netdev->perm_addr)) {
6258 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
6259 err = -EIO;
6260 goto err_eeprom;
6261 }
6262
6263 init_timer(&adapter->watchdog_timer);
6264 adapter->watchdog_timer.function = e1000_watchdog;
6265 adapter->watchdog_timer.data = (unsigned long) adapter;
6266
6267 init_timer(&adapter->phy_info_timer);
6268 adapter->phy_info_timer.function = e1000_update_phy_info;
6269 adapter->phy_info_timer.data = (unsigned long) adapter;
6270
6271 INIT_WORK(&adapter->reset_task, e1000_reset_task);
6272 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
6273 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6274 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
6275 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
6276
6277 /* Initialize link parameters. User can change them with ethtool */
6278 adapter->hw.mac.autoneg = 1;
6279 adapter->fc_autoneg = true;
6280 adapter->hw.fc.requested_mode = e1000_fc_default;
6281 adapter->hw.fc.current_mode = e1000_fc_default;
6282 adapter->hw.phy.autoneg_advertised = 0x2f;
6283
6284 /* ring size defaults */
6285 adapter->rx_ring->count = E1000_DEFAULT_RXD;
6286 adapter->tx_ring->count = E1000_DEFAULT_TXD;
6287
6288 /*
6289 * Initial Wake on LAN setting - If APM wake is enabled in
6290 * the EEPROM, enable the ACPI Magic Packet filter
6291 */
6292 if (adapter->flags & FLAG_APME_IN_WUC) {
6293 /* APME bit in EEPROM is mapped to WUC.APME */
6294 eeprom_data = er32(WUC);
6295 eeprom_apme_mask = E1000_WUC_APME;
6296 if ((hw->mac.type > e1000_ich10lan) &&
6297 (eeprom_data & E1000_WUC_PHY_WAKE))
6298 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
6299 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6300 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6301 (adapter->hw.bus.func == 1))
6302 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B,
6303 1, &eeprom_data);
6304 else
6305 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A,
6306 1, &eeprom_data);
6307 }
6308
6309 /* fetch WoL from EEPROM */
6310 if (eeprom_data & eeprom_apme_mask)
6311 adapter->eeprom_wol |= E1000_WUFC_MAG;
6312
6313 /*
6314 * now that we have the eeprom settings, apply the special cases
6315 * where the eeprom may be wrong or the board simply won't support
6316 * wake on lan on a particular port
6317 */
6318 if (!(adapter->flags & FLAG_HAS_WOL))
6319 adapter->eeprom_wol = 0;
6320
6321 /* initialize the wol settings based on the eeprom settings */
6322 adapter->wol = adapter->eeprom_wol;
6323 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
6324
6325 /* save off EEPROM version number */
6326 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6327
6328 /* reset the hardware with the new settings */
6329 e1000e_reset(adapter);
6330
6331 /*
6332 * If the controller has AMT, do not set DRV_LOAD until the interface
6333 * is up. For all other cases, let the f/w know that the h/w is now
6334 * under the control of the driver.
6335 */
6336 if (!(adapter->flags & FLAG_HAS_AMT))
6337 e1000e_get_hw_control(adapter);
6338
6339 strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
6340 err = register_netdev(netdev);
6341 if (err)
6342 goto err_register;
6343
6344 /* carrier off reporting is important to ethtool even BEFORE open */
6345 netif_carrier_off(netdev);
6346
6347 e1000_print_device_info(adapter);
6348
6349 if (pci_dev_run_wake(pdev))
6350 pm_runtime_put_noidle(&pdev->dev);
6351
6352 return 0;
6353
6354err_register:
6355 if (!(adapter->flags & FLAG_HAS_AMT))
6356 e1000e_release_hw_control(adapter);
6357err_eeprom:
6358 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
6359 e1000_phy_hw_reset(&adapter->hw);
6360err_hw_init:
6361 kfree(adapter->tx_ring);
6362 kfree(adapter->rx_ring);
6363err_sw_init:
6364 if (adapter->hw.flash_address)
6365 iounmap(adapter->hw.flash_address);
6366 e1000e_reset_interrupt_capability(adapter);
6367err_flashmap:
6368 iounmap(adapter->hw.hw_addr);
6369err_ioremap:
6370 free_netdev(netdev);
6371err_alloc_etherdev:
6372 pci_release_selected_regions(pdev,
6373 pci_select_bars(pdev, IORESOURCE_MEM));
6374err_pci_reg:
6375err_dma:
6376 pci_disable_device(pdev);
6377 return err;
6378}
6379
6380/**
6381 * e1000_remove - Device Removal Routine
6382 * @pdev: PCI device information struct
6383 *
6384 * e1000_remove is called by the PCI subsystem to alert the driver
6385 * that it should release a PCI device. The could be caused by a
6386 * Hot-Plug event, or because the driver is going to be removed from
6387 * memory.
6388 **/
6389static void __devexit e1000_remove(struct pci_dev *pdev)
6390{
6391 struct net_device *netdev = pci_get_drvdata(pdev);
6392 struct e1000_adapter *adapter = netdev_priv(netdev);
6393 bool down = test_bit(__E1000_DOWN, &adapter->state);
6394
6395 /*
6396 * The timers may be rescheduled, so explicitly disable them
6397 * from being rescheduled.
6398 */
6399 if (!down)
6400 set_bit(__E1000_DOWN, &adapter->state);
6401 del_timer_sync(&adapter->watchdog_timer);
6402 del_timer_sync(&adapter->phy_info_timer);
6403
6404 cancel_work_sync(&adapter->reset_task);
6405 cancel_work_sync(&adapter->watchdog_task);
6406 cancel_work_sync(&adapter->downshift_task);
6407 cancel_work_sync(&adapter->update_phy_task);
6408 cancel_work_sync(&adapter->print_hang_task);
6409
6410 if (!(netdev->flags & IFF_UP))
6411 e1000_power_down_phy(adapter);
6412
6413 /* Don't lie to e1000_close() down the road. */
6414 if (!down)
6415 clear_bit(__E1000_DOWN, &adapter->state);
6416 unregister_netdev(netdev);
6417
6418 if (pci_dev_run_wake(pdev))
6419 pm_runtime_get_noresume(&pdev->dev);
6420
6421 /*
6422 * Release control of h/w to f/w. If f/w is AMT enabled, this
6423 * would have already happened in close and is redundant.
6424 */
6425 e1000e_release_hw_control(adapter);
6426
6427 e1000e_reset_interrupt_capability(adapter);
6428 kfree(adapter->tx_ring);
6429 kfree(adapter->rx_ring);
6430
6431 iounmap(adapter->hw.hw_addr);
6432 if (adapter->hw.flash_address)
6433 iounmap(adapter->hw.flash_address);
6434 pci_release_selected_regions(pdev,
6435 pci_select_bars(pdev, IORESOURCE_MEM));
6436
6437 free_netdev(netdev);
6438
6439 /* AER disable */
6440 pci_disable_pcie_error_reporting(pdev);
6441
6442 pci_disable_device(pdev);
6443}
6444
6445/* PCI Error Recovery (ERS) */
6446static struct pci_error_handlers e1000_err_handler = {
6447 .error_detected = e1000_io_error_detected,
6448 .slot_reset = e1000_io_slot_reset,
6449 .resume = e1000_io_resume,
6450};
6451
6452static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
6453 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6454 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6455 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6456 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6457 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6458 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
6459 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6460 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6461 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
6462
6463 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6464 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6465 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6466 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
6467
6468 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6469 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6470 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
6471
6472 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
6473 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
6474 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
6475
6476 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6477 board_80003es2lan },
6478 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6479 board_80003es2lan },
6480 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6481 board_80003es2lan },
6482 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6483 board_80003es2lan },
6484
6485 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6486 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6487 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6488 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6489 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6490 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6491 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
6492 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
6493
6494 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6495 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6496 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6497 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6498 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
6499 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
6500 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6501 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6502 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6503
6504 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6505 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6506 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
6507
6508 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6509 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
6510 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
6511
6512 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6513 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6514 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6515 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6516
6517 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6518 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6519
6520 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
6521 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
6522
6523 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
6524};
6525MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6526
6527#ifdef CONFIG_PM
6528static const struct dev_pm_ops e1000_pm_ops = {
6529 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6530 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6531 e1000_runtime_resume, e1000_idle)
6532};
6533#endif
6534
6535/* PCI Device API Driver */
6536static struct pci_driver e1000_driver = {
6537 .name = e1000e_driver_name,
6538 .id_table = e1000_pci_tbl,
6539 .probe = e1000_probe,
6540 .remove = __devexit_p(e1000_remove),
6541#ifdef CONFIG_PM
6542 .driver = {
6543 .pm = &e1000_pm_ops,
6544 },
6545#endif
6546 .shutdown = e1000_shutdown,
6547 .err_handler = &e1000_err_handler
6548};
6549
6550/**
6551 * e1000_init_module - Driver Registration Routine
6552 *
6553 * e1000_init_module is the first routine called when the driver is
6554 * loaded. All it does is register with the PCI subsystem.
6555 **/
6556static int __init e1000_init_module(void)
6557{
6558 int ret;
6559 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6560 e1000e_driver_version);
6561 pr_info("Copyright(c) 1999 - 2012 Intel Corporation.\n");
6562 ret = pci_register_driver(&e1000_driver);
6563
6564 return ret;
6565}
6566module_init(e1000_init_module);
6567
6568/**
6569 * e1000_exit_module - Driver Exit Cleanup Routine
6570 *
6571 * e1000_exit_module is called just before the driver is removed
6572 * from memory.
6573 **/
6574static void __exit e1000_exit_module(void)
6575{
6576 pci_unregister_driver(&e1000_driver);
6577}
6578module_exit(e1000_exit_module);
6579
6580
6581MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6582MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6583MODULE_LICENSE("GPL");
6584MODULE_VERSION(DRV_VERSION);
6585
6586/* netdev.c */
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 1999 - 2018 Intel Corporation. */
3
4#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
5
6#include <linux/module.h>
7#include <linux/types.h>
8#include <linux/init.h>
9#include <linux/pci.h>
10#include <linux/vmalloc.h>
11#include <linux/pagemap.h>
12#include <linux/delay.h>
13#include <linux/netdevice.h>
14#include <linux/interrupt.h>
15#include <linux/tcp.h>
16#include <linux/ipv6.h>
17#include <linux/slab.h>
18#include <net/checksum.h>
19#include <net/ip6_checksum.h>
20#include <linux/ethtool.h>
21#include <linux/if_vlan.h>
22#include <linux/cpu.h>
23#include <linux/smp.h>
24#include <linux/pm_qos.h>
25#include <linux/pm_runtime.h>
26#include <linux/aer.h>
27#include <linux/prefetch.h>
28#include <linux/suspend.h>
29
30#include "e1000.h"
31
32char e1000e_driver_name[] = "e1000e";
33
34#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
35static int debug = -1;
36module_param(debug, int, 0);
37MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
38
39static const struct e1000_info *e1000_info_tbl[] = {
40 [board_82571] = &e1000_82571_info,
41 [board_82572] = &e1000_82572_info,
42 [board_82573] = &e1000_82573_info,
43 [board_82574] = &e1000_82574_info,
44 [board_82583] = &e1000_82583_info,
45 [board_80003es2lan] = &e1000_es2_info,
46 [board_ich8lan] = &e1000_ich8_info,
47 [board_ich9lan] = &e1000_ich9_info,
48 [board_ich10lan] = &e1000_ich10_info,
49 [board_pchlan] = &e1000_pch_info,
50 [board_pch2lan] = &e1000_pch2_info,
51 [board_pch_lpt] = &e1000_pch_lpt_info,
52 [board_pch_spt] = &e1000_pch_spt_info,
53 [board_pch_cnp] = &e1000_pch_cnp_info,
54 [board_pch_tgp] = &e1000_pch_tgp_info,
55};
56
57struct e1000_reg_info {
58 u32 ofs;
59 char *name;
60};
61
62static const struct e1000_reg_info e1000_reg_info_tbl[] = {
63 /* General Registers */
64 {E1000_CTRL, "CTRL"},
65 {E1000_STATUS, "STATUS"},
66 {E1000_CTRL_EXT, "CTRL_EXT"},
67
68 /* Interrupt Registers */
69 {E1000_ICR, "ICR"},
70
71 /* Rx Registers */
72 {E1000_RCTL, "RCTL"},
73 {E1000_RDLEN(0), "RDLEN"},
74 {E1000_RDH(0), "RDH"},
75 {E1000_RDT(0), "RDT"},
76 {E1000_RDTR, "RDTR"},
77 {E1000_RXDCTL(0), "RXDCTL"},
78 {E1000_ERT, "ERT"},
79 {E1000_RDBAL(0), "RDBAL"},
80 {E1000_RDBAH(0), "RDBAH"},
81 {E1000_RDFH, "RDFH"},
82 {E1000_RDFT, "RDFT"},
83 {E1000_RDFHS, "RDFHS"},
84 {E1000_RDFTS, "RDFTS"},
85 {E1000_RDFPC, "RDFPC"},
86
87 /* Tx Registers */
88 {E1000_TCTL, "TCTL"},
89 {E1000_TDBAL(0), "TDBAL"},
90 {E1000_TDBAH(0), "TDBAH"},
91 {E1000_TDLEN(0), "TDLEN"},
92 {E1000_TDH(0), "TDH"},
93 {E1000_TDT(0), "TDT"},
94 {E1000_TIDV, "TIDV"},
95 {E1000_TXDCTL(0), "TXDCTL"},
96 {E1000_TADV, "TADV"},
97 {E1000_TARC(0), "TARC"},
98 {E1000_TDFH, "TDFH"},
99 {E1000_TDFT, "TDFT"},
100 {E1000_TDFHS, "TDFHS"},
101 {E1000_TDFTS, "TDFTS"},
102 {E1000_TDFPC, "TDFPC"},
103
104 /* List Terminator */
105 {0, NULL}
106};
107
108/**
109 * __ew32_prepare - prepare to write to MAC CSR register on certain parts
110 * @hw: pointer to the HW structure
111 *
112 * When updating the MAC CSR registers, the Manageability Engine (ME) could
113 * be accessing the registers at the same time. Normally, this is handled in
114 * h/w by an arbiter but on some parts there is a bug that acknowledges Host
115 * accesses later than it should which could result in the register to have
116 * an incorrect value. Workaround this by checking the FWSM register which
117 * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
118 * and try again a number of times.
119 **/
120static void __ew32_prepare(struct e1000_hw *hw)
121{
122 s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
123
124 while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
125 udelay(50);
126}
127
128void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
129{
130 if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
131 __ew32_prepare(hw);
132
133 writel(val, hw->hw_addr + reg);
134}
135
136/**
137 * e1000_regdump - register printout routine
138 * @hw: pointer to the HW structure
139 * @reginfo: pointer to the register info table
140 **/
141static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
142{
143 int n = 0;
144 char rname[16];
145 u32 regs[8];
146
147 switch (reginfo->ofs) {
148 case E1000_RXDCTL(0):
149 for (n = 0; n < 2; n++)
150 regs[n] = __er32(hw, E1000_RXDCTL(n));
151 break;
152 case E1000_TXDCTL(0):
153 for (n = 0; n < 2; n++)
154 regs[n] = __er32(hw, E1000_TXDCTL(n));
155 break;
156 case E1000_TARC(0):
157 for (n = 0; n < 2; n++)
158 regs[n] = __er32(hw, E1000_TARC(n));
159 break;
160 default:
161 pr_info("%-15s %08x\n",
162 reginfo->name, __er32(hw, reginfo->ofs));
163 return;
164 }
165
166 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
167 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
168}
169
170static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
171 struct e1000_buffer *bi)
172{
173 int i;
174 struct e1000_ps_page *ps_page;
175
176 for (i = 0; i < adapter->rx_ps_pages; i++) {
177 ps_page = &bi->ps_pages[i];
178
179 if (ps_page->page) {
180 pr_info("packet dump for ps_page %d:\n", i);
181 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
182 16, 1, page_address(ps_page->page),
183 PAGE_SIZE, true);
184 }
185 }
186}
187
188/**
189 * e1000e_dump - Print registers, Tx-ring and Rx-ring
190 * @adapter: board private structure
191 **/
192static void e1000e_dump(struct e1000_adapter *adapter)
193{
194 struct net_device *netdev = adapter->netdev;
195 struct e1000_hw *hw = &adapter->hw;
196 struct e1000_reg_info *reginfo;
197 struct e1000_ring *tx_ring = adapter->tx_ring;
198 struct e1000_tx_desc *tx_desc;
199 struct my_u0 {
200 __le64 a;
201 __le64 b;
202 } *u0;
203 struct e1000_buffer *buffer_info;
204 struct e1000_ring *rx_ring = adapter->rx_ring;
205 union e1000_rx_desc_packet_split *rx_desc_ps;
206 union e1000_rx_desc_extended *rx_desc;
207 struct my_u1 {
208 __le64 a;
209 __le64 b;
210 __le64 c;
211 __le64 d;
212 } *u1;
213 u32 staterr;
214 int i = 0;
215
216 if (!netif_msg_hw(adapter))
217 return;
218
219 /* Print netdevice Info */
220 if (netdev) {
221 dev_info(&adapter->pdev->dev, "Net device Info\n");
222 pr_info("Device Name state trans_start\n");
223 pr_info("%-15s %016lX %016lX\n", netdev->name,
224 netdev->state, dev_trans_start(netdev));
225 }
226
227 /* Print Registers */
228 dev_info(&adapter->pdev->dev, "Register Dump\n");
229 pr_info(" Register Name Value\n");
230 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
231 reginfo->name; reginfo++) {
232 e1000_regdump(hw, reginfo);
233 }
234
235 /* Print Tx Ring Summary */
236 if (!netdev || !netif_running(netdev))
237 return;
238
239 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
240 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
241 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
242 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
243 0, tx_ring->next_to_use, tx_ring->next_to_clean,
244 (unsigned long long)buffer_info->dma,
245 buffer_info->length,
246 buffer_info->next_to_watch,
247 (unsigned long long)buffer_info->time_stamp);
248
249 /* Print Tx Ring */
250 if (!netif_msg_tx_done(adapter))
251 goto rx_ring_summary;
252
253 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
254
255 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
256 *
257 * Legacy Transmit Descriptor
258 * +--------------------------------------------------------------+
259 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
260 * +--------------------------------------------------------------+
261 * 8 | Special | CSS | Status | CMD | CSO | Length |
262 * +--------------------------------------------------------------+
263 * 63 48 47 36 35 32 31 24 23 16 15 0
264 *
265 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
266 * 63 48 47 40 39 32 31 16 15 8 7 0
267 * +----------------------------------------------------------------+
268 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
269 * +----------------------------------------------------------------+
270 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
271 * +----------------------------------------------------------------+
272 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
273 *
274 * Extended Data Descriptor (DTYP=0x1)
275 * +----------------------------------------------------------------+
276 * 0 | Buffer Address [63:0] |
277 * +----------------------------------------------------------------+
278 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
279 * +----------------------------------------------------------------+
280 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
281 */
282 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
283 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
284 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
285 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
286 const char *next_desc;
287 tx_desc = E1000_TX_DESC(*tx_ring, i);
288 buffer_info = &tx_ring->buffer_info[i];
289 u0 = (struct my_u0 *)tx_desc;
290 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
291 next_desc = " NTC/U";
292 else if (i == tx_ring->next_to_use)
293 next_desc = " NTU";
294 else if (i == tx_ring->next_to_clean)
295 next_desc = " NTC";
296 else
297 next_desc = "";
298 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
299 (!(le64_to_cpu(u0->b) & BIT(29)) ? 'l' :
300 ((le64_to_cpu(u0->b) & BIT(20)) ? 'd' : 'c')),
301 i,
302 (unsigned long long)le64_to_cpu(u0->a),
303 (unsigned long long)le64_to_cpu(u0->b),
304 (unsigned long long)buffer_info->dma,
305 buffer_info->length, buffer_info->next_to_watch,
306 (unsigned long long)buffer_info->time_stamp,
307 buffer_info->skb, next_desc);
308
309 if (netif_msg_pktdata(adapter) && buffer_info->skb)
310 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
311 16, 1, buffer_info->skb->data,
312 buffer_info->skb->len, true);
313 }
314
315 /* Print Rx Ring Summary */
316rx_ring_summary:
317 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
318 pr_info("Queue [NTU] [NTC]\n");
319 pr_info(" %5d %5X %5X\n",
320 0, rx_ring->next_to_use, rx_ring->next_to_clean);
321
322 /* Print Rx Ring */
323 if (!netif_msg_rx_status(adapter))
324 return;
325
326 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
327 switch (adapter->rx_ps_pages) {
328 case 1:
329 case 2:
330 case 3:
331 /* [Extended] Packet Split Receive Descriptor Format
332 *
333 * +-----------------------------------------------------+
334 * 0 | Buffer Address 0 [63:0] |
335 * +-----------------------------------------------------+
336 * 8 | Buffer Address 1 [63:0] |
337 * +-----------------------------------------------------+
338 * 16 | Buffer Address 2 [63:0] |
339 * +-----------------------------------------------------+
340 * 24 | Buffer Address 3 [63:0] |
341 * +-----------------------------------------------------+
342 */
343 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
344 /* [Extended] Receive Descriptor (Write-Back) Format
345 *
346 * 63 48 47 32 31 13 12 8 7 4 3 0
347 * +------------------------------------------------------+
348 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
349 * | Checksum | Ident | | Queue | | Type |
350 * +------------------------------------------------------+
351 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
352 * +------------------------------------------------------+
353 * 63 48 47 32 31 20 19 0
354 */
355 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
356 for (i = 0; i < rx_ring->count; i++) {
357 const char *next_desc;
358 buffer_info = &rx_ring->buffer_info[i];
359 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
360 u1 = (struct my_u1 *)rx_desc_ps;
361 staterr =
362 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
363
364 if (i == rx_ring->next_to_use)
365 next_desc = " NTU";
366 else if (i == rx_ring->next_to_clean)
367 next_desc = " NTC";
368 else
369 next_desc = "";
370
371 if (staterr & E1000_RXD_STAT_DD) {
372 /* Descriptor Done */
373 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
374 "RWB", i,
375 (unsigned long long)le64_to_cpu(u1->a),
376 (unsigned long long)le64_to_cpu(u1->b),
377 (unsigned long long)le64_to_cpu(u1->c),
378 (unsigned long long)le64_to_cpu(u1->d),
379 buffer_info->skb, next_desc);
380 } else {
381 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
382 "R ", i,
383 (unsigned long long)le64_to_cpu(u1->a),
384 (unsigned long long)le64_to_cpu(u1->b),
385 (unsigned long long)le64_to_cpu(u1->c),
386 (unsigned long long)le64_to_cpu(u1->d),
387 (unsigned long long)buffer_info->dma,
388 buffer_info->skb, next_desc);
389
390 if (netif_msg_pktdata(adapter))
391 e1000e_dump_ps_pages(adapter,
392 buffer_info);
393 }
394 }
395 break;
396 default:
397 case 0:
398 /* Extended Receive Descriptor (Read) Format
399 *
400 * +-----------------------------------------------------+
401 * 0 | Buffer Address [63:0] |
402 * +-----------------------------------------------------+
403 * 8 | Reserved |
404 * +-----------------------------------------------------+
405 */
406 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
407 /* Extended Receive Descriptor (Write-Back) Format
408 *
409 * 63 48 47 32 31 24 23 4 3 0
410 * +------------------------------------------------------+
411 * | RSS Hash | | | |
412 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
413 * | Packet | IP | | | Type |
414 * | Checksum | Ident | | | |
415 * +------------------------------------------------------+
416 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
417 * +------------------------------------------------------+
418 * 63 48 47 32 31 20 19 0
419 */
420 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
421
422 for (i = 0; i < rx_ring->count; i++) {
423 const char *next_desc;
424
425 buffer_info = &rx_ring->buffer_info[i];
426 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
427 u1 = (struct my_u1 *)rx_desc;
428 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
429
430 if (i == rx_ring->next_to_use)
431 next_desc = " NTU";
432 else if (i == rx_ring->next_to_clean)
433 next_desc = " NTC";
434 else
435 next_desc = "";
436
437 if (staterr & E1000_RXD_STAT_DD) {
438 /* Descriptor Done */
439 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
440 "RWB", i,
441 (unsigned long long)le64_to_cpu(u1->a),
442 (unsigned long long)le64_to_cpu(u1->b),
443 buffer_info->skb, next_desc);
444 } else {
445 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
446 "R ", i,
447 (unsigned long long)le64_to_cpu(u1->a),
448 (unsigned long long)le64_to_cpu(u1->b),
449 (unsigned long long)buffer_info->dma,
450 buffer_info->skb, next_desc);
451
452 if (netif_msg_pktdata(adapter) &&
453 buffer_info->skb)
454 print_hex_dump(KERN_INFO, "",
455 DUMP_PREFIX_ADDRESS, 16,
456 1,
457 buffer_info->skb->data,
458 adapter->rx_buffer_len,
459 true);
460 }
461 }
462 }
463}
464
465/**
466 * e1000_desc_unused - calculate if we have unused descriptors
467 * @ring: pointer to ring struct to perform calculation on
468 **/
469static int e1000_desc_unused(struct e1000_ring *ring)
470{
471 if (ring->next_to_clean > ring->next_to_use)
472 return ring->next_to_clean - ring->next_to_use - 1;
473
474 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
475}
476
477/**
478 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
479 * @adapter: board private structure
480 * @hwtstamps: time stamp structure to update
481 * @systim: unsigned 64bit system time value.
482 *
483 * Convert the system time value stored in the RX/TXSTMP registers into a
484 * hwtstamp which can be used by the upper level time stamping functions.
485 *
486 * The 'systim_lock' spinlock is used to protect the consistency of the
487 * system time value. This is needed because reading the 64 bit time
488 * value involves reading two 32 bit registers. The first read latches the
489 * value.
490 **/
491static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
492 struct skb_shared_hwtstamps *hwtstamps,
493 u64 systim)
494{
495 u64 ns;
496 unsigned long flags;
497
498 spin_lock_irqsave(&adapter->systim_lock, flags);
499 ns = timecounter_cyc2time(&adapter->tc, systim);
500 spin_unlock_irqrestore(&adapter->systim_lock, flags);
501
502 memset(hwtstamps, 0, sizeof(*hwtstamps));
503 hwtstamps->hwtstamp = ns_to_ktime(ns);
504}
505
506/**
507 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
508 * @adapter: board private structure
509 * @status: descriptor extended error and status field
510 * @skb: particular skb to include time stamp
511 *
512 * If the time stamp is valid, convert it into the timecounter ns value
513 * and store that result into the shhwtstamps structure which is passed
514 * up the network stack.
515 **/
516static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
517 struct sk_buff *skb)
518{
519 struct e1000_hw *hw = &adapter->hw;
520 u64 rxstmp;
521
522 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
523 !(status & E1000_RXDEXT_STATERR_TST) ||
524 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
525 return;
526
527 /* The Rx time stamp registers contain the time stamp. No other
528 * received packet will be time stamped until the Rx time stamp
529 * registers are read. Because only one packet can be time stamped
530 * at a time, the register values must belong to this packet and
531 * therefore none of the other additional attributes need to be
532 * compared.
533 */
534 rxstmp = (u64)er32(RXSTMPL);
535 rxstmp |= (u64)er32(RXSTMPH) << 32;
536 e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
537
538 adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
539}
540
541/**
542 * e1000_receive_skb - helper function to handle Rx indications
543 * @adapter: board private structure
544 * @netdev: pointer to netdev struct
545 * @staterr: descriptor extended error and status field as written by hardware
546 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
547 * @skb: pointer to sk_buff to be indicated to stack
548 **/
549static void e1000_receive_skb(struct e1000_adapter *adapter,
550 struct net_device *netdev, struct sk_buff *skb,
551 u32 staterr, __le16 vlan)
552{
553 u16 tag = le16_to_cpu(vlan);
554
555 e1000e_rx_hwtstamp(adapter, staterr, skb);
556
557 skb->protocol = eth_type_trans(skb, netdev);
558
559 if (staterr & E1000_RXD_STAT_VP)
560 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
561
562 napi_gro_receive(&adapter->napi, skb);
563}
564
565/**
566 * e1000_rx_checksum - Receive Checksum Offload
567 * @adapter: board private structure
568 * @status_err: receive descriptor status and error fields
569 * @skb: socket buffer with received data
570 **/
571static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
572 struct sk_buff *skb)
573{
574 u16 status = (u16)status_err;
575 u8 errors = (u8)(status_err >> 24);
576
577 skb_checksum_none_assert(skb);
578
579 /* Rx checksum disabled */
580 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
581 return;
582
583 /* Ignore Checksum bit is set */
584 if (status & E1000_RXD_STAT_IXSM)
585 return;
586
587 /* TCP/UDP checksum error bit or IP checksum error bit is set */
588 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
589 /* let the stack verify checksum errors */
590 adapter->hw_csum_err++;
591 return;
592 }
593
594 /* TCP/UDP Checksum has not been calculated */
595 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
596 return;
597
598 /* It must be a TCP or UDP packet with a valid checksum */
599 skb->ip_summed = CHECKSUM_UNNECESSARY;
600 adapter->hw_csum_good++;
601}
602
603static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
604{
605 struct e1000_adapter *adapter = rx_ring->adapter;
606 struct e1000_hw *hw = &adapter->hw;
607
608 __ew32_prepare(hw);
609 writel(i, rx_ring->tail);
610
611 if (unlikely(i != readl(rx_ring->tail))) {
612 u32 rctl = er32(RCTL);
613
614 ew32(RCTL, rctl & ~E1000_RCTL_EN);
615 e_err("ME firmware caused invalid RDT - resetting\n");
616 schedule_work(&adapter->reset_task);
617 }
618}
619
620static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
621{
622 struct e1000_adapter *adapter = tx_ring->adapter;
623 struct e1000_hw *hw = &adapter->hw;
624
625 __ew32_prepare(hw);
626 writel(i, tx_ring->tail);
627
628 if (unlikely(i != readl(tx_ring->tail))) {
629 u32 tctl = er32(TCTL);
630
631 ew32(TCTL, tctl & ~E1000_TCTL_EN);
632 e_err("ME firmware caused invalid TDT - resetting\n");
633 schedule_work(&adapter->reset_task);
634 }
635}
636
637/**
638 * e1000_alloc_rx_buffers - Replace used receive buffers
639 * @rx_ring: Rx descriptor ring
640 * @cleaned_count: number to reallocate
641 * @gfp: flags for allocation
642 **/
643static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
644 int cleaned_count, gfp_t gfp)
645{
646 struct e1000_adapter *adapter = rx_ring->adapter;
647 struct net_device *netdev = adapter->netdev;
648 struct pci_dev *pdev = adapter->pdev;
649 union e1000_rx_desc_extended *rx_desc;
650 struct e1000_buffer *buffer_info;
651 struct sk_buff *skb;
652 unsigned int i;
653 unsigned int bufsz = adapter->rx_buffer_len;
654
655 i = rx_ring->next_to_use;
656 buffer_info = &rx_ring->buffer_info[i];
657
658 while (cleaned_count--) {
659 skb = buffer_info->skb;
660 if (skb) {
661 skb_trim(skb, 0);
662 goto map_skb;
663 }
664
665 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
666 if (!skb) {
667 /* Better luck next round */
668 adapter->alloc_rx_buff_failed++;
669 break;
670 }
671
672 buffer_info->skb = skb;
673map_skb:
674 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
675 adapter->rx_buffer_len,
676 DMA_FROM_DEVICE);
677 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
678 dev_err(&pdev->dev, "Rx DMA map failed\n");
679 adapter->rx_dma_failed++;
680 break;
681 }
682
683 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
684 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
685
686 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
687 /* Force memory writes to complete before letting h/w
688 * know there are new descriptors to fetch. (Only
689 * applicable for weak-ordered memory model archs,
690 * such as IA-64).
691 */
692 wmb();
693 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
694 e1000e_update_rdt_wa(rx_ring, i);
695 else
696 writel(i, rx_ring->tail);
697 }
698 i++;
699 if (i == rx_ring->count)
700 i = 0;
701 buffer_info = &rx_ring->buffer_info[i];
702 }
703
704 rx_ring->next_to_use = i;
705}
706
707/**
708 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
709 * @rx_ring: Rx descriptor ring
710 * @cleaned_count: number to reallocate
711 * @gfp: flags for allocation
712 **/
713static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
714 int cleaned_count, gfp_t gfp)
715{
716 struct e1000_adapter *adapter = rx_ring->adapter;
717 struct net_device *netdev = adapter->netdev;
718 struct pci_dev *pdev = adapter->pdev;
719 union e1000_rx_desc_packet_split *rx_desc;
720 struct e1000_buffer *buffer_info;
721 struct e1000_ps_page *ps_page;
722 struct sk_buff *skb;
723 unsigned int i, j;
724
725 i = rx_ring->next_to_use;
726 buffer_info = &rx_ring->buffer_info[i];
727
728 while (cleaned_count--) {
729 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
730
731 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
732 ps_page = &buffer_info->ps_pages[j];
733 if (j >= adapter->rx_ps_pages) {
734 /* all unused desc entries get hw null ptr */
735 rx_desc->read.buffer_addr[j + 1] =
736 ~cpu_to_le64(0);
737 continue;
738 }
739 if (!ps_page->page) {
740 ps_page->page = alloc_page(gfp);
741 if (!ps_page->page) {
742 adapter->alloc_rx_buff_failed++;
743 goto no_buffers;
744 }
745 ps_page->dma = dma_map_page(&pdev->dev,
746 ps_page->page,
747 0, PAGE_SIZE,
748 DMA_FROM_DEVICE);
749 if (dma_mapping_error(&pdev->dev,
750 ps_page->dma)) {
751 dev_err(&adapter->pdev->dev,
752 "Rx DMA page map failed\n");
753 adapter->rx_dma_failed++;
754 goto no_buffers;
755 }
756 }
757 /* Refresh the desc even if buffer_addrs
758 * didn't change because each write-back
759 * erases this info.
760 */
761 rx_desc->read.buffer_addr[j + 1] =
762 cpu_to_le64(ps_page->dma);
763 }
764
765 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
766 gfp);
767
768 if (!skb) {
769 adapter->alloc_rx_buff_failed++;
770 break;
771 }
772
773 buffer_info->skb = skb;
774 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
775 adapter->rx_ps_bsize0,
776 DMA_FROM_DEVICE);
777 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
778 dev_err(&pdev->dev, "Rx DMA map failed\n");
779 adapter->rx_dma_failed++;
780 /* cleanup skb */
781 dev_kfree_skb_any(skb);
782 buffer_info->skb = NULL;
783 break;
784 }
785
786 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
787
788 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
789 /* Force memory writes to complete before letting h/w
790 * know there are new descriptors to fetch. (Only
791 * applicable for weak-ordered memory model archs,
792 * such as IA-64).
793 */
794 wmb();
795 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
796 e1000e_update_rdt_wa(rx_ring, i << 1);
797 else
798 writel(i << 1, rx_ring->tail);
799 }
800
801 i++;
802 if (i == rx_ring->count)
803 i = 0;
804 buffer_info = &rx_ring->buffer_info[i];
805 }
806
807no_buffers:
808 rx_ring->next_to_use = i;
809}
810
811/**
812 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
813 * @rx_ring: Rx descriptor ring
814 * @cleaned_count: number of buffers to allocate this pass
815 * @gfp: flags for allocation
816 **/
817
818static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
819 int cleaned_count, gfp_t gfp)
820{
821 struct e1000_adapter *adapter = rx_ring->adapter;
822 struct net_device *netdev = adapter->netdev;
823 struct pci_dev *pdev = adapter->pdev;
824 union e1000_rx_desc_extended *rx_desc;
825 struct e1000_buffer *buffer_info;
826 struct sk_buff *skb;
827 unsigned int i;
828 unsigned int bufsz = 256 - 16; /* for skb_reserve */
829
830 i = rx_ring->next_to_use;
831 buffer_info = &rx_ring->buffer_info[i];
832
833 while (cleaned_count--) {
834 skb = buffer_info->skb;
835 if (skb) {
836 skb_trim(skb, 0);
837 goto check_page;
838 }
839
840 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
841 if (unlikely(!skb)) {
842 /* Better luck next round */
843 adapter->alloc_rx_buff_failed++;
844 break;
845 }
846
847 buffer_info->skb = skb;
848check_page:
849 /* allocate a new page if necessary */
850 if (!buffer_info->page) {
851 buffer_info->page = alloc_page(gfp);
852 if (unlikely(!buffer_info->page)) {
853 adapter->alloc_rx_buff_failed++;
854 break;
855 }
856 }
857
858 if (!buffer_info->dma) {
859 buffer_info->dma = dma_map_page(&pdev->dev,
860 buffer_info->page, 0,
861 PAGE_SIZE,
862 DMA_FROM_DEVICE);
863 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
864 adapter->alloc_rx_buff_failed++;
865 break;
866 }
867 }
868
869 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
870 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
871
872 if (unlikely(++i == rx_ring->count))
873 i = 0;
874 buffer_info = &rx_ring->buffer_info[i];
875 }
876
877 if (likely(rx_ring->next_to_use != i)) {
878 rx_ring->next_to_use = i;
879 if (unlikely(i-- == 0))
880 i = (rx_ring->count - 1);
881
882 /* Force memory writes to complete before letting h/w
883 * know there are new descriptors to fetch. (Only
884 * applicable for weak-ordered memory model archs,
885 * such as IA-64).
886 */
887 wmb();
888 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
889 e1000e_update_rdt_wa(rx_ring, i);
890 else
891 writel(i, rx_ring->tail);
892 }
893}
894
895static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
896 struct sk_buff *skb)
897{
898 if (netdev->features & NETIF_F_RXHASH)
899 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
900}
901
902/**
903 * e1000_clean_rx_irq - Send received data up the network stack
904 * @rx_ring: Rx descriptor ring
905 * @work_done: output parameter for indicating completed work
906 * @work_to_do: how many packets we can clean
907 *
908 * the return value indicates whether actual cleaning was done, there
909 * is no guarantee that everything was cleaned
910 **/
911static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
912 int work_to_do)
913{
914 struct e1000_adapter *adapter = rx_ring->adapter;
915 struct net_device *netdev = adapter->netdev;
916 struct pci_dev *pdev = adapter->pdev;
917 struct e1000_hw *hw = &adapter->hw;
918 union e1000_rx_desc_extended *rx_desc, *next_rxd;
919 struct e1000_buffer *buffer_info, *next_buffer;
920 u32 length, staterr;
921 unsigned int i;
922 int cleaned_count = 0;
923 bool cleaned = false;
924 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
925
926 i = rx_ring->next_to_clean;
927 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
928 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
929 buffer_info = &rx_ring->buffer_info[i];
930
931 while (staterr & E1000_RXD_STAT_DD) {
932 struct sk_buff *skb;
933
934 if (*work_done >= work_to_do)
935 break;
936 (*work_done)++;
937 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
938
939 skb = buffer_info->skb;
940 buffer_info->skb = NULL;
941
942 prefetch(skb->data - NET_IP_ALIGN);
943
944 i++;
945 if (i == rx_ring->count)
946 i = 0;
947 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
948 prefetch(next_rxd);
949
950 next_buffer = &rx_ring->buffer_info[i];
951
952 cleaned = true;
953 cleaned_count++;
954 dma_unmap_single(&pdev->dev, buffer_info->dma,
955 adapter->rx_buffer_len, DMA_FROM_DEVICE);
956 buffer_info->dma = 0;
957
958 length = le16_to_cpu(rx_desc->wb.upper.length);
959
960 /* !EOP means multiple descriptors were used to store a single
961 * packet, if that's the case we need to toss it. In fact, we
962 * need to toss every packet with the EOP bit clear and the
963 * next frame that _does_ have the EOP bit set, as it is by
964 * definition only a frame fragment
965 */
966 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
967 adapter->flags2 |= FLAG2_IS_DISCARDING;
968
969 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
970 /* All receives must fit into a single buffer */
971 e_dbg("Receive packet consumed multiple buffers\n");
972 /* recycle */
973 buffer_info->skb = skb;
974 if (staterr & E1000_RXD_STAT_EOP)
975 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
976 goto next_desc;
977 }
978
979 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
980 !(netdev->features & NETIF_F_RXALL))) {
981 /* recycle */
982 buffer_info->skb = skb;
983 goto next_desc;
984 }
985
986 /* adjust length to remove Ethernet CRC */
987 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
988 /* If configured to store CRC, don't subtract FCS,
989 * but keep the FCS bytes out of the total_rx_bytes
990 * counter
991 */
992 if (netdev->features & NETIF_F_RXFCS)
993 total_rx_bytes -= 4;
994 else
995 length -= 4;
996 }
997
998 total_rx_bytes += length;
999 total_rx_packets++;
1000
1001 /* code added for copybreak, this should improve
1002 * performance for small packets with large amounts
1003 * of reassembly being done in the stack
1004 */
1005 if (length < copybreak) {
1006 struct sk_buff *new_skb =
1007 napi_alloc_skb(&adapter->napi, length);
1008 if (new_skb) {
1009 skb_copy_to_linear_data_offset(new_skb,
1010 -NET_IP_ALIGN,
1011 (skb->data -
1012 NET_IP_ALIGN),
1013 (length +
1014 NET_IP_ALIGN));
1015 /* save the skb in buffer_info as good */
1016 buffer_info->skb = skb;
1017 skb = new_skb;
1018 }
1019 /* else just continue with the old one */
1020 }
1021 /* end copybreak code */
1022 skb_put(skb, length);
1023
1024 /* Receive Checksum Offload */
1025 e1000_rx_checksum(adapter, staterr, skb);
1026
1027 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1028
1029 e1000_receive_skb(adapter, netdev, skb, staterr,
1030 rx_desc->wb.upper.vlan);
1031
1032next_desc:
1033 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1034
1035 /* return some buffers to hardware, one at a time is too slow */
1036 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1037 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1038 GFP_ATOMIC);
1039 cleaned_count = 0;
1040 }
1041
1042 /* use prefetched values */
1043 rx_desc = next_rxd;
1044 buffer_info = next_buffer;
1045
1046 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1047 }
1048 rx_ring->next_to_clean = i;
1049
1050 cleaned_count = e1000_desc_unused(rx_ring);
1051 if (cleaned_count)
1052 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1053
1054 adapter->total_rx_bytes += total_rx_bytes;
1055 adapter->total_rx_packets += total_rx_packets;
1056 return cleaned;
1057}
1058
1059static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1060 struct e1000_buffer *buffer_info,
1061 bool drop)
1062{
1063 struct e1000_adapter *adapter = tx_ring->adapter;
1064
1065 if (buffer_info->dma) {
1066 if (buffer_info->mapped_as_page)
1067 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1068 buffer_info->length, DMA_TO_DEVICE);
1069 else
1070 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1071 buffer_info->length, DMA_TO_DEVICE);
1072 buffer_info->dma = 0;
1073 }
1074 if (buffer_info->skb) {
1075 if (drop)
1076 dev_kfree_skb_any(buffer_info->skb);
1077 else
1078 dev_consume_skb_any(buffer_info->skb);
1079 buffer_info->skb = NULL;
1080 }
1081 buffer_info->time_stamp = 0;
1082}
1083
1084static void e1000_print_hw_hang(struct work_struct *work)
1085{
1086 struct e1000_adapter *adapter = container_of(work,
1087 struct e1000_adapter,
1088 print_hang_task);
1089 struct net_device *netdev = adapter->netdev;
1090 struct e1000_ring *tx_ring = adapter->tx_ring;
1091 unsigned int i = tx_ring->next_to_clean;
1092 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1093 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1094 struct e1000_hw *hw = &adapter->hw;
1095 u16 phy_status, phy_1000t_status, phy_ext_status;
1096 u16 pci_status;
1097
1098 if (test_bit(__E1000_DOWN, &adapter->state))
1099 return;
1100
1101 if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1102 /* May be block on write-back, flush and detect again
1103 * flush pending descriptor writebacks to memory
1104 */
1105 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1106 /* execute the writes immediately */
1107 e1e_flush();
1108 /* Due to rare timing issues, write to TIDV again to ensure
1109 * the write is successful
1110 */
1111 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1112 /* execute the writes immediately */
1113 e1e_flush();
1114 adapter->tx_hang_recheck = true;
1115 return;
1116 }
1117 adapter->tx_hang_recheck = false;
1118
1119 if (er32(TDH(0)) == er32(TDT(0))) {
1120 e_dbg("false hang detected, ignoring\n");
1121 return;
1122 }
1123
1124 /* Real hang detected */
1125 netif_stop_queue(netdev);
1126
1127 e1e_rphy(hw, MII_BMSR, &phy_status);
1128 e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1129 e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1130
1131 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1132
1133 /* detected Hardware unit hang */
1134 e_err("Detected Hardware Unit Hang:\n"
1135 " TDH <%x>\n"
1136 " TDT <%x>\n"
1137 " next_to_use <%x>\n"
1138 " next_to_clean <%x>\n"
1139 "buffer_info[next_to_clean]:\n"
1140 " time_stamp <%lx>\n"
1141 " next_to_watch <%x>\n"
1142 " jiffies <%lx>\n"
1143 " next_to_watch.status <%x>\n"
1144 "MAC Status <%x>\n"
1145 "PHY Status <%x>\n"
1146 "PHY 1000BASE-T Status <%x>\n"
1147 "PHY Extended Status <%x>\n"
1148 "PCI Status <%x>\n",
1149 readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1150 tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1151 eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1152 phy_status, phy_1000t_status, phy_ext_status, pci_status);
1153
1154 e1000e_dump(adapter);
1155
1156 /* Suggest workaround for known h/w issue */
1157 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1158 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1159}
1160
1161/**
1162 * e1000e_tx_hwtstamp_work - check for Tx time stamp
1163 * @work: pointer to work struct
1164 *
1165 * This work function polls the TSYNCTXCTL valid bit to determine when a
1166 * timestamp has been taken for the current stored skb. The timestamp must
1167 * be for this skb because only one such packet is allowed in the queue.
1168 */
1169static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1170{
1171 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1172 tx_hwtstamp_work);
1173 struct e1000_hw *hw = &adapter->hw;
1174
1175 if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1176 struct sk_buff *skb = adapter->tx_hwtstamp_skb;
1177 struct skb_shared_hwtstamps shhwtstamps;
1178 u64 txstmp;
1179
1180 txstmp = er32(TXSTMPL);
1181 txstmp |= (u64)er32(TXSTMPH) << 32;
1182
1183 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1184
1185 /* Clear the global tx_hwtstamp_skb pointer and force writes
1186 * prior to notifying the stack of a Tx timestamp.
1187 */
1188 adapter->tx_hwtstamp_skb = NULL;
1189 wmb(); /* force write prior to skb_tstamp_tx */
1190
1191 skb_tstamp_tx(skb, &shhwtstamps);
1192 dev_consume_skb_any(skb);
1193 } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1194 + adapter->tx_timeout_factor * HZ)) {
1195 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1196 adapter->tx_hwtstamp_skb = NULL;
1197 adapter->tx_hwtstamp_timeouts++;
1198 e_warn("clearing Tx timestamp hang\n");
1199 } else {
1200 /* reschedule to check later */
1201 schedule_work(&adapter->tx_hwtstamp_work);
1202 }
1203}
1204
1205/**
1206 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1207 * @tx_ring: Tx descriptor ring
1208 *
1209 * the return value indicates whether actual cleaning was done, there
1210 * is no guarantee that everything was cleaned
1211 **/
1212static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1213{
1214 struct e1000_adapter *adapter = tx_ring->adapter;
1215 struct net_device *netdev = adapter->netdev;
1216 struct e1000_hw *hw = &adapter->hw;
1217 struct e1000_tx_desc *tx_desc, *eop_desc;
1218 struct e1000_buffer *buffer_info;
1219 unsigned int i, eop;
1220 unsigned int count = 0;
1221 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1222 unsigned int bytes_compl = 0, pkts_compl = 0;
1223
1224 i = tx_ring->next_to_clean;
1225 eop = tx_ring->buffer_info[i].next_to_watch;
1226 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1227
1228 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1229 (count < tx_ring->count)) {
1230 bool cleaned = false;
1231
1232 dma_rmb(); /* read buffer_info after eop_desc */
1233 for (; !cleaned; count++) {
1234 tx_desc = E1000_TX_DESC(*tx_ring, i);
1235 buffer_info = &tx_ring->buffer_info[i];
1236 cleaned = (i == eop);
1237
1238 if (cleaned) {
1239 total_tx_packets += buffer_info->segs;
1240 total_tx_bytes += buffer_info->bytecount;
1241 if (buffer_info->skb) {
1242 bytes_compl += buffer_info->skb->len;
1243 pkts_compl++;
1244 }
1245 }
1246
1247 e1000_put_txbuf(tx_ring, buffer_info, false);
1248 tx_desc->upper.data = 0;
1249
1250 i++;
1251 if (i == tx_ring->count)
1252 i = 0;
1253 }
1254
1255 if (i == tx_ring->next_to_use)
1256 break;
1257 eop = tx_ring->buffer_info[i].next_to_watch;
1258 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1259 }
1260
1261 tx_ring->next_to_clean = i;
1262
1263 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1264
1265#define TX_WAKE_THRESHOLD 32
1266 if (count && netif_carrier_ok(netdev) &&
1267 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1268 /* Make sure that anybody stopping the queue after this
1269 * sees the new next_to_clean.
1270 */
1271 smp_mb();
1272
1273 if (netif_queue_stopped(netdev) &&
1274 !(test_bit(__E1000_DOWN, &adapter->state))) {
1275 netif_wake_queue(netdev);
1276 ++adapter->restart_queue;
1277 }
1278 }
1279
1280 if (adapter->detect_tx_hung) {
1281 /* Detect a transmit hang in hardware, this serializes the
1282 * check with the clearing of time_stamp and movement of i
1283 */
1284 adapter->detect_tx_hung = false;
1285 if (tx_ring->buffer_info[i].time_stamp &&
1286 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1287 + (adapter->tx_timeout_factor * HZ)) &&
1288 !(er32(STATUS) & E1000_STATUS_TXOFF))
1289 schedule_work(&adapter->print_hang_task);
1290 else
1291 adapter->tx_hang_recheck = false;
1292 }
1293 adapter->total_tx_bytes += total_tx_bytes;
1294 adapter->total_tx_packets += total_tx_packets;
1295 return count < tx_ring->count;
1296}
1297
1298/**
1299 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1300 * @rx_ring: Rx descriptor ring
1301 * @work_done: output parameter for indicating completed work
1302 * @work_to_do: how many packets we can clean
1303 *
1304 * the return value indicates whether actual cleaning was done, there
1305 * is no guarantee that everything was cleaned
1306 **/
1307static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1308 int work_to_do)
1309{
1310 struct e1000_adapter *adapter = rx_ring->adapter;
1311 struct e1000_hw *hw = &adapter->hw;
1312 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1313 struct net_device *netdev = adapter->netdev;
1314 struct pci_dev *pdev = adapter->pdev;
1315 struct e1000_buffer *buffer_info, *next_buffer;
1316 struct e1000_ps_page *ps_page;
1317 struct sk_buff *skb;
1318 unsigned int i, j;
1319 u32 length, staterr;
1320 int cleaned_count = 0;
1321 bool cleaned = false;
1322 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1323
1324 i = rx_ring->next_to_clean;
1325 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1326 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1327 buffer_info = &rx_ring->buffer_info[i];
1328
1329 while (staterr & E1000_RXD_STAT_DD) {
1330 if (*work_done >= work_to_do)
1331 break;
1332 (*work_done)++;
1333 skb = buffer_info->skb;
1334 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1335
1336 /* in the packet split case this is header only */
1337 prefetch(skb->data - NET_IP_ALIGN);
1338
1339 i++;
1340 if (i == rx_ring->count)
1341 i = 0;
1342 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1343 prefetch(next_rxd);
1344
1345 next_buffer = &rx_ring->buffer_info[i];
1346
1347 cleaned = true;
1348 cleaned_count++;
1349 dma_unmap_single(&pdev->dev, buffer_info->dma,
1350 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1351 buffer_info->dma = 0;
1352
1353 /* see !EOP comment in other Rx routine */
1354 if (!(staterr & E1000_RXD_STAT_EOP))
1355 adapter->flags2 |= FLAG2_IS_DISCARDING;
1356
1357 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1358 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1359 dev_kfree_skb_irq(skb);
1360 if (staterr & E1000_RXD_STAT_EOP)
1361 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1362 goto next_desc;
1363 }
1364
1365 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1366 !(netdev->features & NETIF_F_RXALL))) {
1367 dev_kfree_skb_irq(skb);
1368 goto next_desc;
1369 }
1370
1371 length = le16_to_cpu(rx_desc->wb.middle.length0);
1372
1373 if (!length) {
1374 e_dbg("Last part of the packet spanning multiple descriptors\n");
1375 dev_kfree_skb_irq(skb);
1376 goto next_desc;
1377 }
1378
1379 /* Good Receive */
1380 skb_put(skb, length);
1381
1382 {
1383 /* this looks ugly, but it seems compiler issues make
1384 * it more efficient than reusing j
1385 */
1386 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1387
1388 /* page alloc/put takes too long and effects small
1389 * packet throughput, so unsplit small packets and
1390 * save the alloc/put only valid in softirq (napi)
1391 * context to call kmap_*
1392 */
1393 if (l1 && (l1 <= copybreak) &&
1394 ((length + l1) <= adapter->rx_ps_bsize0)) {
1395 u8 *vaddr;
1396
1397 ps_page = &buffer_info->ps_pages[0];
1398
1399 /* there is no documentation about how to call
1400 * kmap_atomic, so we can't hold the mapping
1401 * very long
1402 */
1403 dma_sync_single_for_cpu(&pdev->dev,
1404 ps_page->dma,
1405 PAGE_SIZE,
1406 DMA_FROM_DEVICE);
1407 vaddr = kmap_atomic(ps_page->page);
1408 memcpy(skb_tail_pointer(skb), vaddr, l1);
1409 kunmap_atomic(vaddr);
1410 dma_sync_single_for_device(&pdev->dev,
1411 ps_page->dma,
1412 PAGE_SIZE,
1413 DMA_FROM_DEVICE);
1414
1415 /* remove the CRC */
1416 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1417 if (!(netdev->features & NETIF_F_RXFCS))
1418 l1 -= 4;
1419 }
1420
1421 skb_put(skb, l1);
1422 goto copydone;
1423 } /* if */
1424 }
1425
1426 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1427 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1428 if (!length)
1429 break;
1430
1431 ps_page = &buffer_info->ps_pages[j];
1432 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1433 DMA_FROM_DEVICE);
1434 ps_page->dma = 0;
1435 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1436 ps_page->page = NULL;
1437 skb->len += length;
1438 skb->data_len += length;
1439 skb->truesize += PAGE_SIZE;
1440 }
1441
1442 /* strip the ethernet crc, problem is we're using pages now so
1443 * this whole operation can get a little cpu intensive
1444 */
1445 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1446 if (!(netdev->features & NETIF_F_RXFCS))
1447 pskb_trim(skb, skb->len - 4);
1448 }
1449
1450copydone:
1451 total_rx_bytes += skb->len;
1452 total_rx_packets++;
1453
1454 e1000_rx_checksum(adapter, staterr, skb);
1455
1456 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1457
1458 if (rx_desc->wb.upper.header_status &
1459 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1460 adapter->rx_hdr_split++;
1461
1462 e1000_receive_skb(adapter, netdev, skb, staterr,
1463 rx_desc->wb.middle.vlan);
1464
1465next_desc:
1466 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1467 buffer_info->skb = NULL;
1468
1469 /* return some buffers to hardware, one at a time is too slow */
1470 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1471 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1472 GFP_ATOMIC);
1473 cleaned_count = 0;
1474 }
1475
1476 /* use prefetched values */
1477 rx_desc = next_rxd;
1478 buffer_info = next_buffer;
1479
1480 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1481 }
1482 rx_ring->next_to_clean = i;
1483
1484 cleaned_count = e1000_desc_unused(rx_ring);
1485 if (cleaned_count)
1486 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1487
1488 adapter->total_rx_bytes += total_rx_bytes;
1489 adapter->total_rx_packets += total_rx_packets;
1490 return cleaned;
1491}
1492
1493static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1494 u16 length)
1495{
1496 bi->page = NULL;
1497 skb->len += length;
1498 skb->data_len += length;
1499 skb->truesize += PAGE_SIZE;
1500}
1501
1502/**
1503 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1504 * @rx_ring: Rx descriptor ring
1505 * @work_done: output parameter for indicating completed work
1506 * @work_to_do: how many packets we can clean
1507 *
1508 * the return value indicates whether actual cleaning was done, there
1509 * is no guarantee that everything was cleaned
1510 **/
1511static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1512 int work_to_do)
1513{
1514 struct e1000_adapter *adapter = rx_ring->adapter;
1515 struct net_device *netdev = adapter->netdev;
1516 struct pci_dev *pdev = adapter->pdev;
1517 union e1000_rx_desc_extended *rx_desc, *next_rxd;
1518 struct e1000_buffer *buffer_info, *next_buffer;
1519 u32 length, staterr;
1520 unsigned int i;
1521 int cleaned_count = 0;
1522 bool cleaned = false;
1523 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1524 struct skb_shared_info *shinfo;
1525
1526 i = rx_ring->next_to_clean;
1527 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1528 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1529 buffer_info = &rx_ring->buffer_info[i];
1530
1531 while (staterr & E1000_RXD_STAT_DD) {
1532 struct sk_buff *skb;
1533
1534 if (*work_done >= work_to_do)
1535 break;
1536 (*work_done)++;
1537 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1538
1539 skb = buffer_info->skb;
1540 buffer_info->skb = NULL;
1541
1542 ++i;
1543 if (i == rx_ring->count)
1544 i = 0;
1545 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1546 prefetch(next_rxd);
1547
1548 next_buffer = &rx_ring->buffer_info[i];
1549
1550 cleaned = true;
1551 cleaned_count++;
1552 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1553 DMA_FROM_DEVICE);
1554 buffer_info->dma = 0;
1555
1556 length = le16_to_cpu(rx_desc->wb.upper.length);
1557
1558 /* errors is only valid for DD + EOP descriptors */
1559 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1560 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1561 !(netdev->features & NETIF_F_RXALL)))) {
1562 /* recycle both page and skb */
1563 buffer_info->skb = skb;
1564 /* an error means any chain goes out the window too */
1565 if (rx_ring->rx_skb_top)
1566 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1567 rx_ring->rx_skb_top = NULL;
1568 goto next_desc;
1569 }
1570#define rxtop (rx_ring->rx_skb_top)
1571 if (!(staterr & E1000_RXD_STAT_EOP)) {
1572 /* this descriptor is only the beginning (or middle) */
1573 if (!rxtop) {
1574 /* this is the beginning of a chain */
1575 rxtop = skb;
1576 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1577 0, length);
1578 } else {
1579 /* this is the middle of a chain */
1580 shinfo = skb_shinfo(rxtop);
1581 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1582 buffer_info->page, 0,
1583 length);
1584 /* re-use the skb, only consumed the page */
1585 buffer_info->skb = skb;
1586 }
1587 e1000_consume_page(buffer_info, rxtop, length);
1588 goto next_desc;
1589 } else {
1590 if (rxtop) {
1591 /* end of the chain */
1592 shinfo = skb_shinfo(rxtop);
1593 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1594 buffer_info->page, 0,
1595 length);
1596 /* re-use the current skb, we only consumed the
1597 * page
1598 */
1599 buffer_info->skb = skb;
1600 skb = rxtop;
1601 rxtop = NULL;
1602 e1000_consume_page(buffer_info, skb, length);
1603 } else {
1604 /* no chain, got EOP, this buf is the packet
1605 * copybreak to save the put_page/alloc_page
1606 */
1607 if (length <= copybreak &&
1608 skb_tailroom(skb) >= length) {
1609 u8 *vaddr;
1610 vaddr = kmap_atomic(buffer_info->page);
1611 memcpy(skb_tail_pointer(skb), vaddr,
1612 length);
1613 kunmap_atomic(vaddr);
1614 /* re-use the page, so don't erase
1615 * buffer_info->page
1616 */
1617 skb_put(skb, length);
1618 } else {
1619 skb_fill_page_desc(skb, 0,
1620 buffer_info->page, 0,
1621 length);
1622 e1000_consume_page(buffer_info, skb,
1623 length);
1624 }
1625 }
1626 }
1627
1628 /* Receive Checksum Offload */
1629 e1000_rx_checksum(adapter, staterr, skb);
1630
1631 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1632
1633 /* probably a little skewed due to removing CRC */
1634 total_rx_bytes += skb->len;
1635 total_rx_packets++;
1636
1637 /* eth type trans needs skb->data to point to something */
1638 if (!pskb_may_pull(skb, ETH_HLEN)) {
1639 e_err("pskb_may_pull failed.\n");
1640 dev_kfree_skb_irq(skb);
1641 goto next_desc;
1642 }
1643
1644 e1000_receive_skb(adapter, netdev, skb, staterr,
1645 rx_desc->wb.upper.vlan);
1646
1647next_desc:
1648 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1649
1650 /* return some buffers to hardware, one at a time is too slow */
1651 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1652 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1653 GFP_ATOMIC);
1654 cleaned_count = 0;
1655 }
1656
1657 /* use prefetched values */
1658 rx_desc = next_rxd;
1659 buffer_info = next_buffer;
1660
1661 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1662 }
1663 rx_ring->next_to_clean = i;
1664
1665 cleaned_count = e1000_desc_unused(rx_ring);
1666 if (cleaned_count)
1667 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1668
1669 adapter->total_rx_bytes += total_rx_bytes;
1670 adapter->total_rx_packets += total_rx_packets;
1671 return cleaned;
1672}
1673
1674/**
1675 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1676 * @rx_ring: Rx descriptor ring
1677 **/
1678static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1679{
1680 struct e1000_adapter *adapter = rx_ring->adapter;
1681 struct e1000_buffer *buffer_info;
1682 struct e1000_ps_page *ps_page;
1683 struct pci_dev *pdev = adapter->pdev;
1684 unsigned int i, j;
1685
1686 /* Free all the Rx ring sk_buffs */
1687 for (i = 0; i < rx_ring->count; i++) {
1688 buffer_info = &rx_ring->buffer_info[i];
1689 if (buffer_info->dma) {
1690 if (adapter->clean_rx == e1000_clean_rx_irq)
1691 dma_unmap_single(&pdev->dev, buffer_info->dma,
1692 adapter->rx_buffer_len,
1693 DMA_FROM_DEVICE);
1694 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1695 dma_unmap_page(&pdev->dev, buffer_info->dma,
1696 PAGE_SIZE, DMA_FROM_DEVICE);
1697 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1698 dma_unmap_single(&pdev->dev, buffer_info->dma,
1699 adapter->rx_ps_bsize0,
1700 DMA_FROM_DEVICE);
1701 buffer_info->dma = 0;
1702 }
1703
1704 if (buffer_info->page) {
1705 put_page(buffer_info->page);
1706 buffer_info->page = NULL;
1707 }
1708
1709 if (buffer_info->skb) {
1710 dev_kfree_skb(buffer_info->skb);
1711 buffer_info->skb = NULL;
1712 }
1713
1714 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1715 ps_page = &buffer_info->ps_pages[j];
1716 if (!ps_page->page)
1717 break;
1718 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1719 DMA_FROM_DEVICE);
1720 ps_page->dma = 0;
1721 put_page(ps_page->page);
1722 ps_page->page = NULL;
1723 }
1724 }
1725
1726 /* there also may be some cached data from a chained receive */
1727 if (rx_ring->rx_skb_top) {
1728 dev_kfree_skb(rx_ring->rx_skb_top);
1729 rx_ring->rx_skb_top = NULL;
1730 }
1731
1732 /* Zero out the descriptor ring */
1733 memset(rx_ring->desc, 0, rx_ring->size);
1734
1735 rx_ring->next_to_clean = 0;
1736 rx_ring->next_to_use = 0;
1737 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1738}
1739
1740static void e1000e_downshift_workaround(struct work_struct *work)
1741{
1742 struct e1000_adapter *adapter = container_of(work,
1743 struct e1000_adapter,
1744 downshift_task);
1745
1746 if (test_bit(__E1000_DOWN, &adapter->state))
1747 return;
1748
1749 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1750}
1751
1752/**
1753 * e1000_intr_msi - Interrupt Handler
1754 * @irq: interrupt number
1755 * @data: pointer to a network interface device structure
1756 **/
1757static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1758{
1759 struct net_device *netdev = data;
1760 struct e1000_adapter *adapter = netdev_priv(netdev);
1761 struct e1000_hw *hw = &adapter->hw;
1762 u32 icr = er32(ICR);
1763
1764 /* read ICR disables interrupts using IAM */
1765 if (icr & E1000_ICR_LSC) {
1766 hw->mac.get_link_status = true;
1767 /* ICH8 workaround-- Call gig speed drop workaround on cable
1768 * disconnect (LSC) before accessing any PHY registers
1769 */
1770 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1771 (!(er32(STATUS) & E1000_STATUS_LU)))
1772 schedule_work(&adapter->downshift_task);
1773
1774 /* 80003ES2LAN workaround-- For packet buffer work-around on
1775 * link down event; disable receives here in the ISR and reset
1776 * adapter in watchdog
1777 */
1778 if (netif_carrier_ok(netdev) &&
1779 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1780 /* disable receives */
1781 u32 rctl = er32(RCTL);
1782
1783 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1784 adapter->flags |= FLAG_RESTART_NOW;
1785 }
1786 /* guard against interrupt when we're going down */
1787 if (!test_bit(__E1000_DOWN, &adapter->state))
1788 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1789 }
1790
1791 /* Reset on uncorrectable ECC error */
1792 if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1793 u32 pbeccsts = er32(PBECCSTS);
1794
1795 adapter->corr_errors +=
1796 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1797 adapter->uncorr_errors +=
1798 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1799 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1800
1801 /* Do the reset outside of interrupt context */
1802 schedule_work(&adapter->reset_task);
1803
1804 /* return immediately since reset is imminent */
1805 return IRQ_HANDLED;
1806 }
1807
1808 if (napi_schedule_prep(&adapter->napi)) {
1809 adapter->total_tx_bytes = 0;
1810 adapter->total_tx_packets = 0;
1811 adapter->total_rx_bytes = 0;
1812 adapter->total_rx_packets = 0;
1813 __napi_schedule(&adapter->napi);
1814 }
1815
1816 return IRQ_HANDLED;
1817}
1818
1819/**
1820 * e1000_intr - Interrupt Handler
1821 * @irq: interrupt number
1822 * @data: pointer to a network interface device structure
1823 **/
1824static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1825{
1826 struct net_device *netdev = data;
1827 struct e1000_adapter *adapter = netdev_priv(netdev);
1828 struct e1000_hw *hw = &adapter->hw;
1829 u32 rctl, icr = er32(ICR);
1830
1831 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1832 return IRQ_NONE; /* Not our interrupt */
1833
1834 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1835 * not set, then the adapter didn't send an interrupt
1836 */
1837 if (!(icr & E1000_ICR_INT_ASSERTED))
1838 return IRQ_NONE;
1839
1840 /* Interrupt Auto-Mask...upon reading ICR,
1841 * interrupts are masked. No need for the
1842 * IMC write
1843 */
1844
1845 if (icr & E1000_ICR_LSC) {
1846 hw->mac.get_link_status = true;
1847 /* ICH8 workaround-- Call gig speed drop workaround on cable
1848 * disconnect (LSC) before accessing any PHY registers
1849 */
1850 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1851 (!(er32(STATUS) & E1000_STATUS_LU)))
1852 schedule_work(&adapter->downshift_task);
1853
1854 /* 80003ES2LAN workaround--
1855 * For packet buffer work-around on link down event;
1856 * disable receives here in the ISR and
1857 * reset adapter in watchdog
1858 */
1859 if (netif_carrier_ok(netdev) &&
1860 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1861 /* disable receives */
1862 rctl = er32(RCTL);
1863 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1864 adapter->flags |= FLAG_RESTART_NOW;
1865 }
1866 /* guard against interrupt when we're going down */
1867 if (!test_bit(__E1000_DOWN, &adapter->state))
1868 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1869 }
1870
1871 /* Reset on uncorrectable ECC error */
1872 if ((icr & E1000_ICR_ECCER) && (hw->mac.type >= e1000_pch_lpt)) {
1873 u32 pbeccsts = er32(PBECCSTS);
1874
1875 adapter->corr_errors +=
1876 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1877 adapter->uncorr_errors +=
1878 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1879 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1880
1881 /* Do the reset outside of interrupt context */
1882 schedule_work(&adapter->reset_task);
1883
1884 /* return immediately since reset is imminent */
1885 return IRQ_HANDLED;
1886 }
1887
1888 if (napi_schedule_prep(&adapter->napi)) {
1889 adapter->total_tx_bytes = 0;
1890 adapter->total_tx_packets = 0;
1891 adapter->total_rx_bytes = 0;
1892 adapter->total_rx_packets = 0;
1893 __napi_schedule(&adapter->napi);
1894 }
1895
1896 return IRQ_HANDLED;
1897}
1898
1899static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1900{
1901 struct net_device *netdev = data;
1902 struct e1000_adapter *adapter = netdev_priv(netdev);
1903 struct e1000_hw *hw = &adapter->hw;
1904 u32 icr = er32(ICR);
1905
1906 if (icr & adapter->eiac_mask)
1907 ew32(ICS, (icr & adapter->eiac_mask));
1908
1909 if (icr & E1000_ICR_LSC) {
1910 hw->mac.get_link_status = true;
1911 /* guard against interrupt when we're going down */
1912 if (!test_bit(__E1000_DOWN, &adapter->state))
1913 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1914 }
1915
1916 if (!test_bit(__E1000_DOWN, &adapter->state))
1917 ew32(IMS, E1000_IMS_OTHER | IMS_OTHER_MASK);
1918
1919 return IRQ_HANDLED;
1920}
1921
1922static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1923{
1924 struct net_device *netdev = data;
1925 struct e1000_adapter *adapter = netdev_priv(netdev);
1926 struct e1000_hw *hw = &adapter->hw;
1927 struct e1000_ring *tx_ring = adapter->tx_ring;
1928
1929 adapter->total_tx_bytes = 0;
1930 adapter->total_tx_packets = 0;
1931
1932 if (!e1000_clean_tx_irq(tx_ring))
1933 /* Ring was not completely cleaned, so fire another interrupt */
1934 ew32(ICS, tx_ring->ims_val);
1935
1936 if (!test_bit(__E1000_DOWN, &adapter->state))
1937 ew32(IMS, adapter->tx_ring->ims_val);
1938
1939 return IRQ_HANDLED;
1940}
1941
1942static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1943{
1944 struct net_device *netdev = data;
1945 struct e1000_adapter *adapter = netdev_priv(netdev);
1946 struct e1000_ring *rx_ring = adapter->rx_ring;
1947
1948 /* Write the ITR value calculated at the end of the
1949 * previous interrupt.
1950 */
1951 if (rx_ring->set_itr) {
1952 u32 itr = rx_ring->itr_val ?
1953 1000000000 / (rx_ring->itr_val * 256) : 0;
1954
1955 writel(itr, rx_ring->itr_register);
1956 rx_ring->set_itr = 0;
1957 }
1958
1959 if (napi_schedule_prep(&adapter->napi)) {
1960 adapter->total_rx_bytes = 0;
1961 adapter->total_rx_packets = 0;
1962 __napi_schedule(&adapter->napi);
1963 }
1964 return IRQ_HANDLED;
1965}
1966
1967/**
1968 * e1000_configure_msix - Configure MSI-X hardware
1969 * @adapter: board private structure
1970 *
1971 * e1000_configure_msix sets up the hardware to properly
1972 * generate MSI-X interrupts.
1973 **/
1974static void e1000_configure_msix(struct e1000_adapter *adapter)
1975{
1976 struct e1000_hw *hw = &adapter->hw;
1977 struct e1000_ring *rx_ring = adapter->rx_ring;
1978 struct e1000_ring *tx_ring = adapter->tx_ring;
1979 int vector = 0;
1980 u32 ctrl_ext, ivar = 0;
1981
1982 adapter->eiac_mask = 0;
1983
1984 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1985 if (hw->mac.type == e1000_82574) {
1986 u32 rfctl = er32(RFCTL);
1987
1988 rfctl |= E1000_RFCTL_ACK_DIS;
1989 ew32(RFCTL, rfctl);
1990 }
1991
1992 /* Configure Rx vector */
1993 rx_ring->ims_val = E1000_IMS_RXQ0;
1994 adapter->eiac_mask |= rx_ring->ims_val;
1995 if (rx_ring->itr_val)
1996 writel(1000000000 / (rx_ring->itr_val * 256),
1997 rx_ring->itr_register);
1998 else
1999 writel(1, rx_ring->itr_register);
2000 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
2001
2002 /* Configure Tx vector */
2003 tx_ring->ims_val = E1000_IMS_TXQ0;
2004 vector++;
2005 if (tx_ring->itr_val)
2006 writel(1000000000 / (tx_ring->itr_val * 256),
2007 tx_ring->itr_register);
2008 else
2009 writel(1, tx_ring->itr_register);
2010 adapter->eiac_mask |= tx_ring->ims_val;
2011 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2012
2013 /* set vector for Other Causes, e.g. link changes */
2014 vector++;
2015 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2016 if (rx_ring->itr_val)
2017 writel(1000000000 / (rx_ring->itr_val * 256),
2018 hw->hw_addr + E1000_EITR_82574(vector));
2019 else
2020 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2021
2022 /* Cause Tx interrupts on every write back */
2023 ivar |= BIT(31);
2024
2025 ew32(IVAR, ivar);
2026
2027 /* enable MSI-X PBA support */
2028 ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2029 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2030 ew32(CTRL_EXT, ctrl_ext);
2031 e1e_flush();
2032}
2033
2034void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2035{
2036 if (adapter->msix_entries) {
2037 pci_disable_msix(adapter->pdev);
2038 kfree(adapter->msix_entries);
2039 adapter->msix_entries = NULL;
2040 } else if (adapter->flags & FLAG_MSI_ENABLED) {
2041 pci_disable_msi(adapter->pdev);
2042 adapter->flags &= ~FLAG_MSI_ENABLED;
2043 }
2044}
2045
2046/**
2047 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2048 * @adapter: board private structure
2049 *
2050 * Attempt to configure interrupts using the best available
2051 * capabilities of the hardware and kernel.
2052 **/
2053void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2054{
2055 int err;
2056 int i;
2057
2058 switch (adapter->int_mode) {
2059 case E1000E_INT_MODE_MSIX:
2060 if (adapter->flags & FLAG_HAS_MSIX) {
2061 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2062 adapter->msix_entries = kcalloc(adapter->num_vectors,
2063 sizeof(struct
2064 msix_entry),
2065 GFP_KERNEL);
2066 if (adapter->msix_entries) {
2067 struct e1000_adapter *a = adapter;
2068
2069 for (i = 0; i < adapter->num_vectors; i++)
2070 adapter->msix_entries[i].entry = i;
2071
2072 err = pci_enable_msix_range(a->pdev,
2073 a->msix_entries,
2074 a->num_vectors,
2075 a->num_vectors);
2076 if (err > 0)
2077 return;
2078 }
2079 /* MSI-X failed, so fall through and try MSI */
2080 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
2081 e1000e_reset_interrupt_capability(adapter);
2082 }
2083 adapter->int_mode = E1000E_INT_MODE_MSI;
2084 fallthrough;
2085 case E1000E_INT_MODE_MSI:
2086 if (!pci_enable_msi(adapter->pdev)) {
2087 adapter->flags |= FLAG_MSI_ENABLED;
2088 } else {
2089 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2090 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
2091 }
2092 fallthrough;
2093 case E1000E_INT_MODE_LEGACY:
2094 /* Don't do anything; this is the system default */
2095 break;
2096 }
2097
2098 /* store the number of vectors being used */
2099 adapter->num_vectors = 1;
2100}
2101
2102/**
2103 * e1000_request_msix - Initialize MSI-X interrupts
2104 * @adapter: board private structure
2105 *
2106 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2107 * kernel.
2108 **/
2109static int e1000_request_msix(struct e1000_adapter *adapter)
2110{
2111 struct net_device *netdev = adapter->netdev;
2112 int err = 0, vector = 0;
2113
2114 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2115 snprintf(adapter->rx_ring->name,
2116 sizeof(adapter->rx_ring->name) - 1,
2117 "%.14s-rx-0", netdev->name);
2118 else
2119 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2120 err = request_irq(adapter->msix_entries[vector].vector,
2121 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2122 netdev);
2123 if (err)
2124 return err;
2125 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2126 E1000_EITR_82574(vector);
2127 adapter->rx_ring->itr_val = adapter->itr;
2128 vector++;
2129
2130 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2131 snprintf(adapter->tx_ring->name,
2132 sizeof(adapter->tx_ring->name) - 1,
2133 "%.14s-tx-0", netdev->name);
2134 else
2135 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2136 err = request_irq(adapter->msix_entries[vector].vector,
2137 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2138 netdev);
2139 if (err)
2140 return err;
2141 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2142 E1000_EITR_82574(vector);
2143 adapter->tx_ring->itr_val = adapter->itr;
2144 vector++;
2145
2146 err = request_irq(adapter->msix_entries[vector].vector,
2147 e1000_msix_other, 0, netdev->name, netdev);
2148 if (err)
2149 return err;
2150
2151 e1000_configure_msix(adapter);
2152
2153 return 0;
2154}
2155
2156/**
2157 * e1000_request_irq - initialize interrupts
2158 * @adapter: board private structure
2159 *
2160 * Attempts to configure interrupts using the best available
2161 * capabilities of the hardware and kernel.
2162 **/
2163static int e1000_request_irq(struct e1000_adapter *adapter)
2164{
2165 struct net_device *netdev = adapter->netdev;
2166 int err;
2167
2168 if (adapter->msix_entries) {
2169 err = e1000_request_msix(adapter);
2170 if (!err)
2171 return err;
2172 /* fall back to MSI */
2173 e1000e_reset_interrupt_capability(adapter);
2174 adapter->int_mode = E1000E_INT_MODE_MSI;
2175 e1000e_set_interrupt_capability(adapter);
2176 }
2177 if (adapter->flags & FLAG_MSI_ENABLED) {
2178 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2179 netdev->name, netdev);
2180 if (!err)
2181 return err;
2182
2183 /* fall back to legacy interrupt */
2184 e1000e_reset_interrupt_capability(adapter);
2185 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2186 }
2187
2188 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2189 netdev->name, netdev);
2190 if (err)
2191 e_err("Unable to allocate interrupt, Error: %d\n", err);
2192
2193 return err;
2194}
2195
2196static void e1000_free_irq(struct e1000_adapter *adapter)
2197{
2198 struct net_device *netdev = adapter->netdev;
2199
2200 if (adapter->msix_entries) {
2201 int vector = 0;
2202
2203 free_irq(adapter->msix_entries[vector].vector, netdev);
2204 vector++;
2205
2206 free_irq(adapter->msix_entries[vector].vector, netdev);
2207 vector++;
2208
2209 /* Other Causes interrupt vector */
2210 free_irq(adapter->msix_entries[vector].vector, netdev);
2211 return;
2212 }
2213
2214 free_irq(adapter->pdev->irq, netdev);
2215}
2216
2217/**
2218 * e1000_irq_disable - Mask off interrupt generation on the NIC
2219 * @adapter: board private structure
2220 **/
2221static void e1000_irq_disable(struct e1000_adapter *adapter)
2222{
2223 struct e1000_hw *hw = &adapter->hw;
2224
2225 ew32(IMC, ~0);
2226 if (adapter->msix_entries)
2227 ew32(EIAC_82574, 0);
2228 e1e_flush();
2229
2230 if (adapter->msix_entries) {
2231 int i;
2232
2233 for (i = 0; i < adapter->num_vectors; i++)
2234 synchronize_irq(adapter->msix_entries[i].vector);
2235 } else {
2236 synchronize_irq(adapter->pdev->irq);
2237 }
2238}
2239
2240/**
2241 * e1000_irq_enable - Enable default interrupt generation settings
2242 * @adapter: board private structure
2243 **/
2244static void e1000_irq_enable(struct e1000_adapter *adapter)
2245{
2246 struct e1000_hw *hw = &adapter->hw;
2247
2248 if (adapter->msix_entries) {
2249 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2250 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER |
2251 IMS_OTHER_MASK);
2252 } else if (hw->mac.type >= e1000_pch_lpt) {
2253 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2254 } else {
2255 ew32(IMS, IMS_ENABLE_MASK);
2256 }
2257 e1e_flush();
2258}
2259
2260/**
2261 * e1000e_get_hw_control - get control of the h/w from f/w
2262 * @adapter: address of board private structure
2263 *
2264 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2265 * For ASF and Pass Through versions of f/w this means that
2266 * the driver is loaded. For AMT version (only with 82573)
2267 * of the f/w this means that the network i/f is open.
2268 **/
2269void e1000e_get_hw_control(struct e1000_adapter *adapter)
2270{
2271 struct e1000_hw *hw = &adapter->hw;
2272 u32 ctrl_ext;
2273 u32 swsm;
2274
2275 /* Let firmware know the driver has taken over */
2276 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2277 swsm = er32(SWSM);
2278 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2279 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2280 ctrl_ext = er32(CTRL_EXT);
2281 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2282 }
2283}
2284
2285/**
2286 * e1000e_release_hw_control - release control of the h/w to f/w
2287 * @adapter: address of board private structure
2288 *
2289 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2290 * For ASF and Pass Through versions of f/w this means that the
2291 * driver is no longer loaded. For AMT version (only with 82573) i
2292 * of the f/w this means that the network i/f is closed.
2293 *
2294 **/
2295void e1000e_release_hw_control(struct e1000_adapter *adapter)
2296{
2297 struct e1000_hw *hw = &adapter->hw;
2298 u32 ctrl_ext;
2299 u32 swsm;
2300
2301 /* Let firmware taken over control of h/w */
2302 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2303 swsm = er32(SWSM);
2304 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2305 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2306 ctrl_ext = er32(CTRL_EXT);
2307 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2308 }
2309}
2310
2311/**
2312 * e1000_alloc_ring_dma - allocate memory for a ring structure
2313 * @adapter: board private structure
2314 * @ring: ring struct for which to allocate dma
2315 **/
2316static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2317 struct e1000_ring *ring)
2318{
2319 struct pci_dev *pdev = adapter->pdev;
2320
2321 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2322 GFP_KERNEL);
2323 if (!ring->desc)
2324 return -ENOMEM;
2325
2326 return 0;
2327}
2328
2329/**
2330 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2331 * @tx_ring: Tx descriptor ring
2332 *
2333 * Return 0 on success, negative on failure
2334 **/
2335int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2336{
2337 struct e1000_adapter *adapter = tx_ring->adapter;
2338 int err = -ENOMEM, size;
2339
2340 size = sizeof(struct e1000_buffer) * tx_ring->count;
2341 tx_ring->buffer_info = vzalloc(size);
2342 if (!tx_ring->buffer_info)
2343 goto err;
2344
2345 /* round up to nearest 4K */
2346 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2347 tx_ring->size = ALIGN(tx_ring->size, 4096);
2348
2349 err = e1000_alloc_ring_dma(adapter, tx_ring);
2350 if (err)
2351 goto err;
2352
2353 tx_ring->next_to_use = 0;
2354 tx_ring->next_to_clean = 0;
2355
2356 return 0;
2357err:
2358 vfree(tx_ring->buffer_info);
2359 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2360 return err;
2361}
2362
2363/**
2364 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2365 * @rx_ring: Rx descriptor ring
2366 *
2367 * Returns 0 on success, negative on failure
2368 **/
2369int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2370{
2371 struct e1000_adapter *adapter = rx_ring->adapter;
2372 struct e1000_buffer *buffer_info;
2373 int i, size, desc_len, err = -ENOMEM;
2374
2375 size = sizeof(struct e1000_buffer) * rx_ring->count;
2376 rx_ring->buffer_info = vzalloc(size);
2377 if (!rx_ring->buffer_info)
2378 goto err;
2379
2380 for (i = 0; i < rx_ring->count; i++) {
2381 buffer_info = &rx_ring->buffer_info[i];
2382 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2383 sizeof(struct e1000_ps_page),
2384 GFP_KERNEL);
2385 if (!buffer_info->ps_pages)
2386 goto err_pages;
2387 }
2388
2389 desc_len = sizeof(union e1000_rx_desc_packet_split);
2390
2391 /* Round up to nearest 4K */
2392 rx_ring->size = rx_ring->count * desc_len;
2393 rx_ring->size = ALIGN(rx_ring->size, 4096);
2394
2395 err = e1000_alloc_ring_dma(adapter, rx_ring);
2396 if (err)
2397 goto err_pages;
2398
2399 rx_ring->next_to_clean = 0;
2400 rx_ring->next_to_use = 0;
2401 rx_ring->rx_skb_top = NULL;
2402
2403 return 0;
2404
2405err_pages:
2406 for (i = 0; i < rx_ring->count; i++) {
2407 buffer_info = &rx_ring->buffer_info[i];
2408 kfree(buffer_info->ps_pages);
2409 }
2410err:
2411 vfree(rx_ring->buffer_info);
2412 e_err("Unable to allocate memory for the receive descriptor ring\n");
2413 return err;
2414}
2415
2416/**
2417 * e1000_clean_tx_ring - Free Tx Buffers
2418 * @tx_ring: Tx descriptor ring
2419 **/
2420static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2421{
2422 struct e1000_adapter *adapter = tx_ring->adapter;
2423 struct e1000_buffer *buffer_info;
2424 unsigned long size;
2425 unsigned int i;
2426
2427 for (i = 0; i < tx_ring->count; i++) {
2428 buffer_info = &tx_ring->buffer_info[i];
2429 e1000_put_txbuf(tx_ring, buffer_info, false);
2430 }
2431
2432 netdev_reset_queue(adapter->netdev);
2433 size = sizeof(struct e1000_buffer) * tx_ring->count;
2434 memset(tx_ring->buffer_info, 0, size);
2435
2436 memset(tx_ring->desc, 0, tx_ring->size);
2437
2438 tx_ring->next_to_use = 0;
2439 tx_ring->next_to_clean = 0;
2440}
2441
2442/**
2443 * e1000e_free_tx_resources - Free Tx Resources per Queue
2444 * @tx_ring: Tx descriptor ring
2445 *
2446 * Free all transmit software resources
2447 **/
2448void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2449{
2450 struct e1000_adapter *adapter = tx_ring->adapter;
2451 struct pci_dev *pdev = adapter->pdev;
2452
2453 e1000_clean_tx_ring(tx_ring);
2454
2455 vfree(tx_ring->buffer_info);
2456 tx_ring->buffer_info = NULL;
2457
2458 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2459 tx_ring->dma);
2460 tx_ring->desc = NULL;
2461}
2462
2463/**
2464 * e1000e_free_rx_resources - Free Rx Resources
2465 * @rx_ring: Rx descriptor ring
2466 *
2467 * Free all receive software resources
2468 **/
2469void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2470{
2471 struct e1000_adapter *adapter = rx_ring->adapter;
2472 struct pci_dev *pdev = adapter->pdev;
2473 int i;
2474
2475 e1000_clean_rx_ring(rx_ring);
2476
2477 for (i = 0; i < rx_ring->count; i++)
2478 kfree(rx_ring->buffer_info[i].ps_pages);
2479
2480 vfree(rx_ring->buffer_info);
2481 rx_ring->buffer_info = NULL;
2482
2483 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2484 rx_ring->dma);
2485 rx_ring->desc = NULL;
2486}
2487
2488/**
2489 * e1000_update_itr - update the dynamic ITR value based on statistics
2490 * @itr_setting: current adapter->itr
2491 * @packets: the number of packets during this measurement interval
2492 * @bytes: the number of bytes during this measurement interval
2493 *
2494 * Stores a new ITR value based on packets and byte
2495 * counts during the last interrupt. The advantage of per interrupt
2496 * computation is faster updates and more accurate ITR for the current
2497 * traffic pattern. Constants in this function were computed
2498 * based on theoretical maximum wire speed and thresholds were set based
2499 * on testing data as well as attempting to minimize response time
2500 * while increasing bulk throughput. This functionality is controlled
2501 * by the InterruptThrottleRate module parameter.
2502 **/
2503static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2504{
2505 unsigned int retval = itr_setting;
2506
2507 if (packets == 0)
2508 return itr_setting;
2509
2510 switch (itr_setting) {
2511 case lowest_latency:
2512 /* handle TSO and jumbo frames */
2513 if (bytes / packets > 8000)
2514 retval = bulk_latency;
2515 else if ((packets < 5) && (bytes > 512))
2516 retval = low_latency;
2517 break;
2518 case low_latency: /* 50 usec aka 20000 ints/s */
2519 if (bytes > 10000) {
2520 /* this if handles the TSO accounting */
2521 if (bytes / packets > 8000)
2522 retval = bulk_latency;
2523 else if ((packets < 10) || ((bytes / packets) > 1200))
2524 retval = bulk_latency;
2525 else if ((packets > 35))
2526 retval = lowest_latency;
2527 } else if (bytes / packets > 2000) {
2528 retval = bulk_latency;
2529 } else if (packets <= 2 && bytes < 512) {
2530 retval = lowest_latency;
2531 }
2532 break;
2533 case bulk_latency: /* 250 usec aka 4000 ints/s */
2534 if (bytes > 25000) {
2535 if (packets > 35)
2536 retval = low_latency;
2537 } else if (bytes < 6000) {
2538 retval = low_latency;
2539 }
2540 break;
2541 }
2542
2543 return retval;
2544}
2545
2546static void e1000_set_itr(struct e1000_adapter *adapter)
2547{
2548 u16 current_itr;
2549 u32 new_itr = adapter->itr;
2550
2551 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2552 if (adapter->link_speed != SPEED_1000) {
2553 current_itr = 0;
2554 new_itr = 4000;
2555 goto set_itr_now;
2556 }
2557
2558 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2559 new_itr = 0;
2560 goto set_itr_now;
2561 }
2562
2563 adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2564 adapter->total_tx_packets,
2565 adapter->total_tx_bytes);
2566 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2567 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2568 adapter->tx_itr = low_latency;
2569
2570 adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2571 adapter->total_rx_packets,
2572 adapter->total_rx_bytes);
2573 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2574 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2575 adapter->rx_itr = low_latency;
2576
2577 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2578
2579 /* counts and packets in update_itr are dependent on these numbers */
2580 switch (current_itr) {
2581 case lowest_latency:
2582 new_itr = 70000;
2583 break;
2584 case low_latency:
2585 new_itr = 20000; /* aka hwitr = ~200 */
2586 break;
2587 case bulk_latency:
2588 new_itr = 4000;
2589 break;
2590 default:
2591 break;
2592 }
2593
2594set_itr_now:
2595 if (new_itr != adapter->itr) {
2596 /* this attempts to bias the interrupt rate towards Bulk
2597 * by adding intermediate steps when interrupt rate is
2598 * increasing
2599 */
2600 new_itr = new_itr > adapter->itr ?
2601 min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2602 adapter->itr = new_itr;
2603 adapter->rx_ring->itr_val = new_itr;
2604 if (adapter->msix_entries)
2605 adapter->rx_ring->set_itr = 1;
2606 else
2607 e1000e_write_itr(adapter, new_itr);
2608 }
2609}
2610
2611/**
2612 * e1000e_write_itr - write the ITR value to the appropriate registers
2613 * @adapter: address of board private structure
2614 * @itr: new ITR value to program
2615 *
2616 * e1000e_write_itr determines if the adapter is in MSI-X mode
2617 * and, if so, writes the EITR registers with the ITR value.
2618 * Otherwise, it writes the ITR value into the ITR register.
2619 **/
2620void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2621{
2622 struct e1000_hw *hw = &adapter->hw;
2623 u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2624
2625 if (adapter->msix_entries) {
2626 int vector;
2627
2628 for (vector = 0; vector < adapter->num_vectors; vector++)
2629 writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2630 } else {
2631 ew32(ITR, new_itr);
2632 }
2633}
2634
2635/**
2636 * e1000_alloc_queues - Allocate memory for all rings
2637 * @adapter: board private structure to initialize
2638 **/
2639static int e1000_alloc_queues(struct e1000_adapter *adapter)
2640{
2641 int size = sizeof(struct e1000_ring);
2642
2643 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2644 if (!adapter->tx_ring)
2645 goto err;
2646 adapter->tx_ring->count = adapter->tx_ring_count;
2647 adapter->tx_ring->adapter = adapter;
2648
2649 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2650 if (!adapter->rx_ring)
2651 goto err;
2652 adapter->rx_ring->count = adapter->rx_ring_count;
2653 adapter->rx_ring->adapter = adapter;
2654
2655 return 0;
2656err:
2657 e_err("Unable to allocate memory for queues\n");
2658 kfree(adapter->rx_ring);
2659 kfree(adapter->tx_ring);
2660 return -ENOMEM;
2661}
2662
2663/**
2664 * e1000e_poll - NAPI Rx polling callback
2665 * @napi: struct associated with this polling callback
2666 * @budget: number of packets driver is allowed to process this poll
2667 **/
2668static int e1000e_poll(struct napi_struct *napi, int budget)
2669{
2670 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2671 napi);
2672 struct e1000_hw *hw = &adapter->hw;
2673 struct net_device *poll_dev = adapter->netdev;
2674 int tx_cleaned = 1, work_done = 0;
2675
2676 adapter = netdev_priv(poll_dev);
2677
2678 if (!adapter->msix_entries ||
2679 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2680 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2681
2682 adapter->clean_rx(adapter->rx_ring, &work_done, budget);
2683
2684 if (!tx_cleaned || work_done == budget)
2685 return budget;
2686
2687 /* Exit the polling mode, but don't re-enable interrupts if stack might
2688 * poll us due to busy-polling
2689 */
2690 if (likely(napi_complete_done(napi, work_done))) {
2691 if (adapter->itr_setting & 3)
2692 e1000_set_itr(adapter);
2693 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2694 if (adapter->msix_entries)
2695 ew32(IMS, adapter->rx_ring->ims_val);
2696 else
2697 e1000_irq_enable(adapter);
2698 }
2699 }
2700
2701 return work_done;
2702}
2703
2704static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2705 __always_unused __be16 proto, u16 vid)
2706{
2707 struct e1000_adapter *adapter = netdev_priv(netdev);
2708 struct e1000_hw *hw = &adapter->hw;
2709 u32 vfta, index;
2710
2711 /* don't update vlan cookie if already programmed */
2712 if ((adapter->hw.mng_cookie.status &
2713 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2714 (vid == adapter->mng_vlan_id))
2715 return 0;
2716
2717 /* add VID to filter table */
2718 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2719 index = (vid >> 5) & 0x7F;
2720 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2721 vfta |= BIT((vid & 0x1F));
2722 hw->mac.ops.write_vfta(hw, index, vfta);
2723 }
2724
2725 set_bit(vid, adapter->active_vlans);
2726
2727 return 0;
2728}
2729
2730static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2731 __always_unused __be16 proto, u16 vid)
2732{
2733 struct e1000_adapter *adapter = netdev_priv(netdev);
2734 struct e1000_hw *hw = &adapter->hw;
2735 u32 vfta, index;
2736
2737 if ((adapter->hw.mng_cookie.status &
2738 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2739 (vid == adapter->mng_vlan_id)) {
2740 /* release control to f/w */
2741 e1000e_release_hw_control(adapter);
2742 return 0;
2743 }
2744
2745 /* remove VID from filter table */
2746 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2747 index = (vid >> 5) & 0x7F;
2748 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2749 vfta &= ~BIT((vid & 0x1F));
2750 hw->mac.ops.write_vfta(hw, index, vfta);
2751 }
2752
2753 clear_bit(vid, adapter->active_vlans);
2754
2755 return 0;
2756}
2757
2758/**
2759 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2760 * @adapter: board private structure to initialize
2761 **/
2762static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2763{
2764 struct net_device *netdev = adapter->netdev;
2765 struct e1000_hw *hw = &adapter->hw;
2766 u32 rctl;
2767
2768 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2769 /* disable VLAN receive filtering */
2770 rctl = er32(RCTL);
2771 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2772 ew32(RCTL, rctl);
2773
2774 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2775 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2776 adapter->mng_vlan_id);
2777 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2778 }
2779 }
2780}
2781
2782/**
2783 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2784 * @adapter: board private structure to initialize
2785 **/
2786static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2787{
2788 struct e1000_hw *hw = &adapter->hw;
2789 u32 rctl;
2790
2791 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2792 /* enable VLAN receive filtering */
2793 rctl = er32(RCTL);
2794 rctl |= E1000_RCTL_VFE;
2795 rctl &= ~E1000_RCTL_CFIEN;
2796 ew32(RCTL, rctl);
2797 }
2798}
2799
2800/**
2801 * e1000e_vlan_strip_disable - helper to disable HW VLAN stripping
2802 * @adapter: board private structure to initialize
2803 **/
2804static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2805{
2806 struct e1000_hw *hw = &adapter->hw;
2807 u32 ctrl;
2808
2809 /* disable VLAN tag insert/strip */
2810 ctrl = er32(CTRL);
2811 ctrl &= ~E1000_CTRL_VME;
2812 ew32(CTRL, ctrl);
2813}
2814
2815/**
2816 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2817 * @adapter: board private structure to initialize
2818 **/
2819static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2820{
2821 struct e1000_hw *hw = &adapter->hw;
2822 u32 ctrl;
2823
2824 /* enable VLAN tag insert/strip */
2825 ctrl = er32(CTRL);
2826 ctrl |= E1000_CTRL_VME;
2827 ew32(CTRL, ctrl);
2828}
2829
2830static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2831{
2832 struct net_device *netdev = adapter->netdev;
2833 u16 vid = adapter->hw.mng_cookie.vlan_id;
2834 u16 old_vid = adapter->mng_vlan_id;
2835
2836 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2837 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2838 adapter->mng_vlan_id = vid;
2839 }
2840
2841 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2842 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2843}
2844
2845static void e1000_restore_vlan(struct e1000_adapter *adapter)
2846{
2847 u16 vid;
2848
2849 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2850
2851 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2852 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2853}
2854
2855static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2856{
2857 struct e1000_hw *hw = &adapter->hw;
2858 u32 manc, manc2h, mdef, i, j;
2859
2860 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2861 return;
2862
2863 manc = er32(MANC);
2864
2865 /* enable receiving management packets to the host. this will probably
2866 * generate destination unreachable messages from the host OS, but
2867 * the packets will be handled on SMBUS
2868 */
2869 manc |= E1000_MANC_EN_MNG2HOST;
2870 manc2h = er32(MANC2H);
2871
2872 switch (hw->mac.type) {
2873 default:
2874 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2875 break;
2876 case e1000_82574:
2877 case e1000_82583:
2878 /* Check if IPMI pass-through decision filter already exists;
2879 * if so, enable it.
2880 */
2881 for (i = 0, j = 0; i < 8; i++) {
2882 mdef = er32(MDEF(i));
2883
2884 /* Ignore filters with anything other than IPMI ports */
2885 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2886 continue;
2887
2888 /* Enable this decision filter in MANC2H */
2889 if (mdef)
2890 manc2h |= BIT(i);
2891
2892 j |= mdef;
2893 }
2894
2895 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2896 break;
2897
2898 /* Create new decision filter in an empty filter */
2899 for (i = 0, j = 0; i < 8; i++)
2900 if (er32(MDEF(i)) == 0) {
2901 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2902 E1000_MDEF_PORT_664));
2903 manc2h |= BIT(1);
2904 j++;
2905 break;
2906 }
2907
2908 if (!j)
2909 e_warn("Unable to create IPMI pass-through filter\n");
2910 break;
2911 }
2912
2913 ew32(MANC2H, manc2h);
2914 ew32(MANC, manc);
2915}
2916
2917/**
2918 * e1000_configure_tx - Configure Transmit Unit after Reset
2919 * @adapter: board private structure
2920 *
2921 * Configure the Tx unit of the MAC after a reset.
2922 **/
2923static void e1000_configure_tx(struct e1000_adapter *adapter)
2924{
2925 struct e1000_hw *hw = &adapter->hw;
2926 struct e1000_ring *tx_ring = adapter->tx_ring;
2927 u64 tdba;
2928 u32 tdlen, tctl, tarc;
2929
2930 /* Setup the HW Tx Head and Tail descriptor pointers */
2931 tdba = tx_ring->dma;
2932 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2933 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2934 ew32(TDBAH(0), (tdba >> 32));
2935 ew32(TDLEN(0), tdlen);
2936 ew32(TDH(0), 0);
2937 ew32(TDT(0), 0);
2938 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2939 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2940
2941 writel(0, tx_ring->head);
2942 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2943 e1000e_update_tdt_wa(tx_ring, 0);
2944 else
2945 writel(0, tx_ring->tail);
2946
2947 /* Set the Tx Interrupt Delay register */
2948 ew32(TIDV, adapter->tx_int_delay);
2949 /* Tx irq moderation */
2950 ew32(TADV, adapter->tx_abs_int_delay);
2951
2952 if (adapter->flags2 & FLAG2_DMA_BURST) {
2953 u32 txdctl = er32(TXDCTL(0));
2954
2955 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2956 E1000_TXDCTL_WTHRESH);
2957 /* set up some performance related parameters to encourage the
2958 * hardware to use the bus more efficiently in bursts, depends
2959 * on the tx_int_delay to be enabled,
2960 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2961 * hthresh = 1 ==> prefetch when one or more available
2962 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2963 * BEWARE: this seems to work but should be considered first if
2964 * there are Tx hangs or other Tx related bugs
2965 */
2966 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2967 ew32(TXDCTL(0), txdctl);
2968 }
2969 /* erratum work around: set txdctl the same for both queues */
2970 ew32(TXDCTL(1), er32(TXDCTL(0)));
2971
2972 /* Program the Transmit Control Register */
2973 tctl = er32(TCTL);
2974 tctl &= ~E1000_TCTL_CT;
2975 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2976 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2977
2978 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2979 tarc = er32(TARC(0));
2980 /* set the speed mode bit, we'll clear it if we're not at
2981 * gigabit link later
2982 */
2983#define SPEED_MODE_BIT BIT(21)
2984 tarc |= SPEED_MODE_BIT;
2985 ew32(TARC(0), tarc);
2986 }
2987
2988 /* errata: program both queues to unweighted RR */
2989 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2990 tarc = er32(TARC(0));
2991 tarc |= 1;
2992 ew32(TARC(0), tarc);
2993 tarc = er32(TARC(1));
2994 tarc |= 1;
2995 ew32(TARC(1), tarc);
2996 }
2997
2998 /* Setup Transmit Descriptor Settings for eop descriptor */
2999 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
3000
3001 /* only set IDE if we are delaying interrupts using the timers */
3002 if (adapter->tx_int_delay)
3003 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
3004
3005 /* enable Report Status bit */
3006 adapter->txd_cmd |= E1000_TXD_CMD_RS;
3007
3008 ew32(TCTL, tctl);
3009
3010 hw->mac.ops.config_collision_dist(hw);
3011
3012 /* SPT and KBL Si errata workaround to avoid data corruption */
3013 if (hw->mac.type == e1000_pch_spt) {
3014 u32 reg_val;
3015
3016 reg_val = er32(IOSFPC);
3017 reg_val |= E1000_RCTL_RDMTS_HEX;
3018 ew32(IOSFPC, reg_val);
3019
3020 reg_val = er32(TARC(0));
3021 /* SPT and KBL Si errata workaround to avoid Tx hang.
3022 * Dropping the number of outstanding requests from
3023 * 3 to 2 in order to avoid a buffer overrun.
3024 */
3025 reg_val &= ~E1000_TARC0_CB_MULTIQ_3_REQ;
3026 reg_val |= E1000_TARC0_CB_MULTIQ_2_REQ;
3027 ew32(TARC(0), reg_val);
3028 }
3029}
3030
3031#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3032 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3033
3034/**
3035 * e1000_setup_rctl - configure the receive control registers
3036 * @adapter: Board private structure
3037 **/
3038static void e1000_setup_rctl(struct e1000_adapter *adapter)
3039{
3040 struct e1000_hw *hw = &adapter->hw;
3041 u32 rctl, rfctl;
3042 u32 pages = 0;
3043
3044 /* Workaround Si errata on PCHx - configure jumbo frame flow.
3045 * If jumbo frames not set, program related MAC/PHY registers
3046 * to h/w defaults
3047 */
3048 if (hw->mac.type >= e1000_pch2lan) {
3049 s32 ret_val;
3050
3051 if (adapter->netdev->mtu > ETH_DATA_LEN)
3052 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3053 else
3054 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3055
3056 if (ret_val)
3057 e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3058 }
3059
3060 /* Program MC offset vector base */
3061 rctl = er32(RCTL);
3062 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3063 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3064 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3065 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3066
3067 /* Do not Store bad packets */
3068 rctl &= ~E1000_RCTL_SBP;
3069
3070 /* Enable Long Packet receive */
3071 if (adapter->netdev->mtu <= ETH_DATA_LEN)
3072 rctl &= ~E1000_RCTL_LPE;
3073 else
3074 rctl |= E1000_RCTL_LPE;
3075
3076 /* Some systems expect that the CRC is included in SMBUS traffic. The
3077 * hardware strips the CRC before sending to both SMBUS (BMC) and to
3078 * host memory when this is enabled
3079 */
3080 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3081 rctl |= E1000_RCTL_SECRC;
3082
3083 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3084 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3085 u16 phy_data;
3086
3087 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3088 phy_data &= 0xfff8;
3089 phy_data |= BIT(2);
3090 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3091
3092 e1e_rphy(hw, 22, &phy_data);
3093 phy_data &= 0x0fff;
3094 phy_data |= BIT(14);
3095 e1e_wphy(hw, 0x10, 0x2823);
3096 e1e_wphy(hw, 0x11, 0x0003);
3097 e1e_wphy(hw, 22, phy_data);
3098 }
3099
3100 /* Setup buffer sizes */
3101 rctl &= ~E1000_RCTL_SZ_4096;
3102 rctl |= E1000_RCTL_BSEX;
3103 switch (adapter->rx_buffer_len) {
3104 case 2048:
3105 default:
3106 rctl |= E1000_RCTL_SZ_2048;
3107 rctl &= ~E1000_RCTL_BSEX;
3108 break;
3109 case 4096:
3110 rctl |= E1000_RCTL_SZ_4096;
3111 break;
3112 case 8192:
3113 rctl |= E1000_RCTL_SZ_8192;
3114 break;
3115 case 16384:
3116 rctl |= E1000_RCTL_SZ_16384;
3117 break;
3118 }
3119
3120 /* Enable Extended Status in all Receive Descriptors */
3121 rfctl = er32(RFCTL);
3122 rfctl |= E1000_RFCTL_EXTEN;
3123 ew32(RFCTL, rfctl);
3124
3125 /* 82571 and greater support packet-split where the protocol
3126 * header is placed in skb->data and the packet data is
3127 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3128 * In the case of a non-split, skb->data is linearly filled,
3129 * followed by the page buffers. Therefore, skb->data is
3130 * sized to hold the largest protocol header.
3131 *
3132 * allocations using alloc_page take too long for regular MTU
3133 * so only enable packet split for jumbo frames
3134 *
3135 * Using pages when the page size is greater than 16k wastes
3136 * a lot of memory, since we allocate 3 pages at all times
3137 * per packet.
3138 */
3139 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3140 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3141 adapter->rx_ps_pages = pages;
3142 else
3143 adapter->rx_ps_pages = 0;
3144
3145 if (adapter->rx_ps_pages) {
3146 u32 psrctl = 0;
3147
3148 /* Enable Packet split descriptors */
3149 rctl |= E1000_RCTL_DTYP_PS;
3150
3151 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3152
3153 switch (adapter->rx_ps_pages) {
3154 case 3:
3155 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3156 fallthrough;
3157 case 2:
3158 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3159 fallthrough;
3160 case 1:
3161 psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3162 break;
3163 }
3164
3165 ew32(PSRCTL, psrctl);
3166 }
3167
3168 /* This is useful for sniffing bad packets. */
3169 if (adapter->netdev->features & NETIF_F_RXALL) {
3170 /* UPE and MPE will be handled by normal PROMISC logic
3171 * in e1000e_set_rx_mode
3172 */
3173 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3174 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3175 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3176
3177 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3178 E1000_RCTL_DPF | /* Allow filtered pause */
3179 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3180 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3181 * and that breaks VLANs.
3182 */
3183 }
3184
3185 ew32(RCTL, rctl);
3186 /* just started the receive unit, no need to restart */
3187 adapter->flags &= ~FLAG_RESTART_NOW;
3188}
3189
3190/**
3191 * e1000_configure_rx - Configure Receive Unit after Reset
3192 * @adapter: board private structure
3193 *
3194 * Configure the Rx unit of the MAC after a reset.
3195 **/
3196static void e1000_configure_rx(struct e1000_adapter *adapter)
3197{
3198 struct e1000_hw *hw = &adapter->hw;
3199 struct e1000_ring *rx_ring = adapter->rx_ring;
3200 u64 rdba;
3201 u32 rdlen, rctl, rxcsum, ctrl_ext;
3202
3203 if (adapter->rx_ps_pages) {
3204 /* this is a 32 byte descriptor */
3205 rdlen = rx_ring->count *
3206 sizeof(union e1000_rx_desc_packet_split);
3207 adapter->clean_rx = e1000_clean_rx_irq_ps;
3208 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3209 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3210 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3211 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3212 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3213 } else {
3214 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3215 adapter->clean_rx = e1000_clean_rx_irq;
3216 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3217 }
3218
3219 /* disable receives while setting up the descriptors */
3220 rctl = er32(RCTL);
3221 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3222 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3223 e1e_flush();
3224 usleep_range(10000, 11000);
3225
3226 if (adapter->flags2 & FLAG2_DMA_BURST) {
3227 /* set the writeback threshold (only takes effect if the RDTR
3228 * is set). set GRAN=1 and write back up to 0x4 worth, and
3229 * enable prefetching of 0x20 Rx descriptors
3230 * granularity = 01
3231 * wthresh = 04,
3232 * hthresh = 04,
3233 * pthresh = 0x20
3234 */
3235 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3236 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3237 }
3238
3239 /* set the Receive Delay Timer Register */
3240 ew32(RDTR, adapter->rx_int_delay);
3241
3242 /* irq moderation */
3243 ew32(RADV, adapter->rx_abs_int_delay);
3244 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3245 e1000e_write_itr(adapter, adapter->itr);
3246
3247 ctrl_ext = er32(CTRL_EXT);
3248 /* Auto-Mask interrupts upon ICR access */
3249 ctrl_ext |= E1000_CTRL_EXT_IAME;
3250 ew32(IAM, 0xffffffff);
3251 ew32(CTRL_EXT, ctrl_ext);
3252 e1e_flush();
3253
3254 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3255 * the Base and Length of the Rx Descriptor Ring
3256 */
3257 rdba = rx_ring->dma;
3258 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3259 ew32(RDBAH(0), (rdba >> 32));
3260 ew32(RDLEN(0), rdlen);
3261 ew32(RDH(0), 0);
3262 ew32(RDT(0), 0);
3263 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3264 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3265
3266 writel(0, rx_ring->head);
3267 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3268 e1000e_update_rdt_wa(rx_ring, 0);
3269 else
3270 writel(0, rx_ring->tail);
3271
3272 /* Enable Receive Checksum Offload for TCP and UDP */
3273 rxcsum = er32(RXCSUM);
3274 if (adapter->netdev->features & NETIF_F_RXCSUM)
3275 rxcsum |= E1000_RXCSUM_TUOFL;
3276 else
3277 rxcsum &= ~E1000_RXCSUM_TUOFL;
3278 ew32(RXCSUM, rxcsum);
3279
3280 /* With jumbo frames, excessive C-state transition latencies result
3281 * in dropped transactions.
3282 */
3283 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3284 u32 lat =
3285 ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3286 adapter->max_frame_size) * 8 / 1000;
3287
3288 if (adapter->flags & FLAG_IS_ICH) {
3289 u32 rxdctl = er32(RXDCTL(0));
3290
3291 ew32(RXDCTL(0), rxdctl | 0x3 | BIT(8));
3292 }
3293
3294 dev_info(&adapter->pdev->dev,
3295 "Some CPU C-states have been disabled in order to enable jumbo frames\n");
3296 cpu_latency_qos_update_request(&adapter->pm_qos_req, lat);
3297 } else {
3298 cpu_latency_qos_update_request(&adapter->pm_qos_req,
3299 PM_QOS_DEFAULT_VALUE);
3300 }
3301
3302 /* Enable Receives */
3303 ew32(RCTL, rctl);
3304}
3305
3306/**
3307 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3308 * @netdev: network interface device structure
3309 *
3310 * Writes multicast address list to the MTA hash table.
3311 * Returns: -ENOMEM on failure
3312 * 0 on no addresses written
3313 * X on writing X addresses to MTA
3314 */
3315static int e1000e_write_mc_addr_list(struct net_device *netdev)
3316{
3317 struct e1000_adapter *adapter = netdev_priv(netdev);
3318 struct e1000_hw *hw = &adapter->hw;
3319 struct netdev_hw_addr *ha;
3320 u8 *mta_list;
3321 int i;
3322
3323 if (netdev_mc_empty(netdev)) {
3324 /* nothing to program, so clear mc list */
3325 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3326 return 0;
3327 }
3328
3329 mta_list = kcalloc(netdev_mc_count(netdev), ETH_ALEN, GFP_ATOMIC);
3330 if (!mta_list)
3331 return -ENOMEM;
3332
3333 /* update_mc_addr_list expects a packed array of only addresses. */
3334 i = 0;
3335 netdev_for_each_mc_addr(ha, netdev)
3336 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3337
3338 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3339 kfree(mta_list);
3340
3341 return netdev_mc_count(netdev);
3342}
3343
3344/**
3345 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3346 * @netdev: network interface device structure
3347 *
3348 * Writes unicast address list to the RAR table.
3349 * Returns: -ENOMEM on failure/insufficient address space
3350 * 0 on no addresses written
3351 * X on writing X addresses to the RAR table
3352 **/
3353static int e1000e_write_uc_addr_list(struct net_device *netdev)
3354{
3355 struct e1000_adapter *adapter = netdev_priv(netdev);
3356 struct e1000_hw *hw = &adapter->hw;
3357 unsigned int rar_entries;
3358 int count = 0;
3359
3360 rar_entries = hw->mac.ops.rar_get_count(hw);
3361
3362 /* save a rar entry for our hardware address */
3363 rar_entries--;
3364
3365 /* save a rar entry for the LAA workaround */
3366 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3367 rar_entries--;
3368
3369 /* return ENOMEM indicating insufficient memory for addresses */
3370 if (netdev_uc_count(netdev) > rar_entries)
3371 return -ENOMEM;
3372
3373 if (!netdev_uc_empty(netdev) && rar_entries) {
3374 struct netdev_hw_addr *ha;
3375
3376 /* write the addresses in reverse order to avoid write
3377 * combining
3378 */
3379 netdev_for_each_uc_addr(ha, netdev) {
3380 int ret_val;
3381
3382 if (!rar_entries)
3383 break;
3384 ret_val = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3385 if (ret_val < 0)
3386 return -ENOMEM;
3387 count++;
3388 }
3389 }
3390
3391 /* zero out the remaining RAR entries not used above */
3392 for (; rar_entries > 0; rar_entries--) {
3393 ew32(RAH(rar_entries), 0);
3394 ew32(RAL(rar_entries), 0);
3395 }
3396 e1e_flush();
3397
3398 return count;
3399}
3400
3401/**
3402 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3403 * @netdev: network interface device structure
3404 *
3405 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3406 * address list or the network interface flags are updated. This routine is
3407 * responsible for configuring the hardware for proper unicast, multicast,
3408 * promiscuous mode, and all-multi behavior.
3409 **/
3410static void e1000e_set_rx_mode(struct net_device *netdev)
3411{
3412 struct e1000_adapter *adapter = netdev_priv(netdev);
3413 struct e1000_hw *hw = &adapter->hw;
3414 u32 rctl;
3415
3416 if (pm_runtime_suspended(netdev->dev.parent))
3417 return;
3418
3419 /* Check for Promiscuous and All Multicast modes */
3420 rctl = er32(RCTL);
3421
3422 /* clear the affected bits */
3423 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3424
3425 if (netdev->flags & IFF_PROMISC) {
3426 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3427 /* Do not hardware filter VLANs in promisc mode */
3428 e1000e_vlan_filter_disable(adapter);
3429 } else {
3430 int count;
3431
3432 if (netdev->flags & IFF_ALLMULTI) {
3433 rctl |= E1000_RCTL_MPE;
3434 } else {
3435 /* Write addresses to the MTA, if the attempt fails
3436 * then we should just turn on promiscuous mode so
3437 * that we can at least receive multicast traffic
3438 */
3439 count = e1000e_write_mc_addr_list(netdev);
3440 if (count < 0)
3441 rctl |= E1000_RCTL_MPE;
3442 }
3443 e1000e_vlan_filter_enable(adapter);
3444 /* Write addresses to available RAR registers, if there is not
3445 * sufficient space to store all the addresses then enable
3446 * unicast promiscuous mode
3447 */
3448 count = e1000e_write_uc_addr_list(netdev);
3449 if (count < 0)
3450 rctl |= E1000_RCTL_UPE;
3451 }
3452
3453 ew32(RCTL, rctl);
3454
3455 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3456 e1000e_vlan_strip_enable(adapter);
3457 else
3458 e1000e_vlan_strip_disable(adapter);
3459}
3460
3461static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3462{
3463 struct e1000_hw *hw = &adapter->hw;
3464 u32 mrqc, rxcsum;
3465 u32 rss_key[10];
3466 int i;
3467
3468 netdev_rss_key_fill(rss_key, sizeof(rss_key));
3469 for (i = 0; i < 10; i++)
3470 ew32(RSSRK(i), rss_key[i]);
3471
3472 /* Direct all traffic to queue 0 */
3473 for (i = 0; i < 32; i++)
3474 ew32(RETA(i), 0);
3475
3476 /* Disable raw packet checksumming so that RSS hash is placed in
3477 * descriptor on writeback.
3478 */
3479 rxcsum = er32(RXCSUM);
3480 rxcsum |= E1000_RXCSUM_PCSD;
3481
3482 ew32(RXCSUM, rxcsum);
3483
3484 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3485 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3486 E1000_MRQC_RSS_FIELD_IPV6 |
3487 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3488 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3489
3490 ew32(MRQC, mrqc);
3491}
3492
3493/**
3494 * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3495 * @adapter: board private structure
3496 * @timinca: pointer to returned time increment attributes
3497 *
3498 * Get attributes for incrementing the System Time Register SYSTIML/H at
3499 * the default base frequency, and set the cyclecounter shift value.
3500 **/
3501s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3502{
3503 struct e1000_hw *hw = &adapter->hw;
3504 u32 incvalue, incperiod, shift;
3505
3506 /* Make sure clock is enabled on I217/I218/I219 before checking
3507 * the frequency
3508 */
3509 if ((hw->mac.type >= e1000_pch_lpt) &&
3510 !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3511 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3512 u32 fextnvm7 = er32(FEXTNVM7);
3513
3514 if (!(fextnvm7 & BIT(0))) {
3515 ew32(FEXTNVM7, fextnvm7 | BIT(0));
3516 e1e_flush();
3517 }
3518 }
3519
3520 switch (hw->mac.type) {
3521 case e1000_pch2lan:
3522 /* Stable 96MHz frequency */
3523 incperiod = INCPERIOD_96MHZ;
3524 incvalue = INCVALUE_96MHZ;
3525 shift = INCVALUE_SHIFT_96MHZ;
3526 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3527 break;
3528 case e1000_pch_lpt:
3529 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3530 /* Stable 96MHz frequency */
3531 incperiod = INCPERIOD_96MHZ;
3532 incvalue = INCVALUE_96MHZ;
3533 shift = INCVALUE_SHIFT_96MHZ;
3534 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
3535 } else {
3536 /* Stable 25MHz frequency */
3537 incperiod = INCPERIOD_25MHZ;
3538 incvalue = INCVALUE_25MHZ;
3539 shift = INCVALUE_SHIFT_25MHZ;
3540 adapter->cc.shift = shift;
3541 }
3542 break;
3543 case e1000_pch_spt:
3544 /* Stable 24MHz frequency */
3545 incperiod = INCPERIOD_24MHZ;
3546 incvalue = INCVALUE_24MHZ;
3547 shift = INCVALUE_SHIFT_24MHZ;
3548 adapter->cc.shift = shift;
3549 break;
3550 case e1000_pch_cnp:
3551 case e1000_pch_tgp:
3552 case e1000_pch_adp:
3553 case e1000_pch_mtp:
3554 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3555 /* Stable 24MHz frequency */
3556 incperiod = INCPERIOD_24MHZ;
3557 incvalue = INCVALUE_24MHZ;
3558 shift = INCVALUE_SHIFT_24MHZ;
3559 adapter->cc.shift = shift;
3560 } else {
3561 /* Stable 38400KHz frequency */
3562 incperiod = INCPERIOD_38400KHZ;
3563 incvalue = INCVALUE_38400KHZ;
3564 shift = INCVALUE_SHIFT_38400KHZ;
3565 adapter->cc.shift = shift;
3566 }
3567 break;
3568 case e1000_82574:
3569 case e1000_82583:
3570 /* Stable 25MHz frequency */
3571 incperiod = INCPERIOD_25MHZ;
3572 incvalue = INCVALUE_25MHZ;
3573 shift = INCVALUE_SHIFT_25MHZ;
3574 adapter->cc.shift = shift;
3575 break;
3576 default:
3577 return -EINVAL;
3578 }
3579
3580 *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3581 ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3582
3583 return 0;
3584}
3585
3586/**
3587 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3588 * @adapter: board private structure
3589 * @config: timestamp configuration
3590 *
3591 * Outgoing time stamping can be enabled and disabled. Play nice and
3592 * disable it when requested, although it shouldn't cause any overhead
3593 * when no packet needs it. At most one packet in the queue may be
3594 * marked for time stamping, otherwise it would be impossible to tell
3595 * for sure to which packet the hardware time stamp belongs.
3596 *
3597 * Incoming time stamping has to be configured via the hardware filters.
3598 * Not all combinations are supported, in particular event type has to be
3599 * specified. Matching the kind of event packet is not supported, with the
3600 * exception of "all V2 events regardless of level 2 or 4".
3601 **/
3602static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3603 struct hwtstamp_config *config)
3604{
3605 struct e1000_hw *hw = &adapter->hw;
3606 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3607 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3608 u32 rxmtrl = 0;
3609 u16 rxudp = 0;
3610 bool is_l4 = false;
3611 bool is_l2 = false;
3612 u32 regval;
3613
3614 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3615 return -EINVAL;
3616
3617 /* flags reserved for future extensions - must be zero */
3618 if (config->flags)
3619 return -EINVAL;
3620
3621 switch (config->tx_type) {
3622 case HWTSTAMP_TX_OFF:
3623 tsync_tx_ctl = 0;
3624 break;
3625 case HWTSTAMP_TX_ON:
3626 break;
3627 default:
3628 return -ERANGE;
3629 }
3630
3631 switch (config->rx_filter) {
3632 case HWTSTAMP_FILTER_NONE:
3633 tsync_rx_ctl = 0;
3634 break;
3635 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3636 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3637 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3638 is_l4 = true;
3639 break;
3640 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3641 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3642 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3643 is_l4 = true;
3644 break;
3645 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3646 /* Also time stamps V2 L2 Path Delay Request/Response */
3647 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3648 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3649 is_l2 = true;
3650 break;
3651 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3652 /* Also time stamps V2 L2 Path Delay Request/Response. */
3653 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3654 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3655 is_l2 = true;
3656 break;
3657 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3658 /* Hardware cannot filter just V2 L4 Sync messages */
3659 fallthrough;
3660 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3661 /* Also time stamps V2 Path Delay Request/Response. */
3662 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3663 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3664 is_l2 = true;
3665 is_l4 = true;
3666 break;
3667 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3668 /* Hardware cannot filter just V2 L4 Delay Request messages */
3669 fallthrough;
3670 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3671 /* Also time stamps V2 Path Delay Request/Response. */
3672 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3673 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3674 is_l2 = true;
3675 is_l4 = true;
3676 break;
3677 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3678 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3679 /* Hardware cannot filter just V2 L4 or L2 Event messages */
3680 fallthrough;
3681 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3682 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3683 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3684 is_l2 = true;
3685 is_l4 = true;
3686 break;
3687 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3688 /* For V1, the hardware can only filter Sync messages or
3689 * Delay Request messages but not both so fall-through to
3690 * time stamp all packets.
3691 */
3692 fallthrough;
3693 case HWTSTAMP_FILTER_NTP_ALL:
3694 case HWTSTAMP_FILTER_ALL:
3695 is_l2 = true;
3696 is_l4 = true;
3697 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3698 config->rx_filter = HWTSTAMP_FILTER_ALL;
3699 break;
3700 default:
3701 return -ERANGE;
3702 }
3703
3704 adapter->hwtstamp_config = *config;
3705
3706 /* enable/disable Tx h/w time stamping */
3707 regval = er32(TSYNCTXCTL);
3708 regval &= ~E1000_TSYNCTXCTL_ENABLED;
3709 regval |= tsync_tx_ctl;
3710 ew32(TSYNCTXCTL, regval);
3711 if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3712 (regval & E1000_TSYNCTXCTL_ENABLED)) {
3713 e_err("Timesync Tx Control register not set as expected\n");
3714 return -EAGAIN;
3715 }
3716
3717 /* enable/disable Rx h/w time stamping */
3718 regval = er32(TSYNCRXCTL);
3719 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3720 regval |= tsync_rx_ctl;
3721 ew32(TSYNCRXCTL, regval);
3722 if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3723 E1000_TSYNCRXCTL_TYPE_MASK)) !=
3724 (regval & (E1000_TSYNCRXCTL_ENABLED |
3725 E1000_TSYNCRXCTL_TYPE_MASK))) {
3726 e_err("Timesync Rx Control register not set as expected\n");
3727 return -EAGAIN;
3728 }
3729
3730 /* L2: define ethertype filter for time stamped packets */
3731 if (is_l2)
3732 rxmtrl |= ETH_P_1588;
3733
3734 /* define which PTP packets get time stamped */
3735 ew32(RXMTRL, rxmtrl);
3736
3737 /* Filter by destination port */
3738 if (is_l4) {
3739 rxudp = PTP_EV_PORT;
3740 cpu_to_be16s(&rxudp);
3741 }
3742 ew32(RXUDP, rxudp);
3743
3744 e1e_flush();
3745
3746 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3747 er32(RXSTMPH);
3748 er32(TXSTMPH);
3749
3750 return 0;
3751}
3752
3753/**
3754 * e1000_configure - configure the hardware for Rx and Tx
3755 * @adapter: private board structure
3756 **/
3757static void e1000_configure(struct e1000_adapter *adapter)
3758{
3759 struct e1000_ring *rx_ring = adapter->rx_ring;
3760
3761 e1000e_set_rx_mode(adapter->netdev);
3762
3763 e1000_restore_vlan(adapter);
3764 e1000_init_manageability_pt(adapter);
3765
3766 e1000_configure_tx(adapter);
3767
3768 if (adapter->netdev->features & NETIF_F_RXHASH)
3769 e1000e_setup_rss_hash(adapter);
3770 e1000_setup_rctl(adapter);
3771 e1000_configure_rx(adapter);
3772 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3773}
3774
3775/**
3776 * e1000e_power_up_phy - restore link in case the phy was powered down
3777 * @adapter: address of board private structure
3778 *
3779 * The phy may be powered down to save power and turn off link when the
3780 * driver is unloaded and wake on lan is not enabled (among others)
3781 * *** this routine MUST be followed by a call to e1000e_reset ***
3782 **/
3783void e1000e_power_up_phy(struct e1000_adapter *adapter)
3784{
3785 if (adapter->hw.phy.ops.power_up)
3786 adapter->hw.phy.ops.power_up(&adapter->hw);
3787
3788 adapter->hw.mac.ops.setup_link(&adapter->hw);
3789}
3790
3791/**
3792 * e1000_power_down_phy - Power down the PHY
3793 * @adapter: board private structure
3794 *
3795 * Power down the PHY so no link is implied when interface is down.
3796 * The PHY cannot be powered down if management or WoL is active.
3797 */
3798static void e1000_power_down_phy(struct e1000_adapter *adapter)
3799{
3800 if (adapter->hw.phy.ops.power_down)
3801 adapter->hw.phy.ops.power_down(&adapter->hw);
3802}
3803
3804/**
3805 * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3806 * @adapter: board private structure
3807 *
3808 * We want to clear all pending descriptors from the TX ring.
3809 * zeroing happens when the HW reads the regs. We assign the ring itself as
3810 * the data of the next descriptor. We don't care about the data we are about
3811 * to reset the HW.
3812 */
3813static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3814{
3815 struct e1000_hw *hw = &adapter->hw;
3816 struct e1000_ring *tx_ring = adapter->tx_ring;
3817 struct e1000_tx_desc *tx_desc = NULL;
3818 u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3819 u16 size = 512;
3820
3821 tctl = er32(TCTL);
3822 ew32(TCTL, tctl | E1000_TCTL_EN);
3823 tdt = er32(TDT(0));
3824 BUG_ON(tdt != tx_ring->next_to_use);
3825 tx_desc = E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3826 tx_desc->buffer_addr = cpu_to_le64(tx_ring->dma);
3827
3828 tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3829 tx_desc->upper.data = 0;
3830 /* flush descriptors to memory before notifying the HW */
3831 wmb();
3832 tx_ring->next_to_use++;
3833 if (tx_ring->next_to_use == tx_ring->count)
3834 tx_ring->next_to_use = 0;
3835 ew32(TDT(0), tx_ring->next_to_use);
3836 usleep_range(200, 250);
3837}
3838
3839/**
3840 * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3841 * @adapter: board private structure
3842 *
3843 * Mark all descriptors in the RX ring as consumed and disable the rx ring
3844 */
3845static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3846{
3847 u32 rctl, rxdctl;
3848 struct e1000_hw *hw = &adapter->hw;
3849
3850 rctl = er32(RCTL);
3851 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3852 e1e_flush();
3853 usleep_range(100, 150);
3854
3855 rxdctl = er32(RXDCTL(0));
3856 /* zero the lower 14 bits (prefetch and host thresholds) */
3857 rxdctl &= 0xffffc000;
3858
3859 /* update thresholds: prefetch threshold to 31, host threshold to 1
3860 * and make sure the granularity is "descriptors" and not "cache lines"
3861 */
3862 rxdctl |= (0x1F | BIT(8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3863
3864 ew32(RXDCTL(0), rxdctl);
3865 /* momentarily enable the RX ring for the changes to take effect */
3866 ew32(RCTL, rctl | E1000_RCTL_EN);
3867 e1e_flush();
3868 usleep_range(100, 150);
3869 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3870}
3871
3872/**
3873 * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3874 * @adapter: board private structure
3875 *
3876 * In i219, the descriptor rings must be emptied before resetting the HW
3877 * or before changing the device state to D3 during runtime (runtime PM).
3878 *
3879 * Failure to do this will cause the HW to enter a unit hang state which can
3880 * only be released by PCI reset on the device
3881 *
3882 */
3883
3884static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3885{
3886 u16 hang_state;
3887 u32 fext_nvm11, tdlen;
3888 struct e1000_hw *hw = &adapter->hw;
3889
3890 /* First, disable MULR fix in FEXTNVM11 */
3891 fext_nvm11 = er32(FEXTNVM11);
3892 fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3893 ew32(FEXTNVM11, fext_nvm11);
3894 /* do nothing if we're not in faulty state, or if the queue is empty */
3895 tdlen = er32(TDLEN(0));
3896 pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3897 &hang_state);
3898 if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3899 return;
3900 e1000_flush_tx_ring(adapter);
3901 /* recheck, maybe the fault is caused by the rx ring */
3902 pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3903 &hang_state);
3904 if (hang_state & FLUSH_DESC_REQUIRED)
3905 e1000_flush_rx_ring(adapter);
3906}
3907
3908/**
3909 * e1000e_systim_reset - reset the timesync registers after a hardware reset
3910 * @adapter: board private structure
3911 *
3912 * When the MAC is reset, all hardware bits for timesync will be reset to the
3913 * default values. This function will restore the settings last in place.
3914 * Since the clock SYSTIME registers are reset, we will simply restore the
3915 * cyclecounter to the kernel real clock time.
3916 **/
3917static void e1000e_systim_reset(struct e1000_adapter *adapter)
3918{
3919 struct ptp_clock_info *info = &adapter->ptp_clock_info;
3920 struct e1000_hw *hw = &adapter->hw;
3921 unsigned long flags;
3922 u32 timinca;
3923 s32 ret_val;
3924
3925 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3926 return;
3927
3928 if (info->adjfreq) {
3929 /* restore the previous ptp frequency delta */
3930 ret_val = info->adjfreq(info, adapter->ptp_delta);
3931 } else {
3932 /* set the default base frequency if no adjustment possible */
3933 ret_val = e1000e_get_base_timinca(adapter, &timinca);
3934 if (!ret_val)
3935 ew32(TIMINCA, timinca);
3936 }
3937
3938 if (ret_val) {
3939 dev_warn(&adapter->pdev->dev,
3940 "Failed to restore TIMINCA clock rate delta: %d\n",
3941 ret_val);
3942 return;
3943 }
3944
3945 /* reset the systim ns time counter */
3946 spin_lock_irqsave(&adapter->systim_lock, flags);
3947 timecounter_init(&adapter->tc, &adapter->cc,
3948 ktime_to_ns(ktime_get_real()));
3949 spin_unlock_irqrestore(&adapter->systim_lock, flags);
3950
3951 /* restore the previous hwtstamp configuration settings */
3952 e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
3953}
3954
3955/**
3956 * e1000e_reset - bring the hardware into a known good state
3957 * @adapter: board private structure
3958 *
3959 * This function boots the hardware and enables some settings that
3960 * require a configuration cycle of the hardware - those cannot be
3961 * set/changed during runtime. After reset the device needs to be
3962 * properly configured for Rx, Tx etc.
3963 */
3964void e1000e_reset(struct e1000_adapter *adapter)
3965{
3966 struct e1000_mac_info *mac = &adapter->hw.mac;
3967 struct e1000_fc_info *fc = &adapter->hw.fc;
3968 struct e1000_hw *hw = &adapter->hw;
3969 u32 tx_space, min_tx_space, min_rx_space;
3970 u32 pba = adapter->pba;
3971 u16 hwm;
3972
3973 /* reset Packet Buffer Allocation to default */
3974 ew32(PBA, pba);
3975
3976 if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3977 /* To maintain wire speed transmits, the Tx FIFO should be
3978 * large enough to accommodate two full transmit packets,
3979 * rounded up to the next 1KB and expressed in KB. Likewise,
3980 * the Rx FIFO should be large enough to accommodate at least
3981 * one full receive packet and is similarly rounded up and
3982 * expressed in KB.
3983 */
3984 pba = er32(PBA);
3985 /* upper 16 bits has Tx packet buffer allocation size in KB */
3986 tx_space = pba >> 16;
3987 /* lower 16 bits has Rx packet buffer allocation size in KB */
3988 pba &= 0xffff;
3989 /* the Tx fifo also stores 16 bytes of information about the Tx
3990 * but don't include ethernet FCS because hardware appends it
3991 */
3992 min_tx_space = (adapter->max_frame_size +
3993 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3994 min_tx_space = ALIGN(min_tx_space, 1024);
3995 min_tx_space >>= 10;
3996 /* software strips receive CRC, so leave room for it */
3997 min_rx_space = adapter->max_frame_size;
3998 min_rx_space = ALIGN(min_rx_space, 1024);
3999 min_rx_space >>= 10;
4000
4001 /* If current Tx allocation is less than the min Tx FIFO size,
4002 * and the min Tx FIFO size is less than the current Rx FIFO
4003 * allocation, take space away from current Rx allocation
4004 */
4005 if ((tx_space < min_tx_space) &&
4006 ((min_tx_space - tx_space) < pba)) {
4007 pba -= min_tx_space - tx_space;
4008
4009 /* if short on Rx space, Rx wins and must trump Tx
4010 * adjustment
4011 */
4012 if (pba < min_rx_space)
4013 pba = min_rx_space;
4014 }
4015
4016 ew32(PBA, pba);
4017 }
4018
4019 /* flow control settings
4020 *
4021 * The high water mark must be low enough to fit one full frame
4022 * (or the size used for early receive) above it in the Rx FIFO.
4023 * Set it to the lower of:
4024 * - 90% of the Rx FIFO size, and
4025 * - the full Rx FIFO size minus one full frame
4026 */
4027 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
4028 fc->pause_time = 0xFFFF;
4029 else
4030 fc->pause_time = E1000_FC_PAUSE_TIME;
4031 fc->send_xon = true;
4032 fc->current_mode = fc->requested_mode;
4033
4034 switch (hw->mac.type) {
4035 case e1000_ich9lan:
4036 case e1000_ich10lan:
4037 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4038 pba = 14;
4039 ew32(PBA, pba);
4040 fc->high_water = 0x2800;
4041 fc->low_water = fc->high_water - 8;
4042 break;
4043 }
4044 fallthrough;
4045 default:
4046 hwm = min(((pba << 10) * 9 / 10),
4047 ((pba << 10) - adapter->max_frame_size));
4048
4049 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
4050 fc->low_water = fc->high_water - 8;
4051 break;
4052 case e1000_pchlan:
4053 /* Workaround PCH LOM adapter hangs with certain network
4054 * loads. If hangs persist, try disabling Tx flow control.
4055 */
4056 if (adapter->netdev->mtu > ETH_DATA_LEN) {
4057 fc->high_water = 0x3500;
4058 fc->low_water = 0x1500;
4059 } else {
4060 fc->high_water = 0x5000;
4061 fc->low_water = 0x3000;
4062 }
4063 fc->refresh_time = 0x1000;
4064 break;
4065 case e1000_pch2lan:
4066 case e1000_pch_lpt:
4067 case e1000_pch_spt:
4068 case e1000_pch_cnp:
4069 case e1000_pch_tgp:
4070 case e1000_pch_adp:
4071 case e1000_pch_mtp:
4072 fc->refresh_time = 0xFFFF;
4073 fc->pause_time = 0xFFFF;
4074
4075 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4076 fc->high_water = 0x05C20;
4077 fc->low_water = 0x05048;
4078 break;
4079 }
4080
4081 pba = 14;
4082 ew32(PBA, pba);
4083 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4084 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4085 break;
4086 }
4087
4088 /* Alignment of Tx data is on an arbitrary byte boundary with the
4089 * maximum size per Tx descriptor limited only to the transmit
4090 * allocation of the packet buffer minus 96 bytes with an upper
4091 * limit of 24KB due to receive synchronization limitations.
4092 */
4093 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4094 24 << 10);
4095
4096 /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4097 * fit in receive buffer.
4098 */
4099 if (adapter->itr_setting & 0x3) {
4100 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4101 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4102 dev_info(&adapter->pdev->dev,
4103 "Interrupt Throttle Rate off\n");
4104 adapter->flags2 |= FLAG2_DISABLE_AIM;
4105 e1000e_write_itr(adapter, 0);
4106 }
4107 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4108 dev_info(&adapter->pdev->dev,
4109 "Interrupt Throttle Rate on\n");
4110 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4111 adapter->itr = 20000;
4112 e1000e_write_itr(adapter, adapter->itr);
4113 }
4114 }
4115
4116 if (hw->mac.type >= e1000_pch_spt)
4117 e1000_flush_desc_rings(adapter);
4118 /* Allow time for pending master requests to run */
4119 mac->ops.reset_hw(hw);
4120
4121 /* For parts with AMT enabled, let the firmware know
4122 * that the network interface is in control
4123 */
4124 if (adapter->flags & FLAG_HAS_AMT)
4125 e1000e_get_hw_control(adapter);
4126
4127 ew32(WUC, 0);
4128
4129 if (mac->ops.init_hw(hw))
4130 e_err("Hardware Error\n");
4131
4132 e1000_update_mng_vlan(adapter);
4133
4134 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4135 ew32(VET, ETH_P_8021Q);
4136
4137 e1000e_reset_adaptive(hw);
4138
4139 /* restore systim and hwtstamp settings */
4140 e1000e_systim_reset(adapter);
4141
4142 /* Set EEE advertisement as appropriate */
4143 if (adapter->flags2 & FLAG2_HAS_EEE) {
4144 s32 ret_val;
4145 u16 adv_addr;
4146
4147 switch (hw->phy.type) {
4148 case e1000_phy_82579:
4149 adv_addr = I82579_EEE_ADVERTISEMENT;
4150 break;
4151 case e1000_phy_i217:
4152 adv_addr = I217_EEE_ADVERTISEMENT;
4153 break;
4154 default:
4155 dev_err(&adapter->pdev->dev,
4156 "Invalid PHY type setting EEE advertisement\n");
4157 return;
4158 }
4159
4160 ret_val = hw->phy.ops.acquire(hw);
4161 if (ret_val) {
4162 dev_err(&adapter->pdev->dev,
4163 "EEE advertisement - unable to acquire PHY\n");
4164 return;
4165 }
4166
4167 e1000_write_emi_reg_locked(hw, adv_addr,
4168 hw->dev_spec.ich8lan.eee_disable ?
4169 0 : adapter->eee_advert);
4170
4171 hw->phy.ops.release(hw);
4172 }
4173
4174 if (!netif_running(adapter->netdev) &&
4175 !test_bit(__E1000_TESTING, &adapter->state))
4176 e1000_power_down_phy(adapter);
4177
4178 e1000_get_phy_info(hw);
4179
4180 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4181 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4182 u16 phy_data = 0;
4183 /* speed up time to link by disabling smart power down, ignore
4184 * the return value of this function because there is nothing
4185 * different we would do if it failed
4186 */
4187 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4188 phy_data &= ~IGP02E1000_PM_SPD;
4189 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4190 }
4191 if (hw->mac.type >= e1000_pch_spt && adapter->int_mode == 0) {
4192 u32 reg;
4193
4194 /* Fextnvm7 @ 0xe4[2] = 1 */
4195 reg = er32(FEXTNVM7);
4196 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4197 ew32(FEXTNVM7, reg);
4198 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4199 reg = er32(FEXTNVM9);
4200 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4201 E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4202 ew32(FEXTNVM9, reg);
4203 }
4204
4205}
4206
4207/**
4208 * e1000e_trigger_lsc - trigger an LSC interrupt
4209 * @adapter:
4210 *
4211 * Fire a link status change interrupt to start the watchdog.
4212 **/
4213static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4214{
4215 struct e1000_hw *hw = &adapter->hw;
4216
4217 if (adapter->msix_entries)
4218 ew32(ICS, E1000_ICS_LSC | E1000_ICS_OTHER);
4219 else
4220 ew32(ICS, E1000_ICS_LSC);
4221}
4222
4223void e1000e_up(struct e1000_adapter *adapter)
4224{
4225 /* hardware has been reset, we need to reload some things */
4226 e1000_configure(adapter);
4227
4228 clear_bit(__E1000_DOWN, &adapter->state);
4229
4230 if (adapter->msix_entries)
4231 e1000_configure_msix(adapter);
4232 e1000_irq_enable(adapter);
4233
4234 /* Tx queue started by watchdog timer when link is up */
4235
4236 e1000e_trigger_lsc(adapter);
4237}
4238
4239static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4240{
4241 struct e1000_hw *hw = &adapter->hw;
4242
4243 if (!(adapter->flags2 & FLAG2_DMA_BURST))
4244 return;
4245
4246 /* flush pending descriptor writebacks to memory */
4247 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4248 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4249
4250 /* execute the writes immediately */
4251 e1e_flush();
4252
4253 /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4254 * write is successful
4255 */
4256 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4257 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4258
4259 /* execute the writes immediately */
4260 e1e_flush();
4261}
4262
4263static void e1000e_update_stats(struct e1000_adapter *adapter);
4264
4265/**
4266 * e1000e_down - quiesce the device and optionally reset the hardware
4267 * @adapter: board private structure
4268 * @reset: boolean flag to reset the hardware or not
4269 */
4270void e1000e_down(struct e1000_adapter *adapter, bool reset)
4271{
4272 struct net_device *netdev = adapter->netdev;
4273 struct e1000_hw *hw = &adapter->hw;
4274 u32 tctl, rctl;
4275
4276 /* signal that we're down so the interrupt handler does not
4277 * reschedule our watchdog timer
4278 */
4279 set_bit(__E1000_DOWN, &adapter->state);
4280
4281 netif_carrier_off(netdev);
4282
4283 /* disable receives in the hardware */
4284 rctl = er32(RCTL);
4285 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4286 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4287 /* flush and sleep below */
4288
4289 netif_stop_queue(netdev);
4290
4291 /* disable transmits in the hardware */
4292 tctl = er32(TCTL);
4293 tctl &= ~E1000_TCTL_EN;
4294 ew32(TCTL, tctl);
4295
4296 /* flush both disables and wait for them to finish */
4297 e1e_flush();
4298 usleep_range(10000, 11000);
4299
4300 e1000_irq_disable(adapter);
4301
4302 napi_synchronize(&adapter->napi);
4303
4304 del_timer_sync(&adapter->watchdog_timer);
4305 del_timer_sync(&adapter->phy_info_timer);
4306
4307 spin_lock(&adapter->stats64_lock);
4308 e1000e_update_stats(adapter);
4309 spin_unlock(&adapter->stats64_lock);
4310
4311 e1000e_flush_descriptors(adapter);
4312
4313 adapter->link_speed = 0;
4314 adapter->link_duplex = 0;
4315
4316 /* Disable Si errata workaround on PCHx for jumbo frame flow */
4317 if ((hw->mac.type >= e1000_pch2lan) &&
4318 (adapter->netdev->mtu > ETH_DATA_LEN) &&
4319 e1000_lv_jumbo_workaround_ich8lan(hw, false))
4320 e_dbg("failed to disable jumbo frame workaround mode\n");
4321
4322 if (!pci_channel_offline(adapter->pdev)) {
4323 if (reset)
4324 e1000e_reset(adapter);
4325 else if (hw->mac.type >= e1000_pch_spt)
4326 e1000_flush_desc_rings(adapter);
4327 }
4328 e1000_clean_tx_ring(adapter->tx_ring);
4329 e1000_clean_rx_ring(adapter->rx_ring);
4330}
4331
4332void e1000e_reinit_locked(struct e1000_adapter *adapter)
4333{
4334 might_sleep();
4335 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4336 usleep_range(1000, 1100);
4337 e1000e_down(adapter, true);
4338 e1000e_up(adapter);
4339 clear_bit(__E1000_RESETTING, &adapter->state);
4340}
4341
4342/**
4343 * e1000e_sanitize_systim - sanitize raw cycle counter reads
4344 * @hw: pointer to the HW structure
4345 * @systim: PHC time value read, sanitized and returned
4346 * @sts: structure to hold system time before and after reading SYSTIML,
4347 * may be NULL
4348 *
4349 * Errata for 82574/82583 possible bad bits read from SYSTIMH/L:
4350 * check to see that the time is incrementing at a reasonable
4351 * rate and is a multiple of incvalue.
4352 **/
4353static u64 e1000e_sanitize_systim(struct e1000_hw *hw, u64 systim,
4354 struct ptp_system_timestamp *sts)
4355{
4356 u64 time_delta, rem, temp;
4357 u64 systim_next;
4358 u32 incvalue;
4359 int i;
4360
4361 incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4362 for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4363 /* latch SYSTIMH on read of SYSTIML */
4364 ptp_read_system_prets(sts);
4365 systim_next = (u64)er32(SYSTIML);
4366 ptp_read_system_postts(sts);
4367 systim_next |= (u64)er32(SYSTIMH) << 32;
4368
4369 time_delta = systim_next - systim;
4370 temp = time_delta;
4371 /* VMWare users have seen incvalue of zero, don't div / 0 */
4372 rem = incvalue ? do_div(temp, incvalue) : (time_delta != 0);
4373
4374 systim = systim_next;
4375
4376 if ((time_delta < E1000_82574_SYSTIM_EPSILON) && (rem == 0))
4377 break;
4378 }
4379
4380 return systim;
4381}
4382
4383/**
4384 * e1000e_read_systim - read SYSTIM register
4385 * @adapter: board private structure
4386 * @sts: structure which will contain system time before and after reading
4387 * SYSTIML, may be NULL
4388 **/
4389u64 e1000e_read_systim(struct e1000_adapter *adapter,
4390 struct ptp_system_timestamp *sts)
4391{
4392 struct e1000_hw *hw = &adapter->hw;
4393 u32 systimel, systimel_2, systimeh;
4394 u64 systim;
4395 /* SYSTIMH latching upon SYSTIML read does not work well.
4396 * This means that if SYSTIML overflows after we read it but before
4397 * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4398 * will experience a huge non linear increment in the systime value
4399 * to fix that we test for overflow and if true, we re-read systime.
4400 */
4401 ptp_read_system_prets(sts);
4402 systimel = er32(SYSTIML);
4403 ptp_read_system_postts(sts);
4404 systimeh = er32(SYSTIMH);
4405 /* Is systimel is so large that overflow is possible? */
4406 if (systimel >= (u32)0xffffffff - E1000_TIMINCA_INCVALUE_MASK) {
4407 ptp_read_system_prets(sts);
4408 systimel_2 = er32(SYSTIML);
4409 ptp_read_system_postts(sts);
4410 if (systimel > systimel_2) {
4411 /* There was an overflow, read again SYSTIMH, and use
4412 * systimel_2
4413 */
4414 systimeh = er32(SYSTIMH);
4415 systimel = systimel_2;
4416 }
4417 }
4418 systim = (u64)systimel;
4419 systim |= (u64)systimeh << 32;
4420
4421 if (adapter->flags2 & FLAG2_CHECK_SYSTIM_OVERFLOW)
4422 systim = e1000e_sanitize_systim(hw, systim, sts);
4423
4424 return systim;
4425}
4426
4427/**
4428 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4429 * @cc: cyclecounter structure
4430 **/
4431static u64 e1000e_cyclecounter_read(const struct cyclecounter *cc)
4432{
4433 struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4434 cc);
4435
4436 return e1000e_read_systim(adapter, NULL);
4437}
4438
4439/**
4440 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4441 * @adapter: board private structure to initialize
4442 *
4443 * e1000_sw_init initializes the Adapter private data structure.
4444 * Fields are initialized based on PCI device information and
4445 * OS network device settings (MTU size).
4446 **/
4447static int e1000_sw_init(struct e1000_adapter *adapter)
4448{
4449 struct net_device *netdev = adapter->netdev;
4450
4451 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4452 adapter->rx_ps_bsize0 = 128;
4453 adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4454 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4455 adapter->tx_ring_count = E1000_DEFAULT_TXD;
4456 adapter->rx_ring_count = E1000_DEFAULT_RXD;
4457
4458 spin_lock_init(&adapter->stats64_lock);
4459
4460 e1000e_set_interrupt_capability(adapter);
4461
4462 if (e1000_alloc_queues(adapter))
4463 return -ENOMEM;
4464
4465 /* Setup hardware time stamping cyclecounter */
4466 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4467 adapter->cc.read = e1000e_cyclecounter_read;
4468 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4469 adapter->cc.mult = 1;
4470 /* cc.shift set in e1000e_get_base_tininca() */
4471
4472 spin_lock_init(&adapter->systim_lock);
4473 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4474 }
4475
4476 /* Explicitly disable IRQ since the NIC can be in any state. */
4477 e1000_irq_disable(adapter);
4478
4479 set_bit(__E1000_DOWN, &adapter->state);
4480 return 0;
4481}
4482
4483/**
4484 * e1000_intr_msi_test - Interrupt Handler
4485 * @irq: interrupt number
4486 * @data: pointer to a network interface device structure
4487 **/
4488static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4489{
4490 struct net_device *netdev = data;
4491 struct e1000_adapter *adapter = netdev_priv(netdev);
4492 struct e1000_hw *hw = &adapter->hw;
4493 u32 icr = er32(ICR);
4494
4495 e_dbg("icr is %08X\n", icr);
4496 if (icr & E1000_ICR_RXSEQ) {
4497 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4498 /* Force memory writes to complete before acknowledging the
4499 * interrupt is handled.
4500 */
4501 wmb();
4502 }
4503
4504 return IRQ_HANDLED;
4505}
4506
4507/**
4508 * e1000_test_msi_interrupt - Returns 0 for successful test
4509 * @adapter: board private struct
4510 *
4511 * code flow taken from tg3.c
4512 **/
4513static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4514{
4515 struct net_device *netdev = adapter->netdev;
4516 struct e1000_hw *hw = &adapter->hw;
4517 int err;
4518
4519 /* poll_enable hasn't been called yet, so don't need disable */
4520 /* clear any pending events */
4521 er32(ICR);
4522
4523 /* free the real vector and request a test handler */
4524 e1000_free_irq(adapter);
4525 e1000e_reset_interrupt_capability(adapter);
4526
4527 /* Assume that the test fails, if it succeeds then the test
4528 * MSI irq handler will unset this flag
4529 */
4530 adapter->flags |= FLAG_MSI_TEST_FAILED;
4531
4532 err = pci_enable_msi(adapter->pdev);
4533 if (err)
4534 goto msi_test_failed;
4535
4536 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4537 netdev->name, netdev);
4538 if (err) {
4539 pci_disable_msi(adapter->pdev);
4540 goto msi_test_failed;
4541 }
4542
4543 /* Force memory writes to complete before enabling and firing an
4544 * interrupt.
4545 */
4546 wmb();
4547
4548 e1000_irq_enable(adapter);
4549
4550 /* fire an unusual interrupt on the test handler */
4551 ew32(ICS, E1000_ICS_RXSEQ);
4552 e1e_flush();
4553 msleep(100);
4554
4555 e1000_irq_disable(adapter);
4556
4557 rmb(); /* read flags after interrupt has been fired */
4558
4559 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4560 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4561 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4562 } else {
4563 e_dbg("MSI interrupt test succeeded!\n");
4564 }
4565
4566 free_irq(adapter->pdev->irq, netdev);
4567 pci_disable_msi(adapter->pdev);
4568
4569msi_test_failed:
4570 e1000e_set_interrupt_capability(adapter);
4571 return e1000_request_irq(adapter);
4572}
4573
4574/**
4575 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4576 * @adapter: board private struct
4577 *
4578 * code flow taken from tg3.c, called with e1000 interrupts disabled.
4579 **/
4580static int e1000_test_msi(struct e1000_adapter *adapter)
4581{
4582 int err;
4583 u16 pci_cmd;
4584
4585 if (!(adapter->flags & FLAG_MSI_ENABLED))
4586 return 0;
4587
4588 /* disable SERR in case the MSI write causes a master abort */
4589 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4590 if (pci_cmd & PCI_COMMAND_SERR)
4591 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4592 pci_cmd & ~PCI_COMMAND_SERR);
4593
4594 err = e1000_test_msi_interrupt(adapter);
4595
4596 /* re-enable SERR */
4597 if (pci_cmd & PCI_COMMAND_SERR) {
4598 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4599 pci_cmd |= PCI_COMMAND_SERR;
4600 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4601 }
4602
4603 return err;
4604}
4605
4606/**
4607 * e1000e_open - Called when a network interface is made active
4608 * @netdev: network interface device structure
4609 *
4610 * Returns 0 on success, negative value on failure
4611 *
4612 * The open entry point is called when a network interface is made
4613 * active by the system (IFF_UP). At this point all resources needed
4614 * for transmit and receive operations are allocated, the interrupt
4615 * handler is registered with the OS, the watchdog timer is started,
4616 * and the stack is notified that the interface is ready.
4617 **/
4618int e1000e_open(struct net_device *netdev)
4619{
4620 struct e1000_adapter *adapter = netdev_priv(netdev);
4621 struct e1000_hw *hw = &adapter->hw;
4622 struct pci_dev *pdev = adapter->pdev;
4623 int err;
4624
4625 /* disallow open during test */
4626 if (test_bit(__E1000_TESTING, &adapter->state))
4627 return -EBUSY;
4628
4629 pm_runtime_get_sync(&pdev->dev);
4630
4631 netif_carrier_off(netdev);
4632 netif_stop_queue(netdev);
4633
4634 /* allocate transmit descriptors */
4635 err = e1000e_setup_tx_resources(adapter->tx_ring);
4636 if (err)
4637 goto err_setup_tx;
4638
4639 /* allocate receive descriptors */
4640 err = e1000e_setup_rx_resources(adapter->rx_ring);
4641 if (err)
4642 goto err_setup_rx;
4643
4644 /* If AMT is enabled, let the firmware know that the network
4645 * interface is now open and reset the part to a known state.
4646 */
4647 if (adapter->flags & FLAG_HAS_AMT) {
4648 e1000e_get_hw_control(adapter);
4649 e1000e_reset(adapter);
4650 }
4651
4652 e1000e_power_up_phy(adapter);
4653
4654 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4655 if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4656 e1000_update_mng_vlan(adapter);
4657
4658 /* DMA latency requirement to workaround jumbo issue */
4659 cpu_latency_qos_add_request(&adapter->pm_qos_req, PM_QOS_DEFAULT_VALUE);
4660
4661 /* before we allocate an interrupt, we must be ready to handle it.
4662 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4663 * as soon as we call pci_request_irq, so we have to setup our
4664 * clean_rx handler before we do so.
4665 */
4666 e1000_configure(adapter);
4667
4668 err = e1000_request_irq(adapter);
4669 if (err)
4670 goto err_req_irq;
4671
4672 /* Work around PCIe errata with MSI interrupts causing some chipsets to
4673 * ignore e1000e MSI messages, which means we need to test our MSI
4674 * interrupt now
4675 */
4676 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4677 err = e1000_test_msi(adapter);
4678 if (err) {
4679 e_err("Interrupt allocation failed\n");
4680 goto err_req_irq;
4681 }
4682 }
4683
4684 /* From here on the code is the same as e1000e_up() */
4685 clear_bit(__E1000_DOWN, &adapter->state);
4686
4687 napi_enable(&adapter->napi);
4688
4689 e1000_irq_enable(adapter);
4690
4691 adapter->tx_hang_recheck = false;
4692
4693 hw->mac.get_link_status = true;
4694 pm_runtime_put(&pdev->dev);
4695
4696 e1000e_trigger_lsc(adapter);
4697
4698 return 0;
4699
4700err_req_irq:
4701 cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4702 e1000e_release_hw_control(adapter);
4703 e1000_power_down_phy(adapter);
4704 e1000e_free_rx_resources(adapter->rx_ring);
4705err_setup_rx:
4706 e1000e_free_tx_resources(adapter->tx_ring);
4707err_setup_tx:
4708 e1000e_reset(adapter);
4709 pm_runtime_put_sync(&pdev->dev);
4710
4711 return err;
4712}
4713
4714/**
4715 * e1000e_close - Disables a network interface
4716 * @netdev: network interface device structure
4717 *
4718 * Returns 0, this is not allowed to fail
4719 *
4720 * The close entry point is called when an interface is de-activated
4721 * by the OS. The hardware is still under the drivers control, but
4722 * needs to be disabled. A global MAC reset is issued to stop the
4723 * hardware, and all transmit and receive resources are freed.
4724 **/
4725int e1000e_close(struct net_device *netdev)
4726{
4727 struct e1000_adapter *adapter = netdev_priv(netdev);
4728 struct pci_dev *pdev = adapter->pdev;
4729 int count = E1000_CHECK_RESET_COUNT;
4730
4731 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4732 usleep_range(10000, 11000);
4733
4734 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4735
4736 pm_runtime_get_sync(&pdev->dev);
4737
4738 if (netif_device_present(netdev)) {
4739 e1000e_down(adapter, true);
4740 e1000_free_irq(adapter);
4741
4742 /* Link status message must follow this format */
4743 netdev_info(netdev, "NIC Link is Down\n");
4744 }
4745
4746 napi_disable(&adapter->napi);
4747
4748 e1000e_free_tx_resources(adapter->tx_ring);
4749 e1000e_free_rx_resources(adapter->rx_ring);
4750
4751 /* kill manageability vlan ID if supported, but not if a vlan with
4752 * the same ID is registered on the host OS (let 8021q kill it)
4753 */
4754 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4755 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4756 adapter->mng_vlan_id);
4757
4758 /* If AMT is enabled, let the firmware know that the network
4759 * interface is now closed
4760 */
4761 if ((adapter->flags & FLAG_HAS_AMT) &&
4762 !test_bit(__E1000_TESTING, &adapter->state))
4763 e1000e_release_hw_control(adapter);
4764
4765 cpu_latency_qos_remove_request(&adapter->pm_qos_req);
4766
4767 pm_runtime_put_sync(&pdev->dev);
4768
4769 return 0;
4770}
4771
4772/**
4773 * e1000_set_mac - Change the Ethernet Address of the NIC
4774 * @netdev: network interface device structure
4775 * @p: pointer to an address structure
4776 *
4777 * Returns 0 on success, negative on failure
4778 **/
4779static int e1000_set_mac(struct net_device *netdev, void *p)
4780{
4781 struct e1000_adapter *adapter = netdev_priv(netdev);
4782 struct e1000_hw *hw = &adapter->hw;
4783 struct sockaddr *addr = p;
4784
4785 if (!is_valid_ether_addr(addr->sa_data))
4786 return -EADDRNOTAVAIL;
4787
4788 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4789 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4790
4791 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4792
4793 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4794 /* activate the work around */
4795 e1000e_set_laa_state_82571(&adapter->hw, 1);
4796
4797 /* Hold a copy of the LAA in RAR[14] This is done so that
4798 * between the time RAR[0] gets clobbered and the time it
4799 * gets fixed (in e1000_watchdog), the actual LAA is in one
4800 * of the RARs and no incoming packets directed to this port
4801 * are dropped. Eventually the LAA will be in RAR[0] and
4802 * RAR[14]
4803 */
4804 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4805 adapter->hw.mac.rar_entry_count - 1);
4806 }
4807
4808 return 0;
4809}
4810
4811/**
4812 * e1000e_update_phy_task - work thread to update phy
4813 * @work: pointer to our work struct
4814 *
4815 * this worker thread exists because we must acquire a
4816 * semaphore to read the phy, which we could msleep while
4817 * waiting for it, and we can't msleep in a timer.
4818 **/
4819static void e1000e_update_phy_task(struct work_struct *work)
4820{
4821 struct e1000_adapter *adapter = container_of(work,
4822 struct e1000_adapter,
4823 update_phy_task);
4824 struct e1000_hw *hw = &adapter->hw;
4825
4826 if (test_bit(__E1000_DOWN, &adapter->state))
4827 return;
4828
4829 e1000_get_phy_info(hw);
4830
4831 /* Enable EEE on 82579 after link up */
4832 if (hw->phy.type >= e1000_phy_82579)
4833 e1000_set_eee_pchlan(hw);
4834}
4835
4836/**
4837 * e1000_update_phy_info - timre call-back to update PHY info
4838 * @t: pointer to timer_list containing private info adapter
4839 *
4840 * Need to wait a few seconds after link up to get diagnostic information from
4841 * the phy
4842 **/
4843static void e1000_update_phy_info(struct timer_list *t)
4844{
4845 struct e1000_adapter *adapter = from_timer(adapter, t, phy_info_timer);
4846
4847 if (test_bit(__E1000_DOWN, &adapter->state))
4848 return;
4849
4850 schedule_work(&adapter->update_phy_task);
4851}
4852
4853/**
4854 * e1000e_update_phy_stats - Update the PHY statistics counters
4855 * @adapter: board private structure
4856 *
4857 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4858 **/
4859static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4860{
4861 struct e1000_hw *hw = &adapter->hw;
4862 s32 ret_val;
4863 u16 phy_data;
4864
4865 ret_val = hw->phy.ops.acquire(hw);
4866 if (ret_val)
4867 return;
4868
4869 /* A page set is expensive so check if already on desired page.
4870 * If not, set to the page with the PHY status registers.
4871 */
4872 hw->phy.addr = 1;
4873 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4874 &phy_data);
4875 if (ret_val)
4876 goto release;
4877 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4878 ret_val = hw->phy.ops.set_page(hw,
4879 HV_STATS_PAGE << IGP_PAGE_SHIFT);
4880 if (ret_val)
4881 goto release;
4882 }
4883
4884 /* Single Collision Count */
4885 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4886 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4887 if (!ret_val)
4888 adapter->stats.scc += phy_data;
4889
4890 /* Excessive Collision Count */
4891 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4892 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4893 if (!ret_val)
4894 adapter->stats.ecol += phy_data;
4895
4896 /* Multiple Collision Count */
4897 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4898 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4899 if (!ret_val)
4900 adapter->stats.mcc += phy_data;
4901
4902 /* Late Collision Count */
4903 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4904 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4905 if (!ret_val)
4906 adapter->stats.latecol += phy_data;
4907
4908 /* Collision Count - also used for adaptive IFS */
4909 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4910 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4911 if (!ret_val)
4912 hw->mac.collision_delta = phy_data;
4913
4914 /* Defer Count */
4915 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4916 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4917 if (!ret_val)
4918 adapter->stats.dc += phy_data;
4919
4920 /* Transmit with no CRS */
4921 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4922 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4923 if (!ret_val)
4924 adapter->stats.tncrs += phy_data;
4925
4926release:
4927 hw->phy.ops.release(hw);
4928}
4929
4930/**
4931 * e1000e_update_stats - Update the board statistics counters
4932 * @adapter: board private structure
4933 **/
4934static void e1000e_update_stats(struct e1000_adapter *adapter)
4935{
4936 struct net_device *netdev = adapter->netdev;
4937 struct e1000_hw *hw = &adapter->hw;
4938 struct pci_dev *pdev = adapter->pdev;
4939
4940 /* Prevent stats update while adapter is being reset, or if the pci
4941 * connection is down.
4942 */
4943 if (adapter->link_speed == 0)
4944 return;
4945 if (pci_channel_offline(pdev))
4946 return;
4947
4948 adapter->stats.crcerrs += er32(CRCERRS);
4949 adapter->stats.gprc += er32(GPRC);
4950 adapter->stats.gorc += er32(GORCL);
4951 er32(GORCH); /* Clear gorc */
4952 adapter->stats.bprc += er32(BPRC);
4953 adapter->stats.mprc += er32(MPRC);
4954 adapter->stats.roc += er32(ROC);
4955
4956 adapter->stats.mpc += er32(MPC);
4957
4958 /* Half-duplex statistics */
4959 if (adapter->link_duplex == HALF_DUPLEX) {
4960 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4961 e1000e_update_phy_stats(adapter);
4962 } else {
4963 adapter->stats.scc += er32(SCC);
4964 adapter->stats.ecol += er32(ECOL);
4965 adapter->stats.mcc += er32(MCC);
4966 adapter->stats.latecol += er32(LATECOL);
4967 adapter->stats.dc += er32(DC);
4968
4969 hw->mac.collision_delta = er32(COLC);
4970
4971 if ((hw->mac.type != e1000_82574) &&
4972 (hw->mac.type != e1000_82583))
4973 adapter->stats.tncrs += er32(TNCRS);
4974 }
4975 adapter->stats.colc += hw->mac.collision_delta;
4976 }
4977
4978 adapter->stats.xonrxc += er32(XONRXC);
4979 adapter->stats.xontxc += er32(XONTXC);
4980 adapter->stats.xoffrxc += er32(XOFFRXC);
4981 adapter->stats.xofftxc += er32(XOFFTXC);
4982 adapter->stats.gptc += er32(GPTC);
4983 adapter->stats.gotc += er32(GOTCL);
4984 er32(GOTCH); /* Clear gotc */
4985 adapter->stats.rnbc += er32(RNBC);
4986 adapter->stats.ruc += er32(RUC);
4987
4988 adapter->stats.mptc += er32(MPTC);
4989 adapter->stats.bptc += er32(BPTC);
4990
4991 /* used for adaptive IFS */
4992
4993 hw->mac.tx_packet_delta = er32(TPT);
4994 adapter->stats.tpt += hw->mac.tx_packet_delta;
4995
4996 adapter->stats.algnerrc += er32(ALGNERRC);
4997 adapter->stats.rxerrc += er32(RXERRC);
4998 adapter->stats.cexterr += er32(CEXTERR);
4999 adapter->stats.tsctc += er32(TSCTC);
5000 adapter->stats.tsctfc += er32(TSCTFC);
5001
5002 /* Fill out the OS statistics structure */
5003 netdev->stats.multicast = adapter->stats.mprc;
5004 netdev->stats.collisions = adapter->stats.colc;
5005
5006 /* Rx Errors */
5007
5008 /* RLEC on some newer hardware can be incorrect so build
5009 * our own version based on RUC and ROC
5010 */
5011 netdev->stats.rx_errors = adapter->stats.rxerrc +
5012 adapter->stats.crcerrs + adapter->stats.algnerrc +
5013 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5014 netdev->stats.rx_length_errors = adapter->stats.ruc +
5015 adapter->stats.roc;
5016 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
5017 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
5018 netdev->stats.rx_missed_errors = adapter->stats.mpc;
5019
5020 /* Tx Errors */
5021 netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5022 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
5023 netdev->stats.tx_window_errors = adapter->stats.latecol;
5024 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
5025
5026 /* Tx Dropped needs to be maintained elsewhere */
5027
5028 /* Management Stats */
5029 adapter->stats.mgptc += er32(MGTPTC);
5030 adapter->stats.mgprc += er32(MGTPRC);
5031 adapter->stats.mgpdc += er32(MGTPDC);
5032
5033 /* Correctable ECC Errors */
5034 if (hw->mac.type >= e1000_pch_lpt) {
5035 u32 pbeccsts = er32(PBECCSTS);
5036
5037 adapter->corr_errors +=
5038 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
5039 adapter->uncorr_errors +=
5040 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
5041 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
5042 }
5043}
5044
5045/**
5046 * e1000_phy_read_status - Update the PHY register status snapshot
5047 * @adapter: board private structure
5048 **/
5049static void e1000_phy_read_status(struct e1000_adapter *adapter)
5050{
5051 struct e1000_hw *hw = &adapter->hw;
5052 struct e1000_phy_regs *phy = &adapter->phy_regs;
5053
5054 if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
5055 (er32(STATUS) & E1000_STATUS_LU) &&
5056 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
5057 int ret_val;
5058
5059 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
5060 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
5061 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
5062 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
5063 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
5064 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
5065 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
5066 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
5067 if (ret_val)
5068 e_warn("Error reading PHY register\n");
5069 } else {
5070 /* Do not read PHY registers if link is not up
5071 * Set values to typical power-on defaults
5072 */
5073 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
5074 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
5075 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
5076 BMSR_ERCAP);
5077 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
5078 ADVERTISE_ALL | ADVERTISE_CSMA);
5079 phy->lpa = 0;
5080 phy->expansion = EXPANSION_ENABLENPAGE;
5081 phy->ctrl1000 = ADVERTISE_1000FULL;
5082 phy->stat1000 = 0;
5083 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
5084 }
5085}
5086
5087static void e1000_print_link_info(struct e1000_adapter *adapter)
5088{
5089 struct e1000_hw *hw = &adapter->hw;
5090 u32 ctrl = er32(CTRL);
5091
5092 /* Link status message must follow this format for user tools */
5093 netdev_info(adapter->netdev,
5094 "NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
5095 adapter->link_speed,
5096 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
5097 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
5098 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
5099 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
5100}
5101
5102static bool e1000e_has_link(struct e1000_adapter *adapter)
5103{
5104 struct e1000_hw *hw = &adapter->hw;
5105 bool link_active = false;
5106 s32 ret_val = 0;
5107
5108 /* get_link_status is set on LSC (link status) interrupt or
5109 * Rx sequence error interrupt. get_link_status will stay
5110 * true until the check_for_link establishes link
5111 * for copper adapters ONLY
5112 */
5113 switch (hw->phy.media_type) {
5114 case e1000_media_type_copper:
5115 if (hw->mac.get_link_status) {
5116 ret_val = hw->mac.ops.check_for_link(hw);
5117 link_active = !hw->mac.get_link_status;
5118 } else {
5119 link_active = true;
5120 }
5121 break;
5122 case e1000_media_type_fiber:
5123 ret_val = hw->mac.ops.check_for_link(hw);
5124 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5125 break;
5126 case e1000_media_type_internal_serdes:
5127 ret_val = hw->mac.ops.check_for_link(hw);
5128 link_active = hw->mac.serdes_has_link;
5129 break;
5130 default:
5131 case e1000_media_type_unknown:
5132 break;
5133 }
5134
5135 if ((ret_val == -E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5136 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5137 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5138 e_info("Gigabit has been disabled, downgrading speed\n");
5139 }
5140
5141 return link_active;
5142}
5143
5144static void e1000e_enable_receives(struct e1000_adapter *adapter)
5145{
5146 /* make sure the receive unit is started */
5147 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5148 (adapter->flags & FLAG_RESTART_NOW)) {
5149 struct e1000_hw *hw = &adapter->hw;
5150 u32 rctl = er32(RCTL);
5151
5152 ew32(RCTL, rctl | E1000_RCTL_EN);
5153 adapter->flags &= ~FLAG_RESTART_NOW;
5154 }
5155}
5156
5157static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5158{
5159 struct e1000_hw *hw = &adapter->hw;
5160
5161 /* With 82574 controllers, PHY needs to be checked periodically
5162 * for hung state and reset, if two calls return true
5163 */
5164 if (e1000_check_phy_82574(hw))
5165 adapter->phy_hang_count++;
5166 else
5167 adapter->phy_hang_count = 0;
5168
5169 if (adapter->phy_hang_count > 1) {
5170 adapter->phy_hang_count = 0;
5171 e_dbg("PHY appears hung - resetting\n");
5172 schedule_work(&adapter->reset_task);
5173 }
5174}
5175
5176/**
5177 * e1000_watchdog - Timer Call-back
5178 * @t: pointer to timer_list containing private info adapter
5179 **/
5180static void e1000_watchdog(struct timer_list *t)
5181{
5182 struct e1000_adapter *adapter = from_timer(adapter, t, watchdog_timer);
5183
5184 /* Do the rest outside of interrupt context */
5185 schedule_work(&adapter->watchdog_task);
5186
5187 /* TODO: make this use queue_delayed_work() */
5188}
5189
5190static void e1000_watchdog_task(struct work_struct *work)
5191{
5192 struct e1000_adapter *adapter = container_of(work,
5193 struct e1000_adapter,
5194 watchdog_task);
5195 struct net_device *netdev = adapter->netdev;
5196 struct e1000_mac_info *mac = &adapter->hw.mac;
5197 struct e1000_phy_info *phy = &adapter->hw.phy;
5198 struct e1000_ring *tx_ring = adapter->tx_ring;
5199 u32 dmoff_exit_timeout = 100, tries = 0;
5200 struct e1000_hw *hw = &adapter->hw;
5201 u32 link, tctl, pcim_state;
5202
5203 if (test_bit(__E1000_DOWN, &adapter->state))
5204 return;
5205
5206 link = e1000e_has_link(adapter);
5207 if ((netif_carrier_ok(netdev)) && link) {
5208 /* Cancel scheduled suspend requests. */
5209 pm_runtime_resume(netdev->dev.parent);
5210
5211 e1000e_enable_receives(adapter);
5212 goto link_up;
5213 }
5214
5215 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5216 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5217 e1000_update_mng_vlan(adapter);
5218
5219 if (link) {
5220 if (!netif_carrier_ok(netdev)) {
5221 bool txb2b = true;
5222
5223 /* Cancel scheduled suspend requests. */
5224 pm_runtime_resume(netdev->dev.parent);
5225
5226 /* Checking if MAC is in DMoff state*/
5227 if (er32(FWSM) & E1000_ICH_FWSM_FW_VALID) {
5228 pcim_state = er32(STATUS);
5229 while (pcim_state & E1000_STATUS_PCIM_STATE) {
5230 if (tries++ == dmoff_exit_timeout) {
5231 e_dbg("Error in exiting dmoff\n");
5232 break;
5233 }
5234 usleep_range(10000, 20000);
5235 pcim_state = er32(STATUS);
5236
5237 /* Checking if MAC exited DMoff state */
5238 if (!(pcim_state & E1000_STATUS_PCIM_STATE))
5239 e1000_phy_hw_reset(&adapter->hw);
5240 }
5241 }
5242
5243 /* update snapshot of PHY registers on LSC */
5244 e1000_phy_read_status(adapter);
5245 mac->ops.get_link_up_info(&adapter->hw,
5246 &adapter->link_speed,
5247 &adapter->link_duplex);
5248 e1000_print_link_info(adapter);
5249
5250 /* check if SmartSpeed worked */
5251 e1000e_check_downshift(hw);
5252 if (phy->speed_downgraded)
5253 netdev_warn(netdev,
5254 "Link Speed was downgraded by SmartSpeed\n");
5255
5256 /* On supported PHYs, check for duplex mismatch only
5257 * if link has autonegotiated at 10/100 half
5258 */
5259 if ((hw->phy.type == e1000_phy_igp_3 ||
5260 hw->phy.type == e1000_phy_bm) &&
5261 hw->mac.autoneg &&
5262 (adapter->link_speed == SPEED_10 ||
5263 adapter->link_speed == SPEED_100) &&
5264 (adapter->link_duplex == HALF_DUPLEX)) {
5265 u16 autoneg_exp;
5266
5267 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5268
5269 if (!(autoneg_exp & EXPANSION_NWAY))
5270 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
5271 }
5272
5273 /* adjust timeout factor according to speed/duplex */
5274 adapter->tx_timeout_factor = 1;
5275 switch (adapter->link_speed) {
5276 case SPEED_10:
5277 txb2b = false;
5278 adapter->tx_timeout_factor = 16;
5279 break;
5280 case SPEED_100:
5281 txb2b = false;
5282 adapter->tx_timeout_factor = 10;
5283 break;
5284 }
5285
5286 /* workaround: re-program speed mode bit after
5287 * link-up event
5288 */
5289 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5290 !txb2b) {
5291 u32 tarc0;
5292
5293 tarc0 = er32(TARC(0));
5294 tarc0 &= ~SPEED_MODE_BIT;
5295 ew32(TARC(0), tarc0);
5296 }
5297
5298 /* disable TSO for pcie and 10/100 speeds, to avoid
5299 * some hardware issues
5300 */
5301 if (!(adapter->flags & FLAG_TSO_FORCE)) {
5302 switch (adapter->link_speed) {
5303 case SPEED_10:
5304 case SPEED_100:
5305 e_info("10/100 speed: disabling TSO\n");
5306 netdev->features &= ~NETIF_F_TSO;
5307 netdev->features &= ~NETIF_F_TSO6;
5308 break;
5309 case SPEED_1000:
5310 netdev->features |= NETIF_F_TSO;
5311 netdev->features |= NETIF_F_TSO6;
5312 break;
5313 default:
5314 /* oops */
5315 break;
5316 }
5317 if (hw->mac.type == e1000_pch_spt) {
5318 netdev->features &= ~NETIF_F_TSO;
5319 netdev->features &= ~NETIF_F_TSO6;
5320 }
5321 }
5322
5323 /* enable transmits in the hardware, need to do this
5324 * after setting TARC(0)
5325 */
5326 tctl = er32(TCTL);
5327 tctl |= E1000_TCTL_EN;
5328 ew32(TCTL, tctl);
5329
5330 /* Perform any post-link-up configuration before
5331 * reporting link up.
5332 */
5333 if (phy->ops.cfg_on_link_up)
5334 phy->ops.cfg_on_link_up(hw);
5335
5336 netif_wake_queue(netdev);
5337 netif_carrier_on(netdev);
5338
5339 if (!test_bit(__E1000_DOWN, &adapter->state))
5340 mod_timer(&adapter->phy_info_timer,
5341 round_jiffies(jiffies + 2 * HZ));
5342 }
5343 } else {
5344 if (netif_carrier_ok(netdev)) {
5345 adapter->link_speed = 0;
5346 adapter->link_duplex = 0;
5347 /* Link status message must follow this format */
5348 netdev_info(netdev, "NIC Link is Down\n");
5349 netif_carrier_off(netdev);
5350 netif_stop_queue(netdev);
5351 if (!test_bit(__E1000_DOWN, &adapter->state))
5352 mod_timer(&adapter->phy_info_timer,
5353 round_jiffies(jiffies + 2 * HZ));
5354
5355 /* 8000ES2LAN requires a Rx packet buffer work-around
5356 * on link down event; reset the controller to flush
5357 * the Rx packet buffer.
5358 */
5359 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5360 adapter->flags |= FLAG_RESTART_NOW;
5361 else
5362 pm_schedule_suspend(netdev->dev.parent,
5363 LINK_TIMEOUT);
5364 }
5365 }
5366
5367link_up:
5368 spin_lock(&adapter->stats64_lock);
5369 e1000e_update_stats(adapter);
5370
5371 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5372 adapter->tpt_old = adapter->stats.tpt;
5373 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5374 adapter->colc_old = adapter->stats.colc;
5375
5376 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5377 adapter->gorc_old = adapter->stats.gorc;
5378 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5379 adapter->gotc_old = adapter->stats.gotc;
5380 spin_unlock(&adapter->stats64_lock);
5381
5382 /* If the link is lost the controller stops DMA, but
5383 * if there is queued Tx work it cannot be done. So
5384 * reset the controller to flush the Tx packet buffers.
5385 */
5386 if (!netif_carrier_ok(netdev) &&
5387 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5388 adapter->flags |= FLAG_RESTART_NOW;
5389
5390 /* If reset is necessary, do it outside of interrupt context. */
5391 if (adapter->flags & FLAG_RESTART_NOW) {
5392 schedule_work(&adapter->reset_task);
5393 /* return immediately since reset is imminent */
5394 return;
5395 }
5396
5397 e1000e_update_adaptive(&adapter->hw);
5398
5399 /* Simple mode for Interrupt Throttle Rate (ITR) */
5400 if (adapter->itr_setting == 4) {
5401 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5402 * Total asymmetrical Tx or Rx gets ITR=8000;
5403 * everyone else is between 2000-8000.
5404 */
5405 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5406 u32 dif = (adapter->gotc > adapter->gorc ?
5407 adapter->gotc - adapter->gorc :
5408 adapter->gorc - adapter->gotc) / 10000;
5409 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5410
5411 e1000e_write_itr(adapter, itr);
5412 }
5413
5414 /* Cause software interrupt to ensure Rx ring is cleaned */
5415 if (adapter->msix_entries)
5416 ew32(ICS, adapter->rx_ring->ims_val);
5417 else
5418 ew32(ICS, E1000_ICS_RXDMT0);
5419
5420 /* flush pending descriptors to memory before detecting Tx hang */
5421 e1000e_flush_descriptors(adapter);
5422
5423 /* Force detection of hung controller every watchdog period */
5424 adapter->detect_tx_hung = true;
5425
5426 /* With 82571 controllers, LAA may be overwritten due to controller
5427 * reset from the other port. Set the appropriate LAA in RAR[0]
5428 */
5429 if (e1000e_get_laa_state_82571(hw))
5430 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5431
5432 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5433 e1000e_check_82574_phy_workaround(adapter);
5434
5435 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5436 if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5437 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5438 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5439 er32(RXSTMPH);
5440 adapter->rx_hwtstamp_cleared++;
5441 } else {
5442 adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5443 }
5444 }
5445
5446 /* Reset the timer */
5447 if (!test_bit(__E1000_DOWN, &adapter->state))
5448 mod_timer(&adapter->watchdog_timer,
5449 round_jiffies(jiffies + 2 * HZ));
5450}
5451
5452#define E1000_TX_FLAGS_CSUM 0x00000001
5453#define E1000_TX_FLAGS_VLAN 0x00000002
5454#define E1000_TX_FLAGS_TSO 0x00000004
5455#define E1000_TX_FLAGS_IPV4 0x00000008
5456#define E1000_TX_FLAGS_NO_FCS 0x00000010
5457#define E1000_TX_FLAGS_HWTSTAMP 0x00000020
5458#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
5459#define E1000_TX_FLAGS_VLAN_SHIFT 16
5460
5461static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5462 __be16 protocol)
5463{
5464 struct e1000_context_desc *context_desc;
5465 struct e1000_buffer *buffer_info;
5466 unsigned int i;
5467 u32 cmd_length = 0;
5468 u16 ipcse = 0, mss;
5469 u8 ipcss, ipcso, tucss, tucso, hdr_len;
5470 int err;
5471
5472 if (!skb_is_gso(skb))
5473 return 0;
5474
5475 err = skb_cow_head(skb, 0);
5476 if (err < 0)
5477 return err;
5478
5479 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5480 mss = skb_shinfo(skb)->gso_size;
5481 if (protocol == htons(ETH_P_IP)) {
5482 struct iphdr *iph = ip_hdr(skb);
5483 iph->tot_len = 0;
5484 iph->check = 0;
5485 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5486 0, IPPROTO_TCP, 0);
5487 cmd_length = E1000_TXD_CMD_IP;
5488 ipcse = skb_transport_offset(skb) - 1;
5489 } else if (skb_is_gso_v6(skb)) {
5490 tcp_v6_gso_csum_prep(skb);
5491 ipcse = 0;
5492 }
5493 ipcss = skb_network_offset(skb);
5494 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5495 tucss = skb_transport_offset(skb);
5496 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5497
5498 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5499 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5500
5501 i = tx_ring->next_to_use;
5502 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5503 buffer_info = &tx_ring->buffer_info[i];
5504
5505 context_desc->lower_setup.ip_fields.ipcss = ipcss;
5506 context_desc->lower_setup.ip_fields.ipcso = ipcso;
5507 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5508 context_desc->upper_setup.tcp_fields.tucss = tucss;
5509 context_desc->upper_setup.tcp_fields.tucso = tucso;
5510 context_desc->upper_setup.tcp_fields.tucse = 0;
5511 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5512 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5513 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5514
5515 buffer_info->time_stamp = jiffies;
5516 buffer_info->next_to_watch = i;
5517
5518 i++;
5519 if (i == tx_ring->count)
5520 i = 0;
5521 tx_ring->next_to_use = i;
5522
5523 return 1;
5524}
5525
5526static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5527 __be16 protocol)
5528{
5529 struct e1000_adapter *adapter = tx_ring->adapter;
5530 struct e1000_context_desc *context_desc;
5531 struct e1000_buffer *buffer_info;
5532 unsigned int i;
5533 u8 css;
5534 u32 cmd_len = E1000_TXD_CMD_DEXT;
5535
5536 if (skb->ip_summed != CHECKSUM_PARTIAL)
5537 return false;
5538
5539 switch (protocol) {
5540 case cpu_to_be16(ETH_P_IP):
5541 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5542 cmd_len |= E1000_TXD_CMD_TCP;
5543 break;
5544 case cpu_to_be16(ETH_P_IPV6):
5545 /* XXX not handling all IPV6 headers */
5546 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5547 cmd_len |= E1000_TXD_CMD_TCP;
5548 break;
5549 default:
5550 if (unlikely(net_ratelimit()))
5551 e_warn("checksum_partial proto=%x!\n",
5552 be16_to_cpu(protocol));
5553 break;
5554 }
5555
5556 css = skb_checksum_start_offset(skb);
5557
5558 i = tx_ring->next_to_use;
5559 buffer_info = &tx_ring->buffer_info[i];
5560 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5561
5562 context_desc->lower_setup.ip_config = 0;
5563 context_desc->upper_setup.tcp_fields.tucss = css;
5564 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5565 context_desc->upper_setup.tcp_fields.tucse = 0;
5566 context_desc->tcp_seg_setup.data = 0;
5567 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5568
5569 buffer_info->time_stamp = jiffies;
5570 buffer_info->next_to_watch = i;
5571
5572 i++;
5573 if (i == tx_ring->count)
5574 i = 0;
5575 tx_ring->next_to_use = i;
5576
5577 return true;
5578}
5579
5580static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5581 unsigned int first, unsigned int max_per_txd,
5582 unsigned int nr_frags)
5583{
5584 struct e1000_adapter *adapter = tx_ring->adapter;
5585 struct pci_dev *pdev = adapter->pdev;
5586 struct e1000_buffer *buffer_info;
5587 unsigned int len = skb_headlen(skb);
5588 unsigned int offset = 0, size, count = 0, i;
5589 unsigned int f, bytecount, segs;
5590
5591 i = tx_ring->next_to_use;
5592
5593 while (len) {
5594 buffer_info = &tx_ring->buffer_info[i];
5595 size = min(len, max_per_txd);
5596
5597 buffer_info->length = size;
5598 buffer_info->time_stamp = jiffies;
5599 buffer_info->next_to_watch = i;
5600 buffer_info->dma = dma_map_single(&pdev->dev,
5601 skb->data + offset,
5602 size, DMA_TO_DEVICE);
5603 buffer_info->mapped_as_page = false;
5604 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5605 goto dma_error;
5606
5607 len -= size;
5608 offset += size;
5609 count++;
5610
5611 if (len) {
5612 i++;
5613 if (i == tx_ring->count)
5614 i = 0;
5615 }
5616 }
5617
5618 for (f = 0; f < nr_frags; f++) {
5619 const skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
5620
5621 len = skb_frag_size(frag);
5622 offset = 0;
5623
5624 while (len) {
5625 i++;
5626 if (i == tx_ring->count)
5627 i = 0;
5628
5629 buffer_info = &tx_ring->buffer_info[i];
5630 size = min(len, max_per_txd);
5631
5632 buffer_info->length = size;
5633 buffer_info->time_stamp = jiffies;
5634 buffer_info->next_to_watch = i;
5635 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5636 offset, size,
5637 DMA_TO_DEVICE);
5638 buffer_info->mapped_as_page = true;
5639 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5640 goto dma_error;
5641
5642 len -= size;
5643 offset += size;
5644 count++;
5645 }
5646 }
5647
5648 segs = skb_shinfo(skb)->gso_segs ? : 1;
5649 /* multiply data chunks by size of headers */
5650 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5651
5652 tx_ring->buffer_info[i].skb = skb;
5653 tx_ring->buffer_info[i].segs = segs;
5654 tx_ring->buffer_info[i].bytecount = bytecount;
5655 tx_ring->buffer_info[first].next_to_watch = i;
5656
5657 return count;
5658
5659dma_error:
5660 dev_err(&pdev->dev, "Tx DMA map failed\n");
5661 buffer_info->dma = 0;
5662 if (count)
5663 count--;
5664
5665 while (count--) {
5666 if (i == 0)
5667 i += tx_ring->count;
5668 i--;
5669 buffer_info = &tx_ring->buffer_info[i];
5670 e1000_put_txbuf(tx_ring, buffer_info, true);
5671 }
5672
5673 return 0;
5674}
5675
5676static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5677{
5678 struct e1000_adapter *adapter = tx_ring->adapter;
5679 struct e1000_tx_desc *tx_desc = NULL;
5680 struct e1000_buffer *buffer_info;
5681 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5682 unsigned int i;
5683
5684 if (tx_flags & E1000_TX_FLAGS_TSO) {
5685 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5686 E1000_TXD_CMD_TSE;
5687 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5688
5689 if (tx_flags & E1000_TX_FLAGS_IPV4)
5690 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5691 }
5692
5693 if (tx_flags & E1000_TX_FLAGS_CSUM) {
5694 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5695 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5696 }
5697
5698 if (tx_flags & E1000_TX_FLAGS_VLAN) {
5699 txd_lower |= E1000_TXD_CMD_VLE;
5700 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5701 }
5702
5703 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5704 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5705
5706 if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5707 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5708 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5709 }
5710
5711 i = tx_ring->next_to_use;
5712
5713 do {
5714 buffer_info = &tx_ring->buffer_info[i];
5715 tx_desc = E1000_TX_DESC(*tx_ring, i);
5716 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5717 tx_desc->lower.data = cpu_to_le32(txd_lower |
5718 buffer_info->length);
5719 tx_desc->upper.data = cpu_to_le32(txd_upper);
5720
5721 i++;
5722 if (i == tx_ring->count)
5723 i = 0;
5724 } while (--count > 0);
5725
5726 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5727
5728 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5729 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5730 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5731
5732 /* Force memory writes to complete before letting h/w
5733 * know there are new descriptors to fetch. (Only
5734 * applicable for weak-ordered memory model archs,
5735 * such as IA-64).
5736 */
5737 wmb();
5738
5739 tx_ring->next_to_use = i;
5740}
5741
5742#define MINIMUM_DHCP_PACKET_SIZE 282
5743static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5744 struct sk_buff *skb)
5745{
5746 struct e1000_hw *hw = &adapter->hw;
5747 u16 length, offset;
5748
5749 if (skb_vlan_tag_present(skb) &&
5750 !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5751 (adapter->hw.mng_cookie.status &
5752 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5753 return 0;
5754
5755 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5756 return 0;
5757
5758 if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5759 return 0;
5760
5761 {
5762 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5763 struct udphdr *udp;
5764
5765 if (ip->protocol != IPPROTO_UDP)
5766 return 0;
5767
5768 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5769 if (ntohs(udp->dest) != 67)
5770 return 0;
5771
5772 offset = (u8 *)udp + 8 - skb->data;
5773 length = skb->len - offset;
5774 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5775 }
5776
5777 return 0;
5778}
5779
5780static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5781{
5782 struct e1000_adapter *adapter = tx_ring->adapter;
5783
5784 netif_stop_queue(adapter->netdev);
5785 /* Herbert's original patch had:
5786 * smp_mb__after_netif_stop_queue();
5787 * but since that doesn't exist yet, just open code it.
5788 */
5789 smp_mb();
5790
5791 /* We need to check again in a case another CPU has just
5792 * made room available.
5793 */
5794 if (e1000_desc_unused(tx_ring) < size)
5795 return -EBUSY;
5796
5797 /* A reprieve! */
5798 netif_start_queue(adapter->netdev);
5799 ++adapter->restart_queue;
5800 return 0;
5801}
5802
5803static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5804{
5805 BUG_ON(size > tx_ring->count);
5806
5807 if (e1000_desc_unused(tx_ring) >= size)
5808 return 0;
5809 return __e1000_maybe_stop_tx(tx_ring, size);
5810}
5811
5812static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5813 struct net_device *netdev)
5814{
5815 struct e1000_adapter *adapter = netdev_priv(netdev);
5816 struct e1000_ring *tx_ring = adapter->tx_ring;
5817 unsigned int first;
5818 unsigned int tx_flags = 0;
5819 unsigned int len = skb_headlen(skb);
5820 unsigned int nr_frags;
5821 unsigned int mss;
5822 int count = 0;
5823 int tso;
5824 unsigned int f;
5825 __be16 protocol = vlan_get_protocol(skb);
5826
5827 if (test_bit(__E1000_DOWN, &adapter->state)) {
5828 dev_kfree_skb_any(skb);
5829 return NETDEV_TX_OK;
5830 }
5831
5832 if (skb->len <= 0) {
5833 dev_kfree_skb_any(skb);
5834 return NETDEV_TX_OK;
5835 }
5836
5837 /* The minimum packet size with TCTL.PSP set is 17 bytes so
5838 * pad skb in order to meet this minimum size requirement
5839 */
5840 if (skb_put_padto(skb, 17))
5841 return NETDEV_TX_OK;
5842
5843 mss = skb_shinfo(skb)->gso_size;
5844 if (mss) {
5845 u8 hdr_len;
5846
5847 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5848 * points to just header, pull a few bytes of payload from
5849 * frags into skb->data
5850 */
5851 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5852 /* we do this workaround for ES2LAN, but it is un-necessary,
5853 * avoiding it could save a lot of cycles
5854 */
5855 if (skb->data_len && (hdr_len == len)) {
5856 unsigned int pull_size;
5857
5858 pull_size = min_t(unsigned int, 4, skb->data_len);
5859 if (!__pskb_pull_tail(skb, pull_size)) {
5860 e_err("__pskb_pull_tail failed.\n");
5861 dev_kfree_skb_any(skb);
5862 return NETDEV_TX_OK;
5863 }
5864 len = skb_headlen(skb);
5865 }
5866 }
5867
5868 /* reserve a descriptor for the offload context */
5869 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5870 count++;
5871 count++;
5872
5873 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5874
5875 nr_frags = skb_shinfo(skb)->nr_frags;
5876 for (f = 0; f < nr_frags; f++)
5877 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5878 adapter->tx_fifo_limit);
5879
5880 if (adapter->hw.mac.tx_pkt_filtering)
5881 e1000_transfer_dhcp_info(adapter, skb);
5882
5883 /* need: count + 2 desc gap to keep tail from touching
5884 * head, otherwise try next time
5885 */
5886 if (e1000_maybe_stop_tx(tx_ring, count + 2))
5887 return NETDEV_TX_BUSY;
5888
5889 if (skb_vlan_tag_present(skb)) {
5890 tx_flags |= E1000_TX_FLAGS_VLAN;
5891 tx_flags |= (skb_vlan_tag_get(skb) <<
5892 E1000_TX_FLAGS_VLAN_SHIFT);
5893 }
5894
5895 first = tx_ring->next_to_use;
5896
5897 tso = e1000_tso(tx_ring, skb, protocol);
5898 if (tso < 0) {
5899 dev_kfree_skb_any(skb);
5900 return NETDEV_TX_OK;
5901 }
5902
5903 if (tso)
5904 tx_flags |= E1000_TX_FLAGS_TSO;
5905 else if (e1000_tx_csum(tx_ring, skb, protocol))
5906 tx_flags |= E1000_TX_FLAGS_CSUM;
5907
5908 /* Old method was to assume IPv4 packet by default if TSO was enabled.
5909 * 82571 hardware supports TSO capabilities for IPv6 as well...
5910 * no longer assume, we must.
5911 */
5912 if (protocol == htons(ETH_P_IP))
5913 tx_flags |= E1000_TX_FLAGS_IPV4;
5914
5915 if (unlikely(skb->no_fcs))
5916 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5917
5918 /* if count is 0 then mapping error has occurred */
5919 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5920 nr_frags);
5921 if (count) {
5922 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5923 (adapter->flags & FLAG_HAS_HW_TIMESTAMP)) {
5924 if (!adapter->tx_hwtstamp_skb) {
5925 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5926 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5927 adapter->tx_hwtstamp_skb = skb_get(skb);
5928 adapter->tx_hwtstamp_start = jiffies;
5929 schedule_work(&adapter->tx_hwtstamp_work);
5930 } else {
5931 adapter->tx_hwtstamp_skipped++;
5932 }
5933 }
5934
5935 skb_tx_timestamp(skb);
5936
5937 netdev_sent_queue(netdev, skb->len);
5938 e1000_tx_queue(tx_ring, tx_flags, count);
5939 /* Make sure there is space in the ring for the next send. */
5940 e1000_maybe_stop_tx(tx_ring,
5941 (MAX_SKB_FRAGS *
5942 DIV_ROUND_UP(PAGE_SIZE,
5943 adapter->tx_fifo_limit) + 2));
5944
5945 if (!netdev_xmit_more() ||
5946 netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5947 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5948 e1000e_update_tdt_wa(tx_ring,
5949 tx_ring->next_to_use);
5950 else
5951 writel(tx_ring->next_to_use, tx_ring->tail);
5952 }
5953 } else {
5954 dev_kfree_skb_any(skb);
5955 tx_ring->buffer_info[first].time_stamp = 0;
5956 tx_ring->next_to_use = first;
5957 }
5958
5959 return NETDEV_TX_OK;
5960}
5961
5962/**
5963 * e1000_tx_timeout - Respond to a Tx Hang
5964 * @netdev: network interface device structure
5965 * @txqueue: index of the hung queue (unused)
5966 **/
5967static void e1000_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
5968{
5969 struct e1000_adapter *adapter = netdev_priv(netdev);
5970
5971 /* Do the reset outside of interrupt context */
5972 adapter->tx_timeout_count++;
5973 schedule_work(&adapter->reset_task);
5974}
5975
5976static void e1000_reset_task(struct work_struct *work)
5977{
5978 struct e1000_adapter *adapter;
5979 adapter = container_of(work, struct e1000_adapter, reset_task);
5980
5981 rtnl_lock();
5982 /* don't run the task if already down */
5983 if (test_bit(__E1000_DOWN, &adapter->state)) {
5984 rtnl_unlock();
5985 return;
5986 }
5987
5988 if (!(adapter->flags & FLAG_RESTART_NOW)) {
5989 e1000e_dump(adapter);
5990 e_err("Reset adapter unexpectedly\n");
5991 }
5992 e1000e_reinit_locked(adapter);
5993 rtnl_unlock();
5994}
5995
5996/**
5997 * e1000e_get_stats64 - Get System Network Statistics
5998 * @netdev: network interface device structure
5999 * @stats: rtnl_link_stats64 pointer
6000 *
6001 * Returns the address of the device statistics structure.
6002 **/
6003void e1000e_get_stats64(struct net_device *netdev,
6004 struct rtnl_link_stats64 *stats)
6005{
6006 struct e1000_adapter *adapter = netdev_priv(netdev);
6007
6008 spin_lock(&adapter->stats64_lock);
6009 e1000e_update_stats(adapter);
6010 /* Fill out the OS statistics structure */
6011 stats->rx_bytes = adapter->stats.gorc;
6012 stats->rx_packets = adapter->stats.gprc;
6013 stats->tx_bytes = adapter->stats.gotc;
6014 stats->tx_packets = adapter->stats.gptc;
6015 stats->multicast = adapter->stats.mprc;
6016 stats->collisions = adapter->stats.colc;
6017
6018 /* Rx Errors */
6019
6020 /* RLEC on some newer hardware can be incorrect so build
6021 * our own version based on RUC and ROC
6022 */
6023 stats->rx_errors = adapter->stats.rxerrc +
6024 adapter->stats.crcerrs + adapter->stats.algnerrc +
6025 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
6026 stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
6027 stats->rx_crc_errors = adapter->stats.crcerrs;
6028 stats->rx_frame_errors = adapter->stats.algnerrc;
6029 stats->rx_missed_errors = adapter->stats.mpc;
6030
6031 /* Tx Errors */
6032 stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
6033 stats->tx_aborted_errors = adapter->stats.ecol;
6034 stats->tx_window_errors = adapter->stats.latecol;
6035 stats->tx_carrier_errors = adapter->stats.tncrs;
6036
6037 /* Tx Dropped needs to be maintained elsewhere */
6038
6039 spin_unlock(&adapter->stats64_lock);
6040}
6041
6042/**
6043 * e1000_change_mtu - Change the Maximum Transfer Unit
6044 * @netdev: network interface device structure
6045 * @new_mtu: new value for maximum frame size
6046 *
6047 * Returns 0 on success, negative on failure
6048 **/
6049static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
6050{
6051 struct e1000_adapter *adapter = netdev_priv(netdev);
6052 int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
6053
6054 /* Jumbo frame support */
6055 if ((new_mtu > ETH_DATA_LEN) &&
6056 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
6057 e_err("Jumbo Frames not supported.\n");
6058 return -EINVAL;
6059 }
6060
6061 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6062 if ((adapter->hw.mac.type >= e1000_pch2lan) &&
6063 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
6064 (new_mtu > ETH_DATA_LEN)) {
6065 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
6066 return -EINVAL;
6067 }
6068
6069 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
6070 usleep_range(1000, 1100);
6071 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
6072 adapter->max_frame_size = max_frame;
6073 netdev_dbg(netdev, "changing MTU from %d to %d\n",
6074 netdev->mtu, new_mtu);
6075 netdev->mtu = new_mtu;
6076
6077 pm_runtime_get_sync(netdev->dev.parent);
6078
6079 if (netif_running(netdev))
6080 e1000e_down(adapter, true);
6081
6082 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
6083 * means we reserve 2 more, this pushes us to allocate from the next
6084 * larger slab size.
6085 * i.e. RXBUFFER_2048 --> size-4096 slab
6086 * However with the new *_jumbo_rx* routines, jumbo receives will use
6087 * fragmented skbs
6088 */
6089
6090 if (max_frame <= 2048)
6091 adapter->rx_buffer_len = 2048;
6092 else
6093 adapter->rx_buffer_len = 4096;
6094
6095 /* adjust allocation if LPE protects us, and we aren't using SBP */
6096 if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
6097 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
6098
6099 if (netif_running(netdev))
6100 e1000e_up(adapter);
6101 else
6102 e1000e_reset(adapter);
6103
6104 pm_runtime_put_sync(netdev->dev.parent);
6105
6106 clear_bit(__E1000_RESETTING, &adapter->state);
6107
6108 return 0;
6109}
6110
6111static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
6112 int cmd)
6113{
6114 struct e1000_adapter *adapter = netdev_priv(netdev);
6115 struct mii_ioctl_data *data = if_mii(ifr);
6116
6117 if (adapter->hw.phy.media_type != e1000_media_type_copper)
6118 return -EOPNOTSUPP;
6119
6120 switch (cmd) {
6121 case SIOCGMIIPHY:
6122 data->phy_id = adapter->hw.phy.addr;
6123 break;
6124 case SIOCGMIIREG:
6125 e1000_phy_read_status(adapter);
6126
6127 switch (data->reg_num & 0x1F) {
6128 case MII_BMCR:
6129 data->val_out = adapter->phy_regs.bmcr;
6130 break;
6131 case MII_BMSR:
6132 data->val_out = adapter->phy_regs.bmsr;
6133 break;
6134 case MII_PHYSID1:
6135 data->val_out = (adapter->hw.phy.id >> 16);
6136 break;
6137 case MII_PHYSID2:
6138 data->val_out = (adapter->hw.phy.id & 0xFFFF);
6139 break;
6140 case MII_ADVERTISE:
6141 data->val_out = adapter->phy_regs.advertise;
6142 break;
6143 case MII_LPA:
6144 data->val_out = adapter->phy_regs.lpa;
6145 break;
6146 case MII_EXPANSION:
6147 data->val_out = adapter->phy_regs.expansion;
6148 break;
6149 case MII_CTRL1000:
6150 data->val_out = adapter->phy_regs.ctrl1000;
6151 break;
6152 case MII_STAT1000:
6153 data->val_out = adapter->phy_regs.stat1000;
6154 break;
6155 case MII_ESTATUS:
6156 data->val_out = adapter->phy_regs.estatus;
6157 break;
6158 default:
6159 return -EIO;
6160 }
6161 break;
6162 case SIOCSMIIREG:
6163 default:
6164 return -EOPNOTSUPP;
6165 }
6166 return 0;
6167}
6168
6169/**
6170 * e1000e_hwtstamp_set - control hardware time stamping
6171 * @netdev: network interface device structure
6172 * @ifr: interface request
6173 *
6174 * Outgoing time stamping can be enabled and disabled. Play nice and
6175 * disable it when requested, although it shouldn't cause any overhead
6176 * when no packet needs it. At most one packet in the queue may be
6177 * marked for time stamping, otherwise it would be impossible to tell
6178 * for sure to which packet the hardware time stamp belongs.
6179 *
6180 * Incoming time stamping has to be configured via the hardware filters.
6181 * Not all combinations are supported, in particular event type has to be
6182 * specified. Matching the kind of event packet is not supported, with the
6183 * exception of "all V2 events regardless of level 2 or 4".
6184 **/
6185static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6186{
6187 struct e1000_adapter *adapter = netdev_priv(netdev);
6188 struct hwtstamp_config config;
6189 int ret_val;
6190
6191 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6192 return -EFAULT;
6193
6194 ret_val = e1000e_config_hwtstamp(adapter, &config);
6195 if (ret_val)
6196 return ret_val;
6197
6198 switch (config.rx_filter) {
6199 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6200 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6201 case HWTSTAMP_FILTER_PTP_V2_SYNC:
6202 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6203 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6204 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6205 /* With V2 type filters which specify a Sync or Delay Request,
6206 * Path Delay Request/Response messages are also time stamped
6207 * by hardware so notify the caller the requested packets plus
6208 * some others are time stamped.
6209 */
6210 config.rx_filter = HWTSTAMP_FILTER_SOME;
6211 break;
6212 default:
6213 break;
6214 }
6215
6216 return copy_to_user(ifr->ifr_data, &config,
6217 sizeof(config)) ? -EFAULT : 0;
6218}
6219
6220static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6221{
6222 struct e1000_adapter *adapter = netdev_priv(netdev);
6223
6224 return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6225 sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6226}
6227
6228static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6229{
6230 switch (cmd) {
6231 case SIOCGMIIPHY:
6232 case SIOCGMIIREG:
6233 case SIOCSMIIREG:
6234 return e1000_mii_ioctl(netdev, ifr, cmd);
6235 case SIOCSHWTSTAMP:
6236 return e1000e_hwtstamp_set(netdev, ifr);
6237 case SIOCGHWTSTAMP:
6238 return e1000e_hwtstamp_get(netdev, ifr);
6239 default:
6240 return -EOPNOTSUPP;
6241 }
6242}
6243
6244static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6245{
6246 struct e1000_hw *hw = &adapter->hw;
6247 u32 i, mac_reg, wuc;
6248 u16 phy_reg, wuc_enable;
6249 int retval;
6250
6251 /* copy MAC RARs to PHY RARs */
6252 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6253
6254 retval = hw->phy.ops.acquire(hw);
6255 if (retval) {
6256 e_err("Could not acquire PHY\n");
6257 return retval;
6258 }
6259
6260 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6261 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6262 if (retval)
6263 goto release;
6264
6265 /* copy MAC MTA to PHY MTA - only needed for pchlan */
6266 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6267 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6268 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6269 (u16)(mac_reg & 0xFFFF));
6270 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6271 (u16)((mac_reg >> 16) & 0xFFFF));
6272 }
6273
6274 /* configure PHY Rx Control register */
6275 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6276 mac_reg = er32(RCTL);
6277 if (mac_reg & E1000_RCTL_UPE)
6278 phy_reg |= BM_RCTL_UPE;
6279 if (mac_reg & E1000_RCTL_MPE)
6280 phy_reg |= BM_RCTL_MPE;
6281 phy_reg &= ~(BM_RCTL_MO_MASK);
6282 if (mac_reg & E1000_RCTL_MO_3)
6283 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6284 << BM_RCTL_MO_SHIFT);
6285 if (mac_reg & E1000_RCTL_BAM)
6286 phy_reg |= BM_RCTL_BAM;
6287 if (mac_reg & E1000_RCTL_PMCF)
6288 phy_reg |= BM_RCTL_PMCF;
6289 mac_reg = er32(CTRL);
6290 if (mac_reg & E1000_CTRL_RFCE)
6291 phy_reg |= BM_RCTL_RFCE;
6292 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6293
6294 wuc = E1000_WUC_PME_EN;
6295 if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6296 wuc |= E1000_WUC_APME;
6297
6298 /* enable PHY wakeup in MAC register */
6299 ew32(WUFC, wufc);
6300 ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6301 E1000_WUC_PME_STATUS | wuc));
6302
6303 /* configure and enable PHY wakeup in PHY registers */
6304 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6305 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6306
6307 /* activate PHY wakeup */
6308 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6309 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6310 if (retval)
6311 e_err("Could not set PHY Host Wakeup bit\n");
6312release:
6313 hw->phy.ops.release(hw);
6314
6315 return retval;
6316}
6317
6318static void e1000e_flush_lpic(struct pci_dev *pdev)
6319{
6320 struct net_device *netdev = pci_get_drvdata(pdev);
6321 struct e1000_adapter *adapter = netdev_priv(netdev);
6322 struct e1000_hw *hw = &adapter->hw;
6323 u32 ret_val;
6324
6325 pm_runtime_get_sync(netdev->dev.parent);
6326
6327 ret_val = hw->phy.ops.acquire(hw);
6328 if (ret_val)
6329 goto fl_out;
6330
6331 pr_info("EEE TX LPI TIMER: %08X\n",
6332 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6333
6334 hw->phy.ops.release(hw);
6335
6336fl_out:
6337 pm_runtime_put_sync(netdev->dev.parent);
6338}
6339
6340/* S0ix implementation */
6341static void e1000e_s0ix_entry_flow(struct e1000_adapter *adapter)
6342{
6343 struct e1000_hw *hw = &adapter->hw;
6344 u32 mac_data;
6345 u16 phy_data;
6346
6347 /* Disable the periodic inband message,
6348 * don't request PCIe clock in K1 page770_17[10:9] = 10b
6349 */
6350 e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6351 phy_data &= ~HV_PM_CTRL_K1_CLK_REQ;
6352 phy_data |= BIT(10);
6353 e1e_wphy(hw, HV_PM_CTRL, phy_data);
6354
6355 /* Make sure we don't exit K1 every time a new packet arrives
6356 * 772_29[5] = 1 CS_Mode_Stay_In_K1
6357 */
6358 e1e_rphy(hw, I217_CGFREG, &phy_data);
6359 phy_data |= BIT(5);
6360 e1e_wphy(hw, I217_CGFREG, phy_data);
6361
6362 /* Change the MAC/PHY interface to SMBus
6363 * Force the SMBus in PHY page769_23[0] = 1
6364 * Force the SMBus in MAC CTRL_EXT[11] = 1
6365 */
6366 e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6367 phy_data |= CV_SMB_CTRL_FORCE_SMBUS;
6368 e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6369 mac_data = er32(CTRL_EXT);
6370 mac_data |= E1000_CTRL_EXT_FORCE_SMBUS;
6371 ew32(CTRL_EXT, mac_data);
6372
6373 /* DFT control: PHY bit: page769_20[0] = 1
6374 * Gate PPW via EXTCNF_CTRL - set 0x0F00[7] = 1
6375 */
6376 e1e_rphy(hw, I82579_DFT_CTRL, &phy_data);
6377 phy_data |= BIT(0);
6378 e1e_wphy(hw, I82579_DFT_CTRL, phy_data);
6379
6380 mac_data = er32(EXTCNF_CTRL);
6381 mac_data |= E1000_EXTCNF_CTRL_GATE_PHY_CFG;
6382 ew32(EXTCNF_CTRL, mac_data);
6383
6384 /* Check MAC Tx/Rx packet buffer pointers.
6385 * Reset MAC Tx/Rx packet buffer pointers to suppress any
6386 * pending traffic indication that would prevent power gating.
6387 */
6388 mac_data = er32(TDFH);
6389 if (mac_data)
6390 ew32(TDFH, 0);
6391 mac_data = er32(TDFT);
6392 if (mac_data)
6393 ew32(TDFT, 0);
6394 mac_data = er32(TDFHS);
6395 if (mac_data)
6396 ew32(TDFHS, 0);
6397 mac_data = er32(TDFTS);
6398 if (mac_data)
6399 ew32(TDFTS, 0);
6400 mac_data = er32(TDFPC);
6401 if (mac_data)
6402 ew32(TDFPC, 0);
6403 mac_data = er32(RDFH);
6404 if (mac_data)
6405 ew32(RDFH, 0);
6406 mac_data = er32(RDFT);
6407 if (mac_data)
6408 ew32(RDFT, 0);
6409 mac_data = er32(RDFHS);
6410 if (mac_data)
6411 ew32(RDFHS, 0);
6412 mac_data = er32(RDFTS);
6413 if (mac_data)
6414 ew32(RDFTS, 0);
6415 mac_data = er32(RDFPC);
6416 if (mac_data)
6417 ew32(RDFPC, 0);
6418
6419 /* Enable the Dynamic Power Gating in the MAC */
6420 mac_data = er32(FEXTNVM7);
6421 mac_data |= BIT(22);
6422 ew32(FEXTNVM7, mac_data);
6423
6424 /* Disable the time synchronization clock */
6425 mac_data = er32(FEXTNVM7);
6426 mac_data |= BIT(31);
6427 mac_data &= ~BIT(0);
6428 ew32(FEXTNVM7, mac_data);
6429
6430 /* Dynamic Power Gating Enable */
6431 mac_data = er32(CTRL_EXT);
6432 mac_data |= BIT(3);
6433 ew32(CTRL_EXT, mac_data);
6434
6435 /* Disable disconnected cable conditioning for Power Gating */
6436 mac_data = er32(DPGFR);
6437 mac_data |= BIT(2);
6438 ew32(DPGFR, mac_data);
6439
6440 /* Don't wake from dynamic Power Gating with clock request */
6441 mac_data = er32(FEXTNVM12);
6442 mac_data |= BIT(12);
6443 ew32(FEXTNVM12, mac_data);
6444
6445 /* Ungate PGCB clock */
6446 mac_data = er32(FEXTNVM9);
6447 mac_data &= ~BIT(28);
6448 ew32(FEXTNVM9, mac_data);
6449
6450 /* Enable K1 off to enable mPHY Power Gating */
6451 mac_data = er32(FEXTNVM6);
6452 mac_data |= BIT(31);
6453 ew32(FEXTNVM6, mac_data);
6454
6455 /* Enable mPHY power gating for any link and speed */
6456 mac_data = er32(FEXTNVM8);
6457 mac_data |= BIT(9);
6458 ew32(FEXTNVM8, mac_data);
6459
6460 /* Enable the Dynamic Clock Gating in the DMA and MAC */
6461 mac_data = er32(CTRL_EXT);
6462 mac_data |= E1000_CTRL_EXT_DMA_DYN_CLK_EN;
6463 ew32(CTRL_EXT, mac_data);
6464
6465 /* No MAC DPG gating SLP_S0 in modern standby
6466 * Switch the logic of the lanphypc to use PMC counter
6467 */
6468 mac_data = er32(FEXTNVM5);
6469 mac_data |= BIT(7);
6470 ew32(FEXTNVM5, mac_data);
6471}
6472
6473static void e1000e_s0ix_exit_flow(struct e1000_adapter *adapter)
6474{
6475 struct e1000_hw *hw = &adapter->hw;
6476 u32 mac_data;
6477 u16 phy_data;
6478
6479 /* Disable the Dynamic Power Gating in the MAC */
6480 mac_data = er32(FEXTNVM7);
6481 mac_data &= 0xFFBFFFFF;
6482 ew32(FEXTNVM7, mac_data);
6483
6484 /* Enable the time synchronization clock */
6485 mac_data = er32(FEXTNVM7);
6486 mac_data |= BIT(0);
6487 ew32(FEXTNVM7, mac_data);
6488
6489 /* Disable mPHY power gating for any link and speed */
6490 mac_data = er32(FEXTNVM8);
6491 mac_data &= ~BIT(9);
6492 ew32(FEXTNVM8, mac_data);
6493
6494 /* Disable K1 off */
6495 mac_data = er32(FEXTNVM6);
6496 mac_data &= ~BIT(31);
6497 ew32(FEXTNVM6, mac_data);
6498
6499 /* Disable Ungate PGCB clock */
6500 mac_data = er32(FEXTNVM9);
6501 mac_data |= BIT(28);
6502 ew32(FEXTNVM9, mac_data);
6503
6504 /* Cancel not waking from dynamic
6505 * Power Gating with clock request
6506 */
6507 mac_data = er32(FEXTNVM12);
6508 mac_data &= ~BIT(12);
6509 ew32(FEXTNVM12, mac_data);
6510
6511 /* Cancel disable disconnected cable conditioning
6512 * for Power Gating
6513 */
6514 mac_data = er32(DPGFR);
6515 mac_data &= ~BIT(2);
6516 ew32(DPGFR, mac_data);
6517
6518 /* Disable Dynamic Power Gating */
6519 mac_data = er32(CTRL_EXT);
6520 mac_data &= 0xFFFFFFF7;
6521 ew32(CTRL_EXT, mac_data);
6522
6523 /* Disable the Dynamic Clock Gating in the DMA and MAC */
6524 mac_data = er32(CTRL_EXT);
6525 mac_data &= 0xFFF7FFFF;
6526 ew32(CTRL_EXT, mac_data);
6527
6528 /* Revert the lanphypc logic to use the internal Gbe counter
6529 * and not the PMC counter
6530 */
6531 mac_data = er32(FEXTNVM5);
6532 mac_data &= 0xFFFFFF7F;
6533 ew32(FEXTNVM5, mac_data);
6534
6535 /* Enable the periodic inband message,
6536 * Request PCIe clock in K1 page770_17[10:9] =01b
6537 */
6538 e1e_rphy(hw, HV_PM_CTRL, &phy_data);
6539 phy_data &= 0xFBFF;
6540 phy_data |= HV_PM_CTRL_K1_CLK_REQ;
6541 e1e_wphy(hw, HV_PM_CTRL, phy_data);
6542
6543 /* Return back configuration
6544 * 772_29[5] = 0 CS_Mode_Stay_In_K1
6545 */
6546 e1e_rphy(hw, I217_CGFREG, &phy_data);
6547 phy_data &= 0xFFDF;
6548 e1e_wphy(hw, I217_CGFREG, phy_data);
6549
6550 /* Change the MAC/PHY interface to Kumeran
6551 * Unforce the SMBus in PHY page769_23[0] = 0
6552 * Unforce the SMBus in MAC CTRL_EXT[11] = 0
6553 */
6554 e1e_rphy(hw, CV_SMB_CTRL, &phy_data);
6555 phy_data &= ~CV_SMB_CTRL_FORCE_SMBUS;
6556 e1e_wphy(hw, CV_SMB_CTRL, phy_data);
6557 mac_data = er32(CTRL_EXT);
6558 mac_data &= ~E1000_CTRL_EXT_FORCE_SMBUS;
6559 ew32(CTRL_EXT, mac_data);
6560}
6561
6562static int e1000e_pm_freeze(struct device *dev)
6563{
6564 struct net_device *netdev = dev_get_drvdata(dev);
6565 struct e1000_adapter *adapter = netdev_priv(netdev);
6566 bool present;
6567
6568 rtnl_lock();
6569
6570 present = netif_device_present(netdev);
6571 netif_device_detach(netdev);
6572
6573 if (present && netif_running(netdev)) {
6574 int count = E1000_CHECK_RESET_COUNT;
6575
6576 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6577 usleep_range(10000, 11000);
6578
6579 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6580
6581 /* Quiesce the device without resetting the hardware */
6582 e1000e_down(adapter, false);
6583 e1000_free_irq(adapter);
6584 }
6585 rtnl_unlock();
6586
6587 e1000e_reset_interrupt_capability(adapter);
6588
6589 /* Allow time for pending master requests to run */
6590 e1000e_disable_pcie_master(&adapter->hw);
6591
6592 return 0;
6593}
6594
6595static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6596{
6597 struct net_device *netdev = pci_get_drvdata(pdev);
6598 struct e1000_adapter *adapter = netdev_priv(netdev);
6599 struct e1000_hw *hw = &adapter->hw;
6600 u32 ctrl, ctrl_ext, rctl, status, wufc;
6601 int retval = 0;
6602
6603 /* Runtime suspend should only enable wakeup for link changes */
6604 if (runtime)
6605 wufc = E1000_WUFC_LNKC;
6606 else if (device_may_wakeup(&pdev->dev))
6607 wufc = adapter->wol;
6608 else
6609 wufc = 0;
6610
6611 status = er32(STATUS);
6612 if (status & E1000_STATUS_LU)
6613 wufc &= ~E1000_WUFC_LNKC;
6614
6615 if (wufc) {
6616 e1000_setup_rctl(adapter);
6617 e1000e_set_rx_mode(netdev);
6618
6619 /* turn on all-multi mode if wake on multicast is enabled */
6620 if (wufc & E1000_WUFC_MC) {
6621 rctl = er32(RCTL);
6622 rctl |= E1000_RCTL_MPE;
6623 ew32(RCTL, rctl);
6624 }
6625
6626 ctrl = er32(CTRL);
6627 ctrl |= E1000_CTRL_ADVD3WUC;
6628 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6629 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6630 ew32(CTRL, ctrl);
6631
6632 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6633 adapter->hw.phy.media_type ==
6634 e1000_media_type_internal_serdes) {
6635 /* keep the laser running in D3 */
6636 ctrl_ext = er32(CTRL_EXT);
6637 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6638 ew32(CTRL_EXT, ctrl_ext);
6639 }
6640
6641 if (!runtime)
6642 e1000e_power_up_phy(adapter);
6643
6644 if (adapter->flags & FLAG_IS_ICH)
6645 e1000_suspend_workarounds_ich8lan(&adapter->hw);
6646
6647 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6648 /* enable wakeup by the PHY */
6649 retval = e1000_init_phy_wakeup(adapter, wufc);
6650 if (retval)
6651 return retval;
6652 } else {
6653 /* enable wakeup by the MAC */
6654 ew32(WUFC, wufc);
6655 ew32(WUC, E1000_WUC_PME_EN);
6656 }
6657 } else {
6658 ew32(WUC, 0);
6659 ew32(WUFC, 0);
6660
6661 e1000_power_down_phy(adapter);
6662 }
6663
6664 if (adapter->hw.phy.type == e1000_phy_igp_3) {
6665 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6666 } else if (hw->mac.type >= e1000_pch_lpt) {
6667 if (wufc && !(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6668 /* ULP does not support wake from unicast, multicast
6669 * or broadcast.
6670 */
6671 retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6672
6673 if (retval)
6674 return retval;
6675 }
6676
6677 /* Ensure that the appropriate bits are set in LPI_CTRL
6678 * for EEE in Sx
6679 */
6680 if ((hw->phy.type >= e1000_phy_i217) &&
6681 adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6682 u16 lpi_ctrl = 0;
6683
6684 retval = hw->phy.ops.acquire(hw);
6685 if (!retval) {
6686 retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6687 &lpi_ctrl);
6688 if (!retval) {
6689 if (adapter->eee_advert &
6690 hw->dev_spec.ich8lan.eee_lp_ability &
6691 I82579_EEE_100_SUPPORTED)
6692 lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6693 if (adapter->eee_advert &
6694 hw->dev_spec.ich8lan.eee_lp_ability &
6695 I82579_EEE_1000_SUPPORTED)
6696 lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6697
6698 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6699 lpi_ctrl);
6700 }
6701 }
6702 hw->phy.ops.release(hw);
6703 }
6704
6705 /* Release control of h/w to f/w. If f/w is AMT enabled, this
6706 * would have already happened in close and is redundant.
6707 */
6708 e1000e_release_hw_control(adapter);
6709
6710 pci_clear_master(pdev);
6711
6712 /* The pci-e switch on some quad port adapters will report a
6713 * correctable error when the MAC transitions from D0 to D3. To
6714 * prevent this we need to mask off the correctable errors on the
6715 * downstream port of the pci-e switch.
6716 *
6717 * We don't have the associated upstream bridge while assigning
6718 * the PCI device into guest. For example, the KVM on power is
6719 * one of the cases.
6720 */
6721 if (adapter->flags & FLAG_IS_QUAD_PORT) {
6722 struct pci_dev *us_dev = pdev->bus->self;
6723 u16 devctl;
6724
6725 if (!us_dev)
6726 return 0;
6727
6728 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6729 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6730 (devctl & ~PCI_EXP_DEVCTL_CERE));
6731
6732 pci_save_state(pdev);
6733 pci_prepare_to_sleep(pdev);
6734
6735 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6736 }
6737
6738 return 0;
6739}
6740
6741/**
6742 * __e1000e_disable_aspm - Disable ASPM states
6743 * @pdev: pointer to PCI device struct
6744 * @state: bit-mask of ASPM states to disable
6745 * @locked: indication if this context holds pci_bus_sem locked.
6746 *
6747 * Some devices *must* have certain ASPM states disabled per hardware errata.
6748 **/
6749static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6750{
6751 struct pci_dev *parent = pdev->bus->self;
6752 u16 aspm_dis_mask = 0;
6753 u16 pdev_aspmc, parent_aspmc;
6754
6755 switch (state) {
6756 case PCIE_LINK_STATE_L0S:
6757 case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6758 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6759 fallthrough; /* can't have L1 without L0s */
6760 case PCIE_LINK_STATE_L1:
6761 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6762 break;
6763 default:
6764 return;
6765 }
6766
6767 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6768 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6769
6770 if (parent) {
6771 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6772 &parent_aspmc);
6773 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6774 }
6775
6776 /* Nothing to do if the ASPM states to be disabled already are */
6777 if (!(pdev_aspmc & aspm_dis_mask) &&
6778 (!parent || !(parent_aspmc & aspm_dis_mask)))
6779 return;
6780
6781 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6782 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6783 "L0s" : "",
6784 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6785 "L1" : "");
6786
6787#ifdef CONFIG_PCIEASPM
6788 if (locked)
6789 pci_disable_link_state_locked(pdev, state);
6790 else
6791 pci_disable_link_state(pdev, state);
6792
6793 /* Double-check ASPM control. If not disabled by the above, the
6794 * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6795 * not enabled); override by writing PCI config space directly.
6796 */
6797 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6798 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6799
6800 if (!(aspm_dis_mask & pdev_aspmc))
6801 return;
6802#endif
6803
6804 /* Both device and parent should have the same ASPM setting.
6805 * Disable ASPM in downstream component first and then upstream.
6806 */
6807 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6808
6809 if (parent)
6810 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6811 aspm_dis_mask);
6812}
6813
6814/**
6815 * e1000e_disable_aspm - Disable ASPM states.
6816 * @pdev: pointer to PCI device struct
6817 * @state: bit-mask of ASPM states to disable
6818 *
6819 * This function acquires the pci_bus_sem!
6820 * Some devices *must* have certain ASPM states disabled per hardware errata.
6821 **/
6822static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6823{
6824 __e1000e_disable_aspm(pdev, state, 0);
6825}
6826
6827/**
6828 * e1000e_disable_aspm_locked - Disable ASPM states.
6829 * @pdev: pointer to PCI device struct
6830 * @state: bit-mask of ASPM states to disable
6831 *
6832 * This function must be called with pci_bus_sem acquired!
6833 * Some devices *must* have certain ASPM states disabled per hardware errata.
6834 **/
6835static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6836{
6837 __e1000e_disable_aspm(pdev, state, 1);
6838}
6839
6840static int e1000e_pm_thaw(struct device *dev)
6841{
6842 struct net_device *netdev = dev_get_drvdata(dev);
6843 struct e1000_adapter *adapter = netdev_priv(netdev);
6844 int rc = 0;
6845
6846 e1000e_set_interrupt_capability(adapter);
6847
6848 rtnl_lock();
6849 if (netif_running(netdev)) {
6850 rc = e1000_request_irq(adapter);
6851 if (rc)
6852 goto err_irq;
6853
6854 e1000e_up(adapter);
6855 }
6856
6857 netif_device_attach(netdev);
6858err_irq:
6859 rtnl_unlock();
6860
6861 return rc;
6862}
6863
6864static int __e1000_resume(struct pci_dev *pdev)
6865{
6866 struct net_device *netdev = pci_get_drvdata(pdev);
6867 struct e1000_adapter *adapter = netdev_priv(netdev);
6868 struct e1000_hw *hw = &adapter->hw;
6869 u16 aspm_disable_flag = 0;
6870
6871 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6872 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6873 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6874 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6875 if (aspm_disable_flag)
6876 e1000e_disable_aspm(pdev, aspm_disable_flag);
6877
6878 pci_set_master(pdev);
6879
6880 if (hw->mac.type >= e1000_pch2lan)
6881 e1000_resume_workarounds_pchlan(&adapter->hw);
6882
6883 e1000e_power_up_phy(adapter);
6884
6885 /* report the system wakeup cause from S3/S4 */
6886 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6887 u16 phy_data;
6888
6889 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6890 if (phy_data) {
6891 e_info("PHY Wakeup cause - %s\n",
6892 phy_data & E1000_WUS_EX ? "Unicast Packet" :
6893 phy_data & E1000_WUS_MC ? "Multicast Packet" :
6894 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6895 phy_data & E1000_WUS_MAG ? "Magic Packet" :
6896 phy_data & E1000_WUS_LNKC ?
6897 "Link Status Change" : "other");
6898 }
6899 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6900 } else {
6901 u32 wus = er32(WUS);
6902
6903 if (wus) {
6904 e_info("MAC Wakeup cause - %s\n",
6905 wus & E1000_WUS_EX ? "Unicast Packet" :
6906 wus & E1000_WUS_MC ? "Multicast Packet" :
6907 wus & E1000_WUS_BC ? "Broadcast Packet" :
6908 wus & E1000_WUS_MAG ? "Magic Packet" :
6909 wus & E1000_WUS_LNKC ? "Link Status Change" :
6910 "other");
6911 }
6912 ew32(WUS, ~0);
6913 }
6914
6915 e1000e_reset(adapter);
6916
6917 e1000_init_manageability_pt(adapter);
6918
6919 /* If the controller has AMT, do not set DRV_LOAD until the interface
6920 * is up. For all other cases, let the f/w know that the h/w is now
6921 * under the control of the driver.
6922 */
6923 if (!(adapter->flags & FLAG_HAS_AMT))
6924 e1000e_get_hw_control(adapter);
6925
6926 return 0;
6927}
6928
6929static __maybe_unused int e1000e_pm_prepare(struct device *dev)
6930{
6931 return pm_runtime_suspended(dev) &&
6932 pm_suspend_via_firmware();
6933}
6934
6935static __maybe_unused int e1000e_pm_suspend(struct device *dev)
6936{
6937 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6938 struct e1000_adapter *adapter = netdev_priv(netdev);
6939 struct pci_dev *pdev = to_pci_dev(dev);
6940 int rc;
6941
6942 e1000e_flush_lpic(pdev);
6943
6944 e1000e_pm_freeze(dev);
6945
6946 rc = __e1000_shutdown(pdev, false);
6947 if (rc) {
6948 e1000e_pm_thaw(dev);
6949 } else {
6950 /* Introduce S0ix implementation */
6951 if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
6952 e1000e_s0ix_entry_flow(adapter);
6953 }
6954
6955 return rc;
6956}
6957
6958static __maybe_unused int e1000e_pm_resume(struct device *dev)
6959{
6960 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6961 struct e1000_adapter *adapter = netdev_priv(netdev);
6962 struct pci_dev *pdev = to_pci_dev(dev);
6963 int rc;
6964
6965 /* Introduce S0ix implementation */
6966 if (adapter->flags2 & FLAG2_ENABLE_S0IX_FLOWS)
6967 e1000e_s0ix_exit_flow(adapter);
6968
6969 rc = __e1000_resume(pdev);
6970 if (rc)
6971 return rc;
6972
6973 return e1000e_pm_thaw(dev);
6974}
6975
6976static __maybe_unused int e1000e_pm_runtime_idle(struct device *dev)
6977{
6978 struct net_device *netdev = dev_get_drvdata(dev);
6979 struct e1000_adapter *adapter = netdev_priv(netdev);
6980 u16 eee_lp;
6981
6982 eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6983
6984 if (!e1000e_has_link(adapter)) {
6985 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6986 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6987 }
6988
6989 return -EBUSY;
6990}
6991
6992static __maybe_unused int e1000e_pm_runtime_resume(struct device *dev)
6993{
6994 struct pci_dev *pdev = to_pci_dev(dev);
6995 struct net_device *netdev = pci_get_drvdata(pdev);
6996 struct e1000_adapter *adapter = netdev_priv(netdev);
6997 int rc;
6998
6999 rc = __e1000_resume(pdev);
7000 if (rc)
7001 return rc;
7002
7003 if (netdev->flags & IFF_UP)
7004 e1000e_up(adapter);
7005
7006 return rc;
7007}
7008
7009static __maybe_unused int e1000e_pm_runtime_suspend(struct device *dev)
7010{
7011 struct pci_dev *pdev = to_pci_dev(dev);
7012 struct net_device *netdev = pci_get_drvdata(pdev);
7013 struct e1000_adapter *adapter = netdev_priv(netdev);
7014
7015 if (netdev->flags & IFF_UP) {
7016 int count = E1000_CHECK_RESET_COUNT;
7017
7018 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
7019 usleep_range(10000, 11000);
7020
7021 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
7022
7023 /* Down the device without resetting the hardware */
7024 e1000e_down(adapter, false);
7025 }
7026
7027 if (__e1000_shutdown(pdev, true)) {
7028 e1000e_pm_runtime_resume(dev);
7029 return -EBUSY;
7030 }
7031
7032 return 0;
7033}
7034
7035static void e1000_shutdown(struct pci_dev *pdev)
7036{
7037 e1000e_flush_lpic(pdev);
7038
7039 e1000e_pm_freeze(&pdev->dev);
7040
7041 __e1000_shutdown(pdev, false);
7042}
7043
7044#ifdef CONFIG_NET_POLL_CONTROLLER
7045
7046static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
7047{
7048 struct net_device *netdev = data;
7049 struct e1000_adapter *adapter = netdev_priv(netdev);
7050
7051 if (adapter->msix_entries) {
7052 int vector, msix_irq;
7053
7054 vector = 0;
7055 msix_irq = adapter->msix_entries[vector].vector;
7056 if (disable_hardirq(msix_irq))
7057 e1000_intr_msix_rx(msix_irq, netdev);
7058 enable_irq(msix_irq);
7059
7060 vector++;
7061 msix_irq = adapter->msix_entries[vector].vector;
7062 if (disable_hardirq(msix_irq))
7063 e1000_intr_msix_tx(msix_irq, netdev);
7064 enable_irq(msix_irq);
7065
7066 vector++;
7067 msix_irq = adapter->msix_entries[vector].vector;
7068 if (disable_hardirq(msix_irq))
7069 e1000_msix_other(msix_irq, netdev);
7070 enable_irq(msix_irq);
7071 }
7072
7073 return IRQ_HANDLED;
7074}
7075
7076/**
7077 * e1000_netpoll
7078 * @netdev: network interface device structure
7079 *
7080 * Polling 'interrupt' - used by things like netconsole to send skbs
7081 * without having to re-enable interrupts. It's not called while
7082 * the interrupt routine is executing.
7083 */
7084static void e1000_netpoll(struct net_device *netdev)
7085{
7086 struct e1000_adapter *adapter = netdev_priv(netdev);
7087
7088 switch (adapter->int_mode) {
7089 case E1000E_INT_MODE_MSIX:
7090 e1000_intr_msix(adapter->pdev->irq, netdev);
7091 break;
7092 case E1000E_INT_MODE_MSI:
7093 if (disable_hardirq(adapter->pdev->irq))
7094 e1000_intr_msi(adapter->pdev->irq, netdev);
7095 enable_irq(adapter->pdev->irq);
7096 break;
7097 default: /* E1000E_INT_MODE_LEGACY */
7098 if (disable_hardirq(adapter->pdev->irq))
7099 e1000_intr(adapter->pdev->irq, netdev);
7100 enable_irq(adapter->pdev->irq);
7101 break;
7102 }
7103}
7104#endif
7105
7106/**
7107 * e1000_io_error_detected - called when PCI error is detected
7108 * @pdev: Pointer to PCI device
7109 * @state: The current pci connection state
7110 *
7111 * This function is called after a PCI bus error affecting
7112 * this device has been detected.
7113 */
7114static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
7115 pci_channel_state_t state)
7116{
7117 e1000e_pm_freeze(&pdev->dev);
7118
7119 if (state == pci_channel_io_perm_failure)
7120 return PCI_ERS_RESULT_DISCONNECT;
7121
7122 pci_disable_device(pdev);
7123
7124 /* Request a slot reset. */
7125 return PCI_ERS_RESULT_NEED_RESET;
7126}
7127
7128/**
7129 * e1000_io_slot_reset - called after the pci bus has been reset.
7130 * @pdev: Pointer to PCI device
7131 *
7132 * Restart the card from scratch, as if from a cold-boot. Implementation
7133 * resembles the first-half of the e1000e_pm_resume routine.
7134 */
7135static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
7136{
7137 struct net_device *netdev = pci_get_drvdata(pdev);
7138 struct e1000_adapter *adapter = netdev_priv(netdev);
7139 struct e1000_hw *hw = &adapter->hw;
7140 u16 aspm_disable_flag = 0;
7141 int err;
7142 pci_ers_result_t result;
7143
7144 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
7145 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7146 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
7147 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7148 if (aspm_disable_flag)
7149 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
7150
7151 err = pci_enable_device_mem(pdev);
7152 if (err) {
7153 dev_err(&pdev->dev,
7154 "Cannot re-enable PCI device after reset.\n");
7155 result = PCI_ERS_RESULT_DISCONNECT;
7156 } else {
7157 pdev->state_saved = true;
7158 pci_restore_state(pdev);
7159 pci_set_master(pdev);
7160
7161 pci_enable_wake(pdev, PCI_D3hot, 0);
7162 pci_enable_wake(pdev, PCI_D3cold, 0);
7163
7164 e1000e_reset(adapter);
7165 ew32(WUS, ~0);
7166 result = PCI_ERS_RESULT_RECOVERED;
7167 }
7168
7169 return result;
7170}
7171
7172/**
7173 * e1000_io_resume - called when traffic can start flowing again.
7174 * @pdev: Pointer to PCI device
7175 *
7176 * This callback is called when the error recovery driver tells us that
7177 * its OK to resume normal operation. Implementation resembles the
7178 * second-half of the e1000e_pm_resume routine.
7179 */
7180static void e1000_io_resume(struct pci_dev *pdev)
7181{
7182 struct net_device *netdev = pci_get_drvdata(pdev);
7183 struct e1000_adapter *adapter = netdev_priv(netdev);
7184
7185 e1000_init_manageability_pt(adapter);
7186
7187 e1000e_pm_thaw(&pdev->dev);
7188
7189 /* If the controller has AMT, do not set DRV_LOAD until the interface
7190 * is up. For all other cases, let the f/w know that the h/w is now
7191 * under the control of the driver.
7192 */
7193 if (!(adapter->flags & FLAG_HAS_AMT))
7194 e1000e_get_hw_control(adapter);
7195}
7196
7197static void e1000_print_device_info(struct e1000_adapter *adapter)
7198{
7199 struct e1000_hw *hw = &adapter->hw;
7200 struct net_device *netdev = adapter->netdev;
7201 u32 ret_val;
7202 u8 pba_str[E1000_PBANUM_LENGTH];
7203
7204 /* print bus type/speed/width info */
7205 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
7206 /* bus width */
7207 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
7208 "Width x1"),
7209 /* MAC address */
7210 netdev->dev_addr);
7211 e_info("Intel(R) PRO/%s Network Connection\n",
7212 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
7213 ret_val = e1000_read_pba_string_generic(hw, pba_str,
7214 E1000_PBANUM_LENGTH);
7215 if (ret_val)
7216 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
7217 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
7218 hw->mac.type, hw->phy.type, pba_str);
7219}
7220
7221static void e1000_eeprom_checks(struct e1000_adapter *adapter)
7222{
7223 struct e1000_hw *hw = &adapter->hw;
7224 int ret_val;
7225 u16 buf = 0;
7226
7227 if (hw->mac.type != e1000_82573)
7228 return;
7229
7230 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
7231 le16_to_cpus(&buf);
7232 if (!ret_val && (!(buf & BIT(0)))) {
7233 /* Deep Smart Power Down (DSPD) */
7234 dev_warn(&adapter->pdev->dev,
7235 "Warning: detected DSPD enabled in EEPROM\n");
7236 }
7237}
7238
7239static netdev_features_t e1000_fix_features(struct net_device *netdev,
7240 netdev_features_t features)
7241{
7242 struct e1000_adapter *adapter = netdev_priv(netdev);
7243 struct e1000_hw *hw = &adapter->hw;
7244
7245 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
7246 if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
7247 features &= ~NETIF_F_RXFCS;
7248
7249 /* Since there is no support for separate Rx/Tx vlan accel
7250 * enable/disable make sure Tx flag is always in same state as Rx.
7251 */
7252 if (features & NETIF_F_HW_VLAN_CTAG_RX)
7253 features |= NETIF_F_HW_VLAN_CTAG_TX;
7254 else
7255 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
7256
7257 return features;
7258}
7259
7260static int e1000_set_features(struct net_device *netdev,
7261 netdev_features_t features)
7262{
7263 struct e1000_adapter *adapter = netdev_priv(netdev);
7264 netdev_features_t changed = features ^ netdev->features;
7265
7266 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
7267 adapter->flags |= FLAG_TSO_FORCE;
7268
7269 if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
7270 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
7271 NETIF_F_RXALL)))
7272 return 0;
7273
7274 if (changed & NETIF_F_RXFCS) {
7275 if (features & NETIF_F_RXFCS) {
7276 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7277 } else {
7278 /* We need to take it back to defaults, which might mean
7279 * stripping is still disabled at the adapter level.
7280 */
7281 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
7282 adapter->flags2 |= FLAG2_CRC_STRIPPING;
7283 else
7284 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
7285 }
7286 }
7287
7288 netdev->features = features;
7289
7290 if (netif_running(netdev))
7291 e1000e_reinit_locked(adapter);
7292 else
7293 e1000e_reset(adapter);
7294
7295 return 1;
7296}
7297
7298static const struct net_device_ops e1000e_netdev_ops = {
7299 .ndo_open = e1000e_open,
7300 .ndo_stop = e1000e_close,
7301 .ndo_start_xmit = e1000_xmit_frame,
7302 .ndo_get_stats64 = e1000e_get_stats64,
7303 .ndo_set_rx_mode = e1000e_set_rx_mode,
7304 .ndo_set_mac_address = e1000_set_mac,
7305 .ndo_change_mtu = e1000_change_mtu,
7306 .ndo_do_ioctl = e1000_ioctl,
7307 .ndo_tx_timeout = e1000_tx_timeout,
7308 .ndo_validate_addr = eth_validate_addr,
7309
7310 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
7311 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
7312#ifdef CONFIG_NET_POLL_CONTROLLER
7313 .ndo_poll_controller = e1000_netpoll,
7314#endif
7315 .ndo_set_features = e1000_set_features,
7316 .ndo_fix_features = e1000_fix_features,
7317 .ndo_features_check = passthru_features_check,
7318};
7319
7320/**
7321 * e1000_probe - Device Initialization Routine
7322 * @pdev: PCI device information struct
7323 * @ent: entry in e1000_pci_tbl
7324 *
7325 * Returns 0 on success, negative on failure
7326 *
7327 * e1000_probe initializes an adapter identified by a pci_dev structure.
7328 * The OS initialization, configuring of the adapter private structure,
7329 * and a hardware reset occur.
7330 **/
7331static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
7332{
7333 struct net_device *netdev;
7334 struct e1000_adapter *adapter;
7335 struct e1000_hw *hw;
7336 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
7337 resource_size_t mmio_start, mmio_len;
7338 resource_size_t flash_start, flash_len;
7339 static int cards_found;
7340 u16 aspm_disable_flag = 0;
7341 int bars, i, err, pci_using_dac;
7342 u16 eeprom_data = 0;
7343 u16 eeprom_apme_mask = E1000_EEPROM_APME;
7344 s32 ret_val = 0;
7345
7346 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
7347 aspm_disable_flag = PCIE_LINK_STATE_L0S;
7348 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
7349 aspm_disable_flag |= PCIE_LINK_STATE_L1;
7350 if (aspm_disable_flag)
7351 e1000e_disable_aspm(pdev, aspm_disable_flag);
7352
7353 err = pci_enable_device_mem(pdev);
7354 if (err)
7355 return err;
7356
7357 pci_using_dac = 0;
7358 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
7359 if (!err) {
7360 pci_using_dac = 1;
7361 } else {
7362 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
7363 if (err) {
7364 dev_err(&pdev->dev,
7365 "No usable DMA configuration, aborting\n");
7366 goto err_dma;
7367 }
7368 }
7369
7370 bars = pci_select_bars(pdev, IORESOURCE_MEM);
7371 err = pci_request_selected_regions_exclusive(pdev, bars,
7372 e1000e_driver_name);
7373 if (err)
7374 goto err_pci_reg;
7375
7376 /* AER (Advanced Error Reporting) hooks */
7377 pci_enable_pcie_error_reporting(pdev);
7378
7379 pci_set_master(pdev);
7380 /* PCI config space info */
7381 err = pci_save_state(pdev);
7382 if (err)
7383 goto err_alloc_etherdev;
7384
7385 err = -ENOMEM;
7386 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7387 if (!netdev)
7388 goto err_alloc_etherdev;
7389
7390 SET_NETDEV_DEV(netdev, &pdev->dev);
7391
7392 netdev->irq = pdev->irq;
7393
7394 pci_set_drvdata(pdev, netdev);
7395 adapter = netdev_priv(netdev);
7396 hw = &adapter->hw;
7397 adapter->netdev = netdev;
7398 adapter->pdev = pdev;
7399 adapter->ei = ei;
7400 adapter->pba = ei->pba;
7401 adapter->flags = ei->flags;
7402 adapter->flags2 = ei->flags2;
7403 adapter->hw.adapter = adapter;
7404 adapter->hw.mac.type = ei->mac;
7405 adapter->max_hw_frame_size = ei->max_hw_frame_size;
7406 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7407
7408 mmio_start = pci_resource_start(pdev, 0);
7409 mmio_len = pci_resource_len(pdev, 0);
7410
7411 err = -EIO;
7412 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7413 if (!adapter->hw.hw_addr)
7414 goto err_ioremap;
7415
7416 if ((adapter->flags & FLAG_HAS_FLASH) &&
7417 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7418 (hw->mac.type < e1000_pch_spt)) {
7419 flash_start = pci_resource_start(pdev, 1);
7420 flash_len = pci_resource_len(pdev, 1);
7421 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7422 if (!adapter->hw.flash_address)
7423 goto err_flashmap;
7424 }
7425
7426 /* Set default EEE advertisement */
7427 if (adapter->flags2 & FLAG2_HAS_EEE)
7428 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7429
7430 /* construct the net_device struct */
7431 netdev->netdev_ops = &e1000e_netdev_ops;
7432 e1000e_set_ethtool_ops(netdev);
7433 netdev->watchdog_timeo = 5 * HZ;
7434 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7435 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7436
7437 netdev->mem_start = mmio_start;
7438 netdev->mem_end = mmio_start + mmio_len;
7439
7440 adapter->bd_number = cards_found++;
7441
7442 e1000e_check_options(adapter);
7443
7444 /* setup adapter struct */
7445 err = e1000_sw_init(adapter);
7446 if (err)
7447 goto err_sw_init;
7448
7449 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7450 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7451 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7452
7453 err = ei->get_variants(adapter);
7454 if (err)
7455 goto err_hw_init;
7456
7457 if ((adapter->flags & FLAG_IS_ICH) &&
7458 (adapter->flags & FLAG_READ_ONLY_NVM) &&
7459 (hw->mac.type < e1000_pch_spt))
7460 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7461
7462 hw->mac.ops.get_bus_info(&adapter->hw);
7463
7464 adapter->hw.phy.autoneg_wait_to_complete = 0;
7465
7466 /* Copper options */
7467 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7468 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7469 adapter->hw.phy.disable_polarity_correction = 0;
7470 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7471 }
7472
7473 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7474 dev_info(&pdev->dev,
7475 "PHY reset is blocked due to SOL/IDER session.\n");
7476
7477 /* Set initial default active device features */
7478 netdev->features = (NETIF_F_SG |
7479 NETIF_F_HW_VLAN_CTAG_RX |
7480 NETIF_F_HW_VLAN_CTAG_TX |
7481 NETIF_F_TSO |
7482 NETIF_F_TSO6 |
7483 NETIF_F_RXHASH |
7484 NETIF_F_RXCSUM |
7485 NETIF_F_HW_CSUM);
7486
7487 /* Set user-changeable features (subset of all device features) */
7488 netdev->hw_features = netdev->features;
7489 netdev->hw_features |= NETIF_F_RXFCS;
7490 netdev->priv_flags |= IFF_SUPP_NOFCS;
7491 netdev->hw_features |= NETIF_F_RXALL;
7492
7493 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7494 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7495
7496 netdev->vlan_features |= (NETIF_F_SG |
7497 NETIF_F_TSO |
7498 NETIF_F_TSO6 |
7499 NETIF_F_HW_CSUM);
7500
7501 netdev->priv_flags |= IFF_UNICAST_FLT;
7502
7503 if (pci_using_dac) {
7504 netdev->features |= NETIF_F_HIGHDMA;
7505 netdev->vlan_features |= NETIF_F_HIGHDMA;
7506 }
7507
7508 /* MTU range: 68 - max_hw_frame_size */
7509 netdev->min_mtu = ETH_MIN_MTU;
7510 netdev->max_mtu = adapter->max_hw_frame_size -
7511 (VLAN_ETH_HLEN + ETH_FCS_LEN);
7512
7513 if (e1000e_enable_mng_pass_thru(&adapter->hw))
7514 adapter->flags |= FLAG_MNG_PT_ENABLED;
7515
7516 /* before reading the NVM, reset the controller to
7517 * put the device in a known good starting state
7518 */
7519 adapter->hw.mac.ops.reset_hw(&adapter->hw);
7520
7521 /* systems with ASPM and others may see the checksum fail on the first
7522 * attempt. Let's give it a few tries
7523 */
7524 for (i = 0;; i++) {
7525 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7526 break;
7527 if (i == 2) {
7528 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7529 err = -EIO;
7530 goto err_eeprom;
7531 }
7532 }
7533
7534 e1000_eeprom_checks(adapter);
7535
7536 /* copy the MAC address */
7537 if (e1000e_read_mac_addr(&adapter->hw))
7538 dev_err(&pdev->dev,
7539 "NVM Read Error while reading MAC address\n");
7540
7541 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7542
7543 if (!is_valid_ether_addr(netdev->dev_addr)) {
7544 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7545 netdev->dev_addr);
7546 err = -EIO;
7547 goto err_eeprom;
7548 }
7549
7550 timer_setup(&adapter->watchdog_timer, e1000_watchdog, 0);
7551 timer_setup(&adapter->phy_info_timer, e1000_update_phy_info, 0);
7552
7553 INIT_WORK(&adapter->reset_task, e1000_reset_task);
7554 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7555 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7556 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7557 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7558
7559 /* Initialize link parameters. User can change them with ethtool */
7560 adapter->hw.mac.autoneg = 1;
7561 adapter->fc_autoneg = true;
7562 adapter->hw.fc.requested_mode = e1000_fc_default;
7563 adapter->hw.fc.current_mode = e1000_fc_default;
7564 adapter->hw.phy.autoneg_advertised = 0x2f;
7565
7566 /* Initial Wake on LAN setting - If APM wake is enabled in
7567 * the EEPROM, enable the ACPI Magic Packet filter
7568 */
7569 if (adapter->flags & FLAG_APME_IN_WUC) {
7570 /* APME bit in EEPROM is mapped to WUC.APME */
7571 eeprom_data = er32(WUC);
7572 eeprom_apme_mask = E1000_WUC_APME;
7573 if ((hw->mac.type > e1000_ich10lan) &&
7574 (eeprom_data & E1000_WUC_PHY_WAKE))
7575 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7576 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7577 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7578 (adapter->hw.bus.func == 1))
7579 ret_val = e1000_read_nvm(&adapter->hw,
7580 NVM_INIT_CONTROL3_PORT_B,
7581 1, &eeprom_data);
7582 else
7583 ret_val = e1000_read_nvm(&adapter->hw,
7584 NVM_INIT_CONTROL3_PORT_A,
7585 1, &eeprom_data);
7586 }
7587
7588 /* fetch WoL from EEPROM */
7589 if (ret_val)
7590 e_dbg("NVM read error getting WoL initial values: %d\n", ret_val);
7591 else if (eeprom_data & eeprom_apme_mask)
7592 adapter->eeprom_wol |= E1000_WUFC_MAG;
7593
7594 /* now that we have the eeprom settings, apply the special cases
7595 * where the eeprom may be wrong or the board simply won't support
7596 * wake on lan on a particular port
7597 */
7598 if (!(adapter->flags & FLAG_HAS_WOL))
7599 adapter->eeprom_wol = 0;
7600
7601 /* initialize the wol settings based on the eeprom settings */
7602 adapter->wol = adapter->eeprom_wol;
7603
7604 /* make sure adapter isn't asleep if manageability is enabled */
7605 if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7606 (hw->mac.ops.check_mng_mode(hw)))
7607 device_wakeup_enable(&pdev->dev);
7608
7609 /* save off EEPROM version number */
7610 ret_val = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7611
7612 if (ret_val) {
7613 e_dbg("NVM read error getting EEPROM version: %d\n", ret_val);
7614 adapter->eeprom_vers = 0;
7615 }
7616
7617 /* init PTP hardware clock */
7618 e1000e_ptp_init(adapter);
7619
7620 /* reset the hardware with the new settings */
7621 e1000e_reset(adapter);
7622
7623 /* If the controller has AMT, do not set DRV_LOAD until the interface
7624 * is up. For all other cases, let the f/w know that the h/w is now
7625 * under the control of the driver.
7626 */
7627 if (!(adapter->flags & FLAG_HAS_AMT))
7628 e1000e_get_hw_control(adapter);
7629
7630 if (hw->mac.type >= e1000_pch_cnp)
7631 adapter->flags2 |= FLAG2_ENABLE_S0IX_FLOWS;
7632
7633 strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7634 err = register_netdev(netdev);
7635 if (err)
7636 goto err_register;
7637
7638 /* carrier off reporting is important to ethtool even BEFORE open */
7639 netif_carrier_off(netdev);
7640
7641 e1000_print_device_info(adapter);
7642
7643 dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_SMART_PREPARE);
7644
7645 if (pci_dev_run_wake(pdev) && hw->mac.type != e1000_pch_cnp)
7646 pm_runtime_put_noidle(&pdev->dev);
7647
7648 return 0;
7649
7650err_register:
7651 if (!(adapter->flags & FLAG_HAS_AMT))
7652 e1000e_release_hw_control(adapter);
7653err_eeprom:
7654 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7655 e1000_phy_hw_reset(&adapter->hw);
7656err_hw_init:
7657 kfree(adapter->tx_ring);
7658 kfree(adapter->rx_ring);
7659err_sw_init:
7660 if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7661 iounmap(adapter->hw.flash_address);
7662 e1000e_reset_interrupt_capability(adapter);
7663err_flashmap:
7664 iounmap(adapter->hw.hw_addr);
7665err_ioremap:
7666 free_netdev(netdev);
7667err_alloc_etherdev:
7668 pci_disable_pcie_error_reporting(pdev);
7669 pci_release_mem_regions(pdev);
7670err_pci_reg:
7671err_dma:
7672 pci_disable_device(pdev);
7673 return err;
7674}
7675
7676/**
7677 * e1000_remove - Device Removal Routine
7678 * @pdev: PCI device information struct
7679 *
7680 * e1000_remove is called by the PCI subsystem to alert the driver
7681 * that it should release a PCI device. The could be caused by a
7682 * Hot-Plug event, or because the driver is going to be removed from
7683 * memory.
7684 **/
7685static void e1000_remove(struct pci_dev *pdev)
7686{
7687 struct net_device *netdev = pci_get_drvdata(pdev);
7688 struct e1000_adapter *adapter = netdev_priv(netdev);
7689
7690 e1000e_ptp_remove(adapter);
7691
7692 /* The timers may be rescheduled, so explicitly disable them
7693 * from being rescheduled.
7694 */
7695 set_bit(__E1000_DOWN, &adapter->state);
7696 del_timer_sync(&adapter->watchdog_timer);
7697 del_timer_sync(&adapter->phy_info_timer);
7698
7699 cancel_work_sync(&adapter->reset_task);
7700 cancel_work_sync(&adapter->watchdog_task);
7701 cancel_work_sync(&adapter->downshift_task);
7702 cancel_work_sync(&adapter->update_phy_task);
7703 cancel_work_sync(&adapter->print_hang_task);
7704
7705 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7706 cancel_work_sync(&adapter->tx_hwtstamp_work);
7707 if (adapter->tx_hwtstamp_skb) {
7708 dev_consume_skb_any(adapter->tx_hwtstamp_skb);
7709 adapter->tx_hwtstamp_skb = NULL;
7710 }
7711 }
7712
7713 unregister_netdev(netdev);
7714
7715 if (pci_dev_run_wake(pdev))
7716 pm_runtime_get_noresume(&pdev->dev);
7717
7718 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7719 * would have already happened in close and is redundant.
7720 */
7721 e1000e_release_hw_control(adapter);
7722
7723 e1000e_reset_interrupt_capability(adapter);
7724 kfree(adapter->tx_ring);
7725 kfree(adapter->rx_ring);
7726
7727 iounmap(adapter->hw.hw_addr);
7728 if ((adapter->hw.flash_address) &&
7729 (adapter->hw.mac.type < e1000_pch_spt))
7730 iounmap(adapter->hw.flash_address);
7731 pci_release_mem_regions(pdev);
7732
7733 free_netdev(netdev);
7734
7735 /* AER disable */
7736 pci_disable_pcie_error_reporting(pdev);
7737
7738 pci_disable_device(pdev);
7739}
7740
7741/* PCI Error Recovery (ERS) */
7742static const struct pci_error_handlers e1000_err_handler = {
7743 .error_detected = e1000_io_error_detected,
7744 .slot_reset = e1000_io_slot_reset,
7745 .resume = e1000_io_resume,
7746};
7747
7748static const struct pci_device_id e1000_pci_tbl[] = {
7749 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7750 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7751 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7752 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7753 board_82571 },
7754 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7755 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7756 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7757 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7758 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7759
7760 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7761 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7762 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7763 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7764
7765 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7766 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7767 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7768
7769 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7770 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7771 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7772
7773 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7774 board_80003es2lan },
7775 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7776 board_80003es2lan },
7777 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7778 board_80003es2lan },
7779 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7780 board_80003es2lan },
7781
7782 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7783 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7784 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7785 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7786 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7787 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7788 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7789 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7790
7791 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7792 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7793 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7794 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7795 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7796 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7797 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7798 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7799 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7800
7801 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7802 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7803 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7804
7805 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7806 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7807 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7808
7809 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7810 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7811 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7812 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7813
7814 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7815 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7816
7817 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7818 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7819 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7820 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7821 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7822 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7823 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7824 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7825 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7826 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7827 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7828 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7829 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7830 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7831 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7832 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7833 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7834 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM6), board_pch_cnp },
7835 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V6), board_pch_cnp },
7836 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_LM7), board_pch_cnp },
7837 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CNP_I219_V7), board_pch_cnp },
7838 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM8), board_pch_cnp },
7839 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V8), board_pch_cnp },
7840 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_LM9), board_pch_cnp },
7841 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ICP_I219_V9), board_pch_cnp },
7842 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM10), board_pch_cnp },
7843 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V10), board_pch_cnp },
7844 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM11), board_pch_cnp },
7845 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V11), board_pch_cnp },
7846 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_LM12), board_pch_spt },
7847 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_CMP_I219_V12), board_pch_spt },
7848 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM13), board_pch_tgp },
7849 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V13), board_pch_tgp },
7850 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM14), board_pch_tgp },
7851 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V14), board_pch_tgp },
7852 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_LM15), board_pch_tgp },
7853 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_TGP_I219_V15), board_pch_tgp },
7854 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM16), board_pch_tgp },
7855 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V16), board_pch_tgp },
7856 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_LM17), board_pch_tgp },
7857 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_ADP_I219_V17), board_pch_tgp },
7858 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM18), board_pch_tgp },
7859 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V18), board_pch_tgp },
7860 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_LM19), board_pch_tgp },
7861 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_MTP_I219_V19), board_pch_tgp },
7862
7863 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7864};
7865MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7866
7867static const struct dev_pm_ops e1000_pm_ops = {
7868#ifdef CONFIG_PM_SLEEP
7869 .prepare = e1000e_pm_prepare,
7870 .suspend = e1000e_pm_suspend,
7871 .resume = e1000e_pm_resume,
7872 .freeze = e1000e_pm_freeze,
7873 .thaw = e1000e_pm_thaw,
7874 .poweroff = e1000e_pm_suspend,
7875 .restore = e1000e_pm_resume,
7876#endif
7877 SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7878 e1000e_pm_runtime_idle)
7879};
7880
7881/* PCI Device API Driver */
7882static struct pci_driver e1000_driver = {
7883 .name = e1000e_driver_name,
7884 .id_table = e1000_pci_tbl,
7885 .probe = e1000_probe,
7886 .remove = e1000_remove,
7887 .driver = {
7888 .pm = &e1000_pm_ops,
7889 },
7890 .shutdown = e1000_shutdown,
7891 .err_handler = &e1000_err_handler
7892};
7893
7894/**
7895 * e1000_init_module - Driver Registration Routine
7896 *
7897 * e1000_init_module is the first routine called when the driver is
7898 * loaded. All it does is register with the PCI subsystem.
7899 **/
7900static int __init e1000_init_module(void)
7901{
7902 pr_info("Intel(R) PRO/1000 Network Driver\n");
7903 pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7904
7905 return pci_register_driver(&e1000_driver);
7906}
7907module_init(e1000_init_module);
7908
7909/**
7910 * e1000_exit_module - Driver Exit Cleanup Routine
7911 *
7912 * e1000_exit_module is called just before the driver is removed
7913 * from memory.
7914 **/
7915static void __exit e1000_exit_module(void)
7916{
7917 pci_unregister_driver(&e1000_driver);
7918}
7919module_exit(e1000_exit_module);
7920
7921MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7922MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7923MODULE_LICENSE("GPL v2");
7924
7925/* netdev.c */