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1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2012 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/interrupt.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
42#include <linux/slab.h>
43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/mii.h>
46#include <linux/ethtool.h>
47#include <linux/if_vlan.h>
48#include <linux/cpu.h>
49#include <linux/smp.h>
50#include <linux/pm_qos.h>
51#include <linux/pm_runtime.h>
52#include <linux/aer.h>
53#include <linux/prefetch.h>
54
55#include "e1000.h"
56
57#define DRV_EXTRAVERSION "-k"
58
59#define DRV_VERSION "2.0.0" DRV_EXTRAVERSION
60char e1000e_driver_name[] = "e1000e";
61const char e1000e_driver_version[] = DRV_VERSION;
62
63#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
64static int debug = -1;
65module_param(debug, int, 0);
66MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
67
68static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state);
69
70static const struct e1000_info *e1000_info_tbl[] = {
71 [board_82571] = &e1000_82571_info,
72 [board_82572] = &e1000_82572_info,
73 [board_82573] = &e1000_82573_info,
74 [board_82574] = &e1000_82574_info,
75 [board_82583] = &e1000_82583_info,
76 [board_80003es2lan] = &e1000_es2_info,
77 [board_ich8lan] = &e1000_ich8_info,
78 [board_ich9lan] = &e1000_ich9_info,
79 [board_ich10lan] = &e1000_ich10_info,
80 [board_pchlan] = &e1000_pch_info,
81 [board_pch2lan] = &e1000_pch2_info,
82 [board_pch_lpt] = &e1000_pch_lpt_info,
83};
84
85struct e1000_reg_info {
86 u32 ofs;
87 char *name;
88};
89
90#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
91#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
92#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
93#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
94#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
95
96#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
97#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
98#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
99#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
100#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
101
102static const struct e1000_reg_info e1000_reg_info_tbl[] = {
103
104 /* General Registers */
105 {E1000_CTRL, "CTRL"},
106 {E1000_STATUS, "STATUS"},
107 {E1000_CTRL_EXT, "CTRL_EXT"},
108
109 /* Interrupt Registers */
110 {E1000_ICR, "ICR"},
111
112 /* Rx Registers */
113 {E1000_RCTL, "RCTL"},
114 {E1000_RDLEN(0), "RDLEN"},
115 {E1000_RDH(0), "RDH"},
116 {E1000_RDT(0), "RDT"},
117 {E1000_RDTR, "RDTR"},
118 {E1000_RXDCTL(0), "RXDCTL"},
119 {E1000_ERT, "ERT"},
120 {E1000_RDBAL(0), "RDBAL"},
121 {E1000_RDBAH(0), "RDBAH"},
122 {E1000_RDFH, "RDFH"},
123 {E1000_RDFT, "RDFT"},
124 {E1000_RDFHS, "RDFHS"},
125 {E1000_RDFTS, "RDFTS"},
126 {E1000_RDFPC, "RDFPC"},
127
128 /* Tx Registers */
129 {E1000_TCTL, "TCTL"},
130 {E1000_TDBAL(0), "TDBAL"},
131 {E1000_TDBAH(0), "TDBAH"},
132 {E1000_TDLEN(0), "TDLEN"},
133 {E1000_TDH(0), "TDH"},
134 {E1000_TDT(0), "TDT"},
135 {E1000_TIDV, "TIDV"},
136 {E1000_TXDCTL(0), "TXDCTL"},
137 {E1000_TADV, "TADV"},
138 {E1000_TARC(0), "TARC"},
139 {E1000_TDFH, "TDFH"},
140 {E1000_TDFT, "TDFT"},
141 {E1000_TDFHS, "TDFHS"},
142 {E1000_TDFTS, "TDFTS"},
143 {E1000_TDFPC, "TDFPC"},
144
145 /* List Terminator */
146 {0, NULL}
147};
148
149/*
150 * e1000_regdump - register printout routine
151 */
152static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
153{
154 int n = 0;
155 char rname[16];
156 u32 regs[8];
157
158 switch (reginfo->ofs) {
159 case E1000_RXDCTL(0):
160 for (n = 0; n < 2; n++)
161 regs[n] = __er32(hw, E1000_RXDCTL(n));
162 break;
163 case E1000_TXDCTL(0):
164 for (n = 0; n < 2; n++)
165 regs[n] = __er32(hw, E1000_TXDCTL(n));
166 break;
167 case E1000_TARC(0):
168 for (n = 0; n < 2; n++)
169 regs[n] = __er32(hw, E1000_TARC(n));
170 break;
171 default:
172 pr_info("%-15s %08x\n",
173 reginfo->name, __er32(hw, reginfo->ofs));
174 return;
175 }
176
177 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
178 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
179}
180
181/*
182 * e1000e_dump - Print registers, Tx-ring and Rx-ring
183 */
184static void e1000e_dump(struct e1000_adapter *adapter)
185{
186 struct net_device *netdev = adapter->netdev;
187 struct e1000_hw *hw = &adapter->hw;
188 struct e1000_reg_info *reginfo;
189 struct e1000_ring *tx_ring = adapter->tx_ring;
190 struct e1000_tx_desc *tx_desc;
191 struct my_u0 {
192 __le64 a;
193 __le64 b;
194 } *u0;
195 struct e1000_buffer *buffer_info;
196 struct e1000_ring *rx_ring = adapter->rx_ring;
197 union e1000_rx_desc_packet_split *rx_desc_ps;
198 union e1000_rx_desc_extended *rx_desc;
199 struct my_u1 {
200 __le64 a;
201 __le64 b;
202 __le64 c;
203 __le64 d;
204 } *u1;
205 u32 staterr;
206 int i = 0;
207
208 if (!netif_msg_hw(adapter))
209 return;
210
211 /* Print netdevice Info */
212 if (netdev) {
213 dev_info(&adapter->pdev->dev, "Net device Info\n");
214 pr_info("Device Name state trans_start last_rx\n");
215 pr_info("%-15s %016lX %016lX %016lX\n",
216 netdev->name, netdev->state, netdev->trans_start,
217 netdev->last_rx);
218 }
219
220 /* Print Registers */
221 dev_info(&adapter->pdev->dev, "Register Dump\n");
222 pr_info(" Register Name Value\n");
223 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
224 reginfo->name; reginfo++) {
225 e1000_regdump(hw, reginfo);
226 }
227
228 /* Print Tx Ring Summary */
229 if (!netdev || !netif_running(netdev))
230 return;
231
232 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
233 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
234 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
235 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
236 0, tx_ring->next_to_use, tx_ring->next_to_clean,
237 (unsigned long long)buffer_info->dma,
238 buffer_info->length,
239 buffer_info->next_to_watch,
240 (unsigned long long)buffer_info->time_stamp);
241
242 /* Print Tx Ring */
243 if (!netif_msg_tx_done(adapter))
244 goto rx_ring_summary;
245
246 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
247
248 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
249 *
250 * Legacy Transmit Descriptor
251 * +--------------------------------------------------------------+
252 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
253 * +--------------------------------------------------------------+
254 * 8 | Special | CSS | Status | CMD | CSO | Length |
255 * +--------------------------------------------------------------+
256 * 63 48 47 36 35 32 31 24 23 16 15 0
257 *
258 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
259 * 63 48 47 40 39 32 31 16 15 8 7 0
260 * +----------------------------------------------------------------+
261 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
262 * +----------------------------------------------------------------+
263 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
264 * +----------------------------------------------------------------+
265 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
266 *
267 * Extended Data Descriptor (DTYP=0x1)
268 * +----------------------------------------------------------------+
269 * 0 | Buffer Address [63:0] |
270 * +----------------------------------------------------------------+
271 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
272 * +----------------------------------------------------------------+
273 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
274 */
275 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
276 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
277 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
278 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
279 const char *next_desc;
280 tx_desc = E1000_TX_DESC(*tx_ring, i);
281 buffer_info = &tx_ring->buffer_info[i];
282 u0 = (struct my_u0 *)tx_desc;
283 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
284 next_desc = " NTC/U";
285 else if (i == tx_ring->next_to_use)
286 next_desc = " NTU";
287 else if (i == tx_ring->next_to_clean)
288 next_desc = " NTC";
289 else
290 next_desc = "";
291 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
292 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
293 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
294 i,
295 (unsigned long long)le64_to_cpu(u0->a),
296 (unsigned long long)le64_to_cpu(u0->b),
297 (unsigned long long)buffer_info->dma,
298 buffer_info->length, buffer_info->next_to_watch,
299 (unsigned long long)buffer_info->time_stamp,
300 buffer_info->skb, next_desc);
301
302 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
303 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
304 16, 1, phys_to_virt(buffer_info->dma),
305 buffer_info->length, true);
306 }
307
308 /* Print Rx Ring Summary */
309rx_ring_summary:
310 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
311 pr_info("Queue [NTU] [NTC]\n");
312 pr_info(" %5d %5X %5X\n",
313 0, rx_ring->next_to_use, rx_ring->next_to_clean);
314
315 /* Print Rx Ring */
316 if (!netif_msg_rx_status(adapter))
317 return;
318
319 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
320 switch (adapter->rx_ps_pages) {
321 case 1:
322 case 2:
323 case 3:
324 /* [Extended] Packet Split Receive Descriptor Format
325 *
326 * +-----------------------------------------------------+
327 * 0 | Buffer Address 0 [63:0] |
328 * +-----------------------------------------------------+
329 * 8 | Buffer Address 1 [63:0] |
330 * +-----------------------------------------------------+
331 * 16 | Buffer Address 2 [63:0] |
332 * +-----------------------------------------------------+
333 * 24 | Buffer Address 3 [63:0] |
334 * +-----------------------------------------------------+
335 */
336 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
337 /* [Extended] Receive Descriptor (Write-Back) Format
338 *
339 * 63 48 47 32 31 13 12 8 7 4 3 0
340 * +------------------------------------------------------+
341 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
342 * | Checksum | Ident | | Queue | | Type |
343 * +------------------------------------------------------+
344 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
345 * +------------------------------------------------------+
346 * 63 48 47 32 31 20 19 0
347 */
348 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
349 for (i = 0; i < rx_ring->count; i++) {
350 const char *next_desc;
351 buffer_info = &rx_ring->buffer_info[i];
352 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
353 u1 = (struct my_u1 *)rx_desc_ps;
354 staterr =
355 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
356
357 if (i == rx_ring->next_to_use)
358 next_desc = " NTU";
359 else if (i == rx_ring->next_to_clean)
360 next_desc = " NTC";
361 else
362 next_desc = "";
363
364 if (staterr & E1000_RXD_STAT_DD) {
365 /* Descriptor Done */
366 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
367 "RWB", i,
368 (unsigned long long)le64_to_cpu(u1->a),
369 (unsigned long long)le64_to_cpu(u1->b),
370 (unsigned long long)le64_to_cpu(u1->c),
371 (unsigned long long)le64_to_cpu(u1->d),
372 buffer_info->skb, next_desc);
373 } else {
374 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
375 "R ", i,
376 (unsigned long long)le64_to_cpu(u1->a),
377 (unsigned long long)le64_to_cpu(u1->b),
378 (unsigned long long)le64_to_cpu(u1->c),
379 (unsigned long long)le64_to_cpu(u1->d),
380 (unsigned long long)buffer_info->dma,
381 buffer_info->skb, next_desc);
382
383 if (netif_msg_pktdata(adapter))
384 print_hex_dump(KERN_INFO, "",
385 DUMP_PREFIX_ADDRESS, 16, 1,
386 phys_to_virt(buffer_info->dma),
387 adapter->rx_ps_bsize0, true);
388 }
389 }
390 break;
391 default:
392 case 0:
393 /* Extended Receive Descriptor (Read) Format
394 *
395 * +-----------------------------------------------------+
396 * 0 | Buffer Address [63:0] |
397 * +-----------------------------------------------------+
398 * 8 | Reserved |
399 * +-----------------------------------------------------+
400 */
401 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
402 /* Extended Receive Descriptor (Write-Back) Format
403 *
404 * 63 48 47 32 31 24 23 4 3 0
405 * +------------------------------------------------------+
406 * | RSS Hash | | | |
407 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
408 * | Packet | IP | | | Type |
409 * | Checksum | Ident | | | |
410 * +------------------------------------------------------+
411 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
412 * +------------------------------------------------------+
413 * 63 48 47 32 31 20 19 0
414 */
415 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
416
417 for (i = 0; i < rx_ring->count; i++) {
418 const char *next_desc;
419
420 buffer_info = &rx_ring->buffer_info[i];
421 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
422 u1 = (struct my_u1 *)rx_desc;
423 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
424
425 if (i == rx_ring->next_to_use)
426 next_desc = " NTU";
427 else if (i == rx_ring->next_to_clean)
428 next_desc = " NTC";
429 else
430 next_desc = "";
431
432 if (staterr & E1000_RXD_STAT_DD) {
433 /* Descriptor Done */
434 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
435 "RWB", i,
436 (unsigned long long)le64_to_cpu(u1->a),
437 (unsigned long long)le64_to_cpu(u1->b),
438 buffer_info->skb, next_desc);
439 } else {
440 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
441 "R ", i,
442 (unsigned long long)le64_to_cpu(u1->a),
443 (unsigned long long)le64_to_cpu(u1->b),
444 (unsigned long long)buffer_info->dma,
445 buffer_info->skb, next_desc);
446
447 if (netif_msg_pktdata(adapter))
448 print_hex_dump(KERN_INFO, "",
449 DUMP_PREFIX_ADDRESS, 16,
450 1,
451 phys_to_virt
452 (buffer_info->dma),
453 adapter->rx_buffer_len,
454 true);
455 }
456 }
457 }
458}
459
460/**
461 * e1000_desc_unused - calculate if we have unused descriptors
462 **/
463static int e1000_desc_unused(struct e1000_ring *ring)
464{
465 if (ring->next_to_clean > ring->next_to_use)
466 return ring->next_to_clean - ring->next_to_use - 1;
467
468 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
469}
470
471/**
472 * e1000_receive_skb - helper function to handle Rx indications
473 * @adapter: board private structure
474 * @status: descriptor status field as written by hardware
475 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
476 * @skb: pointer to sk_buff to be indicated to stack
477 **/
478static void e1000_receive_skb(struct e1000_adapter *adapter,
479 struct net_device *netdev, struct sk_buff *skb,
480 u8 status, __le16 vlan)
481{
482 u16 tag = le16_to_cpu(vlan);
483 skb->protocol = eth_type_trans(skb, netdev);
484
485 if (status & E1000_RXD_STAT_VP)
486 __vlan_hwaccel_put_tag(skb, tag);
487
488 napi_gro_receive(&adapter->napi, skb);
489}
490
491/**
492 * e1000_rx_checksum - Receive Checksum Offload
493 * @adapter: board private structure
494 * @status_err: receive descriptor status and error fields
495 * @csum: receive descriptor csum field
496 * @sk_buff: socket buffer with received data
497 **/
498static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
499 struct sk_buff *skb)
500{
501 u16 status = (u16)status_err;
502 u8 errors = (u8)(status_err >> 24);
503
504 skb_checksum_none_assert(skb);
505
506 /* Rx checksum disabled */
507 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
508 return;
509
510 /* Ignore Checksum bit is set */
511 if (status & E1000_RXD_STAT_IXSM)
512 return;
513
514 /* TCP/UDP checksum error bit or IP checksum error bit is set */
515 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
516 /* let the stack verify checksum errors */
517 adapter->hw_csum_err++;
518 return;
519 }
520
521 /* TCP/UDP Checksum has not been calculated */
522 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
523 return;
524
525 /* It must be a TCP or UDP packet with a valid checksum */
526 skb->ip_summed = CHECKSUM_UNNECESSARY;
527 adapter->hw_csum_good++;
528}
529
530static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
531{
532 struct e1000_adapter *adapter = rx_ring->adapter;
533 struct e1000_hw *hw = &adapter->hw;
534 s32 ret_val = __ew32_prepare(hw);
535
536 writel(i, rx_ring->tail);
537
538 if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
539 u32 rctl = er32(RCTL);
540 ew32(RCTL, rctl & ~E1000_RCTL_EN);
541 e_err("ME firmware caused invalid RDT - resetting\n");
542 schedule_work(&adapter->reset_task);
543 }
544}
545
546static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
547{
548 struct e1000_adapter *adapter = tx_ring->adapter;
549 struct e1000_hw *hw = &adapter->hw;
550 s32 ret_val = __ew32_prepare(hw);
551
552 writel(i, tx_ring->tail);
553
554 if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
555 u32 tctl = er32(TCTL);
556 ew32(TCTL, tctl & ~E1000_TCTL_EN);
557 e_err("ME firmware caused invalid TDT - resetting\n");
558 schedule_work(&adapter->reset_task);
559 }
560}
561
562/**
563 * e1000_alloc_rx_buffers - Replace used receive buffers
564 * @rx_ring: Rx descriptor ring
565 **/
566static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
567 int cleaned_count, gfp_t gfp)
568{
569 struct e1000_adapter *adapter = rx_ring->adapter;
570 struct net_device *netdev = adapter->netdev;
571 struct pci_dev *pdev = adapter->pdev;
572 union e1000_rx_desc_extended *rx_desc;
573 struct e1000_buffer *buffer_info;
574 struct sk_buff *skb;
575 unsigned int i;
576 unsigned int bufsz = adapter->rx_buffer_len;
577
578 i = rx_ring->next_to_use;
579 buffer_info = &rx_ring->buffer_info[i];
580
581 while (cleaned_count--) {
582 skb = buffer_info->skb;
583 if (skb) {
584 skb_trim(skb, 0);
585 goto map_skb;
586 }
587
588 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
589 if (!skb) {
590 /* Better luck next round */
591 adapter->alloc_rx_buff_failed++;
592 break;
593 }
594
595 buffer_info->skb = skb;
596map_skb:
597 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
598 adapter->rx_buffer_len,
599 DMA_FROM_DEVICE);
600 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
601 dev_err(&pdev->dev, "Rx DMA map failed\n");
602 adapter->rx_dma_failed++;
603 break;
604 }
605
606 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
607 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
608
609 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
610 /*
611 * Force memory writes to complete before letting h/w
612 * know there are new descriptors to fetch. (Only
613 * applicable for weak-ordered memory model archs,
614 * such as IA-64).
615 */
616 wmb();
617 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
618 e1000e_update_rdt_wa(rx_ring, i);
619 else
620 writel(i, rx_ring->tail);
621 }
622 i++;
623 if (i == rx_ring->count)
624 i = 0;
625 buffer_info = &rx_ring->buffer_info[i];
626 }
627
628 rx_ring->next_to_use = i;
629}
630
631/**
632 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
633 * @rx_ring: Rx descriptor ring
634 **/
635static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
636 int cleaned_count, gfp_t gfp)
637{
638 struct e1000_adapter *adapter = rx_ring->adapter;
639 struct net_device *netdev = adapter->netdev;
640 struct pci_dev *pdev = adapter->pdev;
641 union e1000_rx_desc_packet_split *rx_desc;
642 struct e1000_buffer *buffer_info;
643 struct e1000_ps_page *ps_page;
644 struct sk_buff *skb;
645 unsigned int i, j;
646
647 i = rx_ring->next_to_use;
648 buffer_info = &rx_ring->buffer_info[i];
649
650 while (cleaned_count--) {
651 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
652
653 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
654 ps_page = &buffer_info->ps_pages[j];
655 if (j >= adapter->rx_ps_pages) {
656 /* all unused desc entries get hw null ptr */
657 rx_desc->read.buffer_addr[j + 1] =
658 ~cpu_to_le64(0);
659 continue;
660 }
661 if (!ps_page->page) {
662 ps_page->page = alloc_page(gfp);
663 if (!ps_page->page) {
664 adapter->alloc_rx_buff_failed++;
665 goto no_buffers;
666 }
667 ps_page->dma = dma_map_page(&pdev->dev,
668 ps_page->page,
669 0, PAGE_SIZE,
670 DMA_FROM_DEVICE);
671 if (dma_mapping_error(&pdev->dev,
672 ps_page->dma)) {
673 dev_err(&adapter->pdev->dev,
674 "Rx DMA page map failed\n");
675 adapter->rx_dma_failed++;
676 goto no_buffers;
677 }
678 }
679 /*
680 * Refresh the desc even if buffer_addrs
681 * didn't change because each write-back
682 * erases this info.
683 */
684 rx_desc->read.buffer_addr[j + 1] =
685 cpu_to_le64(ps_page->dma);
686 }
687
688 skb = __netdev_alloc_skb_ip_align(netdev,
689 adapter->rx_ps_bsize0,
690 gfp);
691
692 if (!skb) {
693 adapter->alloc_rx_buff_failed++;
694 break;
695 }
696
697 buffer_info->skb = skb;
698 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
699 adapter->rx_ps_bsize0,
700 DMA_FROM_DEVICE);
701 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
702 dev_err(&pdev->dev, "Rx DMA map failed\n");
703 adapter->rx_dma_failed++;
704 /* cleanup skb */
705 dev_kfree_skb_any(skb);
706 buffer_info->skb = NULL;
707 break;
708 }
709
710 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
711
712 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
713 /*
714 * Force memory writes to complete before letting h/w
715 * know there are new descriptors to fetch. (Only
716 * applicable for weak-ordered memory model archs,
717 * such as IA-64).
718 */
719 wmb();
720 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
721 e1000e_update_rdt_wa(rx_ring, i << 1);
722 else
723 writel(i << 1, rx_ring->tail);
724 }
725
726 i++;
727 if (i == rx_ring->count)
728 i = 0;
729 buffer_info = &rx_ring->buffer_info[i];
730 }
731
732no_buffers:
733 rx_ring->next_to_use = i;
734}
735
736/**
737 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
738 * @rx_ring: Rx descriptor ring
739 * @cleaned_count: number of buffers to allocate this pass
740 **/
741
742static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
743 int cleaned_count, gfp_t gfp)
744{
745 struct e1000_adapter *adapter = rx_ring->adapter;
746 struct net_device *netdev = adapter->netdev;
747 struct pci_dev *pdev = adapter->pdev;
748 union e1000_rx_desc_extended *rx_desc;
749 struct e1000_buffer *buffer_info;
750 struct sk_buff *skb;
751 unsigned int i;
752 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
753
754 i = rx_ring->next_to_use;
755 buffer_info = &rx_ring->buffer_info[i];
756
757 while (cleaned_count--) {
758 skb = buffer_info->skb;
759 if (skb) {
760 skb_trim(skb, 0);
761 goto check_page;
762 }
763
764 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
765 if (unlikely(!skb)) {
766 /* Better luck next round */
767 adapter->alloc_rx_buff_failed++;
768 break;
769 }
770
771 buffer_info->skb = skb;
772check_page:
773 /* allocate a new page if necessary */
774 if (!buffer_info->page) {
775 buffer_info->page = alloc_page(gfp);
776 if (unlikely(!buffer_info->page)) {
777 adapter->alloc_rx_buff_failed++;
778 break;
779 }
780 }
781
782 if (!buffer_info->dma)
783 buffer_info->dma = dma_map_page(&pdev->dev,
784 buffer_info->page, 0,
785 PAGE_SIZE,
786 DMA_FROM_DEVICE);
787
788 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
789 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
790
791 if (unlikely(++i == rx_ring->count))
792 i = 0;
793 buffer_info = &rx_ring->buffer_info[i];
794 }
795
796 if (likely(rx_ring->next_to_use != i)) {
797 rx_ring->next_to_use = i;
798 if (unlikely(i-- == 0))
799 i = (rx_ring->count - 1);
800
801 /* Force memory writes to complete before letting h/w
802 * know there are new descriptors to fetch. (Only
803 * applicable for weak-ordered memory model archs,
804 * such as IA-64). */
805 wmb();
806 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
807 e1000e_update_rdt_wa(rx_ring, i);
808 else
809 writel(i, rx_ring->tail);
810 }
811}
812
813static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
814 struct sk_buff *skb)
815{
816 if (netdev->features & NETIF_F_RXHASH)
817 skb->rxhash = le32_to_cpu(rss);
818}
819
820/**
821 * e1000_clean_rx_irq - Send received data up the network stack
822 * @rx_ring: Rx descriptor ring
823 *
824 * the return value indicates whether actual cleaning was done, there
825 * is no guarantee that everything was cleaned
826 **/
827static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
828 int work_to_do)
829{
830 struct e1000_adapter *adapter = rx_ring->adapter;
831 struct net_device *netdev = adapter->netdev;
832 struct pci_dev *pdev = adapter->pdev;
833 struct e1000_hw *hw = &adapter->hw;
834 union e1000_rx_desc_extended *rx_desc, *next_rxd;
835 struct e1000_buffer *buffer_info, *next_buffer;
836 u32 length, staterr;
837 unsigned int i;
838 int cleaned_count = 0;
839 bool cleaned = false;
840 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
841
842 i = rx_ring->next_to_clean;
843 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
844 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
845 buffer_info = &rx_ring->buffer_info[i];
846
847 while (staterr & E1000_RXD_STAT_DD) {
848 struct sk_buff *skb;
849
850 if (*work_done >= work_to_do)
851 break;
852 (*work_done)++;
853 rmb(); /* read descriptor and rx_buffer_info after status DD */
854
855 skb = buffer_info->skb;
856 buffer_info->skb = NULL;
857
858 prefetch(skb->data - NET_IP_ALIGN);
859
860 i++;
861 if (i == rx_ring->count)
862 i = 0;
863 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
864 prefetch(next_rxd);
865
866 next_buffer = &rx_ring->buffer_info[i];
867
868 cleaned = true;
869 cleaned_count++;
870 dma_unmap_single(&pdev->dev,
871 buffer_info->dma,
872 adapter->rx_buffer_len,
873 DMA_FROM_DEVICE);
874 buffer_info->dma = 0;
875
876 length = le16_to_cpu(rx_desc->wb.upper.length);
877
878 /*
879 * !EOP means multiple descriptors were used to store a single
880 * packet, if that's the case we need to toss it. In fact, we
881 * need to toss every packet with the EOP bit clear and the
882 * next frame that _does_ have the EOP bit set, as it is by
883 * definition only a frame fragment
884 */
885 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
886 adapter->flags2 |= FLAG2_IS_DISCARDING;
887
888 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
889 /* All receives must fit into a single buffer */
890 e_dbg("Receive packet consumed multiple buffers\n");
891 /* recycle */
892 buffer_info->skb = skb;
893 if (staterr & E1000_RXD_STAT_EOP)
894 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
895 goto next_desc;
896 }
897
898 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
899 !(netdev->features & NETIF_F_RXALL))) {
900 /* recycle */
901 buffer_info->skb = skb;
902 goto next_desc;
903 }
904
905 /* adjust length to remove Ethernet CRC */
906 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
907 /* If configured to store CRC, don't subtract FCS,
908 * but keep the FCS bytes out of the total_rx_bytes
909 * counter
910 */
911 if (netdev->features & NETIF_F_RXFCS)
912 total_rx_bytes -= 4;
913 else
914 length -= 4;
915 }
916
917 total_rx_bytes += length;
918 total_rx_packets++;
919
920 /*
921 * code added for copybreak, this should improve
922 * performance for small packets with large amounts
923 * of reassembly being done in the stack
924 */
925 if (length < copybreak) {
926 struct sk_buff *new_skb =
927 netdev_alloc_skb_ip_align(netdev, length);
928 if (new_skb) {
929 skb_copy_to_linear_data_offset(new_skb,
930 -NET_IP_ALIGN,
931 (skb->data -
932 NET_IP_ALIGN),
933 (length +
934 NET_IP_ALIGN));
935 /* save the skb in buffer_info as good */
936 buffer_info->skb = skb;
937 skb = new_skb;
938 }
939 /* else just continue with the old one */
940 }
941 /* end copybreak code */
942 skb_put(skb, length);
943
944 /* Receive Checksum Offload */
945 e1000_rx_checksum(adapter, staterr, skb);
946
947 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
948
949 e1000_receive_skb(adapter, netdev, skb, staterr,
950 rx_desc->wb.upper.vlan);
951
952next_desc:
953 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
954
955 /* return some buffers to hardware, one at a time is too slow */
956 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
957 adapter->alloc_rx_buf(rx_ring, cleaned_count,
958 GFP_ATOMIC);
959 cleaned_count = 0;
960 }
961
962 /* use prefetched values */
963 rx_desc = next_rxd;
964 buffer_info = next_buffer;
965
966 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
967 }
968 rx_ring->next_to_clean = i;
969
970 cleaned_count = e1000_desc_unused(rx_ring);
971 if (cleaned_count)
972 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
973
974 adapter->total_rx_bytes += total_rx_bytes;
975 adapter->total_rx_packets += total_rx_packets;
976 return cleaned;
977}
978
979static void e1000_put_txbuf(struct e1000_ring *tx_ring,
980 struct e1000_buffer *buffer_info)
981{
982 struct e1000_adapter *adapter = tx_ring->adapter;
983
984 if (buffer_info->dma) {
985 if (buffer_info->mapped_as_page)
986 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
987 buffer_info->length, DMA_TO_DEVICE);
988 else
989 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
990 buffer_info->length, DMA_TO_DEVICE);
991 buffer_info->dma = 0;
992 }
993 if (buffer_info->skb) {
994 dev_kfree_skb_any(buffer_info->skb);
995 buffer_info->skb = NULL;
996 }
997 buffer_info->time_stamp = 0;
998}
999
1000static void e1000_print_hw_hang(struct work_struct *work)
1001{
1002 struct e1000_adapter *adapter = container_of(work,
1003 struct e1000_adapter,
1004 print_hang_task);
1005 struct net_device *netdev = adapter->netdev;
1006 struct e1000_ring *tx_ring = adapter->tx_ring;
1007 unsigned int i = tx_ring->next_to_clean;
1008 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1009 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1010 struct e1000_hw *hw = &adapter->hw;
1011 u16 phy_status, phy_1000t_status, phy_ext_status;
1012 u16 pci_status;
1013
1014 if (test_bit(__E1000_DOWN, &adapter->state))
1015 return;
1016
1017 if (!adapter->tx_hang_recheck &&
1018 (adapter->flags2 & FLAG2_DMA_BURST)) {
1019 /*
1020 * May be block on write-back, flush and detect again
1021 * flush pending descriptor writebacks to memory
1022 */
1023 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1024 /* execute the writes immediately */
1025 e1e_flush();
1026 /*
1027 * Due to rare timing issues, write to TIDV again to ensure
1028 * the write is successful
1029 */
1030 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1031 /* execute the writes immediately */
1032 e1e_flush();
1033 adapter->tx_hang_recheck = true;
1034 return;
1035 }
1036 /* Real hang detected */
1037 adapter->tx_hang_recheck = false;
1038 netif_stop_queue(netdev);
1039
1040 e1e_rphy(hw, PHY_STATUS, &phy_status);
1041 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
1042 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
1043
1044 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1045
1046 /* detected Hardware unit hang */
1047 e_err("Detected Hardware Unit Hang:\n"
1048 " TDH <%x>\n"
1049 " TDT <%x>\n"
1050 " next_to_use <%x>\n"
1051 " next_to_clean <%x>\n"
1052 "buffer_info[next_to_clean]:\n"
1053 " time_stamp <%lx>\n"
1054 " next_to_watch <%x>\n"
1055 " jiffies <%lx>\n"
1056 " next_to_watch.status <%x>\n"
1057 "MAC Status <%x>\n"
1058 "PHY Status <%x>\n"
1059 "PHY 1000BASE-T Status <%x>\n"
1060 "PHY Extended Status <%x>\n"
1061 "PCI Status <%x>\n",
1062 readl(tx_ring->head),
1063 readl(tx_ring->tail),
1064 tx_ring->next_to_use,
1065 tx_ring->next_to_clean,
1066 tx_ring->buffer_info[eop].time_stamp,
1067 eop,
1068 jiffies,
1069 eop_desc->upper.fields.status,
1070 er32(STATUS),
1071 phy_status,
1072 phy_1000t_status,
1073 phy_ext_status,
1074 pci_status);
1075
1076 /* Suggest workaround for known h/w issue */
1077 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1078 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1079}
1080
1081/**
1082 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1083 * @tx_ring: Tx descriptor ring
1084 *
1085 * the return value indicates whether actual cleaning was done, there
1086 * is no guarantee that everything was cleaned
1087 **/
1088static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1089{
1090 struct e1000_adapter *adapter = tx_ring->adapter;
1091 struct net_device *netdev = adapter->netdev;
1092 struct e1000_hw *hw = &adapter->hw;
1093 struct e1000_tx_desc *tx_desc, *eop_desc;
1094 struct e1000_buffer *buffer_info;
1095 unsigned int i, eop;
1096 unsigned int count = 0;
1097 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1098 unsigned int bytes_compl = 0, pkts_compl = 0;
1099
1100 i = tx_ring->next_to_clean;
1101 eop = tx_ring->buffer_info[i].next_to_watch;
1102 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1103
1104 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1105 (count < tx_ring->count)) {
1106 bool cleaned = false;
1107 rmb(); /* read buffer_info after eop_desc */
1108 for (; !cleaned; count++) {
1109 tx_desc = E1000_TX_DESC(*tx_ring, i);
1110 buffer_info = &tx_ring->buffer_info[i];
1111 cleaned = (i == eop);
1112
1113 if (cleaned) {
1114 total_tx_packets += buffer_info->segs;
1115 total_tx_bytes += buffer_info->bytecount;
1116 if (buffer_info->skb) {
1117 bytes_compl += buffer_info->skb->len;
1118 pkts_compl++;
1119 }
1120 }
1121
1122 e1000_put_txbuf(tx_ring, buffer_info);
1123 tx_desc->upper.data = 0;
1124
1125 i++;
1126 if (i == tx_ring->count)
1127 i = 0;
1128 }
1129
1130 if (i == tx_ring->next_to_use)
1131 break;
1132 eop = tx_ring->buffer_info[i].next_to_watch;
1133 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1134 }
1135
1136 tx_ring->next_to_clean = i;
1137
1138 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1139
1140#define TX_WAKE_THRESHOLD 32
1141 if (count && netif_carrier_ok(netdev) &&
1142 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1143 /* Make sure that anybody stopping the queue after this
1144 * sees the new next_to_clean.
1145 */
1146 smp_mb();
1147
1148 if (netif_queue_stopped(netdev) &&
1149 !(test_bit(__E1000_DOWN, &adapter->state))) {
1150 netif_wake_queue(netdev);
1151 ++adapter->restart_queue;
1152 }
1153 }
1154
1155 if (adapter->detect_tx_hung) {
1156 /*
1157 * Detect a transmit hang in hardware, this serializes the
1158 * check with the clearing of time_stamp and movement of i
1159 */
1160 adapter->detect_tx_hung = false;
1161 if (tx_ring->buffer_info[i].time_stamp &&
1162 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1163 + (adapter->tx_timeout_factor * HZ)) &&
1164 !(er32(STATUS) & E1000_STATUS_TXOFF))
1165 schedule_work(&adapter->print_hang_task);
1166 else
1167 adapter->tx_hang_recheck = false;
1168 }
1169 adapter->total_tx_bytes += total_tx_bytes;
1170 adapter->total_tx_packets += total_tx_packets;
1171 return count < tx_ring->count;
1172}
1173
1174/**
1175 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1176 * @rx_ring: Rx descriptor ring
1177 *
1178 * the return value indicates whether actual cleaning was done, there
1179 * is no guarantee that everything was cleaned
1180 **/
1181static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1182 int work_to_do)
1183{
1184 struct e1000_adapter *adapter = rx_ring->adapter;
1185 struct e1000_hw *hw = &adapter->hw;
1186 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1187 struct net_device *netdev = adapter->netdev;
1188 struct pci_dev *pdev = adapter->pdev;
1189 struct e1000_buffer *buffer_info, *next_buffer;
1190 struct e1000_ps_page *ps_page;
1191 struct sk_buff *skb;
1192 unsigned int i, j;
1193 u32 length, staterr;
1194 int cleaned_count = 0;
1195 bool cleaned = false;
1196 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1197
1198 i = rx_ring->next_to_clean;
1199 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1200 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1201 buffer_info = &rx_ring->buffer_info[i];
1202
1203 while (staterr & E1000_RXD_STAT_DD) {
1204 if (*work_done >= work_to_do)
1205 break;
1206 (*work_done)++;
1207 skb = buffer_info->skb;
1208 rmb(); /* read descriptor and rx_buffer_info after status DD */
1209
1210 /* in the packet split case this is header only */
1211 prefetch(skb->data - NET_IP_ALIGN);
1212
1213 i++;
1214 if (i == rx_ring->count)
1215 i = 0;
1216 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1217 prefetch(next_rxd);
1218
1219 next_buffer = &rx_ring->buffer_info[i];
1220
1221 cleaned = true;
1222 cleaned_count++;
1223 dma_unmap_single(&pdev->dev, buffer_info->dma,
1224 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1225 buffer_info->dma = 0;
1226
1227 /* see !EOP comment in other Rx routine */
1228 if (!(staterr & E1000_RXD_STAT_EOP))
1229 adapter->flags2 |= FLAG2_IS_DISCARDING;
1230
1231 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1232 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1233 dev_kfree_skb_irq(skb);
1234 if (staterr & E1000_RXD_STAT_EOP)
1235 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1236 goto next_desc;
1237 }
1238
1239 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1240 !(netdev->features & NETIF_F_RXALL))) {
1241 dev_kfree_skb_irq(skb);
1242 goto next_desc;
1243 }
1244
1245 length = le16_to_cpu(rx_desc->wb.middle.length0);
1246
1247 if (!length) {
1248 e_dbg("Last part of the packet spanning multiple descriptors\n");
1249 dev_kfree_skb_irq(skb);
1250 goto next_desc;
1251 }
1252
1253 /* Good Receive */
1254 skb_put(skb, length);
1255
1256 {
1257 /*
1258 * this looks ugly, but it seems compiler issues make
1259 * it more efficient than reusing j
1260 */
1261 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1262
1263 /*
1264 * page alloc/put takes too long and effects small
1265 * packet throughput, so unsplit small packets and
1266 * save the alloc/put only valid in softirq (napi)
1267 * context to call kmap_*
1268 */
1269 if (l1 && (l1 <= copybreak) &&
1270 ((length + l1) <= adapter->rx_ps_bsize0)) {
1271 u8 *vaddr;
1272
1273 ps_page = &buffer_info->ps_pages[0];
1274
1275 /*
1276 * there is no documentation about how to call
1277 * kmap_atomic, so we can't hold the mapping
1278 * very long
1279 */
1280 dma_sync_single_for_cpu(&pdev->dev,
1281 ps_page->dma,
1282 PAGE_SIZE,
1283 DMA_FROM_DEVICE);
1284 vaddr = kmap_atomic(ps_page->page);
1285 memcpy(skb_tail_pointer(skb), vaddr, l1);
1286 kunmap_atomic(vaddr);
1287 dma_sync_single_for_device(&pdev->dev,
1288 ps_page->dma,
1289 PAGE_SIZE,
1290 DMA_FROM_DEVICE);
1291
1292 /* remove the CRC */
1293 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1294 if (!(netdev->features & NETIF_F_RXFCS))
1295 l1 -= 4;
1296 }
1297
1298 skb_put(skb, l1);
1299 goto copydone;
1300 } /* if */
1301 }
1302
1303 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1304 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1305 if (!length)
1306 break;
1307
1308 ps_page = &buffer_info->ps_pages[j];
1309 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1310 DMA_FROM_DEVICE);
1311 ps_page->dma = 0;
1312 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1313 ps_page->page = NULL;
1314 skb->len += length;
1315 skb->data_len += length;
1316 skb->truesize += PAGE_SIZE;
1317 }
1318
1319 /* strip the ethernet crc, problem is we're using pages now so
1320 * this whole operation can get a little cpu intensive
1321 */
1322 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1323 if (!(netdev->features & NETIF_F_RXFCS))
1324 pskb_trim(skb, skb->len - 4);
1325 }
1326
1327copydone:
1328 total_rx_bytes += skb->len;
1329 total_rx_packets++;
1330
1331 e1000_rx_checksum(adapter, staterr, skb);
1332
1333 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1334
1335 if (rx_desc->wb.upper.header_status &
1336 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1337 adapter->rx_hdr_split++;
1338
1339 e1000_receive_skb(adapter, netdev, skb,
1340 staterr, rx_desc->wb.middle.vlan);
1341
1342next_desc:
1343 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1344 buffer_info->skb = NULL;
1345
1346 /* return some buffers to hardware, one at a time is too slow */
1347 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1348 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1349 GFP_ATOMIC);
1350 cleaned_count = 0;
1351 }
1352
1353 /* use prefetched values */
1354 rx_desc = next_rxd;
1355 buffer_info = next_buffer;
1356
1357 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1358 }
1359 rx_ring->next_to_clean = i;
1360
1361 cleaned_count = e1000_desc_unused(rx_ring);
1362 if (cleaned_count)
1363 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1364
1365 adapter->total_rx_bytes += total_rx_bytes;
1366 adapter->total_rx_packets += total_rx_packets;
1367 return cleaned;
1368}
1369
1370/**
1371 * e1000_consume_page - helper function
1372 **/
1373static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1374 u16 length)
1375{
1376 bi->page = NULL;
1377 skb->len += length;
1378 skb->data_len += length;
1379 skb->truesize += PAGE_SIZE;
1380}
1381
1382/**
1383 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1384 * @adapter: board private structure
1385 *
1386 * the return value indicates whether actual cleaning was done, there
1387 * is no guarantee that everything was cleaned
1388 **/
1389static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1390 int work_to_do)
1391{
1392 struct e1000_adapter *adapter = rx_ring->adapter;
1393 struct net_device *netdev = adapter->netdev;
1394 struct pci_dev *pdev = adapter->pdev;
1395 union e1000_rx_desc_extended *rx_desc, *next_rxd;
1396 struct e1000_buffer *buffer_info, *next_buffer;
1397 u32 length, staterr;
1398 unsigned int i;
1399 int cleaned_count = 0;
1400 bool cleaned = false;
1401 unsigned int total_rx_bytes=0, total_rx_packets=0;
1402
1403 i = rx_ring->next_to_clean;
1404 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1405 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1406 buffer_info = &rx_ring->buffer_info[i];
1407
1408 while (staterr & E1000_RXD_STAT_DD) {
1409 struct sk_buff *skb;
1410
1411 if (*work_done >= work_to_do)
1412 break;
1413 (*work_done)++;
1414 rmb(); /* read descriptor and rx_buffer_info after status DD */
1415
1416 skb = buffer_info->skb;
1417 buffer_info->skb = NULL;
1418
1419 ++i;
1420 if (i == rx_ring->count)
1421 i = 0;
1422 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1423 prefetch(next_rxd);
1424
1425 next_buffer = &rx_ring->buffer_info[i];
1426
1427 cleaned = true;
1428 cleaned_count++;
1429 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1430 DMA_FROM_DEVICE);
1431 buffer_info->dma = 0;
1432
1433 length = le16_to_cpu(rx_desc->wb.upper.length);
1434
1435 /* errors is only valid for DD + EOP descriptors */
1436 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1437 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1438 !(netdev->features & NETIF_F_RXALL)))) {
1439 /* recycle both page and skb */
1440 buffer_info->skb = skb;
1441 /* an error means any chain goes out the window too */
1442 if (rx_ring->rx_skb_top)
1443 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1444 rx_ring->rx_skb_top = NULL;
1445 goto next_desc;
1446 }
1447
1448#define rxtop (rx_ring->rx_skb_top)
1449 if (!(staterr & E1000_RXD_STAT_EOP)) {
1450 /* this descriptor is only the beginning (or middle) */
1451 if (!rxtop) {
1452 /* this is the beginning of a chain */
1453 rxtop = skb;
1454 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1455 0, length);
1456 } else {
1457 /* this is the middle of a chain */
1458 skb_fill_page_desc(rxtop,
1459 skb_shinfo(rxtop)->nr_frags,
1460 buffer_info->page, 0, length);
1461 /* re-use the skb, only consumed the page */
1462 buffer_info->skb = skb;
1463 }
1464 e1000_consume_page(buffer_info, rxtop, length);
1465 goto next_desc;
1466 } else {
1467 if (rxtop) {
1468 /* end of the chain */
1469 skb_fill_page_desc(rxtop,
1470 skb_shinfo(rxtop)->nr_frags,
1471 buffer_info->page, 0, length);
1472 /* re-use the current skb, we only consumed the
1473 * page */
1474 buffer_info->skb = skb;
1475 skb = rxtop;
1476 rxtop = NULL;
1477 e1000_consume_page(buffer_info, skb, length);
1478 } else {
1479 /* no chain, got EOP, this buf is the packet
1480 * copybreak to save the put_page/alloc_page */
1481 if (length <= copybreak &&
1482 skb_tailroom(skb) >= length) {
1483 u8 *vaddr;
1484 vaddr = kmap_atomic(buffer_info->page);
1485 memcpy(skb_tail_pointer(skb), vaddr,
1486 length);
1487 kunmap_atomic(vaddr);
1488 /* re-use the page, so don't erase
1489 * buffer_info->page */
1490 skb_put(skb, length);
1491 } else {
1492 skb_fill_page_desc(skb, 0,
1493 buffer_info->page, 0,
1494 length);
1495 e1000_consume_page(buffer_info, skb,
1496 length);
1497 }
1498 }
1499 }
1500
1501 /* Receive Checksum Offload */
1502 e1000_rx_checksum(adapter, staterr, skb);
1503
1504 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1505
1506 /* probably a little skewed due to removing CRC */
1507 total_rx_bytes += skb->len;
1508 total_rx_packets++;
1509
1510 /* eth type trans needs skb->data to point to something */
1511 if (!pskb_may_pull(skb, ETH_HLEN)) {
1512 e_err("pskb_may_pull failed.\n");
1513 dev_kfree_skb_irq(skb);
1514 goto next_desc;
1515 }
1516
1517 e1000_receive_skb(adapter, netdev, skb, staterr,
1518 rx_desc->wb.upper.vlan);
1519
1520next_desc:
1521 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1522
1523 /* return some buffers to hardware, one at a time is too slow */
1524 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1525 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1526 GFP_ATOMIC);
1527 cleaned_count = 0;
1528 }
1529
1530 /* use prefetched values */
1531 rx_desc = next_rxd;
1532 buffer_info = next_buffer;
1533
1534 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1535 }
1536 rx_ring->next_to_clean = i;
1537
1538 cleaned_count = e1000_desc_unused(rx_ring);
1539 if (cleaned_count)
1540 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1541
1542 adapter->total_rx_bytes += total_rx_bytes;
1543 adapter->total_rx_packets += total_rx_packets;
1544 return cleaned;
1545}
1546
1547/**
1548 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1549 * @rx_ring: Rx descriptor ring
1550 **/
1551static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1552{
1553 struct e1000_adapter *adapter = rx_ring->adapter;
1554 struct e1000_buffer *buffer_info;
1555 struct e1000_ps_page *ps_page;
1556 struct pci_dev *pdev = adapter->pdev;
1557 unsigned int i, j;
1558
1559 /* Free all the Rx ring sk_buffs */
1560 for (i = 0; i < rx_ring->count; i++) {
1561 buffer_info = &rx_ring->buffer_info[i];
1562 if (buffer_info->dma) {
1563 if (adapter->clean_rx == e1000_clean_rx_irq)
1564 dma_unmap_single(&pdev->dev, buffer_info->dma,
1565 adapter->rx_buffer_len,
1566 DMA_FROM_DEVICE);
1567 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1568 dma_unmap_page(&pdev->dev, buffer_info->dma,
1569 PAGE_SIZE,
1570 DMA_FROM_DEVICE);
1571 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1572 dma_unmap_single(&pdev->dev, buffer_info->dma,
1573 adapter->rx_ps_bsize0,
1574 DMA_FROM_DEVICE);
1575 buffer_info->dma = 0;
1576 }
1577
1578 if (buffer_info->page) {
1579 put_page(buffer_info->page);
1580 buffer_info->page = NULL;
1581 }
1582
1583 if (buffer_info->skb) {
1584 dev_kfree_skb(buffer_info->skb);
1585 buffer_info->skb = NULL;
1586 }
1587
1588 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1589 ps_page = &buffer_info->ps_pages[j];
1590 if (!ps_page->page)
1591 break;
1592 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1593 DMA_FROM_DEVICE);
1594 ps_page->dma = 0;
1595 put_page(ps_page->page);
1596 ps_page->page = NULL;
1597 }
1598 }
1599
1600 /* there also may be some cached data from a chained receive */
1601 if (rx_ring->rx_skb_top) {
1602 dev_kfree_skb(rx_ring->rx_skb_top);
1603 rx_ring->rx_skb_top = NULL;
1604 }
1605
1606 /* Zero out the descriptor ring */
1607 memset(rx_ring->desc, 0, rx_ring->size);
1608
1609 rx_ring->next_to_clean = 0;
1610 rx_ring->next_to_use = 0;
1611 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1612
1613 writel(0, rx_ring->head);
1614 if (rx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
1615 e1000e_update_rdt_wa(rx_ring, 0);
1616 else
1617 writel(0, rx_ring->tail);
1618}
1619
1620static void e1000e_downshift_workaround(struct work_struct *work)
1621{
1622 struct e1000_adapter *adapter = container_of(work,
1623 struct e1000_adapter, downshift_task);
1624
1625 if (test_bit(__E1000_DOWN, &adapter->state))
1626 return;
1627
1628 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1629}
1630
1631/**
1632 * e1000_intr_msi - Interrupt Handler
1633 * @irq: interrupt number
1634 * @data: pointer to a network interface device structure
1635 **/
1636static irqreturn_t e1000_intr_msi(int irq, void *data)
1637{
1638 struct net_device *netdev = data;
1639 struct e1000_adapter *adapter = netdev_priv(netdev);
1640 struct e1000_hw *hw = &adapter->hw;
1641 u32 icr = er32(ICR);
1642
1643 /*
1644 * read ICR disables interrupts using IAM
1645 */
1646
1647 if (icr & E1000_ICR_LSC) {
1648 hw->mac.get_link_status = true;
1649 /*
1650 * ICH8 workaround-- Call gig speed drop workaround on cable
1651 * disconnect (LSC) before accessing any PHY registers
1652 */
1653 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1654 (!(er32(STATUS) & E1000_STATUS_LU)))
1655 schedule_work(&adapter->downshift_task);
1656
1657 /*
1658 * 80003ES2LAN workaround-- For packet buffer work-around on
1659 * link down event; disable receives here in the ISR and reset
1660 * adapter in watchdog
1661 */
1662 if (netif_carrier_ok(netdev) &&
1663 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1664 /* disable receives */
1665 u32 rctl = er32(RCTL);
1666 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1667 adapter->flags |= FLAG_RX_RESTART_NOW;
1668 }
1669 /* guard against interrupt when we're going down */
1670 if (!test_bit(__E1000_DOWN, &adapter->state))
1671 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1672 }
1673
1674 if (napi_schedule_prep(&adapter->napi)) {
1675 adapter->total_tx_bytes = 0;
1676 adapter->total_tx_packets = 0;
1677 adapter->total_rx_bytes = 0;
1678 adapter->total_rx_packets = 0;
1679 __napi_schedule(&adapter->napi);
1680 }
1681
1682 return IRQ_HANDLED;
1683}
1684
1685/**
1686 * e1000_intr - Interrupt Handler
1687 * @irq: interrupt number
1688 * @data: pointer to a network interface device structure
1689 **/
1690static irqreturn_t e1000_intr(int irq, void *data)
1691{
1692 struct net_device *netdev = data;
1693 struct e1000_adapter *adapter = netdev_priv(netdev);
1694 struct e1000_hw *hw = &adapter->hw;
1695 u32 rctl, icr = er32(ICR);
1696
1697 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1698 return IRQ_NONE; /* Not our interrupt */
1699
1700 /*
1701 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1702 * not set, then the adapter didn't send an interrupt
1703 */
1704 if (!(icr & E1000_ICR_INT_ASSERTED))
1705 return IRQ_NONE;
1706
1707 /*
1708 * Interrupt Auto-Mask...upon reading ICR,
1709 * interrupts are masked. No need for the
1710 * IMC write
1711 */
1712
1713 if (icr & E1000_ICR_LSC) {
1714 hw->mac.get_link_status = true;
1715 /*
1716 * ICH8 workaround-- Call gig speed drop workaround on cable
1717 * disconnect (LSC) before accessing any PHY registers
1718 */
1719 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1720 (!(er32(STATUS) & E1000_STATUS_LU)))
1721 schedule_work(&adapter->downshift_task);
1722
1723 /*
1724 * 80003ES2LAN workaround--
1725 * For packet buffer work-around on link down event;
1726 * disable receives here in the ISR and
1727 * reset adapter in watchdog
1728 */
1729 if (netif_carrier_ok(netdev) &&
1730 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1731 /* disable receives */
1732 rctl = er32(RCTL);
1733 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1734 adapter->flags |= FLAG_RX_RESTART_NOW;
1735 }
1736 /* guard against interrupt when we're going down */
1737 if (!test_bit(__E1000_DOWN, &adapter->state))
1738 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1739 }
1740
1741 if (napi_schedule_prep(&adapter->napi)) {
1742 adapter->total_tx_bytes = 0;
1743 adapter->total_tx_packets = 0;
1744 adapter->total_rx_bytes = 0;
1745 adapter->total_rx_packets = 0;
1746 __napi_schedule(&adapter->napi);
1747 }
1748
1749 return IRQ_HANDLED;
1750}
1751
1752static irqreturn_t e1000_msix_other(int irq, void *data)
1753{
1754 struct net_device *netdev = data;
1755 struct e1000_adapter *adapter = netdev_priv(netdev);
1756 struct e1000_hw *hw = &adapter->hw;
1757 u32 icr = er32(ICR);
1758
1759 if (!(icr & E1000_ICR_INT_ASSERTED)) {
1760 if (!test_bit(__E1000_DOWN, &adapter->state))
1761 ew32(IMS, E1000_IMS_OTHER);
1762 return IRQ_NONE;
1763 }
1764
1765 if (icr & adapter->eiac_mask)
1766 ew32(ICS, (icr & adapter->eiac_mask));
1767
1768 if (icr & E1000_ICR_OTHER) {
1769 if (!(icr & E1000_ICR_LSC))
1770 goto no_link_interrupt;
1771 hw->mac.get_link_status = true;
1772 /* guard against interrupt when we're going down */
1773 if (!test_bit(__E1000_DOWN, &adapter->state))
1774 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1775 }
1776
1777no_link_interrupt:
1778 if (!test_bit(__E1000_DOWN, &adapter->state))
1779 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
1780
1781 return IRQ_HANDLED;
1782}
1783
1784
1785static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1786{
1787 struct net_device *netdev = data;
1788 struct e1000_adapter *adapter = netdev_priv(netdev);
1789 struct e1000_hw *hw = &adapter->hw;
1790 struct e1000_ring *tx_ring = adapter->tx_ring;
1791
1792
1793 adapter->total_tx_bytes = 0;
1794 adapter->total_tx_packets = 0;
1795
1796 if (!e1000_clean_tx_irq(tx_ring))
1797 /* Ring was not completely cleaned, so fire another interrupt */
1798 ew32(ICS, tx_ring->ims_val);
1799
1800 return IRQ_HANDLED;
1801}
1802
1803static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1804{
1805 struct net_device *netdev = data;
1806 struct e1000_adapter *adapter = netdev_priv(netdev);
1807 struct e1000_ring *rx_ring = adapter->rx_ring;
1808
1809 /* Write the ITR value calculated at the end of the
1810 * previous interrupt.
1811 */
1812 if (rx_ring->set_itr) {
1813 writel(1000000000 / (rx_ring->itr_val * 256),
1814 rx_ring->itr_register);
1815 rx_ring->set_itr = 0;
1816 }
1817
1818 if (napi_schedule_prep(&adapter->napi)) {
1819 adapter->total_rx_bytes = 0;
1820 adapter->total_rx_packets = 0;
1821 __napi_schedule(&adapter->napi);
1822 }
1823 return IRQ_HANDLED;
1824}
1825
1826/**
1827 * e1000_configure_msix - Configure MSI-X hardware
1828 *
1829 * e1000_configure_msix sets up the hardware to properly
1830 * generate MSI-X interrupts.
1831 **/
1832static void e1000_configure_msix(struct e1000_adapter *adapter)
1833{
1834 struct e1000_hw *hw = &adapter->hw;
1835 struct e1000_ring *rx_ring = adapter->rx_ring;
1836 struct e1000_ring *tx_ring = adapter->tx_ring;
1837 int vector = 0;
1838 u32 ctrl_ext, ivar = 0;
1839
1840 adapter->eiac_mask = 0;
1841
1842 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1843 if (hw->mac.type == e1000_82574) {
1844 u32 rfctl = er32(RFCTL);
1845 rfctl |= E1000_RFCTL_ACK_DIS;
1846 ew32(RFCTL, rfctl);
1847 }
1848
1849#define E1000_IVAR_INT_ALLOC_VALID 0x8
1850 /* Configure Rx vector */
1851 rx_ring->ims_val = E1000_IMS_RXQ0;
1852 adapter->eiac_mask |= rx_ring->ims_val;
1853 if (rx_ring->itr_val)
1854 writel(1000000000 / (rx_ring->itr_val * 256),
1855 rx_ring->itr_register);
1856 else
1857 writel(1, rx_ring->itr_register);
1858 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1859
1860 /* Configure Tx vector */
1861 tx_ring->ims_val = E1000_IMS_TXQ0;
1862 vector++;
1863 if (tx_ring->itr_val)
1864 writel(1000000000 / (tx_ring->itr_val * 256),
1865 tx_ring->itr_register);
1866 else
1867 writel(1, tx_ring->itr_register);
1868 adapter->eiac_mask |= tx_ring->ims_val;
1869 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1870
1871 /* set vector for Other Causes, e.g. link changes */
1872 vector++;
1873 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1874 if (rx_ring->itr_val)
1875 writel(1000000000 / (rx_ring->itr_val * 256),
1876 hw->hw_addr + E1000_EITR_82574(vector));
1877 else
1878 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1879
1880 /* Cause Tx interrupts on every write back */
1881 ivar |= (1 << 31);
1882
1883 ew32(IVAR, ivar);
1884
1885 /* enable MSI-X PBA support */
1886 ctrl_ext = er32(CTRL_EXT);
1887 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1888
1889 /* Auto-Mask Other interrupts upon ICR read */
1890#define E1000_EIAC_MASK_82574 0x01F00000
1891 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1892 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1893 ew32(CTRL_EXT, ctrl_ext);
1894 e1e_flush();
1895}
1896
1897void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1898{
1899 if (adapter->msix_entries) {
1900 pci_disable_msix(adapter->pdev);
1901 kfree(adapter->msix_entries);
1902 adapter->msix_entries = NULL;
1903 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1904 pci_disable_msi(adapter->pdev);
1905 adapter->flags &= ~FLAG_MSI_ENABLED;
1906 }
1907}
1908
1909/**
1910 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1911 *
1912 * Attempt to configure interrupts using the best available
1913 * capabilities of the hardware and kernel.
1914 **/
1915void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1916{
1917 int err;
1918 int i;
1919
1920 switch (adapter->int_mode) {
1921 case E1000E_INT_MODE_MSIX:
1922 if (adapter->flags & FLAG_HAS_MSIX) {
1923 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
1924 adapter->msix_entries = kcalloc(adapter->num_vectors,
1925 sizeof(struct msix_entry),
1926 GFP_KERNEL);
1927 if (adapter->msix_entries) {
1928 for (i = 0; i < adapter->num_vectors; i++)
1929 adapter->msix_entries[i].entry = i;
1930
1931 err = pci_enable_msix(adapter->pdev,
1932 adapter->msix_entries,
1933 adapter->num_vectors);
1934 if (err == 0)
1935 return;
1936 }
1937 /* MSI-X failed, so fall through and try MSI */
1938 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
1939 e1000e_reset_interrupt_capability(adapter);
1940 }
1941 adapter->int_mode = E1000E_INT_MODE_MSI;
1942 /* Fall through */
1943 case E1000E_INT_MODE_MSI:
1944 if (!pci_enable_msi(adapter->pdev)) {
1945 adapter->flags |= FLAG_MSI_ENABLED;
1946 } else {
1947 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1948 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
1949 }
1950 /* Fall through */
1951 case E1000E_INT_MODE_LEGACY:
1952 /* Don't do anything; this is the system default */
1953 break;
1954 }
1955
1956 /* store the number of vectors being used */
1957 adapter->num_vectors = 1;
1958}
1959
1960/**
1961 * e1000_request_msix - Initialize MSI-X interrupts
1962 *
1963 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1964 * kernel.
1965 **/
1966static int e1000_request_msix(struct e1000_adapter *adapter)
1967{
1968 struct net_device *netdev = adapter->netdev;
1969 int err = 0, vector = 0;
1970
1971 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1972 snprintf(adapter->rx_ring->name,
1973 sizeof(adapter->rx_ring->name) - 1,
1974 "%s-rx-0", netdev->name);
1975 else
1976 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1977 err = request_irq(adapter->msix_entries[vector].vector,
1978 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
1979 netdev);
1980 if (err)
1981 return err;
1982 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
1983 E1000_EITR_82574(vector);
1984 adapter->rx_ring->itr_val = adapter->itr;
1985 vector++;
1986
1987 if (strlen(netdev->name) < (IFNAMSIZ - 5))
1988 snprintf(adapter->tx_ring->name,
1989 sizeof(adapter->tx_ring->name) - 1,
1990 "%s-tx-0", netdev->name);
1991 else
1992 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1993 err = request_irq(adapter->msix_entries[vector].vector,
1994 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
1995 netdev);
1996 if (err)
1997 return err;
1998 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
1999 E1000_EITR_82574(vector);
2000 adapter->tx_ring->itr_val = adapter->itr;
2001 vector++;
2002
2003 err = request_irq(adapter->msix_entries[vector].vector,
2004 e1000_msix_other, 0, netdev->name, netdev);
2005 if (err)
2006 return err;
2007
2008 e1000_configure_msix(adapter);
2009
2010 return 0;
2011}
2012
2013/**
2014 * e1000_request_irq - initialize interrupts
2015 *
2016 * Attempts to configure interrupts using the best available
2017 * capabilities of the hardware and kernel.
2018 **/
2019static int e1000_request_irq(struct e1000_adapter *adapter)
2020{
2021 struct net_device *netdev = adapter->netdev;
2022 int err;
2023
2024 if (adapter->msix_entries) {
2025 err = e1000_request_msix(adapter);
2026 if (!err)
2027 return err;
2028 /* fall back to MSI */
2029 e1000e_reset_interrupt_capability(adapter);
2030 adapter->int_mode = E1000E_INT_MODE_MSI;
2031 e1000e_set_interrupt_capability(adapter);
2032 }
2033 if (adapter->flags & FLAG_MSI_ENABLED) {
2034 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2035 netdev->name, netdev);
2036 if (!err)
2037 return err;
2038
2039 /* fall back to legacy interrupt */
2040 e1000e_reset_interrupt_capability(adapter);
2041 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2042 }
2043
2044 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2045 netdev->name, netdev);
2046 if (err)
2047 e_err("Unable to allocate interrupt, Error: %d\n", err);
2048
2049 return err;
2050}
2051
2052static void e1000_free_irq(struct e1000_adapter *adapter)
2053{
2054 struct net_device *netdev = adapter->netdev;
2055
2056 if (adapter->msix_entries) {
2057 int vector = 0;
2058
2059 free_irq(adapter->msix_entries[vector].vector, netdev);
2060 vector++;
2061
2062 free_irq(adapter->msix_entries[vector].vector, netdev);
2063 vector++;
2064
2065 /* Other Causes interrupt vector */
2066 free_irq(adapter->msix_entries[vector].vector, netdev);
2067 return;
2068 }
2069
2070 free_irq(adapter->pdev->irq, netdev);
2071}
2072
2073/**
2074 * e1000_irq_disable - Mask off interrupt generation on the NIC
2075 **/
2076static void e1000_irq_disable(struct e1000_adapter *adapter)
2077{
2078 struct e1000_hw *hw = &adapter->hw;
2079
2080 ew32(IMC, ~0);
2081 if (adapter->msix_entries)
2082 ew32(EIAC_82574, 0);
2083 e1e_flush();
2084
2085 if (adapter->msix_entries) {
2086 int i;
2087 for (i = 0; i < adapter->num_vectors; i++)
2088 synchronize_irq(adapter->msix_entries[i].vector);
2089 } else {
2090 synchronize_irq(adapter->pdev->irq);
2091 }
2092}
2093
2094/**
2095 * e1000_irq_enable - Enable default interrupt generation settings
2096 **/
2097static void e1000_irq_enable(struct e1000_adapter *adapter)
2098{
2099 struct e1000_hw *hw = &adapter->hw;
2100
2101 if (adapter->msix_entries) {
2102 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2103 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
2104 } else {
2105 ew32(IMS, IMS_ENABLE_MASK);
2106 }
2107 e1e_flush();
2108}
2109
2110/**
2111 * e1000e_get_hw_control - get control of the h/w from f/w
2112 * @adapter: address of board private structure
2113 *
2114 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2115 * For ASF and Pass Through versions of f/w this means that
2116 * the driver is loaded. For AMT version (only with 82573)
2117 * of the f/w this means that the network i/f is open.
2118 **/
2119void e1000e_get_hw_control(struct e1000_adapter *adapter)
2120{
2121 struct e1000_hw *hw = &adapter->hw;
2122 u32 ctrl_ext;
2123 u32 swsm;
2124
2125 /* Let firmware know the driver has taken over */
2126 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2127 swsm = er32(SWSM);
2128 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2129 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2130 ctrl_ext = er32(CTRL_EXT);
2131 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2132 }
2133}
2134
2135/**
2136 * e1000e_release_hw_control - release control of the h/w to f/w
2137 * @adapter: address of board private structure
2138 *
2139 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2140 * For ASF and Pass Through versions of f/w this means that the
2141 * driver is no longer loaded. For AMT version (only with 82573) i
2142 * of the f/w this means that the network i/f is closed.
2143 *
2144 **/
2145void e1000e_release_hw_control(struct e1000_adapter *adapter)
2146{
2147 struct e1000_hw *hw = &adapter->hw;
2148 u32 ctrl_ext;
2149 u32 swsm;
2150
2151 /* Let firmware taken over control of h/w */
2152 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2153 swsm = er32(SWSM);
2154 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2155 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2156 ctrl_ext = er32(CTRL_EXT);
2157 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2158 }
2159}
2160
2161/**
2162 * @e1000_alloc_ring - allocate memory for a ring structure
2163 **/
2164static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2165 struct e1000_ring *ring)
2166{
2167 struct pci_dev *pdev = adapter->pdev;
2168
2169 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2170 GFP_KERNEL);
2171 if (!ring->desc)
2172 return -ENOMEM;
2173
2174 return 0;
2175}
2176
2177/**
2178 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2179 * @tx_ring: Tx descriptor ring
2180 *
2181 * Return 0 on success, negative on failure
2182 **/
2183int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2184{
2185 struct e1000_adapter *adapter = tx_ring->adapter;
2186 int err = -ENOMEM, size;
2187
2188 size = sizeof(struct e1000_buffer) * tx_ring->count;
2189 tx_ring->buffer_info = vzalloc(size);
2190 if (!tx_ring->buffer_info)
2191 goto err;
2192
2193 /* round up to nearest 4K */
2194 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2195 tx_ring->size = ALIGN(tx_ring->size, 4096);
2196
2197 err = e1000_alloc_ring_dma(adapter, tx_ring);
2198 if (err)
2199 goto err;
2200
2201 tx_ring->next_to_use = 0;
2202 tx_ring->next_to_clean = 0;
2203
2204 return 0;
2205err:
2206 vfree(tx_ring->buffer_info);
2207 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2208 return err;
2209}
2210
2211/**
2212 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2213 * @rx_ring: Rx descriptor ring
2214 *
2215 * Returns 0 on success, negative on failure
2216 **/
2217int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2218{
2219 struct e1000_adapter *adapter = rx_ring->adapter;
2220 struct e1000_buffer *buffer_info;
2221 int i, size, desc_len, err = -ENOMEM;
2222
2223 size = sizeof(struct e1000_buffer) * rx_ring->count;
2224 rx_ring->buffer_info = vzalloc(size);
2225 if (!rx_ring->buffer_info)
2226 goto err;
2227
2228 for (i = 0; i < rx_ring->count; i++) {
2229 buffer_info = &rx_ring->buffer_info[i];
2230 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2231 sizeof(struct e1000_ps_page),
2232 GFP_KERNEL);
2233 if (!buffer_info->ps_pages)
2234 goto err_pages;
2235 }
2236
2237 desc_len = sizeof(union e1000_rx_desc_packet_split);
2238
2239 /* Round up to nearest 4K */
2240 rx_ring->size = rx_ring->count * desc_len;
2241 rx_ring->size = ALIGN(rx_ring->size, 4096);
2242
2243 err = e1000_alloc_ring_dma(adapter, rx_ring);
2244 if (err)
2245 goto err_pages;
2246
2247 rx_ring->next_to_clean = 0;
2248 rx_ring->next_to_use = 0;
2249 rx_ring->rx_skb_top = NULL;
2250
2251 return 0;
2252
2253err_pages:
2254 for (i = 0; i < rx_ring->count; i++) {
2255 buffer_info = &rx_ring->buffer_info[i];
2256 kfree(buffer_info->ps_pages);
2257 }
2258err:
2259 vfree(rx_ring->buffer_info);
2260 e_err("Unable to allocate memory for the receive descriptor ring\n");
2261 return err;
2262}
2263
2264/**
2265 * e1000_clean_tx_ring - Free Tx Buffers
2266 * @tx_ring: Tx descriptor ring
2267 **/
2268static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2269{
2270 struct e1000_adapter *adapter = tx_ring->adapter;
2271 struct e1000_buffer *buffer_info;
2272 unsigned long size;
2273 unsigned int i;
2274
2275 for (i = 0; i < tx_ring->count; i++) {
2276 buffer_info = &tx_ring->buffer_info[i];
2277 e1000_put_txbuf(tx_ring, buffer_info);
2278 }
2279
2280 netdev_reset_queue(adapter->netdev);
2281 size = sizeof(struct e1000_buffer) * tx_ring->count;
2282 memset(tx_ring->buffer_info, 0, size);
2283
2284 memset(tx_ring->desc, 0, tx_ring->size);
2285
2286 tx_ring->next_to_use = 0;
2287 tx_ring->next_to_clean = 0;
2288
2289 writel(0, tx_ring->head);
2290 if (tx_ring->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2291 e1000e_update_tdt_wa(tx_ring, 0);
2292 else
2293 writel(0, tx_ring->tail);
2294}
2295
2296/**
2297 * e1000e_free_tx_resources - Free Tx Resources per Queue
2298 * @tx_ring: Tx descriptor ring
2299 *
2300 * Free all transmit software resources
2301 **/
2302void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2303{
2304 struct e1000_adapter *adapter = tx_ring->adapter;
2305 struct pci_dev *pdev = adapter->pdev;
2306
2307 e1000_clean_tx_ring(tx_ring);
2308
2309 vfree(tx_ring->buffer_info);
2310 tx_ring->buffer_info = NULL;
2311
2312 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2313 tx_ring->dma);
2314 tx_ring->desc = NULL;
2315}
2316
2317/**
2318 * e1000e_free_rx_resources - Free Rx Resources
2319 * @rx_ring: Rx descriptor ring
2320 *
2321 * Free all receive software resources
2322 **/
2323void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2324{
2325 struct e1000_adapter *adapter = rx_ring->adapter;
2326 struct pci_dev *pdev = adapter->pdev;
2327 int i;
2328
2329 e1000_clean_rx_ring(rx_ring);
2330
2331 for (i = 0; i < rx_ring->count; i++)
2332 kfree(rx_ring->buffer_info[i].ps_pages);
2333
2334 vfree(rx_ring->buffer_info);
2335 rx_ring->buffer_info = NULL;
2336
2337 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2338 rx_ring->dma);
2339 rx_ring->desc = NULL;
2340}
2341
2342/**
2343 * e1000_update_itr - update the dynamic ITR value based on statistics
2344 * @adapter: pointer to adapter
2345 * @itr_setting: current adapter->itr
2346 * @packets: the number of packets during this measurement interval
2347 * @bytes: the number of bytes during this measurement interval
2348 *
2349 * Stores a new ITR value based on packets and byte
2350 * counts during the last interrupt. The advantage of per interrupt
2351 * computation is faster updates and more accurate ITR for the current
2352 * traffic pattern. Constants in this function were computed
2353 * based on theoretical maximum wire speed and thresholds were set based
2354 * on testing data as well as attempting to minimize response time
2355 * while increasing bulk throughput. This functionality is controlled
2356 * by the InterruptThrottleRate module parameter.
2357 **/
2358static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2359 u16 itr_setting, int packets,
2360 int bytes)
2361{
2362 unsigned int retval = itr_setting;
2363
2364 if (packets == 0)
2365 return itr_setting;
2366
2367 switch (itr_setting) {
2368 case lowest_latency:
2369 /* handle TSO and jumbo frames */
2370 if (bytes/packets > 8000)
2371 retval = bulk_latency;
2372 else if ((packets < 5) && (bytes > 512))
2373 retval = low_latency;
2374 break;
2375 case low_latency: /* 50 usec aka 20000 ints/s */
2376 if (bytes > 10000) {
2377 /* this if handles the TSO accounting */
2378 if (bytes/packets > 8000)
2379 retval = bulk_latency;
2380 else if ((packets < 10) || ((bytes/packets) > 1200))
2381 retval = bulk_latency;
2382 else if ((packets > 35))
2383 retval = lowest_latency;
2384 } else if (bytes/packets > 2000) {
2385 retval = bulk_latency;
2386 } else if (packets <= 2 && bytes < 512) {
2387 retval = lowest_latency;
2388 }
2389 break;
2390 case bulk_latency: /* 250 usec aka 4000 ints/s */
2391 if (bytes > 25000) {
2392 if (packets > 35)
2393 retval = low_latency;
2394 } else if (bytes < 6000) {
2395 retval = low_latency;
2396 }
2397 break;
2398 }
2399
2400 return retval;
2401}
2402
2403static void e1000_set_itr(struct e1000_adapter *adapter)
2404{
2405 struct e1000_hw *hw = &adapter->hw;
2406 u16 current_itr;
2407 u32 new_itr = adapter->itr;
2408
2409 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2410 if (adapter->link_speed != SPEED_1000) {
2411 current_itr = 0;
2412 new_itr = 4000;
2413 goto set_itr_now;
2414 }
2415
2416 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2417 new_itr = 0;
2418 goto set_itr_now;
2419 }
2420
2421 adapter->tx_itr = e1000_update_itr(adapter,
2422 adapter->tx_itr,
2423 adapter->total_tx_packets,
2424 adapter->total_tx_bytes);
2425 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2426 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2427 adapter->tx_itr = low_latency;
2428
2429 adapter->rx_itr = e1000_update_itr(adapter,
2430 adapter->rx_itr,
2431 adapter->total_rx_packets,
2432 adapter->total_rx_bytes);
2433 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2434 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2435 adapter->rx_itr = low_latency;
2436
2437 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2438
2439 switch (current_itr) {
2440 /* counts and packets in update_itr are dependent on these numbers */
2441 case lowest_latency:
2442 new_itr = 70000;
2443 break;
2444 case low_latency:
2445 new_itr = 20000; /* aka hwitr = ~200 */
2446 break;
2447 case bulk_latency:
2448 new_itr = 4000;
2449 break;
2450 default:
2451 break;
2452 }
2453
2454set_itr_now:
2455 if (new_itr != adapter->itr) {
2456 /*
2457 * this attempts to bias the interrupt rate towards Bulk
2458 * by adding intermediate steps when interrupt rate is
2459 * increasing
2460 */
2461 new_itr = new_itr > adapter->itr ?
2462 min(adapter->itr + (new_itr >> 2), new_itr) :
2463 new_itr;
2464 adapter->itr = new_itr;
2465 adapter->rx_ring->itr_val = new_itr;
2466 if (adapter->msix_entries)
2467 adapter->rx_ring->set_itr = 1;
2468 else
2469 if (new_itr)
2470 ew32(ITR, 1000000000 / (new_itr * 256));
2471 else
2472 ew32(ITR, 0);
2473 }
2474}
2475
2476/**
2477 * e1000_alloc_queues - Allocate memory for all rings
2478 * @adapter: board private structure to initialize
2479 **/
2480static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2481{
2482 int size = sizeof(struct e1000_ring);
2483
2484 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2485 if (!adapter->tx_ring)
2486 goto err;
2487 adapter->tx_ring->count = adapter->tx_ring_count;
2488 adapter->tx_ring->adapter = adapter;
2489
2490 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2491 if (!adapter->rx_ring)
2492 goto err;
2493 adapter->rx_ring->count = adapter->rx_ring_count;
2494 adapter->rx_ring->adapter = adapter;
2495
2496 return 0;
2497err:
2498 e_err("Unable to allocate memory for queues\n");
2499 kfree(adapter->rx_ring);
2500 kfree(adapter->tx_ring);
2501 return -ENOMEM;
2502}
2503
2504/**
2505 * e1000e_poll - NAPI Rx polling callback
2506 * @napi: struct associated with this polling callback
2507 * @weight: number of packets driver is allowed to process this poll
2508 **/
2509static int e1000e_poll(struct napi_struct *napi, int weight)
2510{
2511 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2512 napi);
2513 struct e1000_hw *hw = &adapter->hw;
2514 struct net_device *poll_dev = adapter->netdev;
2515 int tx_cleaned = 1, work_done = 0;
2516
2517 adapter = netdev_priv(poll_dev);
2518
2519 if (!adapter->msix_entries ||
2520 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2521 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2522
2523 adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2524
2525 if (!tx_cleaned)
2526 work_done = weight;
2527
2528 /* If weight not fully consumed, exit the polling mode */
2529 if (work_done < weight) {
2530 if (adapter->itr_setting & 3)
2531 e1000_set_itr(adapter);
2532 napi_complete(napi);
2533 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2534 if (adapter->msix_entries)
2535 ew32(IMS, adapter->rx_ring->ims_val);
2536 else
2537 e1000_irq_enable(adapter);
2538 }
2539 }
2540
2541 return work_done;
2542}
2543
2544static int e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2545{
2546 struct e1000_adapter *adapter = netdev_priv(netdev);
2547 struct e1000_hw *hw = &adapter->hw;
2548 u32 vfta, index;
2549
2550 /* don't update vlan cookie if already programmed */
2551 if ((adapter->hw.mng_cookie.status &
2552 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2553 (vid == adapter->mng_vlan_id))
2554 return 0;
2555
2556 /* add VID to filter table */
2557 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2558 index = (vid >> 5) & 0x7F;
2559 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2560 vfta |= (1 << (vid & 0x1F));
2561 hw->mac.ops.write_vfta(hw, index, vfta);
2562 }
2563
2564 set_bit(vid, adapter->active_vlans);
2565
2566 return 0;
2567}
2568
2569static int e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2570{
2571 struct e1000_adapter *adapter = netdev_priv(netdev);
2572 struct e1000_hw *hw = &adapter->hw;
2573 u32 vfta, index;
2574
2575 if ((adapter->hw.mng_cookie.status &
2576 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2577 (vid == adapter->mng_vlan_id)) {
2578 /* release control to f/w */
2579 e1000e_release_hw_control(adapter);
2580 return 0;
2581 }
2582
2583 /* remove VID from filter table */
2584 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2585 index = (vid >> 5) & 0x7F;
2586 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2587 vfta &= ~(1 << (vid & 0x1F));
2588 hw->mac.ops.write_vfta(hw, index, vfta);
2589 }
2590
2591 clear_bit(vid, adapter->active_vlans);
2592
2593 return 0;
2594}
2595
2596/**
2597 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2598 * @adapter: board private structure to initialize
2599 **/
2600static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2601{
2602 struct net_device *netdev = adapter->netdev;
2603 struct e1000_hw *hw = &adapter->hw;
2604 u32 rctl;
2605
2606 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2607 /* disable VLAN receive filtering */
2608 rctl = er32(RCTL);
2609 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2610 ew32(RCTL, rctl);
2611
2612 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2613 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
2614 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2615 }
2616 }
2617}
2618
2619/**
2620 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2621 * @adapter: board private structure to initialize
2622 **/
2623static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2624{
2625 struct e1000_hw *hw = &adapter->hw;
2626 u32 rctl;
2627
2628 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2629 /* enable VLAN receive filtering */
2630 rctl = er32(RCTL);
2631 rctl |= E1000_RCTL_VFE;
2632 rctl &= ~E1000_RCTL_CFIEN;
2633 ew32(RCTL, rctl);
2634 }
2635}
2636
2637/**
2638 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2639 * @adapter: board private structure to initialize
2640 **/
2641static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2642{
2643 struct e1000_hw *hw = &adapter->hw;
2644 u32 ctrl;
2645
2646 /* disable VLAN tag insert/strip */
2647 ctrl = er32(CTRL);
2648 ctrl &= ~E1000_CTRL_VME;
2649 ew32(CTRL, ctrl);
2650}
2651
2652/**
2653 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2654 * @adapter: board private structure to initialize
2655 **/
2656static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2657{
2658 struct e1000_hw *hw = &adapter->hw;
2659 u32 ctrl;
2660
2661 /* enable VLAN tag insert/strip */
2662 ctrl = er32(CTRL);
2663 ctrl |= E1000_CTRL_VME;
2664 ew32(CTRL, ctrl);
2665}
2666
2667static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2668{
2669 struct net_device *netdev = adapter->netdev;
2670 u16 vid = adapter->hw.mng_cookie.vlan_id;
2671 u16 old_vid = adapter->mng_vlan_id;
2672
2673 if (adapter->hw.mng_cookie.status &
2674 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2675 e1000_vlan_rx_add_vid(netdev, vid);
2676 adapter->mng_vlan_id = vid;
2677 }
2678
2679 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2680 e1000_vlan_rx_kill_vid(netdev, old_vid);
2681}
2682
2683static void e1000_restore_vlan(struct e1000_adapter *adapter)
2684{
2685 u16 vid;
2686
2687 e1000_vlan_rx_add_vid(adapter->netdev, 0);
2688
2689 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2690 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2691}
2692
2693static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2694{
2695 struct e1000_hw *hw = &adapter->hw;
2696 u32 manc, manc2h, mdef, i, j;
2697
2698 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2699 return;
2700
2701 manc = er32(MANC);
2702
2703 /*
2704 * enable receiving management packets to the host. this will probably
2705 * generate destination unreachable messages from the host OS, but
2706 * the packets will be handled on SMBUS
2707 */
2708 manc |= E1000_MANC_EN_MNG2HOST;
2709 manc2h = er32(MANC2H);
2710
2711 switch (hw->mac.type) {
2712 default:
2713 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2714 break;
2715 case e1000_82574:
2716 case e1000_82583:
2717 /*
2718 * Check if IPMI pass-through decision filter already exists;
2719 * if so, enable it.
2720 */
2721 for (i = 0, j = 0; i < 8; i++) {
2722 mdef = er32(MDEF(i));
2723
2724 /* Ignore filters with anything other than IPMI ports */
2725 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2726 continue;
2727
2728 /* Enable this decision filter in MANC2H */
2729 if (mdef)
2730 manc2h |= (1 << i);
2731
2732 j |= mdef;
2733 }
2734
2735 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2736 break;
2737
2738 /* Create new decision filter in an empty filter */
2739 for (i = 0, j = 0; i < 8; i++)
2740 if (er32(MDEF(i)) == 0) {
2741 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2742 E1000_MDEF_PORT_664));
2743 manc2h |= (1 << 1);
2744 j++;
2745 break;
2746 }
2747
2748 if (!j)
2749 e_warn("Unable to create IPMI pass-through filter\n");
2750 break;
2751 }
2752
2753 ew32(MANC2H, manc2h);
2754 ew32(MANC, manc);
2755}
2756
2757/**
2758 * e1000_configure_tx - Configure Transmit Unit after Reset
2759 * @adapter: board private structure
2760 *
2761 * Configure the Tx unit of the MAC after a reset.
2762 **/
2763static void e1000_configure_tx(struct e1000_adapter *adapter)
2764{
2765 struct e1000_hw *hw = &adapter->hw;
2766 struct e1000_ring *tx_ring = adapter->tx_ring;
2767 u64 tdba;
2768 u32 tdlen, tarc;
2769
2770 /* Setup the HW Tx Head and Tail descriptor pointers */
2771 tdba = tx_ring->dma;
2772 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2773 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2774 ew32(TDBAH(0), (tdba >> 32));
2775 ew32(TDLEN(0), tdlen);
2776 ew32(TDH(0), 0);
2777 ew32(TDT(0), 0);
2778 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2779 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2780
2781 /* Set the Tx Interrupt Delay register */
2782 ew32(TIDV, adapter->tx_int_delay);
2783 /* Tx irq moderation */
2784 ew32(TADV, adapter->tx_abs_int_delay);
2785
2786 if (adapter->flags2 & FLAG2_DMA_BURST) {
2787 u32 txdctl = er32(TXDCTL(0));
2788 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2789 E1000_TXDCTL_WTHRESH);
2790 /*
2791 * set up some performance related parameters to encourage the
2792 * hardware to use the bus more efficiently in bursts, depends
2793 * on the tx_int_delay to be enabled,
2794 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time
2795 * hthresh = 1 ==> prefetch when one or more available
2796 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2797 * BEWARE: this seems to work but should be considered first if
2798 * there are Tx hangs or other Tx related bugs
2799 */
2800 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2801 ew32(TXDCTL(0), txdctl);
2802 }
2803 /* erratum work around: set txdctl the same for both queues */
2804 ew32(TXDCTL(1), er32(TXDCTL(0)));
2805
2806 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2807 tarc = er32(TARC(0));
2808 /*
2809 * set the speed mode bit, we'll clear it if we're not at
2810 * gigabit link later
2811 */
2812#define SPEED_MODE_BIT (1 << 21)
2813 tarc |= SPEED_MODE_BIT;
2814 ew32(TARC(0), tarc);
2815 }
2816
2817 /* errata: program both queues to unweighted RR */
2818 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2819 tarc = er32(TARC(0));
2820 tarc |= 1;
2821 ew32(TARC(0), tarc);
2822 tarc = er32(TARC(1));
2823 tarc |= 1;
2824 ew32(TARC(1), tarc);
2825 }
2826
2827 /* Setup Transmit Descriptor Settings for eop descriptor */
2828 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2829
2830 /* only set IDE if we are delaying interrupts using the timers */
2831 if (adapter->tx_int_delay)
2832 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2833
2834 /* enable Report Status bit */
2835 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2836
2837 hw->mac.ops.config_collision_dist(hw);
2838}
2839
2840/**
2841 * e1000_setup_rctl - configure the receive control registers
2842 * @adapter: Board private structure
2843 **/
2844#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2845 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2846static void e1000_setup_rctl(struct e1000_adapter *adapter)
2847{
2848 struct e1000_hw *hw = &adapter->hw;
2849 u32 rctl, rfctl;
2850 u32 pages = 0;
2851
2852 /* Workaround Si errata on PCHx - configure jumbo frame flow */
2853 if (hw->mac.type >= e1000_pch2lan) {
2854 s32 ret_val;
2855
2856 if (adapter->netdev->mtu > ETH_DATA_LEN)
2857 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
2858 else
2859 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
2860
2861 if (ret_val)
2862 e_dbg("failed to enable jumbo frame workaround mode\n");
2863 }
2864
2865 /* Program MC offset vector base */
2866 rctl = er32(RCTL);
2867 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2868 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2869 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2870 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2871
2872 /* Do not Store bad packets */
2873 rctl &= ~E1000_RCTL_SBP;
2874
2875 /* Enable Long Packet receive */
2876 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2877 rctl &= ~E1000_RCTL_LPE;
2878 else
2879 rctl |= E1000_RCTL_LPE;
2880
2881 /* Some systems expect that the CRC is included in SMBUS traffic. The
2882 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2883 * host memory when this is enabled
2884 */
2885 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2886 rctl |= E1000_RCTL_SECRC;
2887
2888 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2889 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2890 u16 phy_data;
2891
2892 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2893 phy_data &= 0xfff8;
2894 phy_data |= (1 << 2);
2895 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2896
2897 e1e_rphy(hw, 22, &phy_data);
2898 phy_data &= 0x0fff;
2899 phy_data |= (1 << 14);
2900 e1e_wphy(hw, 0x10, 0x2823);
2901 e1e_wphy(hw, 0x11, 0x0003);
2902 e1e_wphy(hw, 22, phy_data);
2903 }
2904
2905 /* Setup buffer sizes */
2906 rctl &= ~E1000_RCTL_SZ_4096;
2907 rctl |= E1000_RCTL_BSEX;
2908 switch (adapter->rx_buffer_len) {
2909 case 2048:
2910 default:
2911 rctl |= E1000_RCTL_SZ_2048;
2912 rctl &= ~E1000_RCTL_BSEX;
2913 break;
2914 case 4096:
2915 rctl |= E1000_RCTL_SZ_4096;
2916 break;
2917 case 8192:
2918 rctl |= E1000_RCTL_SZ_8192;
2919 break;
2920 case 16384:
2921 rctl |= E1000_RCTL_SZ_16384;
2922 break;
2923 }
2924
2925 /* Enable Extended Status in all Receive Descriptors */
2926 rfctl = er32(RFCTL);
2927 rfctl |= E1000_RFCTL_EXTEN;
2928 ew32(RFCTL, rfctl);
2929
2930 /*
2931 * 82571 and greater support packet-split where the protocol
2932 * header is placed in skb->data and the packet data is
2933 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2934 * In the case of a non-split, skb->data is linearly filled,
2935 * followed by the page buffers. Therefore, skb->data is
2936 * sized to hold the largest protocol header.
2937 *
2938 * allocations using alloc_page take too long for regular MTU
2939 * so only enable packet split for jumbo frames
2940 *
2941 * Using pages when the page size is greater than 16k wastes
2942 * a lot of memory, since we allocate 3 pages at all times
2943 * per packet.
2944 */
2945 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
2946 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
2947 adapter->rx_ps_pages = pages;
2948 else
2949 adapter->rx_ps_pages = 0;
2950
2951 if (adapter->rx_ps_pages) {
2952 u32 psrctl = 0;
2953
2954 /* Enable Packet split descriptors */
2955 rctl |= E1000_RCTL_DTYP_PS;
2956
2957 psrctl |= adapter->rx_ps_bsize0 >>
2958 E1000_PSRCTL_BSIZE0_SHIFT;
2959
2960 switch (adapter->rx_ps_pages) {
2961 case 3:
2962 psrctl |= PAGE_SIZE <<
2963 E1000_PSRCTL_BSIZE3_SHIFT;
2964 case 2:
2965 psrctl |= PAGE_SIZE <<
2966 E1000_PSRCTL_BSIZE2_SHIFT;
2967 case 1:
2968 psrctl |= PAGE_SIZE >>
2969 E1000_PSRCTL_BSIZE1_SHIFT;
2970 break;
2971 }
2972
2973 ew32(PSRCTL, psrctl);
2974 }
2975
2976 /* This is useful for sniffing bad packets. */
2977 if (adapter->netdev->features & NETIF_F_RXALL) {
2978 /* UPE and MPE will be handled by normal PROMISC logic
2979 * in e1000e_set_rx_mode */
2980 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
2981 E1000_RCTL_BAM | /* RX All Bcast Pkts */
2982 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
2983
2984 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
2985 E1000_RCTL_DPF | /* Allow filtered pause */
2986 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
2987 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
2988 * and that breaks VLANs.
2989 */
2990 }
2991
2992 ew32(RCTL, rctl);
2993 /* just started the receive unit, no need to restart */
2994 adapter->flags &= ~FLAG_RX_RESTART_NOW;
2995}
2996
2997/**
2998 * e1000_configure_rx - Configure Receive Unit after Reset
2999 * @adapter: board private structure
3000 *
3001 * Configure the Rx unit of the MAC after a reset.
3002 **/
3003static void e1000_configure_rx(struct e1000_adapter *adapter)
3004{
3005 struct e1000_hw *hw = &adapter->hw;
3006 struct e1000_ring *rx_ring = adapter->rx_ring;
3007 u64 rdba;
3008 u32 rdlen, rctl, rxcsum, ctrl_ext;
3009
3010 if (adapter->rx_ps_pages) {
3011 /* this is a 32 byte descriptor */
3012 rdlen = rx_ring->count *
3013 sizeof(union e1000_rx_desc_packet_split);
3014 adapter->clean_rx = e1000_clean_rx_irq_ps;
3015 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3016 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3017 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3018 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3019 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3020 } else {
3021 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3022 adapter->clean_rx = e1000_clean_rx_irq;
3023 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3024 }
3025
3026 /* disable receives while setting up the descriptors */
3027 rctl = er32(RCTL);
3028 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3029 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3030 e1e_flush();
3031 usleep_range(10000, 20000);
3032
3033 if (adapter->flags2 & FLAG2_DMA_BURST) {
3034 /*
3035 * set the writeback threshold (only takes effect if the RDTR
3036 * is set). set GRAN=1 and write back up to 0x4 worth, and
3037 * enable prefetching of 0x20 Rx descriptors
3038 * granularity = 01
3039 * wthresh = 04,
3040 * hthresh = 04,
3041 * pthresh = 0x20
3042 */
3043 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3044 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3045
3046 /*
3047 * override the delay timers for enabling bursting, only if
3048 * the value was not set by the user via module options
3049 */
3050 if (adapter->rx_int_delay == DEFAULT_RDTR)
3051 adapter->rx_int_delay = BURST_RDTR;
3052 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3053 adapter->rx_abs_int_delay = BURST_RADV;
3054 }
3055
3056 /* set the Receive Delay Timer Register */
3057 ew32(RDTR, adapter->rx_int_delay);
3058
3059 /* irq moderation */
3060 ew32(RADV, adapter->rx_abs_int_delay);
3061 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3062 ew32(ITR, 1000000000 / (adapter->itr * 256));
3063
3064 ctrl_ext = er32(CTRL_EXT);
3065 /* Auto-Mask interrupts upon ICR access */
3066 ctrl_ext |= E1000_CTRL_EXT_IAME;
3067 ew32(IAM, 0xffffffff);
3068 ew32(CTRL_EXT, ctrl_ext);
3069 e1e_flush();
3070
3071 /*
3072 * Setup the HW Rx Head and Tail Descriptor Pointers and
3073 * the Base and Length of the Rx Descriptor Ring
3074 */
3075 rdba = rx_ring->dma;
3076 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3077 ew32(RDBAH(0), (rdba >> 32));
3078 ew32(RDLEN(0), rdlen);
3079 ew32(RDH(0), 0);
3080 ew32(RDT(0), 0);
3081 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3082 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3083
3084 /* Enable Receive Checksum Offload for TCP and UDP */
3085 rxcsum = er32(RXCSUM);
3086 if (adapter->netdev->features & NETIF_F_RXCSUM)
3087 rxcsum |= E1000_RXCSUM_TUOFL;
3088 else
3089 rxcsum &= ~E1000_RXCSUM_TUOFL;
3090 ew32(RXCSUM, rxcsum);
3091
3092 if (adapter->hw.mac.type == e1000_pch2lan) {
3093 /*
3094 * With jumbo frames, excessive C-state transition
3095 * latencies result in dropped transactions.
3096 */
3097 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3098 u32 rxdctl = er32(RXDCTL(0));
3099 ew32(RXDCTL(0), rxdctl | 0x3);
3100 pm_qos_update_request(&adapter->netdev->pm_qos_req, 55);
3101 } else {
3102 pm_qos_update_request(&adapter->netdev->pm_qos_req,
3103 PM_QOS_DEFAULT_VALUE);
3104 }
3105 }
3106
3107 /* Enable Receives */
3108 ew32(RCTL, rctl);
3109}
3110
3111/**
3112 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3113 * @netdev: network interface device structure
3114 *
3115 * Writes multicast address list to the MTA hash table.
3116 * Returns: -ENOMEM on failure
3117 * 0 on no addresses written
3118 * X on writing X addresses to MTA
3119 */
3120static int e1000e_write_mc_addr_list(struct net_device *netdev)
3121{
3122 struct e1000_adapter *adapter = netdev_priv(netdev);
3123 struct e1000_hw *hw = &adapter->hw;
3124 struct netdev_hw_addr *ha;
3125 u8 *mta_list;
3126 int i;
3127
3128 if (netdev_mc_empty(netdev)) {
3129 /* nothing to program, so clear mc list */
3130 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3131 return 0;
3132 }
3133
3134 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3135 if (!mta_list)
3136 return -ENOMEM;
3137
3138 /* update_mc_addr_list expects a packed array of only addresses. */
3139 i = 0;
3140 netdev_for_each_mc_addr(ha, netdev)
3141 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3142
3143 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3144 kfree(mta_list);
3145
3146 return netdev_mc_count(netdev);
3147}
3148
3149/**
3150 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3151 * @netdev: network interface device structure
3152 *
3153 * Writes unicast address list to the RAR table.
3154 * Returns: -ENOMEM on failure/insufficient address space
3155 * 0 on no addresses written
3156 * X on writing X addresses to the RAR table
3157 **/
3158static int e1000e_write_uc_addr_list(struct net_device *netdev)
3159{
3160 struct e1000_adapter *adapter = netdev_priv(netdev);
3161 struct e1000_hw *hw = &adapter->hw;
3162 unsigned int rar_entries = hw->mac.rar_entry_count;
3163 int count = 0;
3164
3165 /* save a rar entry for our hardware address */
3166 rar_entries--;
3167
3168 /* save a rar entry for the LAA workaround */
3169 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3170 rar_entries--;
3171
3172 /* return ENOMEM indicating insufficient memory for addresses */
3173 if (netdev_uc_count(netdev) > rar_entries)
3174 return -ENOMEM;
3175
3176 if (!netdev_uc_empty(netdev) && rar_entries) {
3177 struct netdev_hw_addr *ha;
3178
3179 /*
3180 * write the addresses in reverse order to avoid write
3181 * combining
3182 */
3183 netdev_for_each_uc_addr(ha, netdev) {
3184 if (!rar_entries)
3185 break;
3186 hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3187 count++;
3188 }
3189 }
3190
3191 /* zero out the remaining RAR entries not used above */
3192 for (; rar_entries > 0; rar_entries--) {
3193 ew32(RAH(rar_entries), 0);
3194 ew32(RAL(rar_entries), 0);
3195 }
3196 e1e_flush();
3197
3198 return count;
3199}
3200
3201/**
3202 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3203 * @netdev: network interface device structure
3204 *
3205 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3206 * address list or the network interface flags are updated. This routine is
3207 * responsible for configuring the hardware for proper unicast, multicast,
3208 * promiscuous mode, and all-multi behavior.
3209 **/
3210static void e1000e_set_rx_mode(struct net_device *netdev)
3211{
3212 struct e1000_adapter *adapter = netdev_priv(netdev);
3213 struct e1000_hw *hw = &adapter->hw;
3214 u32 rctl;
3215
3216 /* Check for Promiscuous and All Multicast modes */
3217 rctl = er32(RCTL);
3218
3219 /* clear the affected bits */
3220 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3221
3222 if (netdev->flags & IFF_PROMISC) {
3223 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3224 /* Do not hardware filter VLANs in promisc mode */
3225 e1000e_vlan_filter_disable(adapter);
3226 } else {
3227 int count;
3228
3229 if (netdev->flags & IFF_ALLMULTI) {
3230 rctl |= E1000_RCTL_MPE;
3231 } else {
3232 /*
3233 * Write addresses to the MTA, if the attempt fails
3234 * then we should just turn on promiscuous mode so
3235 * that we can at least receive multicast traffic
3236 */
3237 count = e1000e_write_mc_addr_list(netdev);
3238 if (count < 0)
3239 rctl |= E1000_RCTL_MPE;
3240 }
3241 e1000e_vlan_filter_enable(adapter);
3242 /*
3243 * Write addresses to available RAR registers, if there is not
3244 * sufficient space to store all the addresses then enable
3245 * unicast promiscuous mode
3246 */
3247 count = e1000e_write_uc_addr_list(netdev);
3248 if (count < 0)
3249 rctl |= E1000_RCTL_UPE;
3250 }
3251
3252 ew32(RCTL, rctl);
3253
3254 if (netdev->features & NETIF_F_HW_VLAN_RX)
3255 e1000e_vlan_strip_enable(adapter);
3256 else
3257 e1000e_vlan_strip_disable(adapter);
3258}
3259
3260static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3261{
3262 struct e1000_hw *hw = &adapter->hw;
3263 u32 mrqc, rxcsum;
3264 int i;
3265 static const u32 rsskey[10] = {
3266 0xda565a6d, 0xc20e5b25, 0x3d256741, 0xb08fa343, 0xcb2bcad0,
3267 0xb4307bae, 0xa32dcb77, 0x0cf23080, 0x3bb7426a, 0xfa01acbe
3268 };
3269
3270 /* Fill out hash function seed */
3271 for (i = 0; i < 10; i++)
3272 ew32(RSSRK(i), rsskey[i]);
3273
3274 /* Direct all traffic to queue 0 */
3275 for (i = 0; i < 32; i++)
3276 ew32(RETA(i), 0);
3277
3278 /*
3279 * Disable raw packet checksumming so that RSS hash is placed in
3280 * descriptor on writeback.
3281 */
3282 rxcsum = er32(RXCSUM);
3283 rxcsum |= E1000_RXCSUM_PCSD;
3284
3285 ew32(RXCSUM, rxcsum);
3286
3287 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3288 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3289 E1000_MRQC_RSS_FIELD_IPV6 |
3290 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3291 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3292
3293 ew32(MRQC, mrqc);
3294}
3295
3296/**
3297 * e1000_configure - configure the hardware for Rx and Tx
3298 * @adapter: private board structure
3299 **/
3300static void e1000_configure(struct e1000_adapter *adapter)
3301{
3302 struct e1000_ring *rx_ring = adapter->rx_ring;
3303
3304 e1000e_set_rx_mode(adapter->netdev);
3305
3306 e1000_restore_vlan(adapter);
3307 e1000_init_manageability_pt(adapter);
3308
3309 e1000_configure_tx(adapter);
3310
3311 if (adapter->netdev->features & NETIF_F_RXHASH)
3312 e1000e_setup_rss_hash(adapter);
3313 e1000_setup_rctl(adapter);
3314 e1000_configure_rx(adapter);
3315 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3316}
3317
3318/**
3319 * e1000e_power_up_phy - restore link in case the phy was powered down
3320 * @adapter: address of board private structure
3321 *
3322 * The phy may be powered down to save power and turn off link when the
3323 * driver is unloaded and wake on lan is not enabled (among others)
3324 * *** this routine MUST be followed by a call to e1000e_reset ***
3325 **/
3326void e1000e_power_up_phy(struct e1000_adapter *adapter)
3327{
3328 if (adapter->hw.phy.ops.power_up)
3329 adapter->hw.phy.ops.power_up(&adapter->hw);
3330
3331 adapter->hw.mac.ops.setup_link(&adapter->hw);
3332}
3333
3334/**
3335 * e1000_power_down_phy - Power down the PHY
3336 *
3337 * Power down the PHY so no link is implied when interface is down.
3338 * The PHY cannot be powered down if management or WoL is active.
3339 */
3340static void e1000_power_down_phy(struct e1000_adapter *adapter)
3341{
3342 /* WoL is enabled */
3343 if (adapter->wol)
3344 return;
3345
3346 if (adapter->hw.phy.ops.power_down)
3347 adapter->hw.phy.ops.power_down(&adapter->hw);
3348}
3349
3350/**
3351 * e1000e_reset - bring the hardware into a known good state
3352 *
3353 * This function boots the hardware and enables some settings that
3354 * require a configuration cycle of the hardware - those cannot be
3355 * set/changed during runtime. After reset the device needs to be
3356 * properly configured for Rx, Tx etc.
3357 */
3358void e1000e_reset(struct e1000_adapter *adapter)
3359{
3360 struct e1000_mac_info *mac = &adapter->hw.mac;
3361 struct e1000_fc_info *fc = &adapter->hw.fc;
3362 struct e1000_hw *hw = &adapter->hw;
3363 u32 tx_space, min_tx_space, min_rx_space;
3364 u32 pba = adapter->pba;
3365 u16 hwm;
3366
3367 /* reset Packet Buffer Allocation to default */
3368 ew32(PBA, pba);
3369
3370 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
3371 /*
3372 * To maintain wire speed transmits, the Tx FIFO should be
3373 * large enough to accommodate two full transmit packets,
3374 * rounded up to the next 1KB and expressed in KB. Likewise,
3375 * the Rx FIFO should be large enough to accommodate at least
3376 * one full receive packet and is similarly rounded up and
3377 * expressed in KB.
3378 */
3379 pba = er32(PBA);
3380 /* upper 16 bits has Tx packet buffer allocation size in KB */
3381 tx_space = pba >> 16;
3382 /* lower 16 bits has Rx packet buffer allocation size in KB */
3383 pba &= 0xffff;
3384 /*
3385 * the Tx fifo also stores 16 bytes of information about the Tx
3386 * but don't include ethernet FCS because hardware appends it
3387 */
3388 min_tx_space = (adapter->max_frame_size +
3389 sizeof(struct e1000_tx_desc) -
3390 ETH_FCS_LEN) * 2;
3391 min_tx_space = ALIGN(min_tx_space, 1024);
3392 min_tx_space >>= 10;
3393 /* software strips receive CRC, so leave room for it */
3394 min_rx_space = adapter->max_frame_size;
3395 min_rx_space = ALIGN(min_rx_space, 1024);
3396 min_rx_space >>= 10;
3397
3398 /*
3399 * If current Tx allocation is less than the min Tx FIFO size,
3400 * and the min Tx FIFO size is less than the current Rx FIFO
3401 * allocation, take space away from current Rx allocation
3402 */
3403 if ((tx_space < min_tx_space) &&
3404 ((min_tx_space - tx_space) < pba)) {
3405 pba -= min_tx_space - tx_space;
3406
3407 /*
3408 * if short on Rx space, Rx wins and must trump Tx
3409 * adjustment or use Early Receive if available
3410 */
3411 if (pba < min_rx_space)
3412 pba = min_rx_space;
3413 }
3414
3415 ew32(PBA, pba);
3416 }
3417
3418 /*
3419 * flow control settings
3420 *
3421 * The high water mark must be low enough to fit one full frame
3422 * (or the size used for early receive) above it in the Rx FIFO.
3423 * Set it to the lower of:
3424 * - 90% of the Rx FIFO size, and
3425 * - the full Rx FIFO size minus one full frame
3426 */
3427 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3428 fc->pause_time = 0xFFFF;
3429 else
3430 fc->pause_time = E1000_FC_PAUSE_TIME;
3431 fc->send_xon = true;
3432 fc->current_mode = fc->requested_mode;
3433
3434 switch (hw->mac.type) {
3435 case e1000_ich9lan:
3436 case e1000_ich10lan:
3437 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3438 pba = 14;
3439 ew32(PBA, pba);
3440 fc->high_water = 0x2800;
3441 fc->low_water = fc->high_water - 8;
3442 break;
3443 }
3444 /* fall-through */
3445 default:
3446 hwm = min(((pba << 10) * 9 / 10),
3447 ((pba << 10) - adapter->max_frame_size));
3448
3449 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3450 fc->low_water = fc->high_water - 8;
3451 break;
3452 case e1000_pchlan:
3453 /*
3454 * Workaround PCH LOM adapter hangs with certain network
3455 * loads. If hangs persist, try disabling Tx flow control.
3456 */
3457 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3458 fc->high_water = 0x3500;
3459 fc->low_water = 0x1500;
3460 } else {
3461 fc->high_water = 0x5000;
3462 fc->low_water = 0x3000;
3463 }
3464 fc->refresh_time = 0x1000;
3465 break;
3466 case e1000_pch2lan:
3467 case e1000_pch_lpt:
3468 fc->high_water = 0x05C20;
3469 fc->low_water = 0x05048;
3470 fc->pause_time = 0x0650;
3471 fc->refresh_time = 0x0400;
3472 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3473 pba = 14;
3474 ew32(PBA, pba);
3475 }
3476 break;
3477 }
3478
3479 /*
3480 * Alignment of Tx data is on an arbitrary byte boundary with the
3481 * maximum size per Tx descriptor limited only to the transmit
3482 * allocation of the packet buffer minus 96 bytes with an upper
3483 * limit of 24KB due to receive synchronization limitations.
3484 */
3485 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
3486 24 << 10);
3487
3488 /*
3489 * Disable Adaptive Interrupt Moderation if 2 full packets cannot
3490 * fit in receive buffer.
3491 */
3492 if (adapter->itr_setting & 0x3) {
3493 if ((adapter->max_frame_size * 2) > (pba << 10)) {
3494 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
3495 dev_info(&adapter->pdev->dev,
3496 "Interrupt Throttle Rate turned off\n");
3497 adapter->flags2 |= FLAG2_DISABLE_AIM;
3498 ew32(ITR, 0);
3499 }
3500 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
3501 dev_info(&adapter->pdev->dev,
3502 "Interrupt Throttle Rate turned on\n");
3503 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
3504 adapter->itr = 20000;
3505 ew32(ITR, 1000000000 / (adapter->itr * 256));
3506 }
3507 }
3508
3509 /* Allow time for pending master requests to run */
3510 mac->ops.reset_hw(hw);
3511
3512 /*
3513 * For parts with AMT enabled, let the firmware know
3514 * that the network interface is in control
3515 */
3516 if (adapter->flags & FLAG_HAS_AMT)
3517 e1000e_get_hw_control(adapter);
3518
3519 ew32(WUC, 0);
3520
3521 if (mac->ops.init_hw(hw))
3522 e_err("Hardware Error\n");
3523
3524 e1000_update_mng_vlan(adapter);
3525
3526 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3527 ew32(VET, ETH_P_8021Q);
3528
3529 e1000e_reset_adaptive(hw);
3530
3531 if (!netif_running(adapter->netdev) &&
3532 !test_bit(__E1000_TESTING, &adapter->state)) {
3533 e1000_power_down_phy(adapter);
3534 return;
3535 }
3536
3537 e1000_get_phy_info(hw);
3538
3539 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3540 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
3541 u16 phy_data = 0;
3542 /*
3543 * speed up time to link by disabling smart power down, ignore
3544 * the return value of this function because there is nothing
3545 * different we would do if it failed
3546 */
3547 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3548 phy_data &= ~IGP02E1000_PM_SPD;
3549 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3550 }
3551}
3552
3553int e1000e_up(struct e1000_adapter *adapter)
3554{
3555 struct e1000_hw *hw = &adapter->hw;
3556
3557 /* hardware has been reset, we need to reload some things */
3558 e1000_configure(adapter);
3559
3560 clear_bit(__E1000_DOWN, &adapter->state);
3561
3562 if (adapter->msix_entries)
3563 e1000_configure_msix(adapter);
3564 e1000_irq_enable(adapter);
3565
3566 netif_start_queue(adapter->netdev);
3567
3568 /* fire a link change interrupt to start the watchdog */
3569 if (adapter->msix_entries)
3570 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3571 else
3572 ew32(ICS, E1000_ICS_LSC);
3573
3574 return 0;
3575}
3576
3577static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
3578{
3579 struct e1000_hw *hw = &adapter->hw;
3580
3581 if (!(adapter->flags2 & FLAG2_DMA_BURST))
3582 return;
3583
3584 /* flush pending descriptor writebacks to memory */
3585 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3586 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3587
3588 /* execute the writes immediately */
3589 e1e_flush();
3590
3591 /*
3592 * due to rare timing issues, write to TIDV/RDTR again to ensure the
3593 * write is successful
3594 */
3595 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
3596 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
3597
3598 /* execute the writes immediately */
3599 e1e_flush();
3600}
3601
3602static void e1000e_update_stats(struct e1000_adapter *adapter);
3603
3604void e1000e_down(struct e1000_adapter *adapter)
3605{
3606 struct net_device *netdev = adapter->netdev;
3607 struct e1000_hw *hw = &adapter->hw;
3608 u32 tctl, rctl;
3609
3610 /*
3611 * signal that we're down so the interrupt handler does not
3612 * reschedule our watchdog timer
3613 */
3614 set_bit(__E1000_DOWN, &adapter->state);
3615
3616 /* disable receives in the hardware */
3617 rctl = er32(RCTL);
3618 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3619 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3620 /* flush and sleep below */
3621
3622 netif_stop_queue(netdev);
3623
3624 /* disable transmits in the hardware */
3625 tctl = er32(TCTL);
3626 tctl &= ~E1000_TCTL_EN;
3627 ew32(TCTL, tctl);
3628
3629 /* flush both disables and wait for them to finish */
3630 e1e_flush();
3631 usleep_range(10000, 20000);
3632
3633 e1000_irq_disable(adapter);
3634
3635 del_timer_sync(&adapter->watchdog_timer);
3636 del_timer_sync(&adapter->phy_info_timer);
3637
3638 netif_carrier_off(netdev);
3639
3640 spin_lock(&adapter->stats64_lock);
3641 e1000e_update_stats(adapter);
3642 spin_unlock(&adapter->stats64_lock);
3643
3644 e1000e_flush_descriptors(adapter);
3645 e1000_clean_tx_ring(adapter->tx_ring);
3646 e1000_clean_rx_ring(adapter->rx_ring);
3647
3648 adapter->link_speed = 0;
3649 adapter->link_duplex = 0;
3650
3651 if (!pci_channel_offline(adapter->pdev))
3652 e1000e_reset(adapter);
3653
3654 /*
3655 * TODO: for power management, we could drop the link and
3656 * pci_disable_device here.
3657 */
3658}
3659
3660void e1000e_reinit_locked(struct e1000_adapter *adapter)
3661{
3662 might_sleep();
3663 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3664 usleep_range(1000, 2000);
3665 e1000e_down(adapter);
3666 e1000e_up(adapter);
3667 clear_bit(__E1000_RESETTING, &adapter->state);
3668}
3669
3670/**
3671 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3672 * @adapter: board private structure to initialize
3673 *
3674 * e1000_sw_init initializes the Adapter private data structure.
3675 * Fields are initialized based on PCI device information and
3676 * OS network device settings (MTU size).
3677 **/
3678static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3679{
3680 struct net_device *netdev = adapter->netdev;
3681
3682 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3683 adapter->rx_ps_bsize0 = 128;
3684 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3685 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3686 adapter->tx_ring_count = E1000_DEFAULT_TXD;
3687 adapter->rx_ring_count = E1000_DEFAULT_RXD;
3688
3689 spin_lock_init(&adapter->stats64_lock);
3690
3691 e1000e_set_interrupt_capability(adapter);
3692
3693 if (e1000_alloc_queues(adapter))
3694 return -ENOMEM;
3695
3696 /* Explicitly disable IRQ since the NIC can be in any state. */
3697 e1000_irq_disable(adapter);
3698
3699 set_bit(__E1000_DOWN, &adapter->state);
3700 return 0;
3701}
3702
3703/**
3704 * e1000_intr_msi_test - Interrupt Handler
3705 * @irq: interrupt number
3706 * @data: pointer to a network interface device structure
3707 **/
3708static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3709{
3710 struct net_device *netdev = data;
3711 struct e1000_adapter *adapter = netdev_priv(netdev);
3712 struct e1000_hw *hw = &adapter->hw;
3713 u32 icr = er32(ICR);
3714
3715 e_dbg("icr is %08X\n", icr);
3716 if (icr & E1000_ICR_RXSEQ) {
3717 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3718 wmb();
3719 }
3720
3721 return IRQ_HANDLED;
3722}
3723
3724/**
3725 * e1000_test_msi_interrupt - Returns 0 for successful test
3726 * @adapter: board private struct
3727 *
3728 * code flow taken from tg3.c
3729 **/
3730static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3731{
3732 struct net_device *netdev = adapter->netdev;
3733 struct e1000_hw *hw = &adapter->hw;
3734 int err;
3735
3736 /* poll_enable hasn't been called yet, so don't need disable */
3737 /* clear any pending events */
3738 er32(ICR);
3739
3740 /* free the real vector and request a test handler */
3741 e1000_free_irq(adapter);
3742 e1000e_reset_interrupt_capability(adapter);
3743
3744 /* Assume that the test fails, if it succeeds then the test
3745 * MSI irq handler will unset this flag */
3746 adapter->flags |= FLAG_MSI_TEST_FAILED;
3747
3748 err = pci_enable_msi(adapter->pdev);
3749 if (err)
3750 goto msi_test_failed;
3751
3752 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
3753 netdev->name, netdev);
3754 if (err) {
3755 pci_disable_msi(adapter->pdev);
3756 goto msi_test_failed;
3757 }
3758
3759 wmb();
3760
3761 e1000_irq_enable(adapter);
3762
3763 /* fire an unusual interrupt on the test handler */
3764 ew32(ICS, E1000_ICS_RXSEQ);
3765 e1e_flush();
3766 msleep(100);
3767
3768 e1000_irq_disable(adapter);
3769
3770 rmb();
3771
3772 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
3773 adapter->int_mode = E1000E_INT_MODE_LEGACY;
3774 e_info("MSI interrupt test failed, using legacy interrupt.\n");
3775 } else {
3776 e_dbg("MSI interrupt test succeeded!\n");
3777 }
3778
3779 free_irq(adapter->pdev->irq, netdev);
3780 pci_disable_msi(adapter->pdev);
3781
3782msi_test_failed:
3783 e1000e_set_interrupt_capability(adapter);
3784 return e1000_request_irq(adapter);
3785}
3786
3787/**
3788 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3789 * @adapter: board private struct
3790 *
3791 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3792 **/
3793static int e1000_test_msi(struct e1000_adapter *adapter)
3794{
3795 int err;
3796 u16 pci_cmd;
3797
3798 if (!(adapter->flags & FLAG_MSI_ENABLED))
3799 return 0;
3800
3801 /* disable SERR in case the MSI write causes a master abort */
3802 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3803 if (pci_cmd & PCI_COMMAND_SERR)
3804 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3805 pci_cmd & ~PCI_COMMAND_SERR);
3806
3807 err = e1000_test_msi_interrupt(adapter);
3808
3809 /* re-enable SERR */
3810 if (pci_cmd & PCI_COMMAND_SERR) {
3811 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3812 pci_cmd |= PCI_COMMAND_SERR;
3813 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3814 }
3815
3816 return err;
3817}
3818
3819/**
3820 * e1000_open - Called when a network interface is made active
3821 * @netdev: network interface device structure
3822 *
3823 * Returns 0 on success, negative value on failure
3824 *
3825 * The open entry point is called when a network interface is made
3826 * active by the system (IFF_UP). At this point all resources needed
3827 * for transmit and receive operations are allocated, the interrupt
3828 * handler is registered with the OS, the watchdog timer is started,
3829 * and the stack is notified that the interface is ready.
3830 **/
3831static int e1000_open(struct net_device *netdev)
3832{
3833 struct e1000_adapter *adapter = netdev_priv(netdev);
3834 struct e1000_hw *hw = &adapter->hw;
3835 struct pci_dev *pdev = adapter->pdev;
3836 int err;
3837
3838 /* disallow open during test */
3839 if (test_bit(__E1000_TESTING, &adapter->state))
3840 return -EBUSY;
3841
3842 pm_runtime_get_sync(&pdev->dev);
3843
3844 netif_carrier_off(netdev);
3845
3846 /* allocate transmit descriptors */
3847 err = e1000e_setup_tx_resources(adapter->tx_ring);
3848 if (err)
3849 goto err_setup_tx;
3850
3851 /* allocate receive descriptors */
3852 err = e1000e_setup_rx_resources(adapter->rx_ring);
3853 if (err)
3854 goto err_setup_rx;
3855
3856 /*
3857 * If AMT is enabled, let the firmware know that the network
3858 * interface is now open and reset the part to a known state.
3859 */
3860 if (adapter->flags & FLAG_HAS_AMT) {
3861 e1000e_get_hw_control(adapter);
3862 e1000e_reset(adapter);
3863 }
3864
3865 e1000e_power_up_phy(adapter);
3866
3867 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3868 if ((adapter->hw.mng_cookie.status &
3869 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3870 e1000_update_mng_vlan(adapter);
3871
3872 /* DMA latency requirement to workaround jumbo issue */
3873 if (adapter->hw.mac.type == e1000_pch2lan)
3874 pm_qos_add_request(&adapter->netdev->pm_qos_req,
3875 PM_QOS_CPU_DMA_LATENCY,
3876 PM_QOS_DEFAULT_VALUE);
3877
3878 /*
3879 * before we allocate an interrupt, we must be ready to handle it.
3880 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3881 * as soon as we call pci_request_irq, so we have to setup our
3882 * clean_rx handler before we do so.
3883 */
3884 e1000_configure(adapter);
3885
3886 err = e1000_request_irq(adapter);
3887 if (err)
3888 goto err_req_irq;
3889
3890 /*
3891 * Work around PCIe errata with MSI interrupts causing some chipsets to
3892 * ignore e1000e MSI messages, which means we need to test our MSI
3893 * interrupt now
3894 */
3895 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
3896 err = e1000_test_msi(adapter);
3897 if (err) {
3898 e_err("Interrupt allocation failed\n");
3899 goto err_req_irq;
3900 }
3901 }
3902
3903 /* From here on the code is the same as e1000e_up() */
3904 clear_bit(__E1000_DOWN, &adapter->state);
3905
3906 napi_enable(&adapter->napi);
3907
3908 e1000_irq_enable(adapter);
3909
3910 adapter->tx_hang_recheck = false;
3911 netif_start_queue(netdev);
3912
3913 adapter->idle_check = true;
3914 pm_runtime_put(&pdev->dev);
3915
3916 /* fire a link status change interrupt to start the watchdog */
3917 if (adapter->msix_entries)
3918 ew32(ICS, E1000_ICS_LSC | E1000_ICR_OTHER);
3919 else
3920 ew32(ICS, E1000_ICS_LSC);
3921
3922 return 0;
3923
3924err_req_irq:
3925 e1000e_release_hw_control(adapter);
3926 e1000_power_down_phy(adapter);
3927 e1000e_free_rx_resources(adapter->rx_ring);
3928err_setup_rx:
3929 e1000e_free_tx_resources(adapter->tx_ring);
3930err_setup_tx:
3931 e1000e_reset(adapter);
3932 pm_runtime_put_sync(&pdev->dev);
3933
3934 return err;
3935}
3936
3937/**
3938 * e1000_close - Disables a network interface
3939 * @netdev: network interface device structure
3940 *
3941 * Returns 0, this is not allowed to fail
3942 *
3943 * The close entry point is called when an interface is de-activated
3944 * by the OS. The hardware is still under the drivers control, but
3945 * needs to be disabled. A global MAC reset is issued to stop the
3946 * hardware, and all transmit and receive resources are freed.
3947 **/
3948static int e1000_close(struct net_device *netdev)
3949{
3950 struct e1000_adapter *adapter = netdev_priv(netdev);
3951 struct pci_dev *pdev = adapter->pdev;
3952 int count = E1000_CHECK_RESET_COUNT;
3953
3954 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
3955 usleep_range(10000, 20000);
3956
3957 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3958
3959 pm_runtime_get_sync(&pdev->dev);
3960
3961 napi_disable(&adapter->napi);
3962
3963 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3964 e1000e_down(adapter);
3965 e1000_free_irq(adapter);
3966 }
3967 e1000_power_down_phy(adapter);
3968
3969 e1000e_free_tx_resources(adapter->tx_ring);
3970 e1000e_free_rx_resources(adapter->rx_ring);
3971
3972 /*
3973 * kill manageability vlan ID if supported, but not if a vlan with
3974 * the same ID is registered on the host OS (let 8021q kill it)
3975 */
3976 if (adapter->hw.mng_cookie.status &
3977 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
3978 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3979
3980 /*
3981 * If AMT is enabled, let the firmware know that the network
3982 * interface is now closed
3983 */
3984 if ((adapter->flags & FLAG_HAS_AMT) &&
3985 !test_bit(__E1000_TESTING, &adapter->state))
3986 e1000e_release_hw_control(adapter);
3987
3988 if (adapter->hw.mac.type == e1000_pch2lan)
3989 pm_qos_remove_request(&adapter->netdev->pm_qos_req);
3990
3991 pm_runtime_put_sync(&pdev->dev);
3992
3993 return 0;
3994}
3995/**
3996 * e1000_set_mac - Change the Ethernet Address of the NIC
3997 * @netdev: network interface device structure
3998 * @p: pointer to an address structure
3999 *
4000 * Returns 0 on success, negative on failure
4001 **/
4002static int e1000_set_mac(struct net_device *netdev, void *p)
4003{
4004 struct e1000_adapter *adapter = netdev_priv(netdev);
4005 struct e1000_hw *hw = &adapter->hw;
4006 struct sockaddr *addr = p;
4007
4008 if (!is_valid_ether_addr(addr->sa_data))
4009 return -EADDRNOTAVAIL;
4010
4011 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4012 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4013
4014 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4015
4016 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4017 /* activate the work around */
4018 e1000e_set_laa_state_82571(&adapter->hw, 1);
4019
4020 /*
4021 * Hold a copy of the LAA in RAR[14] This is done so that
4022 * between the time RAR[0] gets clobbered and the time it
4023 * gets fixed (in e1000_watchdog), the actual LAA is in one
4024 * of the RARs and no incoming packets directed to this port
4025 * are dropped. Eventually the LAA will be in RAR[0] and
4026 * RAR[14]
4027 */
4028 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4029 adapter->hw.mac.rar_entry_count - 1);
4030 }
4031
4032 return 0;
4033}
4034
4035/**
4036 * e1000e_update_phy_task - work thread to update phy
4037 * @work: pointer to our work struct
4038 *
4039 * this worker thread exists because we must acquire a
4040 * semaphore to read the phy, which we could msleep while
4041 * waiting for it, and we can't msleep in a timer.
4042 **/
4043static void e1000e_update_phy_task(struct work_struct *work)
4044{
4045 struct e1000_adapter *adapter = container_of(work,
4046 struct e1000_adapter, update_phy_task);
4047
4048 if (test_bit(__E1000_DOWN, &adapter->state))
4049 return;
4050
4051 e1000_get_phy_info(&adapter->hw);
4052}
4053
4054/*
4055 * Need to wait a few seconds after link up to get diagnostic information from
4056 * the phy
4057 */
4058static void e1000_update_phy_info(unsigned long data)
4059{
4060 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4061
4062 if (test_bit(__E1000_DOWN, &adapter->state))
4063 return;
4064
4065 schedule_work(&adapter->update_phy_task);
4066}
4067
4068/**
4069 * e1000e_update_phy_stats - Update the PHY statistics counters
4070 * @adapter: board private structure
4071 *
4072 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4073 **/
4074static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4075{
4076 struct e1000_hw *hw = &adapter->hw;
4077 s32 ret_val;
4078 u16 phy_data;
4079
4080 ret_val = hw->phy.ops.acquire(hw);
4081 if (ret_val)
4082 return;
4083
4084 /*
4085 * A page set is expensive so check if already on desired page.
4086 * If not, set to the page with the PHY status registers.
4087 */
4088 hw->phy.addr = 1;
4089 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4090 &phy_data);
4091 if (ret_val)
4092 goto release;
4093 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4094 ret_val = hw->phy.ops.set_page(hw,
4095 HV_STATS_PAGE << IGP_PAGE_SHIFT);
4096 if (ret_val)
4097 goto release;
4098 }
4099
4100 /* Single Collision Count */
4101 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4102 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4103 if (!ret_val)
4104 adapter->stats.scc += phy_data;
4105
4106 /* Excessive Collision Count */
4107 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4108 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4109 if (!ret_val)
4110 adapter->stats.ecol += phy_data;
4111
4112 /* Multiple Collision Count */
4113 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4114 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4115 if (!ret_val)
4116 adapter->stats.mcc += phy_data;
4117
4118 /* Late Collision Count */
4119 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4120 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4121 if (!ret_val)
4122 adapter->stats.latecol += phy_data;
4123
4124 /* Collision Count - also used for adaptive IFS */
4125 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4126 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4127 if (!ret_val)
4128 hw->mac.collision_delta = phy_data;
4129
4130 /* Defer Count */
4131 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4132 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4133 if (!ret_val)
4134 adapter->stats.dc += phy_data;
4135
4136 /* Transmit with no CRS */
4137 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4138 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4139 if (!ret_val)
4140 adapter->stats.tncrs += phy_data;
4141
4142release:
4143 hw->phy.ops.release(hw);
4144}
4145
4146/**
4147 * e1000e_update_stats - Update the board statistics counters
4148 * @adapter: board private structure
4149 **/
4150static void e1000e_update_stats(struct e1000_adapter *adapter)
4151{
4152 struct net_device *netdev = adapter->netdev;
4153 struct e1000_hw *hw = &adapter->hw;
4154 struct pci_dev *pdev = adapter->pdev;
4155
4156 /*
4157 * Prevent stats update while adapter is being reset, or if the pci
4158 * connection is down.
4159 */
4160 if (adapter->link_speed == 0)
4161 return;
4162 if (pci_channel_offline(pdev))
4163 return;
4164
4165 adapter->stats.crcerrs += er32(CRCERRS);
4166 adapter->stats.gprc += er32(GPRC);
4167 adapter->stats.gorc += er32(GORCL);
4168 er32(GORCH); /* Clear gorc */
4169 adapter->stats.bprc += er32(BPRC);
4170 adapter->stats.mprc += er32(MPRC);
4171 adapter->stats.roc += er32(ROC);
4172
4173 adapter->stats.mpc += er32(MPC);
4174
4175 /* Half-duplex statistics */
4176 if (adapter->link_duplex == HALF_DUPLEX) {
4177 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4178 e1000e_update_phy_stats(adapter);
4179 } else {
4180 adapter->stats.scc += er32(SCC);
4181 adapter->stats.ecol += er32(ECOL);
4182 adapter->stats.mcc += er32(MCC);
4183 adapter->stats.latecol += er32(LATECOL);
4184 adapter->stats.dc += er32(DC);
4185
4186 hw->mac.collision_delta = er32(COLC);
4187
4188 if ((hw->mac.type != e1000_82574) &&
4189 (hw->mac.type != e1000_82583))
4190 adapter->stats.tncrs += er32(TNCRS);
4191 }
4192 adapter->stats.colc += hw->mac.collision_delta;
4193 }
4194
4195 adapter->stats.xonrxc += er32(XONRXC);
4196 adapter->stats.xontxc += er32(XONTXC);
4197 adapter->stats.xoffrxc += er32(XOFFRXC);
4198 adapter->stats.xofftxc += er32(XOFFTXC);
4199 adapter->stats.gptc += er32(GPTC);
4200 adapter->stats.gotc += er32(GOTCL);
4201 er32(GOTCH); /* Clear gotc */
4202 adapter->stats.rnbc += er32(RNBC);
4203 adapter->stats.ruc += er32(RUC);
4204
4205 adapter->stats.mptc += er32(MPTC);
4206 adapter->stats.bptc += er32(BPTC);
4207
4208 /* used for adaptive IFS */
4209
4210 hw->mac.tx_packet_delta = er32(TPT);
4211 adapter->stats.tpt += hw->mac.tx_packet_delta;
4212
4213 adapter->stats.algnerrc += er32(ALGNERRC);
4214 adapter->stats.rxerrc += er32(RXERRC);
4215 adapter->stats.cexterr += er32(CEXTERR);
4216 adapter->stats.tsctc += er32(TSCTC);
4217 adapter->stats.tsctfc += er32(TSCTFC);
4218
4219 /* Fill out the OS statistics structure */
4220 netdev->stats.multicast = adapter->stats.mprc;
4221 netdev->stats.collisions = adapter->stats.colc;
4222
4223 /* Rx Errors */
4224
4225 /*
4226 * RLEC on some newer hardware can be incorrect so build
4227 * our own version based on RUC and ROC
4228 */
4229 netdev->stats.rx_errors = adapter->stats.rxerrc +
4230 adapter->stats.crcerrs + adapter->stats.algnerrc +
4231 adapter->stats.ruc + adapter->stats.roc +
4232 adapter->stats.cexterr;
4233 netdev->stats.rx_length_errors = adapter->stats.ruc +
4234 adapter->stats.roc;
4235 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4236 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4237 netdev->stats.rx_missed_errors = adapter->stats.mpc;
4238
4239 /* Tx Errors */
4240 netdev->stats.tx_errors = adapter->stats.ecol +
4241 adapter->stats.latecol;
4242 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4243 netdev->stats.tx_window_errors = adapter->stats.latecol;
4244 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4245
4246 /* Tx Dropped needs to be maintained elsewhere */
4247
4248 /* Management Stats */
4249 adapter->stats.mgptc += er32(MGTPTC);
4250 adapter->stats.mgprc += er32(MGTPRC);
4251 adapter->stats.mgpdc += er32(MGTPDC);
4252}
4253
4254/**
4255 * e1000_phy_read_status - Update the PHY register status snapshot
4256 * @adapter: board private structure
4257 **/
4258static void e1000_phy_read_status(struct e1000_adapter *adapter)
4259{
4260 struct e1000_hw *hw = &adapter->hw;
4261 struct e1000_phy_regs *phy = &adapter->phy_regs;
4262
4263 if ((er32(STATUS) & E1000_STATUS_LU) &&
4264 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4265 int ret_val;
4266
4267 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4268 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4269 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
4270 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
4271 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
4272 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
4273 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
4274 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
4275 if (ret_val)
4276 e_warn("Error reading PHY register\n");
4277 } else {
4278 /*
4279 * Do not read PHY registers if link is not up
4280 * Set values to typical power-on defaults
4281 */
4282 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4283 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4284 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4285 BMSR_ERCAP);
4286 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4287 ADVERTISE_ALL | ADVERTISE_CSMA);
4288 phy->lpa = 0;
4289 phy->expansion = EXPANSION_ENABLENPAGE;
4290 phy->ctrl1000 = ADVERTISE_1000FULL;
4291 phy->stat1000 = 0;
4292 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4293 }
4294}
4295
4296static void e1000_print_link_info(struct e1000_adapter *adapter)
4297{
4298 struct e1000_hw *hw = &adapter->hw;
4299 u32 ctrl = er32(CTRL);
4300
4301 /* Link status message must follow this format for user tools */
4302 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4303 adapter->netdev->name,
4304 adapter->link_speed,
4305 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
4306 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
4307 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
4308 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
4309}
4310
4311static bool e1000e_has_link(struct e1000_adapter *adapter)
4312{
4313 struct e1000_hw *hw = &adapter->hw;
4314 bool link_active = false;
4315 s32 ret_val = 0;
4316
4317 /*
4318 * get_link_status is set on LSC (link status) interrupt or
4319 * Rx sequence error interrupt. get_link_status will stay
4320 * false until the check_for_link establishes link
4321 * for copper adapters ONLY
4322 */
4323 switch (hw->phy.media_type) {
4324 case e1000_media_type_copper:
4325 if (hw->mac.get_link_status) {
4326 ret_val = hw->mac.ops.check_for_link(hw);
4327 link_active = !hw->mac.get_link_status;
4328 } else {
4329 link_active = true;
4330 }
4331 break;
4332 case e1000_media_type_fiber:
4333 ret_val = hw->mac.ops.check_for_link(hw);
4334 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
4335 break;
4336 case e1000_media_type_internal_serdes:
4337 ret_val = hw->mac.ops.check_for_link(hw);
4338 link_active = adapter->hw.mac.serdes_has_link;
4339 break;
4340 default:
4341 case e1000_media_type_unknown:
4342 break;
4343 }
4344
4345 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
4346 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
4347 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
4348 e_info("Gigabit has been disabled, downgrading speed\n");
4349 }
4350
4351 return link_active;
4352}
4353
4354static void e1000e_enable_receives(struct e1000_adapter *adapter)
4355{
4356 /* make sure the receive unit is started */
4357 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
4358 (adapter->flags & FLAG_RX_RESTART_NOW)) {
4359 struct e1000_hw *hw = &adapter->hw;
4360 u32 rctl = er32(RCTL);
4361 ew32(RCTL, rctl | E1000_RCTL_EN);
4362 adapter->flags &= ~FLAG_RX_RESTART_NOW;
4363 }
4364}
4365
4366static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
4367{
4368 struct e1000_hw *hw = &adapter->hw;
4369
4370 /*
4371 * With 82574 controllers, PHY needs to be checked periodically
4372 * for hung state and reset, if two calls return true
4373 */
4374 if (e1000_check_phy_82574(hw))
4375 adapter->phy_hang_count++;
4376 else
4377 adapter->phy_hang_count = 0;
4378
4379 if (adapter->phy_hang_count > 1) {
4380 adapter->phy_hang_count = 0;
4381 schedule_work(&adapter->reset_task);
4382 }
4383}
4384
4385/**
4386 * e1000_watchdog - Timer Call-back
4387 * @data: pointer to adapter cast into an unsigned long
4388 **/
4389static void e1000_watchdog(unsigned long data)
4390{
4391 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
4392
4393 /* Do the rest outside of interrupt context */
4394 schedule_work(&adapter->watchdog_task);
4395
4396 /* TODO: make this use queue_delayed_work() */
4397}
4398
4399static void e1000_watchdog_task(struct work_struct *work)
4400{
4401 struct e1000_adapter *adapter = container_of(work,
4402 struct e1000_adapter, watchdog_task);
4403 struct net_device *netdev = adapter->netdev;
4404 struct e1000_mac_info *mac = &adapter->hw.mac;
4405 struct e1000_phy_info *phy = &adapter->hw.phy;
4406 struct e1000_ring *tx_ring = adapter->tx_ring;
4407 struct e1000_hw *hw = &adapter->hw;
4408 u32 link, tctl;
4409
4410 if (test_bit(__E1000_DOWN, &adapter->state))
4411 return;
4412
4413 link = e1000e_has_link(adapter);
4414 if ((netif_carrier_ok(netdev)) && link) {
4415 /* Cancel scheduled suspend requests. */
4416 pm_runtime_resume(netdev->dev.parent);
4417
4418 e1000e_enable_receives(adapter);
4419 goto link_up;
4420 }
4421
4422 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
4423 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
4424 e1000_update_mng_vlan(adapter);
4425
4426 if (link) {
4427 if (!netif_carrier_ok(netdev)) {
4428 bool txb2b = true;
4429
4430 /* Cancel scheduled suspend requests. */
4431 pm_runtime_resume(netdev->dev.parent);
4432
4433 /* update snapshot of PHY registers on LSC */
4434 e1000_phy_read_status(adapter);
4435 mac->ops.get_link_up_info(&adapter->hw,
4436 &adapter->link_speed,
4437 &adapter->link_duplex);
4438 e1000_print_link_info(adapter);
4439 /*
4440 * On supported PHYs, check for duplex mismatch only
4441 * if link has autonegotiated at 10/100 half
4442 */
4443 if ((hw->phy.type == e1000_phy_igp_3 ||
4444 hw->phy.type == e1000_phy_bm) &&
4445 (hw->mac.autoneg == true) &&
4446 (adapter->link_speed == SPEED_10 ||
4447 adapter->link_speed == SPEED_100) &&
4448 (adapter->link_duplex == HALF_DUPLEX)) {
4449 u16 autoneg_exp;
4450
4451 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
4452
4453 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
4454 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
4455 }
4456
4457 /* adjust timeout factor according to speed/duplex */
4458 adapter->tx_timeout_factor = 1;
4459 switch (adapter->link_speed) {
4460 case SPEED_10:
4461 txb2b = false;
4462 adapter->tx_timeout_factor = 16;
4463 break;
4464 case SPEED_100:
4465 txb2b = false;
4466 adapter->tx_timeout_factor = 10;
4467 break;
4468 }
4469
4470 /*
4471 * workaround: re-program speed mode bit after
4472 * link-up event
4473 */
4474 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
4475 !txb2b) {
4476 u32 tarc0;
4477 tarc0 = er32(TARC(0));
4478 tarc0 &= ~SPEED_MODE_BIT;
4479 ew32(TARC(0), tarc0);
4480 }
4481
4482 /*
4483 * disable TSO for pcie and 10/100 speeds, to avoid
4484 * some hardware issues
4485 */
4486 if (!(adapter->flags & FLAG_TSO_FORCE)) {
4487 switch (adapter->link_speed) {
4488 case SPEED_10:
4489 case SPEED_100:
4490 e_info("10/100 speed: disabling TSO\n");
4491 netdev->features &= ~NETIF_F_TSO;
4492 netdev->features &= ~NETIF_F_TSO6;
4493 break;
4494 case SPEED_1000:
4495 netdev->features |= NETIF_F_TSO;
4496 netdev->features |= NETIF_F_TSO6;
4497 break;
4498 default:
4499 /* oops */
4500 break;
4501 }
4502 }
4503
4504 /*
4505 * enable transmits in the hardware, need to do this
4506 * after setting TARC(0)
4507 */
4508 tctl = er32(TCTL);
4509 tctl |= E1000_TCTL_EN;
4510 ew32(TCTL, tctl);
4511
4512 /*
4513 * Perform any post-link-up configuration before
4514 * reporting link up.
4515 */
4516 if (phy->ops.cfg_on_link_up)
4517 phy->ops.cfg_on_link_up(hw);
4518
4519 netif_carrier_on(netdev);
4520
4521 if (!test_bit(__E1000_DOWN, &adapter->state))
4522 mod_timer(&adapter->phy_info_timer,
4523 round_jiffies(jiffies + 2 * HZ));
4524 }
4525 } else {
4526 if (netif_carrier_ok(netdev)) {
4527 adapter->link_speed = 0;
4528 adapter->link_duplex = 0;
4529 /* Link status message must follow this format */
4530 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4531 adapter->netdev->name);
4532 netif_carrier_off(netdev);
4533 if (!test_bit(__E1000_DOWN, &adapter->state))
4534 mod_timer(&adapter->phy_info_timer,
4535 round_jiffies(jiffies + 2 * HZ));
4536
4537 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4538 schedule_work(&adapter->reset_task);
4539 else
4540 pm_schedule_suspend(netdev->dev.parent,
4541 LINK_TIMEOUT);
4542 }
4543 }
4544
4545link_up:
4546 spin_lock(&adapter->stats64_lock);
4547 e1000e_update_stats(adapter);
4548
4549 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4550 adapter->tpt_old = adapter->stats.tpt;
4551 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4552 adapter->colc_old = adapter->stats.colc;
4553
4554 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4555 adapter->gorc_old = adapter->stats.gorc;
4556 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4557 adapter->gotc_old = adapter->stats.gotc;
4558 spin_unlock(&adapter->stats64_lock);
4559
4560 e1000e_update_adaptive(&adapter->hw);
4561
4562 if (!netif_carrier_ok(netdev) &&
4563 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) {
4564 /*
4565 * We've lost link, so the controller stops DMA,
4566 * but we've got queued Tx work that's never going
4567 * to get done, so reset controller to flush Tx.
4568 * (Do the reset outside of interrupt context).
4569 */
4570 schedule_work(&adapter->reset_task);
4571 /* return immediately since reset is imminent */
4572 return;
4573 }
4574
4575 /* Simple mode for Interrupt Throttle Rate (ITR) */
4576 if (adapter->itr_setting == 4) {
4577 /*
4578 * Symmetric Tx/Rx gets a reduced ITR=2000;
4579 * Total asymmetrical Tx or Rx gets ITR=8000;
4580 * everyone else is between 2000-8000.
4581 */
4582 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
4583 u32 dif = (adapter->gotc > adapter->gorc ?
4584 adapter->gotc - adapter->gorc :
4585 adapter->gorc - adapter->gotc) / 10000;
4586 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
4587
4588 ew32(ITR, 1000000000 / (itr * 256));
4589 }
4590
4591 /* Cause software interrupt to ensure Rx ring is cleaned */
4592 if (adapter->msix_entries)
4593 ew32(ICS, adapter->rx_ring->ims_val);
4594 else
4595 ew32(ICS, E1000_ICS_RXDMT0);
4596
4597 /* flush pending descriptors to memory before detecting Tx hang */
4598 e1000e_flush_descriptors(adapter);
4599
4600 /* Force detection of hung controller every watchdog period */
4601 adapter->detect_tx_hung = true;
4602
4603 /*
4604 * With 82571 controllers, LAA may be overwritten due to controller
4605 * reset from the other port. Set the appropriate LAA in RAR[0]
4606 */
4607 if (e1000e_get_laa_state_82571(hw))
4608 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
4609
4610 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
4611 e1000e_check_82574_phy_workaround(adapter);
4612
4613 /* Reset the timer */
4614 if (!test_bit(__E1000_DOWN, &adapter->state))
4615 mod_timer(&adapter->watchdog_timer,
4616 round_jiffies(jiffies + 2 * HZ));
4617}
4618
4619#define E1000_TX_FLAGS_CSUM 0x00000001
4620#define E1000_TX_FLAGS_VLAN 0x00000002
4621#define E1000_TX_FLAGS_TSO 0x00000004
4622#define E1000_TX_FLAGS_IPV4 0x00000008
4623#define E1000_TX_FLAGS_NO_FCS 0x00000010
4624#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4625#define E1000_TX_FLAGS_VLAN_SHIFT 16
4626
4627static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb)
4628{
4629 struct e1000_context_desc *context_desc;
4630 struct e1000_buffer *buffer_info;
4631 unsigned int i;
4632 u32 cmd_length = 0;
4633 u16 ipcse = 0, tucse, mss;
4634 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4635
4636 if (!skb_is_gso(skb))
4637 return 0;
4638
4639 if (skb_header_cloned(skb)) {
4640 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4641
4642 if (err)
4643 return err;
4644 }
4645
4646 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4647 mss = skb_shinfo(skb)->gso_size;
4648 if (skb->protocol == htons(ETH_P_IP)) {
4649 struct iphdr *iph = ip_hdr(skb);
4650 iph->tot_len = 0;
4651 iph->check = 0;
4652 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4653 0, IPPROTO_TCP, 0);
4654 cmd_length = E1000_TXD_CMD_IP;
4655 ipcse = skb_transport_offset(skb) - 1;
4656 } else if (skb_is_gso_v6(skb)) {
4657 ipv6_hdr(skb)->payload_len = 0;
4658 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4659 &ipv6_hdr(skb)->daddr,
4660 0, IPPROTO_TCP, 0);
4661 ipcse = 0;
4662 }
4663 ipcss = skb_network_offset(skb);
4664 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4665 tucss = skb_transport_offset(skb);
4666 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4667 tucse = 0;
4668
4669 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4670 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4671
4672 i = tx_ring->next_to_use;
4673 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4674 buffer_info = &tx_ring->buffer_info[i];
4675
4676 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4677 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4678 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4679 context_desc->upper_setup.tcp_fields.tucss = tucss;
4680 context_desc->upper_setup.tcp_fields.tucso = tucso;
4681 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4682 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4683 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4684 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4685
4686 buffer_info->time_stamp = jiffies;
4687 buffer_info->next_to_watch = i;
4688
4689 i++;
4690 if (i == tx_ring->count)
4691 i = 0;
4692 tx_ring->next_to_use = i;
4693
4694 return 1;
4695}
4696
4697static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb)
4698{
4699 struct e1000_adapter *adapter = tx_ring->adapter;
4700 struct e1000_context_desc *context_desc;
4701 struct e1000_buffer *buffer_info;
4702 unsigned int i;
4703 u8 css;
4704 u32 cmd_len = E1000_TXD_CMD_DEXT;
4705 __be16 protocol;
4706
4707 if (skb->ip_summed != CHECKSUM_PARTIAL)
4708 return 0;
4709
4710 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4711 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4712 else
4713 protocol = skb->protocol;
4714
4715 switch (protocol) {
4716 case cpu_to_be16(ETH_P_IP):
4717 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4718 cmd_len |= E1000_TXD_CMD_TCP;
4719 break;
4720 case cpu_to_be16(ETH_P_IPV6):
4721 /* XXX not handling all IPV6 headers */
4722 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4723 cmd_len |= E1000_TXD_CMD_TCP;
4724 break;
4725 default:
4726 if (unlikely(net_ratelimit()))
4727 e_warn("checksum_partial proto=%x!\n",
4728 be16_to_cpu(protocol));
4729 break;
4730 }
4731
4732 css = skb_checksum_start_offset(skb);
4733
4734 i = tx_ring->next_to_use;
4735 buffer_info = &tx_ring->buffer_info[i];
4736 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4737
4738 context_desc->lower_setup.ip_config = 0;
4739 context_desc->upper_setup.tcp_fields.tucss = css;
4740 context_desc->upper_setup.tcp_fields.tucso =
4741 css + skb->csum_offset;
4742 context_desc->upper_setup.tcp_fields.tucse = 0;
4743 context_desc->tcp_seg_setup.data = 0;
4744 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4745
4746 buffer_info->time_stamp = jiffies;
4747 buffer_info->next_to_watch = i;
4748
4749 i++;
4750 if (i == tx_ring->count)
4751 i = 0;
4752 tx_ring->next_to_use = i;
4753
4754 return 1;
4755}
4756
4757static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
4758 unsigned int first, unsigned int max_per_txd,
4759 unsigned int nr_frags)
4760{
4761 struct e1000_adapter *adapter = tx_ring->adapter;
4762 struct pci_dev *pdev = adapter->pdev;
4763 struct e1000_buffer *buffer_info;
4764 unsigned int len = skb_headlen(skb);
4765 unsigned int offset = 0, size, count = 0, i;
4766 unsigned int f, bytecount, segs;
4767
4768 i = tx_ring->next_to_use;
4769
4770 while (len) {
4771 buffer_info = &tx_ring->buffer_info[i];
4772 size = min(len, max_per_txd);
4773
4774 buffer_info->length = size;
4775 buffer_info->time_stamp = jiffies;
4776 buffer_info->next_to_watch = i;
4777 buffer_info->dma = dma_map_single(&pdev->dev,
4778 skb->data + offset,
4779 size, DMA_TO_DEVICE);
4780 buffer_info->mapped_as_page = false;
4781 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
4782 goto dma_error;
4783
4784 len -= size;
4785 offset += size;
4786 count++;
4787
4788 if (len) {
4789 i++;
4790 if (i == tx_ring->count)
4791 i = 0;
4792 }
4793 }
4794
4795 for (f = 0; f < nr_frags; f++) {
4796 const struct skb_frag_struct *frag;
4797
4798 frag = &skb_shinfo(skb)->frags[f];
4799 len = skb_frag_size(frag);
4800 offset = 0;
4801
4802 while (len) {
4803 i++;
4804 if (i == tx_ring->count)
4805 i = 0;
4806
4807 buffer_info = &tx_ring->buffer_info[i];
4808 size = min(len, max_per_txd);
4809
4810 buffer_info->length = size;
4811 buffer_info->time_stamp = jiffies;
4812 buffer_info->next_to_watch = i;
4813 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
4814 offset, size, DMA_TO_DEVICE);
4815 buffer_info->mapped_as_page = true;
4816 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
4817 goto dma_error;
4818
4819 len -= size;
4820 offset += size;
4821 count++;
4822 }
4823 }
4824
4825 segs = skb_shinfo(skb)->gso_segs ? : 1;
4826 /* multiply data chunks by size of headers */
4827 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4828
4829 tx_ring->buffer_info[i].skb = skb;
4830 tx_ring->buffer_info[i].segs = segs;
4831 tx_ring->buffer_info[i].bytecount = bytecount;
4832 tx_ring->buffer_info[first].next_to_watch = i;
4833
4834 return count;
4835
4836dma_error:
4837 dev_err(&pdev->dev, "Tx DMA map failed\n");
4838 buffer_info->dma = 0;
4839 if (count)
4840 count--;
4841
4842 while (count--) {
4843 if (i == 0)
4844 i += tx_ring->count;
4845 i--;
4846 buffer_info = &tx_ring->buffer_info[i];
4847 e1000_put_txbuf(tx_ring, buffer_info);
4848 }
4849
4850 return 0;
4851}
4852
4853static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
4854{
4855 struct e1000_adapter *adapter = tx_ring->adapter;
4856 struct e1000_tx_desc *tx_desc = NULL;
4857 struct e1000_buffer *buffer_info;
4858 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4859 unsigned int i;
4860
4861 if (tx_flags & E1000_TX_FLAGS_TSO) {
4862 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4863 E1000_TXD_CMD_TSE;
4864 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4865
4866 if (tx_flags & E1000_TX_FLAGS_IPV4)
4867 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4868 }
4869
4870 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4871 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4872 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4873 }
4874
4875 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4876 txd_lower |= E1000_TXD_CMD_VLE;
4877 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4878 }
4879
4880 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
4881 txd_lower &= ~(E1000_TXD_CMD_IFCS);
4882
4883 i = tx_ring->next_to_use;
4884
4885 do {
4886 buffer_info = &tx_ring->buffer_info[i];
4887 tx_desc = E1000_TX_DESC(*tx_ring, i);
4888 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4889 tx_desc->lower.data =
4890 cpu_to_le32(txd_lower | buffer_info->length);
4891 tx_desc->upper.data = cpu_to_le32(txd_upper);
4892
4893 i++;
4894 if (i == tx_ring->count)
4895 i = 0;
4896 } while (--count > 0);
4897
4898 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4899
4900 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
4901 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
4902 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
4903
4904 /*
4905 * Force memory writes to complete before letting h/w
4906 * know there are new descriptors to fetch. (Only
4907 * applicable for weak-ordered memory model archs,
4908 * such as IA-64).
4909 */
4910 wmb();
4911
4912 tx_ring->next_to_use = i;
4913
4914 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
4915 e1000e_update_tdt_wa(tx_ring, i);
4916 else
4917 writel(i, tx_ring->tail);
4918
4919 /*
4920 * we need this if more than one processor can write to our tail
4921 * at a time, it synchronizes IO on IA64/Altix systems
4922 */
4923 mmiowb();
4924}
4925
4926#define MINIMUM_DHCP_PACKET_SIZE 282
4927static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4928 struct sk_buff *skb)
4929{
4930 struct e1000_hw *hw = &adapter->hw;
4931 u16 length, offset;
4932
4933 if (vlan_tx_tag_present(skb)) {
4934 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4935 (adapter->hw.mng_cookie.status &
4936 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4937 return 0;
4938 }
4939
4940 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4941 return 0;
4942
4943 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4944 return 0;
4945
4946 {
4947 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4948 struct udphdr *udp;
4949
4950 if (ip->protocol != IPPROTO_UDP)
4951 return 0;
4952
4953 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4954 if (ntohs(udp->dest) != 67)
4955 return 0;
4956
4957 offset = (u8 *)udp + 8 - skb->data;
4958 length = skb->len - offset;
4959 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4960 }
4961
4962 return 0;
4963}
4964
4965static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
4966{
4967 struct e1000_adapter *adapter = tx_ring->adapter;
4968
4969 netif_stop_queue(adapter->netdev);
4970 /*
4971 * Herbert's original patch had:
4972 * smp_mb__after_netif_stop_queue();
4973 * but since that doesn't exist yet, just open code it.
4974 */
4975 smp_mb();
4976
4977 /*
4978 * We need to check again in a case another CPU has just
4979 * made room available.
4980 */
4981 if (e1000_desc_unused(tx_ring) < size)
4982 return -EBUSY;
4983
4984 /* A reprieve! */
4985 netif_start_queue(adapter->netdev);
4986 ++adapter->restart_queue;
4987 return 0;
4988}
4989
4990static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
4991{
4992 BUG_ON(size > tx_ring->count);
4993
4994 if (e1000_desc_unused(tx_ring) >= size)
4995 return 0;
4996 return __e1000_maybe_stop_tx(tx_ring, size);
4997}
4998
4999static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5000 struct net_device *netdev)
5001{
5002 struct e1000_adapter *adapter = netdev_priv(netdev);
5003 struct e1000_ring *tx_ring = adapter->tx_ring;
5004 unsigned int first;
5005 unsigned int tx_flags = 0;
5006 unsigned int len = skb_headlen(skb);
5007 unsigned int nr_frags;
5008 unsigned int mss;
5009 int count = 0;
5010 int tso;
5011 unsigned int f;
5012
5013 if (test_bit(__E1000_DOWN, &adapter->state)) {
5014 dev_kfree_skb_any(skb);
5015 return NETDEV_TX_OK;
5016 }
5017
5018 if (skb->len <= 0) {
5019 dev_kfree_skb_any(skb);
5020 return NETDEV_TX_OK;
5021 }
5022
5023 mss = skb_shinfo(skb)->gso_size;
5024 if (mss) {
5025 u8 hdr_len;
5026
5027 /*
5028 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
5029 * points to just header, pull a few bytes of payload from
5030 * frags into skb->data
5031 */
5032 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5033 /*
5034 * we do this workaround for ES2LAN, but it is un-necessary,
5035 * avoiding it could save a lot of cycles
5036 */
5037 if (skb->data_len && (hdr_len == len)) {
5038 unsigned int pull_size;
5039
5040 pull_size = min_t(unsigned int, 4, skb->data_len);
5041 if (!__pskb_pull_tail(skb, pull_size)) {
5042 e_err("__pskb_pull_tail failed.\n");
5043 dev_kfree_skb_any(skb);
5044 return NETDEV_TX_OK;
5045 }
5046 len = skb_headlen(skb);
5047 }
5048 }
5049
5050 /* reserve a descriptor for the offload context */
5051 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5052 count++;
5053 count++;
5054
5055 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5056
5057 nr_frags = skb_shinfo(skb)->nr_frags;
5058 for (f = 0; f < nr_frags; f++)
5059 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5060 adapter->tx_fifo_limit);
5061
5062 if (adapter->hw.mac.tx_pkt_filtering)
5063 e1000_transfer_dhcp_info(adapter, skb);
5064
5065 /*
5066 * need: count + 2 desc gap to keep tail from touching
5067 * head, otherwise try next time
5068 */
5069 if (e1000_maybe_stop_tx(tx_ring, count + 2))
5070 return NETDEV_TX_BUSY;
5071
5072 if (vlan_tx_tag_present(skb)) {
5073 tx_flags |= E1000_TX_FLAGS_VLAN;
5074 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
5075 }
5076
5077 first = tx_ring->next_to_use;
5078
5079 tso = e1000_tso(tx_ring, skb);
5080 if (tso < 0) {
5081 dev_kfree_skb_any(skb);
5082 return NETDEV_TX_OK;
5083 }
5084
5085 if (tso)
5086 tx_flags |= E1000_TX_FLAGS_TSO;
5087 else if (e1000_tx_csum(tx_ring, skb))
5088 tx_flags |= E1000_TX_FLAGS_CSUM;
5089
5090 /*
5091 * Old method was to assume IPv4 packet by default if TSO was enabled.
5092 * 82571 hardware supports TSO capabilities for IPv6 as well...
5093 * no longer assume, we must.
5094 */
5095 if (skb->protocol == htons(ETH_P_IP))
5096 tx_flags |= E1000_TX_FLAGS_IPV4;
5097
5098 if (unlikely(skb->no_fcs))
5099 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5100
5101 /* if count is 0 then mapping error has occurred */
5102 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5103 nr_frags);
5104 if (count) {
5105 skb_tx_timestamp(skb);
5106
5107 netdev_sent_queue(netdev, skb->len);
5108 e1000_tx_queue(tx_ring, tx_flags, count);
5109 /* Make sure there is space in the ring for the next send. */
5110 e1000_maybe_stop_tx(tx_ring,
5111 (MAX_SKB_FRAGS *
5112 DIV_ROUND_UP(PAGE_SIZE,
5113 adapter->tx_fifo_limit) + 2));
5114 } else {
5115 dev_kfree_skb_any(skb);
5116 tx_ring->buffer_info[first].time_stamp = 0;
5117 tx_ring->next_to_use = first;
5118 }
5119
5120 return NETDEV_TX_OK;
5121}
5122
5123/**
5124 * e1000_tx_timeout - Respond to a Tx Hang
5125 * @netdev: network interface device structure
5126 **/
5127static void e1000_tx_timeout(struct net_device *netdev)
5128{
5129 struct e1000_adapter *adapter = netdev_priv(netdev);
5130
5131 /* Do the reset outside of interrupt context */
5132 adapter->tx_timeout_count++;
5133 schedule_work(&adapter->reset_task);
5134}
5135
5136static void e1000_reset_task(struct work_struct *work)
5137{
5138 struct e1000_adapter *adapter;
5139 adapter = container_of(work, struct e1000_adapter, reset_task);
5140
5141 /* don't run the task if already down */
5142 if (test_bit(__E1000_DOWN, &adapter->state))
5143 return;
5144
5145 if (!((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5146 (adapter->flags & FLAG_RX_RESTART_NOW))) {
5147 e1000e_dump(adapter);
5148 e_err("Reset adapter\n");
5149 }
5150 e1000e_reinit_locked(adapter);
5151}
5152
5153/**
5154 * e1000_get_stats64 - Get System Network Statistics
5155 * @netdev: network interface device structure
5156 * @stats: rtnl_link_stats64 pointer
5157 *
5158 * Returns the address of the device statistics structure.
5159 **/
5160struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5161 struct rtnl_link_stats64 *stats)
5162{
5163 struct e1000_adapter *adapter = netdev_priv(netdev);
5164
5165 memset(stats, 0, sizeof(struct rtnl_link_stats64));
5166 spin_lock(&adapter->stats64_lock);
5167 e1000e_update_stats(adapter);
5168 /* Fill out the OS statistics structure */
5169 stats->rx_bytes = adapter->stats.gorc;
5170 stats->rx_packets = adapter->stats.gprc;
5171 stats->tx_bytes = adapter->stats.gotc;
5172 stats->tx_packets = adapter->stats.gptc;
5173 stats->multicast = adapter->stats.mprc;
5174 stats->collisions = adapter->stats.colc;
5175
5176 /* Rx Errors */
5177
5178 /*
5179 * RLEC on some newer hardware can be incorrect so build
5180 * our own version based on RUC and ROC
5181 */
5182 stats->rx_errors = adapter->stats.rxerrc +
5183 adapter->stats.crcerrs + adapter->stats.algnerrc +
5184 adapter->stats.ruc + adapter->stats.roc +
5185 adapter->stats.cexterr;
5186 stats->rx_length_errors = adapter->stats.ruc +
5187 adapter->stats.roc;
5188 stats->rx_crc_errors = adapter->stats.crcerrs;
5189 stats->rx_frame_errors = adapter->stats.algnerrc;
5190 stats->rx_missed_errors = adapter->stats.mpc;
5191
5192 /* Tx Errors */
5193 stats->tx_errors = adapter->stats.ecol +
5194 adapter->stats.latecol;
5195 stats->tx_aborted_errors = adapter->stats.ecol;
5196 stats->tx_window_errors = adapter->stats.latecol;
5197 stats->tx_carrier_errors = adapter->stats.tncrs;
5198
5199 /* Tx Dropped needs to be maintained elsewhere */
5200
5201 spin_unlock(&adapter->stats64_lock);
5202 return stats;
5203}
5204
5205/**
5206 * e1000_change_mtu - Change the Maximum Transfer Unit
5207 * @netdev: network interface device structure
5208 * @new_mtu: new value for maximum frame size
5209 *
5210 * Returns 0 on success, negative on failure
5211 **/
5212static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5213{
5214 struct e1000_adapter *adapter = netdev_priv(netdev);
5215 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
5216
5217 /* Jumbo frame support */
5218 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
5219 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5220 e_err("Jumbo Frames not supported.\n");
5221 return -EINVAL;
5222 }
5223
5224 /* Supported frame sizes */
5225 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
5226 (max_frame > adapter->max_hw_frame_size)) {
5227 e_err("Unsupported MTU setting\n");
5228 return -EINVAL;
5229 }
5230
5231 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
5232 if ((adapter->hw.mac.type >= e1000_pch2lan) &&
5233 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5234 (new_mtu > ETH_DATA_LEN)) {
5235 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
5236 return -EINVAL;
5237 }
5238
5239 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5240 usleep_range(1000, 2000);
5241 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5242 adapter->max_frame_size = max_frame;
5243 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5244 netdev->mtu = new_mtu;
5245 if (netif_running(netdev))
5246 e1000e_down(adapter);
5247
5248 /*
5249 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5250 * means we reserve 2 more, this pushes us to allocate from the next
5251 * larger slab size.
5252 * i.e. RXBUFFER_2048 --> size-4096 slab
5253 * However with the new *_jumbo_rx* routines, jumbo receives will use
5254 * fragmented skbs
5255 */
5256
5257 if (max_frame <= 2048)
5258 adapter->rx_buffer_len = 2048;
5259 else
5260 adapter->rx_buffer_len = 4096;
5261
5262 /* adjust allocation if LPE protects us, and we aren't using SBP */
5263 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
5264 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
5265 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
5266 + ETH_FCS_LEN;
5267
5268 if (netif_running(netdev))
5269 e1000e_up(adapter);
5270 else
5271 e1000e_reset(adapter);
5272
5273 clear_bit(__E1000_RESETTING, &adapter->state);
5274
5275 return 0;
5276}
5277
5278static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5279 int cmd)
5280{
5281 struct e1000_adapter *adapter = netdev_priv(netdev);
5282 struct mii_ioctl_data *data = if_mii(ifr);
5283
5284 if (adapter->hw.phy.media_type != e1000_media_type_copper)
5285 return -EOPNOTSUPP;
5286
5287 switch (cmd) {
5288 case SIOCGMIIPHY:
5289 data->phy_id = adapter->hw.phy.addr;
5290 break;
5291 case SIOCGMIIREG:
5292 e1000_phy_read_status(adapter);
5293
5294 switch (data->reg_num & 0x1F) {
5295 case MII_BMCR:
5296 data->val_out = adapter->phy_regs.bmcr;
5297 break;
5298 case MII_BMSR:
5299 data->val_out = adapter->phy_regs.bmsr;
5300 break;
5301 case MII_PHYSID1:
5302 data->val_out = (adapter->hw.phy.id >> 16);
5303 break;
5304 case MII_PHYSID2:
5305 data->val_out = (adapter->hw.phy.id & 0xFFFF);
5306 break;
5307 case MII_ADVERTISE:
5308 data->val_out = adapter->phy_regs.advertise;
5309 break;
5310 case MII_LPA:
5311 data->val_out = adapter->phy_regs.lpa;
5312 break;
5313 case MII_EXPANSION:
5314 data->val_out = adapter->phy_regs.expansion;
5315 break;
5316 case MII_CTRL1000:
5317 data->val_out = adapter->phy_regs.ctrl1000;
5318 break;
5319 case MII_STAT1000:
5320 data->val_out = adapter->phy_regs.stat1000;
5321 break;
5322 case MII_ESTATUS:
5323 data->val_out = adapter->phy_regs.estatus;
5324 break;
5325 default:
5326 return -EIO;
5327 }
5328 break;
5329 case SIOCSMIIREG:
5330 default:
5331 return -EOPNOTSUPP;
5332 }
5333 return 0;
5334}
5335
5336static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
5337{
5338 switch (cmd) {
5339 case SIOCGMIIPHY:
5340 case SIOCGMIIREG:
5341 case SIOCSMIIREG:
5342 return e1000_mii_ioctl(netdev, ifr, cmd);
5343 default:
5344 return -EOPNOTSUPP;
5345 }
5346}
5347
5348static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
5349{
5350 struct e1000_hw *hw = &adapter->hw;
5351 u32 i, mac_reg;
5352 u16 phy_reg, wuc_enable;
5353 int retval = 0;
5354
5355 /* copy MAC RARs to PHY RARs */
5356 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
5357
5358 retval = hw->phy.ops.acquire(hw);
5359 if (retval) {
5360 e_err("Could not acquire PHY\n");
5361 return retval;
5362 }
5363
5364 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
5365 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5366 if (retval)
5367 goto release;
5368
5369 /* copy MAC MTA to PHY MTA - only needed for pchlan */
5370 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
5371 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
5372 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
5373 (u16)(mac_reg & 0xFFFF));
5374 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
5375 (u16)((mac_reg >> 16) & 0xFFFF));
5376 }
5377
5378 /* configure PHY Rx Control register */
5379 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
5380 mac_reg = er32(RCTL);
5381 if (mac_reg & E1000_RCTL_UPE)
5382 phy_reg |= BM_RCTL_UPE;
5383 if (mac_reg & E1000_RCTL_MPE)
5384 phy_reg |= BM_RCTL_MPE;
5385 phy_reg &= ~(BM_RCTL_MO_MASK);
5386 if (mac_reg & E1000_RCTL_MO_3)
5387 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
5388 << BM_RCTL_MO_SHIFT);
5389 if (mac_reg & E1000_RCTL_BAM)
5390 phy_reg |= BM_RCTL_BAM;
5391 if (mac_reg & E1000_RCTL_PMCF)
5392 phy_reg |= BM_RCTL_PMCF;
5393 mac_reg = er32(CTRL);
5394 if (mac_reg & E1000_CTRL_RFCE)
5395 phy_reg |= BM_RCTL_RFCE;
5396 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
5397
5398 /* enable PHY wakeup in MAC register */
5399 ew32(WUFC, wufc);
5400 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
5401
5402 /* configure and enable PHY wakeup in PHY registers */
5403 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
5404 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
5405
5406 /* activate PHY wakeup */
5407 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
5408 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
5409 if (retval)
5410 e_err("Could not set PHY Host Wakeup bit\n");
5411release:
5412 hw->phy.ops.release(hw);
5413
5414 return retval;
5415}
5416
5417static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
5418 bool runtime)
5419{
5420 struct net_device *netdev = pci_get_drvdata(pdev);
5421 struct e1000_adapter *adapter = netdev_priv(netdev);
5422 struct e1000_hw *hw = &adapter->hw;
5423 u32 ctrl, ctrl_ext, rctl, status;
5424 /* Runtime suspend should only enable wakeup for link changes */
5425 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
5426 int retval = 0;
5427
5428 netif_device_detach(netdev);
5429
5430 if (netif_running(netdev)) {
5431 int count = E1000_CHECK_RESET_COUNT;
5432
5433 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
5434 usleep_range(10000, 20000);
5435
5436 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
5437 e1000e_down(adapter);
5438 e1000_free_irq(adapter);
5439 }
5440 e1000e_reset_interrupt_capability(adapter);
5441
5442 retval = pci_save_state(pdev);
5443 if (retval)
5444 return retval;
5445
5446 status = er32(STATUS);
5447 if (status & E1000_STATUS_LU)
5448 wufc &= ~E1000_WUFC_LNKC;
5449
5450 if (wufc) {
5451 e1000_setup_rctl(adapter);
5452 e1000e_set_rx_mode(netdev);
5453
5454 /* turn on all-multi mode if wake on multicast is enabled */
5455 if (wufc & E1000_WUFC_MC) {
5456 rctl = er32(RCTL);
5457 rctl |= E1000_RCTL_MPE;
5458 ew32(RCTL, rctl);
5459 }
5460
5461 ctrl = er32(CTRL);
5462 /* advertise wake from D3Cold */
5463 #define E1000_CTRL_ADVD3WUC 0x00100000
5464 /* phy power management enable */
5465 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5466 ctrl |= E1000_CTRL_ADVD3WUC;
5467 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
5468 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
5469 ew32(CTRL, ctrl);
5470
5471 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
5472 adapter->hw.phy.media_type ==
5473 e1000_media_type_internal_serdes) {
5474 /* keep the laser running in D3 */
5475 ctrl_ext = er32(CTRL_EXT);
5476 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
5477 ew32(CTRL_EXT, ctrl_ext);
5478 }
5479
5480 if (adapter->flags & FLAG_IS_ICH)
5481 e1000_suspend_workarounds_ich8lan(&adapter->hw);
5482
5483 /* Allow time for pending master requests to run */
5484 e1000e_disable_pcie_master(&adapter->hw);
5485
5486 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5487 /* enable wakeup by the PHY */
5488 retval = e1000_init_phy_wakeup(adapter, wufc);
5489 if (retval)
5490 return retval;
5491 } else {
5492 /* enable wakeup by the MAC */
5493 ew32(WUFC, wufc);
5494 ew32(WUC, E1000_WUC_PME_EN);
5495 }
5496 } else {
5497 ew32(WUC, 0);
5498 ew32(WUFC, 0);
5499 }
5500
5501 *enable_wake = !!wufc;
5502
5503 /* make sure adapter isn't asleep if manageability is enabled */
5504 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
5505 (hw->mac.ops.check_mng_mode(hw)))
5506 *enable_wake = true;
5507
5508 if (adapter->hw.phy.type == e1000_phy_igp_3)
5509 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
5510
5511 /*
5512 * Release control of h/w to f/w. If f/w is AMT enabled, this
5513 * would have already happened in close and is redundant.
5514 */
5515 e1000e_release_hw_control(adapter);
5516
5517 pci_disable_device(pdev);
5518
5519 return 0;
5520}
5521
5522static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
5523{
5524 if (sleep && wake) {
5525 pci_prepare_to_sleep(pdev);
5526 return;
5527 }
5528
5529 pci_wake_from_d3(pdev, wake);
5530 pci_set_power_state(pdev, PCI_D3hot);
5531}
5532
5533static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
5534 bool wake)
5535{
5536 struct net_device *netdev = pci_get_drvdata(pdev);
5537 struct e1000_adapter *adapter = netdev_priv(netdev);
5538
5539 /*
5540 * The pci-e switch on some quad port adapters will report a
5541 * correctable error when the MAC transitions from D0 to D3. To
5542 * prevent this we need to mask off the correctable errors on the
5543 * downstream port of the pci-e switch.
5544 */
5545 if (adapter->flags & FLAG_IS_QUAD_PORT) {
5546 struct pci_dev *us_dev = pdev->bus->self;
5547 int pos = pci_pcie_cap(us_dev);
5548 u16 devctl;
5549
5550 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
5551 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
5552 (devctl & ~PCI_EXP_DEVCTL_CERE));
5553
5554 e1000_power_off(pdev, sleep, wake);
5555
5556 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
5557 } else {
5558 e1000_power_off(pdev, sleep, wake);
5559 }
5560}
5561
5562#ifdef CONFIG_PCIEASPM
5563static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5564{
5565 pci_disable_link_state_locked(pdev, state);
5566}
5567#else
5568static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5569{
5570 int pos;
5571 u16 reg16;
5572
5573 /*
5574 * Both device and parent should have the same ASPM setting.
5575 * Disable ASPM in downstream component first and then upstream.
5576 */
5577 pos = pci_pcie_cap(pdev);
5578 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, ®16);
5579 reg16 &= ~state;
5580 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5581
5582 if (!pdev->bus->self)
5583 return;
5584
5585 pos = pci_pcie_cap(pdev->bus->self);
5586 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, ®16);
5587 reg16 &= ~state;
5588 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5589}
5590#endif
5591static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5592{
5593 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5594 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5595 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5596
5597 __e1000e_disable_aspm(pdev, state);
5598}
5599
5600#ifdef CONFIG_PM
5601static bool e1000e_pm_ready(struct e1000_adapter *adapter)
5602{
5603 return !!adapter->tx_ring->buffer_info;
5604}
5605
5606static int __e1000_resume(struct pci_dev *pdev)
5607{
5608 struct net_device *netdev = pci_get_drvdata(pdev);
5609 struct e1000_adapter *adapter = netdev_priv(netdev);
5610 struct e1000_hw *hw = &adapter->hw;
5611 u16 aspm_disable_flag = 0;
5612 u32 err;
5613
5614 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5615 aspm_disable_flag = PCIE_LINK_STATE_L0S;
5616 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5617 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5618 if (aspm_disable_flag)
5619 e1000e_disable_aspm(pdev, aspm_disable_flag);
5620
5621 pci_set_power_state(pdev, PCI_D0);
5622 pci_restore_state(pdev);
5623 pci_save_state(pdev);
5624
5625 e1000e_set_interrupt_capability(adapter);
5626 if (netif_running(netdev)) {
5627 err = e1000_request_irq(adapter);
5628 if (err)
5629 return err;
5630 }
5631
5632 if (hw->mac.type >= e1000_pch2lan)
5633 e1000_resume_workarounds_pchlan(&adapter->hw);
5634
5635 e1000e_power_up_phy(adapter);
5636
5637 /* report the system wakeup cause from S3/S4 */
5638 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5639 u16 phy_data;
5640
5641 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5642 if (phy_data) {
5643 e_info("PHY Wakeup cause - %s\n",
5644 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5645 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5646 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5647 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5648 phy_data & E1000_WUS_LNKC ?
5649 "Link Status Change" : "other");
5650 }
5651 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5652 } else {
5653 u32 wus = er32(WUS);
5654 if (wus) {
5655 e_info("MAC Wakeup cause - %s\n",
5656 wus & E1000_WUS_EX ? "Unicast Packet" :
5657 wus & E1000_WUS_MC ? "Multicast Packet" :
5658 wus & E1000_WUS_BC ? "Broadcast Packet" :
5659 wus & E1000_WUS_MAG ? "Magic Packet" :
5660 wus & E1000_WUS_LNKC ? "Link Status Change" :
5661 "other");
5662 }
5663 ew32(WUS, ~0);
5664 }
5665
5666 e1000e_reset(adapter);
5667
5668 e1000_init_manageability_pt(adapter);
5669
5670 if (netif_running(netdev))
5671 e1000e_up(adapter);
5672
5673 netif_device_attach(netdev);
5674
5675 /*
5676 * If the controller has AMT, do not set DRV_LOAD until the interface
5677 * is up. For all other cases, let the f/w know that the h/w is now
5678 * under the control of the driver.
5679 */
5680 if (!(adapter->flags & FLAG_HAS_AMT))
5681 e1000e_get_hw_control(adapter);
5682
5683 return 0;
5684}
5685
5686#ifdef CONFIG_PM_SLEEP
5687static int e1000_suspend(struct device *dev)
5688{
5689 struct pci_dev *pdev = to_pci_dev(dev);
5690 int retval;
5691 bool wake;
5692
5693 retval = __e1000_shutdown(pdev, &wake, false);
5694 if (!retval)
5695 e1000_complete_shutdown(pdev, true, wake);
5696
5697 return retval;
5698}
5699
5700static int e1000_resume(struct device *dev)
5701{
5702 struct pci_dev *pdev = to_pci_dev(dev);
5703 struct net_device *netdev = pci_get_drvdata(pdev);
5704 struct e1000_adapter *adapter = netdev_priv(netdev);
5705
5706 if (e1000e_pm_ready(adapter))
5707 adapter->idle_check = true;
5708
5709 return __e1000_resume(pdev);
5710}
5711#endif /* CONFIG_PM_SLEEP */
5712
5713#ifdef CONFIG_PM_RUNTIME
5714static int e1000_runtime_suspend(struct device *dev)
5715{
5716 struct pci_dev *pdev = to_pci_dev(dev);
5717 struct net_device *netdev = pci_get_drvdata(pdev);
5718 struct e1000_adapter *adapter = netdev_priv(netdev);
5719
5720 if (e1000e_pm_ready(adapter)) {
5721 bool wake;
5722
5723 __e1000_shutdown(pdev, &wake, true);
5724 }
5725
5726 return 0;
5727}
5728
5729static int e1000_idle(struct device *dev)
5730{
5731 struct pci_dev *pdev = to_pci_dev(dev);
5732 struct net_device *netdev = pci_get_drvdata(pdev);
5733 struct e1000_adapter *adapter = netdev_priv(netdev);
5734
5735 if (!e1000e_pm_ready(adapter))
5736 return 0;
5737
5738 if (adapter->idle_check) {
5739 adapter->idle_check = false;
5740 if (!e1000e_has_link(adapter))
5741 pm_schedule_suspend(dev, MSEC_PER_SEC);
5742 }
5743
5744 return -EBUSY;
5745}
5746
5747static int e1000_runtime_resume(struct device *dev)
5748{
5749 struct pci_dev *pdev = to_pci_dev(dev);
5750 struct net_device *netdev = pci_get_drvdata(pdev);
5751 struct e1000_adapter *adapter = netdev_priv(netdev);
5752
5753 if (!e1000e_pm_ready(adapter))
5754 return 0;
5755
5756 adapter->idle_check = !dev->power.runtime_auto;
5757 return __e1000_resume(pdev);
5758}
5759#endif /* CONFIG_PM_RUNTIME */
5760#endif /* CONFIG_PM */
5761
5762static void e1000_shutdown(struct pci_dev *pdev)
5763{
5764 bool wake = false;
5765
5766 __e1000_shutdown(pdev, &wake, false);
5767
5768 if (system_state == SYSTEM_POWER_OFF)
5769 e1000_complete_shutdown(pdev, false, wake);
5770}
5771
5772#ifdef CONFIG_NET_POLL_CONTROLLER
5773
5774static irqreturn_t e1000_intr_msix(int irq, void *data)
5775{
5776 struct net_device *netdev = data;
5777 struct e1000_adapter *adapter = netdev_priv(netdev);
5778
5779 if (adapter->msix_entries) {
5780 int vector, msix_irq;
5781
5782 vector = 0;
5783 msix_irq = adapter->msix_entries[vector].vector;
5784 disable_irq(msix_irq);
5785 e1000_intr_msix_rx(msix_irq, netdev);
5786 enable_irq(msix_irq);
5787
5788 vector++;
5789 msix_irq = adapter->msix_entries[vector].vector;
5790 disable_irq(msix_irq);
5791 e1000_intr_msix_tx(msix_irq, netdev);
5792 enable_irq(msix_irq);
5793
5794 vector++;
5795 msix_irq = adapter->msix_entries[vector].vector;
5796 disable_irq(msix_irq);
5797 e1000_msix_other(msix_irq, netdev);
5798 enable_irq(msix_irq);
5799 }
5800
5801 return IRQ_HANDLED;
5802}
5803
5804/*
5805 * Polling 'interrupt' - used by things like netconsole to send skbs
5806 * without having to re-enable interrupts. It's not called while
5807 * the interrupt routine is executing.
5808 */
5809static void e1000_netpoll(struct net_device *netdev)
5810{
5811 struct e1000_adapter *adapter = netdev_priv(netdev);
5812
5813 switch (adapter->int_mode) {
5814 case E1000E_INT_MODE_MSIX:
5815 e1000_intr_msix(adapter->pdev->irq, netdev);
5816 break;
5817 case E1000E_INT_MODE_MSI:
5818 disable_irq(adapter->pdev->irq);
5819 e1000_intr_msi(adapter->pdev->irq, netdev);
5820 enable_irq(adapter->pdev->irq);
5821 break;
5822 default: /* E1000E_INT_MODE_LEGACY */
5823 disable_irq(adapter->pdev->irq);
5824 e1000_intr(adapter->pdev->irq, netdev);
5825 enable_irq(adapter->pdev->irq);
5826 break;
5827 }
5828}
5829#endif
5830
5831/**
5832 * e1000_io_error_detected - called when PCI error is detected
5833 * @pdev: Pointer to PCI device
5834 * @state: The current pci connection state
5835 *
5836 * This function is called after a PCI bus error affecting
5837 * this device has been detected.
5838 */
5839static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5840 pci_channel_state_t state)
5841{
5842 struct net_device *netdev = pci_get_drvdata(pdev);
5843 struct e1000_adapter *adapter = netdev_priv(netdev);
5844
5845 netif_device_detach(netdev);
5846
5847 if (state == pci_channel_io_perm_failure)
5848 return PCI_ERS_RESULT_DISCONNECT;
5849
5850 if (netif_running(netdev))
5851 e1000e_down(adapter);
5852 pci_disable_device(pdev);
5853
5854 /* Request a slot slot reset. */
5855 return PCI_ERS_RESULT_NEED_RESET;
5856}
5857
5858/**
5859 * e1000_io_slot_reset - called after the pci bus has been reset.
5860 * @pdev: Pointer to PCI device
5861 *
5862 * Restart the card from scratch, as if from a cold-boot. Implementation
5863 * resembles the first-half of the e1000_resume routine.
5864 */
5865static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5866{
5867 struct net_device *netdev = pci_get_drvdata(pdev);
5868 struct e1000_adapter *adapter = netdev_priv(netdev);
5869 struct e1000_hw *hw = &adapter->hw;
5870 u16 aspm_disable_flag = 0;
5871 int err;
5872 pci_ers_result_t result;
5873
5874 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
5875 aspm_disable_flag = PCIE_LINK_STATE_L0S;
5876 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5877 aspm_disable_flag |= PCIE_LINK_STATE_L1;
5878 if (aspm_disable_flag)
5879 e1000e_disable_aspm(pdev, aspm_disable_flag);
5880
5881 err = pci_enable_device_mem(pdev);
5882 if (err) {
5883 dev_err(&pdev->dev,
5884 "Cannot re-enable PCI device after reset.\n");
5885 result = PCI_ERS_RESULT_DISCONNECT;
5886 } else {
5887 pci_set_master(pdev);
5888 pdev->state_saved = true;
5889 pci_restore_state(pdev);
5890
5891 pci_enable_wake(pdev, PCI_D3hot, 0);
5892 pci_enable_wake(pdev, PCI_D3cold, 0);
5893
5894 e1000e_reset(adapter);
5895 ew32(WUS, ~0);
5896 result = PCI_ERS_RESULT_RECOVERED;
5897 }
5898
5899 pci_cleanup_aer_uncorrect_error_status(pdev);
5900
5901 return result;
5902}
5903
5904/**
5905 * e1000_io_resume - called when traffic can start flowing again.
5906 * @pdev: Pointer to PCI device
5907 *
5908 * This callback is called when the error recovery driver tells us that
5909 * its OK to resume normal operation. Implementation resembles the
5910 * second-half of the e1000_resume routine.
5911 */
5912static void e1000_io_resume(struct pci_dev *pdev)
5913{
5914 struct net_device *netdev = pci_get_drvdata(pdev);
5915 struct e1000_adapter *adapter = netdev_priv(netdev);
5916
5917 e1000_init_manageability_pt(adapter);
5918
5919 if (netif_running(netdev)) {
5920 if (e1000e_up(adapter)) {
5921 dev_err(&pdev->dev,
5922 "can't bring device back up after reset\n");
5923 return;
5924 }
5925 }
5926
5927 netif_device_attach(netdev);
5928
5929 /*
5930 * If the controller has AMT, do not set DRV_LOAD until the interface
5931 * is up. For all other cases, let the f/w know that the h/w is now
5932 * under the control of the driver.
5933 */
5934 if (!(adapter->flags & FLAG_HAS_AMT))
5935 e1000e_get_hw_control(adapter);
5936
5937}
5938
5939static void e1000_print_device_info(struct e1000_adapter *adapter)
5940{
5941 struct e1000_hw *hw = &adapter->hw;
5942 struct net_device *netdev = adapter->netdev;
5943 u32 ret_val;
5944 u8 pba_str[E1000_PBANUM_LENGTH];
5945
5946 /* print bus type/speed/width info */
5947 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
5948 /* bus width */
5949 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5950 "Width x1"),
5951 /* MAC address */
5952 netdev->dev_addr);
5953 e_info("Intel(R) PRO/%s Network Connection\n",
5954 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
5955 ret_val = e1000_read_pba_string_generic(hw, pba_str,
5956 E1000_PBANUM_LENGTH);
5957 if (ret_val)
5958 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
5959 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
5960 hw->mac.type, hw->phy.type, pba_str);
5961}
5962
5963static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5964{
5965 struct e1000_hw *hw = &adapter->hw;
5966 int ret_val;
5967 u16 buf = 0;
5968
5969 if (hw->mac.type != e1000_82573)
5970 return;
5971
5972 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
5973 le16_to_cpus(&buf);
5974 if (!ret_val && (!(buf & (1 << 0)))) {
5975 /* Deep Smart Power Down (DSPD) */
5976 dev_warn(&adapter->pdev->dev,
5977 "Warning: detected DSPD enabled in EEPROM\n");
5978 }
5979}
5980
5981static int e1000_set_features(struct net_device *netdev,
5982 netdev_features_t features)
5983{
5984 struct e1000_adapter *adapter = netdev_priv(netdev);
5985 netdev_features_t changed = features ^ netdev->features;
5986
5987 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
5988 adapter->flags |= FLAG_TSO_FORCE;
5989
5990 if (!(changed & (NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_TX |
5991 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
5992 NETIF_F_RXALL)))
5993 return 0;
5994
5995 if (changed & NETIF_F_RXFCS) {
5996 if (features & NETIF_F_RXFCS) {
5997 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
5998 } else {
5999 /* We need to take it back to defaults, which might mean
6000 * stripping is still disabled at the adapter level.
6001 */
6002 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6003 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6004 else
6005 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6006 }
6007 }
6008
6009 netdev->features = features;
6010
6011 if (netif_running(netdev))
6012 e1000e_reinit_locked(adapter);
6013 else
6014 e1000e_reset(adapter);
6015
6016 return 0;
6017}
6018
6019static const struct net_device_ops e1000e_netdev_ops = {
6020 .ndo_open = e1000_open,
6021 .ndo_stop = e1000_close,
6022 .ndo_start_xmit = e1000_xmit_frame,
6023 .ndo_get_stats64 = e1000e_get_stats64,
6024 .ndo_set_rx_mode = e1000e_set_rx_mode,
6025 .ndo_set_mac_address = e1000_set_mac,
6026 .ndo_change_mtu = e1000_change_mtu,
6027 .ndo_do_ioctl = e1000_ioctl,
6028 .ndo_tx_timeout = e1000_tx_timeout,
6029 .ndo_validate_addr = eth_validate_addr,
6030
6031 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
6032 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
6033#ifdef CONFIG_NET_POLL_CONTROLLER
6034 .ndo_poll_controller = e1000_netpoll,
6035#endif
6036 .ndo_set_features = e1000_set_features,
6037};
6038
6039/**
6040 * e1000_probe - Device Initialization Routine
6041 * @pdev: PCI device information struct
6042 * @ent: entry in e1000_pci_tbl
6043 *
6044 * Returns 0 on success, negative on failure
6045 *
6046 * e1000_probe initializes an adapter identified by a pci_dev structure.
6047 * The OS initialization, configuring of the adapter private structure,
6048 * and a hardware reset occur.
6049 **/
6050static int __devinit e1000_probe(struct pci_dev *pdev,
6051 const struct pci_device_id *ent)
6052{
6053 struct net_device *netdev;
6054 struct e1000_adapter *adapter;
6055 struct e1000_hw *hw;
6056 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
6057 resource_size_t mmio_start, mmio_len;
6058 resource_size_t flash_start, flash_len;
6059 static int cards_found;
6060 u16 aspm_disable_flag = 0;
6061 int i, err, pci_using_dac;
6062 u16 eeprom_data = 0;
6063 u16 eeprom_apme_mask = E1000_EEPROM_APME;
6064
6065 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
6066 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6067 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
6068 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6069 if (aspm_disable_flag)
6070 e1000e_disable_aspm(pdev, aspm_disable_flag);
6071
6072 err = pci_enable_device_mem(pdev);
6073 if (err)
6074 return err;
6075
6076 pci_using_dac = 0;
6077 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
6078 if (!err) {
6079 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
6080 if (!err)
6081 pci_using_dac = 1;
6082 } else {
6083 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
6084 if (err) {
6085 err = dma_set_coherent_mask(&pdev->dev,
6086 DMA_BIT_MASK(32));
6087 if (err) {
6088 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
6089 goto err_dma;
6090 }
6091 }
6092 }
6093
6094 err = pci_request_selected_regions_exclusive(pdev,
6095 pci_select_bars(pdev, IORESOURCE_MEM),
6096 e1000e_driver_name);
6097 if (err)
6098 goto err_pci_reg;
6099
6100 /* AER (Advanced Error Reporting) hooks */
6101 pci_enable_pcie_error_reporting(pdev);
6102
6103 pci_set_master(pdev);
6104 /* PCI config space info */
6105 err = pci_save_state(pdev);
6106 if (err)
6107 goto err_alloc_etherdev;
6108
6109 err = -ENOMEM;
6110 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6111 if (!netdev)
6112 goto err_alloc_etherdev;
6113
6114 SET_NETDEV_DEV(netdev, &pdev->dev);
6115
6116 netdev->irq = pdev->irq;
6117
6118 pci_set_drvdata(pdev, netdev);
6119 adapter = netdev_priv(netdev);
6120 hw = &adapter->hw;
6121 adapter->netdev = netdev;
6122 adapter->pdev = pdev;
6123 adapter->ei = ei;
6124 adapter->pba = ei->pba;
6125 adapter->flags = ei->flags;
6126 adapter->flags2 = ei->flags2;
6127 adapter->hw.adapter = adapter;
6128 adapter->hw.mac.type = ei->mac;
6129 adapter->max_hw_frame_size = ei->max_hw_frame_size;
6130 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
6131
6132 mmio_start = pci_resource_start(pdev, 0);
6133 mmio_len = pci_resource_len(pdev, 0);
6134
6135 err = -EIO;
6136 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6137 if (!adapter->hw.hw_addr)
6138 goto err_ioremap;
6139
6140 if ((adapter->flags & FLAG_HAS_FLASH) &&
6141 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
6142 flash_start = pci_resource_start(pdev, 1);
6143 flash_len = pci_resource_len(pdev, 1);
6144 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6145 if (!adapter->hw.flash_address)
6146 goto err_flashmap;
6147 }
6148
6149 /* construct the net_device struct */
6150 netdev->netdev_ops = &e1000e_netdev_ops;
6151 e1000e_set_ethtool_ops(netdev);
6152 netdev->watchdog_timeo = 5 * HZ;
6153 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
6154 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
6155
6156 netdev->mem_start = mmio_start;
6157 netdev->mem_end = mmio_start + mmio_len;
6158
6159 adapter->bd_number = cards_found++;
6160
6161 e1000e_check_options(adapter);
6162
6163 /* setup adapter struct */
6164 err = e1000_sw_init(adapter);
6165 if (err)
6166 goto err_sw_init;
6167
6168 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
6169 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
6170 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
6171
6172 err = ei->get_variants(adapter);
6173 if (err)
6174 goto err_hw_init;
6175
6176 if ((adapter->flags & FLAG_IS_ICH) &&
6177 (adapter->flags & FLAG_READ_ONLY_NVM))
6178 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
6179
6180 hw->mac.ops.get_bus_info(&adapter->hw);
6181
6182 adapter->hw.phy.autoneg_wait_to_complete = 0;
6183
6184 /* Copper options */
6185 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
6186 adapter->hw.phy.mdix = AUTO_ALL_MODES;
6187 adapter->hw.phy.disable_polarity_correction = 0;
6188 adapter->hw.phy.ms_type = e1000_ms_hw_default;
6189 }
6190
6191 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
6192 e_info("PHY reset is blocked due to SOL/IDER session.\n");
6193
6194 /* Set initial default active device features */
6195 netdev->features = (NETIF_F_SG |
6196 NETIF_F_HW_VLAN_RX |
6197 NETIF_F_HW_VLAN_TX |
6198 NETIF_F_TSO |
6199 NETIF_F_TSO6 |
6200 NETIF_F_RXHASH |
6201 NETIF_F_RXCSUM |
6202 NETIF_F_HW_CSUM);
6203
6204 /* Set user-changeable features (subset of all device features) */
6205 netdev->hw_features = netdev->features;
6206 netdev->hw_features |= NETIF_F_RXFCS;
6207 netdev->priv_flags |= IFF_SUPP_NOFCS;
6208 netdev->hw_features |= NETIF_F_RXALL;
6209
6210 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
6211 netdev->features |= NETIF_F_HW_VLAN_FILTER;
6212
6213 netdev->vlan_features |= (NETIF_F_SG |
6214 NETIF_F_TSO |
6215 NETIF_F_TSO6 |
6216 NETIF_F_HW_CSUM);
6217
6218 netdev->priv_flags |= IFF_UNICAST_FLT;
6219
6220 if (pci_using_dac) {
6221 netdev->features |= NETIF_F_HIGHDMA;
6222 netdev->vlan_features |= NETIF_F_HIGHDMA;
6223 }
6224
6225 if (e1000e_enable_mng_pass_thru(&adapter->hw))
6226 adapter->flags |= FLAG_MNG_PT_ENABLED;
6227
6228 /*
6229 * before reading the NVM, reset the controller to
6230 * put the device in a known good starting state
6231 */
6232 adapter->hw.mac.ops.reset_hw(&adapter->hw);
6233
6234 /*
6235 * systems with ASPM and others may see the checksum fail on the first
6236 * attempt. Let's give it a few tries
6237 */
6238 for (i = 0;; i++) {
6239 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
6240 break;
6241 if (i == 2) {
6242 e_err("The NVM Checksum Is Not Valid\n");
6243 err = -EIO;
6244 goto err_eeprom;
6245 }
6246 }
6247
6248 e1000_eeprom_checks(adapter);
6249
6250 /* copy the MAC address */
6251 if (e1000e_read_mac_addr(&adapter->hw))
6252 e_err("NVM Read Error while reading MAC address\n");
6253
6254 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
6255 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
6256
6257 if (!is_valid_ether_addr(netdev->perm_addr)) {
6258 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
6259 err = -EIO;
6260 goto err_eeprom;
6261 }
6262
6263 init_timer(&adapter->watchdog_timer);
6264 adapter->watchdog_timer.function = e1000_watchdog;
6265 adapter->watchdog_timer.data = (unsigned long) adapter;
6266
6267 init_timer(&adapter->phy_info_timer);
6268 adapter->phy_info_timer.function = e1000_update_phy_info;
6269 adapter->phy_info_timer.data = (unsigned long) adapter;
6270
6271 INIT_WORK(&adapter->reset_task, e1000_reset_task);
6272 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
6273 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
6274 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
6275 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
6276
6277 /* Initialize link parameters. User can change them with ethtool */
6278 adapter->hw.mac.autoneg = 1;
6279 adapter->fc_autoneg = true;
6280 adapter->hw.fc.requested_mode = e1000_fc_default;
6281 adapter->hw.fc.current_mode = e1000_fc_default;
6282 adapter->hw.phy.autoneg_advertised = 0x2f;
6283
6284 /* ring size defaults */
6285 adapter->rx_ring->count = E1000_DEFAULT_RXD;
6286 adapter->tx_ring->count = E1000_DEFAULT_TXD;
6287
6288 /*
6289 * Initial Wake on LAN setting - If APM wake is enabled in
6290 * the EEPROM, enable the ACPI Magic Packet filter
6291 */
6292 if (adapter->flags & FLAG_APME_IN_WUC) {
6293 /* APME bit in EEPROM is mapped to WUC.APME */
6294 eeprom_data = er32(WUC);
6295 eeprom_apme_mask = E1000_WUC_APME;
6296 if ((hw->mac.type > e1000_ich10lan) &&
6297 (eeprom_data & E1000_WUC_PHY_WAKE))
6298 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
6299 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
6300 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
6301 (adapter->hw.bus.func == 1))
6302 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_B,
6303 1, &eeprom_data);
6304 else
6305 e1000_read_nvm(&adapter->hw, NVM_INIT_CONTROL3_PORT_A,
6306 1, &eeprom_data);
6307 }
6308
6309 /* fetch WoL from EEPROM */
6310 if (eeprom_data & eeprom_apme_mask)
6311 adapter->eeprom_wol |= E1000_WUFC_MAG;
6312
6313 /*
6314 * now that we have the eeprom settings, apply the special cases
6315 * where the eeprom may be wrong or the board simply won't support
6316 * wake on lan on a particular port
6317 */
6318 if (!(adapter->flags & FLAG_HAS_WOL))
6319 adapter->eeprom_wol = 0;
6320
6321 /* initialize the wol settings based on the eeprom settings */
6322 adapter->wol = adapter->eeprom_wol;
6323 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
6324
6325 /* save off EEPROM version number */
6326 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
6327
6328 /* reset the hardware with the new settings */
6329 e1000e_reset(adapter);
6330
6331 /*
6332 * If the controller has AMT, do not set DRV_LOAD until the interface
6333 * is up. For all other cases, let the f/w know that the h/w is now
6334 * under the control of the driver.
6335 */
6336 if (!(adapter->flags & FLAG_HAS_AMT))
6337 e1000e_get_hw_control(adapter);
6338
6339 strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
6340 err = register_netdev(netdev);
6341 if (err)
6342 goto err_register;
6343
6344 /* carrier off reporting is important to ethtool even BEFORE open */
6345 netif_carrier_off(netdev);
6346
6347 e1000_print_device_info(adapter);
6348
6349 if (pci_dev_run_wake(pdev))
6350 pm_runtime_put_noidle(&pdev->dev);
6351
6352 return 0;
6353
6354err_register:
6355 if (!(adapter->flags & FLAG_HAS_AMT))
6356 e1000e_release_hw_control(adapter);
6357err_eeprom:
6358 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
6359 e1000_phy_hw_reset(&adapter->hw);
6360err_hw_init:
6361 kfree(adapter->tx_ring);
6362 kfree(adapter->rx_ring);
6363err_sw_init:
6364 if (adapter->hw.flash_address)
6365 iounmap(adapter->hw.flash_address);
6366 e1000e_reset_interrupt_capability(adapter);
6367err_flashmap:
6368 iounmap(adapter->hw.hw_addr);
6369err_ioremap:
6370 free_netdev(netdev);
6371err_alloc_etherdev:
6372 pci_release_selected_regions(pdev,
6373 pci_select_bars(pdev, IORESOURCE_MEM));
6374err_pci_reg:
6375err_dma:
6376 pci_disable_device(pdev);
6377 return err;
6378}
6379
6380/**
6381 * e1000_remove - Device Removal Routine
6382 * @pdev: PCI device information struct
6383 *
6384 * e1000_remove is called by the PCI subsystem to alert the driver
6385 * that it should release a PCI device. The could be caused by a
6386 * Hot-Plug event, or because the driver is going to be removed from
6387 * memory.
6388 **/
6389static void __devexit e1000_remove(struct pci_dev *pdev)
6390{
6391 struct net_device *netdev = pci_get_drvdata(pdev);
6392 struct e1000_adapter *adapter = netdev_priv(netdev);
6393 bool down = test_bit(__E1000_DOWN, &adapter->state);
6394
6395 /*
6396 * The timers may be rescheduled, so explicitly disable them
6397 * from being rescheduled.
6398 */
6399 if (!down)
6400 set_bit(__E1000_DOWN, &adapter->state);
6401 del_timer_sync(&adapter->watchdog_timer);
6402 del_timer_sync(&adapter->phy_info_timer);
6403
6404 cancel_work_sync(&adapter->reset_task);
6405 cancel_work_sync(&adapter->watchdog_task);
6406 cancel_work_sync(&adapter->downshift_task);
6407 cancel_work_sync(&adapter->update_phy_task);
6408 cancel_work_sync(&adapter->print_hang_task);
6409
6410 if (!(netdev->flags & IFF_UP))
6411 e1000_power_down_phy(adapter);
6412
6413 /* Don't lie to e1000_close() down the road. */
6414 if (!down)
6415 clear_bit(__E1000_DOWN, &adapter->state);
6416 unregister_netdev(netdev);
6417
6418 if (pci_dev_run_wake(pdev))
6419 pm_runtime_get_noresume(&pdev->dev);
6420
6421 /*
6422 * Release control of h/w to f/w. If f/w is AMT enabled, this
6423 * would have already happened in close and is redundant.
6424 */
6425 e1000e_release_hw_control(adapter);
6426
6427 e1000e_reset_interrupt_capability(adapter);
6428 kfree(adapter->tx_ring);
6429 kfree(adapter->rx_ring);
6430
6431 iounmap(adapter->hw.hw_addr);
6432 if (adapter->hw.flash_address)
6433 iounmap(adapter->hw.flash_address);
6434 pci_release_selected_regions(pdev,
6435 pci_select_bars(pdev, IORESOURCE_MEM));
6436
6437 free_netdev(netdev);
6438
6439 /* AER disable */
6440 pci_disable_pcie_error_reporting(pdev);
6441
6442 pci_disable_device(pdev);
6443}
6444
6445/* PCI Error Recovery (ERS) */
6446static struct pci_error_handlers e1000_err_handler = {
6447 .error_detected = e1000_io_error_detected,
6448 .slot_reset = e1000_io_slot_reset,
6449 .resume = e1000_io_resume,
6450};
6451
6452static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
6453 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
6454 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
6455 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
6456 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
6457 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
6458 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
6459 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
6460 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
6461 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
6462
6463 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
6464 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
6465 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
6466 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
6467
6468 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
6469 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
6470 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
6471
6472 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
6473 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
6474 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
6475
6476 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
6477 board_80003es2lan },
6478 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
6479 board_80003es2lan },
6480 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
6481 board_80003es2lan },
6482 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
6483 board_80003es2lan },
6484
6485 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
6486 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
6487 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
6488 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
6489 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
6490 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
6491 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
6492 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
6493
6494 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
6495 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
6496 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
6497 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
6498 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
6499 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
6500 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
6501 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
6502 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
6503
6504 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
6505 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
6506 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
6507
6508 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
6509 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
6510 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
6511
6512 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
6513 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
6514 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
6515 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
6516
6517 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
6518 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
6519
6520 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
6521 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
6522
6523 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
6524};
6525MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
6526
6527#ifdef CONFIG_PM
6528static const struct dev_pm_ops e1000_pm_ops = {
6529 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
6530 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
6531 e1000_runtime_resume, e1000_idle)
6532};
6533#endif
6534
6535/* PCI Device API Driver */
6536static struct pci_driver e1000_driver = {
6537 .name = e1000e_driver_name,
6538 .id_table = e1000_pci_tbl,
6539 .probe = e1000_probe,
6540 .remove = __devexit_p(e1000_remove),
6541#ifdef CONFIG_PM
6542 .driver = {
6543 .pm = &e1000_pm_ops,
6544 },
6545#endif
6546 .shutdown = e1000_shutdown,
6547 .err_handler = &e1000_err_handler
6548};
6549
6550/**
6551 * e1000_init_module - Driver Registration Routine
6552 *
6553 * e1000_init_module is the first routine called when the driver is
6554 * loaded. All it does is register with the PCI subsystem.
6555 **/
6556static int __init e1000_init_module(void)
6557{
6558 int ret;
6559 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
6560 e1000e_driver_version);
6561 pr_info("Copyright(c) 1999 - 2012 Intel Corporation.\n");
6562 ret = pci_register_driver(&e1000_driver);
6563
6564 return ret;
6565}
6566module_init(e1000_init_module);
6567
6568/**
6569 * e1000_exit_module - Driver Exit Cleanup Routine
6570 *
6571 * e1000_exit_module is called just before the driver is removed
6572 * from memory.
6573 **/
6574static void __exit e1000_exit_module(void)
6575{
6576 pci_unregister_driver(&e1000_driver);
6577}
6578module_exit(e1000_exit_module);
6579
6580
6581MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
6582MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
6583MODULE_LICENSE("GPL");
6584MODULE_VERSION(DRV_VERSION);
6585
6586/* netdev.c */
1/* Intel PRO/1000 Linux driver
2 * Copyright(c) 1999 - 2015 Intel Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * Linux NICS <linux.nics@intel.com>
18 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
19 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
20 */
21
22#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/init.h>
27#include <linux/pci.h>
28#include <linux/vmalloc.h>
29#include <linux/pagemap.h>
30#include <linux/delay.h>
31#include <linux/netdevice.h>
32#include <linux/interrupt.h>
33#include <linux/tcp.h>
34#include <linux/ipv6.h>
35#include <linux/slab.h>
36#include <net/checksum.h>
37#include <net/ip6_checksum.h>
38#include <linux/ethtool.h>
39#include <linux/if_vlan.h>
40#include <linux/cpu.h>
41#include <linux/smp.h>
42#include <linux/pm_qos.h>
43#include <linux/pm_runtime.h>
44#include <linux/aer.h>
45#include <linux/prefetch.h>
46
47#include "e1000.h"
48
49#define DRV_EXTRAVERSION "-k"
50
51#define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
52char e1000e_driver_name[] = "e1000e";
53const char e1000e_driver_version[] = DRV_VERSION;
54
55#define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
56static int debug = -1;
57module_param(debug, int, 0);
58MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
59
60static const struct e1000_info *e1000_info_tbl[] = {
61 [board_82571] = &e1000_82571_info,
62 [board_82572] = &e1000_82572_info,
63 [board_82573] = &e1000_82573_info,
64 [board_82574] = &e1000_82574_info,
65 [board_82583] = &e1000_82583_info,
66 [board_80003es2lan] = &e1000_es2_info,
67 [board_ich8lan] = &e1000_ich8_info,
68 [board_ich9lan] = &e1000_ich9_info,
69 [board_ich10lan] = &e1000_ich10_info,
70 [board_pchlan] = &e1000_pch_info,
71 [board_pch2lan] = &e1000_pch2_info,
72 [board_pch_lpt] = &e1000_pch_lpt_info,
73 [board_pch_spt] = &e1000_pch_spt_info,
74};
75
76struct e1000_reg_info {
77 u32 ofs;
78 char *name;
79};
80
81static const struct e1000_reg_info e1000_reg_info_tbl[] = {
82 /* General Registers */
83 {E1000_CTRL, "CTRL"},
84 {E1000_STATUS, "STATUS"},
85 {E1000_CTRL_EXT, "CTRL_EXT"},
86
87 /* Interrupt Registers */
88 {E1000_ICR, "ICR"},
89
90 /* Rx Registers */
91 {E1000_RCTL, "RCTL"},
92 {E1000_RDLEN(0), "RDLEN"},
93 {E1000_RDH(0), "RDH"},
94 {E1000_RDT(0), "RDT"},
95 {E1000_RDTR, "RDTR"},
96 {E1000_RXDCTL(0), "RXDCTL"},
97 {E1000_ERT, "ERT"},
98 {E1000_RDBAL(0), "RDBAL"},
99 {E1000_RDBAH(0), "RDBAH"},
100 {E1000_RDFH, "RDFH"},
101 {E1000_RDFT, "RDFT"},
102 {E1000_RDFHS, "RDFHS"},
103 {E1000_RDFTS, "RDFTS"},
104 {E1000_RDFPC, "RDFPC"},
105
106 /* Tx Registers */
107 {E1000_TCTL, "TCTL"},
108 {E1000_TDBAL(0), "TDBAL"},
109 {E1000_TDBAH(0), "TDBAH"},
110 {E1000_TDLEN(0), "TDLEN"},
111 {E1000_TDH(0), "TDH"},
112 {E1000_TDT(0), "TDT"},
113 {E1000_TIDV, "TIDV"},
114 {E1000_TXDCTL(0), "TXDCTL"},
115 {E1000_TADV, "TADV"},
116 {E1000_TARC(0), "TARC"},
117 {E1000_TDFH, "TDFH"},
118 {E1000_TDFT, "TDFT"},
119 {E1000_TDFHS, "TDFHS"},
120 {E1000_TDFTS, "TDFTS"},
121 {E1000_TDFPC, "TDFPC"},
122
123 /* List Terminator */
124 {0, NULL}
125};
126
127/**
128 * __ew32_prepare - prepare to write to MAC CSR register on certain parts
129 * @hw: pointer to the HW structure
130 *
131 * When updating the MAC CSR registers, the Manageability Engine (ME) could
132 * be accessing the registers at the same time. Normally, this is handled in
133 * h/w by an arbiter but on some parts there is a bug that acknowledges Host
134 * accesses later than it should which could result in the register to have
135 * an incorrect value. Workaround this by checking the FWSM register which
136 * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
137 * and try again a number of times.
138 **/
139s32 __ew32_prepare(struct e1000_hw *hw)
140{
141 s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
142
143 while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
144 udelay(50);
145
146 return i;
147}
148
149void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
150{
151 if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
152 __ew32_prepare(hw);
153
154 writel(val, hw->hw_addr + reg);
155}
156
157/**
158 * e1000_regdump - register printout routine
159 * @hw: pointer to the HW structure
160 * @reginfo: pointer to the register info table
161 **/
162static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
163{
164 int n = 0;
165 char rname[16];
166 u32 regs[8];
167
168 switch (reginfo->ofs) {
169 case E1000_RXDCTL(0):
170 for (n = 0; n < 2; n++)
171 regs[n] = __er32(hw, E1000_RXDCTL(n));
172 break;
173 case E1000_TXDCTL(0):
174 for (n = 0; n < 2; n++)
175 regs[n] = __er32(hw, E1000_TXDCTL(n));
176 break;
177 case E1000_TARC(0):
178 for (n = 0; n < 2; n++)
179 regs[n] = __er32(hw, E1000_TARC(n));
180 break;
181 default:
182 pr_info("%-15s %08x\n",
183 reginfo->name, __er32(hw, reginfo->ofs));
184 return;
185 }
186
187 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
188 pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
189}
190
191static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
192 struct e1000_buffer *bi)
193{
194 int i;
195 struct e1000_ps_page *ps_page;
196
197 for (i = 0; i < adapter->rx_ps_pages; i++) {
198 ps_page = &bi->ps_pages[i];
199
200 if (ps_page->page) {
201 pr_info("packet dump for ps_page %d:\n", i);
202 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
203 16, 1, page_address(ps_page->page),
204 PAGE_SIZE, true);
205 }
206 }
207}
208
209/**
210 * e1000e_dump - Print registers, Tx-ring and Rx-ring
211 * @adapter: board private structure
212 **/
213static void e1000e_dump(struct e1000_adapter *adapter)
214{
215 struct net_device *netdev = adapter->netdev;
216 struct e1000_hw *hw = &adapter->hw;
217 struct e1000_reg_info *reginfo;
218 struct e1000_ring *tx_ring = adapter->tx_ring;
219 struct e1000_tx_desc *tx_desc;
220 struct my_u0 {
221 __le64 a;
222 __le64 b;
223 } *u0;
224 struct e1000_buffer *buffer_info;
225 struct e1000_ring *rx_ring = adapter->rx_ring;
226 union e1000_rx_desc_packet_split *rx_desc_ps;
227 union e1000_rx_desc_extended *rx_desc;
228 struct my_u1 {
229 __le64 a;
230 __le64 b;
231 __le64 c;
232 __le64 d;
233 } *u1;
234 u32 staterr;
235 int i = 0;
236
237 if (!netif_msg_hw(adapter))
238 return;
239
240 /* Print netdevice Info */
241 if (netdev) {
242 dev_info(&adapter->pdev->dev, "Net device Info\n");
243 pr_info("Device Name state trans_start last_rx\n");
244 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
245 netdev->state, netdev->trans_start, netdev->last_rx);
246 }
247
248 /* Print Registers */
249 dev_info(&adapter->pdev->dev, "Register Dump\n");
250 pr_info(" Register Name Value\n");
251 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
252 reginfo->name; reginfo++) {
253 e1000_regdump(hw, reginfo);
254 }
255
256 /* Print Tx Ring Summary */
257 if (!netdev || !netif_running(netdev))
258 return;
259
260 dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
261 pr_info("Queue [NTU] [NTC] [bi(ntc)->dma ] leng ntw timestamp\n");
262 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
263 pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
264 0, tx_ring->next_to_use, tx_ring->next_to_clean,
265 (unsigned long long)buffer_info->dma,
266 buffer_info->length,
267 buffer_info->next_to_watch,
268 (unsigned long long)buffer_info->time_stamp);
269
270 /* Print Tx Ring */
271 if (!netif_msg_tx_done(adapter))
272 goto rx_ring_summary;
273
274 dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
275
276 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
277 *
278 * Legacy Transmit Descriptor
279 * +--------------------------------------------------------------+
280 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
281 * +--------------------------------------------------------------+
282 * 8 | Special | CSS | Status | CMD | CSO | Length |
283 * +--------------------------------------------------------------+
284 * 63 48 47 36 35 32 31 24 23 16 15 0
285 *
286 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
287 * 63 48 47 40 39 32 31 16 15 8 7 0
288 * +----------------------------------------------------------------+
289 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
290 * +----------------------------------------------------------------+
291 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
292 * +----------------------------------------------------------------+
293 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
294 *
295 * Extended Data Descriptor (DTYP=0x1)
296 * +----------------------------------------------------------------+
297 * 0 | Buffer Address [63:0] |
298 * +----------------------------------------------------------------+
299 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
300 * +----------------------------------------------------------------+
301 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
302 */
303 pr_info("Tl[desc] [address 63:0 ] [SpeCssSCmCsLen] [bi->dma ] leng ntw timestamp bi->skb <-- Legacy format\n");
304 pr_info("Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Context format\n");
305 pr_info("Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen] [bi->dma ] leng ntw timestamp bi->skb <-- Ext Data format\n");
306 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
307 const char *next_desc;
308 tx_desc = E1000_TX_DESC(*tx_ring, i);
309 buffer_info = &tx_ring->buffer_info[i];
310 u0 = (struct my_u0 *)tx_desc;
311 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
312 next_desc = " NTC/U";
313 else if (i == tx_ring->next_to_use)
314 next_desc = " NTU";
315 else if (i == tx_ring->next_to_clean)
316 next_desc = " NTC";
317 else
318 next_desc = "";
319 pr_info("T%c[0x%03X] %016llX %016llX %016llX %04X %3X %016llX %p%s\n",
320 (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
321 ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
322 i,
323 (unsigned long long)le64_to_cpu(u0->a),
324 (unsigned long long)le64_to_cpu(u0->b),
325 (unsigned long long)buffer_info->dma,
326 buffer_info->length, buffer_info->next_to_watch,
327 (unsigned long long)buffer_info->time_stamp,
328 buffer_info->skb, next_desc);
329
330 if (netif_msg_pktdata(adapter) && buffer_info->skb)
331 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
332 16, 1, buffer_info->skb->data,
333 buffer_info->skb->len, true);
334 }
335
336 /* Print Rx Ring Summary */
337rx_ring_summary:
338 dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
339 pr_info("Queue [NTU] [NTC]\n");
340 pr_info(" %5d %5X %5X\n",
341 0, rx_ring->next_to_use, rx_ring->next_to_clean);
342
343 /* Print Rx Ring */
344 if (!netif_msg_rx_status(adapter))
345 return;
346
347 dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
348 switch (adapter->rx_ps_pages) {
349 case 1:
350 case 2:
351 case 3:
352 /* [Extended] Packet Split Receive Descriptor Format
353 *
354 * +-----------------------------------------------------+
355 * 0 | Buffer Address 0 [63:0] |
356 * +-----------------------------------------------------+
357 * 8 | Buffer Address 1 [63:0] |
358 * +-----------------------------------------------------+
359 * 16 | Buffer Address 2 [63:0] |
360 * +-----------------------------------------------------+
361 * 24 | Buffer Address 3 [63:0] |
362 * +-----------------------------------------------------+
363 */
364 pr_info("R [desc] [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] [bi->skb] <-- Ext Pkt Split format\n");
365 /* [Extended] Receive Descriptor (Write-Back) Format
366 *
367 * 63 48 47 32 31 13 12 8 7 4 3 0
368 * +------------------------------------------------------+
369 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
370 * | Checksum | Ident | | Queue | | Type |
371 * +------------------------------------------------------+
372 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
373 * +------------------------------------------------------+
374 * 63 48 47 32 31 20 19 0
375 */
376 pr_info("RWB[desc] [ck ipid mrqhsh] [vl l0 ee es] [ l3 l2 l1 hs] [reserved ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
377 for (i = 0; i < rx_ring->count; i++) {
378 const char *next_desc;
379 buffer_info = &rx_ring->buffer_info[i];
380 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
381 u1 = (struct my_u1 *)rx_desc_ps;
382 staterr =
383 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
384
385 if (i == rx_ring->next_to_use)
386 next_desc = " NTU";
387 else if (i == rx_ring->next_to_clean)
388 next_desc = " NTC";
389 else
390 next_desc = "";
391
392 if (staterr & E1000_RXD_STAT_DD) {
393 /* Descriptor Done */
394 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX ---------------- %p%s\n",
395 "RWB", i,
396 (unsigned long long)le64_to_cpu(u1->a),
397 (unsigned long long)le64_to_cpu(u1->b),
398 (unsigned long long)le64_to_cpu(u1->c),
399 (unsigned long long)le64_to_cpu(u1->d),
400 buffer_info->skb, next_desc);
401 } else {
402 pr_info("%s[0x%03X] %016llX %016llX %016llX %016llX %016llX %p%s\n",
403 "R ", i,
404 (unsigned long long)le64_to_cpu(u1->a),
405 (unsigned long long)le64_to_cpu(u1->b),
406 (unsigned long long)le64_to_cpu(u1->c),
407 (unsigned long long)le64_to_cpu(u1->d),
408 (unsigned long long)buffer_info->dma,
409 buffer_info->skb, next_desc);
410
411 if (netif_msg_pktdata(adapter))
412 e1000e_dump_ps_pages(adapter,
413 buffer_info);
414 }
415 }
416 break;
417 default:
418 case 0:
419 /* Extended Receive Descriptor (Read) Format
420 *
421 * +-----------------------------------------------------+
422 * 0 | Buffer Address [63:0] |
423 * +-----------------------------------------------------+
424 * 8 | Reserved |
425 * +-----------------------------------------------------+
426 */
427 pr_info("R [desc] [buf addr 63:0 ] [reserved 63:0 ] [bi->dma ] [bi->skb] <-- Ext (Read) format\n");
428 /* Extended Receive Descriptor (Write-Back) Format
429 *
430 * 63 48 47 32 31 24 23 4 3 0
431 * +------------------------------------------------------+
432 * | RSS Hash | | | |
433 * 0 +-------------------+ Rsvd | Reserved | MRQ RSS |
434 * | Packet | IP | | | Type |
435 * | Checksum | Ident | | | |
436 * +------------------------------------------------------+
437 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
438 * +------------------------------------------------------+
439 * 63 48 47 32 31 20 19 0
440 */
441 pr_info("RWB[desc] [cs ipid mrq] [vt ln xe xs] [bi->skb] <-- Ext (Write-Back) format\n");
442
443 for (i = 0; i < rx_ring->count; i++) {
444 const char *next_desc;
445
446 buffer_info = &rx_ring->buffer_info[i];
447 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
448 u1 = (struct my_u1 *)rx_desc;
449 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
450
451 if (i == rx_ring->next_to_use)
452 next_desc = " NTU";
453 else if (i == rx_ring->next_to_clean)
454 next_desc = " NTC";
455 else
456 next_desc = "";
457
458 if (staterr & E1000_RXD_STAT_DD) {
459 /* Descriptor Done */
460 pr_info("%s[0x%03X] %016llX %016llX ---------------- %p%s\n",
461 "RWB", i,
462 (unsigned long long)le64_to_cpu(u1->a),
463 (unsigned long long)le64_to_cpu(u1->b),
464 buffer_info->skb, next_desc);
465 } else {
466 pr_info("%s[0x%03X] %016llX %016llX %016llX %p%s\n",
467 "R ", i,
468 (unsigned long long)le64_to_cpu(u1->a),
469 (unsigned long long)le64_to_cpu(u1->b),
470 (unsigned long long)buffer_info->dma,
471 buffer_info->skb, next_desc);
472
473 if (netif_msg_pktdata(adapter) &&
474 buffer_info->skb)
475 print_hex_dump(KERN_INFO, "",
476 DUMP_PREFIX_ADDRESS, 16,
477 1,
478 buffer_info->skb->data,
479 adapter->rx_buffer_len,
480 true);
481 }
482 }
483 }
484}
485
486/**
487 * e1000_desc_unused - calculate if we have unused descriptors
488 **/
489static int e1000_desc_unused(struct e1000_ring *ring)
490{
491 if (ring->next_to_clean > ring->next_to_use)
492 return ring->next_to_clean - ring->next_to_use - 1;
493
494 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
495}
496
497/**
498 * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
499 * @adapter: board private structure
500 * @hwtstamps: time stamp structure to update
501 * @systim: unsigned 64bit system time value.
502 *
503 * Convert the system time value stored in the RX/TXSTMP registers into a
504 * hwtstamp which can be used by the upper level time stamping functions.
505 *
506 * The 'systim_lock' spinlock is used to protect the consistency of the
507 * system time value. This is needed because reading the 64 bit time
508 * value involves reading two 32 bit registers. The first read latches the
509 * value.
510 **/
511static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
512 struct skb_shared_hwtstamps *hwtstamps,
513 u64 systim)
514{
515 u64 ns;
516 unsigned long flags;
517
518 spin_lock_irqsave(&adapter->systim_lock, flags);
519 ns = timecounter_cyc2time(&adapter->tc, systim);
520 spin_unlock_irqrestore(&adapter->systim_lock, flags);
521
522 memset(hwtstamps, 0, sizeof(*hwtstamps));
523 hwtstamps->hwtstamp = ns_to_ktime(ns);
524}
525
526/**
527 * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
528 * @adapter: board private structure
529 * @status: descriptor extended error and status field
530 * @skb: particular skb to include time stamp
531 *
532 * If the time stamp is valid, convert it into the timecounter ns value
533 * and store that result into the shhwtstamps structure which is passed
534 * up the network stack.
535 **/
536static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
537 struct sk_buff *skb)
538{
539 struct e1000_hw *hw = &adapter->hw;
540 u64 rxstmp;
541
542 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
543 !(status & E1000_RXDEXT_STATERR_TST) ||
544 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
545 return;
546
547 /* The Rx time stamp registers contain the time stamp. No other
548 * received packet will be time stamped until the Rx time stamp
549 * registers are read. Because only one packet can be time stamped
550 * at a time, the register values must belong to this packet and
551 * therefore none of the other additional attributes need to be
552 * compared.
553 */
554 rxstmp = (u64)er32(RXSTMPL);
555 rxstmp |= (u64)er32(RXSTMPH) << 32;
556 e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
557
558 adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
559}
560
561/**
562 * e1000_receive_skb - helper function to handle Rx indications
563 * @adapter: board private structure
564 * @staterr: descriptor extended error and status field as written by hardware
565 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
566 * @skb: pointer to sk_buff to be indicated to stack
567 **/
568static void e1000_receive_skb(struct e1000_adapter *adapter,
569 struct net_device *netdev, struct sk_buff *skb,
570 u32 staterr, __le16 vlan)
571{
572 u16 tag = le16_to_cpu(vlan);
573
574 e1000e_rx_hwtstamp(adapter, staterr, skb);
575
576 skb->protocol = eth_type_trans(skb, netdev);
577
578 if (staterr & E1000_RXD_STAT_VP)
579 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
580
581 napi_gro_receive(&adapter->napi, skb);
582}
583
584/**
585 * e1000_rx_checksum - Receive Checksum Offload
586 * @adapter: board private structure
587 * @status_err: receive descriptor status and error fields
588 * @csum: receive descriptor csum field
589 * @sk_buff: socket buffer with received data
590 **/
591static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
592 struct sk_buff *skb)
593{
594 u16 status = (u16)status_err;
595 u8 errors = (u8)(status_err >> 24);
596
597 skb_checksum_none_assert(skb);
598
599 /* Rx checksum disabled */
600 if (!(adapter->netdev->features & NETIF_F_RXCSUM))
601 return;
602
603 /* Ignore Checksum bit is set */
604 if (status & E1000_RXD_STAT_IXSM)
605 return;
606
607 /* TCP/UDP checksum error bit or IP checksum error bit is set */
608 if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
609 /* let the stack verify checksum errors */
610 adapter->hw_csum_err++;
611 return;
612 }
613
614 /* TCP/UDP Checksum has not been calculated */
615 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
616 return;
617
618 /* It must be a TCP or UDP packet with a valid checksum */
619 skb->ip_summed = CHECKSUM_UNNECESSARY;
620 adapter->hw_csum_good++;
621}
622
623static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
624{
625 struct e1000_adapter *adapter = rx_ring->adapter;
626 struct e1000_hw *hw = &adapter->hw;
627 s32 ret_val = __ew32_prepare(hw);
628
629 writel(i, rx_ring->tail);
630
631 if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
632 u32 rctl = er32(RCTL);
633
634 ew32(RCTL, rctl & ~E1000_RCTL_EN);
635 e_err("ME firmware caused invalid RDT - resetting\n");
636 schedule_work(&adapter->reset_task);
637 }
638}
639
640static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
641{
642 struct e1000_adapter *adapter = tx_ring->adapter;
643 struct e1000_hw *hw = &adapter->hw;
644 s32 ret_val = __ew32_prepare(hw);
645
646 writel(i, tx_ring->tail);
647
648 if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
649 u32 tctl = er32(TCTL);
650
651 ew32(TCTL, tctl & ~E1000_TCTL_EN);
652 e_err("ME firmware caused invalid TDT - resetting\n");
653 schedule_work(&adapter->reset_task);
654 }
655}
656
657/**
658 * e1000_alloc_rx_buffers - Replace used receive buffers
659 * @rx_ring: Rx descriptor ring
660 **/
661static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
662 int cleaned_count, gfp_t gfp)
663{
664 struct e1000_adapter *adapter = rx_ring->adapter;
665 struct net_device *netdev = adapter->netdev;
666 struct pci_dev *pdev = adapter->pdev;
667 union e1000_rx_desc_extended *rx_desc;
668 struct e1000_buffer *buffer_info;
669 struct sk_buff *skb;
670 unsigned int i;
671 unsigned int bufsz = adapter->rx_buffer_len;
672
673 i = rx_ring->next_to_use;
674 buffer_info = &rx_ring->buffer_info[i];
675
676 while (cleaned_count--) {
677 skb = buffer_info->skb;
678 if (skb) {
679 skb_trim(skb, 0);
680 goto map_skb;
681 }
682
683 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
684 if (!skb) {
685 /* Better luck next round */
686 adapter->alloc_rx_buff_failed++;
687 break;
688 }
689
690 buffer_info->skb = skb;
691map_skb:
692 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
693 adapter->rx_buffer_len,
694 DMA_FROM_DEVICE);
695 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
696 dev_err(&pdev->dev, "Rx DMA map failed\n");
697 adapter->rx_dma_failed++;
698 break;
699 }
700
701 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
702 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
703
704 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
705 /* Force memory writes to complete before letting h/w
706 * know there are new descriptors to fetch. (Only
707 * applicable for weak-ordered memory model archs,
708 * such as IA-64).
709 */
710 wmb();
711 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
712 e1000e_update_rdt_wa(rx_ring, i);
713 else
714 writel(i, rx_ring->tail);
715 }
716 i++;
717 if (i == rx_ring->count)
718 i = 0;
719 buffer_info = &rx_ring->buffer_info[i];
720 }
721
722 rx_ring->next_to_use = i;
723}
724
725/**
726 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
727 * @rx_ring: Rx descriptor ring
728 **/
729static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
730 int cleaned_count, gfp_t gfp)
731{
732 struct e1000_adapter *adapter = rx_ring->adapter;
733 struct net_device *netdev = adapter->netdev;
734 struct pci_dev *pdev = adapter->pdev;
735 union e1000_rx_desc_packet_split *rx_desc;
736 struct e1000_buffer *buffer_info;
737 struct e1000_ps_page *ps_page;
738 struct sk_buff *skb;
739 unsigned int i, j;
740
741 i = rx_ring->next_to_use;
742 buffer_info = &rx_ring->buffer_info[i];
743
744 while (cleaned_count--) {
745 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
746
747 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
748 ps_page = &buffer_info->ps_pages[j];
749 if (j >= adapter->rx_ps_pages) {
750 /* all unused desc entries get hw null ptr */
751 rx_desc->read.buffer_addr[j + 1] =
752 ~cpu_to_le64(0);
753 continue;
754 }
755 if (!ps_page->page) {
756 ps_page->page = alloc_page(gfp);
757 if (!ps_page->page) {
758 adapter->alloc_rx_buff_failed++;
759 goto no_buffers;
760 }
761 ps_page->dma = dma_map_page(&pdev->dev,
762 ps_page->page,
763 0, PAGE_SIZE,
764 DMA_FROM_DEVICE);
765 if (dma_mapping_error(&pdev->dev,
766 ps_page->dma)) {
767 dev_err(&adapter->pdev->dev,
768 "Rx DMA page map failed\n");
769 adapter->rx_dma_failed++;
770 goto no_buffers;
771 }
772 }
773 /* Refresh the desc even if buffer_addrs
774 * didn't change because each write-back
775 * erases this info.
776 */
777 rx_desc->read.buffer_addr[j + 1] =
778 cpu_to_le64(ps_page->dma);
779 }
780
781 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
782 gfp);
783
784 if (!skb) {
785 adapter->alloc_rx_buff_failed++;
786 break;
787 }
788
789 buffer_info->skb = skb;
790 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
791 adapter->rx_ps_bsize0,
792 DMA_FROM_DEVICE);
793 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
794 dev_err(&pdev->dev, "Rx DMA map failed\n");
795 adapter->rx_dma_failed++;
796 /* cleanup skb */
797 dev_kfree_skb_any(skb);
798 buffer_info->skb = NULL;
799 break;
800 }
801
802 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
803
804 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
805 /* Force memory writes to complete before letting h/w
806 * know there are new descriptors to fetch. (Only
807 * applicable for weak-ordered memory model archs,
808 * such as IA-64).
809 */
810 wmb();
811 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
812 e1000e_update_rdt_wa(rx_ring, i << 1);
813 else
814 writel(i << 1, rx_ring->tail);
815 }
816
817 i++;
818 if (i == rx_ring->count)
819 i = 0;
820 buffer_info = &rx_ring->buffer_info[i];
821 }
822
823no_buffers:
824 rx_ring->next_to_use = i;
825}
826
827/**
828 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
829 * @rx_ring: Rx descriptor ring
830 * @cleaned_count: number of buffers to allocate this pass
831 **/
832
833static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
834 int cleaned_count, gfp_t gfp)
835{
836 struct e1000_adapter *adapter = rx_ring->adapter;
837 struct net_device *netdev = adapter->netdev;
838 struct pci_dev *pdev = adapter->pdev;
839 union e1000_rx_desc_extended *rx_desc;
840 struct e1000_buffer *buffer_info;
841 struct sk_buff *skb;
842 unsigned int i;
843 unsigned int bufsz = 256 - 16; /* for skb_reserve */
844
845 i = rx_ring->next_to_use;
846 buffer_info = &rx_ring->buffer_info[i];
847
848 while (cleaned_count--) {
849 skb = buffer_info->skb;
850 if (skb) {
851 skb_trim(skb, 0);
852 goto check_page;
853 }
854
855 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
856 if (unlikely(!skb)) {
857 /* Better luck next round */
858 adapter->alloc_rx_buff_failed++;
859 break;
860 }
861
862 buffer_info->skb = skb;
863check_page:
864 /* allocate a new page if necessary */
865 if (!buffer_info->page) {
866 buffer_info->page = alloc_page(gfp);
867 if (unlikely(!buffer_info->page)) {
868 adapter->alloc_rx_buff_failed++;
869 break;
870 }
871 }
872
873 if (!buffer_info->dma) {
874 buffer_info->dma = dma_map_page(&pdev->dev,
875 buffer_info->page, 0,
876 PAGE_SIZE,
877 DMA_FROM_DEVICE);
878 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
879 adapter->alloc_rx_buff_failed++;
880 break;
881 }
882 }
883
884 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
885 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
886
887 if (unlikely(++i == rx_ring->count))
888 i = 0;
889 buffer_info = &rx_ring->buffer_info[i];
890 }
891
892 if (likely(rx_ring->next_to_use != i)) {
893 rx_ring->next_to_use = i;
894 if (unlikely(i-- == 0))
895 i = (rx_ring->count - 1);
896
897 /* Force memory writes to complete before letting h/w
898 * know there are new descriptors to fetch. (Only
899 * applicable for weak-ordered memory model archs,
900 * such as IA-64).
901 */
902 wmb();
903 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
904 e1000e_update_rdt_wa(rx_ring, i);
905 else
906 writel(i, rx_ring->tail);
907 }
908}
909
910static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
911 struct sk_buff *skb)
912{
913 if (netdev->features & NETIF_F_RXHASH)
914 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
915}
916
917/**
918 * e1000_clean_rx_irq - Send received data up the network stack
919 * @rx_ring: Rx descriptor ring
920 *
921 * the return value indicates whether actual cleaning was done, there
922 * is no guarantee that everything was cleaned
923 **/
924static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
925 int work_to_do)
926{
927 struct e1000_adapter *adapter = rx_ring->adapter;
928 struct net_device *netdev = adapter->netdev;
929 struct pci_dev *pdev = adapter->pdev;
930 struct e1000_hw *hw = &adapter->hw;
931 union e1000_rx_desc_extended *rx_desc, *next_rxd;
932 struct e1000_buffer *buffer_info, *next_buffer;
933 u32 length, staterr;
934 unsigned int i;
935 int cleaned_count = 0;
936 bool cleaned = false;
937 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
938
939 i = rx_ring->next_to_clean;
940 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
941 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
942 buffer_info = &rx_ring->buffer_info[i];
943
944 while (staterr & E1000_RXD_STAT_DD) {
945 struct sk_buff *skb;
946
947 if (*work_done >= work_to_do)
948 break;
949 (*work_done)++;
950 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
951
952 skb = buffer_info->skb;
953 buffer_info->skb = NULL;
954
955 prefetch(skb->data - NET_IP_ALIGN);
956
957 i++;
958 if (i == rx_ring->count)
959 i = 0;
960 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
961 prefetch(next_rxd);
962
963 next_buffer = &rx_ring->buffer_info[i];
964
965 cleaned = true;
966 cleaned_count++;
967 dma_unmap_single(&pdev->dev, buffer_info->dma,
968 adapter->rx_buffer_len, DMA_FROM_DEVICE);
969 buffer_info->dma = 0;
970
971 length = le16_to_cpu(rx_desc->wb.upper.length);
972
973 /* !EOP means multiple descriptors were used to store a single
974 * packet, if that's the case we need to toss it. In fact, we
975 * need to toss every packet with the EOP bit clear and the
976 * next frame that _does_ have the EOP bit set, as it is by
977 * definition only a frame fragment
978 */
979 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
980 adapter->flags2 |= FLAG2_IS_DISCARDING;
981
982 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
983 /* All receives must fit into a single buffer */
984 e_dbg("Receive packet consumed multiple buffers\n");
985 /* recycle */
986 buffer_info->skb = skb;
987 if (staterr & E1000_RXD_STAT_EOP)
988 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
989 goto next_desc;
990 }
991
992 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
993 !(netdev->features & NETIF_F_RXALL))) {
994 /* recycle */
995 buffer_info->skb = skb;
996 goto next_desc;
997 }
998
999 /* adjust length to remove Ethernet CRC */
1000 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1001 /* If configured to store CRC, don't subtract FCS,
1002 * but keep the FCS bytes out of the total_rx_bytes
1003 * counter
1004 */
1005 if (netdev->features & NETIF_F_RXFCS)
1006 total_rx_bytes -= 4;
1007 else
1008 length -= 4;
1009 }
1010
1011 total_rx_bytes += length;
1012 total_rx_packets++;
1013
1014 /* code added for copybreak, this should improve
1015 * performance for small packets with large amounts
1016 * of reassembly being done in the stack
1017 */
1018 if (length < copybreak) {
1019 struct sk_buff *new_skb =
1020 napi_alloc_skb(&adapter->napi, length);
1021 if (new_skb) {
1022 skb_copy_to_linear_data_offset(new_skb,
1023 -NET_IP_ALIGN,
1024 (skb->data -
1025 NET_IP_ALIGN),
1026 (length +
1027 NET_IP_ALIGN));
1028 /* save the skb in buffer_info as good */
1029 buffer_info->skb = skb;
1030 skb = new_skb;
1031 }
1032 /* else just continue with the old one */
1033 }
1034 /* end copybreak code */
1035 skb_put(skb, length);
1036
1037 /* Receive Checksum Offload */
1038 e1000_rx_checksum(adapter, staterr, skb);
1039
1040 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1041
1042 e1000_receive_skb(adapter, netdev, skb, staterr,
1043 rx_desc->wb.upper.vlan);
1044
1045next_desc:
1046 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1047
1048 /* return some buffers to hardware, one at a time is too slow */
1049 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1050 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1051 GFP_ATOMIC);
1052 cleaned_count = 0;
1053 }
1054
1055 /* use prefetched values */
1056 rx_desc = next_rxd;
1057 buffer_info = next_buffer;
1058
1059 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1060 }
1061 rx_ring->next_to_clean = i;
1062
1063 cleaned_count = e1000_desc_unused(rx_ring);
1064 if (cleaned_count)
1065 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1066
1067 adapter->total_rx_bytes += total_rx_bytes;
1068 adapter->total_rx_packets += total_rx_packets;
1069 return cleaned;
1070}
1071
1072static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1073 struct e1000_buffer *buffer_info)
1074{
1075 struct e1000_adapter *adapter = tx_ring->adapter;
1076
1077 if (buffer_info->dma) {
1078 if (buffer_info->mapped_as_page)
1079 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1080 buffer_info->length, DMA_TO_DEVICE);
1081 else
1082 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1083 buffer_info->length, DMA_TO_DEVICE);
1084 buffer_info->dma = 0;
1085 }
1086 if (buffer_info->skb) {
1087 dev_kfree_skb_any(buffer_info->skb);
1088 buffer_info->skb = NULL;
1089 }
1090 buffer_info->time_stamp = 0;
1091}
1092
1093static void e1000_print_hw_hang(struct work_struct *work)
1094{
1095 struct e1000_adapter *adapter = container_of(work,
1096 struct e1000_adapter,
1097 print_hang_task);
1098 struct net_device *netdev = adapter->netdev;
1099 struct e1000_ring *tx_ring = adapter->tx_ring;
1100 unsigned int i = tx_ring->next_to_clean;
1101 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1102 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1103 struct e1000_hw *hw = &adapter->hw;
1104 u16 phy_status, phy_1000t_status, phy_ext_status;
1105 u16 pci_status;
1106
1107 if (test_bit(__E1000_DOWN, &adapter->state))
1108 return;
1109
1110 if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1111 /* May be block on write-back, flush and detect again
1112 * flush pending descriptor writebacks to memory
1113 */
1114 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1115 /* execute the writes immediately */
1116 e1e_flush();
1117 /* Due to rare timing issues, write to TIDV again to ensure
1118 * the write is successful
1119 */
1120 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1121 /* execute the writes immediately */
1122 e1e_flush();
1123 adapter->tx_hang_recheck = true;
1124 return;
1125 }
1126 adapter->tx_hang_recheck = false;
1127
1128 if (er32(TDH(0)) == er32(TDT(0))) {
1129 e_dbg("false hang detected, ignoring\n");
1130 return;
1131 }
1132
1133 /* Real hang detected */
1134 netif_stop_queue(netdev);
1135
1136 e1e_rphy(hw, MII_BMSR, &phy_status);
1137 e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1138 e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1139
1140 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1141
1142 /* detected Hardware unit hang */
1143 e_err("Detected Hardware Unit Hang:\n"
1144 " TDH <%x>\n"
1145 " TDT <%x>\n"
1146 " next_to_use <%x>\n"
1147 " next_to_clean <%x>\n"
1148 "buffer_info[next_to_clean]:\n"
1149 " time_stamp <%lx>\n"
1150 " next_to_watch <%x>\n"
1151 " jiffies <%lx>\n"
1152 " next_to_watch.status <%x>\n"
1153 "MAC Status <%x>\n"
1154 "PHY Status <%x>\n"
1155 "PHY 1000BASE-T Status <%x>\n"
1156 "PHY Extended Status <%x>\n"
1157 "PCI Status <%x>\n",
1158 readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1159 tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1160 eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1161 phy_status, phy_1000t_status, phy_ext_status, pci_status);
1162
1163 e1000e_dump(adapter);
1164
1165 /* Suggest workaround for known h/w issue */
1166 if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1167 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1168}
1169
1170/**
1171 * e1000e_tx_hwtstamp_work - check for Tx time stamp
1172 * @work: pointer to work struct
1173 *
1174 * This work function polls the TSYNCTXCTL valid bit to determine when a
1175 * timestamp has been taken for the current stored skb. The timestamp must
1176 * be for this skb because only one such packet is allowed in the queue.
1177 */
1178static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1179{
1180 struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1181 tx_hwtstamp_work);
1182 struct e1000_hw *hw = &adapter->hw;
1183
1184 if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1185 struct skb_shared_hwtstamps shhwtstamps;
1186 u64 txstmp;
1187
1188 txstmp = er32(TXSTMPL);
1189 txstmp |= (u64)er32(TXSTMPH) << 32;
1190
1191 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1192
1193 skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps);
1194 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1195 adapter->tx_hwtstamp_skb = NULL;
1196 } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1197 + adapter->tx_timeout_factor * HZ)) {
1198 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1199 adapter->tx_hwtstamp_skb = NULL;
1200 adapter->tx_hwtstamp_timeouts++;
1201 e_warn("clearing Tx timestamp hang\n");
1202 } else {
1203 /* reschedule to check later */
1204 schedule_work(&adapter->tx_hwtstamp_work);
1205 }
1206}
1207
1208/**
1209 * e1000_clean_tx_irq - Reclaim resources after transmit completes
1210 * @tx_ring: Tx descriptor ring
1211 *
1212 * the return value indicates whether actual cleaning was done, there
1213 * is no guarantee that everything was cleaned
1214 **/
1215static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1216{
1217 struct e1000_adapter *adapter = tx_ring->adapter;
1218 struct net_device *netdev = adapter->netdev;
1219 struct e1000_hw *hw = &adapter->hw;
1220 struct e1000_tx_desc *tx_desc, *eop_desc;
1221 struct e1000_buffer *buffer_info;
1222 unsigned int i, eop;
1223 unsigned int count = 0;
1224 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1225 unsigned int bytes_compl = 0, pkts_compl = 0;
1226
1227 i = tx_ring->next_to_clean;
1228 eop = tx_ring->buffer_info[i].next_to_watch;
1229 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1230
1231 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1232 (count < tx_ring->count)) {
1233 bool cleaned = false;
1234
1235 dma_rmb(); /* read buffer_info after eop_desc */
1236 for (; !cleaned; count++) {
1237 tx_desc = E1000_TX_DESC(*tx_ring, i);
1238 buffer_info = &tx_ring->buffer_info[i];
1239 cleaned = (i == eop);
1240
1241 if (cleaned) {
1242 total_tx_packets += buffer_info->segs;
1243 total_tx_bytes += buffer_info->bytecount;
1244 if (buffer_info->skb) {
1245 bytes_compl += buffer_info->skb->len;
1246 pkts_compl++;
1247 }
1248 }
1249
1250 e1000_put_txbuf(tx_ring, buffer_info);
1251 tx_desc->upper.data = 0;
1252
1253 i++;
1254 if (i == tx_ring->count)
1255 i = 0;
1256 }
1257
1258 if (i == tx_ring->next_to_use)
1259 break;
1260 eop = tx_ring->buffer_info[i].next_to_watch;
1261 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1262 }
1263
1264 tx_ring->next_to_clean = i;
1265
1266 netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1267
1268#define TX_WAKE_THRESHOLD 32
1269 if (count && netif_carrier_ok(netdev) &&
1270 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1271 /* Make sure that anybody stopping the queue after this
1272 * sees the new next_to_clean.
1273 */
1274 smp_mb();
1275
1276 if (netif_queue_stopped(netdev) &&
1277 !(test_bit(__E1000_DOWN, &adapter->state))) {
1278 netif_wake_queue(netdev);
1279 ++adapter->restart_queue;
1280 }
1281 }
1282
1283 if (adapter->detect_tx_hung) {
1284 /* Detect a transmit hang in hardware, this serializes the
1285 * check with the clearing of time_stamp and movement of i
1286 */
1287 adapter->detect_tx_hung = false;
1288 if (tx_ring->buffer_info[i].time_stamp &&
1289 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1290 + (adapter->tx_timeout_factor * HZ)) &&
1291 !(er32(STATUS) & E1000_STATUS_TXOFF))
1292 schedule_work(&adapter->print_hang_task);
1293 else
1294 adapter->tx_hang_recheck = false;
1295 }
1296 adapter->total_tx_bytes += total_tx_bytes;
1297 adapter->total_tx_packets += total_tx_packets;
1298 return count < tx_ring->count;
1299}
1300
1301/**
1302 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1303 * @rx_ring: Rx descriptor ring
1304 *
1305 * the return value indicates whether actual cleaning was done, there
1306 * is no guarantee that everything was cleaned
1307 **/
1308static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1309 int work_to_do)
1310{
1311 struct e1000_adapter *adapter = rx_ring->adapter;
1312 struct e1000_hw *hw = &adapter->hw;
1313 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1314 struct net_device *netdev = adapter->netdev;
1315 struct pci_dev *pdev = adapter->pdev;
1316 struct e1000_buffer *buffer_info, *next_buffer;
1317 struct e1000_ps_page *ps_page;
1318 struct sk_buff *skb;
1319 unsigned int i, j;
1320 u32 length, staterr;
1321 int cleaned_count = 0;
1322 bool cleaned = false;
1323 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1324
1325 i = rx_ring->next_to_clean;
1326 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1327 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1328 buffer_info = &rx_ring->buffer_info[i];
1329
1330 while (staterr & E1000_RXD_STAT_DD) {
1331 if (*work_done >= work_to_do)
1332 break;
1333 (*work_done)++;
1334 skb = buffer_info->skb;
1335 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1336
1337 /* in the packet split case this is header only */
1338 prefetch(skb->data - NET_IP_ALIGN);
1339
1340 i++;
1341 if (i == rx_ring->count)
1342 i = 0;
1343 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1344 prefetch(next_rxd);
1345
1346 next_buffer = &rx_ring->buffer_info[i];
1347
1348 cleaned = true;
1349 cleaned_count++;
1350 dma_unmap_single(&pdev->dev, buffer_info->dma,
1351 adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1352 buffer_info->dma = 0;
1353
1354 /* see !EOP comment in other Rx routine */
1355 if (!(staterr & E1000_RXD_STAT_EOP))
1356 adapter->flags2 |= FLAG2_IS_DISCARDING;
1357
1358 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1359 e_dbg("Packet Split buffers didn't pick up the full packet\n");
1360 dev_kfree_skb_irq(skb);
1361 if (staterr & E1000_RXD_STAT_EOP)
1362 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1363 goto next_desc;
1364 }
1365
1366 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1367 !(netdev->features & NETIF_F_RXALL))) {
1368 dev_kfree_skb_irq(skb);
1369 goto next_desc;
1370 }
1371
1372 length = le16_to_cpu(rx_desc->wb.middle.length0);
1373
1374 if (!length) {
1375 e_dbg("Last part of the packet spanning multiple descriptors\n");
1376 dev_kfree_skb_irq(skb);
1377 goto next_desc;
1378 }
1379
1380 /* Good Receive */
1381 skb_put(skb, length);
1382
1383 {
1384 /* this looks ugly, but it seems compiler issues make
1385 * it more efficient than reusing j
1386 */
1387 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1388
1389 /* page alloc/put takes too long and effects small
1390 * packet throughput, so unsplit small packets and
1391 * save the alloc/put only valid in softirq (napi)
1392 * context to call kmap_*
1393 */
1394 if (l1 && (l1 <= copybreak) &&
1395 ((length + l1) <= adapter->rx_ps_bsize0)) {
1396 u8 *vaddr;
1397
1398 ps_page = &buffer_info->ps_pages[0];
1399
1400 /* there is no documentation about how to call
1401 * kmap_atomic, so we can't hold the mapping
1402 * very long
1403 */
1404 dma_sync_single_for_cpu(&pdev->dev,
1405 ps_page->dma,
1406 PAGE_SIZE,
1407 DMA_FROM_DEVICE);
1408 vaddr = kmap_atomic(ps_page->page);
1409 memcpy(skb_tail_pointer(skb), vaddr, l1);
1410 kunmap_atomic(vaddr);
1411 dma_sync_single_for_device(&pdev->dev,
1412 ps_page->dma,
1413 PAGE_SIZE,
1414 DMA_FROM_DEVICE);
1415
1416 /* remove the CRC */
1417 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1418 if (!(netdev->features & NETIF_F_RXFCS))
1419 l1 -= 4;
1420 }
1421
1422 skb_put(skb, l1);
1423 goto copydone;
1424 } /* if */
1425 }
1426
1427 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1428 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1429 if (!length)
1430 break;
1431
1432 ps_page = &buffer_info->ps_pages[j];
1433 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1434 DMA_FROM_DEVICE);
1435 ps_page->dma = 0;
1436 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1437 ps_page->page = NULL;
1438 skb->len += length;
1439 skb->data_len += length;
1440 skb->truesize += PAGE_SIZE;
1441 }
1442
1443 /* strip the ethernet crc, problem is we're using pages now so
1444 * this whole operation can get a little cpu intensive
1445 */
1446 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1447 if (!(netdev->features & NETIF_F_RXFCS))
1448 pskb_trim(skb, skb->len - 4);
1449 }
1450
1451copydone:
1452 total_rx_bytes += skb->len;
1453 total_rx_packets++;
1454
1455 e1000_rx_checksum(adapter, staterr, skb);
1456
1457 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1458
1459 if (rx_desc->wb.upper.header_status &
1460 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1461 adapter->rx_hdr_split++;
1462
1463 e1000_receive_skb(adapter, netdev, skb, staterr,
1464 rx_desc->wb.middle.vlan);
1465
1466next_desc:
1467 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1468 buffer_info->skb = NULL;
1469
1470 /* return some buffers to hardware, one at a time is too slow */
1471 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1472 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1473 GFP_ATOMIC);
1474 cleaned_count = 0;
1475 }
1476
1477 /* use prefetched values */
1478 rx_desc = next_rxd;
1479 buffer_info = next_buffer;
1480
1481 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1482 }
1483 rx_ring->next_to_clean = i;
1484
1485 cleaned_count = e1000_desc_unused(rx_ring);
1486 if (cleaned_count)
1487 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1488
1489 adapter->total_rx_bytes += total_rx_bytes;
1490 adapter->total_rx_packets += total_rx_packets;
1491 return cleaned;
1492}
1493
1494/**
1495 * e1000_consume_page - helper function
1496 **/
1497static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1498 u16 length)
1499{
1500 bi->page = NULL;
1501 skb->len += length;
1502 skb->data_len += length;
1503 skb->truesize += PAGE_SIZE;
1504}
1505
1506/**
1507 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1508 * @adapter: board private structure
1509 *
1510 * the return value indicates whether actual cleaning was done, there
1511 * is no guarantee that everything was cleaned
1512 **/
1513static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1514 int work_to_do)
1515{
1516 struct e1000_adapter *adapter = rx_ring->adapter;
1517 struct net_device *netdev = adapter->netdev;
1518 struct pci_dev *pdev = adapter->pdev;
1519 union e1000_rx_desc_extended *rx_desc, *next_rxd;
1520 struct e1000_buffer *buffer_info, *next_buffer;
1521 u32 length, staterr;
1522 unsigned int i;
1523 int cleaned_count = 0;
1524 bool cleaned = false;
1525 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1526 struct skb_shared_info *shinfo;
1527
1528 i = rx_ring->next_to_clean;
1529 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1530 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1531 buffer_info = &rx_ring->buffer_info[i];
1532
1533 while (staterr & E1000_RXD_STAT_DD) {
1534 struct sk_buff *skb;
1535
1536 if (*work_done >= work_to_do)
1537 break;
1538 (*work_done)++;
1539 dma_rmb(); /* read descriptor and rx_buffer_info after status DD */
1540
1541 skb = buffer_info->skb;
1542 buffer_info->skb = NULL;
1543
1544 ++i;
1545 if (i == rx_ring->count)
1546 i = 0;
1547 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1548 prefetch(next_rxd);
1549
1550 next_buffer = &rx_ring->buffer_info[i];
1551
1552 cleaned = true;
1553 cleaned_count++;
1554 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1555 DMA_FROM_DEVICE);
1556 buffer_info->dma = 0;
1557
1558 length = le16_to_cpu(rx_desc->wb.upper.length);
1559
1560 /* errors is only valid for DD + EOP descriptors */
1561 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1562 ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1563 !(netdev->features & NETIF_F_RXALL)))) {
1564 /* recycle both page and skb */
1565 buffer_info->skb = skb;
1566 /* an error means any chain goes out the window too */
1567 if (rx_ring->rx_skb_top)
1568 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1569 rx_ring->rx_skb_top = NULL;
1570 goto next_desc;
1571 }
1572#define rxtop (rx_ring->rx_skb_top)
1573 if (!(staterr & E1000_RXD_STAT_EOP)) {
1574 /* this descriptor is only the beginning (or middle) */
1575 if (!rxtop) {
1576 /* this is the beginning of a chain */
1577 rxtop = skb;
1578 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1579 0, length);
1580 } else {
1581 /* this is the middle of a chain */
1582 shinfo = skb_shinfo(rxtop);
1583 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1584 buffer_info->page, 0,
1585 length);
1586 /* re-use the skb, only consumed the page */
1587 buffer_info->skb = skb;
1588 }
1589 e1000_consume_page(buffer_info, rxtop, length);
1590 goto next_desc;
1591 } else {
1592 if (rxtop) {
1593 /* end of the chain */
1594 shinfo = skb_shinfo(rxtop);
1595 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1596 buffer_info->page, 0,
1597 length);
1598 /* re-use the current skb, we only consumed the
1599 * page
1600 */
1601 buffer_info->skb = skb;
1602 skb = rxtop;
1603 rxtop = NULL;
1604 e1000_consume_page(buffer_info, skb, length);
1605 } else {
1606 /* no chain, got EOP, this buf is the packet
1607 * copybreak to save the put_page/alloc_page
1608 */
1609 if (length <= copybreak &&
1610 skb_tailroom(skb) >= length) {
1611 u8 *vaddr;
1612 vaddr = kmap_atomic(buffer_info->page);
1613 memcpy(skb_tail_pointer(skb), vaddr,
1614 length);
1615 kunmap_atomic(vaddr);
1616 /* re-use the page, so don't erase
1617 * buffer_info->page
1618 */
1619 skb_put(skb, length);
1620 } else {
1621 skb_fill_page_desc(skb, 0,
1622 buffer_info->page, 0,
1623 length);
1624 e1000_consume_page(buffer_info, skb,
1625 length);
1626 }
1627 }
1628 }
1629
1630 /* Receive Checksum Offload */
1631 e1000_rx_checksum(adapter, staterr, skb);
1632
1633 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1634
1635 /* probably a little skewed due to removing CRC */
1636 total_rx_bytes += skb->len;
1637 total_rx_packets++;
1638
1639 /* eth type trans needs skb->data to point to something */
1640 if (!pskb_may_pull(skb, ETH_HLEN)) {
1641 e_err("pskb_may_pull failed.\n");
1642 dev_kfree_skb_irq(skb);
1643 goto next_desc;
1644 }
1645
1646 e1000_receive_skb(adapter, netdev, skb, staterr,
1647 rx_desc->wb.upper.vlan);
1648
1649next_desc:
1650 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1651
1652 /* return some buffers to hardware, one at a time is too slow */
1653 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1654 adapter->alloc_rx_buf(rx_ring, cleaned_count,
1655 GFP_ATOMIC);
1656 cleaned_count = 0;
1657 }
1658
1659 /* use prefetched values */
1660 rx_desc = next_rxd;
1661 buffer_info = next_buffer;
1662
1663 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1664 }
1665 rx_ring->next_to_clean = i;
1666
1667 cleaned_count = e1000_desc_unused(rx_ring);
1668 if (cleaned_count)
1669 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1670
1671 adapter->total_rx_bytes += total_rx_bytes;
1672 adapter->total_rx_packets += total_rx_packets;
1673 return cleaned;
1674}
1675
1676/**
1677 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1678 * @rx_ring: Rx descriptor ring
1679 **/
1680static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1681{
1682 struct e1000_adapter *adapter = rx_ring->adapter;
1683 struct e1000_buffer *buffer_info;
1684 struct e1000_ps_page *ps_page;
1685 struct pci_dev *pdev = adapter->pdev;
1686 unsigned int i, j;
1687
1688 /* Free all the Rx ring sk_buffs */
1689 for (i = 0; i < rx_ring->count; i++) {
1690 buffer_info = &rx_ring->buffer_info[i];
1691 if (buffer_info->dma) {
1692 if (adapter->clean_rx == e1000_clean_rx_irq)
1693 dma_unmap_single(&pdev->dev, buffer_info->dma,
1694 adapter->rx_buffer_len,
1695 DMA_FROM_DEVICE);
1696 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1697 dma_unmap_page(&pdev->dev, buffer_info->dma,
1698 PAGE_SIZE, DMA_FROM_DEVICE);
1699 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1700 dma_unmap_single(&pdev->dev, buffer_info->dma,
1701 adapter->rx_ps_bsize0,
1702 DMA_FROM_DEVICE);
1703 buffer_info->dma = 0;
1704 }
1705
1706 if (buffer_info->page) {
1707 put_page(buffer_info->page);
1708 buffer_info->page = NULL;
1709 }
1710
1711 if (buffer_info->skb) {
1712 dev_kfree_skb(buffer_info->skb);
1713 buffer_info->skb = NULL;
1714 }
1715
1716 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1717 ps_page = &buffer_info->ps_pages[j];
1718 if (!ps_page->page)
1719 break;
1720 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1721 DMA_FROM_DEVICE);
1722 ps_page->dma = 0;
1723 put_page(ps_page->page);
1724 ps_page->page = NULL;
1725 }
1726 }
1727
1728 /* there also may be some cached data from a chained receive */
1729 if (rx_ring->rx_skb_top) {
1730 dev_kfree_skb(rx_ring->rx_skb_top);
1731 rx_ring->rx_skb_top = NULL;
1732 }
1733
1734 /* Zero out the descriptor ring */
1735 memset(rx_ring->desc, 0, rx_ring->size);
1736
1737 rx_ring->next_to_clean = 0;
1738 rx_ring->next_to_use = 0;
1739 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1740}
1741
1742static void e1000e_downshift_workaround(struct work_struct *work)
1743{
1744 struct e1000_adapter *adapter = container_of(work,
1745 struct e1000_adapter,
1746 downshift_task);
1747
1748 if (test_bit(__E1000_DOWN, &adapter->state))
1749 return;
1750
1751 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1752}
1753
1754/**
1755 * e1000_intr_msi - Interrupt Handler
1756 * @irq: interrupt number
1757 * @data: pointer to a network interface device structure
1758 **/
1759static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1760{
1761 struct net_device *netdev = data;
1762 struct e1000_adapter *adapter = netdev_priv(netdev);
1763 struct e1000_hw *hw = &adapter->hw;
1764 u32 icr = er32(ICR);
1765
1766 /* read ICR disables interrupts using IAM */
1767 if (icr & E1000_ICR_LSC) {
1768 hw->mac.get_link_status = true;
1769 /* ICH8 workaround-- Call gig speed drop workaround on cable
1770 * disconnect (LSC) before accessing any PHY registers
1771 */
1772 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1773 (!(er32(STATUS) & E1000_STATUS_LU)))
1774 schedule_work(&adapter->downshift_task);
1775
1776 /* 80003ES2LAN workaround-- For packet buffer work-around on
1777 * link down event; disable receives here in the ISR and reset
1778 * adapter in watchdog
1779 */
1780 if (netif_carrier_ok(netdev) &&
1781 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1782 /* disable receives */
1783 u32 rctl = er32(RCTL);
1784
1785 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1786 adapter->flags |= FLAG_RESTART_NOW;
1787 }
1788 /* guard against interrupt when we're going down */
1789 if (!test_bit(__E1000_DOWN, &adapter->state))
1790 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1791 }
1792
1793 /* Reset on uncorrectable ECC error */
1794 if ((icr & E1000_ICR_ECCER) && ((hw->mac.type == e1000_pch_lpt) ||
1795 (hw->mac.type == e1000_pch_spt))) {
1796 u32 pbeccsts = er32(PBECCSTS);
1797
1798 adapter->corr_errors +=
1799 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1800 adapter->uncorr_errors +=
1801 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1802 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1803
1804 /* Do the reset outside of interrupt context */
1805 schedule_work(&adapter->reset_task);
1806
1807 /* return immediately since reset is imminent */
1808 return IRQ_HANDLED;
1809 }
1810
1811 if (napi_schedule_prep(&adapter->napi)) {
1812 adapter->total_tx_bytes = 0;
1813 adapter->total_tx_packets = 0;
1814 adapter->total_rx_bytes = 0;
1815 adapter->total_rx_packets = 0;
1816 __napi_schedule(&adapter->napi);
1817 }
1818
1819 return IRQ_HANDLED;
1820}
1821
1822/**
1823 * e1000_intr - Interrupt Handler
1824 * @irq: interrupt number
1825 * @data: pointer to a network interface device structure
1826 **/
1827static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1828{
1829 struct net_device *netdev = data;
1830 struct e1000_adapter *adapter = netdev_priv(netdev);
1831 struct e1000_hw *hw = &adapter->hw;
1832 u32 rctl, icr = er32(ICR);
1833
1834 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1835 return IRQ_NONE; /* Not our interrupt */
1836
1837 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1838 * not set, then the adapter didn't send an interrupt
1839 */
1840 if (!(icr & E1000_ICR_INT_ASSERTED))
1841 return IRQ_NONE;
1842
1843 /* Interrupt Auto-Mask...upon reading ICR,
1844 * interrupts are masked. No need for the
1845 * IMC write
1846 */
1847
1848 if (icr & E1000_ICR_LSC) {
1849 hw->mac.get_link_status = true;
1850 /* ICH8 workaround-- Call gig speed drop workaround on cable
1851 * disconnect (LSC) before accessing any PHY registers
1852 */
1853 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1854 (!(er32(STATUS) & E1000_STATUS_LU)))
1855 schedule_work(&adapter->downshift_task);
1856
1857 /* 80003ES2LAN workaround--
1858 * For packet buffer work-around on link down event;
1859 * disable receives here in the ISR and
1860 * reset adapter in watchdog
1861 */
1862 if (netif_carrier_ok(netdev) &&
1863 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1864 /* disable receives */
1865 rctl = er32(RCTL);
1866 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1867 adapter->flags |= FLAG_RESTART_NOW;
1868 }
1869 /* guard against interrupt when we're going down */
1870 if (!test_bit(__E1000_DOWN, &adapter->state))
1871 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1872 }
1873
1874 /* Reset on uncorrectable ECC error */
1875 if ((icr & E1000_ICR_ECCER) && ((hw->mac.type == e1000_pch_lpt) ||
1876 (hw->mac.type == e1000_pch_spt))) {
1877 u32 pbeccsts = er32(PBECCSTS);
1878
1879 adapter->corr_errors +=
1880 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1881 adapter->uncorr_errors +=
1882 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1883 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1884
1885 /* Do the reset outside of interrupt context */
1886 schedule_work(&adapter->reset_task);
1887
1888 /* return immediately since reset is imminent */
1889 return IRQ_HANDLED;
1890 }
1891
1892 if (napi_schedule_prep(&adapter->napi)) {
1893 adapter->total_tx_bytes = 0;
1894 adapter->total_tx_packets = 0;
1895 adapter->total_rx_bytes = 0;
1896 adapter->total_rx_packets = 0;
1897 __napi_schedule(&adapter->napi);
1898 }
1899
1900 return IRQ_HANDLED;
1901}
1902
1903static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1904{
1905 struct net_device *netdev = data;
1906 struct e1000_adapter *adapter = netdev_priv(netdev);
1907 struct e1000_hw *hw = &adapter->hw;
1908
1909 hw->mac.get_link_status = true;
1910
1911 /* guard against interrupt when we're going down */
1912 if (!test_bit(__E1000_DOWN, &adapter->state)) {
1913 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1914 ew32(IMS, E1000_IMS_OTHER);
1915 }
1916
1917 return IRQ_HANDLED;
1918}
1919
1920static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1921{
1922 struct net_device *netdev = data;
1923 struct e1000_adapter *adapter = netdev_priv(netdev);
1924 struct e1000_hw *hw = &adapter->hw;
1925 struct e1000_ring *tx_ring = adapter->tx_ring;
1926
1927 adapter->total_tx_bytes = 0;
1928 adapter->total_tx_packets = 0;
1929
1930 if (!e1000_clean_tx_irq(tx_ring))
1931 /* Ring was not completely cleaned, so fire another interrupt */
1932 ew32(ICS, tx_ring->ims_val);
1933
1934 if (!test_bit(__E1000_DOWN, &adapter->state))
1935 ew32(IMS, adapter->tx_ring->ims_val);
1936
1937 return IRQ_HANDLED;
1938}
1939
1940static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1941{
1942 struct net_device *netdev = data;
1943 struct e1000_adapter *adapter = netdev_priv(netdev);
1944 struct e1000_ring *rx_ring = adapter->rx_ring;
1945
1946 /* Write the ITR value calculated at the end of the
1947 * previous interrupt.
1948 */
1949 if (rx_ring->set_itr) {
1950 u32 itr = rx_ring->itr_val ?
1951 1000000000 / (rx_ring->itr_val * 256) : 0;
1952
1953 writel(itr, rx_ring->itr_register);
1954 rx_ring->set_itr = 0;
1955 }
1956
1957 if (napi_schedule_prep(&adapter->napi)) {
1958 adapter->total_rx_bytes = 0;
1959 adapter->total_rx_packets = 0;
1960 __napi_schedule(&adapter->napi);
1961 }
1962 return IRQ_HANDLED;
1963}
1964
1965/**
1966 * e1000_configure_msix - Configure MSI-X hardware
1967 *
1968 * e1000_configure_msix sets up the hardware to properly
1969 * generate MSI-X interrupts.
1970 **/
1971static void e1000_configure_msix(struct e1000_adapter *adapter)
1972{
1973 struct e1000_hw *hw = &adapter->hw;
1974 struct e1000_ring *rx_ring = adapter->rx_ring;
1975 struct e1000_ring *tx_ring = adapter->tx_ring;
1976 int vector = 0;
1977 u32 ctrl_ext, ivar = 0;
1978
1979 adapter->eiac_mask = 0;
1980
1981 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1982 if (hw->mac.type == e1000_82574) {
1983 u32 rfctl = er32(RFCTL);
1984
1985 rfctl |= E1000_RFCTL_ACK_DIS;
1986 ew32(RFCTL, rfctl);
1987 }
1988
1989 /* Configure Rx vector */
1990 rx_ring->ims_val = E1000_IMS_RXQ0;
1991 adapter->eiac_mask |= rx_ring->ims_val;
1992 if (rx_ring->itr_val)
1993 writel(1000000000 / (rx_ring->itr_val * 256),
1994 rx_ring->itr_register);
1995 else
1996 writel(1, rx_ring->itr_register);
1997 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1998
1999 /* Configure Tx vector */
2000 tx_ring->ims_val = E1000_IMS_TXQ0;
2001 vector++;
2002 if (tx_ring->itr_val)
2003 writel(1000000000 / (tx_ring->itr_val * 256),
2004 tx_ring->itr_register);
2005 else
2006 writel(1, tx_ring->itr_register);
2007 adapter->eiac_mask |= tx_ring->ims_val;
2008 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2009
2010 /* set vector for Other Causes, e.g. link changes */
2011 vector++;
2012 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2013 if (rx_ring->itr_val)
2014 writel(1000000000 / (rx_ring->itr_val * 256),
2015 hw->hw_addr + E1000_EITR_82574(vector));
2016 else
2017 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2018 adapter->eiac_mask |= E1000_IMS_OTHER;
2019
2020 /* Cause Tx interrupts on every write back */
2021 ivar |= (1 << 31);
2022
2023 ew32(IVAR, ivar);
2024
2025 /* enable MSI-X PBA support */
2026 ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2027 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2028 ew32(CTRL_EXT, ctrl_ext);
2029 e1e_flush();
2030}
2031
2032void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2033{
2034 if (adapter->msix_entries) {
2035 pci_disable_msix(adapter->pdev);
2036 kfree(adapter->msix_entries);
2037 adapter->msix_entries = NULL;
2038 } else if (adapter->flags & FLAG_MSI_ENABLED) {
2039 pci_disable_msi(adapter->pdev);
2040 adapter->flags &= ~FLAG_MSI_ENABLED;
2041 }
2042}
2043
2044/**
2045 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2046 *
2047 * Attempt to configure interrupts using the best available
2048 * capabilities of the hardware and kernel.
2049 **/
2050void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2051{
2052 int err;
2053 int i;
2054
2055 switch (adapter->int_mode) {
2056 case E1000E_INT_MODE_MSIX:
2057 if (adapter->flags & FLAG_HAS_MSIX) {
2058 adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2059 adapter->msix_entries = kcalloc(adapter->num_vectors,
2060 sizeof(struct
2061 msix_entry),
2062 GFP_KERNEL);
2063 if (adapter->msix_entries) {
2064 struct e1000_adapter *a = adapter;
2065
2066 for (i = 0; i < adapter->num_vectors; i++)
2067 adapter->msix_entries[i].entry = i;
2068
2069 err = pci_enable_msix_range(a->pdev,
2070 a->msix_entries,
2071 a->num_vectors,
2072 a->num_vectors);
2073 if (err > 0)
2074 return;
2075 }
2076 /* MSI-X failed, so fall through and try MSI */
2077 e_err("Failed to initialize MSI-X interrupts. Falling back to MSI interrupts.\n");
2078 e1000e_reset_interrupt_capability(adapter);
2079 }
2080 adapter->int_mode = E1000E_INT_MODE_MSI;
2081 /* Fall through */
2082 case E1000E_INT_MODE_MSI:
2083 if (!pci_enable_msi(adapter->pdev)) {
2084 adapter->flags |= FLAG_MSI_ENABLED;
2085 } else {
2086 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2087 e_err("Failed to initialize MSI interrupts. Falling back to legacy interrupts.\n");
2088 }
2089 /* Fall through */
2090 case E1000E_INT_MODE_LEGACY:
2091 /* Don't do anything; this is the system default */
2092 break;
2093 }
2094
2095 /* store the number of vectors being used */
2096 adapter->num_vectors = 1;
2097}
2098
2099/**
2100 * e1000_request_msix - Initialize MSI-X interrupts
2101 *
2102 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2103 * kernel.
2104 **/
2105static int e1000_request_msix(struct e1000_adapter *adapter)
2106{
2107 struct net_device *netdev = adapter->netdev;
2108 int err = 0, vector = 0;
2109
2110 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2111 snprintf(adapter->rx_ring->name,
2112 sizeof(adapter->rx_ring->name) - 1,
2113 "%s-rx-0", netdev->name);
2114 else
2115 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2116 err = request_irq(adapter->msix_entries[vector].vector,
2117 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2118 netdev);
2119 if (err)
2120 return err;
2121 adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2122 E1000_EITR_82574(vector);
2123 adapter->rx_ring->itr_val = adapter->itr;
2124 vector++;
2125
2126 if (strlen(netdev->name) < (IFNAMSIZ - 5))
2127 snprintf(adapter->tx_ring->name,
2128 sizeof(adapter->tx_ring->name) - 1,
2129 "%s-tx-0", netdev->name);
2130 else
2131 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2132 err = request_irq(adapter->msix_entries[vector].vector,
2133 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2134 netdev);
2135 if (err)
2136 return err;
2137 adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2138 E1000_EITR_82574(vector);
2139 adapter->tx_ring->itr_val = adapter->itr;
2140 vector++;
2141
2142 err = request_irq(adapter->msix_entries[vector].vector,
2143 e1000_msix_other, 0, netdev->name, netdev);
2144 if (err)
2145 return err;
2146
2147 e1000_configure_msix(adapter);
2148
2149 return 0;
2150}
2151
2152/**
2153 * e1000_request_irq - initialize interrupts
2154 *
2155 * Attempts to configure interrupts using the best available
2156 * capabilities of the hardware and kernel.
2157 **/
2158static int e1000_request_irq(struct e1000_adapter *adapter)
2159{
2160 struct net_device *netdev = adapter->netdev;
2161 int err;
2162
2163 if (adapter->msix_entries) {
2164 err = e1000_request_msix(adapter);
2165 if (!err)
2166 return err;
2167 /* fall back to MSI */
2168 e1000e_reset_interrupt_capability(adapter);
2169 adapter->int_mode = E1000E_INT_MODE_MSI;
2170 e1000e_set_interrupt_capability(adapter);
2171 }
2172 if (adapter->flags & FLAG_MSI_ENABLED) {
2173 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2174 netdev->name, netdev);
2175 if (!err)
2176 return err;
2177
2178 /* fall back to legacy interrupt */
2179 e1000e_reset_interrupt_capability(adapter);
2180 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2181 }
2182
2183 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2184 netdev->name, netdev);
2185 if (err)
2186 e_err("Unable to allocate interrupt, Error: %d\n", err);
2187
2188 return err;
2189}
2190
2191static void e1000_free_irq(struct e1000_adapter *adapter)
2192{
2193 struct net_device *netdev = adapter->netdev;
2194
2195 if (adapter->msix_entries) {
2196 int vector = 0;
2197
2198 free_irq(adapter->msix_entries[vector].vector, netdev);
2199 vector++;
2200
2201 free_irq(adapter->msix_entries[vector].vector, netdev);
2202 vector++;
2203
2204 /* Other Causes interrupt vector */
2205 free_irq(adapter->msix_entries[vector].vector, netdev);
2206 return;
2207 }
2208
2209 free_irq(adapter->pdev->irq, netdev);
2210}
2211
2212/**
2213 * e1000_irq_disable - Mask off interrupt generation on the NIC
2214 **/
2215static void e1000_irq_disable(struct e1000_adapter *adapter)
2216{
2217 struct e1000_hw *hw = &adapter->hw;
2218
2219 ew32(IMC, ~0);
2220 if (adapter->msix_entries)
2221 ew32(EIAC_82574, 0);
2222 e1e_flush();
2223
2224 if (adapter->msix_entries) {
2225 int i;
2226
2227 for (i = 0; i < adapter->num_vectors; i++)
2228 synchronize_irq(adapter->msix_entries[i].vector);
2229 } else {
2230 synchronize_irq(adapter->pdev->irq);
2231 }
2232}
2233
2234/**
2235 * e1000_irq_enable - Enable default interrupt generation settings
2236 **/
2237static void e1000_irq_enable(struct e1000_adapter *adapter)
2238{
2239 struct e1000_hw *hw = &adapter->hw;
2240
2241 if (adapter->msix_entries) {
2242 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2243 ew32(IMS, adapter->eiac_mask | E1000_IMS_LSC);
2244 } else if ((hw->mac.type == e1000_pch_lpt) ||
2245 (hw->mac.type == e1000_pch_spt)) {
2246 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2247 } else {
2248 ew32(IMS, IMS_ENABLE_MASK);
2249 }
2250 e1e_flush();
2251}
2252
2253/**
2254 * e1000e_get_hw_control - get control of the h/w from f/w
2255 * @adapter: address of board private structure
2256 *
2257 * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2258 * For ASF and Pass Through versions of f/w this means that
2259 * the driver is loaded. For AMT version (only with 82573)
2260 * of the f/w this means that the network i/f is open.
2261 **/
2262void e1000e_get_hw_control(struct e1000_adapter *adapter)
2263{
2264 struct e1000_hw *hw = &adapter->hw;
2265 u32 ctrl_ext;
2266 u32 swsm;
2267
2268 /* Let firmware know the driver has taken over */
2269 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2270 swsm = er32(SWSM);
2271 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2272 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2273 ctrl_ext = er32(CTRL_EXT);
2274 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2275 }
2276}
2277
2278/**
2279 * e1000e_release_hw_control - release control of the h/w to f/w
2280 * @adapter: address of board private structure
2281 *
2282 * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2283 * For ASF and Pass Through versions of f/w this means that the
2284 * driver is no longer loaded. For AMT version (only with 82573) i
2285 * of the f/w this means that the network i/f is closed.
2286 *
2287 **/
2288void e1000e_release_hw_control(struct e1000_adapter *adapter)
2289{
2290 struct e1000_hw *hw = &adapter->hw;
2291 u32 ctrl_ext;
2292 u32 swsm;
2293
2294 /* Let firmware taken over control of h/w */
2295 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2296 swsm = er32(SWSM);
2297 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2298 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2299 ctrl_ext = er32(CTRL_EXT);
2300 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2301 }
2302}
2303
2304/**
2305 * e1000_alloc_ring_dma - allocate memory for a ring structure
2306 **/
2307static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2308 struct e1000_ring *ring)
2309{
2310 struct pci_dev *pdev = adapter->pdev;
2311
2312 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2313 GFP_KERNEL);
2314 if (!ring->desc)
2315 return -ENOMEM;
2316
2317 return 0;
2318}
2319
2320/**
2321 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2322 * @tx_ring: Tx descriptor ring
2323 *
2324 * Return 0 on success, negative on failure
2325 **/
2326int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2327{
2328 struct e1000_adapter *adapter = tx_ring->adapter;
2329 int err = -ENOMEM, size;
2330
2331 size = sizeof(struct e1000_buffer) * tx_ring->count;
2332 tx_ring->buffer_info = vzalloc(size);
2333 if (!tx_ring->buffer_info)
2334 goto err;
2335
2336 /* round up to nearest 4K */
2337 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2338 tx_ring->size = ALIGN(tx_ring->size, 4096);
2339
2340 err = e1000_alloc_ring_dma(adapter, tx_ring);
2341 if (err)
2342 goto err;
2343
2344 tx_ring->next_to_use = 0;
2345 tx_ring->next_to_clean = 0;
2346
2347 return 0;
2348err:
2349 vfree(tx_ring->buffer_info);
2350 e_err("Unable to allocate memory for the transmit descriptor ring\n");
2351 return err;
2352}
2353
2354/**
2355 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2356 * @rx_ring: Rx descriptor ring
2357 *
2358 * Returns 0 on success, negative on failure
2359 **/
2360int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2361{
2362 struct e1000_adapter *adapter = rx_ring->adapter;
2363 struct e1000_buffer *buffer_info;
2364 int i, size, desc_len, err = -ENOMEM;
2365
2366 size = sizeof(struct e1000_buffer) * rx_ring->count;
2367 rx_ring->buffer_info = vzalloc(size);
2368 if (!rx_ring->buffer_info)
2369 goto err;
2370
2371 for (i = 0; i < rx_ring->count; i++) {
2372 buffer_info = &rx_ring->buffer_info[i];
2373 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2374 sizeof(struct e1000_ps_page),
2375 GFP_KERNEL);
2376 if (!buffer_info->ps_pages)
2377 goto err_pages;
2378 }
2379
2380 desc_len = sizeof(union e1000_rx_desc_packet_split);
2381
2382 /* Round up to nearest 4K */
2383 rx_ring->size = rx_ring->count * desc_len;
2384 rx_ring->size = ALIGN(rx_ring->size, 4096);
2385
2386 err = e1000_alloc_ring_dma(adapter, rx_ring);
2387 if (err)
2388 goto err_pages;
2389
2390 rx_ring->next_to_clean = 0;
2391 rx_ring->next_to_use = 0;
2392 rx_ring->rx_skb_top = NULL;
2393
2394 return 0;
2395
2396err_pages:
2397 for (i = 0; i < rx_ring->count; i++) {
2398 buffer_info = &rx_ring->buffer_info[i];
2399 kfree(buffer_info->ps_pages);
2400 }
2401err:
2402 vfree(rx_ring->buffer_info);
2403 e_err("Unable to allocate memory for the receive descriptor ring\n");
2404 return err;
2405}
2406
2407/**
2408 * e1000_clean_tx_ring - Free Tx Buffers
2409 * @tx_ring: Tx descriptor ring
2410 **/
2411static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2412{
2413 struct e1000_adapter *adapter = tx_ring->adapter;
2414 struct e1000_buffer *buffer_info;
2415 unsigned long size;
2416 unsigned int i;
2417
2418 for (i = 0; i < tx_ring->count; i++) {
2419 buffer_info = &tx_ring->buffer_info[i];
2420 e1000_put_txbuf(tx_ring, buffer_info);
2421 }
2422
2423 netdev_reset_queue(adapter->netdev);
2424 size = sizeof(struct e1000_buffer) * tx_ring->count;
2425 memset(tx_ring->buffer_info, 0, size);
2426
2427 memset(tx_ring->desc, 0, tx_ring->size);
2428
2429 tx_ring->next_to_use = 0;
2430 tx_ring->next_to_clean = 0;
2431}
2432
2433/**
2434 * e1000e_free_tx_resources - Free Tx Resources per Queue
2435 * @tx_ring: Tx descriptor ring
2436 *
2437 * Free all transmit software resources
2438 **/
2439void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2440{
2441 struct e1000_adapter *adapter = tx_ring->adapter;
2442 struct pci_dev *pdev = adapter->pdev;
2443
2444 e1000_clean_tx_ring(tx_ring);
2445
2446 vfree(tx_ring->buffer_info);
2447 tx_ring->buffer_info = NULL;
2448
2449 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2450 tx_ring->dma);
2451 tx_ring->desc = NULL;
2452}
2453
2454/**
2455 * e1000e_free_rx_resources - Free Rx Resources
2456 * @rx_ring: Rx descriptor ring
2457 *
2458 * Free all receive software resources
2459 **/
2460void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2461{
2462 struct e1000_adapter *adapter = rx_ring->adapter;
2463 struct pci_dev *pdev = adapter->pdev;
2464 int i;
2465
2466 e1000_clean_rx_ring(rx_ring);
2467
2468 for (i = 0; i < rx_ring->count; i++)
2469 kfree(rx_ring->buffer_info[i].ps_pages);
2470
2471 vfree(rx_ring->buffer_info);
2472 rx_ring->buffer_info = NULL;
2473
2474 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2475 rx_ring->dma);
2476 rx_ring->desc = NULL;
2477}
2478
2479/**
2480 * e1000_update_itr - update the dynamic ITR value based on statistics
2481 * @adapter: pointer to adapter
2482 * @itr_setting: current adapter->itr
2483 * @packets: the number of packets during this measurement interval
2484 * @bytes: the number of bytes during this measurement interval
2485 *
2486 * Stores a new ITR value based on packets and byte
2487 * counts during the last interrupt. The advantage of per interrupt
2488 * computation is faster updates and more accurate ITR for the current
2489 * traffic pattern. Constants in this function were computed
2490 * based on theoretical maximum wire speed and thresholds were set based
2491 * on testing data as well as attempting to minimize response time
2492 * while increasing bulk throughput. This functionality is controlled
2493 * by the InterruptThrottleRate module parameter.
2494 **/
2495static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2496{
2497 unsigned int retval = itr_setting;
2498
2499 if (packets == 0)
2500 return itr_setting;
2501
2502 switch (itr_setting) {
2503 case lowest_latency:
2504 /* handle TSO and jumbo frames */
2505 if (bytes / packets > 8000)
2506 retval = bulk_latency;
2507 else if ((packets < 5) && (bytes > 512))
2508 retval = low_latency;
2509 break;
2510 case low_latency: /* 50 usec aka 20000 ints/s */
2511 if (bytes > 10000) {
2512 /* this if handles the TSO accounting */
2513 if (bytes / packets > 8000)
2514 retval = bulk_latency;
2515 else if ((packets < 10) || ((bytes / packets) > 1200))
2516 retval = bulk_latency;
2517 else if ((packets > 35))
2518 retval = lowest_latency;
2519 } else if (bytes / packets > 2000) {
2520 retval = bulk_latency;
2521 } else if (packets <= 2 && bytes < 512) {
2522 retval = lowest_latency;
2523 }
2524 break;
2525 case bulk_latency: /* 250 usec aka 4000 ints/s */
2526 if (bytes > 25000) {
2527 if (packets > 35)
2528 retval = low_latency;
2529 } else if (bytes < 6000) {
2530 retval = low_latency;
2531 }
2532 break;
2533 }
2534
2535 return retval;
2536}
2537
2538static void e1000_set_itr(struct e1000_adapter *adapter)
2539{
2540 u16 current_itr;
2541 u32 new_itr = adapter->itr;
2542
2543 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2544 if (adapter->link_speed != SPEED_1000) {
2545 current_itr = 0;
2546 new_itr = 4000;
2547 goto set_itr_now;
2548 }
2549
2550 if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2551 new_itr = 0;
2552 goto set_itr_now;
2553 }
2554
2555 adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2556 adapter->total_tx_packets,
2557 adapter->total_tx_bytes);
2558 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2559 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2560 adapter->tx_itr = low_latency;
2561
2562 adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2563 adapter->total_rx_packets,
2564 adapter->total_rx_bytes);
2565 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2566 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2567 adapter->rx_itr = low_latency;
2568
2569 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2570
2571 /* counts and packets in update_itr are dependent on these numbers */
2572 switch (current_itr) {
2573 case lowest_latency:
2574 new_itr = 70000;
2575 break;
2576 case low_latency:
2577 new_itr = 20000; /* aka hwitr = ~200 */
2578 break;
2579 case bulk_latency:
2580 new_itr = 4000;
2581 break;
2582 default:
2583 break;
2584 }
2585
2586set_itr_now:
2587 if (new_itr != adapter->itr) {
2588 /* this attempts to bias the interrupt rate towards Bulk
2589 * by adding intermediate steps when interrupt rate is
2590 * increasing
2591 */
2592 new_itr = new_itr > adapter->itr ?
2593 min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2594 adapter->itr = new_itr;
2595 adapter->rx_ring->itr_val = new_itr;
2596 if (adapter->msix_entries)
2597 adapter->rx_ring->set_itr = 1;
2598 else
2599 e1000e_write_itr(adapter, new_itr);
2600 }
2601}
2602
2603/**
2604 * e1000e_write_itr - write the ITR value to the appropriate registers
2605 * @adapter: address of board private structure
2606 * @itr: new ITR value to program
2607 *
2608 * e1000e_write_itr determines if the adapter is in MSI-X mode
2609 * and, if so, writes the EITR registers with the ITR value.
2610 * Otherwise, it writes the ITR value into the ITR register.
2611 **/
2612void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2613{
2614 struct e1000_hw *hw = &adapter->hw;
2615 u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2616
2617 if (adapter->msix_entries) {
2618 int vector;
2619
2620 for (vector = 0; vector < adapter->num_vectors; vector++)
2621 writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2622 } else {
2623 ew32(ITR, new_itr);
2624 }
2625}
2626
2627/**
2628 * e1000_alloc_queues - Allocate memory for all rings
2629 * @adapter: board private structure to initialize
2630 **/
2631static int e1000_alloc_queues(struct e1000_adapter *adapter)
2632{
2633 int size = sizeof(struct e1000_ring);
2634
2635 adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2636 if (!adapter->tx_ring)
2637 goto err;
2638 adapter->tx_ring->count = adapter->tx_ring_count;
2639 adapter->tx_ring->adapter = adapter;
2640
2641 adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2642 if (!adapter->rx_ring)
2643 goto err;
2644 adapter->rx_ring->count = adapter->rx_ring_count;
2645 adapter->rx_ring->adapter = adapter;
2646
2647 return 0;
2648err:
2649 e_err("Unable to allocate memory for queues\n");
2650 kfree(adapter->rx_ring);
2651 kfree(adapter->tx_ring);
2652 return -ENOMEM;
2653}
2654
2655/**
2656 * e1000e_poll - NAPI Rx polling callback
2657 * @napi: struct associated with this polling callback
2658 * @weight: number of packets driver is allowed to process this poll
2659 **/
2660static int e1000e_poll(struct napi_struct *napi, int weight)
2661{
2662 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2663 napi);
2664 struct e1000_hw *hw = &adapter->hw;
2665 struct net_device *poll_dev = adapter->netdev;
2666 int tx_cleaned = 1, work_done = 0;
2667
2668 adapter = netdev_priv(poll_dev);
2669
2670 if (!adapter->msix_entries ||
2671 (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2672 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2673
2674 adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2675
2676 if (!tx_cleaned)
2677 work_done = weight;
2678
2679 /* If weight not fully consumed, exit the polling mode */
2680 if (work_done < weight) {
2681 if (adapter->itr_setting & 3)
2682 e1000_set_itr(adapter);
2683 napi_complete_done(napi, work_done);
2684 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2685 if (adapter->msix_entries)
2686 ew32(IMS, adapter->rx_ring->ims_val);
2687 else
2688 e1000_irq_enable(adapter);
2689 }
2690 }
2691
2692 return work_done;
2693}
2694
2695static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2696 __always_unused __be16 proto, u16 vid)
2697{
2698 struct e1000_adapter *adapter = netdev_priv(netdev);
2699 struct e1000_hw *hw = &adapter->hw;
2700 u32 vfta, index;
2701
2702 /* don't update vlan cookie if already programmed */
2703 if ((adapter->hw.mng_cookie.status &
2704 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2705 (vid == adapter->mng_vlan_id))
2706 return 0;
2707
2708 /* add VID to filter table */
2709 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2710 index = (vid >> 5) & 0x7F;
2711 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2712 vfta |= (1 << (vid & 0x1F));
2713 hw->mac.ops.write_vfta(hw, index, vfta);
2714 }
2715
2716 set_bit(vid, adapter->active_vlans);
2717
2718 return 0;
2719}
2720
2721static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2722 __always_unused __be16 proto, u16 vid)
2723{
2724 struct e1000_adapter *adapter = netdev_priv(netdev);
2725 struct e1000_hw *hw = &adapter->hw;
2726 u32 vfta, index;
2727
2728 if ((adapter->hw.mng_cookie.status &
2729 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2730 (vid == adapter->mng_vlan_id)) {
2731 /* release control to f/w */
2732 e1000e_release_hw_control(adapter);
2733 return 0;
2734 }
2735
2736 /* remove VID from filter table */
2737 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2738 index = (vid >> 5) & 0x7F;
2739 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2740 vfta &= ~(1 << (vid & 0x1F));
2741 hw->mac.ops.write_vfta(hw, index, vfta);
2742 }
2743
2744 clear_bit(vid, adapter->active_vlans);
2745
2746 return 0;
2747}
2748
2749/**
2750 * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2751 * @adapter: board private structure to initialize
2752 **/
2753static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2754{
2755 struct net_device *netdev = adapter->netdev;
2756 struct e1000_hw *hw = &adapter->hw;
2757 u32 rctl;
2758
2759 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2760 /* disable VLAN receive filtering */
2761 rctl = er32(RCTL);
2762 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2763 ew32(RCTL, rctl);
2764
2765 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2766 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2767 adapter->mng_vlan_id);
2768 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2769 }
2770 }
2771}
2772
2773/**
2774 * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2775 * @adapter: board private structure to initialize
2776 **/
2777static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2778{
2779 struct e1000_hw *hw = &adapter->hw;
2780 u32 rctl;
2781
2782 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2783 /* enable VLAN receive filtering */
2784 rctl = er32(RCTL);
2785 rctl |= E1000_RCTL_VFE;
2786 rctl &= ~E1000_RCTL_CFIEN;
2787 ew32(RCTL, rctl);
2788 }
2789}
2790
2791/**
2792 * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2793 * @adapter: board private structure to initialize
2794 **/
2795static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2796{
2797 struct e1000_hw *hw = &adapter->hw;
2798 u32 ctrl;
2799
2800 /* disable VLAN tag insert/strip */
2801 ctrl = er32(CTRL);
2802 ctrl &= ~E1000_CTRL_VME;
2803 ew32(CTRL, ctrl);
2804}
2805
2806/**
2807 * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2808 * @adapter: board private structure to initialize
2809 **/
2810static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2811{
2812 struct e1000_hw *hw = &adapter->hw;
2813 u32 ctrl;
2814
2815 /* enable VLAN tag insert/strip */
2816 ctrl = er32(CTRL);
2817 ctrl |= E1000_CTRL_VME;
2818 ew32(CTRL, ctrl);
2819}
2820
2821static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2822{
2823 struct net_device *netdev = adapter->netdev;
2824 u16 vid = adapter->hw.mng_cookie.vlan_id;
2825 u16 old_vid = adapter->mng_vlan_id;
2826
2827 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2828 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2829 adapter->mng_vlan_id = vid;
2830 }
2831
2832 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2833 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2834}
2835
2836static void e1000_restore_vlan(struct e1000_adapter *adapter)
2837{
2838 u16 vid;
2839
2840 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2841
2842 for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2843 e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2844}
2845
2846static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2847{
2848 struct e1000_hw *hw = &adapter->hw;
2849 u32 manc, manc2h, mdef, i, j;
2850
2851 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2852 return;
2853
2854 manc = er32(MANC);
2855
2856 /* enable receiving management packets to the host. this will probably
2857 * generate destination unreachable messages from the host OS, but
2858 * the packets will be handled on SMBUS
2859 */
2860 manc |= E1000_MANC_EN_MNG2HOST;
2861 manc2h = er32(MANC2H);
2862
2863 switch (hw->mac.type) {
2864 default:
2865 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2866 break;
2867 case e1000_82574:
2868 case e1000_82583:
2869 /* Check if IPMI pass-through decision filter already exists;
2870 * if so, enable it.
2871 */
2872 for (i = 0, j = 0; i < 8; i++) {
2873 mdef = er32(MDEF(i));
2874
2875 /* Ignore filters with anything other than IPMI ports */
2876 if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2877 continue;
2878
2879 /* Enable this decision filter in MANC2H */
2880 if (mdef)
2881 manc2h |= (1 << i);
2882
2883 j |= mdef;
2884 }
2885
2886 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2887 break;
2888
2889 /* Create new decision filter in an empty filter */
2890 for (i = 0, j = 0; i < 8; i++)
2891 if (er32(MDEF(i)) == 0) {
2892 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2893 E1000_MDEF_PORT_664));
2894 manc2h |= (1 << 1);
2895 j++;
2896 break;
2897 }
2898
2899 if (!j)
2900 e_warn("Unable to create IPMI pass-through filter\n");
2901 break;
2902 }
2903
2904 ew32(MANC2H, manc2h);
2905 ew32(MANC, manc);
2906}
2907
2908/**
2909 * e1000_configure_tx - Configure Transmit Unit after Reset
2910 * @adapter: board private structure
2911 *
2912 * Configure the Tx unit of the MAC after a reset.
2913 **/
2914static void e1000_configure_tx(struct e1000_adapter *adapter)
2915{
2916 struct e1000_hw *hw = &adapter->hw;
2917 struct e1000_ring *tx_ring = adapter->tx_ring;
2918 u64 tdba;
2919 u32 tdlen, tctl, tarc;
2920
2921 /* Setup the HW Tx Head and Tail descriptor pointers */
2922 tdba = tx_ring->dma;
2923 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2924 ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2925 ew32(TDBAH(0), (tdba >> 32));
2926 ew32(TDLEN(0), tdlen);
2927 ew32(TDH(0), 0);
2928 ew32(TDT(0), 0);
2929 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2930 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2931
2932 writel(0, tx_ring->head);
2933 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2934 e1000e_update_tdt_wa(tx_ring, 0);
2935 else
2936 writel(0, tx_ring->tail);
2937
2938 /* Set the Tx Interrupt Delay register */
2939 ew32(TIDV, adapter->tx_int_delay);
2940 /* Tx irq moderation */
2941 ew32(TADV, adapter->tx_abs_int_delay);
2942
2943 if (adapter->flags2 & FLAG2_DMA_BURST) {
2944 u32 txdctl = er32(TXDCTL(0));
2945
2946 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2947 E1000_TXDCTL_WTHRESH);
2948 /* set up some performance related parameters to encourage the
2949 * hardware to use the bus more efficiently in bursts, depends
2950 * on the tx_int_delay to be enabled,
2951 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2952 * hthresh = 1 ==> prefetch when one or more available
2953 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2954 * BEWARE: this seems to work but should be considered first if
2955 * there are Tx hangs or other Tx related bugs
2956 */
2957 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2958 ew32(TXDCTL(0), txdctl);
2959 }
2960 /* erratum work around: set txdctl the same for both queues */
2961 ew32(TXDCTL(1), er32(TXDCTL(0)));
2962
2963 /* Program the Transmit Control Register */
2964 tctl = er32(TCTL);
2965 tctl &= ~E1000_TCTL_CT;
2966 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2967 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2968
2969 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2970 tarc = er32(TARC(0));
2971 /* set the speed mode bit, we'll clear it if we're not at
2972 * gigabit link later
2973 */
2974#define SPEED_MODE_BIT (1 << 21)
2975 tarc |= SPEED_MODE_BIT;
2976 ew32(TARC(0), tarc);
2977 }
2978
2979 /* errata: program both queues to unweighted RR */
2980 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2981 tarc = er32(TARC(0));
2982 tarc |= 1;
2983 ew32(TARC(0), tarc);
2984 tarc = er32(TARC(1));
2985 tarc |= 1;
2986 ew32(TARC(1), tarc);
2987 }
2988
2989 /* Setup Transmit Descriptor Settings for eop descriptor */
2990 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2991
2992 /* only set IDE if we are delaying interrupts using the timers */
2993 if (adapter->tx_int_delay)
2994 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2995
2996 /* enable Report Status bit */
2997 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2998
2999 ew32(TCTL, tctl);
3000
3001 hw->mac.ops.config_collision_dist(hw);
3002
3003 /* SPT Si errata workaround to avoid data corruption */
3004 if (hw->mac.type == e1000_pch_spt) {
3005 u32 reg_val;
3006
3007 reg_val = er32(IOSFPC);
3008 reg_val |= E1000_RCTL_RDMTS_HEX;
3009 ew32(IOSFPC, reg_val);
3010
3011 reg_val = er32(TARC(0));
3012 reg_val |= E1000_TARC0_CB_MULTIQ_3_REQ;
3013 ew32(TARC(0), reg_val);
3014 }
3015}
3016
3017/**
3018 * e1000_setup_rctl - configure the receive control registers
3019 * @adapter: Board private structure
3020 **/
3021#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3022 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3023static void e1000_setup_rctl(struct e1000_adapter *adapter)
3024{
3025 struct e1000_hw *hw = &adapter->hw;
3026 u32 rctl, rfctl;
3027 u32 pages = 0;
3028
3029 /* Workaround Si errata on PCHx - configure jumbo frame flow.
3030 * If jumbo frames not set, program related MAC/PHY registers
3031 * to h/w defaults
3032 */
3033 if (hw->mac.type >= e1000_pch2lan) {
3034 s32 ret_val;
3035
3036 if (adapter->netdev->mtu > ETH_DATA_LEN)
3037 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3038 else
3039 ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3040
3041 if (ret_val)
3042 e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3043 }
3044
3045 /* Program MC offset vector base */
3046 rctl = er32(RCTL);
3047 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3048 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3049 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3050 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3051
3052 /* Do not Store bad packets */
3053 rctl &= ~E1000_RCTL_SBP;
3054
3055 /* Enable Long Packet receive */
3056 if (adapter->netdev->mtu <= ETH_DATA_LEN)
3057 rctl &= ~E1000_RCTL_LPE;
3058 else
3059 rctl |= E1000_RCTL_LPE;
3060
3061 /* Some systems expect that the CRC is included in SMBUS traffic. The
3062 * hardware strips the CRC before sending to both SMBUS (BMC) and to
3063 * host memory when this is enabled
3064 */
3065 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3066 rctl |= E1000_RCTL_SECRC;
3067
3068 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3069 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3070 u16 phy_data;
3071
3072 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3073 phy_data &= 0xfff8;
3074 phy_data |= (1 << 2);
3075 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3076
3077 e1e_rphy(hw, 22, &phy_data);
3078 phy_data &= 0x0fff;
3079 phy_data |= (1 << 14);
3080 e1e_wphy(hw, 0x10, 0x2823);
3081 e1e_wphy(hw, 0x11, 0x0003);
3082 e1e_wphy(hw, 22, phy_data);
3083 }
3084
3085 /* Setup buffer sizes */
3086 rctl &= ~E1000_RCTL_SZ_4096;
3087 rctl |= E1000_RCTL_BSEX;
3088 switch (adapter->rx_buffer_len) {
3089 case 2048:
3090 default:
3091 rctl |= E1000_RCTL_SZ_2048;
3092 rctl &= ~E1000_RCTL_BSEX;
3093 break;
3094 case 4096:
3095 rctl |= E1000_RCTL_SZ_4096;
3096 break;
3097 case 8192:
3098 rctl |= E1000_RCTL_SZ_8192;
3099 break;
3100 case 16384:
3101 rctl |= E1000_RCTL_SZ_16384;
3102 break;
3103 }
3104
3105 /* Enable Extended Status in all Receive Descriptors */
3106 rfctl = er32(RFCTL);
3107 rfctl |= E1000_RFCTL_EXTEN;
3108 ew32(RFCTL, rfctl);
3109
3110 /* 82571 and greater support packet-split where the protocol
3111 * header is placed in skb->data and the packet data is
3112 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3113 * In the case of a non-split, skb->data is linearly filled,
3114 * followed by the page buffers. Therefore, skb->data is
3115 * sized to hold the largest protocol header.
3116 *
3117 * allocations using alloc_page take too long for regular MTU
3118 * so only enable packet split for jumbo frames
3119 *
3120 * Using pages when the page size is greater than 16k wastes
3121 * a lot of memory, since we allocate 3 pages at all times
3122 * per packet.
3123 */
3124 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3125 if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3126 adapter->rx_ps_pages = pages;
3127 else
3128 adapter->rx_ps_pages = 0;
3129
3130 if (adapter->rx_ps_pages) {
3131 u32 psrctl = 0;
3132
3133 /* Enable Packet split descriptors */
3134 rctl |= E1000_RCTL_DTYP_PS;
3135
3136 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3137
3138 switch (adapter->rx_ps_pages) {
3139 case 3:
3140 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3141 /* fall-through */
3142 case 2:
3143 psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3144 /* fall-through */
3145 case 1:
3146 psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3147 break;
3148 }
3149
3150 ew32(PSRCTL, psrctl);
3151 }
3152
3153 /* This is useful for sniffing bad packets. */
3154 if (adapter->netdev->features & NETIF_F_RXALL) {
3155 /* UPE and MPE will be handled by normal PROMISC logic
3156 * in e1000e_set_rx_mode
3157 */
3158 rctl |= (E1000_RCTL_SBP | /* Receive bad packets */
3159 E1000_RCTL_BAM | /* RX All Bcast Pkts */
3160 E1000_RCTL_PMCF); /* RX All MAC Ctrl Pkts */
3161
3162 rctl &= ~(E1000_RCTL_VFE | /* Disable VLAN filter */
3163 E1000_RCTL_DPF | /* Allow filtered pause */
3164 E1000_RCTL_CFIEN); /* Dis VLAN CFIEN Filter */
3165 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3166 * and that breaks VLANs.
3167 */
3168 }
3169
3170 ew32(RCTL, rctl);
3171 /* just started the receive unit, no need to restart */
3172 adapter->flags &= ~FLAG_RESTART_NOW;
3173}
3174
3175/**
3176 * e1000_configure_rx - Configure Receive Unit after Reset
3177 * @adapter: board private structure
3178 *
3179 * Configure the Rx unit of the MAC after a reset.
3180 **/
3181static void e1000_configure_rx(struct e1000_adapter *adapter)
3182{
3183 struct e1000_hw *hw = &adapter->hw;
3184 struct e1000_ring *rx_ring = adapter->rx_ring;
3185 u64 rdba;
3186 u32 rdlen, rctl, rxcsum, ctrl_ext;
3187
3188 if (adapter->rx_ps_pages) {
3189 /* this is a 32 byte descriptor */
3190 rdlen = rx_ring->count *
3191 sizeof(union e1000_rx_desc_packet_split);
3192 adapter->clean_rx = e1000_clean_rx_irq_ps;
3193 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3194 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3195 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3196 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3197 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3198 } else {
3199 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3200 adapter->clean_rx = e1000_clean_rx_irq;
3201 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3202 }
3203
3204 /* disable receives while setting up the descriptors */
3205 rctl = er32(RCTL);
3206 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3207 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3208 e1e_flush();
3209 usleep_range(10000, 20000);
3210
3211 if (adapter->flags2 & FLAG2_DMA_BURST) {
3212 /* set the writeback threshold (only takes effect if the RDTR
3213 * is set). set GRAN=1 and write back up to 0x4 worth, and
3214 * enable prefetching of 0x20 Rx descriptors
3215 * granularity = 01
3216 * wthresh = 04,
3217 * hthresh = 04,
3218 * pthresh = 0x20
3219 */
3220 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3221 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3222
3223 /* override the delay timers for enabling bursting, only if
3224 * the value was not set by the user via module options
3225 */
3226 if (adapter->rx_int_delay == DEFAULT_RDTR)
3227 adapter->rx_int_delay = BURST_RDTR;
3228 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3229 adapter->rx_abs_int_delay = BURST_RADV;
3230 }
3231
3232 /* set the Receive Delay Timer Register */
3233 ew32(RDTR, adapter->rx_int_delay);
3234
3235 /* irq moderation */
3236 ew32(RADV, adapter->rx_abs_int_delay);
3237 if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3238 e1000e_write_itr(adapter, adapter->itr);
3239
3240 ctrl_ext = er32(CTRL_EXT);
3241 /* Auto-Mask interrupts upon ICR access */
3242 ctrl_ext |= E1000_CTRL_EXT_IAME;
3243 ew32(IAM, 0xffffffff);
3244 ew32(CTRL_EXT, ctrl_ext);
3245 e1e_flush();
3246
3247 /* Setup the HW Rx Head and Tail Descriptor Pointers and
3248 * the Base and Length of the Rx Descriptor Ring
3249 */
3250 rdba = rx_ring->dma;
3251 ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3252 ew32(RDBAH(0), (rdba >> 32));
3253 ew32(RDLEN(0), rdlen);
3254 ew32(RDH(0), 0);
3255 ew32(RDT(0), 0);
3256 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3257 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3258
3259 writel(0, rx_ring->head);
3260 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3261 e1000e_update_rdt_wa(rx_ring, 0);
3262 else
3263 writel(0, rx_ring->tail);
3264
3265 /* Enable Receive Checksum Offload for TCP and UDP */
3266 rxcsum = er32(RXCSUM);
3267 if (adapter->netdev->features & NETIF_F_RXCSUM)
3268 rxcsum |= E1000_RXCSUM_TUOFL;
3269 else
3270 rxcsum &= ~E1000_RXCSUM_TUOFL;
3271 ew32(RXCSUM, rxcsum);
3272
3273 /* With jumbo frames, excessive C-state transition latencies result
3274 * in dropped transactions.
3275 */
3276 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3277 u32 lat =
3278 ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3279 adapter->max_frame_size) * 8 / 1000;
3280
3281 if (adapter->flags & FLAG_IS_ICH) {
3282 u32 rxdctl = er32(RXDCTL(0));
3283
3284 ew32(RXDCTL(0), rxdctl | 0x3);
3285 }
3286
3287 pm_qos_update_request(&adapter->pm_qos_req, lat);
3288 } else {
3289 pm_qos_update_request(&adapter->pm_qos_req,
3290 PM_QOS_DEFAULT_VALUE);
3291 }
3292
3293 /* Enable Receives */
3294 ew32(RCTL, rctl);
3295}
3296
3297/**
3298 * e1000e_write_mc_addr_list - write multicast addresses to MTA
3299 * @netdev: network interface device structure
3300 *
3301 * Writes multicast address list to the MTA hash table.
3302 * Returns: -ENOMEM on failure
3303 * 0 on no addresses written
3304 * X on writing X addresses to MTA
3305 */
3306static int e1000e_write_mc_addr_list(struct net_device *netdev)
3307{
3308 struct e1000_adapter *adapter = netdev_priv(netdev);
3309 struct e1000_hw *hw = &adapter->hw;
3310 struct netdev_hw_addr *ha;
3311 u8 *mta_list;
3312 int i;
3313
3314 if (netdev_mc_empty(netdev)) {
3315 /* nothing to program, so clear mc list */
3316 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3317 return 0;
3318 }
3319
3320 mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3321 if (!mta_list)
3322 return -ENOMEM;
3323
3324 /* update_mc_addr_list expects a packed array of only addresses. */
3325 i = 0;
3326 netdev_for_each_mc_addr(ha, netdev)
3327 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3328
3329 hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3330 kfree(mta_list);
3331
3332 return netdev_mc_count(netdev);
3333}
3334
3335/**
3336 * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3337 * @netdev: network interface device structure
3338 *
3339 * Writes unicast address list to the RAR table.
3340 * Returns: -ENOMEM on failure/insufficient address space
3341 * 0 on no addresses written
3342 * X on writing X addresses to the RAR table
3343 **/
3344static int e1000e_write_uc_addr_list(struct net_device *netdev)
3345{
3346 struct e1000_adapter *adapter = netdev_priv(netdev);
3347 struct e1000_hw *hw = &adapter->hw;
3348 unsigned int rar_entries;
3349 int count = 0;
3350
3351 rar_entries = hw->mac.ops.rar_get_count(hw);
3352
3353 /* save a rar entry for our hardware address */
3354 rar_entries--;
3355
3356 /* save a rar entry for the LAA workaround */
3357 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3358 rar_entries--;
3359
3360 /* return ENOMEM indicating insufficient memory for addresses */
3361 if (netdev_uc_count(netdev) > rar_entries)
3362 return -ENOMEM;
3363
3364 if (!netdev_uc_empty(netdev) && rar_entries) {
3365 struct netdev_hw_addr *ha;
3366
3367 /* write the addresses in reverse order to avoid write
3368 * combining
3369 */
3370 netdev_for_each_uc_addr(ha, netdev) {
3371 int rval;
3372
3373 if (!rar_entries)
3374 break;
3375 rval = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3376 if (rval < 0)
3377 return -ENOMEM;
3378 count++;
3379 }
3380 }
3381
3382 /* zero out the remaining RAR entries not used above */
3383 for (; rar_entries > 0; rar_entries--) {
3384 ew32(RAH(rar_entries), 0);
3385 ew32(RAL(rar_entries), 0);
3386 }
3387 e1e_flush();
3388
3389 return count;
3390}
3391
3392/**
3393 * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3394 * @netdev: network interface device structure
3395 *
3396 * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3397 * address list or the network interface flags are updated. This routine is
3398 * responsible for configuring the hardware for proper unicast, multicast,
3399 * promiscuous mode, and all-multi behavior.
3400 **/
3401static void e1000e_set_rx_mode(struct net_device *netdev)
3402{
3403 struct e1000_adapter *adapter = netdev_priv(netdev);
3404 struct e1000_hw *hw = &adapter->hw;
3405 u32 rctl;
3406
3407 if (pm_runtime_suspended(netdev->dev.parent))
3408 return;
3409
3410 /* Check for Promiscuous and All Multicast modes */
3411 rctl = er32(RCTL);
3412
3413 /* clear the affected bits */
3414 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3415
3416 if (netdev->flags & IFF_PROMISC) {
3417 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3418 /* Do not hardware filter VLANs in promisc mode */
3419 e1000e_vlan_filter_disable(adapter);
3420 } else {
3421 int count;
3422
3423 if (netdev->flags & IFF_ALLMULTI) {
3424 rctl |= E1000_RCTL_MPE;
3425 } else {
3426 /* Write addresses to the MTA, if the attempt fails
3427 * then we should just turn on promiscuous mode so
3428 * that we can at least receive multicast traffic
3429 */
3430 count = e1000e_write_mc_addr_list(netdev);
3431 if (count < 0)
3432 rctl |= E1000_RCTL_MPE;
3433 }
3434 e1000e_vlan_filter_enable(adapter);
3435 /* Write addresses to available RAR registers, if there is not
3436 * sufficient space to store all the addresses then enable
3437 * unicast promiscuous mode
3438 */
3439 count = e1000e_write_uc_addr_list(netdev);
3440 if (count < 0)
3441 rctl |= E1000_RCTL_UPE;
3442 }
3443
3444 ew32(RCTL, rctl);
3445
3446 if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3447 e1000e_vlan_strip_enable(adapter);
3448 else
3449 e1000e_vlan_strip_disable(adapter);
3450}
3451
3452static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3453{
3454 struct e1000_hw *hw = &adapter->hw;
3455 u32 mrqc, rxcsum;
3456 u32 rss_key[10];
3457 int i;
3458
3459 netdev_rss_key_fill(rss_key, sizeof(rss_key));
3460 for (i = 0; i < 10; i++)
3461 ew32(RSSRK(i), rss_key[i]);
3462
3463 /* Direct all traffic to queue 0 */
3464 for (i = 0; i < 32; i++)
3465 ew32(RETA(i), 0);
3466
3467 /* Disable raw packet checksumming so that RSS hash is placed in
3468 * descriptor on writeback.
3469 */
3470 rxcsum = er32(RXCSUM);
3471 rxcsum |= E1000_RXCSUM_PCSD;
3472
3473 ew32(RXCSUM, rxcsum);
3474
3475 mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3476 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3477 E1000_MRQC_RSS_FIELD_IPV6 |
3478 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3479 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3480
3481 ew32(MRQC, mrqc);
3482}
3483
3484/**
3485 * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3486 * @adapter: board private structure
3487 * @timinca: pointer to returned time increment attributes
3488 *
3489 * Get attributes for incrementing the System Time Register SYSTIML/H at
3490 * the default base frequency, and set the cyclecounter shift value.
3491 **/
3492s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3493{
3494 struct e1000_hw *hw = &adapter->hw;
3495 u32 incvalue, incperiod, shift;
3496
3497 /* Make sure clock is enabled on I217/I218/I219 before checking
3498 * the frequency
3499 */
3500 if (((hw->mac.type == e1000_pch_lpt) ||
3501 (hw->mac.type == e1000_pch_spt)) &&
3502 !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3503 !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3504 u32 fextnvm7 = er32(FEXTNVM7);
3505
3506 if (!(fextnvm7 & (1 << 0))) {
3507 ew32(FEXTNVM7, fextnvm7 | (1 << 0));
3508 e1e_flush();
3509 }
3510 }
3511
3512 switch (hw->mac.type) {
3513 case e1000_pch2lan:
3514 case e1000_pch_lpt:
3515 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3516 /* Stable 96MHz frequency */
3517 incperiod = INCPERIOD_96MHz;
3518 incvalue = INCVALUE_96MHz;
3519 shift = INCVALUE_SHIFT_96MHz;
3520 adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3521 } else {
3522 /* Stable 25MHz frequency */
3523 incperiod = INCPERIOD_25MHz;
3524 incvalue = INCVALUE_25MHz;
3525 shift = INCVALUE_SHIFT_25MHz;
3526 adapter->cc.shift = shift;
3527 }
3528 break;
3529 case e1000_pch_spt:
3530 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3531 /* Stable 24MHz frequency */
3532 incperiod = INCPERIOD_24MHz;
3533 incvalue = INCVALUE_24MHz;
3534 shift = INCVALUE_SHIFT_24MHz;
3535 adapter->cc.shift = shift;
3536 break;
3537 }
3538 return -EINVAL;
3539 case e1000_82574:
3540 case e1000_82583:
3541 /* Stable 25MHz frequency */
3542 incperiod = INCPERIOD_25MHz;
3543 incvalue = INCVALUE_25MHz;
3544 shift = INCVALUE_SHIFT_25MHz;
3545 adapter->cc.shift = shift;
3546 break;
3547 default:
3548 return -EINVAL;
3549 }
3550
3551 *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3552 ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3553
3554 return 0;
3555}
3556
3557/**
3558 * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3559 * @adapter: board private structure
3560 *
3561 * Outgoing time stamping can be enabled and disabled. Play nice and
3562 * disable it when requested, although it shouldn't cause any overhead
3563 * when no packet needs it. At most one packet in the queue may be
3564 * marked for time stamping, otherwise it would be impossible to tell
3565 * for sure to which packet the hardware time stamp belongs.
3566 *
3567 * Incoming time stamping has to be configured via the hardware filters.
3568 * Not all combinations are supported, in particular event type has to be
3569 * specified. Matching the kind of event packet is not supported, with the
3570 * exception of "all V2 events regardless of level 2 or 4".
3571 **/
3572static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3573 struct hwtstamp_config *config)
3574{
3575 struct e1000_hw *hw = &adapter->hw;
3576 u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3577 u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3578 u32 rxmtrl = 0;
3579 u16 rxudp = 0;
3580 bool is_l4 = false;
3581 bool is_l2 = false;
3582 u32 regval;
3583 s32 ret_val;
3584
3585 if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3586 return -EINVAL;
3587
3588 /* flags reserved for future extensions - must be zero */
3589 if (config->flags)
3590 return -EINVAL;
3591
3592 switch (config->tx_type) {
3593 case HWTSTAMP_TX_OFF:
3594 tsync_tx_ctl = 0;
3595 break;
3596 case HWTSTAMP_TX_ON:
3597 break;
3598 default:
3599 return -ERANGE;
3600 }
3601
3602 switch (config->rx_filter) {
3603 case HWTSTAMP_FILTER_NONE:
3604 tsync_rx_ctl = 0;
3605 break;
3606 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3607 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3608 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3609 is_l4 = true;
3610 break;
3611 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3612 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3613 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3614 is_l4 = true;
3615 break;
3616 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3617 /* Also time stamps V2 L2 Path Delay Request/Response */
3618 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3619 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3620 is_l2 = true;
3621 break;
3622 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3623 /* Also time stamps V2 L2 Path Delay Request/Response. */
3624 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3625 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3626 is_l2 = true;
3627 break;
3628 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3629 /* Hardware cannot filter just V2 L4 Sync messages;
3630 * fall-through to V2 (both L2 and L4) Sync.
3631 */
3632 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3633 /* Also time stamps V2 Path Delay Request/Response. */
3634 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3635 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3636 is_l2 = true;
3637 is_l4 = true;
3638 break;
3639 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3640 /* Hardware cannot filter just V2 L4 Delay Request messages;
3641 * fall-through to V2 (both L2 and L4) Delay Request.
3642 */
3643 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3644 /* Also time stamps V2 Path Delay Request/Response. */
3645 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3646 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3647 is_l2 = true;
3648 is_l4 = true;
3649 break;
3650 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3651 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3652 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3653 * fall-through to all V2 (both L2 and L4) Events.
3654 */
3655 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3656 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3657 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3658 is_l2 = true;
3659 is_l4 = true;
3660 break;
3661 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3662 /* For V1, the hardware can only filter Sync messages or
3663 * Delay Request messages but not both so fall-through to
3664 * time stamp all packets.
3665 */
3666 case HWTSTAMP_FILTER_ALL:
3667 is_l2 = true;
3668 is_l4 = true;
3669 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3670 config->rx_filter = HWTSTAMP_FILTER_ALL;
3671 break;
3672 default:
3673 return -ERANGE;
3674 }
3675
3676 adapter->hwtstamp_config = *config;
3677
3678 /* enable/disable Tx h/w time stamping */
3679 regval = er32(TSYNCTXCTL);
3680 regval &= ~E1000_TSYNCTXCTL_ENABLED;
3681 regval |= tsync_tx_ctl;
3682 ew32(TSYNCTXCTL, regval);
3683 if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3684 (regval & E1000_TSYNCTXCTL_ENABLED)) {
3685 e_err("Timesync Tx Control register not set as expected\n");
3686 return -EAGAIN;
3687 }
3688
3689 /* enable/disable Rx h/w time stamping */
3690 regval = er32(TSYNCRXCTL);
3691 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3692 regval |= tsync_rx_ctl;
3693 ew32(TSYNCRXCTL, regval);
3694 if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3695 E1000_TSYNCRXCTL_TYPE_MASK)) !=
3696 (regval & (E1000_TSYNCRXCTL_ENABLED |
3697 E1000_TSYNCRXCTL_TYPE_MASK))) {
3698 e_err("Timesync Rx Control register not set as expected\n");
3699 return -EAGAIN;
3700 }
3701
3702 /* L2: define ethertype filter for time stamped packets */
3703 if (is_l2)
3704 rxmtrl |= ETH_P_1588;
3705
3706 /* define which PTP packets get time stamped */
3707 ew32(RXMTRL, rxmtrl);
3708
3709 /* Filter by destination port */
3710 if (is_l4) {
3711 rxudp = PTP_EV_PORT;
3712 cpu_to_be16s(&rxudp);
3713 }
3714 ew32(RXUDP, rxudp);
3715
3716 e1e_flush();
3717
3718 /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3719 er32(RXSTMPH);
3720 er32(TXSTMPH);
3721
3722 /* Get and set the System Time Register SYSTIM base frequency */
3723 ret_val = e1000e_get_base_timinca(adapter, ®val);
3724 if (ret_val)
3725 return ret_val;
3726 ew32(TIMINCA, regval);
3727
3728 /* reset the ns time counter */
3729 timecounter_init(&adapter->tc, &adapter->cc,
3730 ktime_to_ns(ktime_get_real()));
3731
3732 return 0;
3733}
3734
3735/**
3736 * e1000_configure - configure the hardware for Rx and Tx
3737 * @adapter: private board structure
3738 **/
3739static void e1000_configure(struct e1000_adapter *adapter)
3740{
3741 struct e1000_ring *rx_ring = adapter->rx_ring;
3742
3743 e1000e_set_rx_mode(adapter->netdev);
3744
3745 e1000_restore_vlan(adapter);
3746 e1000_init_manageability_pt(adapter);
3747
3748 e1000_configure_tx(adapter);
3749
3750 if (adapter->netdev->features & NETIF_F_RXHASH)
3751 e1000e_setup_rss_hash(adapter);
3752 e1000_setup_rctl(adapter);
3753 e1000_configure_rx(adapter);
3754 adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3755}
3756
3757/**
3758 * e1000e_power_up_phy - restore link in case the phy was powered down
3759 * @adapter: address of board private structure
3760 *
3761 * The phy may be powered down to save power and turn off link when the
3762 * driver is unloaded and wake on lan is not enabled (among others)
3763 * *** this routine MUST be followed by a call to e1000e_reset ***
3764 **/
3765void e1000e_power_up_phy(struct e1000_adapter *adapter)
3766{
3767 if (adapter->hw.phy.ops.power_up)
3768 adapter->hw.phy.ops.power_up(&adapter->hw);
3769
3770 adapter->hw.mac.ops.setup_link(&adapter->hw);
3771}
3772
3773/**
3774 * e1000_power_down_phy - Power down the PHY
3775 *
3776 * Power down the PHY so no link is implied when interface is down.
3777 * The PHY cannot be powered down if management or WoL is active.
3778 */
3779static void e1000_power_down_phy(struct e1000_adapter *adapter)
3780{
3781 if (adapter->hw.phy.ops.power_down)
3782 adapter->hw.phy.ops.power_down(&adapter->hw);
3783}
3784
3785/**
3786 * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3787 *
3788 * We want to clear all pending descriptors from the TX ring.
3789 * zeroing happens when the HW reads the regs. We assign the ring itself as
3790 * the data of the next descriptor. We don't care about the data we are about
3791 * to reset the HW.
3792 */
3793static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3794{
3795 struct e1000_hw *hw = &adapter->hw;
3796 struct e1000_ring *tx_ring = adapter->tx_ring;
3797 struct e1000_tx_desc *tx_desc = NULL;
3798 u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3799 u16 size = 512;
3800
3801 tctl = er32(TCTL);
3802 ew32(TCTL, tctl | E1000_TCTL_EN);
3803 tdt = er32(TDT(0));
3804 BUG_ON(tdt != tx_ring->next_to_use);
3805 tx_desc = E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3806 tx_desc->buffer_addr = tx_ring->dma;
3807
3808 tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3809 tx_desc->upper.data = 0;
3810 /* flush descriptors to memory before notifying the HW */
3811 wmb();
3812 tx_ring->next_to_use++;
3813 if (tx_ring->next_to_use == tx_ring->count)
3814 tx_ring->next_to_use = 0;
3815 ew32(TDT(0), tx_ring->next_to_use);
3816 mmiowb();
3817 usleep_range(200, 250);
3818}
3819
3820/**
3821 * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3822 *
3823 * Mark all descriptors in the RX ring as consumed and disable the rx ring
3824 */
3825static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3826{
3827 u32 rctl, rxdctl;
3828 struct e1000_hw *hw = &adapter->hw;
3829
3830 rctl = er32(RCTL);
3831 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3832 e1e_flush();
3833 usleep_range(100, 150);
3834
3835 rxdctl = er32(RXDCTL(0));
3836 /* zero the lower 14 bits (prefetch and host thresholds) */
3837 rxdctl &= 0xffffc000;
3838
3839 /* update thresholds: prefetch threshold to 31, host threshold to 1
3840 * and make sure the granularity is "descriptors" and not "cache lines"
3841 */
3842 rxdctl |= (0x1F | (1 << 8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3843
3844 ew32(RXDCTL(0), rxdctl);
3845 /* momentarily enable the RX ring for the changes to take effect */
3846 ew32(RCTL, rctl | E1000_RCTL_EN);
3847 e1e_flush();
3848 usleep_range(100, 150);
3849 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3850}
3851
3852/**
3853 * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3854 *
3855 * In i219, the descriptor rings must be emptied before resetting the HW
3856 * or before changing the device state to D3 during runtime (runtime PM).
3857 *
3858 * Failure to do this will cause the HW to enter a unit hang state which can
3859 * only be released by PCI reset on the device
3860 *
3861 */
3862
3863static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3864{
3865 u16 hang_state;
3866 u32 fext_nvm11, tdlen;
3867 struct e1000_hw *hw = &adapter->hw;
3868
3869 /* First, disable MULR fix in FEXTNVM11 */
3870 fext_nvm11 = er32(FEXTNVM11);
3871 fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3872 ew32(FEXTNVM11, fext_nvm11);
3873 /* do nothing if we're not in faulty state, or if the queue is empty */
3874 tdlen = er32(TDLEN(0));
3875 pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3876 &hang_state);
3877 if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3878 return;
3879 e1000_flush_tx_ring(adapter);
3880 /* recheck, maybe the fault is caused by the rx ring */
3881 pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3882 &hang_state);
3883 if (hang_state & FLUSH_DESC_REQUIRED)
3884 e1000_flush_rx_ring(adapter);
3885}
3886
3887/**
3888 * e1000e_reset - bring the hardware into a known good state
3889 *
3890 * This function boots the hardware and enables some settings that
3891 * require a configuration cycle of the hardware - those cannot be
3892 * set/changed during runtime. After reset the device needs to be
3893 * properly configured for Rx, Tx etc.
3894 */
3895void e1000e_reset(struct e1000_adapter *adapter)
3896{
3897 struct e1000_mac_info *mac = &adapter->hw.mac;
3898 struct e1000_fc_info *fc = &adapter->hw.fc;
3899 struct e1000_hw *hw = &adapter->hw;
3900 u32 tx_space, min_tx_space, min_rx_space;
3901 u32 pba = adapter->pba;
3902 u16 hwm;
3903
3904 /* reset Packet Buffer Allocation to default */
3905 ew32(PBA, pba);
3906
3907 if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3908 /* To maintain wire speed transmits, the Tx FIFO should be
3909 * large enough to accommodate two full transmit packets,
3910 * rounded up to the next 1KB and expressed in KB. Likewise,
3911 * the Rx FIFO should be large enough to accommodate at least
3912 * one full receive packet and is similarly rounded up and
3913 * expressed in KB.
3914 */
3915 pba = er32(PBA);
3916 /* upper 16 bits has Tx packet buffer allocation size in KB */
3917 tx_space = pba >> 16;
3918 /* lower 16 bits has Rx packet buffer allocation size in KB */
3919 pba &= 0xffff;
3920 /* the Tx fifo also stores 16 bytes of information about the Tx
3921 * but don't include ethernet FCS because hardware appends it
3922 */
3923 min_tx_space = (adapter->max_frame_size +
3924 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3925 min_tx_space = ALIGN(min_tx_space, 1024);
3926 min_tx_space >>= 10;
3927 /* software strips receive CRC, so leave room for it */
3928 min_rx_space = adapter->max_frame_size;
3929 min_rx_space = ALIGN(min_rx_space, 1024);
3930 min_rx_space >>= 10;
3931
3932 /* If current Tx allocation is less than the min Tx FIFO size,
3933 * and the min Tx FIFO size is less than the current Rx FIFO
3934 * allocation, take space away from current Rx allocation
3935 */
3936 if ((tx_space < min_tx_space) &&
3937 ((min_tx_space - tx_space) < pba)) {
3938 pba -= min_tx_space - tx_space;
3939
3940 /* if short on Rx space, Rx wins and must trump Tx
3941 * adjustment
3942 */
3943 if (pba < min_rx_space)
3944 pba = min_rx_space;
3945 }
3946
3947 ew32(PBA, pba);
3948 }
3949
3950 /* flow control settings
3951 *
3952 * The high water mark must be low enough to fit one full frame
3953 * (or the size used for early receive) above it in the Rx FIFO.
3954 * Set it to the lower of:
3955 * - 90% of the Rx FIFO size, and
3956 * - the full Rx FIFO size minus one full frame
3957 */
3958 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3959 fc->pause_time = 0xFFFF;
3960 else
3961 fc->pause_time = E1000_FC_PAUSE_TIME;
3962 fc->send_xon = true;
3963 fc->current_mode = fc->requested_mode;
3964
3965 switch (hw->mac.type) {
3966 case e1000_ich9lan:
3967 case e1000_ich10lan:
3968 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3969 pba = 14;
3970 ew32(PBA, pba);
3971 fc->high_water = 0x2800;
3972 fc->low_water = fc->high_water - 8;
3973 break;
3974 }
3975 /* fall-through */
3976 default:
3977 hwm = min(((pba << 10) * 9 / 10),
3978 ((pba << 10) - adapter->max_frame_size));
3979
3980 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3981 fc->low_water = fc->high_water - 8;
3982 break;
3983 case e1000_pchlan:
3984 /* Workaround PCH LOM adapter hangs with certain network
3985 * loads. If hangs persist, try disabling Tx flow control.
3986 */
3987 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3988 fc->high_water = 0x3500;
3989 fc->low_water = 0x1500;
3990 } else {
3991 fc->high_water = 0x5000;
3992 fc->low_water = 0x3000;
3993 }
3994 fc->refresh_time = 0x1000;
3995 break;
3996 case e1000_pch2lan:
3997 case e1000_pch_lpt:
3998 case e1000_pch_spt:
3999 fc->refresh_time = 0x0400;
4000
4001 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4002 fc->high_water = 0x05C20;
4003 fc->low_water = 0x05048;
4004 fc->pause_time = 0x0650;
4005 break;
4006 }
4007
4008 pba = 14;
4009 ew32(PBA, pba);
4010 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4011 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4012 break;
4013 }
4014
4015 /* Alignment of Tx data is on an arbitrary byte boundary with the
4016 * maximum size per Tx descriptor limited only to the transmit
4017 * allocation of the packet buffer minus 96 bytes with an upper
4018 * limit of 24KB due to receive synchronization limitations.
4019 */
4020 adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4021 24 << 10);
4022
4023 /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4024 * fit in receive buffer.
4025 */
4026 if (adapter->itr_setting & 0x3) {
4027 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4028 if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4029 dev_info(&adapter->pdev->dev,
4030 "Interrupt Throttle Rate off\n");
4031 adapter->flags2 |= FLAG2_DISABLE_AIM;
4032 e1000e_write_itr(adapter, 0);
4033 }
4034 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4035 dev_info(&adapter->pdev->dev,
4036 "Interrupt Throttle Rate on\n");
4037 adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4038 adapter->itr = 20000;
4039 e1000e_write_itr(adapter, adapter->itr);
4040 }
4041 }
4042
4043 if (hw->mac.type == e1000_pch_spt)
4044 e1000_flush_desc_rings(adapter);
4045 /* Allow time for pending master requests to run */
4046 mac->ops.reset_hw(hw);
4047
4048 /* For parts with AMT enabled, let the firmware know
4049 * that the network interface is in control
4050 */
4051 if (adapter->flags & FLAG_HAS_AMT)
4052 e1000e_get_hw_control(adapter);
4053
4054 ew32(WUC, 0);
4055
4056 if (mac->ops.init_hw(hw))
4057 e_err("Hardware Error\n");
4058
4059 e1000_update_mng_vlan(adapter);
4060
4061 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4062 ew32(VET, ETH_P_8021Q);
4063
4064 e1000e_reset_adaptive(hw);
4065
4066 /* initialize systim and reset the ns time counter */
4067 e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
4068
4069 /* Set EEE advertisement as appropriate */
4070 if (adapter->flags2 & FLAG2_HAS_EEE) {
4071 s32 ret_val;
4072 u16 adv_addr;
4073
4074 switch (hw->phy.type) {
4075 case e1000_phy_82579:
4076 adv_addr = I82579_EEE_ADVERTISEMENT;
4077 break;
4078 case e1000_phy_i217:
4079 adv_addr = I217_EEE_ADVERTISEMENT;
4080 break;
4081 default:
4082 dev_err(&adapter->pdev->dev,
4083 "Invalid PHY type setting EEE advertisement\n");
4084 return;
4085 }
4086
4087 ret_val = hw->phy.ops.acquire(hw);
4088 if (ret_val) {
4089 dev_err(&adapter->pdev->dev,
4090 "EEE advertisement - unable to acquire PHY\n");
4091 return;
4092 }
4093
4094 e1000_write_emi_reg_locked(hw, adv_addr,
4095 hw->dev_spec.ich8lan.eee_disable ?
4096 0 : adapter->eee_advert);
4097
4098 hw->phy.ops.release(hw);
4099 }
4100
4101 if (!netif_running(adapter->netdev) &&
4102 !test_bit(__E1000_TESTING, &adapter->state))
4103 e1000_power_down_phy(adapter);
4104
4105 e1000_get_phy_info(hw);
4106
4107 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4108 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4109 u16 phy_data = 0;
4110 /* speed up time to link by disabling smart power down, ignore
4111 * the return value of this function because there is nothing
4112 * different we would do if it failed
4113 */
4114 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4115 phy_data &= ~IGP02E1000_PM_SPD;
4116 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4117 }
4118 if (hw->mac.type == e1000_pch_spt && adapter->int_mode == 0) {
4119 u32 reg;
4120
4121 /* Fextnvm7 @ 0xe4[2] = 1 */
4122 reg = er32(FEXTNVM7);
4123 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4124 ew32(FEXTNVM7, reg);
4125 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4126 reg = er32(FEXTNVM9);
4127 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4128 E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4129 ew32(FEXTNVM9, reg);
4130 }
4131
4132}
4133
4134/**
4135 * e1000e_trigger_lsc - trigger an LSC interrupt
4136 * @adapter:
4137 *
4138 * Fire a link status change interrupt to start the watchdog.
4139 **/
4140static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4141{
4142 struct e1000_hw *hw = &adapter->hw;
4143
4144 if (adapter->msix_entries)
4145 ew32(ICS, E1000_ICS_OTHER);
4146 else
4147 ew32(ICS, E1000_ICS_LSC);
4148}
4149
4150void e1000e_up(struct e1000_adapter *adapter)
4151{
4152 /* hardware has been reset, we need to reload some things */
4153 e1000_configure(adapter);
4154
4155 clear_bit(__E1000_DOWN, &adapter->state);
4156
4157 if (adapter->msix_entries)
4158 e1000_configure_msix(adapter);
4159 e1000_irq_enable(adapter);
4160
4161 netif_start_queue(adapter->netdev);
4162
4163 e1000e_trigger_lsc(adapter);
4164}
4165
4166static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4167{
4168 struct e1000_hw *hw = &adapter->hw;
4169
4170 if (!(adapter->flags2 & FLAG2_DMA_BURST))
4171 return;
4172
4173 /* flush pending descriptor writebacks to memory */
4174 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4175 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4176
4177 /* execute the writes immediately */
4178 e1e_flush();
4179
4180 /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4181 * write is successful
4182 */
4183 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4184 ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4185
4186 /* execute the writes immediately */
4187 e1e_flush();
4188}
4189
4190static void e1000e_update_stats(struct e1000_adapter *adapter);
4191
4192/**
4193 * e1000e_down - quiesce the device and optionally reset the hardware
4194 * @adapter: board private structure
4195 * @reset: boolean flag to reset the hardware or not
4196 */
4197void e1000e_down(struct e1000_adapter *adapter, bool reset)
4198{
4199 struct net_device *netdev = adapter->netdev;
4200 struct e1000_hw *hw = &adapter->hw;
4201 u32 tctl, rctl;
4202
4203 /* signal that we're down so the interrupt handler does not
4204 * reschedule our watchdog timer
4205 */
4206 set_bit(__E1000_DOWN, &adapter->state);
4207
4208 netif_carrier_off(netdev);
4209
4210 /* disable receives in the hardware */
4211 rctl = er32(RCTL);
4212 if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4213 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4214 /* flush and sleep below */
4215
4216 netif_stop_queue(netdev);
4217
4218 /* disable transmits in the hardware */
4219 tctl = er32(TCTL);
4220 tctl &= ~E1000_TCTL_EN;
4221 ew32(TCTL, tctl);
4222
4223 /* flush both disables and wait for them to finish */
4224 e1e_flush();
4225 usleep_range(10000, 20000);
4226
4227 e1000_irq_disable(adapter);
4228
4229 napi_synchronize(&adapter->napi);
4230
4231 del_timer_sync(&adapter->watchdog_timer);
4232 del_timer_sync(&adapter->phy_info_timer);
4233
4234 spin_lock(&adapter->stats64_lock);
4235 e1000e_update_stats(adapter);
4236 spin_unlock(&adapter->stats64_lock);
4237
4238 e1000e_flush_descriptors(adapter);
4239
4240 adapter->link_speed = 0;
4241 adapter->link_duplex = 0;
4242
4243 /* Disable Si errata workaround on PCHx for jumbo frame flow */
4244 if ((hw->mac.type >= e1000_pch2lan) &&
4245 (adapter->netdev->mtu > ETH_DATA_LEN) &&
4246 e1000_lv_jumbo_workaround_ich8lan(hw, false))
4247 e_dbg("failed to disable jumbo frame workaround mode\n");
4248
4249 if (!pci_channel_offline(adapter->pdev)) {
4250 if (reset)
4251 e1000e_reset(adapter);
4252 else if (hw->mac.type == e1000_pch_spt)
4253 e1000_flush_desc_rings(adapter);
4254 }
4255 e1000_clean_tx_ring(adapter->tx_ring);
4256 e1000_clean_rx_ring(adapter->rx_ring);
4257}
4258
4259void e1000e_reinit_locked(struct e1000_adapter *adapter)
4260{
4261 might_sleep();
4262 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4263 usleep_range(1000, 2000);
4264 e1000e_down(adapter, true);
4265 e1000e_up(adapter);
4266 clear_bit(__E1000_RESETTING, &adapter->state);
4267}
4268
4269/**
4270 * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4271 * @cc: cyclecounter structure
4272 **/
4273static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
4274{
4275 struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4276 cc);
4277 struct e1000_hw *hw = &adapter->hw;
4278 u32 systimel_1, systimel_2, systimeh;
4279 cycle_t systim, systim_next;
4280 /* SYSTIMH latching upon SYSTIML read does not work well.
4281 * This means that if SYSTIML overflows after we read it but before
4282 * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4283 * will experience a huge non linear increment in the systime value
4284 * to fix that we test for overflow and if true, we re-read systime.
4285 */
4286 systimel_1 = er32(SYSTIML);
4287 systimeh = er32(SYSTIMH);
4288 systimel_2 = er32(SYSTIML);
4289 /* Check for overflow. If there was no overflow, use the values */
4290 if (systimel_1 < systimel_2) {
4291 systim = (cycle_t)systimel_1;
4292 systim |= (cycle_t)systimeh << 32;
4293 } else {
4294 /* There was an overflow, read again SYSTIMH, and use
4295 * systimel_2
4296 */
4297 systimeh = er32(SYSTIMH);
4298 systim = (cycle_t)systimel_2;
4299 systim |= (cycle_t)systimeh << 32;
4300 }
4301
4302 if ((hw->mac.type == e1000_82574) || (hw->mac.type == e1000_82583)) {
4303 u64 incvalue, time_delta, rem, temp;
4304 int i;
4305
4306 /* errata for 82574/82583 possible bad bits read from SYSTIMH/L
4307 * check to see that the time is incrementing at a reasonable
4308 * rate and is a multiple of incvalue
4309 */
4310 incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4311 for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4312 /* latch SYSTIMH on read of SYSTIML */
4313 systim_next = (cycle_t)er32(SYSTIML);
4314 systim_next |= (cycle_t)er32(SYSTIMH) << 32;
4315
4316 time_delta = systim_next - systim;
4317 temp = time_delta;
4318 rem = do_div(temp, incvalue);
4319
4320 systim = systim_next;
4321
4322 if ((time_delta < E1000_82574_SYSTIM_EPSILON) &&
4323 (rem == 0))
4324 break;
4325 }
4326 }
4327 return systim;
4328}
4329
4330/**
4331 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4332 * @adapter: board private structure to initialize
4333 *
4334 * e1000_sw_init initializes the Adapter private data structure.
4335 * Fields are initialized based on PCI device information and
4336 * OS network device settings (MTU size).
4337 **/
4338static int e1000_sw_init(struct e1000_adapter *adapter)
4339{
4340 struct net_device *netdev = adapter->netdev;
4341
4342 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4343 adapter->rx_ps_bsize0 = 128;
4344 adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4345 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4346 adapter->tx_ring_count = E1000_DEFAULT_TXD;
4347 adapter->rx_ring_count = E1000_DEFAULT_RXD;
4348
4349 spin_lock_init(&adapter->stats64_lock);
4350
4351 e1000e_set_interrupt_capability(adapter);
4352
4353 if (e1000_alloc_queues(adapter))
4354 return -ENOMEM;
4355
4356 /* Setup hardware time stamping cyclecounter */
4357 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4358 adapter->cc.read = e1000e_cyclecounter_read;
4359 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4360 adapter->cc.mult = 1;
4361 /* cc.shift set in e1000e_get_base_tininca() */
4362
4363 spin_lock_init(&adapter->systim_lock);
4364 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4365 }
4366
4367 /* Explicitly disable IRQ since the NIC can be in any state. */
4368 e1000_irq_disable(adapter);
4369
4370 set_bit(__E1000_DOWN, &adapter->state);
4371 return 0;
4372}
4373
4374/**
4375 * e1000_intr_msi_test - Interrupt Handler
4376 * @irq: interrupt number
4377 * @data: pointer to a network interface device structure
4378 **/
4379static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4380{
4381 struct net_device *netdev = data;
4382 struct e1000_adapter *adapter = netdev_priv(netdev);
4383 struct e1000_hw *hw = &adapter->hw;
4384 u32 icr = er32(ICR);
4385
4386 e_dbg("icr is %08X\n", icr);
4387 if (icr & E1000_ICR_RXSEQ) {
4388 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4389 /* Force memory writes to complete before acknowledging the
4390 * interrupt is handled.
4391 */
4392 wmb();
4393 }
4394
4395 return IRQ_HANDLED;
4396}
4397
4398/**
4399 * e1000_test_msi_interrupt - Returns 0 for successful test
4400 * @adapter: board private struct
4401 *
4402 * code flow taken from tg3.c
4403 **/
4404static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4405{
4406 struct net_device *netdev = adapter->netdev;
4407 struct e1000_hw *hw = &adapter->hw;
4408 int err;
4409
4410 /* poll_enable hasn't been called yet, so don't need disable */
4411 /* clear any pending events */
4412 er32(ICR);
4413
4414 /* free the real vector and request a test handler */
4415 e1000_free_irq(adapter);
4416 e1000e_reset_interrupt_capability(adapter);
4417
4418 /* Assume that the test fails, if it succeeds then the test
4419 * MSI irq handler will unset this flag
4420 */
4421 adapter->flags |= FLAG_MSI_TEST_FAILED;
4422
4423 err = pci_enable_msi(adapter->pdev);
4424 if (err)
4425 goto msi_test_failed;
4426
4427 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4428 netdev->name, netdev);
4429 if (err) {
4430 pci_disable_msi(adapter->pdev);
4431 goto msi_test_failed;
4432 }
4433
4434 /* Force memory writes to complete before enabling and firing an
4435 * interrupt.
4436 */
4437 wmb();
4438
4439 e1000_irq_enable(adapter);
4440
4441 /* fire an unusual interrupt on the test handler */
4442 ew32(ICS, E1000_ICS_RXSEQ);
4443 e1e_flush();
4444 msleep(100);
4445
4446 e1000_irq_disable(adapter);
4447
4448 rmb(); /* read flags after interrupt has been fired */
4449
4450 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4451 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4452 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4453 } else {
4454 e_dbg("MSI interrupt test succeeded!\n");
4455 }
4456
4457 free_irq(adapter->pdev->irq, netdev);
4458 pci_disable_msi(adapter->pdev);
4459
4460msi_test_failed:
4461 e1000e_set_interrupt_capability(adapter);
4462 return e1000_request_irq(adapter);
4463}
4464
4465/**
4466 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4467 * @adapter: board private struct
4468 *
4469 * code flow taken from tg3.c, called with e1000 interrupts disabled.
4470 **/
4471static int e1000_test_msi(struct e1000_adapter *adapter)
4472{
4473 int err;
4474 u16 pci_cmd;
4475
4476 if (!(adapter->flags & FLAG_MSI_ENABLED))
4477 return 0;
4478
4479 /* disable SERR in case the MSI write causes a master abort */
4480 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4481 if (pci_cmd & PCI_COMMAND_SERR)
4482 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4483 pci_cmd & ~PCI_COMMAND_SERR);
4484
4485 err = e1000_test_msi_interrupt(adapter);
4486
4487 /* re-enable SERR */
4488 if (pci_cmd & PCI_COMMAND_SERR) {
4489 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4490 pci_cmd |= PCI_COMMAND_SERR;
4491 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4492 }
4493
4494 return err;
4495}
4496
4497/**
4498 * e1000_open - Called when a network interface is made active
4499 * @netdev: network interface device structure
4500 *
4501 * Returns 0 on success, negative value on failure
4502 *
4503 * The open entry point is called when a network interface is made
4504 * active by the system (IFF_UP). At this point all resources needed
4505 * for transmit and receive operations are allocated, the interrupt
4506 * handler is registered with the OS, the watchdog timer is started,
4507 * and the stack is notified that the interface is ready.
4508 **/
4509static int e1000_open(struct net_device *netdev)
4510{
4511 struct e1000_adapter *adapter = netdev_priv(netdev);
4512 struct e1000_hw *hw = &adapter->hw;
4513 struct pci_dev *pdev = adapter->pdev;
4514 int err;
4515
4516 /* disallow open during test */
4517 if (test_bit(__E1000_TESTING, &adapter->state))
4518 return -EBUSY;
4519
4520 pm_runtime_get_sync(&pdev->dev);
4521
4522 netif_carrier_off(netdev);
4523
4524 /* allocate transmit descriptors */
4525 err = e1000e_setup_tx_resources(adapter->tx_ring);
4526 if (err)
4527 goto err_setup_tx;
4528
4529 /* allocate receive descriptors */
4530 err = e1000e_setup_rx_resources(adapter->rx_ring);
4531 if (err)
4532 goto err_setup_rx;
4533
4534 /* If AMT is enabled, let the firmware know that the network
4535 * interface is now open and reset the part to a known state.
4536 */
4537 if (adapter->flags & FLAG_HAS_AMT) {
4538 e1000e_get_hw_control(adapter);
4539 e1000e_reset(adapter);
4540 }
4541
4542 e1000e_power_up_phy(adapter);
4543
4544 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4545 if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4546 e1000_update_mng_vlan(adapter);
4547
4548 /* DMA latency requirement to workaround jumbo issue */
4549 pm_qos_add_request(&adapter->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4550 PM_QOS_DEFAULT_VALUE);
4551
4552 /* before we allocate an interrupt, we must be ready to handle it.
4553 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4554 * as soon as we call pci_request_irq, so we have to setup our
4555 * clean_rx handler before we do so.
4556 */
4557 e1000_configure(adapter);
4558
4559 err = e1000_request_irq(adapter);
4560 if (err)
4561 goto err_req_irq;
4562
4563 /* Work around PCIe errata with MSI interrupts causing some chipsets to
4564 * ignore e1000e MSI messages, which means we need to test our MSI
4565 * interrupt now
4566 */
4567 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4568 err = e1000_test_msi(adapter);
4569 if (err) {
4570 e_err("Interrupt allocation failed\n");
4571 goto err_req_irq;
4572 }
4573 }
4574
4575 /* From here on the code is the same as e1000e_up() */
4576 clear_bit(__E1000_DOWN, &adapter->state);
4577
4578 napi_enable(&adapter->napi);
4579
4580 e1000_irq_enable(adapter);
4581
4582 adapter->tx_hang_recheck = false;
4583 netif_start_queue(netdev);
4584
4585 hw->mac.get_link_status = true;
4586 pm_runtime_put(&pdev->dev);
4587
4588 e1000e_trigger_lsc(adapter);
4589
4590 return 0;
4591
4592err_req_irq:
4593 pm_qos_remove_request(&adapter->pm_qos_req);
4594 e1000e_release_hw_control(adapter);
4595 e1000_power_down_phy(adapter);
4596 e1000e_free_rx_resources(adapter->rx_ring);
4597err_setup_rx:
4598 e1000e_free_tx_resources(adapter->tx_ring);
4599err_setup_tx:
4600 e1000e_reset(adapter);
4601 pm_runtime_put_sync(&pdev->dev);
4602
4603 return err;
4604}
4605
4606/**
4607 * e1000_close - Disables a network interface
4608 * @netdev: network interface device structure
4609 *
4610 * Returns 0, this is not allowed to fail
4611 *
4612 * The close entry point is called when an interface is de-activated
4613 * by the OS. The hardware is still under the drivers control, but
4614 * needs to be disabled. A global MAC reset is issued to stop the
4615 * hardware, and all transmit and receive resources are freed.
4616 **/
4617static int e1000_close(struct net_device *netdev)
4618{
4619 struct e1000_adapter *adapter = netdev_priv(netdev);
4620 struct pci_dev *pdev = adapter->pdev;
4621 int count = E1000_CHECK_RESET_COUNT;
4622
4623 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4624 usleep_range(10000, 20000);
4625
4626 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4627
4628 pm_runtime_get_sync(&pdev->dev);
4629
4630 if (!test_bit(__E1000_DOWN, &adapter->state)) {
4631 e1000e_down(adapter, true);
4632 e1000_free_irq(adapter);
4633
4634 /* Link status message must follow this format */
4635 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4636 }
4637
4638 napi_disable(&adapter->napi);
4639
4640 e1000e_free_tx_resources(adapter->tx_ring);
4641 e1000e_free_rx_resources(adapter->rx_ring);
4642
4643 /* kill manageability vlan ID if supported, but not if a vlan with
4644 * the same ID is registered on the host OS (let 8021q kill it)
4645 */
4646 if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4647 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4648 adapter->mng_vlan_id);
4649
4650 /* If AMT is enabled, let the firmware know that the network
4651 * interface is now closed
4652 */
4653 if ((adapter->flags & FLAG_HAS_AMT) &&
4654 !test_bit(__E1000_TESTING, &adapter->state))
4655 e1000e_release_hw_control(adapter);
4656
4657 pm_qos_remove_request(&adapter->pm_qos_req);
4658
4659 pm_runtime_put_sync(&pdev->dev);
4660
4661 return 0;
4662}
4663
4664/**
4665 * e1000_set_mac - Change the Ethernet Address of the NIC
4666 * @netdev: network interface device structure
4667 * @p: pointer to an address structure
4668 *
4669 * Returns 0 on success, negative on failure
4670 **/
4671static int e1000_set_mac(struct net_device *netdev, void *p)
4672{
4673 struct e1000_adapter *adapter = netdev_priv(netdev);
4674 struct e1000_hw *hw = &adapter->hw;
4675 struct sockaddr *addr = p;
4676
4677 if (!is_valid_ether_addr(addr->sa_data))
4678 return -EADDRNOTAVAIL;
4679
4680 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4681 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4682
4683 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4684
4685 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4686 /* activate the work around */
4687 e1000e_set_laa_state_82571(&adapter->hw, 1);
4688
4689 /* Hold a copy of the LAA in RAR[14] This is done so that
4690 * between the time RAR[0] gets clobbered and the time it
4691 * gets fixed (in e1000_watchdog), the actual LAA is in one
4692 * of the RARs and no incoming packets directed to this port
4693 * are dropped. Eventually the LAA will be in RAR[0] and
4694 * RAR[14]
4695 */
4696 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4697 adapter->hw.mac.rar_entry_count - 1);
4698 }
4699
4700 return 0;
4701}
4702
4703/**
4704 * e1000e_update_phy_task - work thread to update phy
4705 * @work: pointer to our work struct
4706 *
4707 * this worker thread exists because we must acquire a
4708 * semaphore to read the phy, which we could msleep while
4709 * waiting for it, and we can't msleep in a timer.
4710 **/
4711static void e1000e_update_phy_task(struct work_struct *work)
4712{
4713 struct e1000_adapter *adapter = container_of(work,
4714 struct e1000_adapter,
4715 update_phy_task);
4716 struct e1000_hw *hw = &adapter->hw;
4717
4718 if (test_bit(__E1000_DOWN, &adapter->state))
4719 return;
4720
4721 e1000_get_phy_info(hw);
4722
4723 /* Enable EEE on 82579 after link up */
4724 if (hw->phy.type >= e1000_phy_82579)
4725 e1000_set_eee_pchlan(hw);
4726}
4727
4728/**
4729 * e1000_update_phy_info - timre call-back to update PHY info
4730 * @data: pointer to adapter cast into an unsigned long
4731 *
4732 * Need to wait a few seconds after link up to get diagnostic information from
4733 * the phy
4734 **/
4735static void e1000_update_phy_info(unsigned long data)
4736{
4737 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4738
4739 if (test_bit(__E1000_DOWN, &adapter->state))
4740 return;
4741
4742 schedule_work(&adapter->update_phy_task);
4743}
4744
4745/**
4746 * e1000e_update_phy_stats - Update the PHY statistics counters
4747 * @adapter: board private structure
4748 *
4749 * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4750 **/
4751static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4752{
4753 struct e1000_hw *hw = &adapter->hw;
4754 s32 ret_val;
4755 u16 phy_data;
4756
4757 ret_val = hw->phy.ops.acquire(hw);
4758 if (ret_val)
4759 return;
4760
4761 /* A page set is expensive so check if already on desired page.
4762 * If not, set to the page with the PHY status registers.
4763 */
4764 hw->phy.addr = 1;
4765 ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4766 &phy_data);
4767 if (ret_val)
4768 goto release;
4769 if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4770 ret_val = hw->phy.ops.set_page(hw,
4771 HV_STATS_PAGE << IGP_PAGE_SHIFT);
4772 if (ret_val)
4773 goto release;
4774 }
4775
4776 /* Single Collision Count */
4777 hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4778 ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4779 if (!ret_val)
4780 adapter->stats.scc += phy_data;
4781
4782 /* Excessive Collision Count */
4783 hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4784 ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4785 if (!ret_val)
4786 adapter->stats.ecol += phy_data;
4787
4788 /* Multiple Collision Count */
4789 hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4790 ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4791 if (!ret_val)
4792 adapter->stats.mcc += phy_data;
4793
4794 /* Late Collision Count */
4795 hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4796 ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4797 if (!ret_val)
4798 adapter->stats.latecol += phy_data;
4799
4800 /* Collision Count - also used for adaptive IFS */
4801 hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4802 ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4803 if (!ret_val)
4804 hw->mac.collision_delta = phy_data;
4805
4806 /* Defer Count */
4807 hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4808 ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4809 if (!ret_val)
4810 adapter->stats.dc += phy_data;
4811
4812 /* Transmit with no CRS */
4813 hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4814 ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4815 if (!ret_val)
4816 adapter->stats.tncrs += phy_data;
4817
4818release:
4819 hw->phy.ops.release(hw);
4820}
4821
4822/**
4823 * e1000e_update_stats - Update the board statistics counters
4824 * @adapter: board private structure
4825 **/
4826static void e1000e_update_stats(struct e1000_adapter *adapter)
4827{
4828 struct net_device *netdev = adapter->netdev;
4829 struct e1000_hw *hw = &adapter->hw;
4830 struct pci_dev *pdev = adapter->pdev;
4831
4832 /* Prevent stats update while adapter is being reset, or if the pci
4833 * connection is down.
4834 */
4835 if (adapter->link_speed == 0)
4836 return;
4837 if (pci_channel_offline(pdev))
4838 return;
4839
4840 adapter->stats.crcerrs += er32(CRCERRS);
4841 adapter->stats.gprc += er32(GPRC);
4842 adapter->stats.gorc += er32(GORCL);
4843 er32(GORCH); /* Clear gorc */
4844 adapter->stats.bprc += er32(BPRC);
4845 adapter->stats.mprc += er32(MPRC);
4846 adapter->stats.roc += er32(ROC);
4847
4848 adapter->stats.mpc += er32(MPC);
4849
4850 /* Half-duplex statistics */
4851 if (adapter->link_duplex == HALF_DUPLEX) {
4852 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4853 e1000e_update_phy_stats(adapter);
4854 } else {
4855 adapter->stats.scc += er32(SCC);
4856 adapter->stats.ecol += er32(ECOL);
4857 adapter->stats.mcc += er32(MCC);
4858 adapter->stats.latecol += er32(LATECOL);
4859 adapter->stats.dc += er32(DC);
4860
4861 hw->mac.collision_delta = er32(COLC);
4862
4863 if ((hw->mac.type != e1000_82574) &&
4864 (hw->mac.type != e1000_82583))
4865 adapter->stats.tncrs += er32(TNCRS);
4866 }
4867 adapter->stats.colc += hw->mac.collision_delta;
4868 }
4869
4870 adapter->stats.xonrxc += er32(XONRXC);
4871 adapter->stats.xontxc += er32(XONTXC);
4872 adapter->stats.xoffrxc += er32(XOFFRXC);
4873 adapter->stats.xofftxc += er32(XOFFTXC);
4874 adapter->stats.gptc += er32(GPTC);
4875 adapter->stats.gotc += er32(GOTCL);
4876 er32(GOTCH); /* Clear gotc */
4877 adapter->stats.rnbc += er32(RNBC);
4878 adapter->stats.ruc += er32(RUC);
4879
4880 adapter->stats.mptc += er32(MPTC);
4881 adapter->stats.bptc += er32(BPTC);
4882
4883 /* used for adaptive IFS */
4884
4885 hw->mac.tx_packet_delta = er32(TPT);
4886 adapter->stats.tpt += hw->mac.tx_packet_delta;
4887
4888 adapter->stats.algnerrc += er32(ALGNERRC);
4889 adapter->stats.rxerrc += er32(RXERRC);
4890 adapter->stats.cexterr += er32(CEXTERR);
4891 adapter->stats.tsctc += er32(TSCTC);
4892 adapter->stats.tsctfc += er32(TSCTFC);
4893
4894 /* Fill out the OS statistics structure */
4895 netdev->stats.multicast = adapter->stats.mprc;
4896 netdev->stats.collisions = adapter->stats.colc;
4897
4898 /* Rx Errors */
4899
4900 /* RLEC on some newer hardware can be incorrect so build
4901 * our own version based on RUC and ROC
4902 */
4903 netdev->stats.rx_errors = adapter->stats.rxerrc +
4904 adapter->stats.crcerrs + adapter->stats.algnerrc +
4905 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4906 netdev->stats.rx_length_errors = adapter->stats.ruc +
4907 adapter->stats.roc;
4908 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4909 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4910 netdev->stats.rx_missed_errors = adapter->stats.mpc;
4911
4912 /* Tx Errors */
4913 netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4914 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4915 netdev->stats.tx_window_errors = adapter->stats.latecol;
4916 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4917
4918 /* Tx Dropped needs to be maintained elsewhere */
4919
4920 /* Management Stats */
4921 adapter->stats.mgptc += er32(MGTPTC);
4922 adapter->stats.mgprc += er32(MGTPRC);
4923 adapter->stats.mgpdc += er32(MGTPDC);
4924
4925 /* Correctable ECC Errors */
4926 if ((hw->mac.type == e1000_pch_lpt) ||
4927 (hw->mac.type == e1000_pch_spt)) {
4928 u32 pbeccsts = er32(PBECCSTS);
4929
4930 adapter->corr_errors +=
4931 pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
4932 adapter->uncorr_errors +=
4933 (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
4934 E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
4935 }
4936}
4937
4938/**
4939 * e1000_phy_read_status - Update the PHY register status snapshot
4940 * @adapter: board private structure
4941 **/
4942static void e1000_phy_read_status(struct e1000_adapter *adapter)
4943{
4944 struct e1000_hw *hw = &adapter->hw;
4945 struct e1000_phy_regs *phy = &adapter->phy_regs;
4946
4947 if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
4948 (er32(STATUS) & E1000_STATUS_LU) &&
4949 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4950 int ret_val;
4951
4952 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
4953 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
4954 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
4955 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
4956 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
4957 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
4958 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
4959 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
4960 if (ret_val)
4961 e_warn("Error reading PHY register\n");
4962 } else {
4963 /* Do not read PHY registers if link is not up
4964 * Set values to typical power-on defaults
4965 */
4966 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4967 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4968 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4969 BMSR_ERCAP);
4970 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4971 ADVERTISE_ALL | ADVERTISE_CSMA);
4972 phy->lpa = 0;
4973 phy->expansion = EXPANSION_ENABLENPAGE;
4974 phy->ctrl1000 = ADVERTISE_1000FULL;
4975 phy->stat1000 = 0;
4976 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4977 }
4978}
4979
4980static void e1000_print_link_info(struct e1000_adapter *adapter)
4981{
4982 struct e1000_hw *hw = &adapter->hw;
4983 u32 ctrl = er32(CTRL);
4984
4985 /* Link status message must follow this format for user tools */
4986 pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4987 adapter->netdev->name, adapter->link_speed,
4988 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
4989 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
4990 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
4991 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
4992}
4993
4994static bool e1000e_has_link(struct e1000_adapter *adapter)
4995{
4996 struct e1000_hw *hw = &adapter->hw;
4997 bool link_active = false;
4998 s32 ret_val = 0;
4999
5000 /* get_link_status is set on LSC (link status) interrupt or
5001 * Rx sequence error interrupt. get_link_status will stay
5002 * false until the check_for_link establishes link
5003 * for copper adapters ONLY
5004 */
5005 switch (hw->phy.media_type) {
5006 case e1000_media_type_copper:
5007 if (hw->mac.get_link_status) {
5008 ret_val = hw->mac.ops.check_for_link(hw);
5009 link_active = !hw->mac.get_link_status;
5010 } else {
5011 link_active = true;
5012 }
5013 break;
5014 case e1000_media_type_fiber:
5015 ret_val = hw->mac.ops.check_for_link(hw);
5016 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5017 break;
5018 case e1000_media_type_internal_serdes:
5019 ret_val = hw->mac.ops.check_for_link(hw);
5020 link_active = adapter->hw.mac.serdes_has_link;
5021 break;
5022 default:
5023 case e1000_media_type_unknown:
5024 break;
5025 }
5026
5027 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5028 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5029 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5030 e_info("Gigabit has been disabled, downgrading speed\n");
5031 }
5032
5033 return link_active;
5034}
5035
5036static void e1000e_enable_receives(struct e1000_adapter *adapter)
5037{
5038 /* make sure the receive unit is started */
5039 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5040 (adapter->flags & FLAG_RESTART_NOW)) {
5041 struct e1000_hw *hw = &adapter->hw;
5042 u32 rctl = er32(RCTL);
5043
5044 ew32(RCTL, rctl | E1000_RCTL_EN);
5045 adapter->flags &= ~FLAG_RESTART_NOW;
5046 }
5047}
5048
5049static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5050{
5051 struct e1000_hw *hw = &adapter->hw;
5052
5053 /* With 82574 controllers, PHY needs to be checked periodically
5054 * for hung state and reset, if two calls return true
5055 */
5056 if (e1000_check_phy_82574(hw))
5057 adapter->phy_hang_count++;
5058 else
5059 adapter->phy_hang_count = 0;
5060
5061 if (adapter->phy_hang_count > 1) {
5062 adapter->phy_hang_count = 0;
5063 e_dbg("PHY appears hung - resetting\n");
5064 schedule_work(&adapter->reset_task);
5065 }
5066}
5067
5068/**
5069 * e1000_watchdog - Timer Call-back
5070 * @data: pointer to adapter cast into an unsigned long
5071 **/
5072static void e1000_watchdog(unsigned long data)
5073{
5074 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
5075
5076 /* Do the rest outside of interrupt context */
5077 schedule_work(&adapter->watchdog_task);
5078
5079 /* TODO: make this use queue_delayed_work() */
5080}
5081
5082static void e1000_watchdog_task(struct work_struct *work)
5083{
5084 struct e1000_adapter *adapter = container_of(work,
5085 struct e1000_adapter,
5086 watchdog_task);
5087 struct net_device *netdev = adapter->netdev;
5088 struct e1000_mac_info *mac = &adapter->hw.mac;
5089 struct e1000_phy_info *phy = &adapter->hw.phy;
5090 struct e1000_ring *tx_ring = adapter->tx_ring;
5091 struct e1000_hw *hw = &adapter->hw;
5092 u32 link, tctl;
5093
5094 if (test_bit(__E1000_DOWN, &adapter->state))
5095 return;
5096
5097 link = e1000e_has_link(adapter);
5098 if ((netif_carrier_ok(netdev)) && link) {
5099 /* Cancel scheduled suspend requests. */
5100 pm_runtime_resume(netdev->dev.parent);
5101
5102 e1000e_enable_receives(adapter);
5103 goto link_up;
5104 }
5105
5106 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5107 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5108 e1000_update_mng_vlan(adapter);
5109
5110 if (link) {
5111 if (!netif_carrier_ok(netdev)) {
5112 bool txb2b = true;
5113
5114 /* Cancel scheduled suspend requests. */
5115 pm_runtime_resume(netdev->dev.parent);
5116
5117 /* update snapshot of PHY registers on LSC */
5118 e1000_phy_read_status(adapter);
5119 mac->ops.get_link_up_info(&adapter->hw,
5120 &adapter->link_speed,
5121 &adapter->link_duplex);
5122 e1000_print_link_info(adapter);
5123
5124 /* check if SmartSpeed worked */
5125 e1000e_check_downshift(hw);
5126 if (phy->speed_downgraded)
5127 netdev_warn(netdev,
5128 "Link Speed was downgraded by SmartSpeed\n");
5129
5130 /* On supported PHYs, check for duplex mismatch only
5131 * if link has autonegotiated at 10/100 half
5132 */
5133 if ((hw->phy.type == e1000_phy_igp_3 ||
5134 hw->phy.type == e1000_phy_bm) &&
5135 hw->mac.autoneg &&
5136 (adapter->link_speed == SPEED_10 ||
5137 adapter->link_speed == SPEED_100) &&
5138 (adapter->link_duplex == HALF_DUPLEX)) {
5139 u16 autoneg_exp;
5140
5141 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5142
5143 if (!(autoneg_exp & EXPANSION_NWAY))
5144 e_info("Autonegotiated half duplex but link partner cannot autoneg. Try forcing full duplex if link gets many collisions.\n");
5145 }
5146
5147 /* adjust timeout factor according to speed/duplex */
5148 adapter->tx_timeout_factor = 1;
5149 switch (adapter->link_speed) {
5150 case SPEED_10:
5151 txb2b = false;
5152 adapter->tx_timeout_factor = 16;
5153 break;
5154 case SPEED_100:
5155 txb2b = false;
5156 adapter->tx_timeout_factor = 10;
5157 break;
5158 }
5159
5160 /* workaround: re-program speed mode bit after
5161 * link-up event
5162 */
5163 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5164 !txb2b) {
5165 u32 tarc0;
5166
5167 tarc0 = er32(TARC(0));
5168 tarc0 &= ~SPEED_MODE_BIT;
5169 ew32(TARC(0), tarc0);
5170 }
5171
5172 /* disable TSO for pcie and 10/100 speeds, to avoid
5173 * some hardware issues
5174 */
5175 if (!(adapter->flags & FLAG_TSO_FORCE)) {
5176 switch (adapter->link_speed) {
5177 case SPEED_10:
5178 case SPEED_100:
5179 e_info("10/100 speed: disabling TSO\n");
5180 netdev->features &= ~NETIF_F_TSO;
5181 netdev->features &= ~NETIF_F_TSO6;
5182 break;
5183 case SPEED_1000:
5184 netdev->features |= NETIF_F_TSO;
5185 netdev->features |= NETIF_F_TSO6;
5186 break;
5187 default:
5188 /* oops */
5189 break;
5190 }
5191 }
5192
5193 /* enable transmits in the hardware, need to do this
5194 * after setting TARC(0)
5195 */
5196 tctl = er32(TCTL);
5197 tctl |= E1000_TCTL_EN;
5198 ew32(TCTL, tctl);
5199
5200 /* Perform any post-link-up configuration before
5201 * reporting link up.
5202 */
5203 if (phy->ops.cfg_on_link_up)
5204 phy->ops.cfg_on_link_up(hw);
5205
5206 netif_carrier_on(netdev);
5207
5208 if (!test_bit(__E1000_DOWN, &adapter->state))
5209 mod_timer(&adapter->phy_info_timer,
5210 round_jiffies(jiffies + 2 * HZ));
5211 }
5212 } else {
5213 if (netif_carrier_ok(netdev)) {
5214 adapter->link_speed = 0;
5215 adapter->link_duplex = 0;
5216 /* Link status message must follow this format */
5217 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5218 netif_carrier_off(netdev);
5219 if (!test_bit(__E1000_DOWN, &adapter->state))
5220 mod_timer(&adapter->phy_info_timer,
5221 round_jiffies(jiffies + 2 * HZ));
5222
5223 /* 8000ES2LAN requires a Rx packet buffer work-around
5224 * on link down event; reset the controller to flush
5225 * the Rx packet buffer.
5226 */
5227 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5228 adapter->flags |= FLAG_RESTART_NOW;
5229 else
5230 pm_schedule_suspend(netdev->dev.parent,
5231 LINK_TIMEOUT);
5232 }
5233 }
5234
5235link_up:
5236 spin_lock(&adapter->stats64_lock);
5237 e1000e_update_stats(adapter);
5238
5239 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5240 adapter->tpt_old = adapter->stats.tpt;
5241 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5242 adapter->colc_old = adapter->stats.colc;
5243
5244 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5245 adapter->gorc_old = adapter->stats.gorc;
5246 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5247 adapter->gotc_old = adapter->stats.gotc;
5248 spin_unlock(&adapter->stats64_lock);
5249
5250 /* If the link is lost the controller stops DMA, but
5251 * if there is queued Tx work it cannot be done. So
5252 * reset the controller to flush the Tx packet buffers.
5253 */
5254 if (!netif_carrier_ok(netdev) &&
5255 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5256 adapter->flags |= FLAG_RESTART_NOW;
5257
5258 /* If reset is necessary, do it outside of interrupt context. */
5259 if (adapter->flags & FLAG_RESTART_NOW) {
5260 schedule_work(&adapter->reset_task);
5261 /* return immediately since reset is imminent */
5262 return;
5263 }
5264
5265 e1000e_update_adaptive(&adapter->hw);
5266
5267 /* Simple mode for Interrupt Throttle Rate (ITR) */
5268 if (adapter->itr_setting == 4) {
5269 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5270 * Total asymmetrical Tx or Rx gets ITR=8000;
5271 * everyone else is between 2000-8000.
5272 */
5273 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5274 u32 dif = (adapter->gotc > adapter->gorc ?
5275 adapter->gotc - adapter->gorc :
5276 adapter->gorc - adapter->gotc) / 10000;
5277 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5278
5279 e1000e_write_itr(adapter, itr);
5280 }
5281
5282 /* Cause software interrupt to ensure Rx ring is cleaned */
5283 if (adapter->msix_entries)
5284 ew32(ICS, adapter->rx_ring->ims_val);
5285 else
5286 ew32(ICS, E1000_ICS_RXDMT0);
5287
5288 /* flush pending descriptors to memory before detecting Tx hang */
5289 e1000e_flush_descriptors(adapter);
5290
5291 /* Force detection of hung controller every watchdog period */
5292 adapter->detect_tx_hung = true;
5293
5294 /* With 82571 controllers, LAA may be overwritten due to controller
5295 * reset from the other port. Set the appropriate LAA in RAR[0]
5296 */
5297 if (e1000e_get_laa_state_82571(hw))
5298 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5299
5300 if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5301 e1000e_check_82574_phy_workaround(adapter);
5302
5303 /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5304 if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5305 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5306 (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5307 er32(RXSTMPH);
5308 adapter->rx_hwtstamp_cleared++;
5309 } else {
5310 adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5311 }
5312 }
5313
5314 /* Reset the timer */
5315 if (!test_bit(__E1000_DOWN, &adapter->state))
5316 mod_timer(&adapter->watchdog_timer,
5317 round_jiffies(jiffies + 2 * HZ));
5318}
5319
5320#define E1000_TX_FLAGS_CSUM 0x00000001
5321#define E1000_TX_FLAGS_VLAN 0x00000002
5322#define E1000_TX_FLAGS_TSO 0x00000004
5323#define E1000_TX_FLAGS_IPV4 0x00000008
5324#define E1000_TX_FLAGS_NO_FCS 0x00000010
5325#define E1000_TX_FLAGS_HWTSTAMP 0x00000020
5326#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
5327#define E1000_TX_FLAGS_VLAN_SHIFT 16
5328
5329static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5330 __be16 protocol)
5331{
5332 struct e1000_context_desc *context_desc;
5333 struct e1000_buffer *buffer_info;
5334 unsigned int i;
5335 u32 cmd_length = 0;
5336 u16 ipcse = 0, mss;
5337 u8 ipcss, ipcso, tucss, tucso, hdr_len;
5338 int err;
5339
5340 if (!skb_is_gso(skb))
5341 return 0;
5342
5343 err = skb_cow_head(skb, 0);
5344 if (err < 0)
5345 return err;
5346
5347 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5348 mss = skb_shinfo(skb)->gso_size;
5349 if (protocol == htons(ETH_P_IP)) {
5350 struct iphdr *iph = ip_hdr(skb);
5351 iph->tot_len = 0;
5352 iph->check = 0;
5353 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5354 0, IPPROTO_TCP, 0);
5355 cmd_length = E1000_TXD_CMD_IP;
5356 ipcse = skb_transport_offset(skb) - 1;
5357 } else if (skb_is_gso_v6(skb)) {
5358 ipv6_hdr(skb)->payload_len = 0;
5359 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5360 &ipv6_hdr(skb)->daddr,
5361 0, IPPROTO_TCP, 0);
5362 ipcse = 0;
5363 }
5364 ipcss = skb_network_offset(skb);
5365 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5366 tucss = skb_transport_offset(skb);
5367 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5368
5369 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5370 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5371
5372 i = tx_ring->next_to_use;
5373 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5374 buffer_info = &tx_ring->buffer_info[i];
5375
5376 context_desc->lower_setup.ip_fields.ipcss = ipcss;
5377 context_desc->lower_setup.ip_fields.ipcso = ipcso;
5378 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5379 context_desc->upper_setup.tcp_fields.tucss = tucss;
5380 context_desc->upper_setup.tcp_fields.tucso = tucso;
5381 context_desc->upper_setup.tcp_fields.tucse = 0;
5382 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5383 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5384 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5385
5386 buffer_info->time_stamp = jiffies;
5387 buffer_info->next_to_watch = i;
5388
5389 i++;
5390 if (i == tx_ring->count)
5391 i = 0;
5392 tx_ring->next_to_use = i;
5393
5394 return 1;
5395}
5396
5397static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5398 __be16 protocol)
5399{
5400 struct e1000_adapter *adapter = tx_ring->adapter;
5401 struct e1000_context_desc *context_desc;
5402 struct e1000_buffer *buffer_info;
5403 unsigned int i;
5404 u8 css;
5405 u32 cmd_len = E1000_TXD_CMD_DEXT;
5406
5407 if (skb->ip_summed != CHECKSUM_PARTIAL)
5408 return false;
5409
5410 switch (protocol) {
5411 case cpu_to_be16(ETH_P_IP):
5412 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5413 cmd_len |= E1000_TXD_CMD_TCP;
5414 break;
5415 case cpu_to_be16(ETH_P_IPV6):
5416 /* XXX not handling all IPV6 headers */
5417 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5418 cmd_len |= E1000_TXD_CMD_TCP;
5419 break;
5420 default:
5421 if (unlikely(net_ratelimit()))
5422 e_warn("checksum_partial proto=%x!\n",
5423 be16_to_cpu(protocol));
5424 break;
5425 }
5426
5427 css = skb_checksum_start_offset(skb);
5428
5429 i = tx_ring->next_to_use;
5430 buffer_info = &tx_ring->buffer_info[i];
5431 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5432
5433 context_desc->lower_setup.ip_config = 0;
5434 context_desc->upper_setup.tcp_fields.tucss = css;
5435 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5436 context_desc->upper_setup.tcp_fields.tucse = 0;
5437 context_desc->tcp_seg_setup.data = 0;
5438 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5439
5440 buffer_info->time_stamp = jiffies;
5441 buffer_info->next_to_watch = i;
5442
5443 i++;
5444 if (i == tx_ring->count)
5445 i = 0;
5446 tx_ring->next_to_use = i;
5447
5448 return true;
5449}
5450
5451static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5452 unsigned int first, unsigned int max_per_txd,
5453 unsigned int nr_frags)
5454{
5455 struct e1000_adapter *adapter = tx_ring->adapter;
5456 struct pci_dev *pdev = adapter->pdev;
5457 struct e1000_buffer *buffer_info;
5458 unsigned int len = skb_headlen(skb);
5459 unsigned int offset = 0, size, count = 0, i;
5460 unsigned int f, bytecount, segs;
5461
5462 i = tx_ring->next_to_use;
5463
5464 while (len) {
5465 buffer_info = &tx_ring->buffer_info[i];
5466 size = min(len, max_per_txd);
5467
5468 buffer_info->length = size;
5469 buffer_info->time_stamp = jiffies;
5470 buffer_info->next_to_watch = i;
5471 buffer_info->dma = dma_map_single(&pdev->dev,
5472 skb->data + offset,
5473 size, DMA_TO_DEVICE);
5474 buffer_info->mapped_as_page = false;
5475 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5476 goto dma_error;
5477
5478 len -= size;
5479 offset += size;
5480 count++;
5481
5482 if (len) {
5483 i++;
5484 if (i == tx_ring->count)
5485 i = 0;
5486 }
5487 }
5488
5489 for (f = 0; f < nr_frags; f++) {
5490 const struct skb_frag_struct *frag;
5491
5492 frag = &skb_shinfo(skb)->frags[f];
5493 len = skb_frag_size(frag);
5494 offset = 0;
5495
5496 while (len) {
5497 i++;
5498 if (i == tx_ring->count)
5499 i = 0;
5500
5501 buffer_info = &tx_ring->buffer_info[i];
5502 size = min(len, max_per_txd);
5503
5504 buffer_info->length = size;
5505 buffer_info->time_stamp = jiffies;
5506 buffer_info->next_to_watch = i;
5507 buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5508 offset, size,
5509 DMA_TO_DEVICE);
5510 buffer_info->mapped_as_page = true;
5511 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5512 goto dma_error;
5513
5514 len -= size;
5515 offset += size;
5516 count++;
5517 }
5518 }
5519
5520 segs = skb_shinfo(skb)->gso_segs ? : 1;
5521 /* multiply data chunks by size of headers */
5522 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5523
5524 tx_ring->buffer_info[i].skb = skb;
5525 tx_ring->buffer_info[i].segs = segs;
5526 tx_ring->buffer_info[i].bytecount = bytecount;
5527 tx_ring->buffer_info[first].next_to_watch = i;
5528
5529 return count;
5530
5531dma_error:
5532 dev_err(&pdev->dev, "Tx DMA map failed\n");
5533 buffer_info->dma = 0;
5534 if (count)
5535 count--;
5536
5537 while (count--) {
5538 if (i == 0)
5539 i += tx_ring->count;
5540 i--;
5541 buffer_info = &tx_ring->buffer_info[i];
5542 e1000_put_txbuf(tx_ring, buffer_info);
5543 }
5544
5545 return 0;
5546}
5547
5548static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5549{
5550 struct e1000_adapter *adapter = tx_ring->adapter;
5551 struct e1000_tx_desc *tx_desc = NULL;
5552 struct e1000_buffer *buffer_info;
5553 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5554 unsigned int i;
5555
5556 if (tx_flags & E1000_TX_FLAGS_TSO) {
5557 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5558 E1000_TXD_CMD_TSE;
5559 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5560
5561 if (tx_flags & E1000_TX_FLAGS_IPV4)
5562 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5563 }
5564
5565 if (tx_flags & E1000_TX_FLAGS_CSUM) {
5566 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5567 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5568 }
5569
5570 if (tx_flags & E1000_TX_FLAGS_VLAN) {
5571 txd_lower |= E1000_TXD_CMD_VLE;
5572 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5573 }
5574
5575 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5576 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5577
5578 if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5579 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5580 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5581 }
5582
5583 i = tx_ring->next_to_use;
5584
5585 do {
5586 buffer_info = &tx_ring->buffer_info[i];
5587 tx_desc = E1000_TX_DESC(*tx_ring, i);
5588 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5589 tx_desc->lower.data = cpu_to_le32(txd_lower |
5590 buffer_info->length);
5591 tx_desc->upper.data = cpu_to_le32(txd_upper);
5592
5593 i++;
5594 if (i == tx_ring->count)
5595 i = 0;
5596 } while (--count > 0);
5597
5598 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5599
5600 /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5601 if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5602 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5603
5604 /* Force memory writes to complete before letting h/w
5605 * know there are new descriptors to fetch. (Only
5606 * applicable for weak-ordered memory model archs,
5607 * such as IA-64).
5608 */
5609 wmb();
5610
5611 tx_ring->next_to_use = i;
5612}
5613
5614#define MINIMUM_DHCP_PACKET_SIZE 282
5615static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5616 struct sk_buff *skb)
5617{
5618 struct e1000_hw *hw = &adapter->hw;
5619 u16 length, offset;
5620
5621 if (skb_vlan_tag_present(skb) &&
5622 !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5623 (adapter->hw.mng_cookie.status &
5624 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5625 return 0;
5626
5627 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5628 return 0;
5629
5630 if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5631 return 0;
5632
5633 {
5634 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5635 struct udphdr *udp;
5636
5637 if (ip->protocol != IPPROTO_UDP)
5638 return 0;
5639
5640 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5641 if (ntohs(udp->dest) != 67)
5642 return 0;
5643
5644 offset = (u8 *)udp + 8 - skb->data;
5645 length = skb->len - offset;
5646 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5647 }
5648
5649 return 0;
5650}
5651
5652static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5653{
5654 struct e1000_adapter *adapter = tx_ring->adapter;
5655
5656 netif_stop_queue(adapter->netdev);
5657 /* Herbert's original patch had:
5658 * smp_mb__after_netif_stop_queue();
5659 * but since that doesn't exist yet, just open code it.
5660 */
5661 smp_mb();
5662
5663 /* We need to check again in a case another CPU has just
5664 * made room available.
5665 */
5666 if (e1000_desc_unused(tx_ring) < size)
5667 return -EBUSY;
5668
5669 /* A reprieve! */
5670 netif_start_queue(adapter->netdev);
5671 ++adapter->restart_queue;
5672 return 0;
5673}
5674
5675static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5676{
5677 BUG_ON(size > tx_ring->count);
5678
5679 if (e1000_desc_unused(tx_ring) >= size)
5680 return 0;
5681 return __e1000_maybe_stop_tx(tx_ring, size);
5682}
5683
5684static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5685 struct net_device *netdev)
5686{
5687 struct e1000_adapter *adapter = netdev_priv(netdev);
5688 struct e1000_ring *tx_ring = adapter->tx_ring;
5689 unsigned int first;
5690 unsigned int tx_flags = 0;
5691 unsigned int len = skb_headlen(skb);
5692 unsigned int nr_frags;
5693 unsigned int mss;
5694 int count = 0;
5695 int tso;
5696 unsigned int f;
5697 __be16 protocol = vlan_get_protocol(skb);
5698
5699 if (test_bit(__E1000_DOWN, &adapter->state)) {
5700 dev_kfree_skb_any(skb);
5701 return NETDEV_TX_OK;
5702 }
5703
5704 if (skb->len <= 0) {
5705 dev_kfree_skb_any(skb);
5706 return NETDEV_TX_OK;
5707 }
5708
5709 /* The minimum packet size with TCTL.PSP set is 17 bytes so
5710 * pad skb in order to meet this minimum size requirement
5711 */
5712 if (skb_put_padto(skb, 17))
5713 return NETDEV_TX_OK;
5714
5715 mss = skb_shinfo(skb)->gso_size;
5716 if (mss) {
5717 u8 hdr_len;
5718
5719 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5720 * points to just header, pull a few bytes of payload from
5721 * frags into skb->data
5722 */
5723 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5724 /* we do this workaround for ES2LAN, but it is un-necessary,
5725 * avoiding it could save a lot of cycles
5726 */
5727 if (skb->data_len && (hdr_len == len)) {
5728 unsigned int pull_size;
5729
5730 pull_size = min_t(unsigned int, 4, skb->data_len);
5731 if (!__pskb_pull_tail(skb, pull_size)) {
5732 e_err("__pskb_pull_tail failed.\n");
5733 dev_kfree_skb_any(skb);
5734 return NETDEV_TX_OK;
5735 }
5736 len = skb_headlen(skb);
5737 }
5738 }
5739
5740 /* reserve a descriptor for the offload context */
5741 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5742 count++;
5743 count++;
5744
5745 count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5746
5747 nr_frags = skb_shinfo(skb)->nr_frags;
5748 for (f = 0; f < nr_frags; f++)
5749 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5750 adapter->tx_fifo_limit);
5751
5752 if (adapter->hw.mac.tx_pkt_filtering)
5753 e1000_transfer_dhcp_info(adapter, skb);
5754
5755 /* need: count + 2 desc gap to keep tail from touching
5756 * head, otherwise try next time
5757 */
5758 if (e1000_maybe_stop_tx(tx_ring, count + 2))
5759 return NETDEV_TX_BUSY;
5760
5761 if (skb_vlan_tag_present(skb)) {
5762 tx_flags |= E1000_TX_FLAGS_VLAN;
5763 tx_flags |= (skb_vlan_tag_get(skb) <<
5764 E1000_TX_FLAGS_VLAN_SHIFT);
5765 }
5766
5767 first = tx_ring->next_to_use;
5768
5769 tso = e1000_tso(tx_ring, skb, protocol);
5770 if (tso < 0) {
5771 dev_kfree_skb_any(skb);
5772 return NETDEV_TX_OK;
5773 }
5774
5775 if (tso)
5776 tx_flags |= E1000_TX_FLAGS_TSO;
5777 else if (e1000_tx_csum(tx_ring, skb, protocol))
5778 tx_flags |= E1000_TX_FLAGS_CSUM;
5779
5780 /* Old method was to assume IPv4 packet by default if TSO was enabled.
5781 * 82571 hardware supports TSO capabilities for IPv6 as well...
5782 * no longer assume, we must.
5783 */
5784 if (protocol == htons(ETH_P_IP))
5785 tx_flags |= E1000_TX_FLAGS_IPV4;
5786
5787 if (unlikely(skb->no_fcs))
5788 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5789
5790 /* if count is 0 then mapping error has occurred */
5791 count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5792 nr_frags);
5793 if (count) {
5794 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5795 (adapter->flags & FLAG_HAS_HW_TIMESTAMP) &&
5796 !adapter->tx_hwtstamp_skb) {
5797 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5798 tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5799 adapter->tx_hwtstamp_skb = skb_get(skb);
5800 adapter->tx_hwtstamp_start = jiffies;
5801 schedule_work(&adapter->tx_hwtstamp_work);
5802 } else {
5803 skb_tx_timestamp(skb);
5804 }
5805
5806 netdev_sent_queue(netdev, skb->len);
5807 e1000_tx_queue(tx_ring, tx_flags, count);
5808 /* Make sure there is space in the ring for the next send. */
5809 e1000_maybe_stop_tx(tx_ring,
5810 (MAX_SKB_FRAGS *
5811 DIV_ROUND_UP(PAGE_SIZE,
5812 adapter->tx_fifo_limit) + 2));
5813
5814 if (!skb->xmit_more ||
5815 netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5816 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5817 e1000e_update_tdt_wa(tx_ring,
5818 tx_ring->next_to_use);
5819 else
5820 writel(tx_ring->next_to_use, tx_ring->tail);
5821
5822 /* we need this if more than one processor can write
5823 * to our tail at a time, it synchronizes IO on
5824 *IA64/Altix systems
5825 */
5826 mmiowb();
5827 }
5828 } else {
5829 dev_kfree_skb_any(skb);
5830 tx_ring->buffer_info[first].time_stamp = 0;
5831 tx_ring->next_to_use = first;
5832 }
5833
5834 return NETDEV_TX_OK;
5835}
5836
5837/**
5838 * e1000_tx_timeout - Respond to a Tx Hang
5839 * @netdev: network interface device structure
5840 **/
5841static void e1000_tx_timeout(struct net_device *netdev)
5842{
5843 struct e1000_adapter *adapter = netdev_priv(netdev);
5844
5845 /* Do the reset outside of interrupt context */
5846 adapter->tx_timeout_count++;
5847 schedule_work(&adapter->reset_task);
5848}
5849
5850static void e1000_reset_task(struct work_struct *work)
5851{
5852 struct e1000_adapter *adapter;
5853 adapter = container_of(work, struct e1000_adapter, reset_task);
5854
5855 /* don't run the task if already down */
5856 if (test_bit(__E1000_DOWN, &adapter->state))
5857 return;
5858
5859 if (!(adapter->flags & FLAG_RESTART_NOW)) {
5860 e1000e_dump(adapter);
5861 e_err("Reset adapter unexpectedly\n");
5862 }
5863 e1000e_reinit_locked(adapter);
5864}
5865
5866/**
5867 * e1000_get_stats64 - Get System Network Statistics
5868 * @netdev: network interface device structure
5869 * @stats: rtnl_link_stats64 pointer
5870 *
5871 * Returns the address of the device statistics structure.
5872 **/
5873struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5874 struct rtnl_link_stats64 *stats)
5875{
5876 struct e1000_adapter *adapter = netdev_priv(netdev);
5877
5878 memset(stats, 0, sizeof(struct rtnl_link_stats64));
5879 spin_lock(&adapter->stats64_lock);
5880 e1000e_update_stats(adapter);
5881 /* Fill out the OS statistics structure */
5882 stats->rx_bytes = adapter->stats.gorc;
5883 stats->rx_packets = adapter->stats.gprc;
5884 stats->tx_bytes = adapter->stats.gotc;
5885 stats->tx_packets = adapter->stats.gptc;
5886 stats->multicast = adapter->stats.mprc;
5887 stats->collisions = adapter->stats.colc;
5888
5889 /* Rx Errors */
5890
5891 /* RLEC on some newer hardware can be incorrect so build
5892 * our own version based on RUC and ROC
5893 */
5894 stats->rx_errors = adapter->stats.rxerrc +
5895 adapter->stats.crcerrs + adapter->stats.algnerrc +
5896 adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5897 stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5898 stats->rx_crc_errors = adapter->stats.crcerrs;
5899 stats->rx_frame_errors = adapter->stats.algnerrc;
5900 stats->rx_missed_errors = adapter->stats.mpc;
5901
5902 /* Tx Errors */
5903 stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5904 stats->tx_aborted_errors = adapter->stats.ecol;
5905 stats->tx_window_errors = adapter->stats.latecol;
5906 stats->tx_carrier_errors = adapter->stats.tncrs;
5907
5908 /* Tx Dropped needs to be maintained elsewhere */
5909
5910 spin_unlock(&adapter->stats64_lock);
5911 return stats;
5912}
5913
5914/**
5915 * e1000_change_mtu - Change the Maximum Transfer Unit
5916 * @netdev: network interface device structure
5917 * @new_mtu: new value for maximum frame size
5918 *
5919 * Returns 0 on success, negative on failure
5920 **/
5921static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5922{
5923 struct e1000_adapter *adapter = netdev_priv(netdev);
5924 int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
5925
5926 /* Jumbo frame support */
5927 if ((max_frame > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) &&
5928 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5929 e_err("Jumbo Frames not supported.\n");
5930 return -EINVAL;
5931 }
5932
5933 /* Supported frame sizes */
5934 if ((new_mtu < (VLAN_ETH_ZLEN + ETH_FCS_LEN)) ||
5935 (max_frame > adapter->max_hw_frame_size)) {
5936 e_err("Unsupported MTU setting\n");
5937 return -EINVAL;
5938 }
5939
5940 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
5941 if ((adapter->hw.mac.type >= e1000_pch2lan) &&
5942 !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5943 (new_mtu > ETH_DATA_LEN)) {
5944 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
5945 return -EINVAL;
5946 }
5947
5948 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5949 usleep_range(1000, 2000);
5950 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5951 adapter->max_frame_size = max_frame;
5952 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5953 netdev->mtu = new_mtu;
5954
5955 pm_runtime_get_sync(netdev->dev.parent);
5956
5957 if (netif_running(netdev))
5958 e1000e_down(adapter, true);
5959
5960 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5961 * means we reserve 2 more, this pushes us to allocate from the next
5962 * larger slab size.
5963 * i.e. RXBUFFER_2048 --> size-4096 slab
5964 * However with the new *_jumbo_rx* routines, jumbo receives will use
5965 * fragmented skbs
5966 */
5967
5968 if (max_frame <= 2048)
5969 adapter->rx_buffer_len = 2048;
5970 else
5971 adapter->rx_buffer_len = 4096;
5972
5973 /* adjust allocation if LPE protects us, and we aren't using SBP */
5974 if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
5975 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
5976
5977 if (netif_running(netdev))
5978 e1000e_up(adapter);
5979 else
5980 e1000e_reset(adapter);
5981
5982 pm_runtime_put_sync(netdev->dev.parent);
5983
5984 clear_bit(__E1000_RESETTING, &adapter->state);
5985
5986 return 0;
5987}
5988
5989static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5990 int cmd)
5991{
5992 struct e1000_adapter *adapter = netdev_priv(netdev);
5993 struct mii_ioctl_data *data = if_mii(ifr);
5994
5995 if (adapter->hw.phy.media_type != e1000_media_type_copper)
5996 return -EOPNOTSUPP;
5997
5998 switch (cmd) {
5999 case SIOCGMIIPHY:
6000 data->phy_id = adapter->hw.phy.addr;
6001 break;
6002 case SIOCGMIIREG:
6003 e1000_phy_read_status(adapter);
6004
6005 switch (data->reg_num & 0x1F) {
6006 case MII_BMCR:
6007 data->val_out = adapter->phy_regs.bmcr;
6008 break;
6009 case MII_BMSR:
6010 data->val_out = adapter->phy_regs.bmsr;
6011 break;
6012 case MII_PHYSID1:
6013 data->val_out = (adapter->hw.phy.id >> 16);
6014 break;
6015 case MII_PHYSID2:
6016 data->val_out = (adapter->hw.phy.id & 0xFFFF);
6017 break;
6018 case MII_ADVERTISE:
6019 data->val_out = adapter->phy_regs.advertise;
6020 break;
6021 case MII_LPA:
6022 data->val_out = adapter->phy_regs.lpa;
6023 break;
6024 case MII_EXPANSION:
6025 data->val_out = adapter->phy_regs.expansion;
6026 break;
6027 case MII_CTRL1000:
6028 data->val_out = adapter->phy_regs.ctrl1000;
6029 break;
6030 case MII_STAT1000:
6031 data->val_out = adapter->phy_regs.stat1000;
6032 break;
6033 case MII_ESTATUS:
6034 data->val_out = adapter->phy_regs.estatus;
6035 break;
6036 default:
6037 return -EIO;
6038 }
6039 break;
6040 case SIOCSMIIREG:
6041 default:
6042 return -EOPNOTSUPP;
6043 }
6044 return 0;
6045}
6046
6047/**
6048 * e1000e_hwtstamp_ioctl - control hardware time stamping
6049 * @netdev: network interface device structure
6050 * @ifreq: interface request
6051 *
6052 * Outgoing time stamping can be enabled and disabled. Play nice and
6053 * disable it when requested, although it shouldn't cause any overhead
6054 * when no packet needs it. At most one packet in the queue may be
6055 * marked for time stamping, otherwise it would be impossible to tell
6056 * for sure to which packet the hardware time stamp belongs.
6057 *
6058 * Incoming time stamping has to be configured via the hardware filters.
6059 * Not all combinations are supported, in particular event type has to be
6060 * specified. Matching the kind of event packet is not supported, with the
6061 * exception of "all V2 events regardless of level 2 or 4".
6062 **/
6063static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6064{
6065 struct e1000_adapter *adapter = netdev_priv(netdev);
6066 struct hwtstamp_config config;
6067 int ret_val;
6068
6069 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6070 return -EFAULT;
6071
6072 ret_val = e1000e_config_hwtstamp(adapter, &config);
6073 if (ret_val)
6074 return ret_val;
6075
6076 switch (config.rx_filter) {
6077 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6078 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6079 case HWTSTAMP_FILTER_PTP_V2_SYNC:
6080 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6081 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6082 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6083 /* With V2 type filters which specify a Sync or Delay Request,
6084 * Path Delay Request/Response messages are also time stamped
6085 * by hardware so notify the caller the requested packets plus
6086 * some others are time stamped.
6087 */
6088 config.rx_filter = HWTSTAMP_FILTER_SOME;
6089 break;
6090 default:
6091 break;
6092 }
6093
6094 return copy_to_user(ifr->ifr_data, &config,
6095 sizeof(config)) ? -EFAULT : 0;
6096}
6097
6098static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6099{
6100 struct e1000_adapter *adapter = netdev_priv(netdev);
6101
6102 return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6103 sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6104}
6105
6106static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6107{
6108 switch (cmd) {
6109 case SIOCGMIIPHY:
6110 case SIOCGMIIREG:
6111 case SIOCSMIIREG:
6112 return e1000_mii_ioctl(netdev, ifr, cmd);
6113 case SIOCSHWTSTAMP:
6114 return e1000e_hwtstamp_set(netdev, ifr);
6115 case SIOCGHWTSTAMP:
6116 return e1000e_hwtstamp_get(netdev, ifr);
6117 default:
6118 return -EOPNOTSUPP;
6119 }
6120}
6121
6122static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6123{
6124 struct e1000_hw *hw = &adapter->hw;
6125 u32 i, mac_reg, wuc;
6126 u16 phy_reg, wuc_enable;
6127 int retval;
6128
6129 /* copy MAC RARs to PHY RARs */
6130 e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6131
6132 retval = hw->phy.ops.acquire(hw);
6133 if (retval) {
6134 e_err("Could not acquire PHY\n");
6135 return retval;
6136 }
6137
6138 /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6139 retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6140 if (retval)
6141 goto release;
6142
6143 /* copy MAC MTA to PHY MTA - only needed for pchlan */
6144 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6145 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6146 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6147 (u16)(mac_reg & 0xFFFF));
6148 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6149 (u16)((mac_reg >> 16) & 0xFFFF));
6150 }
6151
6152 /* configure PHY Rx Control register */
6153 hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6154 mac_reg = er32(RCTL);
6155 if (mac_reg & E1000_RCTL_UPE)
6156 phy_reg |= BM_RCTL_UPE;
6157 if (mac_reg & E1000_RCTL_MPE)
6158 phy_reg |= BM_RCTL_MPE;
6159 phy_reg &= ~(BM_RCTL_MO_MASK);
6160 if (mac_reg & E1000_RCTL_MO_3)
6161 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6162 << BM_RCTL_MO_SHIFT);
6163 if (mac_reg & E1000_RCTL_BAM)
6164 phy_reg |= BM_RCTL_BAM;
6165 if (mac_reg & E1000_RCTL_PMCF)
6166 phy_reg |= BM_RCTL_PMCF;
6167 mac_reg = er32(CTRL);
6168 if (mac_reg & E1000_CTRL_RFCE)
6169 phy_reg |= BM_RCTL_RFCE;
6170 hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6171
6172 wuc = E1000_WUC_PME_EN;
6173 if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6174 wuc |= E1000_WUC_APME;
6175
6176 /* enable PHY wakeup in MAC register */
6177 ew32(WUFC, wufc);
6178 ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6179 E1000_WUC_PME_STATUS | wuc));
6180
6181 /* configure and enable PHY wakeup in PHY registers */
6182 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6183 hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6184
6185 /* activate PHY wakeup */
6186 wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6187 retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6188 if (retval)
6189 e_err("Could not set PHY Host Wakeup bit\n");
6190release:
6191 hw->phy.ops.release(hw);
6192
6193 return retval;
6194}
6195
6196static void e1000e_flush_lpic(struct pci_dev *pdev)
6197{
6198 struct net_device *netdev = pci_get_drvdata(pdev);
6199 struct e1000_adapter *adapter = netdev_priv(netdev);
6200 struct e1000_hw *hw = &adapter->hw;
6201 u32 ret_val;
6202
6203 pm_runtime_get_sync(netdev->dev.parent);
6204
6205 ret_val = hw->phy.ops.acquire(hw);
6206 if (ret_val)
6207 goto fl_out;
6208
6209 pr_info("EEE TX LPI TIMER: %08X\n",
6210 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6211
6212 hw->phy.ops.release(hw);
6213
6214fl_out:
6215 pm_runtime_put_sync(netdev->dev.parent);
6216}
6217
6218static int e1000e_pm_freeze(struct device *dev)
6219{
6220 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6221 struct e1000_adapter *adapter = netdev_priv(netdev);
6222
6223 netif_device_detach(netdev);
6224
6225 if (netif_running(netdev)) {
6226 int count = E1000_CHECK_RESET_COUNT;
6227
6228 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6229 usleep_range(10000, 20000);
6230
6231 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6232
6233 /* Quiesce the device without resetting the hardware */
6234 e1000e_down(adapter, false);
6235 e1000_free_irq(adapter);
6236 }
6237 e1000e_reset_interrupt_capability(adapter);
6238
6239 /* Allow time for pending master requests to run */
6240 e1000e_disable_pcie_master(&adapter->hw);
6241
6242 return 0;
6243}
6244
6245static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6246{
6247 struct net_device *netdev = pci_get_drvdata(pdev);
6248 struct e1000_adapter *adapter = netdev_priv(netdev);
6249 struct e1000_hw *hw = &adapter->hw;
6250 u32 ctrl, ctrl_ext, rctl, status;
6251 /* Runtime suspend should only enable wakeup for link changes */
6252 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
6253 int retval = 0;
6254
6255 status = er32(STATUS);
6256 if (status & E1000_STATUS_LU)
6257 wufc &= ~E1000_WUFC_LNKC;
6258
6259 if (wufc) {
6260 e1000_setup_rctl(adapter);
6261 e1000e_set_rx_mode(netdev);
6262
6263 /* turn on all-multi mode if wake on multicast is enabled */
6264 if (wufc & E1000_WUFC_MC) {
6265 rctl = er32(RCTL);
6266 rctl |= E1000_RCTL_MPE;
6267 ew32(RCTL, rctl);
6268 }
6269
6270 ctrl = er32(CTRL);
6271 ctrl |= E1000_CTRL_ADVD3WUC;
6272 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6273 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6274 ew32(CTRL, ctrl);
6275
6276 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6277 adapter->hw.phy.media_type ==
6278 e1000_media_type_internal_serdes) {
6279 /* keep the laser running in D3 */
6280 ctrl_ext = er32(CTRL_EXT);
6281 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6282 ew32(CTRL_EXT, ctrl_ext);
6283 }
6284
6285 if (!runtime)
6286 e1000e_power_up_phy(adapter);
6287
6288 if (adapter->flags & FLAG_IS_ICH)
6289 e1000_suspend_workarounds_ich8lan(&adapter->hw);
6290
6291 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6292 /* enable wakeup by the PHY */
6293 retval = e1000_init_phy_wakeup(adapter, wufc);
6294 if (retval)
6295 return retval;
6296 } else {
6297 /* enable wakeup by the MAC */
6298 ew32(WUFC, wufc);
6299 ew32(WUC, E1000_WUC_PME_EN);
6300 }
6301 } else {
6302 ew32(WUC, 0);
6303 ew32(WUFC, 0);
6304
6305 e1000_power_down_phy(adapter);
6306 }
6307
6308 if (adapter->hw.phy.type == e1000_phy_igp_3) {
6309 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6310 } else if ((hw->mac.type == e1000_pch_lpt) ||
6311 (hw->mac.type == e1000_pch_spt)) {
6312 if (!(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6313 /* ULP does not support wake from unicast, multicast
6314 * or broadcast.
6315 */
6316 retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6317
6318 if (retval)
6319 return retval;
6320 }
6321
6322 /* Ensure that the appropriate bits are set in LPI_CTRL
6323 * for EEE in Sx
6324 */
6325 if ((hw->phy.type >= e1000_phy_i217) &&
6326 adapter->eee_advert && hw->dev_spec.ich8lan.eee_lp_ability) {
6327 u16 lpi_ctrl = 0;
6328
6329 retval = hw->phy.ops.acquire(hw);
6330 if (!retval) {
6331 retval = e1e_rphy_locked(hw, I82579_LPI_CTRL,
6332 &lpi_ctrl);
6333 if (!retval) {
6334 if (adapter->eee_advert &
6335 hw->dev_spec.ich8lan.eee_lp_ability &
6336 I82579_EEE_100_SUPPORTED)
6337 lpi_ctrl |= I82579_LPI_CTRL_100_ENABLE;
6338 if (adapter->eee_advert &
6339 hw->dev_spec.ich8lan.eee_lp_ability &
6340 I82579_EEE_1000_SUPPORTED)
6341 lpi_ctrl |= I82579_LPI_CTRL_1000_ENABLE;
6342
6343 retval = e1e_wphy_locked(hw, I82579_LPI_CTRL,
6344 lpi_ctrl);
6345 }
6346 }
6347 hw->phy.ops.release(hw);
6348 }
6349
6350 /* Release control of h/w to f/w. If f/w is AMT enabled, this
6351 * would have already happened in close and is redundant.
6352 */
6353 e1000e_release_hw_control(adapter);
6354
6355 pci_clear_master(pdev);
6356
6357 /* The pci-e switch on some quad port adapters will report a
6358 * correctable error when the MAC transitions from D0 to D3. To
6359 * prevent this we need to mask off the correctable errors on the
6360 * downstream port of the pci-e switch.
6361 *
6362 * We don't have the associated upstream bridge while assigning
6363 * the PCI device into guest. For example, the KVM on power is
6364 * one of the cases.
6365 */
6366 if (adapter->flags & FLAG_IS_QUAD_PORT) {
6367 struct pci_dev *us_dev = pdev->bus->self;
6368 u16 devctl;
6369
6370 if (!us_dev)
6371 return 0;
6372
6373 pcie_capability_read_word(us_dev, PCI_EXP_DEVCTL, &devctl);
6374 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL,
6375 (devctl & ~PCI_EXP_DEVCTL_CERE));
6376
6377 pci_save_state(pdev);
6378 pci_prepare_to_sleep(pdev);
6379
6380 pcie_capability_write_word(us_dev, PCI_EXP_DEVCTL, devctl);
6381 }
6382
6383 return 0;
6384}
6385
6386/**
6387 * __e1000e_disable_aspm - Disable ASPM states
6388 * @pdev: pointer to PCI device struct
6389 * @state: bit-mask of ASPM states to disable
6390 * @locked: indication if this context holds pci_bus_sem locked.
6391 *
6392 * Some devices *must* have certain ASPM states disabled per hardware errata.
6393 **/
6394static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state, int locked)
6395{
6396 struct pci_dev *parent = pdev->bus->self;
6397 u16 aspm_dis_mask = 0;
6398 u16 pdev_aspmc, parent_aspmc;
6399
6400 switch (state) {
6401 case PCIE_LINK_STATE_L0S:
6402 case PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1:
6403 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L0S;
6404 /* fall-through - can't have L1 without L0s */
6405 case PCIE_LINK_STATE_L1:
6406 aspm_dis_mask |= PCI_EXP_LNKCTL_ASPM_L1;
6407 break;
6408 default:
6409 return;
6410 }
6411
6412 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6413 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6414
6415 if (parent) {
6416 pcie_capability_read_word(parent, PCI_EXP_LNKCTL,
6417 &parent_aspmc);
6418 parent_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6419 }
6420
6421 /* Nothing to do if the ASPM states to be disabled already are */
6422 if (!(pdev_aspmc & aspm_dis_mask) &&
6423 (!parent || !(parent_aspmc & aspm_dis_mask)))
6424 return;
6425
6426 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
6427 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L0S) ?
6428 "L0s" : "",
6429 (aspm_dis_mask & pdev_aspmc & PCI_EXP_LNKCTL_ASPM_L1) ?
6430 "L1" : "");
6431
6432#ifdef CONFIG_PCIEASPM
6433 if (locked)
6434 pci_disable_link_state_locked(pdev, state);
6435 else
6436 pci_disable_link_state(pdev, state);
6437
6438 /* Double-check ASPM control. If not disabled by the above, the
6439 * BIOS is preventing that from happening (or CONFIG_PCIEASPM is
6440 * not enabled); override by writing PCI config space directly.
6441 */
6442 pcie_capability_read_word(pdev, PCI_EXP_LNKCTL, &pdev_aspmc);
6443 pdev_aspmc &= PCI_EXP_LNKCTL_ASPMC;
6444
6445 if (!(aspm_dis_mask & pdev_aspmc))
6446 return;
6447#endif
6448
6449 /* Both device and parent should have the same ASPM setting.
6450 * Disable ASPM in downstream component first and then upstream.
6451 */
6452 pcie_capability_clear_word(pdev, PCI_EXP_LNKCTL, aspm_dis_mask);
6453
6454 if (parent)
6455 pcie_capability_clear_word(parent, PCI_EXP_LNKCTL,
6456 aspm_dis_mask);
6457}
6458
6459/**
6460 * e1000e_disable_aspm - Disable ASPM states.
6461 * @pdev: pointer to PCI device struct
6462 * @state: bit-mask of ASPM states to disable
6463 *
6464 * This function acquires the pci_bus_sem!
6465 * Some devices *must* have certain ASPM states disabled per hardware errata.
6466 **/
6467static void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
6468{
6469 __e1000e_disable_aspm(pdev, state, 0);
6470}
6471
6472/**
6473 * e1000e_disable_aspm_locked Disable ASPM states.
6474 * @pdev: pointer to PCI device struct
6475 * @state: bit-mask of ASPM states to disable
6476 *
6477 * This function must be called with pci_bus_sem acquired!
6478 * Some devices *must* have certain ASPM states disabled per hardware errata.
6479 **/
6480static void e1000e_disable_aspm_locked(struct pci_dev *pdev, u16 state)
6481{
6482 __e1000e_disable_aspm(pdev, state, 1);
6483}
6484
6485#ifdef CONFIG_PM
6486static int __e1000_resume(struct pci_dev *pdev)
6487{
6488 struct net_device *netdev = pci_get_drvdata(pdev);
6489 struct e1000_adapter *adapter = netdev_priv(netdev);
6490 struct e1000_hw *hw = &adapter->hw;
6491 u16 aspm_disable_flag = 0;
6492
6493 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6494 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6495 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6496 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6497 if (aspm_disable_flag)
6498 e1000e_disable_aspm(pdev, aspm_disable_flag);
6499
6500 pci_set_master(pdev);
6501
6502 if (hw->mac.type >= e1000_pch2lan)
6503 e1000_resume_workarounds_pchlan(&adapter->hw);
6504
6505 e1000e_power_up_phy(adapter);
6506
6507 /* report the system wakeup cause from S3/S4 */
6508 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6509 u16 phy_data;
6510
6511 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
6512 if (phy_data) {
6513 e_info("PHY Wakeup cause - %s\n",
6514 phy_data & E1000_WUS_EX ? "Unicast Packet" :
6515 phy_data & E1000_WUS_MC ? "Multicast Packet" :
6516 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
6517 phy_data & E1000_WUS_MAG ? "Magic Packet" :
6518 phy_data & E1000_WUS_LNKC ?
6519 "Link Status Change" : "other");
6520 }
6521 e1e_wphy(&adapter->hw, BM_WUS, ~0);
6522 } else {
6523 u32 wus = er32(WUS);
6524
6525 if (wus) {
6526 e_info("MAC Wakeup cause - %s\n",
6527 wus & E1000_WUS_EX ? "Unicast Packet" :
6528 wus & E1000_WUS_MC ? "Multicast Packet" :
6529 wus & E1000_WUS_BC ? "Broadcast Packet" :
6530 wus & E1000_WUS_MAG ? "Magic Packet" :
6531 wus & E1000_WUS_LNKC ? "Link Status Change" :
6532 "other");
6533 }
6534 ew32(WUS, ~0);
6535 }
6536
6537 e1000e_reset(adapter);
6538
6539 e1000_init_manageability_pt(adapter);
6540
6541 /* If the controller has AMT, do not set DRV_LOAD until the interface
6542 * is up. For all other cases, let the f/w know that the h/w is now
6543 * under the control of the driver.
6544 */
6545 if (!(adapter->flags & FLAG_HAS_AMT))
6546 e1000e_get_hw_control(adapter);
6547
6548 return 0;
6549}
6550
6551#ifdef CONFIG_PM_SLEEP
6552static int e1000e_pm_thaw(struct device *dev)
6553{
6554 struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6555 struct e1000_adapter *adapter = netdev_priv(netdev);
6556
6557 e1000e_set_interrupt_capability(adapter);
6558 if (netif_running(netdev)) {
6559 u32 err = e1000_request_irq(adapter);
6560
6561 if (err)
6562 return err;
6563
6564 e1000e_up(adapter);
6565 }
6566
6567 netif_device_attach(netdev);
6568
6569 return 0;
6570}
6571
6572static int e1000e_pm_suspend(struct device *dev)
6573{
6574 struct pci_dev *pdev = to_pci_dev(dev);
6575
6576 e1000e_flush_lpic(pdev);
6577
6578 e1000e_pm_freeze(dev);
6579
6580 return __e1000_shutdown(pdev, false);
6581}
6582
6583static int e1000e_pm_resume(struct device *dev)
6584{
6585 struct pci_dev *pdev = to_pci_dev(dev);
6586 int rc;
6587
6588 rc = __e1000_resume(pdev);
6589 if (rc)
6590 return rc;
6591
6592 return e1000e_pm_thaw(dev);
6593}
6594#endif /* CONFIG_PM_SLEEP */
6595
6596static int e1000e_pm_runtime_idle(struct device *dev)
6597{
6598 struct pci_dev *pdev = to_pci_dev(dev);
6599 struct net_device *netdev = pci_get_drvdata(pdev);
6600 struct e1000_adapter *adapter = netdev_priv(netdev);
6601 u16 eee_lp;
6602
6603 eee_lp = adapter->hw.dev_spec.ich8lan.eee_lp_ability;
6604
6605 if (!e1000e_has_link(adapter)) {
6606 adapter->hw.dev_spec.ich8lan.eee_lp_ability = eee_lp;
6607 pm_schedule_suspend(dev, 5 * MSEC_PER_SEC);
6608 }
6609
6610 return -EBUSY;
6611}
6612
6613static int e1000e_pm_runtime_resume(struct device *dev)
6614{
6615 struct pci_dev *pdev = to_pci_dev(dev);
6616 struct net_device *netdev = pci_get_drvdata(pdev);
6617 struct e1000_adapter *adapter = netdev_priv(netdev);
6618 int rc;
6619
6620 rc = __e1000_resume(pdev);
6621 if (rc)
6622 return rc;
6623
6624 if (netdev->flags & IFF_UP)
6625 e1000e_up(adapter);
6626
6627 return rc;
6628}
6629
6630static int e1000e_pm_runtime_suspend(struct device *dev)
6631{
6632 struct pci_dev *pdev = to_pci_dev(dev);
6633 struct net_device *netdev = pci_get_drvdata(pdev);
6634 struct e1000_adapter *adapter = netdev_priv(netdev);
6635
6636 if (netdev->flags & IFF_UP) {
6637 int count = E1000_CHECK_RESET_COUNT;
6638
6639 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6640 usleep_range(10000, 20000);
6641
6642 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6643
6644 /* Down the device without resetting the hardware */
6645 e1000e_down(adapter, false);
6646 }
6647
6648 if (__e1000_shutdown(pdev, true)) {
6649 e1000e_pm_runtime_resume(dev);
6650 return -EBUSY;
6651 }
6652
6653 return 0;
6654}
6655#endif /* CONFIG_PM */
6656
6657static void e1000_shutdown(struct pci_dev *pdev)
6658{
6659 e1000e_flush_lpic(pdev);
6660
6661 e1000e_pm_freeze(&pdev->dev);
6662
6663 __e1000_shutdown(pdev, false);
6664}
6665
6666#ifdef CONFIG_NET_POLL_CONTROLLER
6667
6668static irqreturn_t e1000_intr_msix(int __always_unused irq, void *data)
6669{
6670 struct net_device *netdev = data;
6671 struct e1000_adapter *adapter = netdev_priv(netdev);
6672
6673 if (adapter->msix_entries) {
6674 int vector, msix_irq;
6675
6676 vector = 0;
6677 msix_irq = adapter->msix_entries[vector].vector;
6678 disable_irq(msix_irq);
6679 e1000_intr_msix_rx(msix_irq, netdev);
6680 enable_irq(msix_irq);
6681
6682 vector++;
6683 msix_irq = adapter->msix_entries[vector].vector;
6684 disable_irq(msix_irq);
6685 e1000_intr_msix_tx(msix_irq, netdev);
6686 enable_irq(msix_irq);
6687
6688 vector++;
6689 msix_irq = adapter->msix_entries[vector].vector;
6690 disable_irq(msix_irq);
6691 e1000_msix_other(msix_irq, netdev);
6692 enable_irq(msix_irq);
6693 }
6694
6695 return IRQ_HANDLED;
6696}
6697
6698/**
6699 * e1000_netpoll
6700 * @netdev: network interface device structure
6701 *
6702 * Polling 'interrupt' - used by things like netconsole to send skbs
6703 * without having to re-enable interrupts. It's not called while
6704 * the interrupt routine is executing.
6705 */
6706static void e1000_netpoll(struct net_device *netdev)
6707{
6708 struct e1000_adapter *adapter = netdev_priv(netdev);
6709
6710 switch (adapter->int_mode) {
6711 case E1000E_INT_MODE_MSIX:
6712 e1000_intr_msix(adapter->pdev->irq, netdev);
6713 break;
6714 case E1000E_INT_MODE_MSI:
6715 disable_irq(adapter->pdev->irq);
6716 e1000_intr_msi(adapter->pdev->irq, netdev);
6717 enable_irq(adapter->pdev->irq);
6718 break;
6719 default: /* E1000E_INT_MODE_LEGACY */
6720 disable_irq(adapter->pdev->irq);
6721 e1000_intr(adapter->pdev->irq, netdev);
6722 enable_irq(adapter->pdev->irq);
6723 break;
6724 }
6725}
6726#endif
6727
6728/**
6729 * e1000_io_error_detected - called when PCI error is detected
6730 * @pdev: Pointer to PCI device
6731 * @state: The current pci connection state
6732 *
6733 * This function is called after a PCI bus error affecting
6734 * this device has been detected.
6735 */
6736static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
6737 pci_channel_state_t state)
6738{
6739 struct net_device *netdev = pci_get_drvdata(pdev);
6740 struct e1000_adapter *adapter = netdev_priv(netdev);
6741
6742 netif_device_detach(netdev);
6743
6744 if (state == pci_channel_io_perm_failure)
6745 return PCI_ERS_RESULT_DISCONNECT;
6746
6747 if (netif_running(netdev))
6748 e1000e_down(adapter, true);
6749 pci_disable_device(pdev);
6750
6751 /* Request a slot slot reset. */
6752 return PCI_ERS_RESULT_NEED_RESET;
6753}
6754
6755/**
6756 * e1000_io_slot_reset - called after the pci bus has been reset.
6757 * @pdev: Pointer to PCI device
6758 *
6759 * Restart the card from scratch, as if from a cold-boot. Implementation
6760 * resembles the first-half of the e1000e_pm_resume routine.
6761 */
6762static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
6763{
6764 struct net_device *netdev = pci_get_drvdata(pdev);
6765 struct e1000_adapter *adapter = netdev_priv(netdev);
6766 struct e1000_hw *hw = &adapter->hw;
6767 u16 aspm_disable_flag = 0;
6768 int err;
6769 pci_ers_result_t result;
6770
6771 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L0S)
6772 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6773 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
6774 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6775 if (aspm_disable_flag)
6776 e1000e_disable_aspm_locked(pdev, aspm_disable_flag);
6777
6778 err = pci_enable_device_mem(pdev);
6779 if (err) {
6780 dev_err(&pdev->dev,
6781 "Cannot re-enable PCI device after reset.\n");
6782 result = PCI_ERS_RESULT_DISCONNECT;
6783 } else {
6784 pdev->state_saved = true;
6785 pci_restore_state(pdev);
6786 pci_set_master(pdev);
6787
6788 pci_enable_wake(pdev, PCI_D3hot, 0);
6789 pci_enable_wake(pdev, PCI_D3cold, 0);
6790
6791 e1000e_reset(adapter);
6792 ew32(WUS, ~0);
6793 result = PCI_ERS_RESULT_RECOVERED;
6794 }
6795
6796 pci_cleanup_aer_uncorrect_error_status(pdev);
6797
6798 return result;
6799}
6800
6801/**
6802 * e1000_io_resume - called when traffic can start flowing again.
6803 * @pdev: Pointer to PCI device
6804 *
6805 * This callback is called when the error recovery driver tells us that
6806 * its OK to resume normal operation. Implementation resembles the
6807 * second-half of the e1000e_pm_resume routine.
6808 */
6809static void e1000_io_resume(struct pci_dev *pdev)
6810{
6811 struct net_device *netdev = pci_get_drvdata(pdev);
6812 struct e1000_adapter *adapter = netdev_priv(netdev);
6813
6814 e1000_init_manageability_pt(adapter);
6815
6816 if (netif_running(netdev))
6817 e1000e_up(adapter);
6818
6819 netif_device_attach(netdev);
6820
6821 /* If the controller has AMT, do not set DRV_LOAD until the interface
6822 * is up. For all other cases, let the f/w know that the h/w is now
6823 * under the control of the driver.
6824 */
6825 if (!(adapter->flags & FLAG_HAS_AMT))
6826 e1000e_get_hw_control(adapter);
6827}
6828
6829static void e1000_print_device_info(struct e1000_adapter *adapter)
6830{
6831 struct e1000_hw *hw = &adapter->hw;
6832 struct net_device *netdev = adapter->netdev;
6833 u32 ret_val;
6834 u8 pba_str[E1000_PBANUM_LENGTH];
6835
6836 /* print bus type/speed/width info */
6837 e_info("(PCI Express:2.5GT/s:%s) %pM\n",
6838 /* bus width */
6839 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
6840 "Width x1"),
6841 /* MAC address */
6842 netdev->dev_addr);
6843 e_info("Intel(R) PRO/%s Network Connection\n",
6844 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
6845 ret_val = e1000_read_pba_string_generic(hw, pba_str,
6846 E1000_PBANUM_LENGTH);
6847 if (ret_val)
6848 strlcpy((char *)pba_str, "Unknown", sizeof(pba_str));
6849 e_info("MAC: %d, PHY: %d, PBA No: %s\n",
6850 hw->mac.type, hw->phy.type, pba_str);
6851}
6852
6853static void e1000_eeprom_checks(struct e1000_adapter *adapter)
6854{
6855 struct e1000_hw *hw = &adapter->hw;
6856 int ret_val;
6857 u16 buf = 0;
6858
6859 if (hw->mac.type != e1000_82573)
6860 return;
6861
6862 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
6863 le16_to_cpus(&buf);
6864 if (!ret_val && (!(buf & (1 << 0)))) {
6865 /* Deep Smart Power Down (DSPD) */
6866 dev_warn(&adapter->pdev->dev,
6867 "Warning: detected DSPD enabled in EEPROM\n");
6868 }
6869}
6870
6871static netdev_features_t e1000_fix_features(struct net_device *netdev,
6872 netdev_features_t features)
6873{
6874 struct e1000_adapter *adapter = netdev_priv(netdev);
6875 struct e1000_hw *hw = &adapter->hw;
6876
6877 /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
6878 if ((hw->mac.type >= e1000_pch2lan) && (netdev->mtu > ETH_DATA_LEN))
6879 features &= ~NETIF_F_RXFCS;
6880
6881 return features;
6882}
6883
6884static int e1000_set_features(struct net_device *netdev,
6885 netdev_features_t features)
6886{
6887 struct e1000_adapter *adapter = netdev_priv(netdev);
6888 netdev_features_t changed = features ^ netdev->features;
6889
6890 if (changed & (NETIF_F_TSO | NETIF_F_TSO6))
6891 adapter->flags |= FLAG_TSO_FORCE;
6892
6893 if (!(changed & (NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX |
6894 NETIF_F_RXCSUM | NETIF_F_RXHASH | NETIF_F_RXFCS |
6895 NETIF_F_RXALL)))
6896 return 0;
6897
6898 if (changed & NETIF_F_RXFCS) {
6899 if (features & NETIF_F_RXFCS) {
6900 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6901 } else {
6902 /* We need to take it back to defaults, which might mean
6903 * stripping is still disabled at the adapter level.
6904 */
6905 if (adapter->flags2 & FLAG2_DFLT_CRC_STRIPPING)
6906 adapter->flags2 |= FLAG2_CRC_STRIPPING;
6907 else
6908 adapter->flags2 &= ~FLAG2_CRC_STRIPPING;
6909 }
6910 }
6911
6912 netdev->features = features;
6913
6914 if (netif_running(netdev))
6915 e1000e_reinit_locked(adapter);
6916 else
6917 e1000e_reset(adapter);
6918
6919 return 0;
6920}
6921
6922static const struct net_device_ops e1000e_netdev_ops = {
6923 .ndo_open = e1000_open,
6924 .ndo_stop = e1000_close,
6925 .ndo_start_xmit = e1000_xmit_frame,
6926 .ndo_get_stats64 = e1000e_get_stats64,
6927 .ndo_set_rx_mode = e1000e_set_rx_mode,
6928 .ndo_set_mac_address = e1000_set_mac,
6929 .ndo_change_mtu = e1000_change_mtu,
6930 .ndo_do_ioctl = e1000_ioctl,
6931 .ndo_tx_timeout = e1000_tx_timeout,
6932 .ndo_validate_addr = eth_validate_addr,
6933
6934 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
6935 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
6936#ifdef CONFIG_NET_POLL_CONTROLLER
6937 .ndo_poll_controller = e1000_netpoll,
6938#endif
6939 .ndo_set_features = e1000_set_features,
6940 .ndo_fix_features = e1000_fix_features,
6941 .ndo_features_check = passthru_features_check,
6942};
6943
6944/**
6945 * e1000_probe - Device Initialization Routine
6946 * @pdev: PCI device information struct
6947 * @ent: entry in e1000_pci_tbl
6948 *
6949 * Returns 0 on success, negative on failure
6950 *
6951 * e1000_probe initializes an adapter identified by a pci_dev structure.
6952 * The OS initialization, configuring of the adapter private structure,
6953 * and a hardware reset occur.
6954 **/
6955static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
6956{
6957 struct net_device *netdev;
6958 struct e1000_adapter *adapter;
6959 struct e1000_hw *hw;
6960 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
6961 resource_size_t mmio_start, mmio_len;
6962 resource_size_t flash_start, flash_len;
6963 static int cards_found;
6964 u16 aspm_disable_flag = 0;
6965 int bars, i, err, pci_using_dac;
6966 u16 eeprom_data = 0;
6967 u16 eeprom_apme_mask = E1000_EEPROM_APME;
6968 s32 rval = 0;
6969
6970 if (ei->flags2 & FLAG2_DISABLE_ASPM_L0S)
6971 aspm_disable_flag = PCIE_LINK_STATE_L0S;
6972 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
6973 aspm_disable_flag |= PCIE_LINK_STATE_L1;
6974 if (aspm_disable_flag)
6975 e1000e_disable_aspm(pdev, aspm_disable_flag);
6976
6977 err = pci_enable_device_mem(pdev);
6978 if (err)
6979 return err;
6980
6981 pci_using_dac = 0;
6982 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
6983 if (!err) {
6984 pci_using_dac = 1;
6985 } else {
6986 err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
6987 if (err) {
6988 dev_err(&pdev->dev,
6989 "No usable DMA configuration, aborting\n");
6990 goto err_dma;
6991 }
6992 }
6993
6994 bars = pci_select_bars(pdev, IORESOURCE_MEM);
6995 err = pci_request_selected_regions_exclusive(pdev, bars,
6996 e1000e_driver_name);
6997 if (err)
6998 goto err_pci_reg;
6999
7000 /* AER (Advanced Error Reporting) hooks */
7001 pci_enable_pcie_error_reporting(pdev);
7002
7003 pci_set_master(pdev);
7004 /* PCI config space info */
7005 err = pci_save_state(pdev);
7006 if (err)
7007 goto err_alloc_etherdev;
7008
7009 err = -ENOMEM;
7010 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
7011 if (!netdev)
7012 goto err_alloc_etherdev;
7013
7014 SET_NETDEV_DEV(netdev, &pdev->dev);
7015
7016 netdev->irq = pdev->irq;
7017
7018 pci_set_drvdata(pdev, netdev);
7019 adapter = netdev_priv(netdev);
7020 hw = &adapter->hw;
7021 adapter->netdev = netdev;
7022 adapter->pdev = pdev;
7023 adapter->ei = ei;
7024 adapter->pba = ei->pba;
7025 adapter->flags = ei->flags;
7026 adapter->flags2 = ei->flags2;
7027 adapter->hw.adapter = adapter;
7028 adapter->hw.mac.type = ei->mac;
7029 adapter->max_hw_frame_size = ei->max_hw_frame_size;
7030 adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
7031
7032 mmio_start = pci_resource_start(pdev, 0);
7033 mmio_len = pci_resource_len(pdev, 0);
7034
7035 err = -EIO;
7036 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
7037 if (!adapter->hw.hw_addr)
7038 goto err_ioremap;
7039
7040 if ((adapter->flags & FLAG_HAS_FLASH) &&
7041 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM) &&
7042 (hw->mac.type < e1000_pch_spt)) {
7043 flash_start = pci_resource_start(pdev, 1);
7044 flash_len = pci_resource_len(pdev, 1);
7045 adapter->hw.flash_address = ioremap(flash_start, flash_len);
7046 if (!adapter->hw.flash_address)
7047 goto err_flashmap;
7048 }
7049
7050 /* Set default EEE advertisement */
7051 if (adapter->flags2 & FLAG2_HAS_EEE)
7052 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
7053
7054 /* construct the net_device struct */
7055 netdev->netdev_ops = &e1000e_netdev_ops;
7056 e1000e_set_ethtool_ops(netdev);
7057 netdev->watchdog_timeo = 5 * HZ;
7058 netif_napi_add(netdev, &adapter->napi, e1000e_poll, 64);
7059 strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
7060
7061 netdev->mem_start = mmio_start;
7062 netdev->mem_end = mmio_start + mmio_len;
7063
7064 adapter->bd_number = cards_found++;
7065
7066 e1000e_check_options(adapter);
7067
7068 /* setup adapter struct */
7069 err = e1000_sw_init(adapter);
7070 if (err)
7071 goto err_sw_init;
7072
7073 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
7074 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
7075 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
7076
7077 err = ei->get_variants(adapter);
7078 if (err)
7079 goto err_hw_init;
7080
7081 if ((adapter->flags & FLAG_IS_ICH) &&
7082 (adapter->flags & FLAG_READ_ONLY_NVM) &&
7083 (hw->mac.type < e1000_pch_spt))
7084 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
7085
7086 hw->mac.ops.get_bus_info(&adapter->hw);
7087
7088 adapter->hw.phy.autoneg_wait_to_complete = 0;
7089
7090 /* Copper options */
7091 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
7092 adapter->hw.phy.mdix = AUTO_ALL_MODES;
7093 adapter->hw.phy.disable_polarity_correction = 0;
7094 adapter->hw.phy.ms_type = e1000_ms_hw_default;
7095 }
7096
7097 if (hw->phy.ops.check_reset_block && hw->phy.ops.check_reset_block(hw))
7098 dev_info(&pdev->dev,
7099 "PHY reset is blocked due to SOL/IDER session.\n");
7100
7101 /* Set initial default active device features */
7102 netdev->features = (NETIF_F_SG |
7103 NETIF_F_HW_VLAN_CTAG_RX |
7104 NETIF_F_HW_VLAN_CTAG_TX |
7105 NETIF_F_TSO |
7106 NETIF_F_TSO6 |
7107 NETIF_F_RXHASH |
7108 NETIF_F_RXCSUM |
7109 NETIF_F_HW_CSUM);
7110
7111 /* Set user-changeable features (subset of all device features) */
7112 netdev->hw_features = netdev->features;
7113 netdev->hw_features |= NETIF_F_RXFCS;
7114 netdev->priv_flags |= IFF_SUPP_NOFCS;
7115 netdev->hw_features |= NETIF_F_RXALL;
7116
7117 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
7118 netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
7119
7120 netdev->vlan_features |= (NETIF_F_SG |
7121 NETIF_F_TSO |
7122 NETIF_F_TSO6 |
7123 NETIF_F_HW_CSUM);
7124
7125 netdev->priv_flags |= IFF_UNICAST_FLT;
7126
7127 if (pci_using_dac) {
7128 netdev->features |= NETIF_F_HIGHDMA;
7129 netdev->vlan_features |= NETIF_F_HIGHDMA;
7130 }
7131
7132 if (e1000e_enable_mng_pass_thru(&adapter->hw))
7133 adapter->flags |= FLAG_MNG_PT_ENABLED;
7134
7135 /* before reading the NVM, reset the controller to
7136 * put the device in a known good starting state
7137 */
7138 adapter->hw.mac.ops.reset_hw(&adapter->hw);
7139
7140 /* systems with ASPM and others may see the checksum fail on the first
7141 * attempt. Let's give it a few tries
7142 */
7143 for (i = 0;; i++) {
7144 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
7145 break;
7146 if (i == 2) {
7147 dev_err(&pdev->dev, "The NVM Checksum Is Not Valid\n");
7148 err = -EIO;
7149 goto err_eeprom;
7150 }
7151 }
7152
7153 e1000_eeprom_checks(adapter);
7154
7155 /* copy the MAC address */
7156 if (e1000e_read_mac_addr(&adapter->hw))
7157 dev_err(&pdev->dev,
7158 "NVM Read Error while reading MAC address\n");
7159
7160 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
7161
7162 if (!is_valid_ether_addr(netdev->dev_addr)) {
7163 dev_err(&pdev->dev, "Invalid MAC Address: %pM\n",
7164 netdev->dev_addr);
7165 err = -EIO;
7166 goto err_eeprom;
7167 }
7168
7169 init_timer(&adapter->watchdog_timer);
7170 adapter->watchdog_timer.function = e1000_watchdog;
7171 adapter->watchdog_timer.data = (unsigned long)adapter;
7172
7173 init_timer(&adapter->phy_info_timer);
7174 adapter->phy_info_timer.function = e1000_update_phy_info;
7175 adapter->phy_info_timer.data = (unsigned long)adapter;
7176
7177 INIT_WORK(&adapter->reset_task, e1000_reset_task);
7178 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
7179 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
7180 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
7181 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
7182
7183 /* Initialize link parameters. User can change them with ethtool */
7184 adapter->hw.mac.autoneg = 1;
7185 adapter->fc_autoneg = true;
7186 adapter->hw.fc.requested_mode = e1000_fc_default;
7187 adapter->hw.fc.current_mode = e1000_fc_default;
7188 adapter->hw.phy.autoneg_advertised = 0x2f;
7189
7190 /* Initial Wake on LAN setting - If APM wake is enabled in
7191 * the EEPROM, enable the ACPI Magic Packet filter
7192 */
7193 if (adapter->flags & FLAG_APME_IN_WUC) {
7194 /* APME bit in EEPROM is mapped to WUC.APME */
7195 eeprom_data = er32(WUC);
7196 eeprom_apme_mask = E1000_WUC_APME;
7197 if ((hw->mac.type > e1000_ich10lan) &&
7198 (eeprom_data & E1000_WUC_PHY_WAKE))
7199 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
7200 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
7201 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
7202 (adapter->hw.bus.func == 1))
7203 rval = e1000_read_nvm(&adapter->hw,
7204 NVM_INIT_CONTROL3_PORT_B,
7205 1, &eeprom_data);
7206 else
7207 rval = e1000_read_nvm(&adapter->hw,
7208 NVM_INIT_CONTROL3_PORT_A,
7209 1, &eeprom_data);
7210 }
7211
7212 /* fetch WoL from EEPROM */
7213 if (rval)
7214 e_dbg("NVM read error getting WoL initial values: %d\n", rval);
7215 else if (eeprom_data & eeprom_apme_mask)
7216 adapter->eeprom_wol |= E1000_WUFC_MAG;
7217
7218 /* now that we have the eeprom settings, apply the special cases
7219 * where the eeprom may be wrong or the board simply won't support
7220 * wake on lan on a particular port
7221 */
7222 if (!(adapter->flags & FLAG_HAS_WOL))
7223 adapter->eeprom_wol = 0;
7224
7225 /* initialize the wol settings based on the eeprom settings */
7226 adapter->wol = adapter->eeprom_wol;
7227
7228 /* make sure adapter isn't asleep if manageability is enabled */
7229 if (adapter->wol || (adapter->flags & FLAG_MNG_PT_ENABLED) ||
7230 (hw->mac.ops.check_mng_mode(hw)))
7231 device_wakeup_enable(&pdev->dev);
7232
7233 /* save off EEPROM version number */
7234 rval = e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
7235
7236 if (rval) {
7237 e_dbg("NVM read error getting EEPROM version: %d\n", rval);
7238 adapter->eeprom_vers = 0;
7239 }
7240
7241 /* reset the hardware with the new settings */
7242 e1000e_reset(adapter);
7243
7244 /* If the controller has AMT, do not set DRV_LOAD until the interface
7245 * is up. For all other cases, let the f/w know that the h/w is now
7246 * under the control of the driver.
7247 */
7248 if (!(adapter->flags & FLAG_HAS_AMT))
7249 e1000e_get_hw_control(adapter);
7250
7251 strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
7252 err = register_netdev(netdev);
7253 if (err)
7254 goto err_register;
7255
7256 /* carrier off reporting is important to ethtool even BEFORE open */
7257 netif_carrier_off(netdev);
7258
7259 /* init PTP hardware clock */
7260 e1000e_ptp_init(adapter);
7261
7262 e1000_print_device_info(adapter);
7263
7264 if (pci_dev_run_wake(pdev))
7265 pm_runtime_put_noidle(&pdev->dev);
7266
7267 return 0;
7268
7269err_register:
7270 if (!(adapter->flags & FLAG_HAS_AMT))
7271 e1000e_release_hw_control(adapter);
7272err_eeprom:
7273 if (hw->phy.ops.check_reset_block && !hw->phy.ops.check_reset_block(hw))
7274 e1000_phy_hw_reset(&adapter->hw);
7275err_hw_init:
7276 kfree(adapter->tx_ring);
7277 kfree(adapter->rx_ring);
7278err_sw_init:
7279 if ((adapter->hw.flash_address) && (hw->mac.type < e1000_pch_spt))
7280 iounmap(adapter->hw.flash_address);
7281 e1000e_reset_interrupt_capability(adapter);
7282err_flashmap:
7283 iounmap(adapter->hw.hw_addr);
7284err_ioremap:
7285 free_netdev(netdev);
7286err_alloc_etherdev:
7287 pci_release_selected_regions(pdev,
7288 pci_select_bars(pdev, IORESOURCE_MEM));
7289err_pci_reg:
7290err_dma:
7291 pci_disable_device(pdev);
7292 return err;
7293}
7294
7295/**
7296 * e1000_remove - Device Removal Routine
7297 * @pdev: PCI device information struct
7298 *
7299 * e1000_remove is called by the PCI subsystem to alert the driver
7300 * that it should release a PCI device. The could be caused by a
7301 * Hot-Plug event, or because the driver is going to be removed from
7302 * memory.
7303 **/
7304static void e1000_remove(struct pci_dev *pdev)
7305{
7306 struct net_device *netdev = pci_get_drvdata(pdev);
7307 struct e1000_adapter *adapter = netdev_priv(netdev);
7308 bool down = test_bit(__E1000_DOWN, &adapter->state);
7309
7310 e1000e_ptp_remove(adapter);
7311
7312 /* The timers may be rescheduled, so explicitly disable them
7313 * from being rescheduled.
7314 */
7315 if (!down)
7316 set_bit(__E1000_DOWN, &adapter->state);
7317 del_timer_sync(&adapter->watchdog_timer);
7318 del_timer_sync(&adapter->phy_info_timer);
7319
7320 cancel_work_sync(&adapter->reset_task);
7321 cancel_work_sync(&adapter->watchdog_task);
7322 cancel_work_sync(&adapter->downshift_task);
7323 cancel_work_sync(&adapter->update_phy_task);
7324 cancel_work_sync(&adapter->print_hang_task);
7325
7326 if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
7327 cancel_work_sync(&adapter->tx_hwtstamp_work);
7328 if (adapter->tx_hwtstamp_skb) {
7329 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
7330 adapter->tx_hwtstamp_skb = NULL;
7331 }
7332 }
7333
7334 /* Don't lie to e1000_close() down the road. */
7335 if (!down)
7336 clear_bit(__E1000_DOWN, &adapter->state);
7337 unregister_netdev(netdev);
7338
7339 if (pci_dev_run_wake(pdev))
7340 pm_runtime_get_noresume(&pdev->dev);
7341
7342 /* Release control of h/w to f/w. If f/w is AMT enabled, this
7343 * would have already happened in close and is redundant.
7344 */
7345 e1000e_release_hw_control(adapter);
7346
7347 e1000e_reset_interrupt_capability(adapter);
7348 kfree(adapter->tx_ring);
7349 kfree(adapter->rx_ring);
7350
7351 iounmap(adapter->hw.hw_addr);
7352 if ((adapter->hw.flash_address) &&
7353 (adapter->hw.mac.type < e1000_pch_spt))
7354 iounmap(adapter->hw.flash_address);
7355 pci_release_selected_regions(pdev,
7356 pci_select_bars(pdev, IORESOURCE_MEM));
7357
7358 free_netdev(netdev);
7359
7360 /* AER disable */
7361 pci_disable_pcie_error_reporting(pdev);
7362
7363 pci_disable_device(pdev);
7364}
7365
7366/* PCI Error Recovery (ERS) */
7367static const struct pci_error_handlers e1000_err_handler = {
7368 .error_detected = e1000_io_error_detected,
7369 .slot_reset = e1000_io_slot_reset,
7370 .resume = e1000_io_resume,
7371};
7372
7373static const struct pci_device_id e1000_pci_tbl[] = {
7374 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
7375 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
7376 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
7377 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP),
7378 board_82571 },
7379 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
7380 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
7381 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
7382 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
7383 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
7384
7385 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
7386 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
7387 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
7388 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
7389
7390 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
7391 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
7392 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
7393
7394 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
7395 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
7396 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
7397
7398 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
7399 board_80003es2lan },
7400 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
7401 board_80003es2lan },
7402 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
7403 board_80003es2lan },
7404 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
7405 board_80003es2lan },
7406
7407 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
7408 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
7409 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
7410 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
7411 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
7412 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
7413 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
7414 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
7415
7416 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
7417 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
7418 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
7419 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
7420 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
7421 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
7422 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
7423 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
7424 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
7425
7426 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
7427 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
7428 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
7429
7430 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
7431 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
7432 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_V), board_ich10lan },
7433
7434 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
7435 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
7436 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
7437 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
7438
7439 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_LM), board_pch2lan },
7440 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH2_LV_V), board_pch2lan },
7441
7442 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
7443 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
7444 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
7445 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
7446 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM2), board_pch_lpt },
7447 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V2), board_pch_lpt },
7448 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_LM3), board_pch_lpt },
7449 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_I218_V3), board_pch_lpt },
7450 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM), board_pch_spt },
7451 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V), board_pch_spt },
7452 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM2), board_pch_spt },
7453 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V2), board_pch_spt },
7454 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LBG_I219_LM3), board_pch_spt },
7455 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM4), board_pch_spt },
7456 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V4), board_pch_spt },
7457 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_LM5), board_pch_spt },
7458 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_SPT_I219_V5), board_pch_spt },
7459
7460 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
7461};
7462MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
7463
7464static const struct dev_pm_ops e1000_pm_ops = {
7465#ifdef CONFIG_PM_SLEEP
7466 .suspend = e1000e_pm_suspend,
7467 .resume = e1000e_pm_resume,
7468 .freeze = e1000e_pm_freeze,
7469 .thaw = e1000e_pm_thaw,
7470 .poweroff = e1000e_pm_suspend,
7471 .restore = e1000e_pm_resume,
7472#endif
7473 SET_RUNTIME_PM_OPS(e1000e_pm_runtime_suspend, e1000e_pm_runtime_resume,
7474 e1000e_pm_runtime_idle)
7475};
7476
7477/* PCI Device API Driver */
7478static struct pci_driver e1000_driver = {
7479 .name = e1000e_driver_name,
7480 .id_table = e1000_pci_tbl,
7481 .probe = e1000_probe,
7482 .remove = e1000_remove,
7483 .driver = {
7484 .pm = &e1000_pm_ops,
7485 },
7486 .shutdown = e1000_shutdown,
7487 .err_handler = &e1000_err_handler
7488};
7489
7490/**
7491 * e1000_init_module - Driver Registration Routine
7492 *
7493 * e1000_init_module is the first routine called when the driver is
7494 * loaded. All it does is register with the PCI subsystem.
7495 **/
7496static int __init e1000_init_module(void)
7497{
7498 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
7499 e1000e_driver_version);
7500 pr_info("Copyright(c) 1999 - 2015 Intel Corporation.\n");
7501
7502 return pci_register_driver(&e1000_driver);
7503}
7504module_init(e1000_init_module);
7505
7506/**
7507 * e1000_exit_module - Driver Exit Cleanup Routine
7508 *
7509 * e1000_exit_module is called just before the driver is removed
7510 * from memory.
7511 **/
7512static void __exit e1000_exit_module(void)
7513{
7514 pci_unregister_driver(&e1000_driver);
7515}
7516module_exit(e1000_exit_module);
7517
7518MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
7519MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
7520MODULE_LICENSE("GPL");
7521MODULE_VERSION(DRV_VERSION);
7522
7523/* netdev.c */