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1/*
2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
3 *
4 * For licencing details see kernel-base/COPYING
5 */
6#include <linux/init.h>
7#include <linux/ioport.h>
8#include <linux/module.h>
9#include <linux/pci.h>
10
11#include <asm/bios_ebda.h>
12#include <asm/paravirt.h>
13#include <asm/pci_x86.h>
14#include <asm/pci.h>
15#include <asm/mpspec.h>
16#include <asm/setup.h>
17#include <asm/apic.h>
18#include <asm/e820.h>
19#include <asm/time.h>
20#include <asm/irq.h>
21#include <asm/io_apic.h>
22#include <asm/pat.h>
23#include <asm/tsc.h>
24#include <asm/iommu.h>
25#include <asm/mach_traps.h>
26
27void __cpuinit x86_init_noop(void) { }
28void __init x86_init_uint_noop(unsigned int unused) { }
29void __init x86_init_pgd_noop(pgd_t *unused) { }
30int __init iommu_init_noop(void) { return 0; }
31void iommu_shutdown_noop(void) { }
32void wallclock_init_noop(void) { }
33
34/*
35 * The platform setup functions are preset with the default functions
36 * for standard PC hardware.
37 */
38struct x86_init_ops x86_init __initdata = {
39
40 .resources = {
41 .probe_roms = probe_roms,
42 .reserve_resources = reserve_standard_io_resources,
43 .memory_setup = default_machine_specific_memory_setup,
44 },
45
46 .mpparse = {
47 .mpc_record = x86_init_uint_noop,
48 .setup_ioapic_ids = x86_init_noop,
49 .mpc_apic_id = default_mpc_apic_id,
50 .smp_read_mpc_oem = default_smp_read_mpc_oem,
51 .mpc_oem_bus_info = default_mpc_oem_bus_info,
52 .find_smp_config = default_find_smp_config,
53 .get_smp_config = default_get_smp_config,
54 },
55
56 .irqs = {
57 .pre_vector_init = init_ISA_irqs,
58 .intr_init = native_init_IRQ,
59 .trap_init = x86_init_noop,
60 },
61
62 .oem = {
63 .arch_setup = x86_init_noop,
64 .banner = default_banner,
65 },
66
67 .mapping = {
68 .pagetable_reserve = native_pagetable_reserve,
69 },
70
71 .paging = {
72 .pagetable_setup_start = native_pagetable_setup_start,
73 .pagetable_setup_done = native_pagetable_setup_done,
74 },
75
76 .timers = {
77 .setup_percpu_clockev = setup_boot_APIC_clock,
78 .tsc_pre_init = x86_init_noop,
79 .timer_init = hpet_time_init,
80 .wallclock_init = x86_init_noop,
81 },
82
83 .iommu = {
84 .iommu_init = iommu_init_noop,
85 },
86
87 .pci = {
88 .init = x86_default_pci_init,
89 .init_irq = x86_default_pci_init_irq,
90 .fixup_irqs = x86_default_pci_fixup_irqs,
91 },
92};
93
94struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = {
95 .early_percpu_clock_init = x86_init_noop,
96 .setup_percpu_clockev = setup_secondary_APIC_clock,
97};
98
99static void default_nmi_init(void) { };
100static int default_i8042_detect(void) { return 1; };
101
102struct x86_platform_ops x86_platform = {
103 .calibrate_tsc = native_calibrate_tsc,
104 .wallclock_init = wallclock_init_noop,
105 .get_wallclock = mach_get_cmos_time,
106 .set_wallclock = mach_set_rtc_mmss,
107 .iommu_shutdown = iommu_shutdown_noop,
108 .is_untracked_pat_range = is_ISA_range,
109 .nmi_init = default_nmi_init,
110 .get_nmi_reason = default_get_nmi_reason,
111 .i8042_detect = default_i8042_detect,
112 .save_sched_clock_state = tsc_save_sched_clock_state,
113 .restore_sched_clock_state = tsc_restore_sched_clock_state,
114};
115
116EXPORT_SYMBOL_GPL(x86_platform);
117struct x86_msi_ops x86_msi = {
118 .setup_msi_irqs = native_setup_msi_irqs,
119 .teardown_msi_irq = native_teardown_msi_irq,
120 .teardown_msi_irqs = default_teardown_msi_irqs,
121 .restore_msi_irqs = default_restore_msi_irqs,
122};
123
124struct x86_io_apic_ops x86_io_apic_ops = {
125 .init = native_io_apic_init_mappings,
126 .read = native_io_apic_read,
127 .write = native_io_apic_write,
128 .modify = native_io_apic_modify,
129};
1/*
2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
3 *
4 * For licencing details see kernel-base/COPYING
5 */
6#include <linux/init.h>
7#include <linux/ioport.h>
8#include <linux/export.h>
9#include <linux/pci.h>
10
11#include <asm/acpi.h>
12#include <asm/bios_ebda.h>
13#include <asm/paravirt.h>
14#include <asm/pci_x86.h>
15#include <asm/mpspec.h>
16#include <asm/setup.h>
17#include <asm/apic.h>
18#include <asm/e820/api.h>
19#include <asm/time.h>
20#include <asm/irq.h>
21#include <asm/io_apic.h>
22#include <asm/hpet.h>
23#include <asm/memtype.h>
24#include <asm/tsc.h>
25#include <asm/iommu.h>
26#include <asm/mach_traps.h>
27#include <asm/irqdomain.h>
28
29void x86_init_noop(void) { }
30void __init x86_init_uint_noop(unsigned int unused) { }
31static int __init iommu_init_noop(void) { return 0; }
32static void iommu_shutdown_noop(void) { }
33bool __init bool_x86_init_noop(void) { return false; }
34void x86_op_int_noop(int cpu) { }
35static __init int set_rtc_noop(const struct timespec64 *now) { return -EINVAL; }
36static __init void get_rtc_noop(struct timespec64 *now) { }
37
38static __initconst const struct of_device_id of_cmos_match[] = {
39 { .compatible = "motorola,mc146818" },
40 {}
41};
42
43/*
44 * Allow devicetree configured systems to disable the RTC by setting the
45 * corresponding DT node's status property to disabled. Code is optimized
46 * out for CONFIG_OF=n builds.
47 */
48static __init void x86_wallclock_init(void)
49{
50 struct device_node *node = of_find_matching_node(NULL, of_cmos_match);
51
52 if (node && !of_device_is_available(node)) {
53 x86_platform.get_wallclock = get_rtc_noop;
54 x86_platform.set_wallclock = set_rtc_noop;
55 }
56}
57
58/*
59 * The platform setup functions are preset with the default functions
60 * for standard PC hardware.
61 */
62struct x86_init_ops x86_init __initdata = {
63
64 .resources = {
65 .probe_roms = probe_roms,
66 .reserve_resources = reserve_standard_io_resources,
67 .memory_setup = e820__memory_setup_default,
68 },
69
70 .mpparse = {
71 .setup_ioapic_ids = x86_init_noop,
72 .find_smp_config = default_find_smp_config,
73 .get_smp_config = default_get_smp_config,
74 },
75
76 .irqs = {
77 .pre_vector_init = init_ISA_irqs,
78 .intr_init = native_init_IRQ,
79 .intr_mode_select = apic_intr_mode_select,
80 .intr_mode_init = apic_intr_mode_init,
81 .create_pci_msi_domain = native_create_pci_msi_domain,
82 },
83
84 .oem = {
85 .arch_setup = x86_init_noop,
86 .banner = default_banner,
87 },
88
89 .paging = {
90 .pagetable_init = native_pagetable_init,
91 },
92
93 .timers = {
94 .setup_percpu_clockev = setup_boot_APIC_clock,
95 .timer_init = hpet_time_init,
96 .wallclock_init = x86_wallclock_init,
97 },
98
99 .iommu = {
100 .iommu_init = iommu_init_noop,
101 },
102
103 .pci = {
104 .init = x86_default_pci_init,
105 .init_irq = x86_default_pci_init_irq,
106 .fixup_irqs = x86_default_pci_fixup_irqs,
107 },
108
109 .hyper = {
110 .init_platform = x86_init_noop,
111 .guest_late_init = x86_init_noop,
112 .x2apic_available = bool_x86_init_noop,
113 .msi_ext_dest_id = bool_x86_init_noop,
114 .init_mem_mapping = x86_init_noop,
115 .init_after_bootmem = x86_init_noop,
116 },
117
118 .acpi = {
119 .set_root_pointer = x86_default_set_root_pointer,
120 .get_root_pointer = x86_default_get_root_pointer,
121 .reduced_hw_early_init = acpi_generic_reduced_hw_init,
122 },
123};
124
125struct x86_cpuinit_ops x86_cpuinit = {
126 .early_percpu_clock_init = x86_init_noop,
127 .setup_percpu_clockev = setup_secondary_APIC_clock,
128};
129
130static void default_nmi_init(void) { };
131
132struct x86_platform_ops x86_platform __ro_after_init = {
133 .calibrate_cpu = native_calibrate_cpu_early,
134 .calibrate_tsc = native_calibrate_tsc,
135 .get_wallclock = mach_get_cmos_time,
136 .set_wallclock = mach_set_rtc_mmss,
137 .iommu_shutdown = iommu_shutdown_noop,
138 .is_untracked_pat_range = is_ISA_range,
139 .nmi_init = default_nmi_init,
140 .get_nmi_reason = default_get_nmi_reason,
141 .save_sched_clock_state = tsc_save_sched_clock_state,
142 .restore_sched_clock_state = tsc_restore_sched_clock_state,
143 .hyper.pin_vcpu = x86_op_int_noop,
144};
145
146EXPORT_SYMBOL_GPL(x86_platform);
147
148#if defined(CONFIG_PCI_MSI)
149struct x86_msi_ops x86_msi __ro_after_init = {
150 .restore_msi_irqs = default_restore_msi_irqs,
151};
152
153/* MSI arch specific hooks */
154void arch_restore_msi_irqs(struct pci_dev *dev)
155{
156 x86_msi.restore_msi_irqs(dev);
157}
158#endif
159
160struct x86_apic_ops x86_apic_ops __ro_after_init = {
161 .io_apic_read = native_io_apic_read,
162 .restore = native_restore_boot_irq_mode,
163};