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1/*
2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
3 *
4 * For licencing details see kernel-base/COPYING
5 */
6#include <linux/init.h>
7#include <linux/ioport.h>
8#include <linux/module.h>
9#include <linux/pci.h>
10
11#include <asm/bios_ebda.h>
12#include <asm/paravirt.h>
13#include <asm/pci_x86.h>
14#include <asm/pci.h>
15#include <asm/mpspec.h>
16#include <asm/setup.h>
17#include <asm/apic.h>
18#include <asm/e820.h>
19#include <asm/time.h>
20#include <asm/irq.h>
21#include <asm/io_apic.h>
22#include <asm/pat.h>
23#include <asm/tsc.h>
24#include <asm/iommu.h>
25#include <asm/mach_traps.h>
26
27void __cpuinit x86_init_noop(void) { }
28void __init x86_init_uint_noop(unsigned int unused) { }
29void __init x86_init_pgd_noop(pgd_t *unused) { }
30int __init iommu_init_noop(void) { return 0; }
31void iommu_shutdown_noop(void) { }
32void wallclock_init_noop(void) { }
33
34/*
35 * The platform setup functions are preset with the default functions
36 * for standard PC hardware.
37 */
38struct x86_init_ops x86_init __initdata = {
39
40 .resources = {
41 .probe_roms = probe_roms,
42 .reserve_resources = reserve_standard_io_resources,
43 .memory_setup = default_machine_specific_memory_setup,
44 },
45
46 .mpparse = {
47 .mpc_record = x86_init_uint_noop,
48 .setup_ioapic_ids = x86_init_noop,
49 .mpc_apic_id = default_mpc_apic_id,
50 .smp_read_mpc_oem = default_smp_read_mpc_oem,
51 .mpc_oem_bus_info = default_mpc_oem_bus_info,
52 .find_smp_config = default_find_smp_config,
53 .get_smp_config = default_get_smp_config,
54 },
55
56 .irqs = {
57 .pre_vector_init = init_ISA_irqs,
58 .intr_init = native_init_IRQ,
59 .trap_init = x86_init_noop,
60 },
61
62 .oem = {
63 .arch_setup = x86_init_noop,
64 .banner = default_banner,
65 },
66
67 .mapping = {
68 .pagetable_reserve = native_pagetable_reserve,
69 },
70
71 .paging = {
72 .pagetable_setup_start = native_pagetable_setup_start,
73 .pagetable_setup_done = native_pagetable_setup_done,
74 },
75
76 .timers = {
77 .setup_percpu_clockev = setup_boot_APIC_clock,
78 .tsc_pre_init = x86_init_noop,
79 .timer_init = hpet_time_init,
80 .wallclock_init = x86_init_noop,
81 },
82
83 .iommu = {
84 .iommu_init = iommu_init_noop,
85 },
86
87 .pci = {
88 .init = x86_default_pci_init,
89 .init_irq = x86_default_pci_init_irq,
90 .fixup_irqs = x86_default_pci_fixup_irqs,
91 },
92};
93
94struct x86_cpuinit_ops x86_cpuinit __cpuinitdata = {
95 .early_percpu_clock_init = x86_init_noop,
96 .setup_percpu_clockev = setup_secondary_APIC_clock,
97};
98
99static void default_nmi_init(void) { };
100static int default_i8042_detect(void) { return 1; };
101
102struct x86_platform_ops x86_platform = {
103 .calibrate_tsc = native_calibrate_tsc,
104 .wallclock_init = wallclock_init_noop,
105 .get_wallclock = mach_get_cmos_time,
106 .set_wallclock = mach_set_rtc_mmss,
107 .iommu_shutdown = iommu_shutdown_noop,
108 .is_untracked_pat_range = is_ISA_range,
109 .nmi_init = default_nmi_init,
110 .get_nmi_reason = default_get_nmi_reason,
111 .i8042_detect = default_i8042_detect,
112 .save_sched_clock_state = tsc_save_sched_clock_state,
113 .restore_sched_clock_state = tsc_restore_sched_clock_state,
114};
115
116EXPORT_SYMBOL_GPL(x86_platform);
117struct x86_msi_ops x86_msi = {
118 .setup_msi_irqs = native_setup_msi_irqs,
119 .teardown_msi_irq = native_teardown_msi_irq,
120 .teardown_msi_irqs = default_teardown_msi_irqs,
121 .restore_msi_irqs = default_restore_msi_irqs,
122};
123
124struct x86_io_apic_ops x86_io_apic_ops = {
125 .init = native_io_apic_init_mappings,
126 .read = native_io_apic_read,
127 .write = native_io_apic_write,
128 .modify = native_io_apic_modify,
129};
1/*
2 * Copyright (C) 2009 Thomas Gleixner <tglx@linutronix.de>
3 *
4 * For licencing details see kernel-base/COPYING
5 */
6#include <linux/init.h>
7#include <linux/ioport.h>
8#include <linux/module.h>
9#include <linux/pci.h>
10
11#include <asm/bios_ebda.h>
12#include <asm/paravirt.h>
13#include <asm/pci_x86.h>
14#include <asm/pci.h>
15#include <asm/mpspec.h>
16#include <asm/setup.h>
17#include <asm/apic.h>
18#include <asm/e820.h>
19#include <asm/time.h>
20#include <asm/irq.h>
21#include <asm/io_apic.h>
22#include <asm/hpet.h>
23#include <asm/pat.h>
24#include <asm/tsc.h>
25#include <asm/iommu.h>
26#include <asm/mach_traps.h>
27
28void x86_init_noop(void) { }
29void __init x86_init_uint_noop(unsigned int unused) { }
30int __init iommu_init_noop(void) { return 0; }
31void iommu_shutdown_noop(void) { }
32
33/*
34 * The platform setup functions are preset with the default functions
35 * for standard PC hardware.
36 */
37struct x86_init_ops x86_init __initdata = {
38
39 .resources = {
40 .probe_roms = probe_roms,
41 .reserve_resources = reserve_standard_io_resources,
42 .memory_setup = default_machine_specific_memory_setup,
43 },
44
45 .mpparse = {
46 .mpc_record = x86_init_uint_noop,
47 .setup_ioapic_ids = x86_init_noop,
48 .mpc_apic_id = default_mpc_apic_id,
49 .smp_read_mpc_oem = default_smp_read_mpc_oem,
50 .mpc_oem_bus_info = default_mpc_oem_bus_info,
51 .find_smp_config = default_find_smp_config,
52 .get_smp_config = default_get_smp_config,
53 },
54
55 .irqs = {
56 .pre_vector_init = init_ISA_irqs,
57 .intr_init = native_init_IRQ,
58 .trap_init = x86_init_noop,
59 },
60
61 .oem = {
62 .arch_setup = x86_init_noop,
63 .banner = default_banner,
64 },
65
66 .paging = {
67 .pagetable_init = native_pagetable_init,
68 },
69
70 .timers = {
71 .setup_percpu_clockev = setup_boot_APIC_clock,
72 .tsc_pre_init = x86_init_noop,
73 .timer_init = hpet_time_init,
74 .wallclock_init = x86_init_noop,
75 },
76
77 .iommu = {
78 .iommu_init = iommu_init_noop,
79 },
80
81 .pci = {
82 .init = x86_default_pci_init,
83 .init_irq = x86_default_pci_init_irq,
84 .fixup_irqs = x86_default_pci_fixup_irqs,
85 },
86};
87
88struct x86_cpuinit_ops x86_cpuinit = {
89 .early_percpu_clock_init = x86_init_noop,
90 .setup_percpu_clockev = setup_secondary_APIC_clock,
91};
92
93static void default_nmi_init(void) { };
94static int default_i8042_detect(void) { return 1; };
95
96struct x86_platform_ops x86_platform = {
97 .calibrate_tsc = native_calibrate_tsc,
98 .get_wallclock = mach_get_cmos_time,
99 .set_wallclock = mach_set_rtc_mmss,
100 .iommu_shutdown = iommu_shutdown_noop,
101 .is_untracked_pat_range = is_ISA_range,
102 .nmi_init = default_nmi_init,
103 .get_nmi_reason = default_get_nmi_reason,
104 .i8042_detect = default_i8042_detect,
105 .save_sched_clock_state = tsc_save_sched_clock_state,
106 .restore_sched_clock_state = tsc_restore_sched_clock_state,
107};
108
109EXPORT_SYMBOL_GPL(x86_platform);
110
111#if defined(CONFIG_PCI_MSI)
112struct x86_msi_ops x86_msi = {
113 .setup_msi_irqs = native_setup_msi_irqs,
114 .compose_msi_msg = native_compose_msi_msg,
115 .teardown_msi_irq = native_teardown_msi_irq,
116 .teardown_msi_irqs = default_teardown_msi_irqs,
117 .restore_msi_irqs = default_restore_msi_irqs,
118 .setup_hpet_msi = default_setup_hpet_msi,
119 .msi_mask_irq = default_msi_mask_irq,
120 .msix_mask_irq = default_msix_mask_irq,
121};
122
123/* MSI arch specific hooks */
124int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
125{
126 return x86_msi.setup_msi_irqs(dev, nvec, type);
127}
128
129void arch_teardown_msi_irqs(struct pci_dev *dev)
130{
131 x86_msi.teardown_msi_irqs(dev);
132}
133
134void arch_teardown_msi_irq(unsigned int irq)
135{
136 x86_msi.teardown_msi_irq(irq);
137}
138
139void arch_restore_msi_irqs(struct pci_dev *dev)
140{
141 x86_msi.restore_msi_irqs(dev);
142}
143u32 arch_msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag)
144{
145 return x86_msi.msi_mask_irq(desc, mask, flag);
146}
147u32 arch_msix_mask_irq(struct msi_desc *desc, u32 flag)
148{
149 return x86_msi.msix_mask_irq(desc, flag);
150}
151#endif
152
153struct x86_io_apic_ops x86_io_apic_ops = {
154 .init = native_io_apic_init_mappings,
155 .read = native_io_apic_read,
156 .write = native_io_apic_write,
157 .modify = native_io_apic_modify,
158 .disable = native_disable_io_apic,
159 .print_entries = native_io_apic_print_entries,
160 .set_affinity = native_ioapic_set_affinity,
161 .setup_entry = native_setup_ioapic_entry,
162 .eoi_ioapic_pin = native_eoi_ioapic_pin,
163};