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1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * linux/arch/x86_64/entry.S
4 *
5 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
7 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 *
9 * entry.S contains the system-call and fault low-level handling routines.
10 *
11 * Some of this is documented in Documentation/x86/entry_64.txt
12 *
13 * A note on terminology:
14 * - iret frame: Architecture defined interrupt frame from SS to RIP
15 * at the top of the kernel process stack.
16 *
17 * Some macro usage:
18 * - ENTRY/END: Define functions in the symbol table.
19 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
20 * - idtentry: Define exception entry points.
21 */
22#include <linux/linkage.h>
23#include <asm/segment.h>
24#include <asm/cache.h>
25#include <asm/errno.h>
26#include <asm/asm-offsets.h>
27#include <asm/msr.h>
28#include <asm/unistd.h>
29#include <asm/thread_info.h>
30#include <asm/hw_irq.h>
31#include <asm/page_types.h>
32#include <asm/irqflags.h>
33#include <asm/paravirt.h>
34#include <asm/percpu.h>
35#include <asm/asm.h>
36#include <asm/smap.h>
37#include <asm/pgtable_types.h>
38#include <asm/export.h>
39#include <asm/frame.h>
40#include <asm/nospec-branch.h>
41#include <linux/err.h>
42
43#include "calling.h"
44
45.code64
46.section .entry.text, "ax"
47
48#ifdef CONFIG_PARAVIRT
49ENTRY(native_usergs_sysret64)
50 UNWIND_HINT_EMPTY
51 swapgs
52 sysretq
53END(native_usergs_sysret64)
54#endif /* CONFIG_PARAVIRT */
55
56.macro TRACE_IRQS_FLAGS flags:req
57#ifdef CONFIG_TRACE_IRQFLAGS
58 btl $9, \flags /* interrupts off? */
59 jnc 1f
60 TRACE_IRQS_ON
611:
62#endif
63.endm
64
65.macro TRACE_IRQS_IRETQ
66 TRACE_IRQS_FLAGS EFLAGS(%rsp)
67.endm
68
69/*
70 * When dynamic function tracer is enabled it will add a breakpoint
71 * to all locations that it is about to modify, sync CPUs, update
72 * all the code, sync CPUs, then remove the breakpoints. In this time
73 * if lockdep is enabled, it might jump back into the debug handler
74 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
75 *
76 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
77 * make sure the stack pointer does not get reset back to the top
78 * of the debug stack, and instead just reuses the current stack.
79 */
80#if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
81
82.macro TRACE_IRQS_OFF_DEBUG
83 call debug_stack_set_zero
84 TRACE_IRQS_OFF
85 call debug_stack_reset
86.endm
87
88.macro TRACE_IRQS_ON_DEBUG
89 call debug_stack_set_zero
90 TRACE_IRQS_ON
91 call debug_stack_reset
92.endm
93
94.macro TRACE_IRQS_IRETQ_DEBUG
95 bt $9, EFLAGS(%rsp) /* interrupts off? */
96 jnc 1f
97 TRACE_IRQS_ON_DEBUG
981:
99.endm
100
101#else
102# define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
103# define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
104# define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
105#endif
106
107/*
108 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
109 *
110 * This is the only entry point used for 64-bit system calls. The
111 * hardware interface is reasonably well designed and the register to
112 * argument mapping Linux uses fits well with the registers that are
113 * available when SYSCALL is used.
114 *
115 * SYSCALL instructions can be found inlined in libc implementations as
116 * well as some other programs and libraries. There are also a handful
117 * of SYSCALL instructions in the vDSO used, for example, as a
118 * clock_gettimeofday fallback.
119 *
120 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
121 * then loads new ss, cs, and rip from previously programmed MSRs.
122 * rflags gets masked by a value from another MSR (so CLD and CLAC
123 * are not needed). SYSCALL does not save anything on the stack
124 * and does not change rsp.
125 *
126 * Registers on entry:
127 * rax system call number
128 * rcx return address
129 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
130 * rdi arg0
131 * rsi arg1
132 * rdx arg2
133 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
134 * r8 arg4
135 * r9 arg5
136 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
137 *
138 * Only called from user space.
139 *
140 * When user can change pt_regs->foo always force IRET. That is because
141 * it deals with uncanonical addresses better. SYSRET has trouble
142 * with them due to bugs in both AMD and Intel CPUs.
143 */
144
145 .pushsection .entry_trampoline, "ax"
146
147/*
148 * The code in here gets remapped into cpu_entry_area's trampoline. This means
149 * that the assembler and linker have the wrong idea as to where this code
150 * lives (and, in fact, it's mapped more than once, so it's not even at a
151 * fixed address). So we can't reference any symbols outside the entry
152 * trampoline and expect it to work.
153 *
154 * Instead, we carefully abuse %rip-relative addressing.
155 * _entry_trampoline(%rip) refers to the start of the remapped) entry
156 * trampoline. We can thus find cpu_entry_area with this macro:
157 */
158
159#define CPU_ENTRY_AREA \
160 _entry_trampoline - CPU_ENTRY_AREA_entry_trampoline(%rip)
161
162/* The top word of the SYSENTER stack is hot and is usable as scratch space. */
163#define RSP_SCRATCH CPU_ENTRY_AREA_entry_stack + \
164 SIZEOF_entry_stack - 8 + CPU_ENTRY_AREA
165
166ENTRY(entry_SYSCALL_64_trampoline)
167 UNWIND_HINT_EMPTY
168 swapgs
169
170 /* Stash the user RSP. */
171 movq %rsp, RSP_SCRATCH
172
173 /* Note: using %rsp as a scratch reg. */
174 SWITCH_TO_KERNEL_CR3 scratch_reg=%rsp
175
176 /* Load the top of the task stack into RSP */
177 movq CPU_ENTRY_AREA_tss + TSS_sp1 + CPU_ENTRY_AREA, %rsp
178
179 /* Start building the simulated IRET frame. */
180 pushq $__USER_DS /* pt_regs->ss */
181 pushq RSP_SCRATCH /* pt_regs->sp */
182 pushq %r11 /* pt_regs->flags */
183 pushq $__USER_CS /* pt_regs->cs */
184 pushq %rcx /* pt_regs->ip */
185
186 /*
187 * x86 lacks a near absolute jump, and we can't jump to the real
188 * entry text with a relative jump. We could push the target
189 * address and then use retq, but this destroys the pipeline on
190 * many CPUs (wasting over 20 cycles on Sandy Bridge). Instead,
191 * spill RDI and restore it in a second-stage trampoline.
192 */
193 pushq %rdi
194 movq $entry_SYSCALL_64_stage2, %rdi
195 JMP_NOSPEC %rdi
196END(entry_SYSCALL_64_trampoline)
197
198 .popsection
199
200ENTRY(entry_SYSCALL_64_stage2)
201 UNWIND_HINT_EMPTY
202 popq %rdi
203 jmp entry_SYSCALL_64_after_hwframe
204END(entry_SYSCALL_64_stage2)
205
206ENTRY(entry_SYSCALL_64)
207 UNWIND_HINT_EMPTY
208 /*
209 * Interrupts are off on entry.
210 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
211 * it is too small to ever cause noticeable irq latency.
212 */
213
214 swapgs
215 /*
216 * This path is only taken when PAGE_TABLE_ISOLATION is disabled so it
217 * is not required to switch CR3.
218 */
219 movq %rsp, PER_CPU_VAR(rsp_scratch)
220 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
221
222 /* Construct struct pt_regs on stack */
223 pushq $__USER_DS /* pt_regs->ss */
224 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
225 pushq %r11 /* pt_regs->flags */
226 pushq $__USER_CS /* pt_regs->cs */
227 pushq %rcx /* pt_regs->ip */
228GLOBAL(entry_SYSCALL_64_after_hwframe)
229 pushq %rax /* pt_regs->orig_ax */
230
231 PUSH_AND_CLEAR_REGS rax=$-ENOSYS
232
233 TRACE_IRQS_OFF
234
235 /* IRQs are off. */
236 movq %rax, %rdi
237 movq %rsp, %rsi
238 call do_syscall_64 /* returns with IRQs disabled */
239
240 TRACE_IRQS_IRETQ /* we're about to change IF */
241
242 /*
243 * Try to use SYSRET instead of IRET if we're returning to
244 * a completely clean 64-bit userspace context. If we're not,
245 * go to the slow exit path.
246 */
247 movq RCX(%rsp), %rcx
248 movq RIP(%rsp), %r11
249
250 cmpq %rcx, %r11 /* SYSRET requires RCX == RIP */
251 jne swapgs_restore_regs_and_return_to_usermode
252
253 /*
254 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
255 * in kernel space. This essentially lets the user take over
256 * the kernel, since userspace controls RSP.
257 *
258 * If width of "canonical tail" ever becomes variable, this will need
259 * to be updated to remain correct on both old and new CPUs.
260 *
261 * Change top bits to match most significant bit (47th or 56th bit
262 * depending on paging mode) in the address.
263 */
264#ifdef CONFIG_X86_5LEVEL
265 ALTERNATIVE "shl $(64 - 48), %rcx; sar $(64 - 48), %rcx", \
266 "shl $(64 - 57), %rcx; sar $(64 - 57), %rcx", X86_FEATURE_LA57
267#else
268 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
269 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
270#endif
271
272 /* If this changed %rcx, it was not canonical */
273 cmpq %rcx, %r11
274 jne swapgs_restore_regs_and_return_to_usermode
275
276 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
277 jne swapgs_restore_regs_and_return_to_usermode
278
279 movq R11(%rsp), %r11
280 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
281 jne swapgs_restore_regs_and_return_to_usermode
282
283 /*
284 * SYSCALL clears RF when it saves RFLAGS in R11 and SYSRET cannot
285 * restore RF properly. If the slowpath sets it for whatever reason, we
286 * need to restore it correctly.
287 *
288 * SYSRET can restore TF, but unlike IRET, restoring TF results in a
289 * trap from userspace immediately after SYSRET. This would cause an
290 * infinite loop whenever #DB happens with register state that satisfies
291 * the opportunistic SYSRET conditions. For example, single-stepping
292 * this user code:
293 *
294 * movq $stuck_here, %rcx
295 * pushfq
296 * popq %r11
297 * stuck_here:
298 *
299 * would never get past 'stuck_here'.
300 */
301 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
302 jnz swapgs_restore_regs_and_return_to_usermode
303
304 /* nothing to check for RSP */
305
306 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
307 jne swapgs_restore_regs_and_return_to_usermode
308
309 /*
310 * We win! This label is here just for ease of understanding
311 * perf profiles. Nothing jumps here.
312 */
313syscall_return_via_sysret:
314 /* rcx and r11 are already restored (see code above) */
315 UNWIND_HINT_EMPTY
316 POP_REGS pop_rdi=0 skip_r11rcx=1
317
318 /*
319 * Now all regs are restored except RSP and RDI.
320 * Save old stack pointer and switch to trampoline stack.
321 */
322 movq %rsp, %rdi
323 movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp
324
325 pushq RSP-RDI(%rdi) /* RSP */
326 pushq (%rdi) /* RDI */
327
328 /*
329 * We are on the trampoline stack. All regs except RDI are live.
330 * We can do future final exit work right here.
331 */
332 SWITCH_TO_USER_CR3_STACK scratch_reg=%rdi
333
334 popq %rdi
335 popq %rsp
336 USERGS_SYSRET64
337END(entry_SYSCALL_64)
338
339/*
340 * %rdi: prev task
341 * %rsi: next task
342 */
343ENTRY(__switch_to_asm)
344 UNWIND_HINT_FUNC
345 /*
346 * Save callee-saved registers
347 * This must match the order in inactive_task_frame
348 */
349 pushq %rbp
350 pushq %rbx
351 pushq %r12
352 pushq %r13
353 pushq %r14
354 pushq %r15
355
356 /* switch stack */
357 movq %rsp, TASK_threadsp(%rdi)
358 movq TASK_threadsp(%rsi), %rsp
359
360#ifdef CONFIG_CC_STACKPROTECTOR
361 movq TASK_stack_canary(%rsi), %rbx
362 movq %rbx, PER_CPU_VAR(irq_stack_union)+stack_canary_offset
363#endif
364
365#ifdef CONFIG_RETPOLINE
366 /*
367 * When switching from a shallower to a deeper call stack
368 * the RSB may either underflow or use entries populated
369 * with userspace addresses. On CPUs where those concerns
370 * exist, overwrite the RSB with entries which capture
371 * speculative execution to prevent attack.
372 */
373 FILL_RETURN_BUFFER %r12, RSB_CLEAR_LOOPS, X86_FEATURE_RSB_CTXSW
374#endif
375
376 /* restore callee-saved registers */
377 popq %r15
378 popq %r14
379 popq %r13
380 popq %r12
381 popq %rbx
382 popq %rbp
383
384 jmp __switch_to
385END(__switch_to_asm)
386
387/*
388 * A newly forked process directly context switches into this address.
389 *
390 * rax: prev task we switched from
391 * rbx: kernel thread func (NULL for user thread)
392 * r12: kernel thread arg
393 */
394ENTRY(ret_from_fork)
395 UNWIND_HINT_EMPTY
396 movq %rax, %rdi
397 call schedule_tail /* rdi: 'prev' task parameter */
398
399 testq %rbx, %rbx /* from kernel_thread? */
400 jnz 1f /* kernel threads are uncommon */
401
4022:
403 UNWIND_HINT_REGS
404 movq %rsp, %rdi
405 call syscall_return_slowpath /* returns with IRQs disabled */
406 TRACE_IRQS_ON /* user mode is traced as IRQS on */
407 jmp swapgs_restore_regs_and_return_to_usermode
408
4091:
410 /* kernel thread */
411 movq %r12, %rdi
412 CALL_NOSPEC %rbx
413 /*
414 * A kernel thread is allowed to return here after successfully
415 * calling do_execve(). Exit to userspace to complete the execve()
416 * syscall.
417 */
418 movq $0, RAX(%rsp)
419 jmp 2b
420END(ret_from_fork)
421
422/*
423 * Build the entry stubs with some assembler magic.
424 * We pack 1 stub into every 8-byte block.
425 */
426 .align 8
427ENTRY(irq_entries_start)
428 vector=FIRST_EXTERNAL_VECTOR
429 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
430 UNWIND_HINT_IRET_REGS
431 pushq $(~vector+0x80) /* Note: always in signed byte range */
432 jmp common_interrupt
433 .align 8
434 vector=vector+1
435 .endr
436END(irq_entries_start)
437
438.macro DEBUG_ENTRY_ASSERT_IRQS_OFF
439#ifdef CONFIG_DEBUG_ENTRY
440 pushq %rax
441 SAVE_FLAGS(CLBR_RAX)
442 testl $X86_EFLAGS_IF, %eax
443 jz .Lokay_\@
444 ud2
445.Lokay_\@:
446 popq %rax
447#endif
448.endm
449
450/*
451 * Enters the IRQ stack if we're not already using it. NMI-safe. Clobbers
452 * flags and puts old RSP into old_rsp, and leaves all other GPRs alone.
453 * Requires kernel GSBASE.
454 *
455 * The invariant is that, if irq_count != -1, then the IRQ stack is in use.
456 */
457.macro ENTER_IRQ_STACK regs=1 old_rsp save_ret=0
458 DEBUG_ENTRY_ASSERT_IRQS_OFF
459
460 .if \save_ret
461 /*
462 * If save_ret is set, the original stack contains one additional
463 * entry -- the return address. Therefore, move the address one
464 * entry below %rsp to \old_rsp.
465 */
466 leaq 8(%rsp), \old_rsp
467 .else
468 movq %rsp, \old_rsp
469 .endif
470
471 .if \regs
472 UNWIND_HINT_REGS base=\old_rsp
473 .endif
474
475 incl PER_CPU_VAR(irq_count)
476 jnz .Lirq_stack_push_old_rsp_\@
477
478 /*
479 * Right now, if we just incremented irq_count to zero, we've
480 * claimed the IRQ stack but we haven't switched to it yet.
481 *
482 * If anything is added that can interrupt us here without using IST,
483 * it must be *extremely* careful to limit its stack usage. This
484 * could include kprobes and a hypothetical future IST-less #DB
485 * handler.
486 *
487 * The OOPS unwinder relies on the word at the top of the IRQ
488 * stack linking back to the previous RSP for the entire time we're
489 * on the IRQ stack. For this to work reliably, we need to write
490 * it before we actually move ourselves to the IRQ stack.
491 */
492
493 movq \old_rsp, PER_CPU_VAR(irq_stack_union + IRQ_STACK_SIZE - 8)
494 movq PER_CPU_VAR(irq_stack_ptr), %rsp
495
496#ifdef CONFIG_DEBUG_ENTRY
497 /*
498 * If the first movq above becomes wrong due to IRQ stack layout
499 * changes, the only way we'll notice is if we try to unwind right
500 * here. Assert that we set up the stack right to catch this type
501 * of bug quickly.
502 */
503 cmpq -8(%rsp), \old_rsp
504 je .Lirq_stack_okay\@
505 ud2
506 .Lirq_stack_okay\@:
507#endif
508
509.Lirq_stack_push_old_rsp_\@:
510 pushq \old_rsp
511
512 .if \regs
513 UNWIND_HINT_REGS indirect=1
514 .endif
515
516 .if \save_ret
517 /*
518 * Push the return address to the stack. This return address can
519 * be found at the "real" original RSP, which was offset by 8 at
520 * the beginning of this macro.
521 */
522 pushq -8(\old_rsp)
523 .endif
524.endm
525
526/*
527 * Undoes ENTER_IRQ_STACK.
528 */
529.macro LEAVE_IRQ_STACK regs=1
530 DEBUG_ENTRY_ASSERT_IRQS_OFF
531 /* We need to be off the IRQ stack before decrementing irq_count. */
532 popq %rsp
533
534 .if \regs
535 UNWIND_HINT_REGS
536 .endif
537
538 /*
539 * As in ENTER_IRQ_STACK, irq_count == 0, we are still claiming
540 * the irq stack but we're not on it.
541 */
542
543 decl PER_CPU_VAR(irq_count)
544.endm
545
546/*
547 * Interrupt entry helper function.
548 *
549 * Entry runs with interrupts off. Stack layout at entry:
550 * +----------------------------------------------------+
551 * | regs->ss |
552 * | regs->rsp |
553 * | regs->eflags |
554 * | regs->cs |
555 * | regs->ip |
556 * +----------------------------------------------------+
557 * | regs->orig_ax = ~(interrupt number) |
558 * +----------------------------------------------------+
559 * | return address |
560 * +----------------------------------------------------+
561 */
562ENTRY(interrupt_entry)
563 UNWIND_HINT_FUNC
564 ASM_CLAC
565 cld
566
567 testb $3, CS-ORIG_RAX+8(%rsp)
568 jz 1f
569 SWAPGS
570
571 /*
572 * Switch to the thread stack. The IRET frame and orig_ax are
573 * on the stack, as well as the return address. RDI..R12 are
574 * not (yet) on the stack and space has not (yet) been
575 * allocated for them.
576 */
577 pushq %rdi
578
579 /* Need to switch before accessing the thread stack. */
580 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi
581 movq %rsp, %rdi
582 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
583
584 /*
585 * We have RDI, return address, and orig_ax on the stack on
586 * top of the IRET frame. That means offset=24
587 */
588 UNWIND_HINT_IRET_REGS base=%rdi offset=24
589
590 pushq 7*8(%rdi) /* regs->ss */
591 pushq 6*8(%rdi) /* regs->rsp */
592 pushq 5*8(%rdi) /* regs->eflags */
593 pushq 4*8(%rdi) /* regs->cs */
594 pushq 3*8(%rdi) /* regs->ip */
595 pushq 2*8(%rdi) /* regs->orig_ax */
596 pushq 8(%rdi) /* return address */
597 UNWIND_HINT_FUNC
598
599 movq (%rdi), %rdi
6001:
601
602 PUSH_AND_CLEAR_REGS save_ret=1
603 ENCODE_FRAME_POINTER 8
604
605 testb $3, CS+8(%rsp)
606 jz 1f
607
608 /*
609 * IRQ from user mode.
610 *
611 * We need to tell lockdep that IRQs are off. We can't do this until
612 * we fix gsbase, and we should do it before enter_from_user_mode
613 * (which can take locks). Since TRACE_IRQS_OFF is idempotent,
614 * the simplest way to handle it is to just call it twice if
615 * we enter from user mode. There's no reason to optimize this since
616 * TRACE_IRQS_OFF is a no-op if lockdep is off.
617 */
618 TRACE_IRQS_OFF
619
620 CALL_enter_from_user_mode
621
6221:
623 ENTER_IRQ_STACK old_rsp=%rdi save_ret=1
624 /* We entered an interrupt context - irqs are off: */
625 TRACE_IRQS_OFF
626
627 ret
628END(interrupt_entry)
629
630
631/* Interrupt entry/exit. */
632
633 /*
634 * The interrupt stubs push (~vector+0x80) onto the stack and
635 * then jump to common_interrupt.
636 */
637 .p2align CONFIG_X86_L1_CACHE_SHIFT
638common_interrupt:
639 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
640 call interrupt_entry
641 UNWIND_HINT_REGS indirect=1
642 call do_IRQ /* rdi points to pt_regs */
643 /* 0(%rsp): old RSP */
644ret_from_intr:
645 DISABLE_INTERRUPTS(CLBR_ANY)
646 TRACE_IRQS_OFF
647
648 LEAVE_IRQ_STACK
649
650 testb $3, CS(%rsp)
651 jz retint_kernel
652
653 /* Interrupt came from user space */
654GLOBAL(retint_user)
655 mov %rsp,%rdi
656 call prepare_exit_to_usermode
657 TRACE_IRQS_IRETQ
658
659GLOBAL(swapgs_restore_regs_and_return_to_usermode)
660#ifdef CONFIG_DEBUG_ENTRY
661 /* Assert that pt_regs indicates user mode. */
662 testb $3, CS(%rsp)
663 jnz 1f
664 ud2
6651:
666#endif
667 POP_REGS pop_rdi=0
668
669 /*
670 * The stack is now user RDI, orig_ax, RIP, CS, EFLAGS, RSP, SS.
671 * Save old stack pointer and switch to trampoline stack.
672 */
673 movq %rsp, %rdi
674 movq PER_CPU_VAR(cpu_tss_rw + TSS_sp0), %rsp
675
676 /* Copy the IRET frame to the trampoline stack. */
677 pushq 6*8(%rdi) /* SS */
678 pushq 5*8(%rdi) /* RSP */
679 pushq 4*8(%rdi) /* EFLAGS */
680 pushq 3*8(%rdi) /* CS */
681 pushq 2*8(%rdi) /* RIP */
682
683 /* Push user RDI on the trampoline stack. */
684 pushq (%rdi)
685
686 /*
687 * We are on the trampoline stack. All regs except RDI are live.
688 * We can do future final exit work right here.
689 */
690
691 SWITCH_TO_USER_CR3_STACK scratch_reg=%rdi
692
693 /* Restore RDI. */
694 popq %rdi
695 SWAPGS
696 INTERRUPT_RETURN
697
698
699/* Returning to kernel space */
700retint_kernel:
701#ifdef CONFIG_PREEMPT
702 /* Interrupts are off */
703 /* Check if we need preemption */
704 bt $9, EFLAGS(%rsp) /* were interrupts off? */
705 jnc 1f
7060: cmpl $0, PER_CPU_VAR(__preempt_count)
707 jnz 1f
708 call preempt_schedule_irq
709 jmp 0b
7101:
711#endif
712 /*
713 * The iretq could re-enable interrupts:
714 */
715 TRACE_IRQS_IRETQ
716
717GLOBAL(restore_regs_and_return_to_kernel)
718#ifdef CONFIG_DEBUG_ENTRY
719 /* Assert that pt_regs indicates kernel mode. */
720 testb $3, CS(%rsp)
721 jz 1f
722 ud2
7231:
724#endif
725 POP_REGS
726 addq $8, %rsp /* skip regs->orig_ax */
727 /*
728 * ARCH_HAS_MEMBARRIER_SYNC_CORE rely on IRET core serialization
729 * when returning from IPI handler.
730 */
731 INTERRUPT_RETURN
732
733ENTRY(native_iret)
734 UNWIND_HINT_IRET_REGS
735 /*
736 * Are we returning to a stack segment from the LDT? Note: in
737 * 64-bit mode SS:RSP on the exception stack is always valid.
738 */
739#ifdef CONFIG_X86_ESPFIX64
740 testb $4, (SS-RIP)(%rsp)
741 jnz native_irq_return_ldt
742#endif
743
744.global native_irq_return_iret
745native_irq_return_iret:
746 /*
747 * This may fault. Non-paranoid faults on return to userspace are
748 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
749 * Double-faults due to espfix64 are handled in do_double_fault.
750 * Other faults here are fatal.
751 */
752 iretq
753
754#ifdef CONFIG_X86_ESPFIX64
755native_irq_return_ldt:
756 /*
757 * We are running with user GSBASE. All GPRs contain their user
758 * values. We have a percpu ESPFIX stack that is eight slots
759 * long (see ESPFIX_STACK_SIZE). espfix_waddr points to the bottom
760 * of the ESPFIX stack.
761 *
762 * We clobber RAX and RDI in this code. We stash RDI on the
763 * normal stack and RAX on the ESPFIX stack.
764 *
765 * The ESPFIX stack layout we set up looks like this:
766 *
767 * --- top of ESPFIX stack ---
768 * SS
769 * RSP
770 * RFLAGS
771 * CS
772 * RIP <-- RSP points here when we're done
773 * RAX <-- espfix_waddr points here
774 * --- bottom of ESPFIX stack ---
775 */
776
777 pushq %rdi /* Stash user RDI */
778 SWAPGS /* to kernel GS */
779 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdi /* to kernel CR3 */
780
781 movq PER_CPU_VAR(espfix_waddr), %rdi
782 movq %rax, (0*8)(%rdi) /* user RAX */
783 movq (1*8)(%rsp), %rax /* user RIP */
784 movq %rax, (1*8)(%rdi)
785 movq (2*8)(%rsp), %rax /* user CS */
786 movq %rax, (2*8)(%rdi)
787 movq (3*8)(%rsp), %rax /* user RFLAGS */
788 movq %rax, (3*8)(%rdi)
789 movq (5*8)(%rsp), %rax /* user SS */
790 movq %rax, (5*8)(%rdi)
791 movq (4*8)(%rsp), %rax /* user RSP */
792 movq %rax, (4*8)(%rdi)
793 /* Now RAX == RSP. */
794
795 andl $0xffff0000, %eax /* RAX = (RSP & 0xffff0000) */
796
797 /*
798 * espfix_stack[31:16] == 0. The page tables are set up such that
799 * (espfix_stack | (X & 0xffff0000)) points to a read-only alias of
800 * espfix_waddr for any X. That is, there are 65536 RO aliases of
801 * the same page. Set up RSP so that RSP[31:16] contains the
802 * respective 16 bits of the /userspace/ RSP and RSP nonetheless
803 * still points to an RO alias of the ESPFIX stack.
804 */
805 orq PER_CPU_VAR(espfix_stack), %rax
806
807 SWITCH_TO_USER_CR3_STACK scratch_reg=%rdi
808 SWAPGS /* to user GS */
809 popq %rdi /* Restore user RDI */
810
811 movq %rax, %rsp
812 UNWIND_HINT_IRET_REGS offset=8
813
814 /*
815 * At this point, we cannot write to the stack any more, but we can
816 * still read.
817 */
818 popq %rax /* Restore user RAX */
819
820 /*
821 * RSP now points to an ordinary IRET frame, except that the page
822 * is read-only and RSP[31:16] are preloaded with the userspace
823 * values. We can now IRET back to userspace.
824 */
825 jmp native_irq_return_iret
826#endif
827END(common_interrupt)
828
829/*
830 * APIC interrupts.
831 */
832.macro apicinterrupt3 num sym do_sym
833ENTRY(\sym)
834 UNWIND_HINT_IRET_REGS
835 pushq $~(\num)
836.Lcommon_\sym:
837 call interrupt_entry
838 UNWIND_HINT_REGS indirect=1
839 call \do_sym /* rdi points to pt_regs */
840 jmp ret_from_intr
841END(\sym)
842.endm
843
844/* Make sure APIC interrupt handlers end up in the irqentry section: */
845#define PUSH_SECTION_IRQENTRY .pushsection .irqentry.text, "ax"
846#define POP_SECTION_IRQENTRY .popsection
847
848.macro apicinterrupt num sym do_sym
849PUSH_SECTION_IRQENTRY
850apicinterrupt3 \num \sym \do_sym
851POP_SECTION_IRQENTRY
852.endm
853
854#ifdef CONFIG_SMP
855apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
856apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
857#endif
858
859#ifdef CONFIG_X86_UV
860apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
861#endif
862
863apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
864apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
865
866#ifdef CONFIG_HAVE_KVM
867apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
868apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
869apicinterrupt3 POSTED_INTR_NESTED_VECTOR kvm_posted_intr_nested_ipi smp_kvm_posted_intr_nested_ipi
870#endif
871
872#ifdef CONFIG_X86_MCE_THRESHOLD
873apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
874#endif
875
876#ifdef CONFIG_X86_MCE_AMD
877apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
878#endif
879
880#ifdef CONFIG_X86_THERMAL_VECTOR
881apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
882#endif
883
884#ifdef CONFIG_SMP
885apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
886apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
887apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
888#endif
889
890apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
891apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
892
893#ifdef CONFIG_IRQ_WORK
894apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
895#endif
896
897/*
898 * Exception entry points.
899 */
900#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss_rw) + (TSS_ist + ((x) - 1) * 8)
901
902.macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
903ENTRY(\sym)
904 UNWIND_HINT_IRET_REGS offset=\has_error_code*8
905
906 /* Sanity check */
907 .if \shift_ist != -1 && \paranoid == 0
908 .error "using shift_ist requires paranoid=1"
909 .endif
910
911 ASM_CLAC
912
913 .if \has_error_code == 0
914 pushq $-1 /* ORIG_RAX: no syscall to restart */
915 .endif
916
917 .if \paranoid == 1
918 testb $3, CS-ORIG_RAX(%rsp) /* If coming from userspace, switch stacks */
919 jnz .Lfrom_usermode_switch_stack_\@
920 .endif
921
922 .if \paranoid
923 call paranoid_entry
924 .else
925 call error_entry
926 .endif
927 UNWIND_HINT_REGS
928 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
929
930 .if \paranoid
931 .if \shift_ist != -1
932 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
933 .else
934 TRACE_IRQS_OFF
935 .endif
936 .endif
937
938 movq %rsp, %rdi /* pt_regs pointer */
939
940 .if \has_error_code
941 movq ORIG_RAX(%rsp), %rsi /* get error code */
942 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
943 .else
944 xorl %esi, %esi /* no error code */
945 .endif
946
947 .if \shift_ist != -1
948 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
949 .endif
950
951 call \do_sym
952
953 .if \shift_ist != -1
954 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
955 .endif
956
957 /* these procedures expect "no swapgs" flag in ebx */
958 .if \paranoid
959 jmp paranoid_exit
960 .else
961 jmp error_exit
962 .endif
963
964 .if \paranoid == 1
965 /*
966 * Entry from userspace. Switch stacks and treat it
967 * as a normal entry. This means that paranoid handlers
968 * run in real process context if user_mode(regs).
969 */
970.Lfrom_usermode_switch_stack_\@:
971 call error_entry
972
973 movq %rsp, %rdi /* pt_regs pointer */
974
975 .if \has_error_code
976 movq ORIG_RAX(%rsp), %rsi /* get error code */
977 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
978 .else
979 xorl %esi, %esi /* no error code */
980 .endif
981
982 call \do_sym
983
984 jmp error_exit /* %ebx: no swapgs flag */
985 .endif
986END(\sym)
987.endm
988
989idtentry divide_error do_divide_error has_error_code=0
990idtentry overflow do_overflow has_error_code=0
991idtentry bounds do_bounds has_error_code=0
992idtentry invalid_op do_invalid_op has_error_code=0
993idtentry device_not_available do_device_not_available has_error_code=0
994idtentry double_fault do_double_fault has_error_code=1 paranoid=2
995idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
996idtentry invalid_TSS do_invalid_TSS has_error_code=1
997idtentry segment_not_present do_segment_not_present has_error_code=1
998idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
999idtentry coprocessor_error do_coprocessor_error has_error_code=0
1000idtentry alignment_check do_alignment_check has_error_code=1
1001idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
1002
1003
1004 /*
1005 * Reload gs selector with exception handling
1006 * edi: new selector
1007 */
1008ENTRY(native_load_gs_index)
1009 FRAME_BEGIN
1010 pushfq
1011 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
1012 TRACE_IRQS_OFF
1013 SWAPGS
1014.Lgs_change:
1015 movl %edi, %gs
10162: ALTERNATIVE "", "mfence", X86_BUG_SWAPGS_FENCE
1017 SWAPGS
1018 TRACE_IRQS_FLAGS (%rsp)
1019 popfq
1020 FRAME_END
1021 ret
1022ENDPROC(native_load_gs_index)
1023EXPORT_SYMBOL(native_load_gs_index)
1024
1025 _ASM_EXTABLE(.Lgs_change, bad_gs)
1026 .section .fixup, "ax"
1027 /* running with kernelgs */
1028bad_gs:
1029 SWAPGS /* switch back to user gs */
1030.macro ZAP_GS
1031 /* This can't be a string because the preprocessor needs to see it. */
1032 movl $__USER_DS, %eax
1033 movl %eax, %gs
1034.endm
1035 ALTERNATIVE "", "ZAP_GS", X86_BUG_NULL_SEG
1036 xorl %eax, %eax
1037 movl %eax, %gs
1038 jmp 2b
1039 .previous
1040
1041/* Call softirq on interrupt stack. Interrupts are off. */
1042ENTRY(do_softirq_own_stack)
1043 pushq %rbp
1044 mov %rsp, %rbp
1045 ENTER_IRQ_STACK regs=0 old_rsp=%r11
1046 call __do_softirq
1047 LEAVE_IRQ_STACK regs=0
1048 leaveq
1049 ret
1050ENDPROC(do_softirq_own_stack)
1051
1052#ifdef CONFIG_XEN
1053idtentry hypervisor_callback xen_do_hypervisor_callback has_error_code=0
1054
1055/*
1056 * A note on the "critical region" in our callback handler.
1057 * We want to avoid stacking callback handlers due to events occurring
1058 * during handling of the last event. To do this, we keep events disabled
1059 * until we've done all processing. HOWEVER, we must enable events before
1060 * popping the stack frame (can't be done atomically) and so it would still
1061 * be possible to get enough handler activations to overflow the stack.
1062 * Although unlikely, bugs of that kind are hard to track down, so we'd
1063 * like to avoid the possibility.
1064 * So, on entry to the handler we detect whether we interrupted an
1065 * existing activation in its critical region -- if so, we pop the current
1066 * activation and restart the handler using the previous one.
1067 */
1068ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
1069
1070/*
1071 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1072 * see the correct pointer to the pt_regs
1073 */
1074 UNWIND_HINT_FUNC
1075 movq %rdi, %rsp /* we don't return, adjust the stack frame */
1076 UNWIND_HINT_REGS
1077
1078 ENTER_IRQ_STACK old_rsp=%r10
1079 call xen_evtchn_do_upcall
1080 LEAVE_IRQ_STACK
1081
1082#ifndef CONFIG_PREEMPT
1083 call xen_maybe_preempt_hcall
1084#endif
1085 jmp error_exit
1086END(xen_do_hypervisor_callback)
1087
1088/*
1089 * Hypervisor uses this for application faults while it executes.
1090 * We get here for two reasons:
1091 * 1. Fault while reloading DS, ES, FS or GS
1092 * 2. Fault while executing IRET
1093 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1094 * registers that could be reloaded and zeroed the others.
1095 * Category 2 we fix up by killing the current process. We cannot use the
1096 * normal Linux return path in this case because if we use the IRET hypercall
1097 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1098 * We distinguish between categories by comparing each saved segment register
1099 * with its current contents: any discrepancy means we in category 1.
1100 */
1101ENTRY(xen_failsafe_callback)
1102 UNWIND_HINT_EMPTY
1103 movl %ds, %ecx
1104 cmpw %cx, 0x10(%rsp)
1105 jne 1f
1106 movl %es, %ecx
1107 cmpw %cx, 0x18(%rsp)
1108 jne 1f
1109 movl %fs, %ecx
1110 cmpw %cx, 0x20(%rsp)
1111 jne 1f
1112 movl %gs, %ecx
1113 cmpw %cx, 0x28(%rsp)
1114 jne 1f
1115 /* All segments match their saved values => Category 2 (Bad IRET). */
1116 movq (%rsp), %rcx
1117 movq 8(%rsp), %r11
1118 addq $0x30, %rsp
1119 pushq $0 /* RIP */
1120 UNWIND_HINT_IRET_REGS offset=8
1121 jmp general_protection
11221: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1123 movq (%rsp), %rcx
1124 movq 8(%rsp), %r11
1125 addq $0x30, %rsp
1126 UNWIND_HINT_IRET_REGS
1127 pushq $-1 /* orig_ax = -1 => not a system call */
1128 PUSH_AND_CLEAR_REGS
1129 ENCODE_FRAME_POINTER
1130 jmp error_exit
1131END(xen_failsafe_callback)
1132
1133apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1134 xen_hvm_callback_vector xen_evtchn_do_upcall
1135
1136#endif /* CONFIG_XEN */
1137
1138#if IS_ENABLED(CONFIG_HYPERV)
1139apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
1140 hyperv_callback_vector hyperv_vector_handler
1141
1142apicinterrupt3 HYPERV_REENLIGHTENMENT_VECTOR \
1143 hyperv_reenlightenment_vector hyperv_reenlightenment_intr
1144
1145apicinterrupt3 HYPERV_STIMER0_VECTOR \
1146 hv_stimer0_callback_vector hv_stimer0_vector_handler
1147#endif /* CONFIG_HYPERV */
1148
1149idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1150idtentry int3 do_int3 has_error_code=0
1151idtentry stack_segment do_stack_segment has_error_code=1
1152
1153#ifdef CONFIG_XEN
1154idtentry xennmi do_nmi has_error_code=0
1155idtentry xendebug do_debug has_error_code=0
1156idtentry xenint3 do_int3 has_error_code=0
1157#endif
1158
1159idtentry general_protection do_general_protection has_error_code=1
1160idtentry page_fault do_page_fault has_error_code=1
1161
1162#ifdef CONFIG_KVM_GUEST
1163idtentry async_page_fault do_async_page_fault has_error_code=1
1164#endif
1165
1166#ifdef CONFIG_X86_MCE
1167idtentry machine_check do_mce has_error_code=0 paranoid=1
1168#endif
1169
1170/*
1171 * Save all registers in pt_regs, and switch gs if needed.
1172 * Use slow, but surefire "are we in kernel?" check.
1173 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1174 */
1175ENTRY(paranoid_entry)
1176 UNWIND_HINT_FUNC
1177 cld
1178 PUSH_AND_CLEAR_REGS save_ret=1
1179 ENCODE_FRAME_POINTER 8
1180 movl $1, %ebx
1181 movl $MSR_GS_BASE, %ecx
1182 rdmsr
1183 testl %edx, %edx
1184 js 1f /* negative -> in kernel */
1185 SWAPGS
1186 xorl %ebx, %ebx
1187
11881:
1189 SAVE_AND_SWITCH_TO_KERNEL_CR3 scratch_reg=%rax save_reg=%r14
1190
1191 ret
1192END(paranoid_entry)
1193
1194/*
1195 * "Paranoid" exit path from exception stack. This is invoked
1196 * only on return from non-NMI IST interrupts that came
1197 * from kernel space.
1198 *
1199 * We may be returning to very strange contexts (e.g. very early
1200 * in syscall entry), so checking for preemption here would
1201 * be complicated. Fortunately, we there's no good reason
1202 * to try to handle preemption here.
1203 *
1204 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1205 */
1206ENTRY(paranoid_exit)
1207 UNWIND_HINT_REGS
1208 DISABLE_INTERRUPTS(CLBR_ANY)
1209 TRACE_IRQS_OFF_DEBUG
1210 testl %ebx, %ebx /* swapgs needed? */
1211 jnz .Lparanoid_exit_no_swapgs
1212 TRACE_IRQS_IRETQ
1213 RESTORE_CR3 scratch_reg=%rbx save_reg=%r14
1214 SWAPGS_UNSAFE_STACK
1215 jmp .Lparanoid_exit_restore
1216.Lparanoid_exit_no_swapgs:
1217 TRACE_IRQS_IRETQ_DEBUG
1218 RESTORE_CR3 scratch_reg=%rbx save_reg=%r14
1219.Lparanoid_exit_restore:
1220 jmp restore_regs_and_return_to_kernel
1221END(paranoid_exit)
1222
1223/*
1224 * Save all registers in pt_regs, and switch GS if needed.
1225 * Return: EBX=0: came from user mode; EBX=1: otherwise
1226 */
1227ENTRY(error_entry)
1228 UNWIND_HINT_FUNC
1229 cld
1230 PUSH_AND_CLEAR_REGS save_ret=1
1231 ENCODE_FRAME_POINTER 8
1232 testb $3, CS+8(%rsp)
1233 jz .Lerror_kernelspace
1234
1235 /*
1236 * We entered from user mode or we're pretending to have entered
1237 * from user mode due to an IRET fault.
1238 */
1239 SWAPGS
1240 /* We have user CR3. Change to kernel CR3. */
1241 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
1242
1243.Lerror_entry_from_usermode_after_swapgs:
1244 /* Put us onto the real thread stack. */
1245 popq %r12 /* save return addr in %12 */
1246 movq %rsp, %rdi /* arg0 = pt_regs pointer */
1247 call sync_regs
1248 movq %rax, %rsp /* switch stack */
1249 ENCODE_FRAME_POINTER
1250 pushq %r12
1251
1252 /*
1253 * We need to tell lockdep that IRQs are off. We can't do this until
1254 * we fix gsbase, and we should do it before enter_from_user_mode
1255 * (which can take locks).
1256 */
1257 TRACE_IRQS_OFF
1258 CALL_enter_from_user_mode
1259 ret
1260
1261.Lerror_entry_done:
1262 TRACE_IRQS_OFF
1263 ret
1264
1265 /*
1266 * There are two places in the kernel that can potentially fault with
1267 * usergs. Handle them here. B stepping K8s sometimes report a
1268 * truncated RIP for IRET exceptions returning to compat mode. Check
1269 * for these here too.
1270 */
1271.Lerror_kernelspace:
1272 incl %ebx
1273 leaq native_irq_return_iret(%rip), %rcx
1274 cmpq %rcx, RIP+8(%rsp)
1275 je .Lerror_bad_iret
1276 movl %ecx, %eax /* zero extend */
1277 cmpq %rax, RIP+8(%rsp)
1278 je .Lbstep_iret
1279 cmpq $.Lgs_change, RIP+8(%rsp)
1280 jne .Lerror_entry_done
1281
1282 /*
1283 * hack: .Lgs_change can fail with user gsbase. If this happens, fix up
1284 * gsbase and proceed. We'll fix up the exception and land in
1285 * .Lgs_change's error handler with kernel gsbase.
1286 */
1287 SWAPGS
1288 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
1289 jmp .Lerror_entry_done
1290
1291.Lbstep_iret:
1292 /* Fix truncated RIP */
1293 movq %rcx, RIP+8(%rsp)
1294 /* fall through */
1295
1296.Lerror_bad_iret:
1297 /*
1298 * We came from an IRET to user mode, so we have user
1299 * gsbase and CR3. Switch to kernel gsbase and CR3:
1300 */
1301 SWAPGS
1302 SWITCH_TO_KERNEL_CR3 scratch_reg=%rax
1303
1304 /*
1305 * Pretend that the exception came from user mode: set up pt_regs
1306 * as if we faulted immediately after IRET and clear EBX so that
1307 * error_exit knows that we will be returning to user mode.
1308 */
1309 mov %rsp, %rdi
1310 call fixup_bad_iret
1311 mov %rax, %rsp
1312 decl %ebx
1313 jmp .Lerror_entry_from_usermode_after_swapgs
1314END(error_entry)
1315
1316
1317/*
1318 * On entry, EBX is a "return to kernel mode" flag:
1319 * 1: already in kernel mode, don't need SWAPGS
1320 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1321 */
1322ENTRY(error_exit)
1323 UNWIND_HINT_REGS
1324 DISABLE_INTERRUPTS(CLBR_ANY)
1325 TRACE_IRQS_OFF
1326 testl %ebx, %ebx
1327 jnz retint_kernel
1328 jmp retint_user
1329END(error_exit)
1330
1331/*
1332 * Runs on exception stack. Xen PV does not go through this path at all,
1333 * so we can use real assembly here.
1334 *
1335 * Registers:
1336 * %r14: Used to save/restore the CR3 of the interrupted context
1337 * when PAGE_TABLE_ISOLATION is in use. Do not clobber.
1338 */
1339ENTRY(nmi)
1340 UNWIND_HINT_IRET_REGS
1341
1342 /*
1343 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1344 * the iretq it performs will take us out of NMI context.
1345 * This means that we can have nested NMIs where the next
1346 * NMI is using the top of the stack of the previous NMI. We
1347 * can't let it execute because the nested NMI will corrupt the
1348 * stack of the previous NMI. NMI handlers are not re-entrant
1349 * anyway.
1350 *
1351 * To handle this case we do the following:
1352 * Check the a special location on the stack that contains
1353 * a variable that is set when NMIs are executing.
1354 * The interrupted task's stack is also checked to see if it
1355 * is an NMI stack.
1356 * If the variable is not set and the stack is not the NMI
1357 * stack then:
1358 * o Set the special variable on the stack
1359 * o Copy the interrupt frame into an "outermost" location on the
1360 * stack
1361 * o Copy the interrupt frame into an "iret" location on the stack
1362 * o Continue processing the NMI
1363 * If the variable is set or the previous stack is the NMI stack:
1364 * o Modify the "iret" location to jump to the repeat_nmi
1365 * o return back to the first NMI
1366 *
1367 * Now on exit of the first NMI, we first clear the stack variable
1368 * The NMI stack will tell any nested NMIs at that point that it is
1369 * nested. Then we pop the stack normally with iret, and if there was
1370 * a nested NMI that updated the copy interrupt stack frame, a
1371 * jump will be made to the repeat_nmi code that will handle the second
1372 * NMI.
1373 *
1374 * However, espfix prevents us from directly returning to userspace
1375 * with a single IRET instruction. Similarly, IRET to user mode
1376 * can fault. We therefore handle NMIs from user space like
1377 * other IST entries.
1378 */
1379
1380 ASM_CLAC
1381
1382 /* Use %rdx as our temp variable throughout */
1383 pushq %rdx
1384
1385 testb $3, CS-RIP+8(%rsp)
1386 jz .Lnmi_from_kernel
1387
1388 /*
1389 * NMI from user mode. We need to run on the thread stack, but we
1390 * can't go through the normal entry paths: NMIs are masked, and
1391 * we don't want to enable interrupts, because then we'll end
1392 * up in an awkward situation in which IRQs are on but NMIs
1393 * are off.
1394 *
1395 * We also must not push anything to the stack before switching
1396 * stacks lest we corrupt the "NMI executing" variable.
1397 */
1398
1399 swapgs
1400 cld
1401 SWITCH_TO_KERNEL_CR3 scratch_reg=%rdx
1402 movq %rsp, %rdx
1403 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1404 UNWIND_HINT_IRET_REGS base=%rdx offset=8
1405 pushq 5*8(%rdx) /* pt_regs->ss */
1406 pushq 4*8(%rdx) /* pt_regs->rsp */
1407 pushq 3*8(%rdx) /* pt_regs->flags */
1408 pushq 2*8(%rdx) /* pt_regs->cs */
1409 pushq 1*8(%rdx) /* pt_regs->rip */
1410 UNWIND_HINT_IRET_REGS
1411 pushq $-1 /* pt_regs->orig_ax */
1412 PUSH_AND_CLEAR_REGS rdx=(%rdx)
1413 ENCODE_FRAME_POINTER
1414
1415 /*
1416 * At this point we no longer need to worry about stack damage
1417 * due to nesting -- we're on the normal thread stack and we're
1418 * done with the NMI stack.
1419 */
1420
1421 movq %rsp, %rdi
1422 movq $-1, %rsi
1423 call do_nmi
1424
1425 /*
1426 * Return back to user mode. We must *not* do the normal exit
1427 * work, because we don't want to enable interrupts.
1428 */
1429 jmp swapgs_restore_regs_and_return_to_usermode
1430
1431.Lnmi_from_kernel:
1432 /*
1433 * Here's what our stack frame will look like:
1434 * +---------------------------------------------------------+
1435 * | original SS |
1436 * | original Return RSP |
1437 * | original RFLAGS |
1438 * | original CS |
1439 * | original RIP |
1440 * +---------------------------------------------------------+
1441 * | temp storage for rdx |
1442 * +---------------------------------------------------------+
1443 * | "NMI executing" variable |
1444 * +---------------------------------------------------------+
1445 * | iret SS } Copied from "outermost" frame |
1446 * | iret Return RSP } on each loop iteration; overwritten |
1447 * | iret RFLAGS } by a nested NMI to force another |
1448 * | iret CS } iteration if needed. |
1449 * | iret RIP } |
1450 * +---------------------------------------------------------+
1451 * | outermost SS } initialized in first_nmi; |
1452 * | outermost Return RSP } will not be changed before |
1453 * | outermost RFLAGS } NMI processing is done. |
1454 * | outermost CS } Copied to "iret" frame on each |
1455 * | outermost RIP } iteration. |
1456 * +---------------------------------------------------------+
1457 * | pt_regs |
1458 * +---------------------------------------------------------+
1459 *
1460 * The "original" frame is used by hardware. Before re-enabling
1461 * NMIs, we need to be done with it, and we need to leave enough
1462 * space for the asm code here.
1463 *
1464 * We return by executing IRET while RSP points to the "iret" frame.
1465 * That will either return for real or it will loop back into NMI
1466 * processing.
1467 *
1468 * The "outermost" frame is copied to the "iret" frame on each
1469 * iteration of the loop, so each iteration starts with the "iret"
1470 * frame pointing to the final return target.
1471 */
1472
1473 /*
1474 * Determine whether we're a nested NMI.
1475 *
1476 * If we interrupted kernel code between repeat_nmi and
1477 * end_repeat_nmi, then we are a nested NMI. We must not
1478 * modify the "iret" frame because it's being written by
1479 * the outer NMI. That's okay; the outer NMI handler is
1480 * about to about to call do_nmi anyway, so we can just
1481 * resume the outer NMI.
1482 */
1483
1484 movq $repeat_nmi, %rdx
1485 cmpq 8(%rsp), %rdx
1486 ja 1f
1487 movq $end_repeat_nmi, %rdx
1488 cmpq 8(%rsp), %rdx
1489 ja nested_nmi_out
14901:
1491
1492 /*
1493 * Now check "NMI executing". If it's set, then we're nested.
1494 * This will not detect if we interrupted an outer NMI just
1495 * before IRET.
1496 */
1497 cmpl $1, -8(%rsp)
1498 je nested_nmi
1499
1500 /*
1501 * Now test if the previous stack was an NMI stack. This covers
1502 * the case where we interrupt an outer NMI after it clears
1503 * "NMI executing" but before IRET. We need to be careful, though:
1504 * there is one case in which RSP could point to the NMI stack
1505 * despite there being no NMI active: naughty userspace controls
1506 * RSP at the very beginning of the SYSCALL targets. We can
1507 * pull a fast one on naughty userspace, though: we program
1508 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1509 * if it controls the kernel's RSP. We set DF before we clear
1510 * "NMI executing".
1511 */
1512 lea 6*8(%rsp), %rdx
1513 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1514 cmpq %rdx, 4*8(%rsp)
1515 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1516 ja first_nmi
1517
1518 subq $EXCEPTION_STKSZ, %rdx
1519 cmpq %rdx, 4*8(%rsp)
1520 /* If it is below the NMI stack, it is a normal NMI */
1521 jb first_nmi
1522
1523 /* Ah, it is within the NMI stack. */
1524
1525 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1526 jz first_nmi /* RSP was user controlled. */
1527
1528 /* This is a nested NMI. */
1529
1530nested_nmi:
1531 /*
1532 * Modify the "iret" frame to point to repeat_nmi, forcing another
1533 * iteration of NMI handling.
1534 */
1535 subq $8, %rsp
1536 leaq -10*8(%rsp), %rdx
1537 pushq $__KERNEL_DS
1538 pushq %rdx
1539 pushfq
1540 pushq $__KERNEL_CS
1541 pushq $repeat_nmi
1542
1543 /* Put stack back */
1544 addq $(6*8), %rsp
1545
1546nested_nmi_out:
1547 popq %rdx
1548
1549 /* We are returning to kernel mode, so this cannot result in a fault. */
1550 iretq
1551
1552first_nmi:
1553 /* Restore rdx. */
1554 movq (%rsp), %rdx
1555
1556 /* Make room for "NMI executing". */
1557 pushq $0
1558
1559 /* Leave room for the "iret" frame */
1560 subq $(5*8), %rsp
1561
1562 /* Copy the "original" frame to the "outermost" frame */
1563 .rept 5
1564 pushq 11*8(%rsp)
1565 .endr
1566 UNWIND_HINT_IRET_REGS
1567
1568 /* Everything up to here is safe from nested NMIs */
1569
1570#ifdef CONFIG_DEBUG_ENTRY
1571 /*
1572 * For ease of testing, unmask NMIs right away. Disabled by
1573 * default because IRET is very expensive.
1574 */
1575 pushq $0 /* SS */
1576 pushq %rsp /* RSP (minus 8 because of the previous push) */
1577 addq $8, (%rsp) /* Fix up RSP */
1578 pushfq /* RFLAGS */
1579 pushq $__KERNEL_CS /* CS */
1580 pushq $1f /* RIP */
1581 iretq /* continues at repeat_nmi below */
1582 UNWIND_HINT_IRET_REGS
15831:
1584#endif
1585
1586repeat_nmi:
1587 /*
1588 * If there was a nested NMI, the first NMI's iret will return
1589 * here. But NMIs are still enabled and we can take another
1590 * nested NMI. The nested NMI checks the interrupted RIP to see
1591 * if it is between repeat_nmi and end_repeat_nmi, and if so
1592 * it will just return, as we are about to repeat an NMI anyway.
1593 * This makes it safe to copy to the stack frame that a nested
1594 * NMI will update.
1595 *
1596 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1597 * we're repeating an NMI, gsbase has the same value that it had on
1598 * the first iteration. paranoid_entry will load the kernel
1599 * gsbase if needed before we call do_nmi. "NMI executing"
1600 * is zero.
1601 */
1602 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1603
1604 /*
1605 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1606 * here must not modify the "iret" frame while we're writing to
1607 * it or it will end up containing garbage.
1608 */
1609 addq $(10*8), %rsp
1610 .rept 5
1611 pushq -6*8(%rsp)
1612 .endr
1613 subq $(5*8), %rsp
1614end_repeat_nmi:
1615
1616 /*
1617 * Everything below this point can be preempted by a nested NMI.
1618 * If this happens, then the inner NMI will change the "iret"
1619 * frame to point back to repeat_nmi.
1620 */
1621 pushq $-1 /* ORIG_RAX: no syscall to restart */
1622
1623 /*
1624 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1625 * as we should not be calling schedule in NMI context.
1626 * Even with normal interrupts enabled. An NMI should not be
1627 * setting NEED_RESCHED or anything that normal interrupts and
1628 * exceptions might do.
1629 */
1630 call paranoid_entry
1631 UNWIND_HINT_REGS
1632
1633 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1634 movq %rsp, %rdi
1635 movq $-1, %rsi
1636 call do_nmi
1637
1638 RESTORE_CR3 scratch_reg=%r15 save_reg=%r14
1639
1640 testl %ebx, %ebx /* swapgs needed? */
1641 jnz nmi_restore
1642nmi_swapgs:
1643 SWAPGS_UNSAFE_STACK
1644nmi_restore:
1645 POP_REGS
1646
1647 /*
1648 * Skip orig_ax and the "outermost" frame to point RSP at the "iret"
1649 * at the "iret" frame.
1650 */
1651 addq $6*8, %rsp
1652
1653 /*
1654 * Clear "NMI executing". Set DF first so that we can easily
1655 * distinguish the remaining code between here and IRET from
1656 * the SYSCALL entry and exit paths.
1657 *
1658 * We arguably should just inspect RIP instead, but I (Andy) wrote
1659 * this code when I had the misapprehension that Xen PV supported
1660 * NMIs, and Xen PV would break that approach.
1661 */
1662 std
1663 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1664
1665 /*
1666 * iretq reads the "iret" frame and exits the NMI stack in a
1667 * single instruction. We are returning to kernel mode, so this
1668 * cannot result in a fault. Similarly, we don't need to worry
1669 * about espfix64 on the way back to kernel mode.
1670 */
1671 iretq
1672END(nmi)
1673
1674ENTRY(ignore_sysret)
1675 UNWIND_HINT_EMPTY
1676 mov $-ENOSYS, %eax
1677 sysret
1678END(ignore_sysret)
1679
1680ENTRY(rewind_stack_do_exit)
1681 UNWIND_HINT_FUNC
1682 /* Prevent any naive code from trying to unwind to our caller. */
1683 xorl %ebp, %ebp
1684
1685 movq PER_CPU_VAR(cpu_current_top_of_stack), %rax
1686 leaq -PTREGS_SIZE(%rax), %rsp
1687 UNWIND_HINT_FUNC sp_offset=PTREGS_SIZE
1688
1689 call do_exit
1690END(rewind_stack_do_exit)