Loading...
1/*
2 * GPR board platform device registration (Au1550)
3 *
4 * Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/delay.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/kernel.h>
25#include <linux/platform_device.h>
26#include <linux/pm.h>
27#include <linux/mtd/partitions.h>
28#include <linux/mtd/physmap.h>
29#include <linux/leds.h>
30#include <linux/gpio.h>
31#include <linux/i2c.h>
32#include <linux/i2c-gpio.h>
33#include <asm/bootinfo.h>
34#include <asm/reboot.h>
35#include <asm/mach-au1x00/au1000.h>
36#include <prom.h>
37
38const char *get_system_type(void)
39{
40 return "GPR";
41}
42
43void __init prom_init(void)
44{
45 unsigned char *memsize_str;
46 unsigned long memsize;
47
48 prom_argc = fw_arg0;
49 prom_argv = (char **)fw_arg1;
50 prom_envp = (char **)fw_arg2;
51
52 prom_init_cmdline();
53
54 memsize_str = prom_getenv("memsize");
55 if (!memsize_str)
56 memsize = 0x04000000;
57 else
58 strict_strtoul(memsize_str, 0, &memsize);
59 add_memory_region(0, memsize, BOOT_MEM_RAM);
60}
61
62void prom_putchar(unsigned char c)
63{
64 alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
65}
66
67static void gpr_reset(char *c)
68{
69 /* switch System-LED to orange (red# and green# on) */
70 alchemy_gpio_direction_output(4, 0);
71 alchemy_gpio_direction_output(5, 0);
72
73 /* trigger watchdog to reset board in 200ms */
74 printk(KERN_EMERG "Triggering watchdog soft reset...\n");
75 raw_local_irq_disable();
76 alchemy_gpio_direction_output(1, 0);
77 udelay(1);
78 alchemy_gpio_set_value(1, 1);
79 while (1)
80 cpu_wait();
81}
82
83static void gpr_power_off(void)
84{
85 while (1)
86 cpu_wait();
87}
88
89void __init board_setup(void)
90{
91 printk(KERN_INFO "Trapeze ITS GPR board\n");
92
93 pm_power_off = gpr_power_off;
94 _machine_halt = gpr_power_off;
95 _machine_restart = gpr_reset;
96
97 /* Enable UART1/3 */
98 alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
99 alchemy_uart_enable(AU1000_UART1_PHYS_ADDR);
100
101 /* Take away Reset of UMTS-card */
102 alchemy_gpio_direction_output(215, 1);
103}
104
105/*
106 * Watchdog
107 */
108static struct resource gpr_wdt_resource[] = {
109 [0] = {
110 .start = 1,
111 .end = 1,
112 .name = "gpr-adm6320-wdt",
113 .flags = IORESOURCE_IRQ,
114 }
115};
116
117static struct platform_device gpr_wdt_device = {
118 .name = "adm6320-wdt",
119 .id = 0,
120 .num_resources = ARRAY_SIZE(gpr_wdt_resource),
121 .resource = gpr_wdt_resource,
122};
123
124/*
125 * FLASH
126 *
127 * 0x00000000-0x00200000 : "kernel"
128 * 0x00200000-0x00a00000 : "rootfs"
129 * 0x01d00000-0x01f00000 : "config"
130 * 0x01c00000-0x01d00000 : "yamon"
131 * 0x01d00000-0x01d40000 : "yamon env vars"
132 * 0x00000000-0x00a00000 : "kernel+rootfs"
133 */
134static struct mtd_partition gpr_mtd_partitions[] = {
135 {
136 .name = "kernel",
137 .size = 0x00200000,
138 .offset = 0,
139 },
140 {
141 .name = "rootfs",
142 .size = 0x00800000,
143 .offset = MTDPART_OFS_APPEND,
144 .mask_flags = MTD_WRITEABLE,
145 },
146 {
147 .name = "config",
148 .size = 0x00200000,
149 .offset = 0x01d00000,
150 },
151 {
152 .name = "yamon",
153 .size = 0x00100000,
154 .offset = 0x01c00000,
155 },
156 {
157 .name = "yamon env vars",
158 .size = 0x00040000,
159 .offset = MTDPART_OFS_APPEND,
160 },
161 {
162 .name = "kernel+rootfs",
163 .size = 0x00a00000,
164 .offset = 0,
165 },
166};
167
168static struct physmap_flash_data gpr_flash_data = {
169 .width = 4,
170 .nr_parts = ARRAY_SIZE(gpr_mtd_partitions),
171 .parts = gpr_mtd_partitions,
172};
173
174static struct resource gpr_mtd_resource = {
175 .start = 0x1e000000,
176 .end = 0x1fffffff,
177 .flags = IORESOURCE_MEM,
178};
179
180static struct platform_device gpr_mtd_device = {
181 .name = "physmap-flash",
182 .dev = {
183 .platform_data = &gpr_flash_data,
184 },
185 .num_resources = 1,
186 .resource = &gpr_mtd_resource,
187};
188
189/*
190 * LEDs
191 */
192static struct gpio_led gpr_gpio_leds[] = {
193 { /* green */
194 .name = "gpr:green",
195 .gpio = 4,
196 .active_low = 1,
197 },
198 { /* red */
199 .name = "gpr:red",
200 .gpio = 5,
201 .active_low = 1,
202 }
203};
204
205static struct gpio_led_platform_data gpr_led_data = {
206 .num_leds = ARRAY_SIZE(gpr_gpio_leds),
207 .leds = gpr_gpio_leds,
208};
209
210static struct platform_device gpr_led_devices = {
211 .name = "leds-gpio",
212 .id = -1,
213 .dev = {
214 .platform_data = &gpr_led_data,
215 }
216};
217
218/*
219 * I2C
220 */
221static struct i2c_gpio_platform_data gpr_i2c_data = {
222 .sda_pin = 209,
223 .sda_is_open_drain = 1,
224 .scl_pin = 210,
225 .scl_is_open_drain = 1,
226 .udelay = 2, /* ~100 kHz */
227 .timeout = HZ,
228};
229
230static struct platform_device gpr_i2c_device = {
231 .name = "i2c-gpio",
232 .id = -1,
233 .dev.platform_data = &gpr_i2c_data,
234};
235
236static struct i2c_board_info gpr_i2c_info[] __initdata = {
237 {
238 I2C_BOARD_INFO("lm83", 0x18),
239 .type = "lm83"
240 }
241};
242
243
244
245static struct resource alchemy_pci_host_res[] = {
246 [0] = {
247 .start = AU1500_PCI_PHYS_ADDR,
248 .end = AU1500_PCI_PHYS_ADDR + 0xfff,
249 .flags = IORESOURCE_MEM,
250 },
251};
252
253static int gpr_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
254{
255 if ((slot == 0) && (pin == 1))
256 return AU1550_PCI_INTA;
257 else if ((slot == 0) && (pin == 2))
258 return AU1550_PCI_INTB;
259
260 return 0xff;
261}
262
263static struct alchemy_pci_platdata gpr_pci_pd = {
264 .board_map_irq = gpr_map_pci_irq,
265 .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
266 PCI_CONFIG_CH |
267#if defined(__MIPSEB__)
268 PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
269#else
270 0,
271#endif
272};
273
274static struct platform_device gpr_pci_host_dev = {
275 .dev.platform_data = &gpr_pci_pd,
276 .name = "alchemy-pci",
277 .id = 0,
278 .num_resources = ARRAY_SIZE(alchemy_pci_host_res),
279 .resource = alchemy_pci_host_res,
280};
281
282static struct platform_device *gpr_devices[] __initdata = {
283 &gpr_wdt_device,
284 &gpr_mtd_device,
285 &gpr_i2c_device,
286 &gpr_led_devices,
287};
288
289static int __init gpr_pci_init(void)
290{
291 return platform_device_register(&gpr_pci_host_dev);
292}
293/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
294arch_initcall(gpr_pci_init);
295
296
297static int __init gpr_dev_init(void)
298{
299 i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info));
300
301 return platform_add_devices(gpr_devices, ARRAY_SIZE(gpr_devices));
302}
303device_initcall(gpr_dev_init);
1/*
2 * GPR board platform device registration (Au1550)
3 *
4 * Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 */
20
21#include <linux/delay.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24#include <linux/kernel.h>
25#include <linux/platform_device.h>
26#include <linux/pm.h>
27#include <linux/mtd/partitions.h>
28#include <linux/mtd/physmap.h>
29#include <linux/leds.h>
30#include <linux/gpio.h>
31#include <linux/i2c.h>
32#include <linux/i2c-gpio.h>
33#include <linux/gpio/machine.h>
34#include <asm/bootinfo.h>
35#include <asm/idle.h>
36#include <asm/reboot.h>
37#include <asm/mach-au1x00/au1000.h>
38#include <asm/mach-au1x00/gpio-au1000.h>
39#include <prom.h>
40
41const char *get_system_type(void)
42{
43 return "GPR";
44}
45
46void __init prom_init(void)
47{
48 unsigned char *memsize_str;
49 unsigned long memsize;
50
51 prom_argc = fw_arg0;
52 prom_argv = (char **)fw_arg1;
53 prom_envp = (char **)fw_arg2;
54
55 prom_init_cmdline();
56
57 memsize_str = prom_getenv("memsize");
58 if (!memsize_str || kstrtoul(memsize_str, 0, &memsize))
59 memsize = 0x04000000;
60 add_memory_region(0, memsize, BOOT_MEM_RAM);
61}
62
63void prom_putchar(unsigned char c)
64{
65 alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
66}
67
68static void gpr_reset(char *c)
69{
70 /* switch System-LED to orange (red# and green# on) */
71 alchemy_gpio_direction_output(4, 0);
72 alchemy_gpio_direction_output(5, 0);
73
74 /* trigger watchdog to reset board in 200ms */
75 printk(KERN_EMERG "Triggering watchdog soft reset...\n");
76 raw_local_irq_disable();
77 alchemy_gpio_direction_output(1, 0);
78 udelay(1);
79 alchemy_gpio_set_value(1, 1);
80 while (1)
81 cpu_wait();
82}
83
84static void gpr_power_off(void)
85{
86 while (1)
87 cpu_wait();
88}
89
90void __init board_setup(void)
91{
92 printk(KERN_INFO "Trapeze ITS GPR board\n");
93
94 pm_power_off = gpr_power_off;
95 _machine_halt = gpr_power_off;
96 _machine_restart = gpr_reset;
97
98 /* Enable UART1/3 */
99 alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
100 alchemy_uart_enable(AU1000_UART1_PHYS_ADDR);
101
102 /* Take away Reset of UMTS-card */
103 alchemy_gpio_direction_output(215, 1);
104}
105
106/*
107 * Watchdog
108 */
109static struct resource gpr_wdt_resource[] = {
110 [0] = {
111 .start = 1,
112 .end = 1,
113 .name = "gpr-adm6320-wdt",
114 .flags = IORESOURCE_IRQ,
115 }
116};
117
118static struct platform_device gpr_wdt_device = {
119 .name = "adm6320-wdt",
120 .id = 0,
121 .num_resources = ARRAY_SIZE(gpr_wdt_resource),
122 .resource = gpr_wdt_resource,
123};
124
125/*
126 * FLASH
127 *
128 * 0x00000000-0x00200000 : "kernel"
129 * 0x00200000-0x00a00000 : "rootfs"
130 * 0x01d00000-0x01f00000 : "config"
131 * 0x01c00000-0x01d00000 : "yamon"
132 * 0x01d00000-0x01d40000 : "yamon env vars"
133 * 0x00000000-0x00a00000 : "kernel+rootfs"
134 */
135static struct mtd_partition gpr_mtd_partitions[] = {
136 {
137 .name = "kernel",
138 .size = 0x00200000,
139 .offset = 0,
140 },
141 {
142 .name = "rootfs",
143 .size = 0x00800000,
144 .offset = MTDPART_OFS_APPEND,
145 .mask_flags = MTD_WRITEABLE,
146 },
147 {
148 .name = "config",
149 .size = 0x00200000,
150 .offset = 0x01d00000,
151 },
152 {
153 .name = "yamon",
154 .size = 0x00100000,
155 .offset = 0x01c00000,
156 },
157 {
158 .name = "yamon env vars",
159 .size = 0x00040000,
160 .offset = MTDPART_OFS_APPEND,
161 },
162 {
163 .name = "kernel+rootfs",
164 .size = 0x00a00000,
165 .offset = 0,
166 },
167};
168
169static struct physmap_flash_data gpr_flash_data = {
170 .width = 4,
171 .nr_parts = ARRAY_SIZE(gpr_mtd_partitions),
172 .parts = gpr_mtd_partitions,
173};
174
175static struct resource gpr_mtd_resource = {
176 .start = 0x1e000000,
177 .end = 0x1fffffff,
178 .flags = IORESOURCE_MEM,
179};
180
181static struct platform_device gpr_mtd_device = {
182 .name = "physmap-flash",
183 .dev = {
184 .platform_data = &gpr_flash_data,
185 },
186 .num_resources = 1,
187 .resource = &gpr_mtd_resource,
188};
189
190/*
191 * LEDs
192 */
193static const struct gpio_led gpr_gpio_leds[] = {
194 { /* green */
195 .name = "gpr:green",
196 .gpio = 4,
197 .active_low = 1,
198 },
199 { /* red */
200 .name = "gpr:red",
201 .gpio = 5,
202 .active_low = 1,
203 }
204};
205
206static struct gpio_led_platform_data gpr_led_data = {
207 .num_leds = ARRAY_SIZE(gpr_gpio_leds),
208 .leds = gpr_gpio_leds,
209};
210
211static struct platform_device gpr_led_devices = {
212 .name = "leds-gpio",
213 .id = -1,
214 .dev = {
215 .platform_data = &gpr_led_data,
216 }
217};
218
219/*
220 * I2C
221 */
222static struct gpiod_lookup_table gpr_i2c_gpiod_table = {
223 .dev_id = "i2c-gpio",
224 .table = {
225 /*
226 * This should be on "GPIO2" which has base at 200 so
227 * the global numbers 209 and 210 should correspond to
228 * local offsets 9 and 10.
229 */
230 GPIO_LOOKUP_IDX("alchemy-gpio2", 9, NULL, 0,
231 GPIO_ACTIVE_HIGH),
232 GPIO_LOOKUP_IDX("alchemy-gpio2", 10, NULL, 1,
233 GPIO_ACTIVE_HIGH),
234 },
235};
236
237static struct i2c_gpio_platform_data gpr_i2c_data = {
238 /*
239 * The open drain mode is hardwired somewhere or an electrical
240 * property of the alchemy GPIO controller.
241 */
242 .sda_is_open_drain = 1,
243 .scl_is_open_drain = 1,
244 .udelay = 2, /* ~100 kHz */
245 .timeout = HZ,
246};
247
248static struct platform_device gpr_i2c_device = {
249 .name = "i2c-gpio",
250 .id = -1,
251 .dev.platform_data = &gpr_i2c_data,
252};
253
254static struct i2c_board_info gpr_i2c_info[] __initdata = {
255 {
256 I2C_BOARD_INFO("lm83", 0x18),
257 }
258};
259
260
261
262static struct resource alchemy_pci_host_res[] = {
263 [0] = {
264 .start = AU1500_PCI_PHYS_ADDR,
265 .end = AU1500_PCI_PHYS_ADDR + 0xfff,
266 .flags = IORESOURCE_MEM,
267 },
268};
269
270static int gpr_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
271{
272 if ((slot == 0) && (pin == 1))
273 return AU1550_PCI_INTA;
274 else if ((slot == 0) && (pin == 2))
275 return AU1550_PCI_INTB;
276
277 return 0xff;
278}
279
280static struct alchemy_pci_platdata gpr_pci_pd = {
281 .board_map_irq = gpr_map_pci_irq,
282 .pci_cfg_set = PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
283 PCI_CONFIG_CH |
284#if defined(__MIPSEB__)
285 PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
286#else
287 0,
288#endif
289};
290
291static struct platform_device gpr_pci_host_dev = {
292 .dev.platform_data = &gpr_pci_pd,
293 .name = "alchemy-pci",
294 .id = 0,
295 .num_resources = ARRAY_SIZE(alchemy_pci_host_res),
296 .resource = alchemy_pci_host_res,
297};
298
299static struct platform_device *gpr_devices[] __initdata = {
300 &gpr_wdt_device,
301 &gpr_mtd_device,
302 &gpr_i2c_device,
303 &gpr_led_devices,
304};
305
306static int __init gpr_pci_init(void)
307{
308 return platform_device_register(&gpr_pci_host_dev);
309}
310/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
311arch_initcall(gpr_pci_init);
312
313
314static int __init gpr_dev_init(void)
315{
316 gpiod_add_lookup_table(&gpr_i2c_gpiod_table);
317 i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info));
318
319 return platform_add_devices(gpr_devices, ARRAY_SIZE(gpr_devices));
320}
321device_initcall(gpr_dev_init);