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1/* SPDX-License-Identifier: GPL-2.0 */
2/* Microchip switch driver common header
3 *
4 * Copyright (C) 2017-2019 Microchip Technology Inc.
5 */
6
7#ifndef __KSZ_COMMON_H
8#define __KSZ_COMMON_H
9
10#include <linux/etherdevice.h>
11#include <linux/kernel.h>
12#include <linux/mutex.h>
13#include <linux/phy.h>
14#include <linux/regmap.h>
15#include <net/dsa.h>
16
17struct vlan_table {
18 u32 table[3];
19};
20
21struct ksz_port_mib {
22 struct mutex cnt_mutex; /* structure access */
23 u8 cnt_ptr;
24 u64 *counters;
25};
26
27struct ksz_port {
28 u16 member;
29 u16 vid_member;
30 int stp_state;
31 struct phy_device phydev;
32
33 u32 on:1; /* port is not disabled by hardware */
34 u32 phy:1; /* port has a PHY */
35 u32 fiber:1; /* port is fiber */
36 u32 sgmii:1; /* port is SGMII */
37 u32 force:1;
38 u32 read:1; /* read MIB counters in background */
39 u32 freeze:1; /* MIB counter freeze is enabled */
40
41 struct ksz_port_mib mib;
42};
43
44struct ksz_device {
45 struct dsa_switch *ds;
46 struct ksz_platform_data *pdata;
47 const char *name;
48
49 struct mutex dev_mutex; /* device access */
50 struct mutex regmap_mutex; /* regmap access */
51 struct mutex alu_mutex; /* ALU access */
52 struct mutex vlan_mutex; /* vlan access */
53 const struct ksz_dev_ops *dev_ops;
54
55 struct device *dev;
56 struct regmap *regmap[3];
57
58 void *priv;
59
60 struct gpio_desc *reset_gpio; /* Optional reset GPIO */
61
62 /* chip specific data */
63 u32 chip_id;
64 int num_vlans;
65 int num_alus;
66 int num_statics;
67 int cpu_port; /* port connected to CPU */
68 int cpu_ports; /* port bitmap can be cpu port */
69 int phy_port_cnt;
70 int port_cnt;
71 int reg_mib_cnt;
72 int mib_cnt;
73 int mib_port_cnt;
74 int last_port; /* ports after that not used */
75 phy_interface_t interface;
76 u32 regs_size;
77 bool phy_errata_9477;
78 bool synclko_125;
79
80 struct vlan_table *vlan_cache;
81
82 struct ksz_port *ports;
83 struct timer_list mib_read_timer;
84 struct work_struct mib_read;
85 unsigned long mib_read_interval;
86 u16 br_member;
87 u16 member;
88 u16 live_ports;
89 u16 on_ports; /* ports enabled by DSA */
90 u16 rx_ports;
91 u16 tx_ports;
92 u16 mirror_rx;
93 u16 mirror_tx;
94 u32 features; /* chip specific features */
95 u32 overrides; /* chip functions set by user */
96 u16 host_mask;
97 u16 port_mask;
98};
99
100struct alu_struct {
101 /* entry 1 */
102 u8 is_static:1;
103 u8 is_src_filter:1;
104 u8 is_dst_filter:1;
105 u8 prio_age:3;
106 u32 _reserv_0_1:23;
107 u8 mstp:3;
108 /* entry 2 */
109 u8 is_override:1;
110 u8 is_use_fid:1;
111 u32 _reserv_1_1:23;
112 u8 port_forward:7;
113 /* entry 3 & 4*/
114 u32 _reserv_2_1:9;
115 u8 fid:7;
116 u8 mac[ETH_ALEN];
117};
118
119struct ksz_dev_ops {
120 u32 (*get_port_addr)(int port, int offset);
121 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
122 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
123 void (*phy_setup)(struct ksz_device *dev, int port,
124 struct phy_device *phy);
125 void (*port_cleanup)(struct ksz_device *dev, int port);
126 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
127 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
128 void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
129 int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr,
130 u8 *fid, u8 *src_port, u8 *timestamp,
131 u16 *entries);
132 int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr,
133 struct alu_struct *alu);
134 void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr,
135 struct alu_struct *alu);
136 void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
137 u64 *cnt);
138 void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
139 u64 *dropped, u64 *cnt);
140 void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);
141 void (*port_init_cnt)(struct ksz_device *dev, int port);
142 int (*shutdown)(struct ksz_device *dev);
143 int (*detect)(struct ksz_device *dev);
144 int (*init)(struct ksz_device *dev);
145 void (*exit)(struct ksz_device *dev);
146};
147
148struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);
149int ksz_switch_register(struct ksz_device *dev,
150 const struct ksz_dev_ops *ops);
151void ksz_switch_remove(struct ksz_device *dev);
152
153int ksz8795_switch_register(struct ksz_device *dev);
154int ksz9477_switch_register(struct ksz_device *dev);
155
156void ksz_update_port_member(struct ksz_device *dev, int port);
157void ksz_init_mib_timer(struct ksz_device *dev);
158
159/* Common DSA access functions */
160
161int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg);
162int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val);
163void ksz_adjust_link(struct dsa_switch *ds, int port,
164 struct phy_device *phydev);
165int ksz_sset_count(struct dsa_switch *ds, int port, int sset);
166void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf);
167int ksz_port_bridge_join(struct dsa_switch *ds, int port,
168 struct net_device *br);
169void ksz_port_bridge_leave(struct dsa_switch *ds, int port,
170 struct net_device *br);
171void ksz_port_fast_age(struct dsa_switch *ds, int port);
172int ksz_port_vlan_prepare(struct dsa_switch *ds, int port,
173 const struct switchdev_obj_port_vlan *vlan);
174int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb,
175 void *data);
176int ksz_port_mdb_prepare(struct dsa_switch *ds, int port,
177 const struct switchdev_obj_port_mdb *mdb);
178void ksz_port_mdb_add(struct dsa_switch *ds, int port,
179 const struct switchdev_obj_port_mdb *mdb);
180int ksz_port_mdb_del(struct dsa_switch *ds, int port,
181 const struct switchdev_obj_port_mdb *mdb);
182int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy);
183void ksz_disable_port(struct dsa_switch *ds, int port);
184
185/* Common register access functions */
186
187static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
188{
189 unsigned int value;
190 int ret = regmap_read(dev->regmap[0], reg, &value);
191
192 *val = value;
193 return ret;
194}
195
196static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
197{
198 unsigned int value;
199 int ret = regmap_read(dev->regmap[1], reg, &value);
200
201 *val = value;
202 return ret;
203}
204
205static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
206{
207 unsigned int value;
208 int ret = regmap_read(dev->regmap[2], reg, &value);
209
210 *val = value;
211 return ret;
212}
213
214static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)
215{
216 u32 value[2];
217 int ret;
218
219 ret = regmap_bulk_read(dev->regmap[2], reg, value, 2);
220 if (!ret) {
221 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
222 value[0] = swab32(value[0]);
223 value[1] = swab32(value[1]);
224 *val = swab64((u64)*value);
225 }
226
227 return ret;
228}
229
230static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
231{
232 return regmap_write(dev->regmap[0], reg, value);
233}
234
235static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
236{
237 return regmap_write(dev->regmap[1], reg, value);
238}
239
240static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
241{
242 return regmap_write(dev->regmap[2], reg, value);
243}
244
245static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)
246{
247 u32 val[2];
248
249 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
250 value = swab64(value);
251 val[0] = swab32(value & 0xffffffffULL);
252 val[1] = swab32(value >> 32ULL);
253
254 return regmap_bulk_write(dev->regmap[2], reg, val, 2);
255}
256
257static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
258 u8 *data)
259{
260 ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
261}
262
263static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
264 u16 *data)
265{
266 ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
267}
268
269static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
270 u32 *data)
271{
272 ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
273}
274
275static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
276 u8 data)
277{
278 ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
279}
280
281static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
282 u16 data)
283{
284 ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data);
285}
286
287static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
288 u32 data)
289{
290 ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
291}
292
293static inline void ksz_regmap_lock(void *__mtx)
294{
295 struct mutex *mtx = __mtx;
296 mutex_lock(mtx);
297}
298
299static inline void ksz_regmap_unlock(void *__mtx)
300{
301 struct mutex *mtx = __mtx;
302 mutex_unlock(mtx);
303}
304
305/* Regmap tables generation */
306#define KSZ_SPI_OP_RD 3
307#define KSZ_SPI_OP_WR 2
308
309#define swabnot_used(x) 0
310
311#define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \
312 swab##swp((opcode) << ((regbits) + (regpad)))
313
314#define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \
315 { \
316 .name = #width, \
317 .val_bits = (width), \
318 .reg_stride = 1, \
319 .reg_bits = (regbits) + (regalign), \
320 .pad_bits = (regpad), \
321 .max_register = BIT(regbits) - 1, \
322 .cache_type = REGCACHE_NONE, \
323 .read_flag_mask = \
324 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \
325 regbits, regpad), \
326 .write_flag_mask = \
327 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \
328 regbits, regpad), \
329 .lock = ksz_regmap_lock, \
330 .unlock = ksz_regmap_unlock, \
331 .reg_format_endian = REGMAP_ENDIAN_BIG, \
332 .val_format_endian = REGMAP_ENDIAN_BIG \
333 }
334
335#define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \
336 static const struct regmap_config ksz##_regmap_config[] = { \
337 KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \
338 KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \
339 KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \
340 }
341
342#endif