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1/* SPDX-License-Identifier: GPL-2.0 */
2/* Microchip switch driver common header
3 *
4 * Copyright (C) 2017-2019 Microchip Technology Inc.
5 */
6
7#ifndef __KSZ_COMMON_H
8#define __KSZ_COMMON_H
9
10#include <linux/etherdevice.h>
11#include <linux/kernel.h>
12#include <linux/mutex.h>
13#include <linux/phy.h>
14#include <linux/regmap.h>
15#include <net/dsa.h>
16
17struct vlan_table {
18 u32 table[3];
19};
20
21struct ksz_port_mib {
22 struct mutex cnt_mutex; /* structure access */
23 u8 cnt_ptr;
24 u64 *counters;
25};
26
27struct ksz_port {
28 u16 member;
29 u16 vid_member;
30 int stp_state;
31 struct phy_device phydev;
32
33 u32 on:1; /* port is not disabled by hardware */
34 u32 phy:1; /* port has a PHY */
35 u32 fiber:1; /* port is fiber */
36 u32 sgmii:1; /* port is SGMII */
37 u32 force:1;
38 u32 read:1; /* read MIB counters in background */
39 u32 freeze:1; /* MIB counter freeze is enabled */
40
41 struct ksz_port_mib mib;
42 phy_interface_t interface;
43};
44
45struct ksz_device {
46 struct dsa_switch *ds;
47 struct ksz_platform_data *pdata;
48 const char *name;
49
50 struct mutex dev_mutex; /* device access */
51 struct mutex regmap_mutex; /* regmap access */
52 struct mutex alu_mutex; /* ALU access */
53 struct mutex vlan_mutex; /* vlan access */
54 const struct ksz_dev_ops *dev_ops;
55
56 struct device *dev;
57 struct regmap *regmap[3];
58
59 void *priv;
60
61 struct gpio_desc *reset_gpio; /* Optional reset GPIO */
62
63 /* chip specific data */
64 u32 chip_id;
65 int num_vlans;
66 int num_alus;
67 int num_statics;
68 int cpu_port; /* port connected to CPU */
69 int cpu_ports; /* port bitmap can be cpu port */
70 int phy_port_cnt;
71 int port_cnt;
72 int reg_mib_cnt;
73 int mib_cnt;
74 int mib_port_cnt;
75 int last_port; /* ports after that not used */
76 phy_interface_t compat_interface;
77 u32 regs_size;
78 bool phy_errata_9477;
79 bool synclko_125;
80
81 struct vlan_table *vlan_cache;
82
83 struct ksz_port *ports;
84 struct delayed_work mib_read;
85 unsigned long mib_read_interval;
86 u16 br_member;
87 u16 member;
88 u16 mirror_rx;
89 u16 mirror_tx;
90 u32 features; /* chip specific features */
91 u32 overrides; /* chip functions set by user */
92 u16 host_mask;
93 u16 port_mask;
94};
95
96struct alu_struct {
97 /* entry 1 */
98 u8 is_static:1;
99 u8 is_src_filter:1;
100 u8 is_dst_filter:1;
101 u8 prio_age:3;
102 u32 _reserv_0_1:23;
103 u8 mstp:3;
104 /* entry 2 */
105 u8 is_override:1;
106 u8 is_use_fid:1;
107 u32 _reserv_1_1:23;
108 u8 port_forward:7;
109 /* entry 3 & 4*/
110 u32 _reserv_2_1:9;
111 u8 fid:7;
112 u8 mac[ETH_ALEN];
113};
114
115struct ksz_dev_ops {
116 u32 (*get_port_addr)(int port, int offset);
117 void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
118 void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
119 void (*port_cleanup)(struct ksz_device *dev, int port);
120 void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
121 void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
122 void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
123 int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr,
124 u8 *fid, u8 *src_port, u8 *timestamp,
125 u16 *entries);
126 int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr,
127 struct alu_struct *alu);
128 void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr,
129 struct alu_struct *alu);
130 void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
131 u64 *cnt);
132 void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
133 u64 *dropped, u64 *cnt);
134 void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);
135 void (*port_init_cnt)(struct ksz_device *dev, int port);
136 int (*shutdown)(struct ksz_device *dev);
137 int (*detect)(struct ksz_device *dev);
138 int (*init)(struct ksz_device *dev);
139 void (*exit)(struct ksz_device *dev);
140};
141
142struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);
143int ksz_switch_register(struct ksz_device *dev,
144 const struct ksz_dev_ops *ops);
145void ksz_switch_remove(struct ksz_device *dev);
146
147int ksz8795_switch_register(struct ksz_device *dev);
148int ksz9477_switch_register(struct ksz_device *dev);
149
150void ksz_update_port_member(struct ksz_device *dev, int port);
151void ksz_init_mib_timer(struct ksz_device *dev);
152
153/* Common DSA access functions */
154
155int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg);
156int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val);
157void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode,
158 phy_interface_t interface);
159int ksz_sset_count(struct dsa_switch *ds, int port, int sset);
160void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf);
161int ksz_port_bridge_join(struct dsa_switch *ds, int port,
162 struct net_device *br);
163void ksz_port_bridge_leave(struct dsa_switch *ds, int port,
164 struct net_device *br);
165void ksz_port_fast_age(struct dsa_switch *ds, int port);
166int ksz_port_vlan_prepare(struct dsa_switch *ds, int port,
167 const struct switchdev_obj_port_vlan *vlan);
168int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb,
169 void *data);
170int ksz_port_mdb_prepare(struct dsa_switch *ds, int port,
171 const struct switchdev_obj_port_mdb *mdb);
172void ksz_port_mdb_add(struct dsa_switch *ds, int port,
173 const struct switchdev_obj_port_mdb *mdb);
174int ksz_port_mdb_del(struct dsa_switch *ds, int port,
175 const struct switchdev_obj_port_mdb *mdb);
176int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy);
177
178/* Common register access functions */
179
180static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
181{
182 unsigned int value;
183 int ret = regmap_read(dev->regmap[0], reg, &value);
184
185 *val = value;
186 return ret;
187}
188
189static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
190{
191 unsigned int value;
192 int ret = regmap_read(dev->regmap[1], reg, &value);
193
194 *val = value;
195 return ret;
196}
197
198static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
199{
200 unsigned int value;
201 int ret = regmap_read(dev->regmap[2], reg, &value);
202
203 *val = value;
204 return ret;
205}
206
207static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)
208{
209 u32 value[2];
210 int ret;
211
212 ret = regmap_bulk_read(dev->regmap[2], reg, value, 2);
213 if (!ret) {
214 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
215 value[0] = swab32(value[0]);
216 value[1] = swab32(value[1]);
217 *val = swab64((u64)*value);
218 }
219
220 return ret;
221}
222
223static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
224{
225 return regmap_write(dev->regmap[0], reg, value);
226}
227
228static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
229{
230 return regmap_write(dev->regmap[1], reg, value);
231}
232
233static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
234{
235 return regmap_write(dev->regmap[2], reg, value);
236}
237
238static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)
239{
240 u32 val[2];
241
242 /* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
243 value = swab64(value);
244 val[0] = swab32(value & 0xffffffffULL);
245 val[1] = swab32(value >> 32ULL);
246
247 return regmap_bulk_write(dev->regmap[2], reg, val, 2);
248}
249
250static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
251 u8 *data)
252{
253 ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
254}
255
256static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
257 u16 *data)
258{
259 ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
260}
261
262static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
263 u32 *data)
264{
265 ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
266}
267
268static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
269 u8 data)
270{
271 ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
272}
273
274static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
275 u16 data)
276{
277 ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data);
278}
279
280static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
281 u32 data)
282{
283 ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
284}
285
286static inline void ksz_regmap_lock(void *__mtx)
287{
288 struct mutex *mtx = __mtx;
289 mutex_lock(mtx);
290}
291
292static inline void ksz_regmap_unlock(void *__mtx)
293{
294 struct mutex *mtx = __mtx;
295 mutex_unlock(mtx);
296}
297
298/* Regmap tables generation */
299#define KSZ_SPI_OP_RD 3
300#define KSZ_SPI_OP_WR 2
301
302#define swabnot_used(x) 0
303
304#define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) \
305 swab##swp((opcode) << ((regbits) + (regpad)))
306
307#define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) \
308 { \
309 .name = #width, \
310 .val_bits = (width), \
311 .reg_stride = 1, \
312 .reg_bits = (regbits) + (regalign), \
313 .pad_bits = (regpad), \
314 .max_register = BIT(regbits) - 1, \
315 .cache_type = REGCACHE_NONE, \
316 .read_flag_mask = \
317 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp, \
318 regbits, regpad), \
319 .write_flag_mask = \
320 KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp, \
321 regbits, regpad), \
322 .lock = ksz_regmap_lock, \
323 .unlock = ksz_regmap_unlock, \
324 .reg_format_endian = REGMAP_ENDIAN_BIG, \
325 .val_format_endian = REGMAP_ENDIAN_BIG \
326 }
327
328#define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) \
329 static const struct regmap_config ksz##_regmap_config[] = { \
330 KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \
331 KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \
332 KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \
333 }
334
335#endif