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v3.15
 
   1/*
   2 * ASIX AX8817X based USB 2.0 Ethernet Devices
   3 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
   4 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
   5 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
   6 * Copyright (c) 2002-2003 TiVo Inc.
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License as published by
  10 * the Free Software Foundation; either version 2 of the License, or
  11 * (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, see <http://www.gnu.org/licenses/>.
  20 */
  21
  22#include "asix.h"
  23
  24#define PHY_MODE_MARVELL	0x0000
  25#define MII_MARVELL_LED_CTRL	0x0018
  26#define MII_MARVELL_STATUS	0x001b
  27#define MII_MARVELL_CTRL	0x0014
  28
  29#define MARVELL_LED_MANUAL	0x0019
  30
  31#define MARVELL_STATUS_HWCFG	0x0004
  32
  33#define MARVELL_CTRL_TXDELAY	0x0002
  34#define MARVELL_CTRL_RXDELAY	0x0080
  35
  36#define	PHY_MODE_RTL8211CL	0x000C
  37
 
 
 
 
 
 
 
 
 
  38struct ax88172_int_data {
  39	__le16 res1;
  40	u8 link;
  41	__le16 res2;
  42	u8 status;
  43	__le16 res3;
  44} __packed;
  45
  46static void asix_status(struct usbnet *dev, struct urb *urb)
  47{
  48	struct ax88172_int_data *event;
  49	int link;
  50
  51	if (urb->actual_length < 8)
  52		return;
  53
  54	event = urb->transfer_buffer;
  55	link = event->link & 0x01;
  56	if (netif_carrier_ok(dev->net) != link) {
  57		usbnet_link_change(dev, link, 1);
  58		netdev_dbg(dev->net, "Link Status is: %d\n", link);
  59	}
  60}
  61
  62static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
  63{
  64	if (is_valid_ether_addr(addr)) {
  65		memcpy(dev->net->dev_addr, addr, ETH_ALEN);
  66	} else {
  67		netdev_info(dev->net, "invalid hw address, using random\n");
  68		eth_hw_addr_random(dev->net);
  69	}
  70}
  71
  72/* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
  73static u32 asix_get_phyid(struct usbnet *dev)
  74{
  75	int phy_reg;
  76	u32 phy_id;
  77	int i;
  78
  79	/* Poll for the rare case the FW or phy isn't ready yet.  */
  80	for (i = 0; i < 100; i++) {
  81		phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
 
 
  82		if (phy_reg != 0 && phy_reg != 0xFFFF)
  83			break;
  84		mdelay(1);
  85	}
  86
  87	if (phy_reg <= 0 || phy_reg == 0xFFFF)
  88		return 0;
  89
  90	phy_id = (phy_reg & 0xffff) << 16;
  91
  92	phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
  93	if (phy_reg < 0)
  94		return 0;
  95
  96	phy_id |= (phy_reg & 0xffff);
  97
  98	return phy_id;
  99}
 100
 101static u32 asix_get_link(struct net_device *net)
 102{
 103	struct usbnet *dev = netdev_priv(net);
 104
 105	return mii_link_ok(&dev->mii);
 106}
 107
 108static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
 109{
 110	struct usbnet *dev = netdev_priv(net);
 111
 112	return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 113}
 114
 115/* We need to override some ethtool_ops so we require our
 116   own structure so we don't interfere with other usbnet
 117   devices that may be connected at the same time. */
 118static const struct ethtool_ops ax88172_ethtool_ops = {
 119	.get_drvinfo		= asix_get_drvinfo,
 120	.get_link		= asix_get_link,
 121	.get_msglevel		= usbnet_get_msglevel,
 122	.set_msglevel		= usbnet_set_msglevel,
 123	.get_wol		= asix_get_wol,
 124	.set_wol		= asix_set_wol,
 125	.get_eeprom_len		= asix_get_eeprom_len,
 126	.get_eeprom		= asix_get_eeprom,
 127	.set_eeprom		= asix_set_eeprom,
 128	.get_settings		= usbnet_get_settings,
 129	.set_settings		= usbnet_set_settings,
 130	.nway_reset		= usbnet_nway_reset,
 
 
 131};
 132
 133static void ax88172_set_multicast(struct net_device *net)
 134{
 135	struct usbnet *dev = netdev_priv(net);
 136	struct asix_data *data = (struct asix_data *)&dev->data;
 137	u8 rx_ctl = 0x8c;
 138
 139	if (net->flags & IFF_PROMISC) {
 140		rx_ctl |= 0x01;
 141	} else if (net->flags & IFF_ALLMULTI ||
 142		   netdev_mc_count(net) > AX_MAX_MCAST) {
 143		rx_ctl |= 0x02;
 144	} else if (netdev_mc_empty(net)) {
 145		/* just broadcast and directed */
 146	} else {
 147		/* We use the 20 byte dev->data
 148		 * for our 8 byte filter buffer
 149		 * to avoid allocating memory that
 150		 * is tricky to free later */
 151		struct netdev_hw_addr *ha;
 152		u32 crc_bits;
 153
 154		memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
 155
 156		/* Build the multicast hash filter. */
 157		netdev_for_each_mc_addr(ha, net) {
 158			crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
 159			data->multi_filter[crc_bits >> 3] |=
 160			    1 << (crc_bits & 7);
 161		}
 162
 163		asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
 164				   AX_MCAST_FILTER_SIZE, data->multi_filter);
 165
 166		rx_ctl |= 0x10;
 167	}
 168
 169	asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
 170}
 171
 172static int ax88172_link_reset(struct usbnet *dev)
 173{
 174	u8 mode;
 175	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
 176
 177	mii_check_media(&dev->mii, 1, 1);
 178	mii_ethtool_gset(&dev->mii, &ecmd);
 179	mode = AX88172_MEDIUM_DEFAULT;
 180
 181	if (ecmd.duplex != DUPLEX_FULL)
 182		mode |= ~AX88172_MEDIUM_FD;
 183
 184	netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
 185		   ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
 186
 187	asix_write_medium_mode(dev, mode);
 188
 189	return 0;
 190}
 191
 192static const struct net_device_ops ax88172_netdev_ops = {
 193	.ndo_open		= usbnet_open,
 194	.ndo_stop		= usbnet_stop,
 195	.ndo_start_xmit		= usbnet_start_xmit,
 196	.ndo_tx_timeout		= usbnet_tx_timeout,
 197	.ndo_change_mtu		= usbnet_change_mtu,
 
 198	.ndo_set_mac_address 	= eth_mac_addr,
 199	.ndo_validate_addr	= eth_validate_addr,
 200	.ndo_do_ioctl		= asix_ioctl,
 201	.ndo_set_rx_mode	= ax88172_set_multicast,
 202};
 203
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 204static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
 205{
 206	int ret = 0;
 207	u8 buf[ETH_ALEN];
 208	int i;
 209	unsigned long gpio_bits = dev->driver_info->data;
 210
 211	usbnet_get_endpoints(dev,intf);
 212
 213	/* Toggle the GPIOs in a manufacturer/model specific way */
 214	for (i = 2; i >= 0; i--) {
 215		ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
 216				(gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL);
 217		if (ret < 0)
 218			goto out;
 219		msleep(5);
 220	}
 221
 222	ret = asix_write_rx_ctl(dev, 0x80);
 223	if (ret < 0)
 224		goto out;
 225
 226	/* Get the MAC address */
 227	ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
 
 228	if (ret < 0) {
 229		netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
 230			   ret);
 231		goto out;
 232	}
 233
 234	asix_set_netdev_dev_addr(dev, buf);
 235
 236	/* Initialize MII structure */
 237	dev->mii.dev = dev->net;
 238	dev->mii.mdio_read = asix_mdio_read;
 239	dev->mii.mdio_write = asix_mdio_write;
 240	dev->mii.phy_id_mask = 0x3f;
 241	dev->mii.reg_num_mask = 0x1f;
 242	dev->mii.phy_id = asix_get_phy_addr(dev);
 
 
 
 243
 244	dev->net->netdev_ops = &ax88172_netdev_ops;
 245	dev->net->ethtool_ops = &ax88172_ethtool_ops;
 246	dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
 247	dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
 248
 249	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
 250	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 251		ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
 252	mii_nway_restart(&dev->mii);
 253
 254	return 0;
 255
 256out:
 257	return ret;
 258}
 259
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 260static const struct ethtool_ops ax88772_ethtool_ops = {
 261	.get_drvinfo		= asix_get_drvinfo,
 262	.get_link		= asix_get_link,
 263	.get_msglevel		= usbnet_get_msglevel,
 264	.set_msglevel		= usbnet_set_msglevel,
 265	.get_wol		= asix_get_wol,
 266	.set_wol		= asix_set_wol,
 267	.get_eeprom_len		= asix_get_eeprom_len,
 268	.get_eeprom		= asix_get_eeprom,
 269	.set_eeprom		= asix_set_eeprom,
 270	.get_settings		= usbnet_get_settings,
 271	.set_settings		= usbnet_set_settings,
 272	.nway_reset		= usbnet_nway_reset,
 
 
 
 273};
 274
 275static int ax88772_link_reset(struct usbnet *dev)
 276{
 277	u16 mode;
 278	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
 279
 280	mii_check_media(&dev->mii, 1, 1);
 281	mii_ethtool_gset(&dev->mii, &ecmd);
 282	mode = AX88772_MEDIUM_DEFAULT;
 283
 284	if (ethtool_cmd_speed(&ecmd) != SPEED_100)
 285		mode &= ~AX_MEDIUM_PS;
 
 
 
 
 286
 287	if (ecmd.duplex != DUPLEX_FULL)
 288		mode &= ~AX_MEDIUM_FD;
 
 
 289
 290	netdev_dbg(dev->net, "ax88772_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
 291		   ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
 
 292
 293	asix_write_medium_mode(dev, mode);
 294
 295	return 0;
 
 
 
 296}
 297
 298static int ax88772_reset(struct usbnet *dev)
 299{
 300	struct asix_data *data = (struct asix_data *)&dev->data;
 301	int ret, embd_phy;
 302	u16 rx_ctl;
 
 303
 304	ret = asix_write_gpio(dev,
 305			AX_GPIO_RSE | AX_GPIO_GPO_2 | AX_GPIO_GPO2EN, 5);
 306	if (ret < 0)
 307		goto out;
 308
 309	embd_phy = ((asix_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
 310
 311	ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
 312	if (ret < 0) {
 313		netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
 314		goto out;
 315	}
 316
 317	ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
 318	if (ret < 0)
 319		goto out;
 
 320
 321	msleep(150);
 322
 323	ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
 324	if (ret < 0)
 325		goto out;
 326
 327	msleep(150);
 328
 329	if (embd_phy) {
 330		ret = asix_sw_reset(dev, AX_SWRESET_IPRL);
 331		if (ret < 0)
 332			goto out;
 333	} else {
 334		ret = asix_sw_reset(dev, AX_SWRESET_PRTE);
 
 335		if (ret < 0)
 336			goto out;
 337	}
 338
 339	msleep(150);
 340	rx_ctl = asix_read_rx_ctl(dev);
 341	netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
 342	ret = asix_write_rx_ctl(dev, 0x0000);
 
 
 
 
 
 343	if (ret < 0)
 344		goto out;
 345
 346	rx_ctl = asix_read_rx_ctl(dev);
 347	netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
 
 348
 349	ret = asix_sw_reset(dev, AX_SWRESET_PRL);
 
 
 
 
 
 
 
 
 
 
 
 350	if (ret < 0)
 351		goto out;
 352
 353	msleep(150);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 354
 355	ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL);
 356	if (ret < 0)
 357		goto out;
 358
 359	msleep(150);
 
 
 
 
 
 
 360
 361	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
 362	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 363			ADVERTISE_ALL | ADVERTISE_CSMA);
 364	mii_nway_restart(&dev->mii);
 
 
 
 
 
 
 
 365
 366	ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT);
 367	if (ret < 0)
 368		goto out;
 369
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 370	ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
 371				AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
 372				AX88772_IPG2_DEFAULT, 0, NULL);
 373	if (ret < 0) {
 374		netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
 375		goto out;
 376	}
 377
 378	/* Rewrite MAC address */
 379	memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
 380	ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
 381							data->mac_addr);
 382	if (ret < 0)
 383		goto out;
 384
 385	/* Set RX_CTL to default values with 2k buffer, and enable cactus */
 386	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
 387	if (ret < 0)
 388		goto out;
 389
 390	rx_ctl = asix_read_rx_ctl(dev);
 
 
 
 
 
 
 
 
 
 391	netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
 392		   rx_ctl);
 393
 394	rx_ctl = asix_read_medium_status(dev);
 395	netdev_dbg(dev->net,
 396		   "Medium Status is 0x%04x after all initializations\n",
 397		   rx_ctl);
 398
 399	return 0;
 400
 401out:
 402	return ret;
 403
 404}
 405
 406static const struct net_device_ops ax88772_netdev_ops = {
 407	.ndo_open		= usbnet_open,
 408	.ndo_stop		= usbnet_stop,
 409	.ndo_start_xmit		= usbnet_start_xmit,
 410	.ndo_tx_timeout		= usbnet_tx_timeout,
 411	.ndo_change_mtu		= usbnet_change_mtu,
 
 412	.ndo_set_mac_address 	= asix_set_mac_address,
 413	.ndo_validate_addr	= eth_validate_addr,
 414	.ndo_do_ioctl		= asix_ioctl,
 415	.ndo_set_rx_mode        = asix_set_multicast,
 416};
 417
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 418static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
 419{
 420	int ret, embd_phy, i;
 421	u8 buf[ETH_ALEN];
 
 422	u32 phyid;
 423
 424	usbnet_get_endpoints(dev,intf);
 
 
 425
 426	/* Get the MAC address */
 427	if (dev->driver_info->data & FLAG_EEPROM_MAC) {
 428		for (i = 0; i < (ETH_ALEN >> 1); i++) {
 429			ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x04 + i,
 430					0, 2, buf + i * 2);
 431			if (ret < 0)
 432				break;
 433		}
 434	} else {
 435		ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
 436				0, 0, ETH_ALEN, buf);
 437	}
 
 
 
 
 
 
 
 
 
 
 438
 439	if (ret < 0) {
 440		netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
 441		return ret;
 
 
 442	}
 443
 444	asix_set_netdev_dev_addr(dev, buf);
 445
 446	/* Initialize MII structure */
 447	dev->mii.dev = dev->net;
 448	dev->mii.mdio_read = asix_mdio_read;
 449	dev->mii.mdio_write = asix_mdio_write;
 450	dev->mii.phy_id_mask = 0x1f;
 451	dev->mii.reg_num_mask = 0x1f;
 452	dev->mii.phy_id = asix_get_phy_addr(dev);
 453
 454	dev->net->netdev_ops = &ax88772_netdev_ops;
 455	dev->net->ethtool_ops = &ax88772_ethtool_ops;
 456	dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
 457	dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
 458
 459	embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
 460
 461	/* Reset the PHY to normal operation mode */
 462	ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
 463	if (ret < 0) {
 464		netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
 465		return ret;
 466	}
 467
 468	ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL);
 469	if (ret < 0)
 470		return ret;
 471
 472	msleep(150);
 
 473
 474	ret = asix_sw_reset(dev, AX_SWRESET_CLEAR);
 475	if (ret < 0)
 476		return ret;
 477
 478	msleep(150);
 
 479
 480	ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_PRTE);
 
 
 
 481
 482	/* Read PHYID register *AFTER* the PHY was reset properly */
 483	phyid = asix_get_phyid(dev);
 484	netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
 485
 486	/* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
 487	if (dev->driver_info->flags & FLAG_FRAMING_AX) {
 488		/* hard_mtu  is still the default - the device does not support
 489		   jumbo eth frames */
 490		dev->rx_urb_size = 2048;
 491	}
 492
 493	dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
 494	if (!dev->driver_priv)
 495		return -ENOMEM;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 496
 497	return 0;
 498}
 499
 500static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
 501{
 502	if (dev->driver_priv)
 503		kfree(dev->driver_priv);
 
 
 
 
 
 
 
 
 504}
 505
 506static const struct ethtool_ops ax88178_ethtool_ops = {
 507	.get_drvinfo		= asix_get_drvinfo,
 508	.get_link		= asix_get_link,
 509	.get_msglevel		= usbnet_get_msglevel,
 510	.set_msglevel		= usbnet_set_msglevel,
 511	.get_wol		= asix_get_wol,
 512	.set_wol		= asix_set_wol,
 513	.get_eeprom_len		= asix_get_eeprom_len,
 514	.get_eeprom		= asix_get_eeprom,
 515	.set_eeprom		= asix_set_eeprom,
 516	.get_settings		= usbnet_get_settings,
 517	.set_settings		= usbnet_set_settings,
 518	.nway_reset		= usbnet_nway_reset,
 
 
 519};
 520
 521static int marvell_phy_init(struct usbnet *dev)
 522{
 523	struct asix_data *data = (struct asix_data *)&dev->data;
 524	u16 reg;
 525
 526	netdev_dbg(dev->net, "marvell_phy_init()\n");
 527
 528	reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
 529	netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
 530
 531	asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
 532			MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
 533
 534	if (data->ledmode) {
 535		reg = asix_mdio_read(dev->net, dev->mii.phy_id,
 536			MII_MARVELL_LED_CTRL);
 537		netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
 538
 539		reg &= 0xf8ff;
 540		reg |= (1 + 0x0100);
 541		asix_mdio_write(dev->net, dev->mii.phy_id,
 542			MII_MARVELL_LED_CTRL, reg);
 543
 544		reg = asix_mdio_read(dev->net, dev->mii.phy_id,
 545			MII_MARVELL_LED_CTRL);
 546		netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
 547		reg &= 0xfc0f;
 548	}
 549
 550	return 0;
 551}
 552
 553static int rtl8211cl_phy_init(struct usbnet *dev)
 554{
 555	struct asix_data *data = (struct asix_data *)&dev->data;
 556
 557	netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
 558
 559	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
 560	asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
 561	asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
 562		asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
 563	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
 564
 565	if (data->ledmode == 12) {
 566		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
 567		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
 568		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
 569	}
 570
 571	return 0;
 572}
 573
 574static int marvell_led_status(struct usbnet *dev, u16 speed)
 575{
 576	u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
 577
 578	netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
 579
 580	/* Clear out the center LED bits - 0x03F0 */
 581	reg &= 0xfc0f;
 582
 583	switch (speed) {
 584		case SPEED_1000:
 585			reg |= 0x03e0;
 586			break;
 587		case SPEED_100:
 588			reg |= 0x03b0;
 589			break;
 590		default:
 591			reg |= 0x02f0;
 592	}
 593
 594	netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
 595	asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
 596
 597	return 0;
 598}
 599
 600static int ax88178_reset(struct usbnet *dev)
 601{
 602	struct asix_data *data = (struct asix_data *)&dev->data;
 603	int ret;
 604	__le16 eeprom;
 605	u8 status;
 606	int gpio0 = 0;
 607	u32 phyid;
 608
 609	asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status);
 610	netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
 611
 612	asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL);
 613	asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom);
 614	asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL);
 615
 616	netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
 617
 618	if (eeprom == cpu_to_le16(0xffff)) {
 619		data->phymode = PHY_MODE_MARVELL;
 620		data->ledmode = 0;
 621		gpio0 = 1;
 622	} else {
 623		data->phymode = le16_to_cpu(eeprom) & 0x7F;
 624		data->ledmode = le16_to_cpu(eeprom) >> 8;
 625		gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
 626	}
 627	netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
 628
 629	/* Power up external GigaPHY through AX88178 GPIO pin */
 630	asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 | AX_GPIO_GPO1EN, 40);
 
 631	if ((le16_to_cpu(eeprom) >> 8) != 1) {
 632		asix_write_gpio(dev, 0x003c, 30);
 633		asix_write_gpio(dev, 0x001c, 300);
 634		asix_write_gpio(dev, 0x003c, 30);
 635	} else {
 636		netdev_dbg(dev->net, "gpio phymode == 1 path\n");
 637		asix_write_gpio(dev, AX_GPIO_GPO1EN, 30);
 638		asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30);
 639	}
 640
 641	/* Read PHYID register *AFTER* powering up PHY */
 642	phyid = asix_get_phyid(dev);
 643	netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
 644
 645	/* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
 646	asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL);
 647
 648	asix_sw_reset(dev, 0);
 649	msleep(150);
 650
 651	asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
 652	msleep(150);
 653
 654	asix_write_rx_ctl(dev, 0);
 655
 656	if (data->phymode == PHY_MODE_MARVELL) {
 657		marvell_phy_init(dev);
 658		msleep(60);
 659	} else if (data->phymode == PHY_MODE_RTL8211CL)
 660		rtl8211cl_phy_init(dev);
 661
 662	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR,
 663			BMCR_RESET | BMCR_ANENABLE);
 664	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 665			ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
 666	asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
 667			ADVERTISE_1000FULL);
 668
 
 669	mii_nway_restart(&dev->mii);
 670
 671	ret = asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT);
 672	if (ret < 0)
 673		return ret;
 674
 675	/* Rewrite MAC address */
 676	memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
 677	ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
 678							data->mac_addr);
 679	if (ret < 0)
 680		return ret;
 681
 682	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL);
 683	if (ret < 0)
 684		return ret;
 685
 686	return 0;
 687}
 688
 689static int ax88178_link_reset(struct usbnet *dev)
 690{
 691	u16 mode;
 692	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
 693	struct asix_data *data = (struct asix_data *)&dev->data;
 694	u32 speed;
 695
 696	netdev_dbg(dev->net, "ax88178_link_reset()\n");
 697
 698	mii_check_media(&dev->mii, 1, 1);
 699	mii_ethtool_gset(&dev->mii, &ecmd);
 700	mode = AX88178_MEDIUM_DEFAULT;
 701	speed = ethtool_cmd_speed(&ecmd);
 702
 703	if (speed == SPEED_1000)
 704		mode |= AX_MEDIUM_GM;
 705	else if (speed == SPEED_100)
 706		mode |= AX_MEDIUM_PS;
 707	else
 708		mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
 709
 710	mode |= AX_MEDIUM_ENCK;
 711
 712	if (ecmd.duplex == DUPLEX_FULL)
 713		mode |= AX_MEDIUM_FD;
 714	else
 715		mode &= ~AX_MEDIUM_FD;
 716
 717	netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
 718		   speed, ecmd.duplex, mode);
 719
 720	asix_write_medium_mode(dev, mode);
 721
 722	if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
 723		marvell_led_status(dev, speed);
 724
 725	return 0;
 726}
 727
 728static void ax88178_set_mfb(struct usbnet *dev)
 729{
 730	u16 mfb = AX_RX_CTL_MFB_16384;
 731	u16 rxctl;
 732	u16 medium;
 733	int old_rx_urb_size = dev->rx_urb_size;
 734
 735	if (dev->hard_mtu < 2048) {
 736		dev->rx_urb_size = 2048;
 737		mfb = AX_RX_CTL_MFB_2048;
 738	} else if (dev->hard_mtu < 4096) {
 739		dev->rx_urb_size = 4096;
 740		mfb = AX_RX_CTL_MFB_4096;
 741	} else if (dev->hard_mtu < 8192) {
 742		dev->rx_urb_size = 8192;
 743		mfb = AX_RX_CTL_MFB_8192;
 744	} else if (dev->hard_mtu < 16384) {
 745		dev->rx_urb_size = 16384;
 746		mfb = AX_RX_CTL_MFB_16384;
 747	}
 748
 749	rxctl = asix_read_rx_ctl(dev);
 750	asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb);
 751
 752	medium = asix_read_medium_status(dev);
 753	if (dev->net->mtu > 1500)
 754		medium |= AX_MEDIUM_JFE;
 755	else
 756		medium &= ~AX_MEDIUM_JFE;
 757	asix_write_medium_mode(dev, medium);
 758
 759	if (dev->rx_urb_size > old_rx_urb_size)
 760		usbnet_unlink_rx_urbs(dev);
 761}
 762
 763static int ax88178_change_mtu(struct net_device *net, int new_mtu)
 764{
 765	struct usbnet *dev = netdev_priv(net);
 766	int ll_mtu = new_mtu + net->hard_header_len + 4;
 767
 768	netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
 769
 770	if (new_mtu <= 0 || ll_mtu > 16384)
 771		return -EINVAL;
 772
 773	if ((ll_mtu % dev->maxpacket) == 0)
 774		return -EDOM;
 775
 776	net->mtu = new_mtu;
 777	dev->hard_mtu = net->mtu + net->hard_header_len;
 778	ax88178_set_mfb(dev);
 779
 780	/* max qlen depend on hard_mtu and rx_urb_size */
 781	usbnet_update_max_qlen(dev);
 782
 783	return 0;
 784}
 785
 786static const struct net_device_ops ax88178_netdev_ops = {
 787	.ndo_open		= usbnet_open,
 788	.ndo_stop		= usbnet_stop,
 789	.ndo_start_xmit		= usbnet_start_xmit,
 790	.ndo_tx_timeout		= usbnet_tx_timeout,
 
 791	.ndo_set_mac_address 	= asix_set_mac_address,
 792	.ndo_validate_addr	= eth_validate_addr,
 793	.ndo_set_rx_mode	= asix_set_multicast,
 794	.ndo_do_ioctl 		= asix_ioctl,
 795	.ndo_change_mtu 	= ax88178_change_mtu,
 796};
 797
 798static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
 799{
 800	int ret;
 801	u8 buf[ETH_ALEN];
 802
 803	usbnet_get_endpoints(dev,intf);
 804
 805	/* Get the MAC address */
 806	ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf);
 807	if (ret < 0) {
 808		netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
 809		return ret;
 810	}
 811
 812	asix_set_netdev_dev_addr(dev, buf);
 813
 814	/* Initialize MII structure */
 815	dev->mii.dev = dev->net;
 816	dev->mii.mdio_read = asix_mdio_read;
 817	dev->mii.mdio_write = asix_mdio_write;
 818	dev->mii.phy_id_mask = 0x1f;
 819	dev->mii.reg_num_mask = 0xff;
 820	dev->mii.supports_gmii = 1;
 821	dev->mii.phy_id = asix_get_phy_addr(dev);
 
 
 
 822
 823	dev->net->netdev_ops = &ax88178_netdev_ops;
 824	dev->net->ethtool_ops = &ax88178_ethtool_ops;
 
 825
 826	/* Blink LEDS so users know driver saw dongle */
 827	asix_sw_reset(dev, 0);
 828	msleep(150);
 829
 830	asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD);
 831	msleep(150);
 832
 833	/* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
 834	if (dev->driver_info->flags & FLAG_FRAMING_AX) {
 835		/* hard_mtu  is still the default - the device does not support
 836		   jumbo eth frames */
 837		dev->rx_urb_size = 2048;
 838	}
 839
 840	dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
 841	if (!dev->driver_priv)
 842			return -ENOMEM;
 843
 844	return 0;
 845}
 846
 847static const struct driver_info ax8817x_info = {
 848	.description = "ASIX AX8817x USB 2.0 Ethernet",
 849	.bind = ax88172_bind,
 850	.status = asix_status,
 851	.link_reset = ax88172_link_reset,
 852	.reset = ax88172_link_reset,
 853	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
 854	.data = 0x00130103,
 855};
 856
 857static const struct driver_info dlink_dub_e100_info = {
 858	.description = "DLink DUB-E100 USB Ethernet",
 859	.bind = ax88172_bind,
 860	.status = asix_status,
 861	.link_reset = ax88172_link_reset,
 862	.reset = ax88172_link_reset,
 863	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
 864	.data = 0x009f9d9f,
 865};
 866
 867static const struct driver_info netgear_fa120_info = {
 868	.description = "Netgear FA-120 USB Ethernet",
 869	.bind = ax88172_bind,
 870	.status = asix_status,
 871	.link_reset = ax88172_link_reset,
 872	.reset = ax88172_link_reset,
 873	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
 874	.data = 0x00130103,
 875};
 876
 877static const struct driver_info hawking_uf200_info = {
 878	.description = "Hawking UF200 USB Ethernet",
 879	.bind = ax88172_bind,
 880	.status = asix_status,
 881	.link_reset = ax88172_link_reset,
 882	.reset = ax88172_link_reset,
 883	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
 884	.data = 0x001f1d1f,
 885};
 886
 887static const struct driver_info ax88772_info = {
 888	.description = "ASIX AX88772 USB 2.0 Ethernet",
 889	.bind = ax88772_bind,
 890	.unbind = ax88772_unbind,
 891	.status = asix_status,
 892	.link_reset = ax88772_link_reset,
 893	.reset = ax88772_reset,
 
 894	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
 895	.rx_fixup = asix_rx_fixup_common,
 896	.tx_fixup = asix_tx_fixup,
 897};
 898
 899static const struct driver_info ax88772b_info = {
 900	.description = "ASIX AX88772B USB 2.0 Ethernet",
 901	.bind = ax88772_bind,
 902	.unbind = ax88772_unbind,
 903	.status = asix_status,
 904	.link_reset = ax88772_link_reset,
 905	.reset = ax88772_reset,
 
 906	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
 907	         FLAG_MULTI_PACKET,
 908	.rx_fixup = asix_rx_fixup_common,
 909	.tx_fixup = asix_tx_fixup,
 910	.data = FLAG_EEPROM_MAC,
 911};
 912
 913static const struct driver_info ax88178_info = {
 914	.description = "ASIX AX88178 USB 2.0 Ethernet",
 915	.bind = ax88178_bind,
 916	.unbind = ax88772_unbind,
 917	.status = asix_status,
 918	.link_reset = ax88178_link_reset,
 919	.reset = ax88178_reset,
 920	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
 921		 FLAG_MULTI_PACKET,
 922	.rx_fixup = asix_rx_fixup_common,
 923	.tx_fixup = asix_tx_fixup,
 924};
 925
 926/*
 927 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
 928 * no-name packaging.
 929 * USB device strings are:
 930 *   1: Manufacturer: USBLINK
 931 *   2: Product: HG20F9 USB2.0
 932 *   3: Serial: 000003
 933 * Appears to be compatible with Asix 88772B.
 934 */
 935static const struct driver_info hg20f9_info = {
 936	.description = "HG20F9 USB 2.0 Ethernet",
 937	.bind = ax88772_bind,
 938	.unbind = ax88772_unbind,
 939	.status = asix_status,
 940	.link_reset = ax88772_link_reset,
 941	.reset = ax88772_reset,
 942	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
 943	         FLAG_MULTI_PACKET,
 944	.rx_fixup = asix_rx_fixup_common,
 945	.tx_fixup = asix_tx_fixup,
 946	.data = FLAG_EEPROM_MAC,
 947};
 948
 949static const struct usb_device_id	products [] = {
 950{
 951	// Linksys USB200M
 952	USB_DEVICE (0x077b, 0x2226),
 953	.driver_info =	(unsigned long) &ax8817x_info,
 954}, {
 955	// Netgear FA120
 956	USB_DEVICE (0x0846, 0x1040),
 957	.driver_info =  (unsigned long) &netgear_fa120_info,
 958}, {
 959	// DLink DUB-E100
 960	USB_DEVICE (0x2001, 0x1a00),
 961	.driver_info =  (unsigned long) &dlink_dub_e100_info,
 962}, {
 963	// Intellinet, ST Lab USB Ethernet
 964	USB_DEVICE (0x0b95, 0x1720),
 965	.driver_info =  (unsigned long) &ax8817x_info,
 966}, {
 967	// Hawking UF200, TrendNet TU2-ET100
 968	USB_DEVICE (0x07b8, 0x420a),
 969	.driver_info =  (unsigned long) &hawking_uf200_info,
 970}, {
 971	// Billionton Systems, USB2AR
 972	USB_DEVICE (0x08dd, 0x90ff),
 973	.driver_info =  (unsigned long) &ax8817x_info,
 974}, {
 
 
 
 
 975	// ATEN UC210T
 976	USB_DEVICE (0x0557, 0x2009),
 977	.driver_info =  (unsigned long) &ax8817x_info,
 978}, {
 979	// Buffalo LUA-U2-KTX
 980	USB_DEVICE (0x0411, 0x003d),
 981	.driver_info =  (unsigned long) &ax8817x_info,
 982}, {
 983	// Buffalo LUA-U2-GT 10/100/1000
 984	USB_DEVICE (0x0411, 0x006e),
 985	.driver_info =  (unsigned long) &ax88178_info,
 986}, {
 987	// Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
 988	USB_DEVICE (0x6189, 0x182d),
 989	.driver_info =  (unsigned long) &ax8817x_info,
 990}, {
 991	// Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
 992	USB_DEVICE (0x0df6, 0x0056),
 993	.driver_info =  (unsigned long) &ax88178_info,
 994}, {
 
 
 
 
 995	// corega FEther USB2-TX
 996	USB_DEVICE (0x07aa, 0x0017),
 997	.driver_info =  (unsigned long) &ax8817x_info,
 998}, {
 999	// Surecom EP-1427X-2
1000	USB_DEVICE (0x1189, 0x0893),
1001	.driver_info = (unsigned long) &ax8817x_info,
1002}, {
1003	// goodway corp usb gwusb2e
1004	USB_DEVICE (0x1631, 0x6200),
1005	.driver_info = (unsigned long) &ax8817x_info,
1006}, {
1007	// JVC MP-PRX1 Port Replicator
1008	USB_DEVICE (0x04f1, 0x3008),
1009	.driver_info = (unsigned long) &ax8817x_info,
1010}, {
1011	// Lenovo U2L100P 10/100
1012	USB_DEVICE (0x17ef, 0x7203),
1013	.driver_info = (unsigned long) &ax88772_info,
1014}, {
1015	// ASIX AX88772B 10/100
1016	USB_DEVICE (0x0b95, 0x772b),
1017	.driver_info = (unsigned long) &ax88772b_info,
1018}, {
1019	// ASIX AX88772 10/100
1020	USB_DEVICE (0x0b95, 0x7720),
1021	.driver_info = (unsigned long) &ax88772_info,
1022}, {
1023	// ASIX AX88178 10/100/1000
1024	USB_DEVICE (0x0b95, 0x1780),
1025	.driver_info = (unsigned long) &ax88178_info,
1026}, {
1027	// Logitec LAN-GTJ/U2A
1028	USB_DEVICE (0x0789, 0x0160),
1029	.driver_info = (unsigned long) &ax88178_info,
1030}, {
1031	// Linksys USB200M Rev 2
1032	USB_DEVICE (0x13b1, 0x0018),
1033	.driver_info = (unsigned long) &ax88772_info,
1034}, {
1035	// 0Q0 cable ethernet
1036	USB_DEVICE (0x1557, 0x7720),
1037	.driver_info = (unsigned long) &ax88772_info,
1038}, {
1039	// DLink DUB-E100 H/W Ver B1
1040	USB_DEVICE (0x07d1, 0x3c05),
1041	.driver_info = (unsigned long) &ax88772_info,
1042}, {
1043	// DLink DUB-E100 H/W Ver B1 Alternate
1044	USB_DEVICE (0x2001, 0x3c05),
1045	.driver_info = (unsigned long) &ax88772_info,
1046}, {
1047       // DLink DUB-E100 H/W Ver C1
1048       USB_DEVICE (0x2001, 0x1a02),
1049       .driver_info = (unsigned long) &ax88772_info,
1050}, {
1051	// Linksys USB1000
1052	USB_DEVICE (0x1737, 0x0039),
1053	.driver_info = (unsigned long) &ax88178_info,
1054}, {
1055	// IO-DATA ETG-US2
1056	USB_DEVICE (0x04bb, 0x0930),
1057	.driver_info = (unsigned long) &ax88178_info,
1058}, {
1059	// Belkin F5D5055
1060	USB_DEVICE(0x050d, 0x5055),
1061	.driver_info = (unsigned long) &ax88178_info,
1062}, {
1063	// Apple USB Ethernet Adapter
1064	USB_DEVICE(0x05ac, 0x1402),
1065	.driver_info = (unsigned long) &ax88772_info,
1066}, {
1067	// Cables-to-Go USB Ethernet Adapter
1068	USB_DEVICE(0x0b95, 0x772a),
1069	.driver_info = (unsigned long) &ax88772_info,
1070}, {
1071	// ABOCOM for pci
1072	USB_DEVICE(0x14ea, 0xab11),
1073	.driver_info = (unsigned long) &ax88178_info,
1074}, {
1075	// ASIX 88772a
1076	USB_DEVICE(0x0db0, 0xa877),
1077	.driver_info = (unsigned long) &ax88772_info,
1078}, {
1079	// Asus USB Ethernet Adapter
1080	USB_DEVICE (0x0b95, 0x7e2b),
1081	.driver_info = (unsigned long) &ax88772_info,
1082}, {
1083	/* ASIX 88172a demo board */
1084	USB_DEVICE(0x0b95, 0x172a),
1085	.driver_info = (unsigned long) &ax88172a_info,
1086}, {
1087	/*
1088	 * USBLINK HG20F9 "USB 2.0 LAN"
1089	 * Appears to have gazumped Linksys's manufacturer ID but
1090	 * doesn't (yet) conflict with any known Linksys product.
1091	 */
1092	USB_DEVICE(0x066b, 0x20f9),
1093	.driver_info = (unsigned long) &hg20f9_info,
1094},
1095	{ },		// END
1096};
1097MODULE_DEVICE_TABLE(usb, products);
1098
1099static struct usb_driver asix_driver = {
1100	.name =		DRIVER_NAME,
1101	.id_table =	products,
1102	.probe =	usbnet_probe,
1103	.suspend =	usbnet_suspend,
1104	.resume =	usbnet_resume,
 
1105	.disconnect =	usbnet_disconnect,
1106	.supports_autosuspend = 1,
1107	.disable_hub_initiated_lpm = 1,
1108};
1109
1110module_usb_driver(asix_driver);
1111
1112MODULE_AUTHOR("David Hollis");
1113MODULE_VERSION(DRIVER_VERSION);
1114MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1115MODULE_LICENSE("GPL");
1116
v5.14.15
   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * ASIX AX8817X based USB 2.0 Ethernet Devices
   4 * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
   5 * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
   6 * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
   7 * Copyright (c) 2002-2003 TiVo Inc.
 
 
 
 
 
 
 
 
 
 
 
 
 
   8 */
   9
  10#include "asix.h"
  11
  12#define PHY_MODE_MARVELL	0x0000
  13#define MII_MARVELL_LED_CTRL	0x0018
  14#define MII_MARVELL_STATUS	0x001b
  15#define MII_MARVELL_CTRL	0x0014
  16
  17#define MARVELL_LED_MANUAL	0x0019
  18
  19#define MARVELL_STATUS_HWCFG	0x0004
  20
  21#define MARVELL_CTRL_TXDELAY	0x0002
  22#define MARVELL_CTRL_RXDELAY	0x0080
  23
  24#define	PHY_MODE_RTL8211CL	0x000C
  25
  26#define AX88772A_PHY14H		0x14
  27#define AX88772A_PHY14H_DEFAULT 0x442C
  28
  29#define AX88772A_PHY15H		0x15
  30#define AX88772A_PHY15H_DEFAULT 0x03C8
  31
  32#define AX88772A_PHY16H		0x16
  33#define AX88772A_PHY16H_DEFAULT 0x4044
  34
  35struct ax88172_int_data {
  36	__le16 res1;
  37	u8 link;
  38	__le16 res2;
  39	u8 status;
  40	__le16 res3;
  41} __packed;
  42
  43static void asix_status(struct usbnet *dev, struct urb *urb)
  44{
  45	struct ax88172_int_data *event;
  46	int link;
  47
  48	if (urb->actual_length < 8)
  49		return;
  50
  51	event = urb->transfer_buffer;
  52	link = event->link & 0x01;
  53	if (netif_carrier_ok(dev->net) != link) {
  54		usbnet_link_change(dev, link, 1);
  55		netdev_dbg(dev->net, "Link Status is: %d\n", link);
  56	}
  57}
  58
  59static void asix_set_netdev_dev_addr(struct usbnet *dev, u8 *addr)
  60{
  61	if (is_valid_ether_addr(addr)) {
  62		memcpy(dev->net->dev_addr, addr, ETH_ALEN);
  63	} else {
  64		netdev_info(dev->net, "invalid hw address, using random\n");
  65		eth_hw_addr_random(dev->net);
  66	}
  67}
  68
  69/* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
  70static u32 asix_get_phyid(struct usbnet *dev)
  71{
  72	int phy_reg;
  73	u32 phy_id;
  74	int i;
  75
  76	/* Poll for the rare case the FW or phy isn't ready yet.  */
  77	for (i = 0; i < 100; i++) {
  78		phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
  79		if (phy_reg < 0)
  80			return 0;
  81		if (phy_reg != 0 && phy_reg != 0xFFFF)
  82			break;
  83		mdelay(1);
  84	}
  85
  86	if (phy_reg <= 0 || phy_reg == 0xFFFF)
  87		return 0;
  88
  89	phy_id = (phy_reg & 0xffff) << 16;
  90
  91	phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
  92	if (phy_reg < 0)
  93		return 0;
  94
  95	phy_id |= (phy_reg & 0xffff);
  96
  97	return phy_id;
  98}
  99
 100static u32 asix_get_link(struct net_device *net)
 101{
 102	struct usbnet *dev = netdev_priv(net);
 103
 104	return mii_link_ok(&dev->mii);
 105}
 106
 107static int asix_ioctl (struct net_device *net, struct ifreq *rq, int cmd)
 108{
 109	struct usbnet *dev = netdev_priv(net);
 110
 111	return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
 112}
 113
 114/* We need to override some ethtool_ops so we require our
 115   own structure so we don't interfere with other usbnet
 116   devices that may be connected at the same time. */
 117static const struct ethtool_ops ax88172_ethtool_ops = {
 118	.get_drvinfo		= asix_get_drvinfo,
 119	.get_link		= asix_get_link,
 120	.get_msglevel		= usbnet_get_msglevel,
 121	.set_msglevel		= usbnet_set_msglevel,
 122	.get_wol		= asix_get_wol,
 123	.set_wol		= asix_set_wol,
 124	.get_eeprom_len		= asix_get_eeprom_len,
 125	.get_eeprom		= asix_get_eeprom,
 126	.set_eeprom		= asix_set_eeprom,
 
 
 127	.nway_reset		= usbnet_nway_reset,
 128	.get_link_ksettings	= usbnet_get_link_ksettings_mii,
 129	.set_link_ksettings	= usbnet_set_link_ksettings_mii,
 130};
 131
 132static void ax88172_set_multicast(struct net_device *net)
 133{
 134	struct usbnet *dev = netdev_priv(net);
 135	struct asix_data *data = (struct asix_data *)&dev->data;
 136	u8 rx_ctl = 0x8c;
 137
 138	if (net->flags & IFF_PROMISC) {
 139		rx_ctl |= 0x01;
 140	} else if (net->flags & IFF_ALLMULTI ||
 141		   netdev_mc_count(net) > AX_MAX_MCAST) {
 142		rx_ctl |= 0x02;
 143	} else if (netdev_mc_empty(net)) {
 144		/* just broadcast and directed */
 145	} else {
 146		/* We use the 20 byte dev->data
 147		 * for our 8 byte filter buffer
 148		 * to avoid allocating memory that
 149		 * is tricky to free later */
 150		struct netdev_hw_addr *ha;
 151		u32 crc_bits;
 152
 153		memset(data->multi_filter, 0, AX_MCAST_FILTER_SIZE);
 154
 155		/* Build the multicast hash filter. */
 156		netdev_for_each_mc_addr(ha, net) {
 157			crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
 158			data->multi_filter[crc_bits >> 3] |=
 159			    1 << (crc_bits & 7);
 160		}
 161
 162		asix_write_cmd_async(dev, AX_CMD_WRITE_MULTI_FILTER, 0, 0,
 163				   AX_MCAST_FILTER_SIZE, data->multi_filter);
 164
 165		rx_ctl |= 0x10;
 166	}
 167
 168	asix_write_cmd_async(dev, AX_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
 169}
 170
 171static int ax88172_link_reset(struct usbnet *dev)
 172{
 173	u8 mode;
 174	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
 175
 176	mii_check_media(&dev->mii, 1, 1);
 177	mii_ethtool_gset(&dev->mii, &ecmd);
 178	mode = AX88172_MEDIUM_DEFAULT;
 179
 180	if (ecmd.duplex != DUPLEX_FULL)
 181		mode |= ~AX88172_MEDIUM_FD;
 182
 183	netdev_dbg(dev->net, "ax88172_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
 184		   ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
 185
 186	asix_write_medium_mode(dev, mode, 0);
 187
 188	return 0;
 189}
 190
 191static const struct net_device_ops ax88172_netdev_ops = {
 192	.ndo_open		= usbnet_open,
 193	.ndo_stop		= usbnet_stop,
 194	.ndo_start_xmit		= usbnet_start_xmit,
 195	.ndo_tx_timeout		= usbnet_tx_timeout,
 196	.ndo_change_mtu		= usbnet_change_mtu,
 197	.ndo_get_stats64	= dev_get_tstats64,
 198	.ndo_set_mac_address 	= eth_mac_addr,
 199	.ndo_validate_addr	= eth_validate_addr,
 200	.ndo_do_ioctl		= asix_ioctl,
 201	.ndo_set_rx_mode	= ax88172_set_multicast,
 202};
 203
 204static void asix_phy_reset(struct usbnet *dev, unsigned int reset_bits)
 205{
 206	unsigned int timeout = 5000;
 207
 208	asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, reset_bits);
 209
 210	/* give phy_id a chance to process reset */
 211	udelay(500);
 212
 213	/* See IEEE 802.3 "22.2.4.1.1 Reset": 500ms max */
 214	while (timeout--) {
 215		if (asix_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR)
 216							& BMCR_RESET)
 217			udelay(100);
 218		else
 219			return;
 220	}
 221
 222	netdev_err(dev->net, "BMCR_RESET timeout on phy_id %d\n",
 223		   dev->mii.phy_id);
 224}
 225
 226static int ax88172_bind(struct usbnet *dev, struct usb_interface *intf)
 227{
 228	int ret = 0;
 229	u8 buf[ETH_ALEN] = {0};
 230	int i;
 231	unsigned long gpio_bits = dev->driver_info->data;
 232
 233	usbnet_get_endpoints(dev,intf);
 234
 235	/* Toggle the GPIOs in a manufacturer/model specific way */
 236	for (i = 2; i >= 0; i--) {
 237		ret = asix_write_cmd(dev, AX_CMD_WRITE_GPIOS,
 238				(gpio_bits >> (i * 8)) & 0xff, 0, 0, NULL, 0);
 239		if (ret < 0)
 240			goto out;
 241		msleep(5);
 242	}
 243
 244	ret = asix_write_rx_ctl(dev, 0x80, 0);
 245	if (ret < 0)
 246		goto out;
 247
 248	/* Get the MAC address */
 249	ret = asix_read_cmd(dev, AX88172_CMD_READ_NODE_ID,
 250			    0, 0, ETH_ALEN, buf, 0);
 251	if (ret < 0) {
 252		netdev_dbg(dev->net, "read AX_CMD_READ_NODE_ID failed: %d\n",
 253			   ret);
 254		goto out;
 255	}
 256
 257	asix_set_netdev_dev_addr(dev, buf);
 258
 259	/* Initialize MII structure */
 260	dev->mii.dev = dev->net;
 261	dev->mii.mdio_read = asix_mdio_read;
 262	dev->mii.mdio_write = asix_mdio_write;
 263	dev->mii.phy_id_mask = 0x3f;
 264	dev->mii.reg_num_mask = 0x1f;
 265
 266	dev->mii.phy_id = asix_read_phy_addr(dev, true);
 267	if (dev->mii.phy_id < 0)
 268		return dev->mii.phy_id;
 269
 270	dev->net->netdev_ops = &ax88172_netdev_ops;
 271	dev->net->ethtool_ops = &ax88172_ethtool_ops;
 272	dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
 273	dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
 274
 275	asix_phy_reset(dev, BMCR_RESET);
 276	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 277		ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
 278	mii_nway_restart(&dev->mii);
 279
 280	return 0;
 281
 282out:
 283	return ret;
 284}
 285
 286static void ax88772_ethtool_get_strings(struct net_device *netdev, u32 sset,
 287					u8 *data)
 288{
 289	switch (sset) {
 290	case ETH_SS_TEST:
 291		net_selftest_get_strings(data);
 292		break;
 293	}
 294}
 295
 296static int ax88772_ethtool_get_sset_count(struct net_device *ndev, int sset)
 297{
 298	switch (sset) {
 299	case ETH_SS_TEST:
 300		return net_selftest_get_count();
 301	default:
 302		return -EOPNOTSUPP;
 303	}
 304}
 305
 306static const struct ethtool_ops ax88772_ethtool_ops = {
 307	.get_drvinfo		= asix_get_drvinfo,
 308	.get_link		= usbnet_get_link,
 309	.get_msglevel		= usbnet_get_msglevel,
 310	.set_msglevel		= usbnet_set_msglevel,
 311	.get_wol		= asix_get_wol,
 312	.set_wol		= asix_set_wol,
 313	.get_eeprom_len		= asix_get_eeprom_len,
 314	.get_eeprom		= asix_get_eeprom,
 315	.set_eeprom		= asix_set_eeprom,
 316	.nway_reset		= phy_ethtool_nway_reset,
 317	.get_link_ksettings	= phy_ethtool_get_link_ksettings,
 318	.set_link_ksettings	= phy_ethtool_set_link_ksettings,
 319	.self_test		= net_selftest,
 320	.get_strings		= ax88772_ethtool_get_strings,
 321	.get_sset_count		= ax88772_ethtool_get_sset_count,
 322};
 323
 324static int ax88772_reset(struct usbnet *dev)
 325{
 326	struct asix_data *data = (struct asix_data *)&dev->data;
 327	struct asix_common_private *priv = dev->driver_priv;
 328	int ret;
 
 
 
 329
 330	/* Rewrite MAC address */
 331	ether_addr_copy(data->mac_addr, dev->net->dev_addr);
 332	ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
 333			     ETH_ALEN, data->mac_addr, 0);
 334	if (ret < 0)
 335		goto out;
 336
 337	/* Set RX_CTL to default values with 2k buffer, and enable cactus */
 338	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
 339	if (ret < 0)
 340		goto out;
 341
 342	ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, 0);
 343	if (ret < 0)
 344		goto out;
 345
 346	phy_start(priv->phydev);
 347
 348	return 0;
 349
 350out:
 351	return ret;
 352}
 353
 354static int ax88772_hw_reset(struct usbnet *dev, int in_pm)
 355{
 356	struct asix_data *data = (struct asix_data *)&dev->data;
 357	struct asix_common_private *priv = dev->driver_priv;
 358	u16 rx_ctl;
 359	int ret;
 360
 361	ret = asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_2 |
 362			      AX_GPIO_GPO2EN, 5, in_pm);
 363	if (ret < 0)
 364		goto out;
 365
 366	ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, priv->embd_phy,
 367			     0, 0, NULL, in_pm);
 
 368	if (ret < 0) {
 369		netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
 370		goto out;
 371	}
 372
 373	if (priv->embd_phy) {
 374		ret = asix_sw_reset(dev, AX_SWRESET_IPPD, in_pm);
 375		if (ret < 0)
 376			goto out;
 377
 378		usleep_range(10000, 11000);
 379
 380		ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
 381		if (ret < 0)
 382			goto out;
 383
 384		msleep(60);
 385
 386		ret = asix_sw_reset(dev, AX_SWRESET_IPRL | AX_SWRESET_PRL,
 387				    in_pm);
 388		if (ret < 0)
 389			goto out;
 390	} else {
 391		ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_PRL,
 392				    in_pm);
 393		if (ret < 0)
 394			goto out;
 395	}
 396
 397	msleep(150);
 398
 399	if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
 400					   MII_PHYSID1))){
 401		ret = -EIO;
 402		goto out;
 403	}
 404
 405	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
 406	if (ret < 0)
 407		goto out;
 408
 409	ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
 410	if (ret < 0)
 411		goto out;
 412
 413	ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
 414			     AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
 415			     AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
 416	if (ret < 0) {
 417		netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
 418		goto out;
 419	}
 420
 421	/* Rewrite MAC address */
 422	ether_addr_copy(data->mac_addr, dev->net->dev_addr);
 423	ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0,
 424			     ETH_ALEN, data->mac_addr, in_pm);
 425	if (ret < 0)
 426		goto out;
 427
 428	/* Set RX_CTL to default values with 2k buffer, and enable cactus */
 429	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
 430	if (ret < 0)
 431		goto out;
 432
 433	rx_ctl = asix_read_rx_ctl(dev, in_pm);
 434	netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
 435		   rx_ctl);
 436
 437	rx_ctl = asix_read_medium_status(dev, in_pm);
 438	netdev_dbg(dev->net,
 439		   "Medium Status is 0x%04x after all initializations\n",
 440		   rx_ctl);
 441
 442	return 0;
 443
 444out:
 445	return ret;
 446}
 447
 448static int ax88772a_hw_reset(struct usbnet *dev, int in_pm)
 449{
 450	struct asix_data *data = (struct asix_data *)&dev->data;
 451	struct asix_common_private *priv = dev->driver_priv;
 452	u16 rx_ctl, phy14h, phy15h, phy16h;
 453	u8 chipcode = 0;
 454	int ret;
 455
 456	ret = asix_write_gpio(dev, AX_GPIO_RSE, 5, in_pm);
 457	if (ret < 0)
 458		goto out;
 459
 460	ret = asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, priv->embd_phy |
 461			     AX_PHYSEL_SSEN, 0, 0, NULL, in_pm);
 462	if (ret < 0) {
 463		netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
 464		goto out;
 465	}
 466	usleep_range(10000, 11000);
 467
 468	ret = asix_sw_reset(dev, AX_SWRESET_IPPD | AX_SWRESET_IPRL, in_pm);
 469	if (ret < 0)
 470		goto out;
 471
 472	usleep_range(10000, 11000);
 473
 474	ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
 475	if (ret < 0)
 476		goto out;
 477
 478	msleep(160);
 479
 480	ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, in_pm);
 481	if (ret < 0)
 482		goto out;
 483
 484	ret = asix_sw_reset(dev, AX_SWRESET_IPRL, in_pm);
 485	if (ret < 0)
 486		goto out;
 487
 488	msleep(200);
 489
 490	if (in_pm && (!asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
 491					   MII_PHYSID1))) {
 492		ret = -1;
 493		goto out;
 494	}
 495
 496	ret = asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0,
 497			    0, 1, &chipcode, in_pm);
 498	if (ret < 0)
 499		goto out;
 500
 501	if ((chipcode & AX_CHIPCODE_MASK) == AX_AX88772B_CHIPCODE) {
 502		ret = asix_write_cmd(dev, AX_QCTCTRL, 0x8000, 0x8001,
 503				     0, NULL, in_pm);
 504		if (ret < 0) {
 505			netdev_dbg(dev->net, "Write BQ setting failed: %d\n",
 506				   ret);
 507			goto out;
 508		}
 509	} else if ((chipcode & AX_CHIPCODE_MASK) == AX_AX88772A_CHIPCODE) {
 510		/* Check if the PHY registers have default settings */
 511		phy14h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
 512					     AX88772A_PHY14H);
 513		phy15h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
 514					     AX88772A_PHY15H);
 515		phy16h = asix_mdio_read_nopm(dev->net, dev->mii.phy_id,
 516					     AX88772A_PHY16H);
 517
 518		netdev_dbg(dev->net,
 519			   "772a_hw_reset: MR20=0x%x MR21=0x%x MR22=0x%x\n",
 520			   phy14h, phy15h, phy16h);
 521
 522		/* Restore PHY registers default setting if not */
 523		if (phy14h != AX88772A_PHY14H_DEFAULT)
 524			asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
 525					     AX88772A_PHY14H,
 526					     AX88772A_PHY14H_DEFAULT);
 527		if (phy15h != AX88772A_PHY15H_DEFAULT)
 528			asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
 529					     AX88772A_PHY15H,
 530					     AX88772A_PHY15H_DEFAULT);
 531		if (phy16h != AX88772A_PHY16H_DEFAULT)
 532			asix_mdio_write_nopm(dev->net, dev->mii.phy_id,
 533					     AX88772A_PHY16H,
 534					     AX88772A_PHY16H_DEFAULT);
 535	}
 536
 537	ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
 538				AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
 539				AX88772_IPG2_DEFAULT, 0, NULL, in_pm);
 540	if (ret < 0) {
 541		netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
 542		goto out;
 543	}
 544
 545	/* Rewrite MAC address */
 546	memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
 547	ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
 548							data->mac_addr, in_pm);
 549	if (ret < 0)
 550		goto out;
 551
 552	/* Set RX_CTL to default values with 2k buffer, and enable cactus */
 553	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
 554	if (ret < 0)
 555		goto out;
 556
 557	ret = asix_write_medium_mode(dev, AX88772_MEDIUM_DEFAULT, in_pm);
 558	if (ret < 0)
 559		return ret;
 560
 561	/* Set RX_CTL to default values with 2k buffer, and enable cactus */
 562	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, in_pm);
 563	if (ret < 0)
 564		goto out;
 565
 566	rx_ctl = asix_read_rx_ctl(dev, in_pm);
 567	netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
 568		   rx_ctl);
 569
 570	rx_ctl = asix_read_medium_status(dev, in_pm);
 571	netdev_dbg(dev->net,
 572		   "Medium Status is 0x%04x after all initializations\n",
 573		   rx_ctl);
 574
 575	return 0;
 576
 577out:
 578	return ret;
 
 579}
 580
 581static const struct net_device_ops ax88772_netdev_ops = {
 582	.ndo_open		= usbnet_open,
 583	.ndo_stop		= usbnet_stop,
 584	.ndo_start_xmit		= usbnet_start_xmit,
 585	.ndo_tx_timeout		= usbnet_tx_timeout,
 586	.ndo_change_mtu		= usbnet_change_mtu,
 587	.ndo_get_stats64	= dev_get_tstats64,
 588	.ndo_set_mac_address 	= asix_set_mac_address,
 589	.ndo_validate_addr	= eth_validate_addr,
 590	.ndo_do_ioctl		= phy_do_ioctl_running,
 591	.ndo_set_rx_mode        = asix_set_multicast,
 592};
 593
 594static void ax88772_suspend(struct usbnet *dev)
 595{
 596	struct asix_common_private *priv = dev->driver_priv;
 597	u16 medium;
 598
 599	if (netif_running(dev->net))
 600		phy_stop(priv->phydev);
 601
 602	/* Stop MAC operation */
 603	medium = asix_read_medium_status(dev, 1);
 604	medium &= ~AX_MEDIUM_RE;
 605	asix_write_medium_mode(dev, medium, 1);
 606
 607	netdev_dbg(dev->net, "ax88772_suspend: medium=0x%04x\n",
 608		   asix_read_medium_status(dev, 1));
 609}
 610
 611static int asix_suspend(struct usb_interface *intf, pm_message_t message)
 612{
 613	struct usbnet *dev = usb_get_intfdata(intf);
 614	struct asix_common_private *priv = dev->driver_priv;
 615
 616	if (priv && priv->suspend)
 617		priv->suspend(dev);
 618
 619	return usbnet_suspend(intf, message);
 620}
 621
 622static void ax88772_resume(struct usbnet *dev)
 623{
 624	struct asix_common_private *priv = dev->driver_priv;
 625	int i;
 626
 627	for (i = 0; i < 3; i++)
 628		if (!ax88772_hw_reset(dev, 1))
 629			break;
 630
 631	if (netif_running(dev->net))
 632		phy_start(priv->phydev);
 633}
 634
 635static void ax88772a_resume(struct usbnet *dev)
 636{
 637	struct asix_common_private *priv = dev->driver_priv;
 638	int i;
 639
 640	for (i = 0; i < 3; i++) {
 641		if (!ax88772a_hw_reset(dev, 1))
 642			break;
 643	}
 644
 645	if (netif_running(dev->net))
 646		phy_start(priv->phydev);
 647}
 648
 649static int asix_resume(struct usb_interface *intf)
 650{
 651	struct usbnet *dev = usb_get_intfdata(intf);
 652	struct asix_common_private *priv = dev->driver_priv;
 653
 654	if (priv && priv->resume)
 655		priv->resume(dev);
 656
 657	return usbnet_resume(intf);
 658}
 659
 660static int ax88772_init_mdio(struct usbnet *dev)
 661{
 662	struct asix_common_private *priv = dev->driver_priv;
 663
 664	priv->mdio = devm_mdiobus_alloc(&dev->udev->dev);
 665	if (!priv->mdio)
 666		return -ENOMEM;
 667
 668	priv->mdio->priv = dev;
 669	priv->mdio->read = &asix_mdio_bus_read;
 670	priv->mdio->write = &asix_mdio_bus_write;
 671	priv->mdio->name = "Asix MDIO Bus";
 672	/* mii bus name is usb-<usb bus number>-<usb device number> */
 673	snprintf(priv->mdio->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
 674		 dev->udev->bus->busnum, dev->udev->devnum);
 675
 676	return devm_mdiobus_register(&dev->udev->dev, priv->mdio);
 677}
 678
 679static int ax88772_init_phy(struct usbnet *dev)
 680{
 681	struct asix_common_private *priv = dev->driver_priv;
 682	int ret;
 683
 684	snprintf(priv->phy_name, sizeof(priv->phy_name), PHY_ID_FMT,
 685		 priv->mdio->id, priv->phy_addr);
 686
 687	priv->phydev = phy_connect(dev->net, priv->phy_name, &asix_adjust_link,
 688				   PHY_INTERFACE_MODE_INTERNAL);
 689	if (IS_ERR(priv->phydev)) {
 690		netdev_err(dev->net, "Could not connect to PHY device %s\n",
 691			   priv->phy_name);
 692		ret = PTR_ERR(priv->phydev);
 693		return ret;
 694	}
 695
 696	phy_suspend(priv->phydev);
 697	priv->phydev->mac_managed_pm = 1;
 698
 699	phy_attached_info(priv->phydev);
 700
 701	return 0;
 702}
 703
 704static int ax88772_bind(struct usbnet *dev, struct usb_interface *intf)
 705{
 706	u8 buf[ETH_ALEN] = {0}, chipcode = 0;
 707	struct asix_common_private *priv;
 708	int ret, i;
 709	u32 phyid;
 710
 711	priv = devm_kzalloc(&dev->udev->dev, sizeof(*priv), GFP_KERNEL);
 712	if (!priv)
 713		return -ENOMEM;
 714
 715	dev->driver_priv = priv;
 716
 717	usbnet_get_endpoints(dev, intf);
 718
 719	/* Maybe the boot loader passed the MAC address via device tree */
 720	if (!eth_platform_get_mac_address(&dev->udev->dev, buf)) {
 721		netif_dbg(dev, ifup, dev->net,
 722			  "MAC address read from device tree");
 723	} else {
 724		/* Try getting the MAC address from EEPROM */
 725		if (dev->driver_info->data & FLAG_EEPROM_MAC) {
 726			for (i = 0; i < (ETH_ALEN >> 1); i++) {
 727				ret = asix_read_cmd(dev, AX_CMD_READ_EEPROM,
 728						    0x04 + i, 0, 2, buf + i * 2,
 729						    0);
 730				if (ret < 0)
 731					break;
 732			}
 733		} else {
 734			ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID,
 735					    0, 0, ETH_ALEN, buf, 0);
 736		}
 737
 738		if (ret < 0) {
 739			netdev_dbg(dev->net, "Failed to read MAC address: %d\n",
 740				   ret);
 741			return ret;
 742		}
 743	}
 744
 745	asix_set_netdev_dev_addr(dev, buf);
 746
 
 
 
 
 
 
 
 
 747	dev->net->netdev_ops = &ax88772_netdev_ops;
 748	dev->net->ethtool_ops = &ax88772_ethtool_ops;
 749	dev->net->needed_headroom = 4; /* cf asix_tx_fixup() */
 750	dev->net->needed_tailroom = 4; /* cf asix_tx_fixup() */
 751
 752	ret = asix_read_phy_addr(dev, true);
 
 
 
 
 
 
 
 
 
 753	if (ret < 0)
 754		return ret;
 755
 756	priv->phy_addr = ret;
 757	priv->embd_phy = ((priv->phy_addr & 0x1f) == 0x10);
 758
 759	asix_read_cmd(dev, AX_CMD_STATMNGSTS_REG, 0, 0, 1, &chipcode, 0);
 760	chipcode &= AX_CHIPCODE_MASK;
 
 761
 762	ret = (chipcode == AX_AX88772_CHIPCODE) ? ax88772_hw_reset(dev, 0) :
 763						  ax88772a_hw_reset(dev, 0);
 764
 765	if (ret < 0) {
 766		netdev_dbg(dev->net, "Failed to reset AX88772: %d\n", ret);
 767		return ret;
 768	}
 769
 770	/* Read PHYID register *AFTER* the PHY was reset properly */
 771	phyid = asix_get_phyid(dev);
 772	netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
 773
 774	/* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
 775	if (dev->driver_info->flags & FLAG_FRAMING_AX) {
 776		/* hard_mtu  is still the default - the device does not support
 777		   jumbo eth frames */
 778		dev->rx_urb_size = 2048;
 779	}
 780
 781	priv->presvd_phy_bmcr = 0;
 782	priv->presvd_phy_advertise = 0;
 783	if (chipcode == AX_AX88772_CHIPCODE) {
 784		priv->resume = ax88772_resume;
 785		priv->suspend = ax88772_suspend;
 786	} else {
 787		priv->resume = ax88772a_resume;
 788		priv->suspend = ax88772_suspend;
 789	}
 790
 791	ret = ax88772_init_mdio(dev);
 792	if (ret)
 793		return ret;
 794
 795	return ax88772_init_phy(dev);
 796}
 797
 798static int ax88772_stop(struct usbnet *dev)
 799{
 800	struct asix_common_private *priv = dev->driver_priv;
 801
 802	/* On unplugged USB, we will get MDIO communication errors and the
 803	 * PHY will be set in to PHY_HALTED state.
 804	 */
 805	if (priv->phydev->state != PHY_HALTED)
 806		phy_stop(priv->phydev);
 807
 808	return 0;
 809}
 810
 811static void ax88772_unbind(struct usbnet *dev, struct usb_interface *intf)
 812{
 813	struct asix_common_private *priv = dev->driver_priv;
 814
 815	phy_disconnect(priv->phydev);
 816	asix_rx_fixup_common_free(dev->driver_priv);
 817}
 818
 819static void ax88178_unbind(struct usbnet *dev, struct usb_interface *intf)
 820{
 821	asix_rx_fixup_common_free(dev->driver_priv);
 822	kfree(dev->driver_priv);
 823}
 824
 825static const struct ethtool_ops ax88178_ethtool_ops = {
 826	.get_drvinfo		= asix_get_drvinfo,
 827	.get_link		= asix_get_link,
 828	.get_msglevel		= usbnet_get_msglevel,
 829	.set_msglevel		= usbnet_set_msglevel,
 830	.get_wol		= asix_get_wol,
 831	.set_wol		= asix_set_wol,
 832	.get_eeprom_len		= asix_get_eeprom_len,
 833	.get_eeprom		= asix_get_eeprom,
 834	.set_eeprom		= asix_set_eeprom,
 
 
 835	.nway_reset		= usbnet_nway_reset,
 836	.get_link_ksettings	= usbnet_get_link_ksettings_mii,
 837	.set_link_ksettings	= usbnet_set_link_ksettings_mii,
 838};
 839
 840static int marvell_phy_init(struct usbnet *dev)
 841{
 842	struct asix_data *data = (struct asix_data *)&dev->data;
 843	u16 reg;
 844
 845	netdev_dbg(dev->net, "marvell_phy_init()\n");
 846
 847	reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_MARVELL_STATUS);
 848	netdev_dbg(dev->net, "MII_MARVELL_STATUS = 0x%04x\n", reg);
 849
 850	asix_mdio_write(dev->net, dev->mii.phy_id, MII_MARVELL_CTRL,
 851			MARVELL_CTRL_RXDELAY | MARVELL_CTRL_TXDELAY);
 852
 853	if (data->ledmode) {
 854		reg = asix_mdio_read(dev->net, dev->mii.phy_id,
 855			MII_MARVELL_LED_CTRL);
 856		netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (1) = 0x%04x\n", reg);
 857
 858		reg &= 0xf8ff;
 859		reg |= (1 + 0x0100);
 860		asix_mdio_write(dev->net, dev->mii.phy_id,
 861			MII_MARVELL_LED_CTRL, reg);
 862
 863		reg = asix_mdio_read(dev->net, dev->mii.phy_id,
 864			MII_MARVELL_LED_CTRL);
 865		netdev_dbg(dev->net, "MII_MARVELL_LED_CTRL (2) = 0x%04x\n", reg);
 866		reg &= 0xfc0f;
 867	}
 868
 869	return 0;
 870}
 871
 872static int rtl8211cl_phy_init(struct usbnet *dev)
 873{
 874	struct asix_data *data = (struct asix_data *)&dev->data;
 875
 876	netdev_dbg(dev->net, "rtl8211cl_phy_init()\n");
 877
 878	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0005);
 879	asix_mdio_write (dev->net, dev->mii.phy_id, 0x0c, 0);
 880	asix_mdio_write (dev->net, dev->mii.phy_id, 0x01,
 881		asix_mdio_read (dev->net, dev->mii.phy_id, 0x01) | 0x0080);
 882	asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
 883
 884	if (data->ledmode == 12) {
 885		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0x0002);
 886		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1a, 0x00cb);
 887		asix_mdio_write (dev->net, dev->mii.phy_id, 0x1f, 0);
 888	}
 889
 890	return 0;
 891}
 892
 893static int marvell_led_status(struct usbnet *dev, u16 speed)
 894{
 895	u16 reg = asix_mdio_read(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL);
 896
 897	netdev_dbg(dev->net, "marvell_led_status() read 0x%04x\n", reg);
 898
 899	/* Clear out the center LED bits - 0x03F0 */
 900	reg &= 0xfc0f;
 901
 902	switch (speed) {
 903		case SPEED_1000:
 904			reg |= 0x03e0;
 905			break;
 906		case SPEED_100:
 907			reg |= 0x03b0;
 908			break;
 909		default:
 910			reg |= 0x02f0;
 911	}
 912
 913	netdev_dbg(dev->net, "marvell_led_status() writing 0x%04x\n", reg);
 914	asix_mdio_write(dev->net, dev->mii.phy_id, MARVELL_LED_MANUAL, reg);
 915
 916	return 0;
 917}
 918
 919static int ax88178_reset(struct usbnet *dev)
 920{
 921	struct asix_data *data = (struct asix_data *)&dev->data;
 922	int ret;
 923	__le16 eeprom;
 924	u8 status;
 925	int gpio0 = 0;
 926	u32 phyid;
 927
 928	asix_read_cmd(dev, AX_CMD_READ_GPIOS, 0, 0, 1, &status, 0);
 929	netdev_dbg(dev->net, "GPIO Status: 0x%04x\n", status);
 930
 931	asix_write_cmd(dev, AX_CMD_WRITE_ENABLE, 0, 0, 0, NULL, 0);
 932	asix_read_cmd(dev, AX_CMD_READ_EEPROM, 0x0017, 0, 2, &eeprom, 0);
 933	asix_write_cmd(dev, AX_CMD_WRITE_DISABLE, 0, 0, 0, NULL, 0);
 934
 935	netdev_dbg(dev->net, "EEPROM index 0x17 is 0x%04x\n", eeprom);
 936
 937	if (eeprom == cpu_to_le16(0xffff)) {
 938		data->phymode = PHY_MODE_MARVELL;
 939		data->ledmode = 0;
 940		gpio0 = 1;
 941	} else {
 942		data->phymode = le16_to_cpu(eeprom) & 0x7F;
 943		data->ledmode = le16_to_cpu(eeprom) >> 8;
 944		gpio0 = (le16_to_cpu(eeprom) & 0x80) ? 0 : 1;
 945	}
 946	netdev_dbg(dev->net, "GPIO0: %d, PhyMode: %d\n", gpio0, data->phymode);
 947
 948	/* Power up external GigaPHY through AX88178 GPIO pin */
 949	asix_write_gpio(dev, AX_GPIO_RSE | AX_GPIO_GPO_1 |
 950			AX_GPIO_GPO1EN, 40, 0);
 951	if ((le16_to_cpu(eeprom) >> 8) != 1) {
 952		asix_write_gpio(dev, 0x003c, 30, 0);
 953		asix_write_gpio(dev, 0x001c, 300, 0);
 954		asix_write_gpio(dev, 0x003c, 30, 0);
 955	} else {
 956		netdev_dbg(dev->net, "gpio phymode == 1 path\n");
 957		asix_write_gpio(dev, AX_GPIO_GPO1EN, 30, 0);
 958		asix_write_gpio(dev, AX_GPIO_GPO1EN | AX_GPIO_GPO_1, 30, 0);
 959	}
 960
 961	/* Read PHYID register *AFTER* powering up PHY */
 962	phyid = asix_get_phyid(dev);
 963	netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
 964
 965	/* Set AX88178 to enable MII/GMII/RGMII interface for external PHY */
 966	asix_write_cmd(dev, AX_CMD_SW_PHY_SELECT, 0, 0, 0, NULL, 0);
 967
 968	asix_sw_reset(dev, 0, 0);
 969	msleep(150);
 970
 971	asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
 972	msleep(150);
 973
 974	asix_write_rx_ctl(dev, 0, 0);
 975
 976	if (data->phymode == PHY_MODE_MARVELL) {
 977		marvell_phy_init(dev);
 978		msleep(60);
 979	} else if (data->phymode == PHY_MODE_RTL8211CL)
 980		rtl8211cl_phy_init(dev);
 981
 982	asix_phy_reset(dev, BMCR_RESET | BMCR_ANENABLE);
 
 983	asix_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
 984			ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP);
 985	asix_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
 986			ADVERTISE_1000FULL);
 987
 988	asix_write_medium_mode(dev, AX88178_MEDIUM_DEFAULT, 0);
 989	mii_nway_restart(&dev->mii);
 990
 
 
 
 
 991	/* Rewrite MAC address */
 992	memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
 993	ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
 994							data->mac_addr, 0);
 995	if (ret < 0)
 996		return ret;
 997
 998	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
 999	if (ret < 0)
1000		return ret;
1001
1002	return 0;
1003}
1004
1005static int ax88178_link_reset(struct usbnet *dev)
1006{
1007	u16 mode;
1008	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
1009	struct asix_data *data = (struct asix_data *)&dev->data;
1010	u32 speed;
1011
1012	netdev_dbg(dev->net, "ax88178_link_reset()\n");
1013
1014	mii_check_media(&dev->mii, 1, 1);
1015	mii_ethtool_gset(&dev->mii, &ecmd);
1016	mode = AX88178_MEDIUM_DEFAULT;
1017	speed = ethtool_cmd_speed(&ecmd);
1018
1019	if (speed == SPEED_1000)
1020		mode |= AX_MEDIUM_GM;
1021	else if (speed == SPEED_100)
1022		mode |= AX_MEDIUM_PS;
1023	else
1024		mode &= ~(AX_MEDIUM_PS | AX_MEDIUM_GM);
1025
1026	mode |= AX_MEDIUM_ENCK;
1027
1028	if (ecmd.duplex == DUPLEX_FULL)
1029		mode |= AX_MEDIUM_FD;
1030	else
1031		mode &= ~AX_MEDIUM_FD;
1032
1033	netdev_dbg(dev->net, "ax88178_link_reset() speed: %u duplex: %d setting mode to 0x%04x\n",
1034		   speed, ecmd.duplex, mode);
1035
1036	asix_write_medium_mode(dev, mode, 0);
1037
1038	if (data->phymode == PHY_MODE_MARVELL && data->ledmode)
1039		marvell_led_status(dev, speed);
1040
1041	return 0;
1042}
1043
1044static void ax88178_set_mfb(struct usbnet *dev)
1045{
1046	u16 mfb = AX_RX_CTL_MFB_16384;
1047	u16 rxctl;
1048	u16 medium;
1049	int old_rx_urb_size = dev->rx_urb_size;
1050
1051	if (dev->hard_mtu < 2048) {
1052		dev->rx_urb_size = 2048;
1053		mfb = AX_RX_CTL_MFB_2048;
1054	} else if (dev->hard_mtu < 4096) {
1055		dev->rx_urb_size = 4096;
1056		mfb = AX_RX_CTL_MFB_4096;
1057	} else if (dev->hard_mtu < 8192) {
1058		dev->rx_urb_size = 8192;
1059		mfb = AX_RX_CTL_MFB_8192;
1060	} else if (dev->hard_mtu < 16384) {
1061		dev->rx_urb_size = 16384;
1062		mfb = AX_RX_CTL_MFB_16384;
1063	}
1064
1065	rxctl = asix_read_rx_ctl(dev, 0);
1066	asix_write_rx_ctl(dev, (rxctl & ~AX_RX_CTL_MFB_16384) | mfb, 0);
1067
1068	medium = asix_read_medium_status(dev, 0);
1069	if (dev->net->mtu > 1500)
1070		medium |= AX_MEDIUM_JFE;
1071	else
1072		medium &= ~AX_MEDIUM_JFE;
1073	asix_write_medium_mode(dev, medium, 0);
1074
1075	if (dev->rx_urb_size > old_rx_urb_size)
1076		usbnet_unlink_rx_urbs(dev);
1077}
1078
1079static int ax88178_change_mtu(struct net_device *net, int new_mtu)
1080{
1081	struct usbnet *dev = netdev_priv(net);
1082	int ll_mtu = new_mtu + net->hard_header_len + 4;
1083
1084	netdev_dbg(dev->net, "ax88178_change_mtu() new_mtu=%d\n", new_mtu);
1085
 
 
 
1086	if ((ll_mtu % dev->maxpacket) == 0)
1087		return -EDOM;
1088
1089	net->mtu = new_mtu;
1090	dev->hard_mtu = net->mtu + net->hard_header_len;
1091	ax88178_set_mfb(dev);
1092
1093	/* max qlen depend on hard_mtu and rx_urb_size */
1094	usbnet_update_max_qlen(dev);
1095
1096	return 0;
1097}
1098
1099static const struct net_device_ops ax88178_netdev_ops = {
1100	.ndo_open		= usbnet_open,
1101	.ndo_stop		= usbnet_stop,
1102	.ndo_start_xmit		= usbnet_start_xmit,
1103	.ndo_tx_timeout		= usbnet_tx_timeout,
1104	.ndo_get_stats64	= dev_get_tstats64,
1105	.ndo_set_mac_address 	= asix_set_mac_address,
1106	.ndo_validate_addr	= eth_validate_addr,
1107	.ndo_set_rx_mode	= asix_set_multicast,
1108	.ndo_do_ioctl 		= asix_ioctl,
1109	.ndo_change_mtu 	= ax88178_change_mtu,
1110};
1111
1112static int ax88178_bind(struct usbnet *dev, struct usb_interface *intf)
1113{
1114	int ret;
1115	u8 buf[ETH_ALEN] = {0};
1116
1117	usbnet_get_endpoints(dev,intf);
1118
1119	/* Get the MAC address */
1120	ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);
1121	if (ret < 0) {
1122		netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
1123		return ret;
1124	}
1125
1126	asix_set_netdev_dev_addr(dev, buf);
1127
1128	/* Initialize MII structure */
1129	dev->mii.dev = dev->net;
1130	dev->mii.mdio_read = asix_mdio_read;
1131	dev->mii.mdio_write = asix_mdio_write;
1132	dev->mii.phy_id_mask = 0x1f;
1133	dev->mii.reg_num_mask = 0xff;
1134	dev->mii.supports_gmii = 1;
1135
1136	dev->mii.phy_id = asix_read_phy_addr(dev, true);
1137	if (dev->mii.phy_id < 0)
1138		return dev->mii.phy_id;
1139
1140	dev->net->netdev_ops = &ax88178_netdev_ops;
1141	dev->net->ethtool_ops = &ax88178_ethtool_ops;
1142	dev->net->max_mtu = 16384 - (dev->net->hard_header_len + 4);
1143
1144	/* Blink LEDS so users know driver saw dongle */
1145	asix_sw_reset(dev, 0, 0);
1146	msleep(150);
1147
1148	asix_sw_reset(dev, AX_SWRESET_PRL | AX_SWRESET_IPPD, 0);
1149	msleep(150);
1150
1151	/* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
1152	if (dev->driver_info->flags & FLAG_FRAMING_AX) {
1153		/* hard_mtu  is still the default - the device does not support
1154		   jumbo eth frames */
1155		dev->rx_urb_size = 2048;
1156	}
1157
1158	dev->driver_priv = kzalloc(sizeof(struct asix_common_private), GFP_KERNEL);
1159	if (!dev->driver_priv)
1160			return -ENOMEM;
1161
1162	return 0;
1163}
1164
1165static const struct driver_info ax8817x_info = {
1166	.description = "ASIX AX8817x USB 2.0 Ethernet",
1167	.bind = ax88172_bind,
1168	.status = asix_status,
1169	.link_reset = ax88172_link_reset,
1170	.reset = ax88172_link_reset,
1171	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
1172	.data = 0x00130103,
1173};
1174
1175static const struct driver_info dlink_dub_e100_info = {
1176	.description = "DLink DUB-E100 USB Ethernet",
1177	.bind = ax88172_bind,
1178	.status = asix_status,
1179	.link_reset = ax88172_link_reset,
1180	.reset = ax88172_link_reset,
1181	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
1182	.data = 0x009f9d9f,
1183};
1184
1185static const struct driver_info netgear_fa120_info = {
1186	.description = "Netgear FA-120 USB Ethernet",
1187	.bind = ax88172_bind,
1188	.status = asix_status,
1189	.link_reset = ax88172_link_reset,
1190	.reset = ax88172_link_reset,
1191	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
1192	.data = 0x00130103,
1193};
1194
1195static const struct driver_info hawking_uf200_info = {
1196	.description = "Hawking UF200 USB Ethernet",
1197	.bind = ax88172_bind,
1198	.status = asix_status,
1199	.link_reset = ax88172_link_reset,
1200	.reset = ax88172_link_reset,
1201	.flags =  FLAG_ETHER | FLAG_LINK_INTR,
1202	.data = 0x001f1d1f,
1203};
1204
1205static const struct driver_info ax88772_info = {
1206	.description = "ASIX AX88772 USB 2.0 Ethernet",
1207	.bind = ax88772_bind,
1208	.unbind = ax88772_unbind,
1209	.status = asix_status,
 
1210	.reset = ax88772_reset,
1211	.stop = ax88772_stop,
1212	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR | FLAG_MULTI_PACKET,
1213	.rx_fixup = asix_rx_fixup_common,
1214	.tx_fixup = asix_tx_fixup,
1215};
1216
1217static const struct driver_info ax88772b_info = {
1218	.description = "ASIX AX88772B USB 2.0 Ethernet",
1219	.bind = ax88772_bind,
1220	.unbind = ax88772_unbind,
1221	.status = asix_status,
 
1222	.reset = ax88772_reset,
1223	.stop = ax88772_stop,
1224	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1225	         FLAG_MULTI_PACKET,
1226	.rx_fixup = asix_rx_fixup_common,
1227	.tx_fixup = asix_tx_fixup,
1228	.data = FLAG_EEPROM_MAC,
1229};
1230
1231static const struct driver_info ax88178_info = {
1232	.description = "ASIX AX88178 USB 2.0 Ethernet",
1233	.bind = ax88178_bind,
1234	.unbind = ax88178_unbind,
1235	.status = asix_status,
1236	.link_reset = ax88178_link_reset,
1237	.reset = ax88178_reset,
1238	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1239		 FLAG_MULTI_PACKET,
1240	.rx_fixup = asix_rx_fixup_common,
1241	.tx_fixup = asix_tx_fixup,
1242};
1243
1244/*
1245 * USBLINK 20F9 "USB 2.0 LAN" USB ethernet adapter, typically found in
1246 * no-name packaging.
1247 * USB device strings are:
1248 *   1: Manufacturer: USBLINK
1249 *   2: Product: HG20F9 USB2.0
1250 *   3: Serial: 000003
1251 * Appears to be compatible with Asix 88772B.
1252 */
1253static const struct driver_info hg20f9_info = {
1254	.description = "HG20F9 USB 2.0 Ethernet",
1255	.bind = ax88772_bind,
1256	.unbind = ax88772_unbind,
1257	.status = asix_status,
 
1258	.reset = ax88772_reset,
1259	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
1260	         FLAG_MULTI_PACKET,
1261	.rx_fixup = asix_rx_fixup_common,
1262	.tx_fixup = asix_tx_fixup,
1263	.data = FLAG_EEPROM_MAC,
1264};
1265
1266static const struct usb_device_id	products [] = {
1267{
1268	// Linksys USB200M
1269	USB_DEVICE (0x077b, 0x2226),
1270	.driver_info =	(unsigned long) &ax8817x_info,
1271}, {
1272	// Netgear FA120
1273	USB_DEVICE (0x0846, 0x1040),
1274	.driver_info =  (unsigned long) &netgear_fa120_info,
1275}, {
1276	// DLink DUB-E100
1277	USB_DEVICE (0x2001, 0x1a00),
1278	.driver_info =  (unsigned long) &dlink_dub_e100_info,
1279}, {
1280	// Intellinet, ST Lab USB Ethernet
1281	USB_DEVICE (0x0b95, 0x1720),
1282	.driver_info =  (unsigned long) &ax8817x_info,
1283}, {
1284	// Hawking UF200, TrendNet TU2-ET100
1285	USB_DEVICE (0x07b8, 0x420a),
1286	.driver_info =  (unsigned long) &hawking_uf200_info,
1287}, {
1288	// Billionton Systems, USB2AR
1289	USB_DEVICE (0x08dd, 0x90ff),
1290	.driver_info =  (unsigned long) &ax8817x_info,
1291}, {
1292	// Billionton Systems, GUSB2AM-1G-B
1293	USB_DEVICE(0x08dd, 0x0114),
1294	.driver_info =  (unsigned long) &ax88178_info,
1295}, {
1296	// ATEN UC210T
1297	USB_DEVICE (0x0557, 0x2009),
1298	.driver_info =  (unsigned long) &ax8817x_info,
1299}, {
1300	// Buffalo LUA-U2-KTX
1301	USB_DEVICE (0x0411, 0x003d),
1302	.driver_info =  (unsigned long) &ax8817x_info,
1303}, {
1304	// Buffalo LUA-U2-GT 10/100/1000
1305	USB_DEVICE (0x0411, 0x006e),
1306	.driver_info =  (unsigned long) &ax88178_info,
1307}, {
1308	// Sitecom LN-029 "USB 2.0 10/100 Ethernet adapter"
1309	USB_DEVICE (0x6189, 0x182d),
1310	.driver_info =  (unsigned long) &ax8817x_info,
1311}, {
1312	// Sitecom LN-031 "USB 2.0 10/100/1000 Ethernet adapter"
1313	USB_DEVICE (0x0df6, 0x0056),
1314	.driver_info =  (unsigned long) &ax88178_info,
1315}, {
1316	// Sitecom LN-028 "USB 2.0 10/100/1000 Ethernet adapter"
1317	USB_DEVICE (0x0df6, 0x061c),
1318	.driver_info =  (unsigned long) &ax88178_info,
1319}, {
1320	// corega FEther USB2-TX
1321	USB_DEVICE (0x07aa, 0x0017),
1322	.driver_info =  (unsigned long) &ax8817x_info,
1323}, {
1324	// Surecom EP-1427X-2
1325	USB_DEVICE (0x1189, 0x0893),
1326	.driver_info = (unsigned long) &ax8817x_info,
1327}, {
1328	// goodway corp usb gwusb2e
1329	USB_DEVICE (0x1631, 0x6200),
1330	.driver_info = (unsigned long) &ax8817x_info,
1331}, {
1332	// JVC MP-PRX1 Port Replicator
1333	USB_DEVICE (0x04f1, 0x3008),
1334	.driver_info = (unsigned long) &ax8817x_info,
1335}, {
1336	// Lenovo U2L100P 10/100
1337	USB_DEVICE (0x17ef, 0x7203),
1338	.driver_info = (unsigned long)&ax88772b_info,
1339}, {
1340	// ASIX AX88772B 10/100
1341	USB_DEVICE (0x0b95, 0x772b),
1342	.driver_info = (unsigned long) &ax88772b_info,
1343}, {
1344	// ASIX AX88772 10/100
1345	USB_DEVICE (0x0b95, 0x7720),
1346	.driver_info = (unsigned long) &ax88772_info,
1347}, {
1348	// ASIX AX88178 10/100/1000
1349	USB_DEVICE (0x0b95, 0x1780),
1350	.driver_info = (unsigned long) &ax88178_info,
1351}, {
1352	// Logitec LAN-GTJ/U2A
1353	USB_DEVICE (0x0789, 0x0160),
1354	.driver_info = (unsigned long) &ax88178_info,
1355}, {
1356	// Linksys USB200M Rev 2
1357	USB_DEVICE (0x13b1, 0x0018),
1358	.driver_info = (unsigned long) &ax88772_info,
1359}, {
1360	// 0Q0 cable ethernet
1361	USB_DEVICE (0x1557, 0x7720),
1362	.driver_info = (unsigned long) &ax88772_info,
1363}, {
1364	// DLink DUB-E100 H/W Ver B1
1365	USB_DEVICE (0x07d1, 0x3c05),
1366	.driver_info = (unsigned long) &ax88772_info,
1367}, {
1368	// DLink DUB-E100 H/W Ver B1 Alternate
1369	USB_DEVICE (0x2001, 0x3c05),
1370	.driver_info = (unsigned long) &ax88772_info,
1371}, {
1372       // DLink DUB-E100 H/W Ver C1
1373       USB_DEVICE (0x2001, 0x1a02),
1374       .driver_info = (unsigned long) &ax88772_info,
1375}, {
1376	// Linksys USB1000
1377	USB_DEVICE (0x1737, 0x0039),
1378	.driver_info = (unsigned long) &ax88178_info,
1379}, {
1380	// IO-DATA ETG-US2
1381	USB_DEVICE (0x04bb, 0x0930),
1382	.driver_info = (unsigned long) &ax88178_info,
1383}, {
1384	// Belkin F5D5055
1385	USB_DEVICE(0x050d, 0x5055),
1386	.driver_info = (unsigned long) &ax88178_info,
1387}, {
1388	// Apple USB Ethernet Adapter
1389	USB_DEVICE(0x05ac, 0x1402),
1390	.driver_info = (unsigned long) &ax88772_info,
1391}, {
1392	// Cables-to-Go USB Ethernet Adapter
1393	USB_DEVICE(0x0b95, 0x772a),
1394	.driver_info = (unsigned long) &ax88772_info,
1395}, {
1396	// ABOCOM for pci
1397	USB_DEVICE(0x14ea, 0xab11),
1398	.driver_info = (unsigned long) &ax88178_info,
1399}, {
1400	// ASIX 88772a
1401	USB_DEVICE(0x0db0, 0xa877),
1402	.driver_info = (unsigned long) &ax88772_info,
1403}, {
1404	// Asus USB Ethernet Adapter
1405	USB_DEVICE (0x0b95, 0x7e2b),
1406	.driver_info = (unsigned long)&ax88772b_info,
1407}, {
1408	/* ASIX 88172a demo board */
1409	USB_DEVICE(0x0b95, 0x172a),
1410	.driver_info = (unsigned long) &ax88172a_info,
1411}, {
1412	/*
1413	 * USBLINK HG20F9 "USB 2.0 LAN"
1414	 * Appears to have gazumped Linksys's manufacturer ID but
1415	 * doesn't (yet) conflict with any known Linksys product.
1416	 */
1417	USB_DEVICE(0x066b, 0x20f9),
1418	.driver_info = (unsigned long) &hg20f9_info,
1419},
1420	{ },		// END
1421};
1422MODULE_DEVICE_TABLE(usb, products);
1423
1424static struct usb_driver asix_driver = {
1425	.name =		DRIVER_NAME,
1426	.id_table =	products,
1427	.probe =	usbnet_probe,
1428	.suspend =	asix_suspend,
1429	.resume =	asix_resume,
1430	.reset_resume =	asix_resume,
1431	.disconnect =	usbnet_disconnect,
1432	.supports_autosuspend = 1,
1433	.disable_hub_initiated_lpm = 1,
1434};
1435
1436module_usb_driver(asix_driver);
1437
1438MODULE_AUTHOR("David Hollis");
1439MODULE_VERSION(DRIVER_VERSION);
1440MODULE_DESCRIPTION("ASIX AX8817X based USB 2.0 Ethernet Devices");
1441MODULE_LICENSE("GPL");
1442