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1/* drivers/rtc/rtc-s3c.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
26#include <linux/log2.h>
27#include <linux/slab.h>
28#include <linux/of.h>
29#include <linux/uaccess.h>
30#include <linux/io.h>
31
32#include <asm/irq.h>
33#include "rtc-s3c.h"
34
35enum s3c_cpu_type {
36 TYPE_S3C2410,
37 TYPE_S3C2416,
38 TYPE_S3C2443,
39 TYPE_S3C64XX,
40};
41
42struct s3c_rtc_drv_data {
43 int cpu_type;
44};
45
46/* I have yet to find an S3C implementation with more than one
47 * of these rtc blocks in */
48
49static struct clk *rtc_clk;
50static void __iomem *s3c_rtc_base;
51static int s3c_rtc_alarmno;
52static int s3c_rtc_tickno;
53static enum s3c_cpu_type s3c_rtc_cpu_type;
54
55static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
56
57static void s3c_rtc_alarm_clk_enable(bool enable)
58{
59 static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock);
60 static bool alarm_clk_enabled;
61 unsigned long irq_flags;
62
63 spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags);
64 if (enable) {
65 if (!alarm_clk_enabled) {
66 clk_enable(rtc_clk);
67 alarm_clk_enabled = true;
68 }
69 } else {
70 if (alarm_clk_enabled) {
71 clk_disable(rtc_clk);
72 alarm_clk_enabled = false;
73 }
74 }
75 spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags);
76}
77
78/* IRQ Handlers */
79
80static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
81{
82 struct rtc_device *rdev = id;
83
84 clk_enable(rtc_clk);
85 rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
86
87 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
88 writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
89
90 clk_disable(rtc_clk);
91
92 s3c_rtc_alarm_clk_enable(false);
93
94 return IRQ_HANDLED;
95}
96
97static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
98{
99 struct rtc_device *rdev = id;
100
101 clk_enable(rtc_clk);
102 rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
103
104 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
105 writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
106
107 clk_disable(rtc_clk);
108 return IRQ_HANDLED;
109}
110
111/* Update control registers */
112static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
113{
114 unsigned int tmp;
115
116 dev_dbg(dev, "%s: aie=%d\n", __func__, enabled);
117
118 clk_enable(rtc_clk);
119 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
120
121 if (enabled)
122 tmp |= S3C2410_RTCALM_ALMEN;
123
124 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
125 clk_disable(rtc_clk);
126
127 s3c_rtc_alarm_clk_enable(enabled);
128
129 return 0;
130}
131
132static int s3c_rtc_setfreq(struct device *dev, int freq)
133{
134 struct platform_device *pdev = to_platform_device(dev);
135 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
136 unsigned int tmp = 0;
137 int val;
138
139 if (!is_power_of_2(freq))
140 return -EINVAL;
141
142 clk_enable(rtc_clk);
143 spin_lock_irq(&s3c_rtc_pie_lock);
144
145 if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
146 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
147 tmp &= S3C2410_TICNT_ENABLE;
148 }
149
150 val = (rtc_dev->max_user_freq / freq) - 1;
151
152 if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
153 tmp |= S3C2443_TICNT_PART(val);
154 writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
155
156 if (s3c_rtc_cpu_type == TYPE_S3C2416)
157 writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
158 } else {
159 tmp |= val;
160 }
161
162 writel(tmp, s3c_rtc_base + S3C2410_TICNT);
163 spin_unlock_irq(&s3c_rtc_pie_lock);
164 clk_disable(rtc_clk);
165
166 return 0;
167}
168
169/* Time read/write */
170
171static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
172{
173 unsigned int have_retried = 0;
174 void __iomem *base = s3c_rtc_base;
175
176 clk_enable(rtc_clk);
177 retry_get_time:
178 rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
179 rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
180 rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
181 rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
182 rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
183 rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
184
185 /* the only way to work out whether the system was mid-update
186 * when we read it is to check the second counter, and if it
187 * is zero, then we re-try the entire read
188 */
189
190 if (rtc_tm->tm_sec == 0 && !have_retried) {
191 have_retried = 1;
192 goto retry_get_time;
193 }
194
195 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
196 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
197 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
198 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
199 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
200 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
201
202 rtc_tm->tm_year += 100;
203
204 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
205 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
206 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
207
208 rtc_tm->tm_mon -= 1;
209
210 clk_disable(rtc_clk);
211 return rtc_valid_tm(rtc_tm);
212}
213
214static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
215{
216 void __iomem *base = s3c_rtc_base;
217 int year = tm->tm_year - 100;
218
219 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
220 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
221 tm->tm_hour, tm->tm_min, tm->tm_sec);
222
223 /* we get around y2k by simply not supporting it */
224
225 if (year < 0 || year >= 100) {
226 dev_err(dev, "rtc only supports 100 years\n");
227 return -EINVAL;
228 }
229
230 clk_enable(rtc_clk);
231 writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
232 writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
233 writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
234 writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
235 writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
236 writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
237 clk_disable(rtc_clk);
238
239 return 0;
240}
241
242static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
243{
244 struct rtc_time *alm_tm = &alrm->time;
245 void __iomem *base = s3c_rtc_base;
246 unsigned int alm_en;
247
248 clk_enable(rtc_clk);
249 alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
250 alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
251 alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
252 alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
253 alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
254 alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
255
256 alm_en = readb(base + S3C2410_RTCALM);
257
258 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
259
260 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
261 alm_en,
262 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
263 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
264
265
266 /* decode the alarm enable field */
267
268 if (alm_en & S3C2410_RTCALM_SECEN)
269 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
270 else
271 alm_tm->tm_sec = -1;
272
273 if (alm_en & S3C2410_RTCALM_MINEN)
274 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
275 else
276 alm_tm->tm_min = -1;
277
278 if (alm_en & S3C2410_RTCALM_HOUREN)
279 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
280 else
281 alm_tm->tm_hour = -1;
282
283 if (alm_en & S3C2410_RTCALM_DAYEN)
284 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
285 else
286 alm_tm->tm_mday = -1;
287
288 if (alm_en & S3C2410_RTCALM_MONEN) {
289 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
290 alm_tm->tm_mon -= 1;
291 } else {
292 alm_tm->tm_mon = -1;
293 }
294
295 if (alm_en & S3C2410_RTCALM_YEAREN)
296 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
297 else
298 alm_tm->tm_year = -1;
299
300 clk_disable(rtc_clk);
301 return 0;
302}
303
304static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
305{
306 struct rtc_time *tm = &alrm->time;
307 void __iomem *base = s3c_rtc_base;
308 unsigned int alrm_en;
309
310 clk_enable(rtc_clk);
311 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
312 alrm->enabled,
313 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
314 tm->tm_hour, tm->tm_min, tm->tm_sec);
315
316 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
317 writeb(0x00, base + S3C2410_RTCALM);
318
319 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
320 alrm_en |= S3C2410_RTCALM_SECEN;
321 writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
322 }
323
324 if (tm->tm_min < 60 && tm->tm_min >= 0) {
325 alrm_en |= S3C2410_RTCALM_MINEN;
326 writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
327 }
328
329 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
330 alrm_en |= S3C2410_RTCALM_HOUREN;
331 writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
332 }
333
334 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
335
336 writeb(alrm_en, base + S3C2410_RTCALM);
337
338 s3c_rtc_setaie(dev, alrm->enabled);
339
340 clk_disable(rtc_clk);
341 return 0;
342}
343
344static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
345{
346 unsigned int ticnt;
347
348 clk_enable(rtc_clk);
349 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
350 ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
351 ticnt &= S3C64XX_RTCCON_TICEN;
352 } else {
353 ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
354 ticnt &= S3C2410_TICNT_ENABLE;
355 }
356
357 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
358 clk_disable(rtc_clk);
359 return 0;
360}
361
362static const struct rtc_class_ops s3c_rtcops = {
363 .read_time = s3c_rtc_gettime,
364 .set_time = s3c_rtc_settime,
365 .read_alarm = s3c_rtc_getalarm,
366 .set_alarm = s3c_rtc_setalarm,
367 .proc = s3c_rtc_proc,
368 .alarm_irq_enable = s3c_rtc_setaie,
369};
370
371static void s3c_rtc_enable(struct platform_device *pdev, int en)
372{
373 void __iomem *base = s3c_rtc_base;
374 unsigned int tmp;
375
376 if (s3c_rtc_base == NULL)
377 return;
378
379 clk_enable(rtc_clk);
380 if (!en) {
381 tmp = readw(base + S3C2410_RTCCON);
382 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
383 tmp &= ~S3C64XX_RTCCON_TICEN;
384 tmp &= ~S3C2410_RTCCON_RTCEN;
385 writew(tmp, base + S3C2410_RTCCON);
386
387 if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
388 tmp = readb(base + S3C2410_TICNT);
389 tmp &= ~S3C2410_TICNT_ENABLE;
390 writeb(tmp, base + S3C2410_TICNT);
391 }
392 } else {
393 /* re-enable the device, and check it is ok */
394
395 if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
396 dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
397
398 tmp = readw(base + S3C2410_RTCCON);
399 writew(tmp | S3C2410_RTCCON_RTCEN,
400 base + S3C2410_RTCCON);
401 }
402
403 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
404 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
405
406 tmp = readw(base + S3C2410_RTCCON);
407 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
408 base + S3C2410_RTCCON);
409 }
410
411 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
412 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
413
414 tmp = readw(base + S3C2410_RTCCON);
415 writew(tmp & ~S3C2410_RTCCON_CLKRST,
416 base + S3C2410_RTCCON);
417 }
418 }
419 clk_disable(rtc_clk);
420}
421
422static int s3c_rtc_remove(struct platform_device *dev)
423{
424 s3c_rtc_setaie(&dev->dev, 0);
425
426 clk_unprepare(rtc_clk);
427 rtc_clk = NULL;
428
429 return 0;
430}
431
432static const struct of_device_id s3c_rtc_dt_match[];
433
434static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
435{
436#ifdef CONFIG_OF
437 struct s3c_rtc_drv_data *data;
438 if (pdev->dev.of_node) {
439 const struct of_device_id *match;
440 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
441 data = (struct s3c_rtc_drv_data *) match->data;
442 return data->cpu_type;
443 }
444#endif
445 return platform_get_device_id(pdev)->driver_data;
446}
447
448static int s3c_rtc_probe(struct platform_device *pdev)
449{
450 struct rtc_device *rtc;
451 struct rtc_time rtc_tm;
452 struct resource *res;
453 int ret;
454 int tmp;
455
456 dev_dbg(&pdev->dev, "%s: probe=%p\n", __func__, pdev);
457
458 /* find the IRQs */
459
460 s3c_rtc_tickno = platform_get_irq(pdev, 1);
461 if (s3c_rtc_tickno < 0) {
462 dev_err(&pdev->dev, "no irq for rtc tick\n");
463 return s3c_rtc_tickno;
464 }
465
466 s3c_rtc_alarmno = platform_get_irq(pdev, 0);
467 if (s3c_rtc_alarmno < 0) {
468 dev_err(&pdev->dev, "no irq for alarm\n");
469 return s3c_rtc_alarmno;
470 }
471
472 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
473 s3c_rtc_tickno, s3c_rtc_alarmno);
474
475 /* get the memory region */
476
477 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
478 s3c_rtc_base = devm_ioremap_resource(&pdev->dev, res);
479 if (IS_ERR(s3c_rtc_base))
480 return PTR_ERR(s3c_rtc_base);
481
482 rtc_clk = devm_clk_get(&pdev->dev, "rtc");
483 if (IS_ERR(rtc_clk)) {
484 dev_err(&pdev->dev, "failed to find rtc clock source\n");
485 ret = PTR_ERR(rtc_clk);
486 rtc_clk = NULL;
487 return ret;
488 }
489
490 clk_prepare_enable(rtc_clk);
491
492 /* check to see if everything is setup correctly */
493
494 s3c_rtc_enable(pdev, 1);
495
496 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
497 readw(s3c_rtc_base + S3C2410_RTCCON));
498
499 device_init_wakeup(&pdev->dev, 1);
500
501 /* register RTC and exit */
502
503 rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
504 THIS_MODULE);
505
506 if (IS_ERR(rtc)) {
507 dev_err(&pdev->dev, "cannot attach rtc\n");
508 ret = PTR_ERR(rtc);
509 goto err_nortc;
510 }
511
512 s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev);
513
514 /* Check RTC Time */
515
516 s3c_rtc_gettime(NULL, &rtc_tm);
517
518 if (rtc_valid_tm(&rtc_tm)) {
519 rtc_tm.tm_year = 100;
520 rtc_tm.tm_mon = 0;
521 rtc_tm.tm_mday = 1;
522 rtc_tm.tm_hour = 0;
523 rtc_tm.tm_min = 0;
524 rtc_tm.tm_sec = 0;
525
526 s3c_rtc_settime(NULL, &rtc_tm);
527
528 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
529 }
530
531 if (s3c_rtc_cpu_type != TYPE_S3C2410)
532 rtc->max_user_freq = 32768;
533 else
534 rtc->max_user_freq = 128;
535
536 if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
537 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
538 tmp |= S3C2443_RTCCON_TICSEL;
539 writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
540 }
541
542 platform_set_drvdata(pdev, rtc);
543
544 s3c_rtc_setfreq(&pdev->dev, 1);
545
546 ret = devm_request_irq(&pdev->dev, s3c_rtc_alarmno, s3c_rtc_alarmirq,
547 0, "s3c2410-rtc alarm", rtc);
548 if (ret) {
549 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
550 goto err_nortc;
551 }
552
553 ret = devm_request_irq(&pdev->dev, s3c_rtc_tickno, s3c_rtc_tickirq,
554 0, "s3c2410-rtc tick", rtc);
555 if (ret) {
556 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
557 goto err_nortc;
558 }
559
560 clk_disable(rtc_clk);
561
562 return 0;
563
564 err_nortc:
565 s3c_rtc_enable(pdev, 0);
566 clk_disable_unprepare(rtc_clk);
567
568 return ret;
569}
570
571#ifdef CONFIG_PM_SLEEP
572/* RTC Power management control */
573
574static int ticnt_save, ticnt_en_save;
575static bool wake_en;
576
577static int s3c_rtc_suspend(struct device *dev)
578{
579 struct platform_device *pdev = to_platform_device(dev);
580
581 clk_enable(rtc_clk);
582 /* save TICNT for anyone using periodic interrupts */
583 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
584 ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
585 ticnt_en_save &= S3C64XX_RTCCON_TICEN;
586 ticnt_save = readl(s3c_rtc_base + S3C2410_TICNT);
587 } else {
588 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
589 }
590 s3c_rtc_enable(pdev, 0);
591
592 if (device_may_wakeup(dev) && !wake_en) {
593 if (enable_irq_wake(s3c_rtc_alarmno) == 0)
594 wake_en = true;
595 else
596 dev_err(dev, "enable_irq_wake failed\n");
597 }
598 clk_disable(rtc_clk);
599
600 return 0;
601}
602
603static int s3c_rtc_resume(struct device *dev)
604{
605 struct platform_device *pdev = to_platform_device(dev);
606 unsigned int tmp;
607
608 clk_enable(rtc_clk);
609 s3c_rtc_enable(pdev, 1);
610 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
611 writel(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
612 if (ticnt_en_save) {
613 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
614 writew(tmp | ticnt_en_save,
615 s3c_rtc_base + S3C2410_RTCCON);
616 }
617 } else {
618 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
619 }
620
621 if (device_may_wakeup(dev) && wake_en) {
622 disable_irq_wake(s3c_rtc_alarmno);
623 wake_en = false;
624 }
625 clk_disable(rtc_clk);
626
627 return 0;
628}
629#endif
630
631static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
632
633#ifdef CONFIG_OF
634static struct s3c_rtc_drv_data s3c_rtc_drv_data_array[] = {
635 [TYPE_S3C2410] = { TYPE_S3C2410 },
636 [TYPE_S3C2416] = { TYPE_S3C2416 },
637 [TYPE_S3C2443] = { TYPE_S3C2443 },
638 [TYPE_S3C64XX] = { TYPE_S3C64XX },
639};
640
641static const struct of_device_id s3c_rtc_dt_match[] = {
642 {
643 .compatible = "samsung,s3c2410-rtc",
644 .data = &s3c_rtc_drv_data_array[TYPE_S3C2410],
645 }, {
646 .compatible = "samsung,s3c2416-rtc",
647 .data = &s3c_rtc_drv_data_array[TYPE_S3C2416],
648 }, {
649 .compatible = "samsung,s3c2443-rtc",
650 .data = &s3c_rtc_drv_data_array[TYPE_S3C2443],
651 }, {
652 .compatible = "samsung,s3c6410-rtc",
653 .data = &s3c_rtc_drv_data_array[TYPE_S3C64XX],
654 },
655 {},
656};
657MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
658#endif
659
660static struct platform_device_id s3c_rtc_driver_ids[] = {
661 {
662 .name = "s3c2410-rtc",
663 .driver_data = TYPE_S3C2410,
664 }, {
665 .name = "s3c2416-rtc",
666 .driver_data = TYPE_S3C2416,
667 }, {
668 .name = "s3c2443-rtc",
669 .driver_data = TYPE_S3C2443,
670 }, {
671 .name = "s3c64xx-rtc",
672 .driver_data = TYPE_S3C64XX,
673 },
674 { }
675};
676
677MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
678
679static struct platform_driver s3c_rtc_driver = {
680 .probe = s3c_rtc_probe,
681 .remove = s3c_rtc_remove,
682 .id_table = s3c_rtc_driver_ids,
683 .driver = {
684 .name = "s3c-rtc",
685 .owner = THIS_MODULE,
686 .pm = &s3c_rtc_pm_ops,
687 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
688 },
689};
690
691module_platform_driver(s3c_rtc_driver);
692
693MODULE_DESCRIPTION("Samsung S3C RTC Driver");
694MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
695MODULE_LICENSE("GPL");
696MODULE_ALIAS("platform:s3c2410-rtc");
1// SPDX-License-Identifier: GPL-2.0-only
2/* drivers/rtc/rtc-s3c.c
3 *
4 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com/
6 *
7 * Copyright (c) 2004,2006 Simtec Electronics
8 * Ben Dooks, <ben@simtec.co.uk>
9 * http://armlinux.simtec.co.uk/
10 *
11 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
12*/
13
14#include <linux/module.h>
15#include <linux/fs.h>
16#include <linux/string.h>
17#include <linux/init.h>
18#include <linux/platform_device.h>
19#include <linux/interrupt.h>
20#include <linux/rtc.h>
21#include <linux/bcd.h>
22#include <linux/clk.h>
23#include <linux/log2.h>
24#include <linux/slab.h>
25#include <linux/of.h>
26#include <linux/of_device.h>
27#include <linux/uaccess.h>
28#include <linux/io.h>
29
30#include <asm/irq.h>
31#include "rtc-s3c.h"
32
33struct s3c_rtc {
34 struct device *dev;
35 struct rtc_device *rtc;
36
37 void __iomem *base;
38 struct clk *rtc_clk;
39 struct clk *rtc_src_clk;
40 bool alarm_enabled;
41
42 const struct s3c_rtc_data *data;
43
44 int irq_alarm;
45 spinlock_t alarm_lock;
46
47 bool wake_en;
48};
49
50struct s3c_rtc_data {
51 bool needs_src_clk;
52
53 void (*irq_handler) (struct s3c_rtc *info, int mask);
54 void (*enable) (struct s3c_rtc *info);
55 void (*disable) (struct s3c_rtc *info);
56};
57
58static int s3c_rtc_enable_clk(struct s3c_rtc *info)
59{
60 int ret;
61
62 ret = clk_enable(info->rtc_clk);
63 if (ret)
64 return ret;
65
66 if (info->data->needs_src_clk) {
67 ret = clk_enable(info->rtc_src_clk);
68 if (ret) {
69 clk_disable(info->rtc_clk);
70 return ret;
71 }
72 }
73 return 0;
74}
75
76static void s3c_rtc_disable_clk(struct s3c_rtc *info)
77{
78 if (info->data->needs_src_clk)
79 clk_disable(info->rtc_src_clk);
80 clk_disable(info->rtc_clk);
81}
82
83/* IRQ Handler */
84static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
85{
86 struct s3c_rtc *info = (struct s3c_rtc *)id;
87
88 if (info->data->irq_handler)
89 info->data->irq_handler(info, S3C2410_INTP_ALM);
90
91 return IRQ_HANDLED;
92}
93
94/* Update control registers */
95static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
96{
97 struct s3c_rtc *info = dev_get_drvdata(dev);
98 unsigned long flags;
99 unsigned int tmp;
100 int ret;
101
102 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
103
104 ret = s3c_rtc_enable_clk(info);
105 if (ret)
106 return ret;
107
108 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
109
110 if (enabled)
111 tmp |= S3C2410_RTCALM_ALMEN;
112
113 writeb(tmp, info->base + S3C2410_RTCALM);
114
115 spin_lock_irqsave(&info->alarm_lock, flags);
116
117 if (info->alarm_enabled && !enabled)
118 s3c_rtc_disable_clk(info);
119 else if (!info->alarm_enabled && enabled)
120 ret = s3c_rtc_enable_clk(info);
121
122 info->alarm_enabled = enabled;
123 spin_unlock_irqrestore(&info->alarm_lock, flags);
124
125 s3c_rtc_disable_clk(info);
126
127 return ret;
128}
129
130/* Time read/write */
131static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
132{
133 struct s3c_rtc *info = dev_get_drvdata(dev);
134 unsigned int have_retried = 0;
135 int ret;
136
137 ret = s3c_rtc_enable_clk(info);
138 if (ret)
139 return ret;
140
141retry_get_time:
142 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
143 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
144 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
145 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
146 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
147 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
148
149 /* the only way to work out whether the system was mid-update
150 * when we read it is to check the second counter, and if it
151 * is zero, then we re-try the entire read
152 */
153
154 if (rtc_tm->tm_sec == 0 && !have_retried) {
155 have_retried = 1;
156 goto retry_get_time;
157 }
158
159 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
160 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
161 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
162 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
163 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
164 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
165
166 s3c_rtc_disable_clk(info);
167
168 rtc_tm->tm_year += 100;
169 rtc_tm->tm_mon -= 1;
170
171 dev_dbg(dev, "read time %ptR\n", rtc_tm);
172 return 0;
173}
174
175static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
176{
177 struct s3c_rtc *info = dev_get_drvdata(dev);
178 int year = tm->tm_year - 100;
179 int ret;
180
181 dev_dbg(dev, "set time %ptR\n", tm);
182
183 /* we get around y2k by simply not supporting it */
184
185 if (year < 0 || year >= 100) {
186 dev_err(dev, "rtc only supports 100 years\n");
187 return -EINVAL;
188 }
189
190 ret = s3c_rtc_enable_clk(info);
191 if (ret)
192 return ret;
193
194 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
195 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
196 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
197 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
198 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
199 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
200
201 s3c_rtc_disable_clk(info);
202
203 return 0;
204}
205
206static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
207{
208 struct s3c_rtc *info = dev_get_drvdata(dev);
209 struct rtc_time *alm_tm = &alrm->time;
210 unsigned int alm_en;
211 int ret;
212
213 ret = s3c_rtc_enable_clk(info);
214 if (ret)
215 return ret;
216
217 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
218 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
219 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
220 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
221 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
222 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
223
224 alm_en = readb(info->base + S3C2410_RTCALM);
225
226 s3c_rtc_disable_clk(info);
227
228 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
229
230 dev_dbg(dev, "read alarm %d, %ptR\n", alm_en, alm_tm);
231
232 /* decode the alarm enable field */
233 if (alm_en & S3C2410_RTCALM_SECEN)
234 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
235
236 if (alm_en & S3C2410_RTCALM_MINEN)
237 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
238
239 if (alm_en & S3C2410_RTCALM_HOUREN)
240 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
241
242 if (alm_en & S3C2410_RTCALM_DAYEN)
243 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
244
245 if (alm_en & S3C2410_RTCALM_MONEN) {
246 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
247 alm_tm->tm_mon -= 1;
248 }
249
250 if (alm_en & S3C2410_RTCALM_YEAREN)
251 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
252
253 return 0;
254}
255
256static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
257{
258 struct s3c_rtc *info = dev_get_drvdata(dev);
259 struct rtc_time *tm = &alrm->time;
260 unsigned int alrm_en;
261 int ret;
262
263 dev_dbg(dev, "s3c_rtc_setalarm: %d, %ptR\n", alrm->enabled, tm);
264
265 ret = s3c_rtc_enable_clk(info);
266 if (ret)
267 return ret;
268
269 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
270 writeb(0x00, info->base + S3C2410_RTCALM);
271
272 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
273 alrm_en |= S3C2410_RTCALM_SECEN;
274 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
275 }
276
277 if (tm->tm_min < 60 && tm->tm_min >= 0) {
278 alrm_en |= S3C2410_RTCALM_MINEN;
279 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
280 }
281
282 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
283 alrm_en |= S3C2410_RTCALM_HOUREN;
284 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
285 }
286
287 if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
288 alrm_en |= S3C2410_RTCALM_MONEN;
289 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
290 }
291
292 if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
293 alrm_en |= S3C2410_RTCALM_DAYEN;
294 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
295 }
296
297 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
298
299 writeb(alrm_en, info->base + S3C2410_RTCALM);
300
301 s3c_rtc_setaie(dev, alrm->enabled);
302
303 s3c_rtc_disable_clk(info);
304
305 return 0;
306}
307
308static const struct rtc_class_ops s3c_rtcops = {
309 .read_time = s3c_rtc_gettime,
310 .set_time = s3c_rtc_settime,
311 .read_alarm = s3c_rtc_getalarm,
312 .set_alarm = s3c_rtc_setalarm,
313 .alarm_irq_enable = s3c_rtc_setaie,
314};
315
316static void s3c24xx_rtc_enable(struct s3c_rtc *info)
317{
318 unsigned int con, tmp;
319
320 con = readw(info->base + S3C2410_RTCCON);
321 /* re-enable the device, and check it is ok */
322 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
323 dev_info(info->dev, "rtc disabled, re-enabling\n");
324
325 tmp = readw(info->base + S3C2410_RTCCON);
326 writew(tmp | S3C2410_RTCCON_RTCEN, info->base + S3C2410_RTCCON);
327 }
328
329 if (con & S3C2410_RTCCON_CNTSEL) {
330 dev_info(info->dev, "removing RTCCON_CNTSEL\n");
331
332 tmp = readw(info->base + S3C2410_RTCCON);
333 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
334 info->base + S3C2410_RTCCON);
335 }
336
337 if (con & S3C2410_RTCCON_CLKRST) {
338 dev_info(info->dev, "removing RTCCON_CLKRST\n");
339
340 tmp = readw(info->base + S3C2410_RTCCON);
341 writew(tmp & ~S3C2410_RTCCON_CLKRST,
342 info->base + S3C2410_RTCCON);
343 }
344}
345
346static void s3c24xx_rtc_disable(struct s3c_rtc *info)
347{
348 unsigned int con;
349
350 con = readw(info->base + S3C2410_RTCCON);
351 con &= ~S3C2410_RTCCON_RTCEN;
352 writew(con, info->base + S3C2410_RTCCON);
353
354 con = readb(info->base + S3C2410_TICNT);
355 con &= ~S3C2410_TICNT_ENABLE;
356 writeb(con, info->base + S3C2410_TICNT);
357}
358
359static void s3c6410_rtc_disable(struct s3c_rtc *info)
360{
361 unsigned int con;
362
363 con = readw(info->base + S3C2410_RTCCON);
364 con &= ~S3C64XX_RTCCON_TICEN;
365 con &= ~S3C2410_RTCCON_RTCEN;
366 writew(con, info->base + S3C2410_RTCCON);
367}
368
369static int s3c_rtc_remove(struct platform_device *pdev)
370{
371 struct s3c_rtc *info = platform_get_drvdata(pdev);
372
373 s3c_rtc_setaie(info->dev, 0);
374
375 if (info->data->needs_src_clk)
376 clk_unprepare(info->rtc_src_clk);
377 clk_unprepare(info->rtc_clk);
378
379 return 0;
380}
381
382static int s3c_rtc_probe(struct platform_device *pdev)
383{
384 struct s3c_rtc *info = NULL;
385 int ret;
386
387 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
388 if (!info)
389 return -ENOMEM;
390
391 info->dev = &pdev->dev;
392 info->data = of_device_get_match_data(&pdev->dev);
393 if (!info->data) {
394 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
395 return -EINVAL;
396 }
397 spin_lock_init(&info->alarm_lock);
398
399 platform_set_drvdata(pdev, info);
400
401 info->irq_alarm = platform_get_irq(pdev, 0);
402 if (info->irq_alarm < 0)
403 return info->irq_alarm;
404
405 dev_dbg(&pdev->dev, "s3c2410_rtc: alarm irq %d\n", info->irq_alarm);
406
407 /* get the memory region */
408 info->base = devm_platform_ioremap_resource(pdev, 0);
409 if (IS_ERR(info->base))
410 return PTR_ERR(info->base);
411
412 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
413 if (IS_ERR(info->rtc_clk)) {
414 ret = PTR_ERR(info->rtc_clk);
415 if (ret != -EPROBE_DEFER)
416 dev_err(&pdev->dev, "failed to find rtc clock\n");
417 else
418 dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n");
419 return ret;
420 }
421 ret = clk_prepare_enable(info->rtc_clk);
422 if (ret)
423 return ret;
424
425 if (info->data->needs_src_clk) {
426 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
427 if (IS_ERR(info->rtc_src_clk)) {
428 ret = dev_err_probe(&pdev->dev, PTR_ERR(info->rtc_src_clk),
429 "failed to find rtc source clock\n");
430 goto err_src_clk;
431 }
432 ret = clk_prepare_enable(info->rtc_src_clk);
433 if (ret)
434 goto err_src_clk;
435 }
436
437 /* disable RTC enable bits potentially set by the bootloader */
438 if (info->data->disable)
439 info->data->disable(info);
440
441 /* check to see if everything is setup correctly */
442 if (info->data->enable)
443 info->data->enable(info);
444
445 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
446 readw(info->base + S3C2410_RTCCON));
447
448 device_init_wakeup(&pdev->dev, 1);
449
450 /* register RTC and exit */
451 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
452 THIS_MODULE);
453 if (IS_ERR(info->rtc)) {
454 dev_err(&pdev->dev, "cannot attach rtc\n");
455 ret = PTR_ERR(info->rtc);
456 goto err_nortc;
457 }
458
459 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
460 0, "s3c2410-rtc alarm", info);
461 if (ret) {
462 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
463 goto err_nortc;
464 }
465
466 s3c_rtc_disable_clk(info);
467
468 return 0;
469
470err_nortc:
471 if (info->data->disable)
472 info->data->disable(info);
473
474 if (info->data->needs_src_clk)
475 clk_disable_unprepare(info->rtc_src_clk);
476err_src_clk:
477 clk_disable_unprepare(info->rtc_clk);
478
479 return ret;
480}
481
482#ifdef CONFIG_PM_SLEEP
483
484static int s3c_rtc_suspend(struct device *dev)
485{
486 struct s3c_rtc *info = dev_get_drvdata(dev);
487 int ret;
488
489 ret = s3c_rtc_enable_clk(info);
490 if (ret)
491 return ret;
492
493 if (info->data->disable)
494 info->data->disable(info);
495
496 if (device_may_wakeup(dev) && !info->wake_en) {
497 if (enable_irq_wake(info->irq_alarm) == 0)
498 info->wake_en = true;
499 else
500 dev_err(dev, "enable_irq_wake failed\n");
501 }
502
503 return 0;
504}
505
506static int s3c_rtc_resume(struct device *dev)
507{
508 struct s3c_rtc *info = dev_get_drvdata(dev);
509
510 if (info->data->enable)
511 info->data->enable(info);
512
513 s3c_rtc_disable_clk(info);
514
515 if (device_may_wakeup(dev) && info->wake_en) {
516 disable_irq_wake(info->irq_alarm);
517 info->wake_en = false;
518 }
519
520 return 0;
521}
522#endif
523static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
524
525static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
526{
527 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
528}
529
530static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
531{
532 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
533 writeb(mask, info->base + S3C2410_INTP);
534}
535
536static struct s3c_rtc_data const s3c2410_rtc_data = {
537 .irq_handler = s3c24xx_rtc_irq,
538 .enable = s3c24xx_rtc_enable,
539 .disable = s3c24xx_rtc_disable,
540};
541
542static struct s3c_rtc_data const s3c2416_rtc_data = {
543 .irq_handler = s3c24xx_rtc_irq,
544 .enable = s3c24xx_rtc_enable,
545 .disable = s3c24xx_rtc_disable,
546};
547
548static struct s3c_rtc_data const s3c2443_rtc_data = {
549 .irq_handler = s3c24xx_rtc_irq,
550 .enable = s3c24xx_rtc_enable,
551 .disable = s3c24xx_rtc_disable,
552};
553
554static struct s3c_rtc_data const s3c6410_rtc_data = {
555 .needs_src_clk = true,
556 .irq_handler = s3c6410_rtc_irq,
557 .enable = s3c24xx_rtc_enable,
558 .disable = s3c6410_rtc_disable,
559};
560
561static const __maybe_unused struct of_device_id s3c_rtc_dt_match[] = {
562 {
563 .compatible = "samsung,s3c2410-rtc",
564 .data = &s3c2410_rtc_data,
565 }, {
566 .compatible = "samsung,s3c2416-rtc",
567 .data = &s3c2416_rtc_data,
568 }, {
569 .compatible = "samsung,s3c2443-rtc",
570 .data = &s3c2443_rtc_data,
571 }, {
572 .compatible = "samsung,s3c6410-rtc",
573 .data = &s3c6410_rtc_data,
574 }, {
575 .compatible = "samsung,exynos3250-rtc",
576 .data = &s3c6410_rtc_data,
577 },
578 { /* sentinel */ },
579};
580MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
581
582static struct platform_driver s3c_rtc_driver = {
583 .probe = s3c_rtc_probe,
584 .remove = s3c_rtc_remove,
585 .driver = {
586 .name = "s3c-rtc",
587 .pm = &s3c_rtc_pm_ops,
588 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
589 },
590};
591module_platform_driver(s3c_rtc_driver);
592
593MODULE_DESCRIPTION("Samsung S3C RTC Driver");
594MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
595MODULE_LICENSE("GPL");
596MODULE_ALIAS("platform:s3c2410-rtc");