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1/* drivers/rtc/rtc-s3c.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
26#include <linux/log2.h>
27#include <linux/slab.h>
28#include <linux/of.h>
29#include <linux/uaccess.h>
30#include <linux/io.h>
31
32#include <asm/irq.h>
33#include "rtc-s3c.h"
34
35enum s3c_cpu_type {
36 TYPE_S3C2410,
37 TYPE_S3C2416,
38 TYPE_S3C2443,
39 TYPE_S3C64XX,
40};
41
42struct s3c_rtc_drv_data {
43 int cpu_type;
44};
45
46/* I have yet to find an S3C implementation with more than one
47 * of these rtc blocks in */
48
49static struct clk *rtc_clk;
50static void __iomem *s3c_rtc_base;
51static int s3c_rtc_alarmno;
52static int s3c_rtc_tickno;
53static enum s3c_cpu_type s3c_rtc_cpu_type;
54
55static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
56
57static void s3c_rtc_alarm_clk_enable(bool enable)
58{
59 static DEFINE_SPINLOCK(s3c_rtc_alarm_clk_lock);
60 static bool alarm_clk_enabled;
61 unsigned long irq_flags;
62
63 spin_lock_irqsave(&s3c_rtc_alarm_clk_lock, irq_flags);
64 if (enable) {
65 if (!alarm_clk_enabled) {
66 clk_enable(rtc_clk);
67 alarm_clk_enabled = true;
68 }
69 } else {
70 if (alarm_clk_enabled) {
71 clk_disable(rtc_clk);
72 alarm_clk_enabled = false;
73 }
74 }
75 spin_unlock_irqrestore(&s3c_rtc_alarm_clk_lock, irq_flags);
76}
77
78/* IRQ Handlers */
79
80static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
81{
82 struct rtc_device *rdev = id;
83
84 clk_enable(rtc_clk);
85 rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
86
87 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
88 writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
89
90 clk_disable(rtc_clk);
91
92 s3c_rtc_alarm_clk_enable(false);
93
94 return IRQ_HANDLED;
95}
96
97static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
98{
99 struct rtc_device *rdev = id;
100
101 clk_enable(rtc_clk);
102 rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
103
104 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
105 writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
106
107 clk_disable(rtc_clk);
108 return IRQ_HANDLED;
109}
110
111/* Update control registers */
112static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
113{
114 unsigned int tmp;
115
116 dev_dbg(dev, "%s: aie=%d\n", __func__, enabled);
117
118 clk_enable(rtc_clk);
119 tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
120
121 if (enabled)
122 tmp |= S3C2410_RTCALM_ALMEN;
123
124 writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
125 clk_disable(rtc_clk);
126
127 s3c_rtc_alarm_clk_enable(enabled);
128
129 return 0;
130}
131
132static int s3c_rtc_setfreq(struct device *dev, int freq)
133{
134 struct platform_device *pdev = to_platform_device(dev);
135 struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
136 unsigned int tmp = 0;
137 int val;
138
139 if (!is_power_of_2(freq))
140 return -EINVAL;
141
142 clk_enable(rtc_clk);
143 spin_lock_irq(&s3c_rtc_pie_lock);
144
145 if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
146 tmp = readb(s3c_rtc_base + S3C2410_TICNT);
147 tmp &= S3C2410_TICNT_ENABLE;
148 }
149
150 val = (rtc_dev->max_user_freq / freq) - 1;
151
152 if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
153 tmp |= S3C2443_TICNT_PART(val);
154 writel(S3C2443_TICNT1_PART(val), s3c_rtc_base + S3C2443_TICNT1);
155
156 if (s3c_rtc_cpu_type == TYPE_S3C2416)
157 writel(S3C2416_TICNT2_PART(val), s3c_rtc_base + S3C2416_TICNT2);
158 } else {
159 tmp |= val;
160 }
161
162 writel(tmp, s3c_rtc_base + S3C2410_TICNT);
163 spin_unlock_irq(&s3c_rtc_pie_lock);
164 clk_disable(rtc_clk);
165
166 return 0;
167}
168
169/* Time read/write */
170
171static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
172{
173 unsigned int have_retried = 0;
174 void __iomem *base = s3c_rtc_base;
175
176 clk_enable(rtc_clk);
177 retry_get_time:
178 rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
179 rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
180 rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
181 rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
182 rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
183 rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
184
185 /* the only way to work out whether the system was mid-update
186 * when we read it is to check the second counter, and if it
187 * is zero, then we re-try the entire read
188 */
189
190 if (rtc_tm->tm_sec == 0 && !have_retried) {
191 have_retried = 1;
192 goto retry_get_time;
193 }
194
195 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
196 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
197 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
198 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
199 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
200 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
201
202 rtc_tm->tm_year += 100;
203
204 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
205 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
206 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
207
208 rtc_tm->tm_mon -= 1;
209
210 clk_disable(rtc_clk);
211 return rtc_valid_tm(rtc_tm);
212}
213
214static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
215{
216 void __iomem *base = s3c_rtc_base;
217 int year = tm->tm_year - 100;
218
219 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
220 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
221 tm->tm_hour, tm->tm_min, tm->tm_sec);
222
223 /* we get around y2k by simply not supporting it */
224
225 if (year < 0 || year >= 100) {
226 dev_err(dev, "rtc only supports 100 years\n");
227 return -EINVAL;
228 }
229
230 clk_enable(rtc_clk);
231 writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
232 writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
233 writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
234 writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
235 writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
236 writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
237 clk_disable(rtc_clk);
238
239 return 0;
240}
241
242static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
243{
244 struct rtc_time *alm_tm = &alrm->time;
245 void __iomem *base = s3c_rtc_base;
246 unsigned int alm_en;
247
248 clk_enable(rtc_clk);
249 alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
250 alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
251 alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
252 alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
253 alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
254 alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
255
256 alm_en = readb(base + S3C2410_RTCALM);
257
258 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
259
260 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
261 alm_en,
262 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
263 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
264
265
266 /* decode the alarm enable field */
267
268 if (alm_en & S3C2410_RTCALM_SECEN)
269 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
270 else
271 alm_tm->tm_sec = -1;
272
273 if (alm_en & S3C2410_RTCALM_MINEN)
274 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
275 else
276 alm_tm->tm_min = -1;
277
278 if (alm_en & S3C2410_RTCALM_HOUREN)
279 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
280 else
281 alm_tm->tm_hour = -1;
282
283 if (alm_en & S3C2410_RTCALM_DAYEN)
284 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
285 else
286 alm_tm->tm_mday = -1;
287
288 if (alm_en & S3C2410_RTCALM_MONEN) {
289 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
290 alm_tm->tm_mon -= 1;
291 } else {
292 alm_tm->tm_mon = -1;
293 }
294
295 if (alm_en & S3C2410_RTCALM_YEAREN)
296 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
297 else
298 alm_tm->tm_year = -1;
299
300 clk_disable(rtc_clk);
301 return 0;
302}
303
304static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
305{
306 struct rtc_time *tm = &alrm->time;
307 void __iomem *base = s3c_rtc_base;
308 unsigned int alrm_en;
309
310 clk_enable(rtc_clk);
311 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
312 alrm->enabled,
313 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
314 tm->tm_hour, tm->tm_min, tm->tm_sec);
315
316 alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
317 writeb(0x00, base + S3C2410_RTCALM);
318
319 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
320 alrm_en |= S3C2410_RTCALM_SECEN;
321 writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
322 }
323
324 if (tm->tm_min < 60 && tm->tm_min >= 0) {
325 alrm_en |= S3C2410_RTCALM_MINEN;
326 writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
327 }
328
329 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
330 alrm_en |= S3C2410_RTCALM_HOUREN;
331 writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
332 }
333
334 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
335
336 writeb(alrm_en, base + S3C2410_RTCALM);
337
338 s3c_rtc_setaie(dev, alrm->enabled);
339
340 clk_disable(rtc_clk);
341 return 0;
342}
343
344static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
345{
346 unsigned int ticnt;
347
348 clk_enable(rtc_clk);
349 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
350 ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
351 ticnt &= S3C64XX_RTCCON_TICEN;
352 } else {
353 ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
354 ticnt &= S3C2410_TICNT_ENABLE;
355 }
356
357 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
358 clk_disable(rtc_clk);
359 return 0;
360}
361
362static const struct rtc_class_ops s3c_rtcops = {
363 .read_time = s3c_rtc_gettime,
364 .set_time = s3c_rtc_settime,
365 .read_alarm = s3c_rtc_getalarm,
366 .set_alarm = s3c_rtc_setalarm,
367 .proc = s3c_rtc_proc,
368 .alarm_irq_enable = s3c_rtc_setaie,
369};
370
371static void s3c_rtc_enable(struct platform_device *pdev, int en)
372{
373 void __iomem *base = s3c_rtc_base;
374 unsigned int tmp;
375
376 if (s3c_rtc_base == NULL)
377 return;
378
379 clk_enable(rtc_clk);
380 if (!en) {
381 tmp = readw(base + S3C2410_RTCCON);
382 if (s3c_rtc_cpu_type == TYPE_S3C64XX)
383 tmp &= ~S3C64XX_RTCCON_TICEN;
384 tmp &= ~S3C2410_RTCCON_RTCEN;
385 writew(tmp, base + S3C2410_RTCCON);
386
387 if (s3c_rtc_cpu_type != TYPE_S3C64XX) {
388 tmp = readb(base + S3C2410_TICNT);
389 tmp &= ~S3C2410_TICNT_ENABLE;
390 writeb(tmp, base + S3C2410_TICNT);
391 }
392 } else {
393 /* re-enable the device, and check it is ok */
394
395 if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
396 dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
397
398 tmp = readw(base + S3C2410_RTCCON);
399 writew(tmp | S3C2410_RTCCON_RTCEN,
400 base + S3C2410_RTCCON);
401 }
402
403 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
404 dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
405
406 tmp = readw(base + S3C2410_RTCCON);
407 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
408 base + S3C2410_RTCCON);
409 }
410
411 if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
412 dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
413
414 tmp = readw(base + S3C2410_RTCCON);
415 writew(tmp & ~S3C2410_RTCCON_CLKRST,
416 base + S3C2410_RTCCON);
417 }
418 }
419 clk_disable(rtc_clk);
420}
421
422static int s3c_rtc_remove(struct platform_device *dev)
423{
424 s3c_rtc_setaie(&dev->dev, 0);
425
426 clk_unprepare(rtc_clk);
427 rtc_clk = NULL;
428
429 return 0;
430}
431
432static const struct of_device_id s3c_rtc_dt_match[];
433
434static inline int s3c_rtc_get_driver_data(struct platform_device *pdev)
435{
436#ifdef CONFIG_OF
437 struct s3c_rtc_drv_data *data;
438 if (pdev->dev.of_node) {
439 const struct of_device_id *match;
440 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
441 data = (struct s3c_rtc_drv_data *) match->data;
442 return data->cpu_type;
443 }
444#endif
445 return platform_get_device_id(pdev)->driver_data;
446}
447
448static int s3c_rtc_probe(struct platform_device *pdev)
449{
450 struct rtc_device *rtc;
451 struct rtc_time rtc_tm;
452 struct resource *res;
453 int ret;
454 int tmp;
455
456 dev_dbg(&pdev->dev, "%s: probe=%p\n", __func__, pdev);
457
458 /* find the IRQs */
459
460 s3c_rtc_tickno = platform_get_irq(pdev, 1);
461 if (s3c_rtc_tickno < 0) {
462 dev_err(&pdev->dev, "no irq for rtc tick\n");
463 return s3c_rtc_tickno;
464 }
465
466 s3c_rtc_alarmno = platform_get_irq(pdev, 0);
467 if (s3c_rtc_alarmno < 0) {
468 dev_err(&pdev->dev, "no irq for alarm\n");
469 return s3c_rtc_alarmno;
470 }
471
472 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
473 s3c_rtc_tickno, s3c_rtc_alarmno);
474
475 /* get the memory region */
476
477 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
478 s3c_rtc_base = devm_ioremap_resource(&pdev->dev, res);
479 if (IS_ERR(s3c_rtc_base))
480 return PTR_ERR(s3c_rtc_base);
481
482 rtc_clk = devm_clk_get(&pdev->dev, "rtc");
483 if (IS_ERR(rtc_clk)) {
484 dev_err(&pdev->dev, "failed to find rtc clock source\n");
485 ret = PTR_ERR(rtc_clk);
486 rtc_clk = NULL;
487 return ret;
488 }
489
490 clk_prepare_enable(rtc_clk);
491
492 /* check to see if everything is setup correctly */
493
494 s3c_rtc_enable(pdev, 1);
495
496 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
497 readw(s3c_rtc_base + S3C2410_RTCCON));
498
499 device_init_wakeup(&pdev->dev, 1);
500
501 /* register RTC and exit */
502
503 rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
504 THIS_MODULE);
505
506 if (IS_ERR(rtc)) {
507 dev_err(&pdev->dev, "cannot attach rtc\n");
508 ret = PTR_ERR(rtc);
509 goto err_nortc;
510 }
511
512 s3c_rtc_cpu_type = s3c_rtc_get_driver_data(pdev);
513
514 /* Check RTC Time */
515
516 s3c_rtc_gettime(NULL, &rtc_tm);
517
518 if (rtc_valid_tm(&rtc_tm)) {
519 rtc_tm.tm_year = 100;
520 rtc_tm.tm_mon = 0;
521 rtc_tm.tm_mday = 1;
522 rtc_tm.tm_hour = 0;
523 rtc_tm.tm_min = 0;
524 rtc_tm.tm_sec = 0;
525
526 s3c_rtc_settime(NULL, &rtc_tm);
527
528 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
529 }
530
531 if (s3c_rtc_cpu_type != TYPE_S3C2410)
532 rtc->max_user_freq = 32768;
533 else
534 rtc->max_user_freq = 128;
535
536 if (s3c_rtc_cpu_type == TYPE_S3C2416 || s3c_rtc_cpu_type == TYPE_S3C2443) {
537 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
538 tmp |= S3C2443_RTCCON_TICSEL;
539 writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
540 }
541
542 platform_set_drvdata(pdev, rtc);
543
544 s3c_rtc_setfreq(&pdev->dev, 1);
545
546 ret = devm_request_irq(&pdev->dev, s3c_rtc_alarmno, s3c_rtc_alarmirq,
547 0, "s3c2410-rtc alarm", rtc);
548 if (ret) {
549 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
550 goto err_nortc;
551 }
552
553 ret = devm_request_irq(&pdev->dev, s3c_rtc_tickno, s3c_rtc_tickirq,
554 0, "s3c2410-rtc tick", rtc);
555 if (ret) {
556 dev_err(&pdev->dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
557 goto err_nortc;
558 }
559
560 clk_disable(rtc_clk);
561
562 return 0;
563
564 err_nortc:
565 s3c_rtc_enable(pdev, 0);
566 clk_disable_unprepare(rtc_clk);
567
568 return ret;
569}
570
571#ifdef CONFIG_PM_SLEEP
572/* RTC Power management control */
573
574static int ticnt_save, ticnt_en_save;
575static bool wake_en;
576
577static int s3c_rtc_suspend(struct device *dev)
578{
579 struct platform_device *pdev = to_platform_device(dev);
580
581 clk_enable(rtc_clk);
582 /* save TICNT for anyone using periodic interrupts */
583 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
584 ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
585 ticnt_en_save &= S3C64XX_RTCCON_TICEN;
586 ticnt_save = readl(s3c_rtc_base + S3C2410_TICNT);
587 } else {
588 ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
589 }
590 s3c_rtc_enable(pdev, 0);
591
592 if (device_may_wakeup(dev) && !wake_en) {
593 if (enable_irq_wake(s3c_rtc_alarmno) == 0)
594 wake_en = true;
595 else
596 dev_err(dev, "enable_irq_wake failed\n");
597 }
598 clk_disable(rtc_clk);
599
600 return 0;
601}
602
603static int s3c_rtc_resume(struct device *dev)
604{
605 struct platform_device *pdev = to_platform_device(dev);
606 unsigned int tmp;
607
608 clk_enable(rtc_clk);
609 s3c_rtc_enable(pdev, 1);
610 if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
611 writel(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
612 if (ticnt_en_save) {
613 tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
614 writew(tmp | ticnt_en_save,
615 s3c_rtc_base + S3C2410_RTCCON);
616 }
617 } else {
618 writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
619 }
620
621 if (device_may_wakeup(dev) && wake_en) {
622 disable_irq_wake(s3c_rtc_alarmno);
623 wake_en = false;
624 }
625 clk_disable(rtc_clk);
626
627 return 0;
628}
629#endif
630
631static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
632
633#ifdef CONFIG_OF
634static struct s3c_rtc_drv_data s3c_rtc_drv_data_array[] = {
635 [TYPE_S3C2410] = { TYPE_S3C2410 },
636 [TYPE_S3C2416] = { TYPE_S3C2416 },
637 [TYPE_S3C2443] = { TYPE_S3C2443 },
638 [TYPE_S3C64XX] = { TYPE_S3C64XX },
639};
640
641static const struct of_device_id s3c_rtc_dt_match[] = {
642 {
643 .compatible = "samsung,s3c2410-rtc",
644 .data = &s3c_rtc_drv_data_array[TYPE_S3C2410],
645 }, {
646 .compatible = "samsung,s3c2416-rtc",
647 .data = &s3c_rtc_drv_data_array[TYPE_S3C2416],
648 }, {
649 .compatible = "samsung,s3c2443-rtc",
650 .data = &s3c_rtc_drv_data_array[TYPE_S3C2443],
651 }, {
652 .compatible = "samsung,s3c6410-rtc",
653 .data = &s3c_rtc_drv_data_array[TYPE_S3C64XX],
654 },
655 {},
656};
657MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
658#endif
659
660static struct platform_device_id s3c_rtc_driver_ids[] = {
661 {
662 .name = "s3c2410-rtc",
663 .driver_data = TYPE_S3C2410,
664 }, {
665 .name = "s3c2416-rtc",
666 .driver_data = TYPE_S3C2416,
667 }, {
668 .name = "s3c2443-rtc",
669 .driver_data = TYPE_S3C2443,
670 }, {
671 .name = "s3c64xx-rtc",
672 .driver_data = TYPE_S3C64XX,
673 },
674 { }
675};
676
677MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
678
679static struct platform_driver s3c_rtc_driver = {
680 .probe = s3c_rtc_probe,
681 .remove = s3c_rtc_remove,
682 .id_table = s3c_rtc_driver_ids,
683 .driver = {
684 .name = "s3c-rtc",
685 .owner = THIS_MODULE,
686 .pm = &s3c_rtc_pm_ops,
687 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
688 },
689};
690
691module_platform_driver(s3c_rtc_driver);
692
693MODULE_DESCRIPTION("Samsung S3C RTC Driver");
694MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
695MODULE_LICENSE("GPL");
696MODULE_ALIAS("platform:s3c2410-rtc");
1/* drivers/rtc/rtc-s3c.c
2 *
3 * Copyright (c) 2010 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com/
5 *
6 * Copyright (c) 2004,2006 Simtec Electronics
7 * Ben Dooks, <ben@simtec.co.uk>
8 * http://armlinux.simtec.co.uk/
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 *
14 * S3C2410/S3C2440/S3C24XX Internal RTC Driver
15*/
16
17#include <linux/module.h>
18#include <linux/fs.h>
19#include <linux/string.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/interrupt.h>
23#include <linux/rtc.h>
24#include <linux/bcd.h>
25#include <linux/clk.h>
26#include <linux/log2.h>
27#include <linux/slab.h>
28#include <linux/of.h>
29#include <linux/uaccess.h>
30#include <linux/io.h>
31
32#include <asm/irq.h>
33#include "rtc-s3c.h"
34
35struct s3c_rtc {
36 struct device *dev;
37 struct rtc_device *rtc;
38
39 void __iomem *base;
40 struct clk *rtc_clk;
41 struct clk *rtc_src_clk;
42 bool clk_disabled;
43
44 const struct s3c_rtc_data *data;
45
46 int irq_alarm;
47 int irq_tick;
48
49 spinlock_t pie_lock;
50 spinlock_t alarm_clk_lock;
51
52 int ticnt_save;
53 int ticnt_en_save;
54 bool wake_en;
55};
56
57struct s3c_rtc_data {
58 int max_user_freq;
59 bool needs_src_clk;
60
61 void (*irq_handler) (struct s3c_rtc *info, int mask);
62 void (*set_freq) (struct s3c_rtc *info, int freq);
63 void (*enable_tick) (struct s3c_rtc *info, struct seq_file *seq);
64 void (*select_tick_clk) (struct s3c_rtc *info);
65 void (*save_tick_cnt) (struct s3c_rtc *info);
66 void (*restore_tick_cnt) (struct s3c_rtc *info);
67 void (*enable) (struct s3c_rtc *info);
68 void (*disable) (struct s3c_rtc *info);
69};
70
71static int s3c_rtc_enable_clk(struct s3c_rtc *info)
72{
73 unsigned long irq_flags;
74 int ret = 0;
75
76 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
77
78 if (info->clk_disabled) {
79 ret = clk_enable(info->rtc_clk);
80 if (ret)
81 goto out;
82
83 if (info->data->needs_src_clk) {
84 ret = clk_enable(info->rtc_src_clk);
85 if (ret) {
86 clk_disable(info->rtc_clk);
87 goto out;
88 }
89 }
90 info->clk_disabled = false;
91 }
92
93out:
94 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
95
96 return ret;
97}
98
99static void s3c_rtc_disable_clk(struct s3c_rtc *info)
100{
101 unsigned long irq_flags;
102
103 spin_lock_irqsave(&info->alarm_clk_lock, irq_flags);
104 if (!info->clk_disabled) {
105 if (info->data->needs_src_clk)
106 clk_disable(info->rtc_src_clk);
107 clk_disable(info->rtc_clk);
108 info->clk_disabled = true;
109 }
110 spin_unlock_irqrestore(&info->alarm_clk_lock, irq_flags);
111}
112
113/* IRQ Handlers */
114static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
115{
116 struct s3c_rtc *info = (struct s3c_rtc *)id;
117
118 if (info->data->irq_handler)
119 info->data->irq_handler(info, S3C2410_INTP_TIC);
120
121 return IRQ_HANDLED;
122}
123
124static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
125{
126 struct s3c_rtc *info = (struct s3c_rtc *)id;
127
128 if (info->data->irq_handler)
129 info->data->irq_handler(info, S3C2410_INTP_ALM);
130
131 return IRQ_HANDLED;
132}
133
134/* Update control registers */
135static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
136{
137 struct s3c_rtc *info = dev_get_drvdata(dev);
138 unsigned int tmp;
139 int ret;
140
141 dev_dbg(info->dev, "%s: aie=%d\n", __func__, enabled);
142
143 ret = s3c_rtc_enable_clk(info);
144 if (ret)
145 return ret;
146
147 tmp = readb(info->base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
148
149 if (enabled)
150 tmp |= S3C2410_RTCALM_ALMEN;
151
152 writeb(tmp, info->base + S3C2410_RTCALM);
153
154 s3c_rtc_disable_clk(info);
155
156 if (enabled) {
157 ret = s3c_rtc_enable_clk(info);
158 if (ret)
159 return ret;
160 } else {
161 s3c_rtc_disable_clk(info);
162 }
163
164 return 0;
165}
166
167/* Set RTC frequency */
168static int s3c_rtc_setfreq(struct s3c_rtc *info, int freq)
169{
170 int ret;
171
172 if (!is_power_of_2(freq))
173 return -EINVAL;
174
175 ret = s3c_rtc_enable_clk(info);
176 if (ret)
177 return ret;
178 spin_lock_irq(&info->pie_lock);
179
180 if (info->data->set_freq)
181 info->data->set_freq(info, freq);
182
183 spin_unlock_irq(&info->pie_lock);
184 s3c_rtc_disable_clk(info);
185
186 return 0;
187}
188
189/* Time read/write */
190static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
191{
192 struct s3c_rtc *info = dev_get_drvdata(dev);
193 unsigned int have_retried = 0;
194 int ret;
195
196 ret = s3c_rtc_enable_clk(info);
197 if (ret)
198 return ret;
199
200retry_get_time:
201 rtc_tm->tm_min = readb(info->base + S3C2410_RTCMIN);
202 rtc_tm->tm_hour = readb(info->base + S3C2410_RTCHOUR);
203 rtc_tm->tm_mday = readb(info->base + S3C2410_RTCDATE);
204 rtc_tm->tm_mon = readb(info->base + S3C2410_RTCMON);
205 rtc_tm->tm_year = readb(info->base + S3C2410_RTCYEAR);
206 rtc_tm->tm_sec = readb(info->base + S3C2410_RTCSEC);
207
208 /* the only way to work out whether the system was mid-update
209 * when we read it is to check the second counter, and if it
210 * is zero, then we re-try the entire read
211 */
212
213 if (rtc_tm->tm_sec == 0 && !have_retried) {
214 have_retried = 1;
215 goto retry_get_time;
216 }
217
218 rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
219 rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
220 rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
221 rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
222 rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
223 rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
224
225 s3c_rtc_disable_clk(info);
226
227 rtc_tm->tm_year += 100;
228
229 dev_dbg(dev, "read time %04d.%02d.%02d %02d:%02d:%02d\n",
230 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
231 rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
232
233 rtc_tm->tm_mon -= 1;
234
235 return 0;
236}
237
238static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
239{
240 struct s3c_rtc *info = dev_get_drvdata(dev);
241 int year = tm->tm_year - 100;
242 int ret;
243
244 dev_dbg(dev, "set time %04d.%02d.%02d %02d:%02d:%02d\n",
245 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
246 tm->tm_hour, tm->tm_min, tm->tm_sec);
247
248 /* we get around y2k by simply not supporting it */
249
250 if (year < 0 || year >= 100) {
251 dev_err(dev, "rtc only supports 100 years\n");
252 return -EINVAL;
253 }
254
255 ret = s3c_rtc_enable_clk(info);
256 if (ret)
257 return ret;
258
259 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_RTCSEC);
260 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_RTCMIN);
261 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_RTCHOUR);
262 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_RTCDATE);
263 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_RTCMON);
264 writeb(bin2bcd(year), info->base + S3C2410_RTCYEAR);
265
266 s3c_rtc_disable_clk(info);
267
268 return 0;
269}
270
271static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
272{
273 struct s3c_rtc *info = dev_get_drvdata(dev);
274 struct rtc_time *alm_tm = &alrm->time;
275 unsigned int alm_en;
276 int ret;
277
278 ret = s3c_rtc_enable_clk(info);
279 if (ret)
280 return ret;
281
282 alm_tm->tm_sec = readb(info->base + S3C2410_ALMSEC);
283 alm_tm->tm_min = readb(info->base + S3C2410_ALMMIN);
284 alm_tm->tm_hour = readb(info->base + S3C2410_ALMHOUR);
285 alm_tm->tm_mon = readb(info->base + S3C2410_ALMMON);
286 alm_tm->tm_mday = readb(info->base + S3C2410_ALMDATE);
287 alm_tm->tm_year = readb(info->base + S3C2410_ALMYEAR);
288
289 alm_en = readb(info->base + S3C2410_RTCALM);
290
291 s3c_rtc_disable_clk(info);
292
293 alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
294
295 dev_dbg(dev, "read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
296 alm_en,
297 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
298 alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
299
300 /* decode the alarm enable field */
301 if (alm_en & S3C2410_RTCALM_SECEN)
302 alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
303
304 if (alm_en & S3C2410_RTCALM_MINEN)
305 alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
306
307 if (alm_en & S3C2410_RTCALM_HOUREN)
308 alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
309
310 if (alm_en & S3C2410_RTCALM_DAYEN)
311 alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
312
313 if (alm_en & S3C2410_RTCALM_MONEN) {
314 alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
315 alm_tm->tm_mon -= 1;
316 }
317
318 if (alm_en & S3C2410_RTCALM_YEAREN)
319 alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
320
321 return 0;
322}
323
324static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
325{
326 struct s3c_rtc *info = dev_get_drvdata(dev);
327 struct rtc_time *tm = &alrm->time;
328 unsigned int alrm_en;
329 int ret;
330 int year = tm->tm_year - 100;
331
332 dev_dbg(dev, "s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
333 alrm->enabled,
334 1900 + tm->tm_year, tm->tm_mon + 1, tm->tm_mday,
335 tm->tm_hour, tm->tm_min, tm->tm_sec);
336
337 ret = s3c_rtc_enable_clk(info);
338 if (ret)
339 return ret;
340
341 alrm_en = readb(info->base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
342 writeb(0x00, info->base + S3C2410_RTCALM);
343
344 if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
345 alrm_en |= S3C2410_RTCALM_SECEN;
346 writeb(bin2bcd(tm->tm_sec), info->base + S3C2410_ALMSEC);
347 }
348
349 if (tm->tm_min < 60 && tm->tm_min >= 0) {
350 alrm_en |= S3C2410_RTCALM_MINEN;
351 writeb(bin2bcd(tm->tm_min), info->base + S3C2410_ALMMIN);
352 }
353
354 if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
355 alrm_en |= S3C2410_RTCALM_HOUREN;
356 writeb(bin2bcd(tm->tm_hour), info->base + S3C2410_ALMHOUR);
357 }
358
359 if (year < 100 && year >= 0) {
360 alrm_en |= S3C2410_RTCALM_YEAREN;
361 writeb(bin2bcd(year), info->base + S3C2410_ALMYEAR);
362 }
363
364 if (tm->tm_mon < 12 && tm->tm_mon >= 0) {
365 alrm_en |= S3C2410_RTCALM_MONEN;
366 writeb(bin2bcd(tm->tm_mon + 1), info->base + S3C2410_ALMMON);
367 }
368
369 if (tm->tm_mday <= 31 && tm->tm_mday >= 1) {
370 alrm_en |= S3C2410_RTCALM_DAYEN;
371 writeb(bin2bcd(tm->tm_mday), info->base + S3C2410_ALMDATE);
372 }
373
374 dev_dbg(dev, "setting S3C2410_RTCALM to %08x\n", alrm_en);
375
376 writeb(alrm_en, info->base + S3C2410_RTCALM);
377
378 s3c_rtc_disable_clk(info);
379
380 s3c_rtc_setaie(dev, alrm->enabled);
381
382 return 0;
383}
384
385static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
386{
387 struct s3c_rtc *info = dev_get_drvdata(dev);
388 int ret;
389
390 ret = s3c_rtc_enable_clk(info);
391 if (ret)
392 return ret;
393
394 if (info->data->enable_tick)
395 info->data->enable_tick(info, seq);
396
397 s3c_rtc_disable_clk(info);
398
399 return 0;
400}
401
402static const struct rtc_class_ops s3c_rtcops = {
403 .read_time = s3c_rtc_gettime,
404 .set_time = s3c_rtc_settime,
405 .read_alarm = s3c_rtc_getalarm,
406 .set_alarm = s3c_rtc_setalarm,
407 .proc = s3c_rtc_proc,
408 .alarm_irq_enable = s3c_rtc_setaie,
409};
410
411static void s3c24xx_rtc_enable(struct s3c_rtc *info)
412{
413 unsigned int con, tmp;
414
415 con = readw(info->base + S3C2410_RTCCON);
416 /* re-enable the device, and check it is ok */
417 if ((con & S3C2410_RTCCON_RTCEN) == 0) {
418 dev_info(info->dev, "rtc disabled, re-enabling\n");
419
420 tmp = readw(info->base + S3C2410_RTCCON);
421 writew(tmp | S3C2410_RTCCON_RTCEN, info->base + S3C2410_RTCCON);
422 }
423
424 if (con & S3C2410_RTCCON_CNTSEL) {
425 dev_info(info->dev, "removing RTCCON_CNTSEL\n");
426
427 tmp = readw(info->base + S3C2410_RTCCON);
428 writew(tmp & ~S3C2410_RTCCON_CNTSEL,
429 info->base + S3C2410_RTCCON);
430 }
431
432 if (con & S3C2410_RTCCON_CLKRST) {
433 dev_info(info->dev, "removing RTCCON_CLKRST\n");
434
435 tmp = readw(info->base + S3C2410_RTCCON);
436 writew(tmp & ~S3C2410_RTCCON_CLKRST,
437 info->base + S3C2410_RTCCON);
438 }
439}
440
441static void s3c24xx_rtc_disable(struct s3c_rtc *info)
442{
443 unsigned int con;
444
445 con = readw(info->base + S3C2410_RTCCON);
446 con &= ~S3C2410_RTCCON_RTCEN;
447 writew(con, info->base + S3C2410_RTCCON);
448
449 con = readb(info->base + S3C2410_TICNT);
450 con &= ~S3C2410_TICNT_ENABLE;
451 writeb(con, info->base + S3C2410_TICNT);
452}
453
454static void s3c6410_rtc_disable(struct s3c_rtc *info)
455{
456 unsigned int con;
457
458 con = readw(info->base + S3C2410_RTCCON);
459 con &= ~S3C64XX_RTCCON_TICEN;
460 con &= ~S3C2410_RTCCON_RTCEN;
461 writew(con, info->base + S3C2410_RTCCON);
462}
463
464static int s3c_rtc_remove(struct platform_device *pdev)
465{
466 struct s3c_rtc *info = platform_get_drvdata(pdev);
467
468 s3c_rtc_setaie(info->dev, 0);
469
470 if (info->data->needs_src_clk)
471 clk_unprepare(info->rtc_src_clk);
472 clk_unprepare(info->rtc_clk);
473
474 return 0;
475}
476
477static const struct of_device_id s3c_rtc_dt_match[];
478
479static const struct s3c_rtc_data *s3c_rtc_get_data(struct platform_device *pdev)
480{
481 const struct of_device_id *match;
482
483 match = of_match_node(s3c_rtc_dt_match, pdev->dev.of_node);
484 return match->data;
485}
486
487static int s3c_rtc_probe(struct platform_device *pdev)
488{
489 struct s3c_rtc *info = NULL;
490 struct rtc_time rtc_tm;
491 struct resource *res;
492 int ret;
493
494 info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
495 if (!info)
496 return -ENOMEM;
497
498 /* find the IRQs */
499 info->irq_tick = platform_get_irq(pdev, 1);
500 if (info->irq_tick < 0) {
501 dev_err(&pdev->dev, "no irq for rtc tick\n");
502 return info->irq_tick;
503 }
504
505 info->dev = &pdev->dev;
506 info->data = s3c_rtc_get_data(pdev);
507 if (!info->data) {
508 dev_err(&pdev->dev, "failed getting s3c_rtc_data\n");
509 return -EINVAL;
510 }
511 spin_lock_init(&info->pie_lock);
512 spin_lock_init(&info->alarm_clk_lock);
513
514 platform_set_drvdata(pdev, info);
515
516 info->irq_alarm = platform_get_irq(pdev, 0);
517 if (info->irq_alarm < 0) {
518 dev_err(&pdev->dev, "no irq for alarm\n");
519 return info->irq_alarm;
520 }
521
522 dev_dbg(&pdev->dev, "s3c2410_rtc: tick irq %d, alarm irq %d\n",
523 info->irq_tick, info->irq_alarm);
524
525 /* get the memory region */
526 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
527 info->base = devm_ioremap_resource(&pdev->dev, res);
528 if (IS_ERR(info->base))
529 return PTR_ERR(info->base);
530
531 info->rtc_clk = devm_clk_get(&pdev->dev, "rtc");
532 if (IS_ERR(info->rtc_clk)) {
533 ret = PTR_ERR(info->rtc_clk);
534 if (ret != -EPROBE_DEFER)
535 dev_err(&pdev->dev, "failed to find rtc clock\n");
536 else
537 dev_dbg(&pdev->dev, "probe deferred due to missing rtc clk\n");
538 return ret;
539 }
540 ret = clk_prepare_enable(info->rtc_clk);
541 if (ret)
542 return ret;
543
544 if (info->data->needs_src_clk) {
545 info->rtc_src_clk = devm_clk_get(&pdev->dev, "rtc_src");
546 if (IS_ERR(info->rtc_src_clk)) {
547 ret = PTR_ERR(info->rtc_src_clk);
548 if (ret != -EPROBE_DEFER)
549 dev_err(&pdev->dev,
550 "failed to find rtc source clock\n");
551 else
552 dev_dbg(&pdev->dev,
553 "probe deferred due to missing rtc src clk\n");
554 goto err_src_clk;
555 }
556 ret = clk_prepare_enable(info->rtc_src_clk);
557 if (ret)
558 goto err_src_clk;
559 }
560
561 /* check to see if everything is setup correctly */
562 if (info->data->enable)
563 info->data->enable(info);
564
565 dev_dbg(&pdev->dev, "s3c2410_rtc: RTCCON=%02x\n",
566 readw(info->base + S3C2410_RTCCON));
567
568 device_init_wakeup(&pdev->dev, 1);
569
570 /* Check RTC Time */
571 if (s3c_rtc_gettime(&pdev->dev, &rtc_tm)) {
572 rtc_tm.tm_year = 100;
573 rtc_tm.tm_mon = 0;
574 rtc_tm.tm_mday = 1;
575 rtc_tm.tm_hour = 0;
576 rtc_tm.tm_min = 0;
577 rtc_tm.tm_sec = 0;
578
579 s3c_rtc_settime(&pdev->dev, &rtc_tm);
580
581 dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
582 }
583
584 /* register RTC and exit */
585 info->rtc = devm_rtc_device_register(&pdev->dev, "s3c", &s3c_rtcops,
586 THIS_MODULE);
587 if (IS_ERR(info->rtc)) {
588 dev_err(&pdev->dev, "cannot attach rtc\n");
589 ret = PTR_ERR(info->rtc);
590 goto err_nortc;
591 }
592
593 ret = devm_request_irq(&pdev->dev, info->irq_alarm, s3c_rtc_alarmirq,
594 0, "s3c2410-rtc alarm", info);
595 if (ret) {
596 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_alarm, ret);
597 goto err_nortc;
598 }
599
600 ret = devm_request_irq(&pdev->dev, info->irq_tick, s3c_rtc_tickirq,
601 0, "s3c2410-rtc tick", info);
602 if (ret) {
603 dev_err(&pdev->dev, "IRQ%d error %d\n", info->irq_tick, ret);
604 goto err_nortc;
605 }
606
607 if (info->data->select_tick_clk)
608 info->data->select_tick_clk(info);
609
610 s3c_rtc_setfreq(info, 1);
611
612 return 0;
613
614err_nortc:
615 if (info->data->disable)
616 info->data->disable(info);
617
618 if (info->data->needs_src_clk)
619 clk_disable_unprepare(info->rtc_src_clk);
620err_src_clk:
621 clk_disable_unprepare(info->rtc_clk);
622
623 return ret;
624}
625
626#ifdef CONFIG_PM_SLEEP
627
628static int s3c_rtc_suspend(struct device *dev)
629{
630 struct s3c_rtc *info = dev_get_drvdata(dev);
631 int ret;
632
633 ret = s3c_rtc_enable_clk(info);
634 if (ret)
635 return ret;
636
637 /* save TICNT for anyone using periodic interrupts */
638 if (info->data->save_tick_cnt)
639 info->data->save_tick_cnt(info);
640
641 if (info->data->disable)
642 info->data->disable(info);
643
644 if (device_may_wakeup(dev) && !info->wake_en) {
645 if (enable_irq_wake(info->irq_alarm) == 0)
646 info->wake_en = true;
647 else
648 dev_err(dev, "enable_irq_wake failed\n");
649 }
650
651 return 0;
652}
653
654static int s3c_rtc_resume(struct device *dev)
655{
656 struct s3c_rtc *info = dev_get_drvdata(dev);
657
658 if (info->data->enable)
659 info->data->enable(info);
660
661 if (info->data->restore_tick_cnt)
662 info->data->restore_tick_cnt(info);
663
664 s3c_rtc_disable_clk(info);
665
666 if (device_may_wakeup(dev) && info->wake_en) {
667 disable_irq_wake(info->irq_alarm);
668 info->wake_en = false;
669 }
670
671 return 0;
672}
673#endif
674static SIMPLE_DEV_PM_OPS(s3c_rtc_pm_ops, s3c_rtc_suspend, s3c_rtc_resume);
675
676static void s3c24xx_rtc_irq(struct s3c_rtc *info, int mask)
677{
678 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
679}
680
681static void s3c6410_rtc_irq(struct s3c_rtc *info, int mask)
682{
683 rtc_update_irq(info->rtc, 1, RTC_AF | RTC_IRQF);
684 writeb(mask, info->base + S3C2410_INTP);
685}
686
687static void s3c2410_rtc_setfreq(struct s3c_rtc *info, int freq)
688{
689 unsigned int tmp = 0;
690 int val;
691
692 tmp = readb(info->base + S3C2410_TICNT);
693 tmp &= S3C2410_TICNT_ENABLE;
694
695 val = (info->rtc->max_user_freq / freq) - 1;
696 tmp |= val;
697
698 writel(tmp, info->base + S3C2410_TICNT);
699}
700
701static void s3c2416_rtc_setfreq(struct s3c_rtc *info, int freq)
702{
703 unsigned int tmp = 0;
704 int val;
705
706 tmp = readb(info->base + S3C2410_TICNT);
707 tmp &= S3C2410_TICNT_ENABLE;
708
709 val = (info->rtc->max_user_freq / freq) - 1;
710
711 tmp |= S3C2443_TICNT_PART(val);
712 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
713
714 writel(S3C2416_TICNT2_PART(val), info->base + S3C2416_TICNT2);
715
716 writel(tmp, info->base + S3C2410_TICNT);
717}
718
719static void s3c2443_rtc_setfreq(struct s3c_rtc *info, int freq)
720{
721 unsigned int tmp = 0;
722 int val;
723
724 tmp = readb(info->base + S3C2410_TICNT);
725 tmp &= S3C2410_TICNT_ENABLE;
726
727 val = (info->rtc->max_user_freq / freq) - 1;
728
729 tmp |= S3C2443_TICNT_PART(val);
730 writel(S3C2443_TICNT1_PART(val), info->base + S3C2443_TICNT1);
731
732 writel(tmp, info->base + S3C2410_TICNT);
733}
734
735static void s3c6410_rtc_setfreq(struct s3c_rtc *info, int freq)
736{
737 int val;
738
739 val = (info->rtc->max_user_freq / freq) - 1;
740 writel(val, info->base + S3C2410_TICNT);
741}
742
743static void s3c24xx_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
744{
745 unsigned int ticnt;
746
747 ticnt = readb(info->base + S3C2410_TICNT);
748 ticnt &= S3C2410_TICNT_ENABLE;
749
750 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
751}
752
753static void s3c2416_rtc_select_tick_clk(struct s3c_rtc *info)
754{
755 unsigned int con;
756
757 con = readw(info->base + S3C2410_RTCCON);
758 con |= S3C2443_RTCCON_TICSEL;
759 writew(con, info->base + S3C2410_RTCCON);
760}
761
762static void s3c6410_rtc_enable_tick(struct s3c_rtc *info, struct seq_file *seq)
763{
764 unsigned int ticnt;
765
766 ticnt = readw(info->base + S3C2410_RTCCON);
767 ticnt &= S3C64XX_RTCCON_TICEN;
768
769 seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
770}
771
772static void s3c24xx_rtc_save_tick_cnt(struct s3c_rtc *info)
773{
774 info->ticnt_save = readb(info->base + S3C2410_TICNT);
775}
776
777static void s3c24xx_rtc_restore_tick_cnt(struct s3c_rtc *info)
778{
779 writeb(info->ticnt_save, info->base + S3C2410_TICNT);
780}
781
782static void s3c6410_rtc_save_tick_cnt(struct s3c_rtc *info)
783{
784 info->ticnt_en_save = readw(info->base + S3C2410_RTCCON);
785 info->ticnt_en_save &= S3C64XX_RTCCON_TICEN;
786 info->ticnt_save = readl(info->base + S3C2410_TICNT);
787}
788
789static void s3c6410_rtc_restore_tick_cnt(struct s3c_rtc *info)
790{
791 unsigned int con;
792
793 writel(info->ticnt_save, info->base + S3C2410_TICNT);
794 if (info->ticnt_en_save) {
795 con = readw(info->base + S3C2410_RTCCON);
796 writew(con | info->ticnt_en_save, info->base + S3C2410_RTCCON);
797 }
798}
799
800static struct s3c_rtc_data const s3c2410_rtc_data = {
801 .max_user_freq = 128,
802 .irq_handler = s3c24xx_rtc_irq,
803 .set_freq = s3c2410_rtc_setfreq,
804 .enable_tick = s3c24xx_rtc_enable_tick,
805 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
806 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
807 .enable = s3c24xx_rtc_enable,
808 .disable = s3c24xx_rtc_disable,
809};
810
811static struct s3c_rtc_data const s3c2416_rtc_data = {
812 .max_user_freq = 32768,
813 .irq_handler = s3c24xx_rtc_irq,
814 .set_freq = s3c2416_rtc_setfreq,
815 .enable_tick = s3c24xx_rtc_enable_tick,
816 .select_tick_clk = s3c2416_rtc_select_tick_clk,
817 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
818 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
819 .enable = s3c24xx_rtc_enable,
820 .disable = s3c24xx_rtc_disable,
821};
822
823static struct s3c_rtc_data const s3c2443_rtc_data = {
824 .max_user_freq = 32768,
825 .irq_handler = s3c24xx_rtc_irq,
826 .set_freq = s3c2443_rtc_setfreq,
827 .enable_tick = s3c24xx_rtc_enable_tick,
828 .select_tick_clk = s3c2416_rtc_select_tick_clk,
829 .save_tick_cnt = s3c24xx_rtc_save_tick_cnt,
830 .restore_tick_cnt = s3c24xx_rtc_restore_tick_cnt,
831 .enable = s3c24xx_rtc_enable,
832 .disable = s3c24xx_rtc_disable,
833};
834
835static struct s3c_rtc_data const s3c6410_rtc_data = {
836 .max_user_freq = 32768,
837 .needs_src_clk = true,
838 .irq_handler = s3c6410_rtc_irq,
839 .set_freq = s3c6410_rtc_setfreq,
840 .enable_tick = s3c6410_rtc_enable_tick,
841 .save_tick_cnt = s3c6410_rtc_save_tick_cnt,
842 .restore_tick_cnt = s3c6410_rtc_restore_tick_cnt,
843 .enable = s3c24xx_rtc_enable,
844 .disable = s3c6410_rtc_disable,
845};
846
847static const struct of_device_id s3c_rtc_dt_match[] = {
848 {
849 .compatible = "samsung,s3c2410-rtc",
850 .data = &s3c2410_rtc_data,
851 }, {
852 .compatible = "samsung,s3c2416-rtc",
853 .data = &s3c2416_rtc_data,
854 }, {
855 .compatible = "samsung,s3c2443-rtc",
856 .data = &s3c2443_rtc_data,
857 }, {
858 .compatible = "samsung,s3c6410-rtc",
859 .data = &s3c6410_rtc_data,
860 }, {
861 .compatible = "samsung,exynos3250-rtc",
862 .data = &s3c6410_rtc_data,
863 },
864 { /* sentinel */ },
865};
866MODULE_DEVICE_TABLE(of, s3c_rtc_dt_match);
867
868static struct platform_driver s3c_rtc_driver = {
869 .probe = s3c_rtc_probe,
870 .remove = s3c_rtc_remove,
871 .driver = {
872 .name = "s3c-rtc",
873 .pm = &s3c_rtc_pm_ops,
874 .of_match_table = of_match_ptr(s3c_rtc_dt_match),
875 },
876};
877module_platform_driver(s3c_rtc_driver);
878
879MODULE_DESCRIPTION("Samsung S3C RTC Driver");
880MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
881MODULE_LICENSE("GPL");
882MODULE_ALIAS("platform:s3c2410-rtc");