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1/*
2 * PCA953x 4/8/16/24/40 bit I/O ports
3 *
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
6 *
7 * Derived from drivers/i2c/chips/pca9539.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/gpio.h>
17#include <linux/interrupt.h>
18#include <linux/irq.h>
19#include <linux/irqdomain.h>
20#include <linux/i2c.h>
21#include <linux/platform_data/pca953x.h>
22#include <linux/slab.h>
23#ifdef CONFIG_OF_GPIO
24#include <linux/of_platform.h>
25#endif
26
27#define PCA953X_INPUT 0
28#define PCA953X_OUTPUT 1
29#define PCA953X_INVERT 2
30#define PCA953X_DIRECTION 3
31
32#define REG_ADDR_AI 0x80
33
34#define PCA957X_IN 0
35#define PCA957X_INVRT 1
36#define PCA957X_BKEN 2
37#define PCA957X_PUPD 3
38#define PCA957X_CFG 4
39#define PCA957X_OUT 5
40#define PCA957X_MSK 6
41#define PCA957X_INTS 7
42
43#define PCA_GPIO_MASK 0x00FF
44#define PCA_INT 0x0100
45#define PCA953X_TYPE 0x1000
46#define PCA957X_TYPE 0x2000
47
48static const struct i2c_device_id pca953x_id[] = {
49 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
50 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
51 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
52 { "pca9536", 4 | PCA953X_TYPE, },
53 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
54 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
55 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
56 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
57 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
58 { "pca9556", 8 | PCA953X_TYPE, },
59 { "pca9557", 8 | PCA953X_TYPE, },
60 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
61 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
62 { "pca9698", 40 | PCA953X_TYPE, },
63
64 { "max7310", 8 | PCA953X_TYPE, },
65 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
66 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
67 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
68 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
69 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
70 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
71 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
72 { "xra1202", 8 | PCA953X_TYPE },
73 { }
74};
75MODULE_DEVICE_TABLE(i2c, pca953x_id);
76
77#define MAX_BANK 5
78#define BANK_SZ 8
79
80#define NBANK(chip) (chip->gpio_chip.ngpio / BANK_SZ)
81
82struct pca953x_chip {
83 unsigned gpio_start;
84 u8 reg_output[MAX_BANK];
85 u8 reg_direction[MAX_BANK];
86 struct mutex i2c_lock;
87
88#ifdef CONFIG_GPIO_PCA953X_IRQ
89 struct mutex irq_lock;
90 u8 irq_mask[MAX_BANK];
91 u8 irq_stat[MAX_BANK];
92 u8 irq_trig_raise[MAX_BANK];
93 u8 irq_trig_fall[MAX_BANK];
94 struct irq_domain *domain;
95#endif
96
97 struct i2c_client *client;
98 struct gpio_chip gpio_chip;
99 const char *const *names;
100 int chip_type;
101};
102
103static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
104 int off)
105{
106 int ret;
107 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
108 int offset = off / BANK_SZ;
109
110 ret = i2c_smbus_read_byte_data(chip->client,
111 (reg << bank_shift) + offset);
112 *val = ret;
113
114 if (ret < 0) {
115 dev_err(&chip->client->dev, "failed reading register\n");
116 return ret;
117 }
118
119 return 0;
120}
121
122static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
123 int off)
124{
125 int ret = 0;
126 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
127 int offset = off / BANK_SZ;
128
129 ret = i2c_smbus_write_byte_data(chip->client,
130 (reg << bank_shift) + offset, val);
131
132 if (ret < 0) {
133 dev_err(&chip->client->dev, "failed writing register\n");
134 return ret;
135 }
136
137 return 0;
138}
139
140static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
141{
142 int ret = 0;
143
144 if (chip->gpio_chip.ngpio <= 8)
145 ret = i2c_smbus_write_byte_data(chip->client, reg, *val);
146 else if (chip->gpio_chip.ngpio >= 24) {
147 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
148 ret = i2c_smbus_write_i2c_block_data(chip->client,
149 (reg << bank_shift) | REG_ADDR_AI,
150 NBANK(chip), val);
151 } else {
152 switch (chip->chip_type) {
153 case PCA953X_TYPE:
154 ret = i2c_smbus_write_word_data(chip->client,
155 reg << 1, (u16) *val);
156 break;
157 case PCA957X_TYPE:
158 ret = i2c_smbus_write_byte_data(chip->client, reg << 1,
159 val[0]);
160 if (ret < 0)
161 break;
162 ret = i2c_smbus_write_byte_data(chip->client,
163 (reg << 1) + 1,
164 val[1]);
165 break;
166 }
167 }
168
169 if (ret < 0) {
170 dev_err(&chip->client->dev, "failed writing register\n");
171 return ret;
172 }
173
174 return 0;
175}
176
177static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
178{
179 int ret;
180
181 if (chip->gpio_chip.ngpio <= 8) {
182 ret = i2c_smbus_read_byte_data(chip->client, reg);
183 *val = ret;
184 } else if (chip->gpio_chip.ngpio >= 24) {
185 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
186
187 ret = i2c_smbus_read_i2c_block_data(chip->client,
188 (reg << bank_shift) | REG_ADDR_AI,
189 NBANK(chip), val);
190 } else {
191 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
192 val[0] = (u16)ret & 0xFF;
193 val[1] = (u16)ret >> 8;
194 }
195 if (ret < 0) {
196 dev_err(&chip->client->dev, "failed reading register\n");
197 return ret;
198 }
199
200 return 0;
201}
202
203static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
204{
205 struct pca953x_chip *chip;
206 u8 reg_val;
207 int ret, offset = 0;
208
209 chip = container_of(gc, struct pca953x_chip, gpio_chip);
210
211 mutex_lock(&chip->i2c_lock);
212 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
213
214 switch (chip->chip_type) {
215 case PCA953X_TYPE:
216 offset = PCA953X_DIRECTION;
217 break;
218 case PCA957X_TYPE:
219 offset = PCA957X_CFG;
220 break;
221 }
222 ret = pca953x_write_single(chip, offset, reg_val, off);
223 if (ret)
224 goto exit;
225
226 chip->reg_direction[off / BANK_SZ] = reg_val;
227 ret = 0;
228exit:
229 mutex_unlock(&chip->i2c_lock);
230 return ret;
231}
232
233static int pca953x_gpio_direction_output(struct gpio_chip *gc,
234 unsigned off, int val)
235{
236 struct pca953x_chip *chip;
237 u8 reg_val;
238 int ret, offset = 0;
239
240 chip = container_of(gc, struct pca953x_chip, gpio_chip);
241
242 mutex_lock(&chip->i2c_lock);
243 /* set output level */
244 if (val)
245 reg_val = chip->reg_output[off / BANK_SZ]
246 | (1u << (off % BANK_SZ));
247 else
248 reg_val = chip->reg_output[off / BANK_SZ]
249 & ~(1u << (off % BANK_SZ));
250
251 switch (chip->chip_type) {
252 case PCA953X_TYPE:
253 offset = PCA953X_OUTPUT;
254 break;
255 case PCA957X_TYPE:
256 offset = PCA957X_OUT;
257 break;
258 }
259 ret = pca953x_write_single(chip, offset, reg_val, off);
260 if (ret)
261 goto exit;
262
263 chip->reg_output[off / BANK_SZ] = reg_val;
264
265 /* then direction */
266 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
267 switch (chip->chip_type) {
268 case PCA953X_TYPE:
269 offset = PCA953X_DIRECTION;
270 break;
271 case PCA957X_TYPE:
272 offset = PCA957X_CFG;
273 break;
274 }
275 ret = pca953x_write_single(chip, offset, reg_val, off);
276 if (ret)
277 goto exit;
278
279 chip->reg_direction[off / BANK_SZ] = reg_val;
280 ret = 0;
281exit:
282 mutex_unlock(&chip->i2c_lock);
283 return ret;
284}
285
286static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
287{
288 struct pca953x_chip *chip;
289 u32 reg_val;
290 int ret, offset = 0;
291
292 chip = container_of(gc, struct pca953x_chip, gpio_chip);
293
294 mutex_lock(&chip->i2c_lock);
295 switch (chip->chip_type) {
296 case PCA953X_TYPE:
297 offset = PCA953X_INPUT;
298 break;
299 case PCA957X_TYPE:
300 offset = PCA957X_IN;
301 break;
302 }
303 ret = pca953x_read_single(chip, offset, ®_val, off);
304 mutex_unlock(&chip->i2c_lock);
305 if (ret < 0) {
306 /* NOTE: diagnostic already emitted; that's all we should
307 * do unless gpio_*_value_cansleep() calls become different
308 * from their nonsleeping siblings (and report faults).
309 */
310 return 0;
311 }
312
313 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
314}
315
316static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
317{
318 struct pca953x_chip *chip;
319 u8 reg_val;
320 int ret, offset = 0;
321
322 chip = container_of(gc, struct pca953x_chip, gpio_chip);
323
324 mutex_lock(&chip->i2c_lock);
325 if (val)
326 reg_val = chip->reg_output[off / BANK_SZ]
327 | (1u << (off % BANK_SZ));
328 else
329 reg_val = chip->reg_output[off / BANK_SZ]
330 & ~(1u << (off % BANK_SZ));
331
332 switch (chip->chip_type) {
333 case PCA953X_TYPE:
334 offset = PCA953X_OUTPUT;
335 break;
336 case PCA957X_TYPE:
337 offset = PCA957X_OUT;
338 break;
339 }
340 ret = pca953x_write_single(chip, offset, reg_val, off);
341 if (ret)
342 goto exit;
343
344 chip->reg_output[off / BANK_SZ] = reg_val;
345exit:
346 mutex_unlock(&chip->i2c_lock);
347}
348
349static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
350{
351 struct gpio_chip *gc;
352
353 gc = &chip->gpio_chip;
354
355 gc->direction_input = pca953x_gpio_direction_input;
356 gc->direction_output = pca953x_gpio_direction_output;
357 gc->get = pca953x_gpio_get_value;
358 gc->set = pca953x_gpio_set_value;
359 gc->can_sleep = true;
360
361 gc->base = chip->gpio_start;
362 gc->ngpio = gpios;
363 gc->label = chip->client->name;
364 gc->dev = &chip->client->dev;
365 gc->owner = THIS_MODULE;
366 gc->names = chip->names;
367}
368
369#ifdef CONFIG_GPIO_PCA953X_IRQ
370static int pca953x_gpio_to_irq(struct gpio_chip *gc, unsigned off)
371{
372 struct pca953x_chip *chip;
373
374 chip = container_of(gc, struct pca953x_chip, gpio_chip);
375 return irq_create_mapping(chip->domain, off);
376}
377
378static void pca953x_irq_mask(struct irq_data *d)
379{
380 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
381
382 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
383}
384
385static void pca953x_irq_unmask(struct irq_data *d)
386{
387 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
388
389 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
390}
391
392static void pca953x_irq_bus_lock(struct irq_data *d)
393{
394 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
395
396 mutex_lock(&chip->irq_lock);
397}
398
399static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
400{
401 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
402 u8 new_irqs;
403 int level, i;
404
405 /* Look for any newly setup interrupt */
406 for (i = 0; i < NBANK(chip); i++) {
407 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
408 new_irqs &= ~chip->reg_direction[i];
409
410 while (new_irqs) {
411 level = __ffs(new_irqs);
412 pca953x_gpio_direction_input(&chip->gpio_chip,
413 level + (BANK_SZ * i));
414 new_irqs &= ~(1 << level);
415 }
416 }
417
418 mutex_unlock(&chip->irq_lock);
419}
420
421static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
422{
423 struct pca953x_chip *chip = irq_data_get_irq_chip_data(d);
424 int bank_nb = d->hwirq / BANK_SZ;
425 u8 mask = 1 << (d->hwirq % BANK_SZ);
426
427 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
428 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
429 d->irq, type);
430 return -EINVAL;
431 }
432
433 if (type & IRQ_TYPE_EDGE_FALLING)
434 chip->irq_trig_fall[bank_nb] |= mask;
435 else
436 chip->irq_trig_fall[bank_nb] &= ~mask;
437
438 if (type & IRQ_TYPE_EDGE_RISING)
439 chip->irq_trig_raise[bank_nb] |= mask;
440 else
441 chip->irq_trig_raise[bank_nb] &= ~mask;
442
443 return 0;
444}
445
446static struct irq_chip pca953x_irq_chip = {
447 .name = "pca953x",
448 .irq_mask = pca953x_irq_mask,
449 .irq_unmask = pca953x_irq_unmask,
450 .irq_bus_lock = pca953x_irq_bus_lock,
451 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
452 .irq_set_type = pca953x_irq_set_type,
453};
454
455static u8 pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
456{
457 u8 cur_stat[MAX_BANK];
458 u8 old_stat[MAX_BANK];
459 u8 pendings = 0;
460 u8 trigger[MAX_BANK], triggers = 0;
461 int ret, i, offset = 0;
462
463 switch (chip->chip_type) {
464 case PCA953X_TYPE:
465 offset = PCA953X_INPUT;
466 break;
467 case PCA957X_TYPE:
468 offset = PCA957X_IN;
469 break;
470 }
471 ret = pca953x_read_regs(chip, offset, cur_stat);
472 if (ret)
473 return 0;
474
475 /* Remove output pins from the equation */
476 for (i = 0; i < NBANK(chip); i++)
477 cur_stat[i] &= chip->reg_direction[i];
478
479 memcpy(old_stat, chip->irq_stat, NBANK(chip));
480
481 for (i = 0; i < NBANK(chip); i++) {
482 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
483 triggers += trigger[i];
484 }
485
486 if (!triggers)
487 return 0;
488
489 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
490
491 for (i = 0; i < NBANK(chip); i++) {
492 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
493 (cur_stat[i] & chip->irq_trig_raise[i]);
494 pending[i] &= trigger[i];
495 pendings += pending[i];
496 }
497
498 return pendings;
499}
500
501static irqreturn_t pca953x_irq_handler(int irq, void *devid)
502{
503 struct pca953x_chip *chip = devid;
504 u8 pending[MAX_BANK];
505 u8 level;
506 int i;
507
508 if (!pca953x_irq_pending(chip, pending))
509 return IRQ_HANDLED;
510
511 for (i = 0; i < NBANK(chip); i++) {
512 while (pending[i]) {
513 level = __ffs(pending[i]);
514 handle_nested_irq(irq_find_mapping(chip->domain,
515 level + (BANK_SZ * i)));
516 pending[i] &= ~(1 << level);
517 }
518 }
519
520 return IRQ_HANDLED;
521}
522
523static int pca953x_gpio_irq_map(struct irq_domain *d, unsigned int irq,
524 irq_hw_number_t hwirq)
525{
526 irq_clear_status_flags(irq, IRQ_NOREQUEST);
527 irq_set_chip_data(irq, d->host_data);
528 irq_set_chip(irq, &pca953x_irq_chip);
529 irq_set_nested_thread(irq, true);
530#ifdef CONFIG_ARM
531 set_irq_flags(irq, IRQF_VALID);
532#else
533 irq_set_noprobe(irq);
534#endif
535
536 return 0;
537}
538
539static const struct irq_domain_ops pca953x_irq_simple_ops = {
540 .map = pca953x_gpio_irq_map,
541 .xlate = irq_domain_xlate_twocell,
542};
543
544static int pca953x_irq_setup(struct pca953x_chip *chip,
545 const struct i2c_device_id *id,
546 int irq_base)
547{
548 struct i2c_client *client = chip->client;
549 int ret, i, offset = 0;
550
551 if (irq_base != -1
552 && (id->driver_data & PCA_INT)) {
553
554 switch (chip->chip_type) {
555 case PCA953X_TYPE:
556 offset = PCA953X_INPUT;
557 break;
558 case PCA957X_TYPE:
559 offset = PCA957X_IN;
560 break;
561 }
562 ret = pca953x_read_regs(chip, offset, chip->irq_stat);
563 if (ret)
564 return ret;
565
566 /*
567 * There is no way to know which GPIO line generated the
568 * interrupt. We have to rely on the previous read for
569 * this purpose.
570 */
571 for (i = 0; i < NBANK(chip); i++)
572 chip->irq_stat[i] &= chip->reg_direction[i];
573 mutex_init(&chip->irq_lock);
574
575 chip->domain = irq_domain_add_simple(client->dev.of_node,
576 chip->gpio_chip.ngpio,
577 irq_base,
578 &pca953x_irq_simple_ops,
579 chip);
580 if (!chip->domain)
581 return -ENODEV;
582
583 ret = devm_request_threaded_irq(&client->dev,
584 client->irq,
585 NULL,
586 pca953x_irq_handler,
587 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
588 dev_name(&client->dev), chip);
589 if (ret) {
590 dev_err(&client->dev, "failed to request irq %d\n",
591 client->irq);
592 return ret;
593 }
594
595 chip->gpio_chip.to_irq = pca953x_gpio_to_irq;
596 }
597
598 return 0;
599}
600
601#else /* CONFIG_GPIO_PCA953X_IRQ */
602static int pca953x_irq_setup(struct pca953x_chip *chip,
603 const struct i2c_device_id *id,
604 int irq_base)
605{
606 struct i2c_client *client = chip->client;
607
608 if (irq_base != -1 && (id->driver_data & PCA_INT))
609 dev_warn(&client->dev, "interrupt support not compiled in\n");
610
611 return 0;
612}
613#endif
614
615/*
616 * Handlers for alternative sources of platform_data
617 */
618#ifdef CONFIG_OF_GPIO
619/*
620 * Translate OpenFirmware node properties into platform_data
621 * WARNING: This is DEPRECATED and will be removed eventually!
622 */
623static void
624pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
625{
626 struct device_node *node;
627 const __be32 *val;
628 int size;
629
630 *gpio_base = -1;
631
632 node = client->dev.of_node;
633 if (node == NULL)
634 return;
635
636 val = of_get_property(node, "linux,gpio-base", &size);
637 WARN(val, "%s: device-tree property 'linux,gpio-base' is deprecated!", __func__);
638 if (val) {
639 if (size != sizeof(*val))
640 dev_warn(&client->dev, "%s: wrong linux,gpio-base\n",
641 node->full_name);
642 else
643 *gpio_base = be32_to_cpup(val);
644 }
645
646 val = of_get_property(node, "polarity", NULL);
647 WARN(val, "%s: device-tree property 'polarity' is deprecated!", __func__);
648 if (val)
649 *invert = *val;
650}
651#else
652static void
653pca953x_get_alt_pdata(struct i2c_client *client, int *gpio_base, u32 *invert)
654{
655 *gpio_base = -1;
656}
657#endif
658
659static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
660{
661 int ret;
662 u8 val[MAX_BANK];
663
664 ret = pca953x_read_regs(chip, PCA953X_OUTPUT, chip->reg_output);
665 if (ret)
666 goto out;
667
668 ret = pca953x_read_regs(chip, PCA953X_DIRECTION,
669 chip->reg_direction);
670 if (ret)
671 goto out;
672
673 /* set platform specific polarity inversion */
674 if (invert)
675 memset(val, 0xFF, NBANK(chip));
676 else
677 memset(val, 0, NBANK(chip));
678
679 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
680out:
681 return ret;
682}
683
684static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
685{
686 int ret;
687 u8 val[MAX_BANK];
688
689 ret = pca953x_read_regs(chip, PCA957X_OUT, chip->reg_output);
690 if (ret)
691 goto out;
692 ret = pca953x_read_regs(chip, PCA957X_CFG, chip->reg_direction);
693 if (ret)
694 goto out;
695
696 /* set platform specific polarity inversion */
697 if (invert)
698 memset(val, 0xFF, NBANK(chip));
699 else
700 memset(val, 0, NBANK(chip));
701 pca953x_write_regs(chip, PCA957X_INVRT, val);
702
703 /* To enable register 6, 7 to controll pull up and pull down */
704 memset(val, 0x02, NBANK(chip));
705 pca953x_write_regs(chip, PCA957X_BKEN, val);
706
707 return 0;
708out:
709 return ret;
710}
711
712static int pca953x_probe(struct i2c_client *client,
713 const struct i2c_device_id *id)
714{
715 struct pca953x_platform_data *pdata;
716 struct pca953x_chip *chip;
717 int irq_base = 0;
718 int ret;
719 u32 invert = 0;
720
721 chip = devm_kzalloc(&client->dev,
722 sizeof(struct pca953x_chip), GFP_KERNEL);
723 if (chip == NULL)
724 return -ENOMEM;
725
726 pdata = dev_get_platdata(&client->dev);
727 if (pdata) {
728 irq_base = pdata->irq_base;
729 chip->gpio_start = pdata->gpio_base;
730 invert = pdata->invert;
731 chip->names = pdata->names;
732 } else {
733 pca953x_get_alt_pdata(client, &chip->gpio_start, &invert);
734#ifdef CONFIG_OF_GPIO
735 /* If I2C node has no interrupts property, disable GPIO interrupts */
736 if (of_find_property(client->dev.of_node, "interrupts", NULL) == NULL)
737 irq_base = -1;
738#endif
739 }
740
741 chip->client = client;
742
743 chip->chip_type = id->driver_data & (PCA953X_TYPE | PCA957X_TYPE);
744
745 mutex_init(&chip->i2c_lock);
746
747 /* initialize cached registers from their original values.
748 * we can't share this chip with another i2c master.
749 */
750 pca953x_setup_gpio(chip, id->driver_data & PCA_GPIO_MASK);
751
752 if (chip->chip_type == PCA953X_TYPE)
753 ret = device_pca953x_init(chip, invert);
754 else
755 ret = device_pca957x_init(chip, invert);
756 if (ret)
757 return ret;
758
759 ret = pca953x_irq_setup(chip, id, irq_base);
760 if (ret)
761 return ret;
762
763 ret = gpiochip_add(&chip->gpio_chip);
764 if (ret)
765 return ret;
766
767 if (pdata && pdata->setup) {
768 ret = pdata->setup(client, chip->gpio_chip.base,
769 chip->gpio_chip.ngpio, pdata->context);
770 if (ret < 0)
771 dev_warn(&client->dev, "setup failed, %d\n", ret);
772 }
773
774 i2c_set_clientdata(client, chip);
775 return 0;
776}
777
778static int pca953x_remove(struct i2c_client *client)
779{
780 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
781 struct pca953x_chip *chip = i2c_get_clientdata(client);
782 int ret = 0;
783
784 if (pdata && pdata->teardown) {
785 ret = pdata->teardown(client, chip->gpio_chip.base,
786 chip->gpio_chip.ngpio, pdata->context);
787 if (ret < 0) {
788 dev_err(&client->dev, "%s failed, %d\n",
789 "teardown", ret);
790 return ret;
791 }
792 }
793
794 ret = gpiochip_remove(&chip->gpio_chip);
795 if (ret) {
796 dev_err(&client->dev, "%s failed, %d\n",
797 "gpiochip_remove()", ret);
798 return ret;
799 }
800
801 return 0;
802}
803
804static const struct of_device_id pca953x_dt_ids[] = {
805 { .compatible = "nxp,pca9505", },
806 { .compatible = "nxp,pca9534", },
807 { .compatible = "nxp,pca9535", },
808 { .compatible = "nxp,pca9536", },
809 { .compatible = "nxp,pca9537", },
810 { .compatible = "nxp,pca9538", },
811 { .compatible = "nxp,pca9539", },
812 { .compatible = "nxp,pca9554", },
813 { .compatible = "nxp,pca9555", },
814 { .compatible = "nxp,pca9556", },
815 { .compatible = "nxp,pca9557", },
816 { .compatible = "nxp,pca9574", },
817 { .compatible = "nxp,pca9575", },
818 { .compatible = "nxp,pca9698", },
819
820 { .compatible = "maxim,max7310", },
821 { .compatible = "maxim,max7312", },
822 { .compatible = "maxim,max7313", },
823 { .compatible = "maxim,max7315", },
824
825 { .compatible = "ti,pca6107", },
826 { .compatible = "ti,tca6408", },
827 { .compatible = "ti,tca6416", },
828 { .compatible = "ti,tca6424", },
829
830 { .compatible = "exar,xra1202", },
831 { }
832};
833
834MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
835
836static struct i2c_driver pca953x_driver = {
837 .driver = {
838 .name = "pca953x",
839 .of_match_table = pca953x_dt_ids,
840 },
841 .probe = pca953x_probe,
842 .remove = pca953x_remove,
843 .id_table = pca953x_id,
844};
845
846static int __init pca953x_init(void)
847{
848 return i2c_add_driver(&pca953x_driver);
849}
850/* register after i2c postcore initcall and before
851 * subsys initcalls that may rely on these GPIOs
852 */
853subsys_initcall(pca953x_init);
854
855static void __exit pca953x_exit(void)
856{
857 i2c_del_driver(&pca953x_driver);
858}
859module_exit(pca953x_exit);
860
861MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
862MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
863MODULE_LICENSE("GPL");
1/*
2 * PCA953x 4/8/16/24/40 bit I/O ports
3 *
4 * Copyright (C) 2005 Ben Gardner <bgardner@wabtec.com>
5 * Copyright (C) 2007 Marvell International Ltd.
6 *
7 * Derived from drivers/i2c/chips/pca9539.c
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 */
13
14#include <linux/acpi.h>
15#include <linux/gpio.h>
16#include <linux/gpio/consumer.h>
17#include <linux/i2c.h>
18#include <linux/init.h>
19#include <linux/interrupt.h>
20#include <linux/module.h>
21#include <linux/of_platform.h>
22#include <linux/platform_data/pca953x.h>
23#include <linux/regulator/consumer.h>
24#include <linux/slab.h>
25
26#include <asm/unaligned.h>
27
28#define PCA953X_INPUT 0
29#define PCA953X_OUTPUT 1
30#define PCA953X_INVERT 2
31#define PCA953X_DIRECTION 3
32
33#define REG_ADDR_AI 0x80
34
35#define PCA957X_IN 0
36#define PCA957X_INVRT 1
37#define PCA957X_BKEN 2
38#define PCA957X_PUPD 3
39#define PCA957X_CFG 4
40#define PCA957X_OUT 5
41#define PCA957X_MSK 6
42#define PCA957X_INTS 7
43
44#define PCAL953X_IN_LATCH 34
45#define PCAL953X_INT_MASK 37
46#define PCAL953X_INT_STAT 38
47
48#define PCA_GPIO_MASK 0x00FF
49#define PCA_INT 0x0100
50#define PCA_PCAL 0x0200
51#define PCA953X_TYPE 0x1000
52#define PCA957X_TYPE 0x2000
53#define PCA_TYPE_MASK 0xF000
54
55#define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
56
57static const struct i2c_device_id pca953x_id[] = {
58 { "pca9505", 40 | PCA953X_TYPE | PCA_INT, },
59 { "pca9534", 8 | PCA953X_TYPE | PCA_INT, },
60 { "pca9535", 16 | PCA953X_TYPE | PCA_INT, },
61 { "pca9536", 4 | PCA953X_TYPE, },
62 { "pca9537", 4 | PCA953X_TYPE | PCA_INT, },
63 { "pca9538", 8 | PCA953X_TYPE | PCA_INT, },
64 { "pca9539", 16 | PCA953X_TYPE | PCA_INT, },
65 { "pca9554", 8 | PCA953X_TYPE | PCA_INT, },
66 { "pca9555", 16 | PCA953X_TYPE | PCA_INT, },
67 { "pca9556", 8 | PCA953X_TYPE, },
68 { "pca9557", 8 | PCA953X_TYPE, },
69 { "pca9574", 8 | PCA957X_TYPE | PCA_INT, },
70 { "pca9575", 16 | PCA957X_TYPE | PCA_INT, },
71 { "pca9698", 40 | PCA953X_TYPE, },
72
73 { "pcal6524", 24 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
74 { "pcal9555a", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
75
76 { "max7310", 8 | PCA953X_TYPE, },
77 { "max7312", 16 | PCA953X_TYPE | PCA_INT, },
78 { "max7313", 16 | PCA953X_TYPE | PCA_INT, },
79 { "max7315", 8 | PCA953X_TYPE | PCA_INT, },
80 { "max7318", 16 | PCA953X_TYPE | PCA_INT, },
81 { "pca6107", 8 | PCA953X_TYPE | PCA_INT, },
82 { "tca6408", 8 | PCA953X_TYPE | PCA_INT, },
83 { "tca6416", 16 | PCA953X_TYPE | PCA_INT, },
84 { "tca6424", 24 | PCA953X_TYPE | PCA_INT, },
85 { "tca9539", 16 | PCA953X_TYPE | PCA_INT, },
86 { "tca9554", 8 | PCA953X_TYPE | PCA_INT, },
87 { "xra1202", 8 | PCA953X_TYPE },
88 { }
89};
90MODULE_DEVICE_TABLE(i2c, pca953x_id);
91
92static const struct acpi_device_id pca953x_acpi_ids[] = {
93 { "INT3491", 16 | PCA953X_TYPE | PCA_INT | PCA_PCAL, },
94 { }
95};
96MODULE_DEVICE_TABLE(acpi, pca953x_acpi_ids);
97
98#define MAX_BANK 5
99#define BANK_SZ 8
100
101#define NBANK(chip) DIV_ROUND_UP(chip->gpio_chip.ngpio, BANK_SZ)
102
103struct pca953x_reg_config {
104 int direction;
105 int output;
106 int input;
107};
108
109static const struct pca953x_reg_config pca953x_regs = {
110 .direction = PCA953X_DIRECTION,
111 .output = PCA953X_OUTPUT,
112 .input = PCA953X_INPUT,
113};
114
115static const struct pca953x_reg_config pca957x_regs = {
116 .direction = PCA957X_CFG,
117 .output = PCA957X_OUT,
118 .input = PCA957X_IN,
119};
120
121struct pca953x_chip {
122 unsigned gpio_start;
123 u8 reg_output[MAX_BANK];
124 u8 reg_direction[MAX_BANK];
125 struct mutex i2c_lock;
126
127#ifdef CONFIG_GPIO_PCA953X_IRQ
128 struct mutex irq_lock;
129 u8 irq_mask[MAX_BANK];
130 u8 irq_stat[MAX_BANK];
131 u8 irq_trig_raise[MAX_BANK];
132 u8 irq_trig_fall[MAX_BANK];
133#endif
134
135 struct i2c_client *client;
136 struct gpio_chip gpio_chip;
137 const char *const *names;
138 unsigned long driver_data;
139 struct regulator *regulator;
140
141 const struct pca953x_reg_config *regs;
142
143 int (*write_regs)(struct pca953x_chip *, int, u8 *);
144 int (*read_regs)(struct pca953x_chip *, int, u8 *);
145};
146
147static int pca953x_read_single(struct pca953x_chip *chip, int reg, u32 *val,
148 int off)
149{
150 int ret;
151 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
152 int offset = off / BANK_SZ;
153
154 ret = i2c_smbus_read_byte_data(chip->client,
155 (reg << bank_shift) + offset);
156 *val = ret;
157
158 if (ret < 0) {
159 dev_err(&chip->client->dev, "failed reading register\n");
160 return ret;
161 }
162
163 return 0;
164}
165
166static int pca953x_write_single(struct pca953x_chip *chip, int reg, u32 val,
167 int off)
168{
169 int ret;
170 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
171 int offset = off / BANK_SZ;
172
173 ret = i2c_smbus_write_byte_data(chip->client,
174 (reg << bank_shift) + offset, val);
175
176 if (ret < 0) {
177 dev_err(&chip->client->dev, "failed writing register\n");
178 return ret;
179 }
180
181 return 0;
182}
183
184static int pca953x_write_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
185{
186 return i2c_smbus_write_byte_data(chip->client, reg, *val);
187}
188
189static int pca953x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
190{
191 u16 word = get_unaligned((u16 *)val);
192
193 return i2c_smbus_write_word_data(chip->client, reg << 1, word);
194}
195
196static int pca957x_write_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
197{
198 int ret;
199
200 ret = i2c_smbus_write_byte_data(chip->client, reg << 1, val[0]);
201 if (ret < 0)
202 return ret;
203
204 return i2c_smbus_write_byte_data(chip->client, (reg << 1) + 1, val[1]);
205}
206
207static int pca953x_write_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
208{
209 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
210
211 return i2c_smbus_write_i2c_block_data(chip->client,
212 (reg << bank_shift) | REG_ADDR_AI,
213 NBANK(chip), val);
214}
215
216static int pca953x_write_regs(struct pca953x_chip *chip, int reg, u8 *val)
217{
218 int ret = 0;
219
220 ret = chip->write_regs(chip, reg, val);
221 if (ret < 0) {
222 dev_err(&chip->client->dev, "failed writing register\n");
223 return ret;
224 }
225
226 return 0;
227}
228
229static int pca953x_read_regs_8(struct pca953x_chip *chip, int reg, u8 *val)
230{
231 int ret;
232
233 ret = i2c_smbus_read_byte_data(chip->client, reg);
234 *val = ret;
235
236 return ret;
237}
238
239static int pca953x_read_regs_16(struct pca953x_chip *chip, int reg, u8 *val)
240{
241 int ret;
242
243 ret = i2c_smbus_read_word_data(chip->client, reg << 1);
244 put_unaligned(ret, (u16 *)val);
245
246 return ret;
247}
248
249static int pca953x_read_regs_24(struct pca953x_chip *chip, int reg, u8 *val)
250{
251 int bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
252
253 return i2c_smbus_read_i2c_block_data(chip->client,
254 (reg << bank_shift) | REG_ADDR_AI,
255 NBANK(chip), val);
256}
257
258static int pca953x_read_regs(struct pca953x_chip *chip, int reg, u8 *val)
259{
260 int ret;
261
262 ret = chip->read_regs(chip, reg, val);
263 if (ret < 0) {
264 dev_err(&chip->client->dev, "failed reading register\n");
265 return ret;
266 }
267
268 return 0;
269}
270
271static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off)
272{
273 struct pca953x_chip *chip = gpiochip_get_data(gc);
274 u8 reg_val;
275 int ret;
276
277 mutex_lock(&chip->i2c_lock);
278 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ));
279
280 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
281 if (ret)
282 goto exit;
283
284 chip->reg_direction[off / BANK_SZ] = reg_val;
285exit:
286 mutex_unlock(&chip->i2c_lock);
287 return ret;
288}
289
290static int pca953x_gpio_direction_output(struct gpio_chip *gc,
291 unsigned off, int val)
292{
293 struct pca953x_chip *chip = gpiochip_get_data(gc);
294 u8 reg_val;
295 int ret;
296
297 mutex_lock(&chip->i2c_lock);
298 /* set output level */
299 if (val)
300 reg_val = chip->reg_output[off / BANK_SZ]
301 | (1u << (off % BANK_SZ));
302 else
303 reg_val = chip->reg_output[off / BANK_SZ]
304 & ~(1u << (off % BANK_SZ));
305
306 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
307 if (ret)
308 goto exit;
309
310 chip->reg_output[off / BANK_SZ] = reg_val;
311
312 /* then direction */
313 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ));
314 ret = pca953x_write_single(chip, chip->regs->direction, reg_val, off);
315 if (ret)
316 goto exit;
317
318 chip->reg_direction[off / BANK_SZ] = reg_val;
319exit:
320 mutex_unlock(&chip->i2c_lock);
321 return ret;
322}
323
324static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off)
325{
326 struct pca953x_chip *chip = gpiochip_get_data(gc);
327 u32 reg_val;
328 int ret;
329
330 mutex_lock(&chip->i2c_lock);
331 ret = pca953x_read_single(chip, chip->regs->input, ®_val, off);
332 mutex_unlock(&chip->i2c_lock);
333 if (ret < 0) {
334 /* NOTE: diagnostic already emitted; that's all we should
335 * do unless gpio_*_value_cansleep() calls become different
336 * from their nonsleeping siblings (and report faults).
337 */
338 return 0;
339 }
340
341 return (reg_val & (1u << (off % BANK_SZ))) ? 1 : 0;
342}
343
344static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val)
345{
346 struct pca953x_chip *chip = gpiochip_get_data(gc);
347 u8 reg_val;
348 int ret;
349
350 mutex_lock(&chip->i2c_lock);
351 if (val)
352 reg_val = chip->reg_output[off / BANK_SZ]
353 | (1u << (off % BANK_SZ));
354 else
355 reg_val = chip->reg_output[off / BANK_SZ]
356 & ~(1u << (off % BANK_SZ));
357
358 ret = pca953x_write_single(chip, chip->regs->output, reg_val, off);
359 if (ret)
360 goto exit;
361
362 chip->reg_output[off / BANK_SZ] = reg_val;
363exit:
364 mutex_unlock(&chip->i2c_lock);
365}
366
367static int pca953x_gpio_get_direction(struct gpio_chip *gc, unsigned off)
368{
369 struct pca953x_chip *chip = gpiochip_get_data(gc);
370 u32 reg_val;
371 int ret;
372
373 mutex_lock(&chip->i2c_lock);
374 ret = pca953x_read_single(chip, chip->regs->direction, ®_val, off);
375 mutex_unlock(&chip->i2c_lock);
376 if (ret < 0)
377 return ret;
378
379 return !!(reg_val & (1u << (off % BANK_SZ)));
380}
381
382static void pca953x_gpio_set_multiple(struct gpio_chip *gc,
383 unsigned long *mask, unsigned long *bits)
384{
385 struct pca953x_chip *chip = gpiochip_get_data(gc);
386 unsigned int bank_mask, bank_val;
387 int bank_shift, bank;
388 u8 reg_val[MAX_BANK];
389 int ret;
390
391 bank_shift = fls((chip->gpio_chip.ngpio - 1) / BANK_SZ);
392
393 mutex_lock(&chip->i2c_lock);
394 memcpy(reg_val, chip->reg_output, NBANK(chip));
395 for (bank = 0; bank < NBANK(chip); bank++) {
396 bank_mask = mask[bank / sizeof(*mask)] >>
397 ((bank % sizeof(*mask)) * 8);
398 if (bank_mask) {
399 bank_val = bits[bank / sizeof(*bits)] >>
400 ((bank % sizeof(*bits)) * 8);
401 bank_val &= bank_mask;
402 reg_val[bank] = (reg_val[bank] & ~bank_mask) | bank_val;
403 }
404 }
405
406 ret = i2c_smbus_write_i2c_block_data(chip->client,
407 chip->regs->output << bank_shift,
408 NBANK(chip), reg_val);
409 if (ret)
410 goto exit;
411
412 memcpy(chip->reg_output, reg_val, NBANK(chip));
413exit:
414 mutex_unlock(&chip->i2c_lock);
415}
416
417static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios)
418{
419 struct gpio_chip *gc;
420
421 gc = &chip->gpio_chip;
422
423 gc->direction_input = pca953x_gpio_direction_input;
424 gc->direction_output = pca953x_gpio_direction_output;
425 gc->get = pca953x_gpio_get_value;
426 gc->set = pca953x_gpio_set_value;
427 gc->get_direction = pca953x_gpio_get_direction;
428 gc->set_multiple = pca953x_gpio_set_multiple;
429 gc->can_sleep = true;
430
431 gc->base = chip->gpio_start;
432 gc->ngpio = gpios;
433 gc->label = chip->client->name;
434 gc->parent = &chip->client->dev;
435 gc->owner = THIS_MODULE;
436 gc->names = chip->names;
437}
438
439#ifdef CONFIG_GPIO_PCA953X_IRQ
440static void pca953x_irq_mask(struct irq_data *d)
441{
442 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
443 struct pca953x_chip *chip = gpiochip_get_data(gc);
444
445 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ));
446}
447
448static void pca953x_irq_unmask(struct irq_data *d)
449{
450 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
451 struct pca953x_chip *chip = gpiochip_get_data(gc);
452
453 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ);
454}
455
456static void pca953x_irq_bus_lock(struct irq_data *d)
457{
458 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
459 struct pca953x_chip *chip = gpiochip_get_data(gc);
460
461 mutex_lock(&chip->irq_lock);
462}
463
464static void pca953x_irq_bus_sync_unlock(struct irq_data *d)
465{
466 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
467 struct pca953x_chip *chip = gpiochip_get_data(gc);
468 u8 new_irqs;
469 int level, i;
470 u8 invert_irq_mask[MAX_BANK];
471
472 if (chip->driver_data & PCA_PCAL) {
473 /* Enable latch on interrupt-enabled inputs */
474 pca953x_write_regs(chip, PCAL953X_IN_LATCH, chip->irq_mask);
475
476 for (i = 0; i < NBANK(chip); i++)
477 invert_irq_mask[i] = ~chip->irq_mask[i];
478
479 /* Unmask enabled interrupts */
480 pca953x_write_regs(chip, PCAL953X_INT_MASK, invert_irq_mask);
481 }
482
483 /* Look for any newly setup interrupt */
484 for (i = 0; i < NBANK(chip); i++) {
485 new_irqs = chip->irq_trig_fall[i] | chip->irq_trig_raise[i];
486 new_irqs &= ~chip->reg_direction[i];
487
488 while (new_irqs) {
489 level = __ffs(new_irqs);
490 pca953x_gpio_direction_input(&chip->gpio_chip,
491 level + (BANK_SZ * i));
492 new_irqs &= ~(1 << level);
493 }
494 }
495
496 mutex_unlock(&chip->irq_lock);
497}
498
499static int pca953x_irq_set_type(struct irq_data *d, unsigned int type)
500{
501 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
502 struct pca953x_chip *chip = gpiochip_get_data(gc);
503 int bank_nb = d->hwirq / BANK_SZ;
504 u8 mask = 1 << (d->hwirq % BANK_SZ);
505
506 if (!(type & IRQ_TYPE_EDGE_BOTH)) {
507 dev_err(&chip->client->dev, "irq %d: unsupported type %d\n",
508 d->irq, type);
509 return -EINVAL;
510 }
511
512 if (type & IRQ_TYPE_EDGE_FALLING)
513 chip->irq_trig_fall[bank_nb] |= mask;
514 else
515 chip->irq_trig_fall[bank_nb] &= ~mask;
516
517 if (type & IRQ_TYPE_EDGE_RISING)
518 chip->irq_trig_raise[bank_nb] |= mask;
519 else
520 chip->irq_trig_raise[bank_nb] &= ~mask;
521
522 return 0;
523}
524
525static struct irq_chip pca953x_irq_chip = {
526 .name = "pca953x",
527 .irq_mask = pca953x_irq_mask,
528 .irq_unmask = pca953x_irq_unmask,
529 .irq_bus_lock = pca953x_irq_bus_lock,
530 .irq_bus_sync_unlock = pca953x_irq_bus_sync_unlock,
531 .irq_set_type = pca953x_irq_set_type,
532};
533
534static bool pca953x_irq_pending(struct pca953x_chip *chip, u8 *pending)
535{
536 u8 cur_stat[MAX_BANK];
537 u8 old_stat[MAX_BANK];
538 bool pending_seen = false;
539 bool trigger_seen = false;
540 u8 trigger[MAX_BANK];
541 int ret, i;
542
543 if (chip->driver_data & PCA_PCAL) {
544 /* Read the current interrupt status from the device */
545 ret = pca953x_read_regs(chip, PCAL953X_INT_STAT, trigger);
546 if (ret)
547 return false;
548
549 /* Check latched inputs and clear interrupt status */
550 ret = pca953x_read_regs(chip, PCA953X_INPUT, cur_stat);
551 if (ret)
552 return false;
553
554 for (i = 0; i < NBANK(chip); i++) {
555 /* Apply filter for rising/falling edge selection */
556 pending[i] = (~cur_stat[i] & chip->irq_trig_fall[i]) |
557 (cur_stat[i] & chip->irq_trig_raise[i]);
558 pending[i] &= trigger[i];
559 if (pending[i])
560 pending_seen = true;
561 }
562
563 return pending_seen;
564 }
565
566 ret = pca953x_read_regs(chip, chip->regs->input, cur_stat);
567 if (ret)
568 return false;
569
570 /* Remove output pins from the equation */
571 for (i = 0; i < NBANK(chip); i++)
572 cur_stat[i] &= chip->reg_direction[i];
573
574 memcpy(old_stat, chip->irq_stat, NBANK(chip));
575
576 for (i = 0; i < NBANK(chip); i++) {
577 trigger[i] = (cur_stat[i] ^ old_stat[i]) & chip->irq_mask[i];
578 if (trigger[i])
579 trigger_seen = true;
580 }
581
582 if (!trigger_seen)
583 return false;
584
585 memcpy(chip->irq_stat, cur_stat, NBANK(chip));
586
587 for (i = 0; i < NBANK(chip); i++) {
588 pending[i] = (old_stat[i] & chip->irq_trig_fall[i]) |
589 (cur_stat[i] & chip->irq_trig_raise[i]);
590 pending[i] &= trigger[i];
591 if (pending[i])
592 pending_seen = true;
593 }
594
595 return pending_seen;
596}
597
598static irqreturn_t pca953x_irq_handler(int irq, void *devid)
599{
600 struct pca953x_chip *chip = devid;
601 u8 pending[MAX_BANK];
602 u8 level;
603 unsigned nhandled = 0;
604 int i;
605
606 if (!pca953x_irq_pending(chip, pending))
607 return IRQ_NONE;
608
609 for (i = 0; i < NBANK(chip); i++) {
610 while (pending[i]) {
611 level = __ffs(pending[i]);
612 handle_nested_irq(irq_find_mapping(chip->gpio_chip.irq.domain,
613 level + (BANK_SZ * i)));
614 pending[i] &= ~(1 << level);
615 nhandled++;
616 }
617 }
618
619 return (nhandled > 0) ? IRQ_HANDLED : IRQ_NONE;
620}
621
622static int pca953x_irq_setup(struct pca953x_chip *chip,
623 int irq_base)
624{
625 struct i2c_client *client = chip->client;
626 int ret, i;
627
628 if (client->irq && irq_base != -1
629 && (chip->driver_data & PCA_INT)) {
630 ret = pca953x_read_regs(chip,
631 chip->regs->input, chip->irq_stat);
632 if (ret)
633 return ret;
634
635 /*
636 * There is no way to know which GPIO line generated the
637 * interrupt. We have to rely on the previous read for
638 * this purpose.
639 */
640 for (i = 0; i < NBANK(chip); i++)
641 chip->irq_stat[i] &= chip->reg_direction[i];
642 mutex_init(&chip->irq_lock);
643
644 ret = devm_request_threaded_irq(&client->dev,
645 client->irq,
646 NULL,
647 pca953x_irq_handler,
648 IRQF_TRIGGER_LOW | IRQF_ONESHOT |
649 IRQF_SHARED,
650 dev_name(&client->dev), chip);
651 if (ret) {
652 dev_err(&client->dev, "failed to request irq %d\n",
653 client->irq);
654 return ret;
655 }
656
657 ret = gpiochip_irqchip_add_nested(&chip->gpio_chip,
658 &pca953x_irq_chip,
659 irq_base,
660 handle_simple_irq,
661 IRQ_TYPE_NONE);
662 if (ret) {
663 dev_err(&client->dev,
664 "could not connect irqchip to gpiochip\n");
665 return ret;
666 }
667
668 gpiochip_set_nested_irqchip(&chip->gpio_chip,
669 &pca953x_irq_chip,
670 client->irq);
671 }
672
673 return 0;
674}
675
676#else /* CONFIG_GPIO_PCA953X_IRQ */
677static int pca953x_irq_setup(struct pca953x_chip *chip,
678 int irq_base)
679{
680 struct i2c_client *client = chip->client;
681
682 if (irq_base != -1 && (chip->driver_data & PCA_INT))
683 dev_warn(&client->dev, "interrupt support not compiled in\n");
684
685 return 0;
686}
687#endif
688
689static int device_pca953x_init(struct pca953x_chip *chip, u32 invert)
690{
691 int ret;
692 u8 val[MAX_BANK];
693
694 chip->regs = &pca953x_regs;
695
696 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
697 if (ret)
698 goto out;
699
700 ret = pca953x_read_regs(chip, chip->regs->direction,
701 chip->reg_direction);
702 if (ret)
703 goto out;
704
705 /* set platform specific polarity inversion */
706 if (invert)
707 memset(val, 0xFF, NBANK(chip));
708 else
709 memset(val, 0, NBANK(chip));
710
711 ret = pca953x_write_regs(chip, PCA953X_INVERT, val);
712out:
713 return ret;
714}
715
716static int device_pca957x_init(struct pca953x_chip *chip, u32 invert)
717{
718 int ret;
719 u8 val[MAX_BANK];
720
721 chip->regs = &pca957x_regs;
722
723 ret = pca953x_read_regs(chip, chip->regs->output, chip->reg_output);
724 if (ret)
725 goto out;
726 ret = pca953x_read_regs(chip, chip->regs->direction,
727 chip->reg_direction);
728 if (ret)
729 goto out;
730
731 /* set platform specific polarity inversion */
732 if (invert)
733 memset(val, 0xFF, NBANK(chip));
734 else
735 memset(val, 0, NBANK(chip));
736 ret = pca953x_write_regs(chip, PCA957X_INVRT, val);
737 if (ret)
738 goto out;
739
740 /* To enable register 6, 7 to control pull up and pull down */
741 memset(val, 0x02, NBANK(chip));
742 ret = pca953x_write_regs(chip, PCA957X_BKEN, val);
743 if (ret)
744 goto out;
745
746 return 0;
747out:
748 return ret;
749}
750
751static const struct of_device_id pca953x_dt_ids[];
752
753static int pca953x_probe(struct i2c_client *client,
754 const struct i2c_device_id *i2c_id)
755{
756 struct pca953x_platform_data *pdata;
757 struct pca953x_chip *chip;
758 int irq_base = 0;
759 int ret;
760 u32 invert = 0;
761 struct regulator *reg;
762
763 chip = devm_kzalloc(&client->dev,
764 sizeof(struct pca953x_chip), GFP_KERNEL);
765 if (chip == NULL)
766 return -ENOMEM;
767
768 pdata = dev_get_platdata(&client->dev);
769 if (pdata) {
770 irq_base = pdata->irq_base;
771 chip->gpio_start = pdata->gpio_base;
772 invert = pdata->invert;
773 chip->names = pdata->names;
774 } else {
775 struct gpio_desc *reset_gpio;
776
777 chip->gpio_start = -1;
778 irq_base = 0;
779
780 /*
781 * See if we need to de-assert a reset pin.
782 *
783 * There is no known ACPI-enabled platforms that are
784 * using "reset" GPIO. Otherwise any of those platform
785 * must use _DSD method with corresponding property.
786 */
787 reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
788 GPIOD_OUT_LOW);
789 if (IS_ERR(reset_gpio))
790 return PTR_ERR(reset_gpio);
791 }
792
793 chip->client = client;
794
795 reg = devm_regulator_get(&client->dev, "vcc");
796 if (IS_ERR(reg)) {
797 ret = PTR_ERR(reg);
798 if (ret != -EPROBE_DEFER)
799 dev_err(&client->dev, "reg get err: %d\n", ret);
800 return ret;
801 }
802 ret = regulator_enable(reg);
803 if (ret) {
804 dev_err(&client->dev, "reg en err: %d\n", ret);
805 return ret;
806 }
807 chip->regulator = reg;
808
809 if (i2c_id) {
810 chip->driver_data = i2c_id->driver_data;
811 } else {
812 const struct acpi_device_id *acpi_id;
813 const struct of_device_id *match;
814
815 match = of_match_device(pca953x_dt_ids, &client->dev);
816 if (match) {
817 chip->driver_data = (int)(uintptr_t)match->data;
818 } else {
819 acpi_id = acpi_match_device(pca953x_acpi_ids, &client->dev);
820 if (!acpi_id) {
821 ret = -ENODEV;
822 goto err_exit;
823 }
824
825 chip->driver_data = acpi_id->driver_data;
826 }
827 }
828
829 mutex_init(&chip->i2c_lock);
830 /*
831 * In case we have an i2c-mux controlled by a GPIO provided by an
832 * expander using the same driver higher on the device tree, read the
833 * i2c adapter nesting depth and use the retrieved value as lockdep
834 * subclass for chip->i2c_lock.
835 *
836 * REVISIT: This solution is not complete. It protects us from lockdep
837 * false positives when the expander controlling the i2c-mux is on
838 * a different level on the device tree, but not when it's on the same
839 * level on a different branch (in which case the subclass number
840 * would be the same).
841 *
842 * TODO: Once a correct solution is developed, a similar fix should be
843 * applied to all other i2c-controlled GPIO expanders (and potentially
844 * regmap-i2c).
845 */
846 lockdep_set_subclass(&chip->i2c_lock,
847 i2c_adapter_depth(client->adapter));
848
849 /* initialize cached registers from their original values.
850 * we can't share this chip with another i2c master.
851 */
852 pca953x_setup_gpio(chip, chip->driver_data & PCA_GPIO_MASK);
853
854 if (chip->gpio_chip.ngpio <= 8) {
855 chip->write_regs = pca953x_write_regs_8;
856 chip->read_regs = pca953x_read_regs_8;
857 } else if (chip->gpio_chip.ngpio >= 24) {
858 chip->write_regs = pca953x_write_regs_24;
859 chip->read_regs = pca953x_read_regs_24;
860 } else {
861 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
862 chip->write_regs = pca953x_write_regs_16;
863 else
864 chip->write_regs = pca957x_write_regs_16;
865 chip->read_regs = pca953x_read_regs_16;
866 }
867
868 if (PCA_CHIP_TYPE(chip->driver_data) == PCA953X_TYPE)
869 ret = device_pca953x_init(chip, invert);
870 else
871 ret = device_pca957x_init(chip, invert);
872 if (ret)
873 goto err_exit;
874
875 ret = devm_gpiochip_add_data(&client->dev, &chip->gpio_chip, chip);
876 if (ret)
877 goto err_exit;
878
879 ret = pca953x_irq_setup(chip, irq_base);
880 if (ret)
881 goto err_exit;
882
883 if (pdata && pdata->setup) {
884 ret = pdata->setup(client, chip->gpio_chip.base,
885 chip->gpio_chip.ngpio, pdata->context);
886 if (ret < 0)
887 dev_warn(&client->dev, "setup failed, %d\n", ret);
888 }
889
890 i2c_set_clientdata(client, chip);
891 return 0;
892
893err_exit:
894 regulator_disable(chip->regulator);
895 return ret;
896}
897
898static int pca953x_remove(struct i2c_client *client)
899{
900 struct pca953x_platform_data *pdata = dev_get_platdata(&client->dev);
901 struct pca953x_chip *chip = i2c_get_clientdata(client);
902 int ret;
903
904 if (pdata && pdata->teardown) {
905 ret = pdata->teardown(client, chip->gpio_chip.base,
906 chip->gpio_chip.ngpio, pdata->context);
907 if (ret < 0)
908 dev_err(&client->dev, "%s failed, %d\n",
909 "teardown", ret);
910 } else {
911 ret = 0;
912 }
913
914 regulator_disable(chip->regulator);
915
916 return ret;
917}
918
919/* convenience to stop overlong match-table lines */
920#define OF_953X(__nrgpio, __int) (void *)(__nrgpio | PCA953X_TYPE | __int)
921#define OF_957X(__nrgpio, __int) (void *)(__nrgpio | PCA957X_TYPE | __int)
922
923static const struct of_device_id pca953x_dt_ids[] = {
924 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
925 { .compatible = "nxp,pca9534", .data = OF_953X( 8, PCA_INT), },
926 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
927 { .compatible = "nxp,pca9536", .data = OF_953X( 4, 0), },
928 { .compatible = "nxp,pca9537", .data = OF_953X( 4, PCA_INT), },
929 { .compatible = "nxp,pca9538", .data = OF_953X( 8, PCA_INT), },
930 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
931 { .compatible = "nxp,pca9554", .data = OF_953X( 8, PCA_INT), },
932 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
933 { .compatible = "nxp,pca9556", .data = OF_953X( 8, 0), },
934 { .compatible = "nxp,pca9557", .data = OF_953X( 8, 0), },
935 { .compatible = "nxp,pca9574", .data = OF_957X( 8, PCA_INT), },
936 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
937 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
938
939 { .compatible = "nxp,pcal6524", .data = OF_953X(24, PCA_INT), },
940 { .compatible = "nxp,pcal9555a", .data = OF_953X(16, PCA_INT), },
941
942 { .compatible = "maxim,max7310", .data = OF_953X( 8, 0), },
943 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
944 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
945 { .compatible = "maxim,max7315", .data = OF_953X( 8, PCA_INT), },
946 { .compatible = "maxim,max7318", .data = OF_953X(16, PCA_INT), },
947
948 { .compatible = "ti,pca6107", .data = OF_953X( 8, PCA_INT), },
949 { .compatible = "ti,pca9536", .data = OF_953X( 4, 0), },
950 { .compatible = "ti,tca6408", .data = OF_953X( 8, PCA_INT), },
951 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
952 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
953
954 { .compatible = "onnn,pca9654", .data = OF_953X( 8, PCA_INT), },
955
956 { .compatible = "exar,xra1202", .data = OF_953X( 8, 0), },
957 { }
958};
959
960MODULE_DEVICE_TABLE(of, pca953x_dt_ids);
961
962static struct i2c_driver pca953x_driver = {
963 .driver = {
964 .name = "pca953x",
965 .of_match_table = pca953x_dt_ids,
966 .acpi_match_table = ACPI_PTR(pca953x_acpi_ids),
967 },
968 .probe = pca953x_probe,
969 .remove = pca953x_remove,
970 .id_table = pca953x_id,
971};
972
973static int __init pca953x_init(void)
974{
975 return i2c_add_driver(&pca953x_driver);
976}
977/* register after i2c postcore initcall and before
978 * subsys initcalls that may rely on these GPIOs
979 */
980subsys_initcall(pca953x_init);
981
982static void __exit pca953x_exit(void)
983{
984 i2c_del_driver(&pca953x_driver);
985}
986module_exit(pca953x_exit);
987
988MODULE_AUTHOR("eric miao <eric.miao@marvell.com>");
989MODULE_DESCRIPTION("GPIO expander driver for PCA953x");
990MODULE_LICENSE("GPL");