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1/*
2 * Register map access API - MMIO support
3 *
4 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19#include <linux/clk.h>
20#include <linux/err.h>
21#include <linux/io.h>
22#include <linux/module.h>
23#include <linux/regmap.h>
24#include <linux/slab.h>
25
26struct regmap_mmio_context {
27 void __iomem *regs;
28 unsigned reg_bytes;
29 unsigned val_bytes;
30 unsigned pad_bytes;
31 struct clk *clk;
32};
33
34static inline void regmap_mmio_regsize_check(size_t reg_size)
35{
36 switch (reg_size) {
37 case 1:
38 case 2:
39 case 4:
40#ifdef CONFIG_64BIT
41 case 8:
42#endif
43 break;
44 default:
45 BUG();
46 }
47}
48
49static int regmap_mmio_regbits_check(size_t reg_bits)
50{
51 switch (reg_bits) {
52 case 8:
53 case 16:
54 case 32:
55#ifdef CONFIG_64BIT
56 case 64:
57#endif
58 return 0;
59 default:
60 return -EINVAL;
61 }
62}
63
64static inline void regmap_mmio_count_check(size_t count)
65{
66 BUG_ON(count % 2 != 0);
67}
68
69static int regmap_mmio_gather_write(void *context,
70 const void *reg, size_t reg_size,
71 const void *val, size_t val_size)
72{
73 struct regmap_mmio_context *ctx = context;
74 u32 offset;
75 int ret;
76
77 regmap_mmio_regsize_check(reg_size);
78
79 if (!IS_ERR(ctx->clk)) {
80 ret = clk_enable(ctx->clk);
81 if (ret < 0)
82 return ret;
83 }
84
85 offset = *(u32 *)reg;
86
87 while (val_size) {
88 switch (ctx->val_bytes) {
89 case 1:
90 writeb(*(u8 *)val, ctx->regs + offset);
91 break;
92 case 2:
93 writew(*(u16 *)val, ctx->regs + offset);
94 break;
95 case 4:
96 writel(*(u32 *)val, ctx->regs + offset);
97 break;
98#ifdef CONFIG_64BIT
99 case 8:
100 writeq(*(u64 *)val, ctx->regs + offset);
101 break;
102#endif
103 default:
104 /* Should be caught by regmap_mmio_check_config */
105 BUG();
106 }
107 val_size -= ctx->val_bytes;
108 val += ctx->val_bytes;
109 offset += ctx->val_bytes;
110 }
111
112 if (!IS_ERR(ctx->clk))
113 clk_disable(ctx->clk);
114
115 return 0;
116}
117
118static int regmap_mmio_write(void *context, const void *data, size_t count)
119{
120 struct regmap_mmio_context *ctx = context;
121 u32 offset = ctx->reg_bytes + ctx->pad_bytes;
122
123 regmap_mmio_count_check(count);
124
125 return regmap_mmio_gather_write(context, data, ctx->reg_bytes,
126 data + offset, count - offset);
127}
128
129static int regmap_mmio_read(void *context,
130 const void *reg, size_t reg_size,
131 void *val, size_t val_size)
132{
133 struct regmap_mmio_context *ctx = context;
134 u32 offset;
135 int ret;
136
137 regmap_mmio_regsize_check(reg_size);
138
139 if (!IS_ERR(ctx->clk)) {
140 ret = clk_enable(ctx->clk);
141 if (ret < 0)
142 return ret;
143 }
144
145 offset = *(u32 *)reg;
146
147 while (val_size) {
148 switch (ctx->val_bytes) {
149 case 1:
150 *(u8 *)val = readb(ctx->regs + offset);
151 break;
152 case 2:
153 *(u16 *)val = readw(ctx->regs + offset);
154 break;
155 case 4:
156 *(u32 *)val = readl(ctx->regs + offset);
157 break;
158#ifdef CONFIG_64BIT
159 case 8:
160 *(u64 *)val = readq(ctx->regs + offset);
161 break;
162#endif
163 default:
164 /* Should be caught by regmap_mmio_check_config */
165 BUG();
166 }
167 val_size -= ctx->val_bytes;
168 val += ctx->val_bytes;
169 offset += ctx->val_bytes;
170 }
171
172 if (!IS_ERR(ctx->clk))
173 clk_disable(ctx->clk);
174
175 return 0;
176}
177
178static void regmap_mmio_free_context(void *context)
179{
180 struct regmap_mmio_context *ctx = context;
181
182 if (!IS_ERR(ctx->clk)) {
183 clk_unprepare(ctx->clk);
184 clk_put(ctx->clk);
185 }
186 kfree(context);
187}
188
189static struct regmap_bus regmap_mmio = {
190 .fast_io = true,
191 .write = regmap_mmio_write,
192 .gather_write = regmap_mmio_gather_write,
193 .read = regmap_mmio_read,
194 .free_context = regmap_mmio_free_context,
195 .reg_format_endian_default = REGMAP_ENDIAN_NATIVE,
196 .val_format_endian_default = REGMAP_ENDIAN_NATIVE,
197};
198
199static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
200 const char *clk_id,
201 void __iomem *regs,
202 const struct regmap_config *config)
203{
204 struct regmap_mmio_context *ctx;
205 int min_stride;
206 int ret;
207
208 ret = regmap_mmio_regbits_check(config->reg_bits);
209 if (ret)
210 return ERR_PTR(ret);
211
212 if (config->pad_bits)
213 return ERR_PTR(-EINVAL);
214
215 switch (config->val_bits) {
216 case 8:
217 /* The core treats 0 as 1 */
218 min_stride = 0;
219 break;
220 case 16:
221 min_stride = 2;
222 break;
223 case 32:
224 min_stride = 4;
225 break;
226#ifdef CONFIG_64BIT
227 case 64:
228 min_stride = 8;
229 break;
230#endif
231 break;
232 default:
233 return ERR_PTR(-EINVAL);
234 }
235
236 if (config->reg_stride < min_stride)
237 return ERR_PTR(-EINVAL);
238
239 switch (config->reg_format_endian) {
240 case REGMAP_ENDIAN_DEFAULT:
241 case REGMAP_ENDIAN_NATIVE:
242 break;
243 default:
244 return ERR_PTR(-EINVAL);
245 }
246
247 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
248 if (!ctx)
249 return ERR_PTR(-ENOMEM);
250
251 ctx->regs = regs;
252 ctx->val_bytes = config->val_bits / 8;
253 ctx->reg_bytes = config->reg_bits / 8;
254 ctx->pad_bytes = config->pad_bits / 8;
255 ctx->clk = ERR_PTR(-ENODEV);
256
257 if (clk_id == NULL)
258 return ctx;
259
260 ctx->clk = clk_get(dev, clk_id);
261 if (IS_ERR(ctx->clk)) {
262 ret = PTR_ERR(ctx->clk);
263 goto err_free;
264 }
265
266 ret = clk_prepare(ctx->clk);
267 if (ret < 0) {
268 clk_put(ctx->clk);
269 goto err_free;
270 }
271
272 return ctx;
273
274err_free:
275 kfree(ctx);
276
277 return ERR_PTR(ret);
278}
279
280/**
281 * regmap_init_mmio_clk(): Initialise register map with register clock
282 *
283 * @dev: Device that will be interacted with
284 * @clk_id: register clock consumer ID
285 * @regs: Pointer to memory-mapped IO region
286 * @config: Configuration for register map
287 *
288 * The return value will be an ERR_PTR() on error or a valid pointer to
289 * a struct regmap.
290 */
291struct regmap *regmap_init_mmio_clk(struct device *dev, const char *clk_id,
292 void __iomem *regs,
293 const struct regmap_config *config)
294{
295 struct regmap_mmio_context *ctx;
296
297 ctx = regmap_mmio_gen_context(dev, clk_id, regs, config);
298 if (IS_ERR(ctx))
299 return ERR_CAST(ctx);
300
301 return regmap_init(dev, ®map_mmio, ctx, config);
302}
303EXPORT_SYMBOL_GPL(regmap_init_mmio_clk);
304
305/**
306 * devm_regmap_init_mmio_clk(): Initialise managed register map with clock
307 *
308 * @dev: Device that will be interacted with
309 * @clk_id: register clock consumer ID
310 * @regs: Pointer to memory-mapped IO region
311 * @config: Configuration for register map
312 *
313 * The return value will be an ERR_PTR() on error or a valid pointer
314 * to a struct regmap. The regmap will be automatically freed by the
315 * device management code.
316 */
317struct regmap *devm_regmap_init_mmio_clk(struct device *dev, const char *clk_id,
318 void __iomem *regs,
319 const struct regmap_config *config)
320{
321 struct regmap_mmio_context *ctx;
322
323 ctx = regmap_mmio_gen_context(dev, clk_id, regs, config);
324 if (IS_ERR(ctx))
325 return ERR_CAST(ctx);
326
327 return devm_regmap_init(dev, ®map_mmio, ctx, config);
328}
329EXPORT_SYMBOL_GPL(devm_regmap_init_mmio_clk);
330
331MODULE_LICENSE("GPL v2");
1/*
2 * Register map access API - MMIO support
3 *
4 * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 */
18
19#include <linux/clk.h>
20#include <linux/err.h>
21#include <linux/io.h>
22#include <linux/module.h>
23#include <linux/regmap.h>
24#include <linux/slab.h>
25
26#include "internal.h"
27
28struct regmap_mmio_context {
29 void __iomem *regs;
30 unsigned val_bytes;
31
32 bool attached_clk;
33 struct clk *clk;
34
35 void (*reg_write)(struct regmap_mmio_context *ctx,
36 unsigned int reg, unsigned int val);
37 unsigned int (*reg_read)(struct regmap_mmio_context *ctx,
38 unsigned int reg);
39};
40
41static int regmap_mmio_regbits_check(size_t reg_bits)
42{
43 switch (reg_bits) {
44 case 8:
45 case 16:
46 case 32:
47#ifdef CONFIG_64BIT
48 case 64:
49#endif
50 return 0;
51 default:
52 return -EINVAL;
53 }
54}
55
56static int regmap_mmio_get_min_stride(size_t val_bits)
57{
58 int min_stride;
59
60 switch (val_bits) {
61 case 8:
62 /* The core treats 0 as 1 */
63 min_stride = 0;
64 return 0;
65 case 16:
66 min_stride = 2;
67 break;
68 case 32:
69 min_stride = 4;
70 break;
71#ifdef CONFIG_64BIT
72 case 64:
73 min_stride = 8;
74 break;
75#endif
76 default:
77 return -EINVAL;
78 }
79
80 return min_stride;
81}
82
83static void regmap_mmio_write8(struct regmap_mmio_context *ctx,
84 unsigned int reg,
85 unsigned int val)
86{
87 writeb(val, ctx->regs + reg);
88}
89
90static void regmap_mmio_write16le(struct regmap_mmio_context *ctx,
91 unsigned int reg,
92 unsigned int val)
93{
94 writew(val, ctx->regs + reg);
95}
96
97static void regmap_mmio_write16be(struct regmap_mmio_context *ctx,
98 unsigned int reg,
99 unsigned int val)
100{
101 iowrite16be(val, ctx->regs + reg);
102}
103
104static void regmap_mmio_write32le(struct regmap_mmio_context *ctx,
105 unsigned int reg,
106 unsigned int val)
107{
108 writel(val, ctx->regs + reg);
109}
110
111static void regmap_mmio_write32be(struct regmap_mmio_context *ctx,
112 unsigned int reg,
113 unsigned int val)
114{
115 iowrite32be(val, ctx->regs + reg);
116}
117
118#ifdef CONFIG_64BIT
119static void regmap_mmio_write64le(struct regmap_mmio_context *ctx,
120 unsigned int reg,
121 unsigned int val)
122{
123 writeq(val, ctx->regs + reg);
124}
125#endif
126
127static int regmap_mmio_write(void *context, unsigned int reg, unsigned int val)
128{
129 struct regmap_mmio_context *ctx = context;
130 int ret;
131
132 if (!IS_ERR(ctx->clk)) {
133 ret = clk_enable(ctx->clk);
134 if (ret < 0)
135 return ret;
136 }
137
138 ctx->reg_write(ctx, reg, val);
139
140 if (!IS_ERR(ctx->clk))
141 clk_disable(ctx->clk);
142
143 return 0;
144}
145
146static unsigned int regmap_mmio_read8(struct regmap_mmio_context *ctx,
147 unsigned int reg)
148{
149 return readb(ctx->regs + reg);
150}
151
152static unsigned int regmap_mmio_read16le(struct regmap_mmio_context *ctx,
153 unsigned int reg)
154{
155 return readw(ctx->regs + reg);
156}
157
158static unsigned int regmap_mmio_read16be(struct regmap_mmio_context *ctx,
159 unsigned int reg)
160{
161 return ioread16be(ctx->regs + reg);
162}
163
164static unsigned int regmap_mmio_read32le(struct regmap_mmio_context *ctx,
165 unsigned int reg)
166{
167 return readl(ctx->regs + reg);
168}
169
170static unsigned int regmap_mmio_read32be(struct regmap_mmio_context *ctx,
171 unsigned int reg)
172{
173 return ioread32be(ctx->regs + reg);
174}
175
176#ifdef CONFIG_64BIT
177static unsigned int regmap_mmio_read64le(struct regmap_mmio_context *ctx,
178 unsigned int reg)
179{
180 return readq(ctx->regs + reg);
181}
182#endif
183
184static int regmap_mmio_read(void *context, unsigned int reg, unsigned int *val)
185{
186 struct regmap_mmio_context *ctx = context;
187 int ret;
188
189 if (!IS_ERR(ctx->clk)) {
190 ret = clk_enable(ctx->clk);
191 if (ret < 0)
192 return ret;
193 }
194
195 *val = ctx->reg_read(ctx, reg);
196
197 if (!IS_ERR(ctx->clk))
198 clk_disable(ctx->clk);
199
200 return 0;
201}
202
203static void regmap_mmio_free_context(void *context)
204{
205 struct regmap_mmio_context *ctx = context;
206
207 if (!IS_ERR(ctx->clk)) {
208 clk_unprepare(ctx->clk);
209 clk_put(ctx->clk);
210 }
211 kfree(context);
212}
213
214static const struct regmap_bus regmap_mmio = {
215 .fast_io = true,
216 .reg_write = regmap_mmio_write,
217 .reg_read = regmap_mmio_read,
218 .free_context = regmap_mmio_free_context,
219 .val_format_endian_default = REGMAP_ENDIAN_LITTLE,
220};
221
222static struct regmap_mmio_context *regmap_mmio_gen_context(struct device *dev,
223 const char *clk_id,
224 void __iomem *regs,
225 const struct regmap_config *config)
226{
227 struct regmap_mmio_context *ctx;
228 int min_stride;
229 int ret;
230
231 ret = regmap_mmio_regbits_check(config->reg_bits);
232 if (ret)
233 return ERR_PTR(ret);
234
235 if (config->pad_bits)
236 return ERR_PTR(-EINVAL);
237
238 min_stride = regmap_mmio_get_min_stride(config->val_bits);
239 if (min_stride < 0)
240 return ERR_PTR(min_stride);
241
242 if (config->reg_stride < min_stride)
243 return ERR_PTR(-EINVAL);
244
245 ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
246 if (!ctx)
247 return ERR_PTR(-ENOMEM);
248
249 ctx->regs = regs;
250 ctx->val_bytes = config->val_bits / 8;
251 ctx->clk = ERR_PTR(-ENODEV);
252
253 switch (regmap_get_val_endian(dev, ®map_mmio, config)) {
254 case REGMAP_ENDIAN_DEFAULT:
255 case REGMAP_ENDIAN_LITTLE:
256#ifdef __LITTLE_ENDIAN
257 case REGMAP_ENDIAN_NATIVE:
258#endif
259 switch (config->val_bits) {
260 case 8:
261 ctx->reg_read = regmap_mmio_read8;
262 ctx->reg_write = regmap_mmio_write8;
263 break;
264 case 16:
265 ctx->reg_read = regmap_mmio_read16le;
266 ctx->reg_write = regmap_mmio_write16le;
267 break;
268 case 32:
269 ctx->reg_read = regmap_mmio_read32le;
270 ctx->reg_write = regmap_mmio_write32le;
271 break;
272#ifdef CONFIG_64BIT
273 case 64:
274 ctx->reg_read = regmap_mmio_read64le;
275 ctx->reg_write = regmap_mmio_write64le;
276 break;
277#endif
278 default:
279 ret = -EINVAL;
280 goto err_free;
281 }
282 break;
283 case REGMAP_ENDIAN_BIG:
284#ifdef __BIG_ENDIAN
285 case REGMAP_ENDIAN_NATIVE:
286#endif
287 switch (config->val_bits) {
288 case 8:
289 ctx->reg_read = regmap_mmio_read8;
290 ctx->reg_write = regmap_mmio_write8;
291 break;
292 case 16:
293 ctx->reg_read = regmap_mmio_read16be;
294 ctx->reg_write = regmap_mmio_write16be;
295 break;
296 case 32:
297 ctx->reg_read = regmap_mmio_read32be;
298 ctx->reg_write = regmap_mmio_write32be;
299 break;
300 default:
301 ret = -EINVAL;
302 goto err_free;
303 }
304 break;
305 default:
306 ret = -EINVAL;
307 goto err_free;
308 }
309
310 if (clk_id == NULL)
311 return ctx;
312
313 ctx->clk = clk_get(dev, clk_id);
314 if (IS_ERR(ctx->clk)) {
315 ret = PTR_ERR(ctx->clk);
316 goto err_free;
317 }
318
319 ret = clk_prepare(ctx->clk);
320 if (ret < 0) {
321 clk_put(ctx->clk);
322 goto err_free;
323 }
324
325 return ctx;
326
327err_free:
328 kfree(ctx);
329
330 return ERR_PTR(ret);
331}
332
333struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id,
334 void __iomem *regs,
335 const struct regmap_config *config,
336 struct lock_class_key *lock_key,
337 const char *lock_name)
338{
339 struct regmap_mmio_context *ctx;
340
341 ctx = regmap_mmio_gen_context(dev, clk_id, regs, config);
342 if (IS_ERR(ctx))
343 return ERR_CAST(ctx);
344
345 return __regmap_init(dev, ®map_mmio, ctx, config,
346 lock_key, lock_name);
347}
348EXPORT_SYMBOL_GPL(__regmap_init_mmio_clk);
349
350struct regmap *__devm_regmap_init_mmio_clk(struct device *dev,
351 const char *clk_id,
352 void __iomem *regs,
353 const struct regmap_config *config,
354 struct lock_class_key *lock_key,
355 const char *lock_name)
356{
357 struct regmap_mmio_context *ctx;
358
359 ctx = regmap_mmio_gen_context(dev, clk_id, regs, config);
360 if (IS_ERR(ctx))
361 return ERR_CAST(ctx);
362
363 return __devm_regmap_init(dev, ®map_mmio, ctx, config,
364 lock_key, lock_name);
365}
366EXPORT_SYMBOL_GPL(__devm_regmap_init_mmio_clk);
367
368int regmap_mmio_attach_clk(struct regmap *map, struct clk *clk)
369{
370 struct regmap_mmio_context *ctx = map->bus_context;
371
372 ctx->clk = clk;
373 ctx->attached_clk = true;
374
375 return clk_prepare(ctx->clk);
376}
377EXPORT_SYMBOL_GPL(regmap_mmio_attach_clk);
378
379void regmap_mmio_detach_clk(struct regmap *map)
380{
381 struct regmap_mmio_context *ctx = map->bus_context;
382
383 clk_unprepare(ctx->clk);
384
385 ctx->attached_clk = false;
386 ctx->clk = NULL;
387}
388EXPORT_SYMBOL_GPL(regmap_mmio_detach_clk);
389
390MODULE_LICENSE("GPL v2");