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1/*
2 * CPU frequency scaling for Broadcom SoCs with AVS firmware that
3 * supports DVS or DVFS
4 *
5 * Copyright (c) 2016 Broadcom
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation version 2.
10 *
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17/*
18 * "AVS" is the name of a firmware developed at Broadcom. It derives
19 * its name from the technique called "Adaptive Voltage Scaling".
20 * Adaptive voltage scaling was the original purpose of this firmware.
21 * The AVS firmware still supports "AVS mode", where all it does is
22 * adaptive voltage scaling. However, on some newer Broadcom SoCs, the
23 * AVS Firmware, despite its unchanged name, also supports DFS mode and
24 * DVFS mode.
25 *
26 * In the context of this document and the related driver, "AVS" by
27 * itself always means the Broadcom firmware and never refers to the
28 * technique called "Adaptive Voltage Scaling".
29 *
30 * The Broadcom STB AVS CPUfreq driver provides voltage and frequency
31 * scaling on Broadcom SoCs using AVS firmware with support for DFS and
32 * DVFS. The AVS firmware is running on its own co-processor. The
33 * driver supports both uniprocessor (UP) and symmetric multiprocessor
34 * (SMP) systems which share clock and voltage across all CPUs.
35 *
36 * Actual voltage and frequency scaling is done solely by the AVS
37 * firmware. This driver does not change frequency or voltage itself.
38 * It provides a standard CPUfreq interface to the rest of the kernel
39 * and to userland. It interfaces with the AVS firmware to effect the
40 * requested changes and to report back the current system status in a
41 * way that is expected by existing tools.
42 */
43
44#include <linux/cpufreq.h>
45#include <linux/delay.h>
46#include <linux/interrupt.h>
47#include <linux/io.h>
48#include <linux/module.h>
49#include <linux/of_address.h>
50#include <linux/platform_device.h>
51#include <linux/semaphore.h>
52
53/* Max number of arguments AVS calls take */
54#define AVS_MAX_CMD_ARGS 4
55/*
56 * This macro is used to generate AVS parameter register offsets. For
57 * x >= AVS_MAX_CMD_ARGS, it returns 0 to protect against accidental memory
58 * access outside of the parameter range. (Offset 0 is the first parameter.)
59 */
60#define AVS_PARAM_MULT(x) ((x) < AVS_MAX_CMD_ARGS ? (x) : 0)
61
62/* AVS Mailbox Register offsets */
63#define AVS_MBOX_COMMAND 0x00
64#define AVS_MBOX_STATUS 0x04
65#define AVS_MBOX_VOLTAGE0 0x08
66#define AVS_MBOX_TEMP0 0x0c
67#define AVS_MBOX_PV0 0x10
68#define AVS_MBOX_MV0 0x14
69#define AVS_MBOX_PARAM(x) (0x18 + AVS_PARAM_MULT(x) * sizeof(u32))
70#define AVS_MBOX_REVISION 0x28
71#define AVS_MBOX_PSTATE 0x2c
72#define AVS_MBOX_HEARTBEAT 0x30
73#define AVS_MBOX_MAGIC 0x34
74#define AVS_MBOX_SIGMA_HVT 0x38
75#define AVS_MBOX_SIGMA_SVT 0x3c
76#define AVS_MBOX_VOLTAGE1 0x40
77#define AVS_MBOX_TEMP1 0x44
78#define AVS_MBOX_PV1 0x48
79#define AVS_MBOX_MV1 0x4c
80#define AVS_MBOX_FREQUENCY 0x50
81
82/* AVS Commands */
83#define AVS_CMD_AVAILABLE 0x00
84#define AVS_CMD_DISABLE 0x10
85#define AVS_CMD_ENABLE 0x11
86#define AVS_CMD_S2_ENTER 0x12
87#define AVS_CMD_S2_EXIT 0x13
88#define AVS_CMD_BBM_ENTER 0x14
89#define AVS_CMD_BBM_EXIT 0x15
90#define AVS_CMD_S3_ENTER 0x16
91#define AVS_CMD_S3_EXIT 0x17
92#define AVS_CMD_BALANCE 0x18
93/* PMAP and P-STATE commands */
94#define AVS_CMD_GET_PMAP 0x30
95#define AVS_CMD_SET_PMAP 0x31
96#define AVS_CMD_GET_PSTATE 0x40
97#define AVS_CMD_SET_PSTATE 0x41
98
99/* Different modes AVS supports (for GET_PMAP/SET_PMAP) */
100#define AVS_MODE_AVS 0x0
101#define AVS_MODE_DFS 0x1
102#define AVS_MODE_DVS 0x2
103#define AVS_MODE_DVFS 0x3
104
105/*
106 * PMAP parameter p1
107 * unused:31-24, mdiv_p0:23-16, unused:15-14, pdiv:13-10 , ndiv_int:9-0
108 */
109#define NDIV_INT_SHIFT 0
110#define NDIV_INT_MASK 0x3ff
111#define PDIV_SHIFT 10
112#define PDIV_MASK 0xf
113#define MDIV_P0_SHIFT 16
114#define MDIV_P0_MASK 0xff
115/*
116 * PMAP parameter p2
117 * mdiv_p4:31-24, mdiv_p3:23-16, mdiv_p2:15:8, mdiv_p1:7:0
118 */
119#define MDIV_P1_SHIFT 0
120#define MDIV_P1_MASK 0xff
121#define MDIV_P2_SHIFT 8
122#define MDIV_P2_MASK 0xff
123#define MDIV_P3_SHIFT 16
124#define MDIV_P3_MASK 0xff
125#define MDIV_P4_SHIFT 24
126#define MDIV_P4_MASK 0xff
127
128/* Different P-STATES AVS supports (for GET_PSTATE/SET_PSTATE) */
129#define AVS_PSTATE_P0 0x0
130#define AVS_PSTATE_P1 0x1
131#define AVS_PSTATE_P2 0x2
132#define AVS_PSTATE_P3 0x3
133#define AVS_PSTATE_P4 0x4
134#define AVS_PSTATE_MAX AVS_PSTATE_P4
135
136/* CPU L2 Interrupt Controller Registers */
137#define AVS_CPU_L2_SET0 0x04
138#define AVS_CPU_L2_INT_MASK BIT(31)
139
140/* AVS Command Status Values */
141#define AVS_STATUS_CLEAR 0x00
142/* Command/notification accepted */
143#define AVS_STATUS_SUCCESS 0xf0
144/* Command/notification rejected */
145#define AVS_STATUS_FAILURE 0xff
146/* Invalid command/notification (unknown) */
147#define AVS_STATUS_INVALID 0xf1
148/* Non-AVS modes are not supported */
149#define AVS_STATUS_NO_SUPP 0xf2
150/* Cannot set P-State until P-Map supplied */
151#define AVS_STATUS_NO_MAP 0xf3
152/* Cannot change P-Map after initial P-Map set */
153#define AVS_STATUS_MAP_SET 0xf4
154/* Max AVS status; higher numbers are used for debugging */
155#define AVS_STATUS_MAX 0xff
156
157/* Other AVS related constants */
158#define AVS_LOOP_LIMIT 10000
159#define AVS_TIMEOUT 300 /* in ms; expected completion is < 10ms */
160#define AVS_FIRMWARE_MAGIC 0xa11600d1
161
162#define BRCM_AVS_CPUFREQ_PREFIX "brcmstb-avs"
163#define BRCM_AVS_CPUFREQ_NAME BRCM_AVS_CPUFREQ_PREFIX "-cpufreq"
164#define BRCM_AVS_CPU_DATA "brcm,avs-cpu-data-mem"
165#define BRCM_AVS_CPU_INTR "brcm,avs-cpu-l2-intr"
166#define BRCM_AVS_HOST_INTR "sw_intr"
167
168struct pmap {
169 unsigned int mode;
170 unsigned int p1;
171 unsigned int p2;
172 unsigned int state;
173};
174
175struct private_data {
176 void __iomem *base;
177 void __iomem *avs_intr_base;
178 struct device *dev;
179 struct completion done;
180 struct semaphore sem;
181 struct pmap pmap;
182 int host_irq;
183};
184
185static void __iomem *__map_region(const char *name)
186{
187 struct device_node *np;
188 void __iomem *ptr;
189
190 np = of_find_compatible_node(NULL, NULL, name);
191 if (!np)
192 return NULL;
193
194 ptr = of_iomap(np, 0);
195 of_node_put(np);
196
197 return ptr;
198}
199
200static unsigned long wait_for_avs_command(struct private_data *priv,
201 unsigned long timeout)
202{
203 unsigned long time_left = 0;
204 u32 val;
205
206 /* Event driven, wait for the command interrupt */
207 if (priv->host_irq >= 0)
208 return wait_for_completion_timeout(&priv->done,
209 msecs_to_jiffies(timeout));
210
211 /* Polling for command completion */
212 do {
213 time_left = timeout;
214 val = readl(priv->base + AVS_MBOX_STATUS);
215 if (val)
216 break;
217
218 usleep_range(1000, 2000);
219 } while (--timeout);
220
221 return time_left;
222}
223
224static int __issue_avs_command(struct private_data *priv, unsigned int cmd,
225 unsigned int num_in, unsigned int num_out,
226 u32 args[])
227{
228 void __iomem *base = priv->base;
229 unsigned long time_left;
230 unsigned int i;
231 int ret;
232 u32 val;
233
234 ret = down_interruptible(&priv->sem);
235 if (ret)
236 return ret;
237
238 /*
239 * Make sure no other command is currently running: cmd is 0 if AVS
240 * co-processor is idle. Due to the guard above, we should almost never
241 * have to wait here.
242 */
243 for (i = 0, val = 1; val != 0 && i < AVS_LOOP_LIMIT; i++)
244 val = readl(base + AVS_MBOX_COMMAND);
245
246 /* Give the caller a chance to retry if AVS is busy. */
247 if (i == AVS_LOOP_LIMIT) {
248 ret = -EAGAIN;
249 goto out;
250 }
251
252 /* Clear status before we begin. */
253 writel(AVS_STATUS_CLEAR, base + AVS_MBOX_STATUS);
254
255 /* Provide input parameters */
256 for (i = 0; i < num_in; i++)
257 writel(args[i], base + AVS_MBOX_PARAM(i));
258
259 /* Protect from spurious interrupts. */
260 reinit_completion(&priv->done);
261
262 /* Now issue the command & tell firmware to wake up to process it. */
263 writel(cmd, base + AVS_MBOX_COMMAND);
264 writel(AVS_CPU_L2_INT_MASK, priv->avs_intr_base + AVS_CPU_L2_SET0);
265
266 /* Wait for AVS co-processor to finish processing the command. */
267 time_left = wait_for_avs_command(priv, AVS_TIMEOUT);
268
269 /*
270 * If the AVS status is not in the expected range, it means AVS didn't
271 * complete our command in time, and we return an error. Also, if there
272 * is no "time left", we timed out waiting for the interrupt.
273 */
274 val = readl(base + AVS_MBOX_STATUS);
275 if (time_left == 0 || val == 0 || val > AVS_STATUS_MAX) {
276 dev_err(priv->dev, "AVS command %#x didn't complete in time\n",
277 cmd);
278 dev_err(priv->dev, " Time left: %u ms, AVS status: %#x\n",
279 jiffies_to_msecs(time_left), val);
280 ret = -ETIMEDOUT;
281 goto out;
282 }
283
284 /* Process returned values */
285 for (i = 0; i < num_out; i++)
286 args[i] = readl(base + AVS_MBOX_PARAM(i));
287
288 /* Clear status to tell AVS co-processor we are done. */
289 writel(AVS_STATUS_CLEAR, base + AVS_MBOX_STATUS);
290
291 /* Convert firmware errors to errno's as much as possible. */
292 switch (val) {
293 case AVS_STATUS_INVALID:
294 ret = -EINVAL;
295 break;
296 case AVS_STATUS_NO_SUPP:
297 ret = -ENOTSUPP;
298 break;
299 case AVS_STATUS_NO_MAP:
300 ret = -ENOENT;
301 break;
302 case AVS_STATUS_MAP_SET:
303 ret = -EEXIST;
304 break;
305 case AVS_STATUS_FAILURE:
306 ret = -EIO;
307 break;
308 }
309
310out:
311 up(&priv->sem);
312
313 return ret;
314}
315
316static irqreturn_t irq_handler(int irq, void *data)
317{
318 struct private_data *priv = data;
319
320 /* AVS command completed execution. Wake up __issue_avs_command(). */
321 complete(&priv->done);
322
323 return IRQ_HANDLED;
324}
325
326static char *brcm_avs_mode_to_string(unsigned int mode)
327{
328 switch (mode) {
329 case AVS_MODE_AVS:
330 return "AVS";
331 case AVS_MODE_DFS:
332 return "DFS";
333 case AVS_MODE_DVS:
334 return "DVS";
335 case AVS_MODE_DVFS:
336 return "DVFS";
337 }
338 return NULL;
339}
340
341static void brcm_avs_parse_p1(u32 p1, unsigned int *mdiv_p0, unsigned int *pdiv,
342 unsigned int *ndiv)
343{
344 *mdiv_p0 = (p1 >> MDIV_P0_SHIFT) & MDIV_P0_MASK;
345 *pdiv = (p1 >> PDIV_SHIFT) & PDIV_MASK;
346 *ndiv = (p1 >> NDIV_INT_SHIFT) & NDIV_INT_MASK;
347}
348
349static void brcm_avs_parse_p2(u32 p2, unsigned int *mdiv_p1,
350 unsigned int *mdiv_p2, unsigned int *mdiv_p3,
351 unsigned int *mdiv_p4)
352{
353 *mdiv_p4 = (p2 >> MDIV_P4_SHIFT) & MDIV_P4_MASK;
354 *mdiv_p3 = (p2 >> MDIV_P3_SHIFT) & MDIV_P3_MASK;
355 *mdiv_p2 = (p2 >> MDIV_P2_SHIFT) & MDIV_P2_MASK;
356 *mdiv_p1 = (p2 >> MDIV_P1_SHIFT) & MDIV_P1_MASK;
357}
358
359static int brcm_avs_get_pmap(struct private_data *priv, struct pmap *pmap)
360{
361 u32 args[AVS_MAX_CMD_ARGS];
362 int ret;
363
364 ret = __issue_avs_command(priv, AVS_CMD_GET_PMAP, 0, 4, args);
365 if (ret || !pmap)
366 return ret;
367
368 pmap->mode = args[0];
369 pmap->p1 = args[1];
370 pmap->p2 = args[2];
371 pmap->state = args[3];
372
373 return 0;
374}
375
376static int brcm_avs_set_pmap(struct private_data *priv, struct pmap *pmap)
377{
378 u32 args[AVS_MAX_CMD_ARGS];
379
380 args[0] = pmap->mode;
381 args[1] = pmap->p1;
382 args[2] = pmap->p2;
383 args[3] = pmap->state;
384
385 return __issue_avs_command(priv, AVS_CMD_SET_PMAP, 4, 0, args);
386}
387
388static int brcm_avs_get_pstate(struct private_data *priv, unsigned int *pstate)
389{
390 u32 args[AVS_MAX_CMD_ARGS];
391 int ret;
392
393 ret = __issue_avs_command(priv, AVS_CMD_GET_PSTATE, 0, 1, args);
394 if (ret)
395 return ret;
396 *pstate = args[0];
397
398 return 0;
399}
400
401static int brcm_avs_set_pstate(struct private_data *priv, unsigned int pstate)
402{
403 u32 args[AVS_MAX_CMD_ARGS];
404
405 args[0] = pstate;
406
407 return __issue_avs_command(priv, AVS_CMD_SET_PSTATE, 1, 0, args);
408
409}
410
411static u32 brcm_avs_get_voltage(void __iomem *base)
412{
413 return readl(base + AVS_MBOX_VOLTAGE1);
414}
415
416static u32 brcm_avs_get_frequency(void __iomem *base)
417{
418 return readl(base + AVS_MBOX_FREQUENCY) * 1000; /* in kHz */
419}
420
421/*
422 * We determine which frequencies are supported by cycling through all P-states
423 * and reading back what frequency we are running at for each P-state.
424 */
425static struct cpufreq_frequency_table *
426brcm_avs_get_freq_table(struct device *dev, struct private_data *priv)
427{
428 struct cpufreq_frequency_table *table;
429 unsigned int pstate;
430 int i, ret;
431
432 /* Remember P-state for later */
433 ret = brcm_avs_get_pstate(priv, &pstate);
434 if (ret)
435 return ERR_PTR(ret);
436
437 /*
438 * We allocate space for the 5 different P-STATES AVS,
439 * plus extra space for a terminating element.
440 */
441 table = devm_kcalloc(dev, AVS_PSTATE_MAX + 1 + 1, sizeof(*table),
442 GFP_KERNEL);
443 if (!table)
444 return ERR_PTR(-ENOMEM);
445
446 for (i = AVS_PSTATE_P0; i <= AVS_PSTATE_MAX; i++) {
447 ret = brcm_avs_set_pstate(priv, i);
448 if (ret)
449 return ERR_PTR(ret);
450 table[i].frequency = brcm_avs_get_frequency(priv->base);
451 table[i].driver_data = i;
452 }
453 table[i].frequency = CPUFREQ_TABLE_END;
454
455 /* Restore P-state */
456 ret = brcm_avs_set_pstate(priv, pstate);
457 if (ret)
458 return ERR_PTR(ret);
459
460 return table;
461}
462
463/*
464 * To ensure the right firmware is running we need to
465 * - check the MAGIC matches what we expect
466 * - brcm_avs_get_pmap() doesn't return -ENOTSUPP or -EINVAL
467 * We need to set up our interrupt handling before calling brcm_avs_get_pmap()!
468 */
469static bool brcm_avs_is_firmware_loaded(struct private_data *priv)
470{
471 u32 magic;
472 int rc;
473
474 rc = brcm_avs_get_pmap(priv, NULL);
475 magic = readl(priv->base + AVS_MBOX_MAGIC);
476
477 return (magic == AVS_FIRMWARE_MAGIC) && ((rc != -ENOTSUPP) ||
478 (rc != -EINVAL));
479}
480
481static unsigned int brcm_avs_cpufreq_get(unsigned int cpu)
482{
483 struct cpufreq_policy *policy = cpufreq_cpu_get(cpu);
484 struct private_data *priv;
485
486 if (!policy)
487 return 0;
488
489 priv = policy->driver_data;
490
491 cpufreq_cpu_put(policy);
492
493 return brcm_avs_get_frequency(priv->base);
494}
495
496static int brcm_avs_target_index(struct cpufreq_policy *policy,
497 unsigned int index)
498{
499 return brcm_avs_set_pstate(policy->driver_data,
500 policy->freq_table[index].driver_data);
501}
502
503static int brcm_avs_suspend(struct cpufreq_policy *policy)
504{
505 struct private_data *priv = policy->driver_data;
506 int ret;
507
508 ret = brcm_avs_get_pmap(priv, &priv->pmap);
509 if (ret)
510 return ret;
511
512 /*
513 * We can't use the P-state returned by brcm_avs_get_pmap(), since
514 * that's the initial P-state from when the P-map was downloaded to the
515 * AVS co-processor, not necessarily the P-state we are running at now.
516 * So, we get the current P-state explicitly.
517 */
518 ret = brcm_avs_get_pstate(priv, &priv->pmap.state);
519 if (ret)
520 return ret;
521
522 /* This is best effort. Nothing to do if it fails. */
523 (void)__issue_avs_command(priv, AVS_CMD_S2_ENTER, 0, 0, NULL);
524
525 return 0;
526}
527
528static int brcm_avs_resume(struct cpufreq_policy *policy)
529{
530 struct private_data *priv = policy->driver_data;
531 int ret;
532
533 /* This is best effort. Nothing to do if it fails. */
534 (void)__issue_avs_command(priv, AVS_CMD_S2_EXIT, 0, 0, NULL);
535
536 ret = brcm_avs_set_pmap(priv, &priv->pmap);
537 if (ret == -EEXIST) {
538 struct platform_device *pdev = cpufreq_get_driver_data();
539 struct device *dev = &pdev->dev;
540
541 dev_warn(dev, "PMAP was already set\n");
542 ret = 0;
543 }
544
545 return ret;
546}
547
548/*
549 * All initialization code that we only want to execute once goes here. Setup
550 * code that can be re-tried on every core (if it failed before) can go into
551 * brcm_avs_cpufreq_init().
552 */
553static int brcm_avs_prepare_init(struct platform_device *pdev)
554{
555 struct private_data *priv;
556 struct device *dev;
557 int ret;
558
559 dev = &pdev->dev;
560 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
561 if (!priv)
562 return -ENOMEM;
563
564 priv->dev = dev;
565 sema_init(&priv->sem, 1);
566 init_completion(&priv->done);
567 platform_set_drvdata(pdev, priv);
568
569 priv->base = __map_region(BRCM_AVS_CPU_DATA);
570 if (!priv->base) {
571 dev_err(dev, "Couldn't find property %s in device tree.\n",
572 BRCM_AVS_CPU_DATA);
573 return -ENOENT;
574 }
575
576 priv->avs_intr_base = __map_region(BRCM_AVS_CPU_INTR);
577 if (!priv->avs_intr_base) {
578 dev_err(dev, "Couldn't find property %s in device tree.\n",
579 BRCM_AVS_CPU_INTR);
580 ret = -ENOENT;
581 goto unmap_base;
582 }
583
584 priv->host_irq = platform_get_irq_byname(pdev, BRCM_AVS_HOST_INTR);
585
586 ret = devm_request_irq(dev, priv->host_irq, irq_handler,
587 IRQF_TRIGGER_RISING,
588 BRCM_AVS_HOST_INTR, priv);
589 if (ret && priv->host_irq >= 0) {
590 dev_err(dev, "IRQ request failed: %s (%d) -- %d\n",
591 BRCM_AVS_HOST_INTR, priv->host_irq, ret);
592 goto unmap_intr_base;
593 }
594
595 if (brcm_avs_is_firmware_loaded(priv))
596 return 0;
597
598 dev_err(dev, "AVS firmware is not loaded or doesn't support DVFS\n");
599 ret = -ENODEV;
600
601unmap_intr_base:
602 iounmap(priv->avs_intr_base);
603unmap_base:
604 iounmap(priv->base);
605
606 return ret;
607}
608
609static void brcm_avs_prepare_uninit(struct platform_device *pdev)
610{
611 struct private_data *priv;
612
613 priv = platform_get_drvdata(pdev);
614
615 iounmap(priv->avs_intr_base);
616 iounmap(priv->base);
617}
618
619static int brcm_avs_cpufreq_init(struct cpufreq_policy *policy)
620{
621 struct cpufreq_frequency_table *freq_table;
622 struct platform_device *pdev;
623 struct private_data *priv;
624 struct device *dev;
625 int ret;
626
627 pdev = cpufreq_get_driver_data();
628 priv = platform_get_drvdata(pdev);
629 policy->driver_data = priv;
630 dev = &pdev->dev;
631
632 freq_table = brcm_avs_get_freq_table(dev, priv);
633 if (IS_ERR(freq_table)) {
634 ret = PTR_ERR(freq_table);
635 dev_err(dev, "Couldn't determine frequency table (%d).\n", ret);
636 return ret;
637 }
638
639 policy->freq_table = freq_table;
640
641 /* All cores share the same clock and thus the same policy. */
642 cpumask_setall(policy->cpus);
643
644 ret = __issue_avs_command(priv, AVS_CMD_ENABLE, 0, 0, NULL);
645 if (!ret) {
646 unsigned int pstate;
647
648 ret = brcm_avs_get_pstate(priv, &pstate);
649 if (!ret) {
650 policy->cur = freq_table[pstate].frequency;
651 dev_info(dev, "registered\n");
652 return 0;
653 }
654 }
655
656 dev_err(dev, "couldn't initialize driver (%d)\n", ret);
657
658 return ret;
659}
660
661static ssize_t show_brcm_avs_pstate(struct cpufreq_policy *policy, char *buf)
662{
663 struct private_data *priv = policy->driver_data;
664 unsigned int pstate;
665
666 if (brcm_avs_get_pstate(priv, &pstate))
667 return sprintf(buf, "<unknown>\n");
668
669 return sprintf(buf, "%u\n", pstate);
670}
671
672static ssize_t show_brcm_avs_mode(struct cpufreq_policy *policy, char *buf)
673{
674 struct private_data *priv = policy->driver_data;
675 struct pmap pmap;
676
677 if (brcm_avs_get_pmap(priv, &pmap))
678 return sprintf(buf, "<unknown>\n");
679
680 return sprintf(buf, "%s %u\n", brcm_avs_mode_to_string(pmap.mode),
681 pmap.mode);
682}
683
684static ssize_t show_brcm_avs_pmap(struct cpufreq_policy *policy, char *buf)
685{
686 unsigned int mdiv_p0, mdiv_p1, mdiv_p2, mdiv_p3, mdiv_p4;
687 struct private_data *priv = policy->driver_data;
688 unsigned int ndiv, pdiv;
689 struct pmap pmap;
690
691 if (brcm_avs_get_pmap(priv, &pmap))
692 return sprintf(buf, "<unknown>\n");
693
694 brcm_avs_parse_p1(pmap.p1, &mdiv_p0, &pdiv, &ndiv);
695 brcm_avs_parse_p2(pmap.p2, &mdiv_p1, &mdiv_p2, &mdiv_p3, &mdiv_p4);
696
697 return sprintf(buf, "0x%08x 0x%08x %u %u %u %u %u %u %u %u %u\n",
698 pmap.p1, pmap.p2, ndiv, pdiv, mdiv_p0, mdiv_p1, mdiv_p2,
699 mdiv_p3, mdiv_p4, pmap.mode, pmap.state);
700}
701
702static ssize_t show_brcm_avs_voltage(struct cpufreq_policy *policy, char *buf)
703{
704 struct private_data *priv = policy->driver_data;
705
706 return sprintf(buf, "0x%08x\n", brcm_avs_get_voltage(priv->base));
707}
708
709static ssize_t show_brcm_avs_frequency(struct cpufreq_policy *policy, char *buf)
710{
711 struct private_data *priv = policy->driver_data;
712
713 return sprintf(buf, "0x%08x\n", brcm_avs_get_frequency(priv->base));
714}
715
716cpufreq_freq_attr_ro(brcm_avs_pstate);
717cpufreq_freq_attr_ro(brcm_avs_mode);
718cpufreq_freq_attr_ro(brcm_avs_pmap);
719cpufreq_freq_attr_ro(brcm_avs_voltage);
720cpufreq_freq_attr_ro(brcm_avs_frequency);
721
722static struct freq_attr *brcm_avs_cpufreq_attr[] = {
723 &cpufreq_freq_attr_scaling_available_freqs,
724 &brcm_avs_pstate,
725 &brcm_avs_mode,
726 &brcm_avs_pmap,
727 &brcm_avs_voltage,
728 &brcm_avs_frequency,
729 NULL
730};
731
732static struct cpufreq_driver brcm_avs_driver = {
733 .flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
734 .verify = cpufreq_generic_frequency_table_verify,
735 .target_index = brcm_avs_target_index,
736 .get = brcm_avs_cpufreq_get,
737 .suspend = brcm_avs_suspend,
738 .resume = brcm_avs_resume,
739 .init = brcm_avs_cpufreq_init,
740 .attr = brcm_avs_cpufreq_attr,
741 .name = BRCM_AVS_CPUFREQ_PREFIX,
742};
743
744static int brcm_avs_cpufreq_probe(struct platform_device *pdev)
745{
746 int ret;
747
748 ret = brcm_avs_prepare_init(pdev);
749 if (ret)
750 return ret;
751
752 brcm_avs_driver.driver_data = pdev;
753
754 ret = cpufreq_register_driver(&brcm_avs_driver);
755 if (ret)
756 brcm_avs_prepare_uninit(pdev);
757
758 return ret;
759}
760
761static void brcm_avs_cpufreq_remove(struct platform_device *pdev)
762{
763 cpufreq_unregister_driver(&brcm_avs_driver);
764
765 brcm_avs_prepare_uninit(pdev);
766}
767
768static const struct of_device_id brcm_avs_cpufreq_match[] = {
769 { .compatible = BRCM_AVS_CPU_DATA },
770 { }
771};
772MODULE_DEVICE_TABLE(of, brcm_avs_cpufreq_match);
773
774static struct platform_driver brcm_avs_cpufreq_platdrv = {
775 .driver = {
776 .name = BRCM_AVS_CPUFREQ_NAME,
777 .of_match_table = brcm_avs_cpufreq_match,
778 },
779 .probe = brcm_avs_cpufreq_probe,
780 .remove_new = brcm_avs_cpufreq_remove,
781};
782module_platform_driver(brcm_avs_cpufreq_platdrv);
783
784MODULE_AUTHOR("Markus Mayer <mmayer@broadcom.com>");
785MODULE_DESCRIPTION("CPUfreq driver for Broadcom STB AVS");
786MODULE_LICENSE("GPL");