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1/*
2 * Driver for 93xx46 EEPROMs
3 *
4 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/delay.h>
12#include <linux/device.h>
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/module.h>
16#include <linux/mutex.h>
17#include <linux/slab.h>
18#include <linux/spi/spi.h>
19#include <linux/sysfs.h>
20#include <linux/eeprom_93xx46.h>
21
22#define OP_START 0x4
23#define OP_WRITE (OP_START | 0x1)
24#define OP_READ (OP_START | 0x2)
25#define ADDR_EWDS 0x00
26#define ADDR_ERAL 0x20
27#define ADDR_EWEN 0x30
28
29struct eeprom_93xx46_dev {
30 struct spi_device *spi;
31 struct eeprom_93xx46_platform_data *pdata;
32 struct bin_attribute bin;
33 struct mutex lock;
34 int addrlen;
35};
36
37static ssize_t
38eeprom_93xx46_bin_read(struct file *filp, struct kobject *kobj,
39 struct bin_attribute *bin_attr,
40 char *buf, loff_t off, size_t count)
41{
42 struct eeprom_93xx46_dev *edev;
43 struct device *dev;
44 struct spi_message m;
45 struct spi_transfer t[2];
46 int bits, ret;
47 u16 cmd_addr;
48
49 dev = container_of(kobj, struct device, kobj);
50 edev = dev_get_drvdata(dev);
51
52 if (unlikely(off >= edev->bin.size))
53 return 0;
54 if ((off + count) > edev->bin.size)
55 count = edev->bin.size - off;
56 if (unlikely(!count))
57 return count;
58
59 cmd_addr = OP_READ << edev->addrlen;
60
61 if (edev->addrlen == 7) {
62 cmd_addr |= off & 0x7f;
63 bits = 10;
64 } else {
65 cmd_addr |= off & 0x3f;
66 bits = 9;
67 }
68
69 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
70 cmd_addr, edev->spi->max_speed_hz);
71
72 spi_message_init(&m);
73 memset(t, 0, sizeof(t));
74
75 t[0].tx_buf = (char *)&cmd_addr;
76 t[0].len = 2;
77 t[0].bits_per_word = bits;
78 spi_message_add_tail(&t[0], &m);
79
80 t[1].rx_buf = buf;
81 t[1].len = count;
82 t[1].bits_per_word = 8;
83 spi_message_add_tail(&t[1], &m);
84
85 mutex_lock(&edev->lock);
86
87 if (edev->pdata->prepare)
88 edev->pdata->prepare(edev);
89
90 ret = spi_sync(edev->spi, &m);
91 /* have to wait at least Tcsl ns */
92 ndelay(250);
93 if (ret) {
94 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
95 count, (int)off, ret);
96 }
97
98 if (edev->pdata->finish)
99 edev->pdata->finish(edev);
100
101 mutex_unlock(&edev->lock);
102 return ret ? : count;
103}
104
105static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
106{
107 struct spi_message m;
108 struct spi_transfer t;
109 int bits, ret;
110 u16 cmd_addr;
111
112 cmd_addr = OP_START << edev->addrlen;
113 if (edev->addrlen == 7) {
114 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
115 bits = 10;
116 } else {
117 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
118 bits = 9;
119 }
120
121 dev_dbg(&edev->spi->dev, "ew cmd 0x%04x\n", cmd_addr);
122
123 spi_message_init(&m);
124 memset(&t, 0, sizeof(t));
125
126 t.tx_buf = &cmd_addr;
127 t.len = 2;
128 t.bits_per_word = bits;
129 spi_message_add_tail(&t, &m);
130
131 mutex_lock(&edev->lock);
132
133 if (edev->pdata->prepare)
134 edev->pdata->prepare(edev);
135
136 ret = spi_sync(edev->spi, &m);
137 /* have to wait at least Tcsl ns */
138 ndelay(250);
139 if (ret)
140 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
141 is_on ? "en" : "dis", ret);
142
143 if (edev->pdata->finish)
144 edev->pdata->finish(edev);
145
146 mutex_unlock(&edev->lock);
147 return ret;
148}
149
150static ssize_t
151eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
152 const char *buf, unsigned off)
153{
154 struct spi_message m;
155 struct spi_transfer t[2];
156 int bits, data_len, ret;
157 u16 cmd_addr;
158
159 cmd_addr = OP_WRITE << edev->addrlen;
160
161 if (edev->addrlen == 7) {
162 cmd_addr |= off & 0x7f;
163 bits = 10;
164 data_len = 1;
165 } else {
166 cmd_addr |= off & 0x3f;
167 bits = 9;
168 data_len = 2;
169 }
170
171 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
172
173 spi_message_init(&m);
174 memset(t, 0, sizeof(t));
175
176 t[0].tx_buf = (char *)&cmd_addr;
177 t[0].len = 2;
178 t[0].bits_per_word = bits;
179 spi_message_add_tail(&t[0], &m);
180
181 t[1].tx_buf = buf;
182 t[1].len = data_len;
183 t[1].bits_per_word = 8;
184 spi_message_add_tail(&t[1], &m);
185
186 ret = spi_sync(edev->spi, &m);
187 /* have to wait program cycle time Twc ms */
188 mdelay(6);
189 return ret;
190}
191
192static ssize_t
193eeprom_93xx46_bin_write(struct file *filp, struct kobject *kobj,
194 struct bin_attribute *bin_attr,
195 char *buf, loff_t off, size_t count)
196{
197 struct eeprom_93xx46_dev *edev;
198 struct device *dev;
199 int i, ret, step = 1;
200
201 dev = container_of(kobj, struct device, kobj);
202 edev = dev_get_drvdata(dev);
203
204 if (unlikely(off >= edev->bin.size))
205 return 0;
206 if ((off + count) > edev->bin.size)
207 count = edev->bin.size - off;
208 if (unlikely(!count))
209 return count;
210
211 /* only write even number of bytes on 16-bit devices */
212 if (edev->addrlen == 6) {
213 step = 2;
214 count &= ~1;
215 }
216
217 /* erase/write enable */
218 ret = eeprom_93xx46_ew(edev, 1);
219 if (ret)
220 return ret;
221
222 mutex_lock(&edev->lock);
223
224 if (edev->pdata->prepare)
225 edev->pdata->prepare(edev);
226
227 for (i = 0; i < count; i += step) {
228 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
229 if (ret) {
230 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
231 (int)off + i, ret);
232 break;
233 }
234 }
235
236 if (edev->pdata->finish)
237 edev->pdata->finish(edev);
238
239 mutex_unlock(&edev->lock);
240
241 /* erase/write disable */
242 eeprom_93xx46_ew(edev, 0);
243 return ret ? : count;
244}
245
246static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
247{
248 struct eeprom_93xx46_platform_data *pd = edev->pdata;
249 struct spi_message m;
250 struct spi_transfer t;
251 int bits, ret;
252 u16 cmd_addr;
253
254 cmd_addr = OP_START << edev->addrlen;
255 if (edev->addrlen == 7) {
256 cmd_addr |= ADDR_ERAL << 1;
257 bits = 10;
258 } else {
259 cmd_addr |= ADDR_ERAL;
260 bits = 9;
261 }
262
263 spi_message_init(&m);
264 memset(&t, 0, sizeof(t));
265
266 t.tx_buf = &cmd_addr;
267 t.len = 2;
268 t.bits_per_word = bits;
269 spi_message_add_tail(&t, &m);
270
271 mutex_lock(&edev->lock);
272
273 if (edev->pdata->prepare)
274 edev->pdata->prepare(edev);
275
276 ret = spi_sync(edev->spi, &m);
277 if (ret)
278 dev_err(&edev->spi->dev, "erase error %d\n", ret);
279 /* have to wait erase cycle time Tec ms */
280 mdelay(6);
281
282 if (pd->finish)
283 pd->finish(edev);
284
285 mutex_unlock(&edev->lock);
286 return ret;
287}
288
289static ssize_t eeprom_93xx46_store_erase(struct device *dev,
290 struct device_attribute *attr,
291 const char *buf, size_t count)
292{
293 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
294 int erase = 0, ret;
295
296 sscanf(buf, "%d", &erase);
297 if (erase) {
298 ret = eeprom_93xx46_ew(edev, 1);
299 if (ret)
300 return ret;
301 ret = eeprom_93xx46_eral(edev);
302 if (ret)
303 return ret;
304 ret = eeprom_93xx46_ew(edev, 0);
305 if (ret)
306 return ret;
307 }
308 return count;
309}
310static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
311
312static int __devinit eeprom_93xx46_probe(struct spi_device *spi)
313{
314 struct eeprom_93xx46_platform_data *pd;
315 struct eeprom_93xx46_dev *edev;
316 int err;
317
318 pd = spi->dev.platform_data;
319 if (!pd) {
320 dev_err(&spi->dev, "missing platform data\n");
321 return -ENODEV;
322 }
323
324 edev = kzalloc(sizeof(*edev), GFP_KERNEL);
325 if (!edev)
326 return -ENOMEM;
327
328 if (pd->flags & EE_ADDR8)
329 edev->addrlen = 7;
330 else if (pd->flags & EE_ADDR16)
331 edev->addrlen = 6;
332 else {
333 dev_err(&spi->dev, "unspecified address type\n");
334 err = -EINVAL;
335 goto fail;
336 }
337
338 mutex_init(&edev->lock);
339
340 edev->spi = spi_dev_get(spi);
341 edev->pdata = pd;
342
343 sysfs_bin_attr_init(&edev->bin);
344 edev->bin.attr.name = "eeprom";
345 edev->bin.attr.mode = S_IRUSR;
346 edev->bin.read = eeprom_93xx46_bin_read;
347 edev->bin.size = 128;
348 if (!(pd->flags & EE_READONLY)) {
349 edev->bin.write = eeprom_93xx46_bin_write;
350 edev->bin.attr.mode |= S_IWUSR;
351 }
352
353 err = sysfs_create_bin_file(&spi->dev.kobj, &edev->bin);
354 if (err)
355 goto fail;
356
357 dev_info(&spi->dev, "%d-bit eeprom %s\n",
358 (pd->flags & EE_ADDR8) ? 8 : 16,
359 (pd->flags & EE_READONLY) ? "(readonly)" : "");
360
361 if (!(pd->flags & EE_READONLY)) {
362 if (device_create_file(&spi->dev, &dev_attr_erase))
363 dev_err(&spi->dev, "can't create erase interface\n");
364 }
365
366 dev_set_drvdata(&spi->dev, edev);
367 return 0;
368fail:
369 kfree(edev);
370 return err;
371}
372
373static int __devexit eeprom_93xx46_remove(struct spi_device *spi)
374{
375 struct eeprom_93xx46_dev *edev = dev_get_drvdata(&spi->dev);
376
377 if (!(edev->pdata->flags & EE_READONLY))
378 device_remove_file(&spi->dev, &dev_attr_erase);
379
380 sysfs_remove_bin_file(&spi->dev.kobj, &edev->bin);
381 dev_set_drvdata(&spi->dev, NULL);
382 kfree(edev);
383 return 0;
384}
385
386static struct spi_driver eeprom_93xx46_driver = {
387 .driver = {
388 .name = "93xx46",
389 .owner = THIS_MODULE,
390 },
391 .probe = eeprom_93xx46_probe,
392 .remove = __devexit_p(eeprom_93xx46_remove),
393};
394
395static int __init eeprom_93xx46_init(void)
396{
397 return spi_register_driver(&eeprom_93xx46_driver);
398}
399module_init(eeprom_93xx46_init);
400
401static void __exit eeprom_93xx46_exit(void)
402{
403 spi_unregister_driver(&eeprom_93xx46_driver);
404}
405module_exit(eeprom_93xx46_exit);
406
407MODULE_LICENSE("GPL");
408MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
409MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
410MODULE_ALIAS("spi:93xx46");
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Driver for 93xx46 EEPROMs
4 *
5 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
6 */
7
8#include <linux/delay.h>
9#include <linux/device.h>
10#include <linux/gpio/consumer.h>
11#include <linux/kernel.h>
12#include <linux/log2.h>
13#include <linux/module.h>
14#include <linux/mutex.h>
15#include <linux/of.h>
16#include <linux/of_device.h>
17#include <linux/of_gpio.h>
18#include <linux/slab.h>
19#include <linux/spi/spi.h>
20#include <linux/nvmem-provider.h>
21#include <linux/eeprom_93xx46.h>
22
23#define OP_START 0x4
24#define OP_WRITE (OP_START | 0x1)
25#define OP_READ (OP_START | 0x2)
26#define ADDR_EWDS 0x00
27#define ADDR_ERAL 0x20
28#define ADDR_EWEN 0x30
29
30struct eeprom_93xx46_devtype_data {
31 unsigned int quirks;
32 unsigned char flags;
33};
34
35static const struct eeprom_93xx46_devtype_data at93c46_data = {
36 .flags = EE_SIZE1K,
37};
38
39static const struct eeprom_93xx46_devtype_data at93c56_data = {
40 .flags = EE_SIZE2K,
41};
42
43static const struct eeprom_93xx46_devtype_data at93c66_data = {
44 .flags = EE_SIZE4K,
45};
46
47static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
48 .flags = EE_SIZE1K,
49 .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
50 EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
51};
52
53static const struct eeprom_93xx46_devtype_data microchip_93lc46b_data = {
54 .flags = EE_SIZE1K,
55 .quirks = EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE,
56};
57
58struct eeprom_93xx46_dev {
59 struct spi_device *spi;
60 struct eeprom_93xx46_platform_data *pdata;
61 struct mutex lock;
62 struct nvmem_config nvmem_config;
63 struct nvmem_device *nvmem;
64 int addrlen;
65 int size;
66};
67
68static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
69{
70 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
71}
72
73static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
74{
75 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
76}
77
78static inline bool has_quirk_extra_read_cycle(struct eeprom_93xx46_dev *edev)
79{
80 return edev->pdata->quirks & EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE;
81}
82
83static int eeprom_93xx46_read(void *priv, unsigned int off,
84 void *val, size_t count)
85{
86 struct eeprom_93xx46_dev *edev = priv;
87 char *buf = val;
88 int err = 0;
89 int bits;
90
91 if (unlikely(off >= edev->size))
92 return 0;
93 if ((off + count) > edev->size)
94 count = edev->size - off;
95 if (unlikely(!count))
96 return count;
97
98 mutex_lock(&edev->lock);
99
100 if (edev->pdata->prepare)
101 edev->pdata->prepare(edev);
102
103 /* The opcode in front of the address is three bits. */
104 bits = edev->addrlen + 3;
105
106 while (count) {
107 struct spi_message m;
108 struct spi_transfer t[2] = { { 0 } };
109 u16 cmd_addr = OP_READ << edev->addrlen;
110 size_t nbytes = count;
111
112 if (edev->pdata->flags & EE_ADDR8) {
113 cmd_addr |= off;
114 if (has_quirk_single_word_read(edev))
115 nbytes = 1;
116 } else {
117 cmd_addr |= (off >> 1);
118 if (has_quirk_single_word_read(edev))
119 nbytes = 2;
120 }
121
122 dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
123 cmd_addr, edev->spi->max_speed_hz);
124
125 if (has_quirk_extra_read_cycle(edev)) {
126 cmd_addr <<= 1;
127 bits += 1;
128 }
129
130 spi_message_init(&m);
131
132 t[0].tx_buf = (char *)&cmd_addr;
133 t[0].len = 2;
134 t[0].bits_per_word = bits;
135 spi_message_add_tail(&t[0], &m);
136
137 t[1].rx_buf = buf;
138 t[1].len = count;
139 t[1].bits_per_word = 8;
140 spi_message_add_tail(&t[1], &m);
141
142 err = spi_sync(edev->spi, &m);
143 /* have to wait at least Tcsl ns */
144 ndelay(250);
145
146 if (err) {
147 dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
148 nbytes, (int)off, err);
149 break;
150 }
151
152 buf += nbytes;
153 off += nbytes;
154 count -= nbytes;
155 }
156
157 if (edev->pdata->finish)
158 edev->pdata->finish(edev);
159
160 mutex_unlock(&edev->lock);
161
162 return err;
163}
164
165static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
166{
167 struct spi_message m;
168 struct spi_transfer t;
169 int bits, ret;
170 u16 cmd_addr;
171
172 /* The opcode in front of the address is three bits. */
173 bits = edev->addrlen + 3;
174
175 cmd_addr = OP_START << edev->addrlen;
176 if (edev->pdata->flags & EE_ADDR8)
177 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
178 else
179 cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
180
181 if (has_quirk_instruction_length(edev)) {
182 cmd_addr <<= 2;
183 bits += 2;
184 }
185
186 dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
187 is_on ? "en" : "ds", cmd_addr, bits);
188
189 spi_message_init(&m);
190 memset(&t, 0, sizeof(t));
191
192 t.tx_buf = &cmd_addr;
193 t.len = 2;
194 t.bits_per_word = bits;
195 spi_message_add_tail(&t, &m);
196
197 mutex_lock(&edev->lock);
198
199 if (edev->pdata->prepare)
200 edev->pdata->prepare(edev);
201
202 ret = spi_sync(edev->spi, &m);
203 /* have to wait at least Tcsl ns */
204 ndelay(250);
205 if (ret)
206 dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
207 is_on ? "en" : "dis", ret);
208
209 if (edev->pdata->finish)
210 edev->pdata->finish(edev);
211
212 mutex_unlock(&edev->lock);
213 return ret;
214}
215
216static ssize_t
217eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
218 const char *buf, unsigned off)
219{
220 struct spi_message m;
221 struct spi_transfer t[2];
222 int bits, data_len, ret;
223 u16 cmd_addr;
224
225 if (unlikely(off >= edev->size))
226 return -EINVAL;
227
228 /* The opcode in front of the address is three bits. */
229 bits = edev->addrlen + 3;
230
231 cmd_addr = OP_WRITE << edev->addrlen;
232
233 if (edev->pdata->flags & EE_ADDR8) {
234 cmd_addr |= off;
235 data_len = 1;
236 } else {
237 cmd_addr |= (off >> 1);
238 data_len = 2;
239 }
240
241 dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
242
243 spi_message_init(&m);
244 memset(t, 0, sizeof(t));
245
246 t[0].tx_buf = (char *)&cmd_addr;
247 t[0].len = 2;
248 t[0].bits_per_word = bits;
249 spi_message_add_tail(&t[0], &m);
250
251 t[1].tx_buf = buf;
252 t[1].len = data_len;
253 t[1].bits_per_word = 8;
254 spi_message_add_tail(&t[1], &m);
255
256 ret = spi_sync(edev->spi, &m);
257 /* have to wait program cycle time Twc ms */
258 mdelay(6);
259 return ret;
260}
261
262static int eeprom_93xx46_write(void *priv, unsigned int off,
263 void *val, size_t count)
264{
265 struct eeprom_93xx46_dev *edev = priv;
266 char *buf = val;
267 int i, ret, step = 1;
268
269 if (unlikely(off >= edev->size))
270 return -EFBIG;
271 if ((off + count) > edev->size)
272 count = edev->size - off;
273 if (unlikely(!count))
274 return count;
275
276 /* only write even number of bytes on 16-bit devices */
277 if (edev->pdata->flags & EE_ADDR16) {
278 step = 2;
279 count &= ~1;
280 }
281
282 /* erase/write enable */
283 ret = eeprom_93xx46_ew(edev, 1);
284 if (ret)
285 return ret;
286
287 mutex_lock(&edev->lock);
288
289 if (edev->pdata->prepare)
290 edev->pdata->prepare(edev);
291
292 for (i = 0; i < count; i += step) {
293 ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
294 if (ret) {
295 dev_err(&edev->spi->dev, "write failed at %d: %d\n",
296 (int)off + i, ret);
297 break;
298 }
299 }
300
301 if (edev->pdata->finish)
302 edev->pdata->finish(edev);
303
304 mutex_unlock(&edev->lock);
305
306 /* erase/write disable */
307 eeprom_93xx46_ew(edev, 0);
308 return ret;
309}
310
311static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
312{
313 struct eeprom_93xx46_platform_data *pd = edev->pdata;
314 struct spi_message m;
315 struct spi_transfer t;
316 int bits, ret;
317 u16 cmd_addr;
318
319 /* The opcode in front of the address is three bits. */
320 bits = edev->addrlen + 3;
321
322 cmd_addr = OP_START << edev->addrlen;
323 if (edev->pdata->flags & EE_ADDR8)
324 cmd_addr |= ADDR_ERAL << 1;
325 else
326 cmd_addr |= ADDR_ERAL;
327
328 if (has_quirk_instruction_length(edev)) {
329 cmd_addr <<= 2;
330 bits += 2;
331 }
332
333 dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
334
335 spi_message_init(&m);
336 memset(&t, 0, sizeof(t));
337
338 t.tx_buf = &cmd_addr;
339 t.len = 2;
340 t.bits_per_word = bits;
341 spi_message_add_tail(&t, &m);
342
343 mutex_lock(&edev->lock);
344
345 if (edev->pdata->prepare)
346 edev->pdata->prepare(edev);
347
348 ret = spi_sync(edev->spi, &m);
349 if (ret)
350 dev_err(&edev->spi->dev, "erase error %d\n", ret);
351 /* have to wait erase cycle time Tec ms */
352 mdelay(6);
353
354 if (pd->finish)
355 pd->finish(edev);
356
357 mutex_unlock(&edev->lock);
358 return ret;
359}
360
361static ssize_t eeprom_93xx46_store_erase(struct device *dev,
362 struct device_attribute *attr,
363 const char *buf, size_t count)
364{
365 struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
366 int erase = 0, ret;
367
368 sscanf(buf, "%d", &erase);
369 if (erase) {
370 ret = eeprom_93xx46_ew(edev, 1);
371 if (ret)
372 return ret;
373 ret = eeprom_93xx46_eral(edev);
374 if (ret)
375 return ret;
376 ret = eeprom_93xx46_ew(edev, 0);
377 if (ret)
378 return ret;
379 }
380 return count;
381}
382static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
383
384static void select_assert(void *context)
385{
386 struct eeprom_93xx46_dev *edev = context;
387
388 gpiod_set_value_cansleep(edev->pdata->select, 1);
389}
390
391static void select_deassert(void *context)
392{
393 struct eeprom_93xx46_dev *edev = context;
394
395 gpiod_set_value_cansleep(edev->pdata->select, 0);
396}
397
398static const struct of_device_id eeprom_93xx46_of_table[] = {
399 { .compatible = "eeprom-93xx46", .data = &at93c46_data, },
400 { .compatible = "atmel,at93c46", .data = &at93c46_data, },
401 { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
402 { .compatible = "atmel,at93c56", .data = &at93c56_data, },
403 { .compatible = "atmel,at93c66", .data = &at93c66_data, },
404 { .compatible = "microchip,93lc46b", .data = µchip_93lc46b_data, },
405 {}
406};
407MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
408
409static const struct spi_device_id eeprom_93xx46_spi_ids[] = {
410 { .name = "eeprom-93xx46",
411 .driver_data = (kernel_ulong_t)&at93c46_data, },
412 { .name = "at93c46",
413 .driver_data = (kernel_ulong_t)&at93c46_data, },
414 { .name = "at93c46d",
415 .driver_data = (kernel_ulong_t)&atmel_at93c46d_data, },
416 { .name = "at93c56",
417 .driver_data = (kernel_ulong_t)&at93c56_data, },
418 { .name = "at93c66",
419 .driver_data = (kernel_ulong_t)&at93c66_data, },
420 { .name = "93lc46b",
421 .driver_data = (kernel_ulong_t)µchip_93lc46b_data, },
422 {}
423};
424MODULE_DEVICE_TABLE(spi, eeprom_93xx46_spi_ids);
425
426static int eeprom_93xx46_probe_dt(struct spi_device *spi)
427{
428 const struct of_device_id *of_id =
429 of_match_device(eeprom_93xx46_of_table, &spi->dev);
430 struct device_node *np = spi->dev.of_node;
431 struct eeprom_93xx46_platform_data *pd;
432 u32 tmp;
433 int ret;
434
435 pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
436 if (!pd)
437 return -ENOMEM;
438
439 ret = of_property_read_u32(np, "data-size", &tmp);
440 if (ret < 0) {
441 dev_err(&spi->dev, "data-size property not found\n");
442 return ret;
443 }
444
445 if (tmp == 8) {
446 pd->flags |= EE_ADDR8;
447 } else if (tmp == 16) {
448 pd->flags |= EE_ADDR16;
449 } else {
450 dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
451 return -EINVAL;
452 }
453
454 if (of_property_read_bool(np, "read-only"))
455 pd->flags |= EE_READONLY;
456
457 pd->select = devm_gpiod_get_optional(&spi->dev, "select",
458 GPIOD_OUT_LOW);
459 if (IS_ERR(pd->select))
460 return PTR_ERR(pd->select);
461
462 pd->prepare = select_assert;
463 pd->finish = select_deassert;
464 gpiod_direction_output(pd->select, 0);
465
466 if (of_id->data) {
467 const struct eeprom_93xx46_devtype_data *data = of_id->data;
468
469 pd->quirks = data->quirks;
470 pd->flags |= data->flags;
471 }
472
473 spi->dev.platform_data = pd;
474
475 return 0;
476}
477
478static int eeprom_93xx46_probe(struct spi_device *spi)
479{
480 struct eeprom_93xx46_platform_data *pd;
481 struct eeprom_93xx46_dev *edev;
482 int err;
483
484 if (spi->dev.of_node) {
485 err = eeprom_93xx46_probe_dt(spi);
486 if (err < 0)
487 return err;
488 }
489
490 pd = spi->dev.platform_data;
491 if (!pd) {
492 dev_err(&spi->dev, "missing platform data\n");
493 return -ENODEV;
494 }
495
496 edev = devm_kzalloc(&spi->dev, sizeof(*edev), GFP_KERNEL);
497 if (!edev)
498 return -ENOMEM;
499
500 if (pd->flags & EE_SIZE1K)
501 edev->size = 128;
502 else if (pd->flags & EE_SIZE2K)
503 edev->size = 256;
504 else if (pd->flags & EE_SIZE4K)
505 edev->size = 512;
506 else {
507 dev_err(&spi->dev, "unspecified size\n");
508 return -EINVAL;
509 }
510
511 if (pd->flags & EE_ADDR8)
512 edev->addrlen = ilog2(edev->size);
513 else if (pd->flags & EE_ADDR16)
514 edev->addrlen = ilog2(edev->size) - 1;
515 else {
516 dev_err(&spi->dev, "unspecified address type\n");
517 return -EINVAL;
518 }
519
520 mutex_init(&edev->lock);
521
522 edev->spi = spi;
523 edev->pdata = pd;
524
525 edev->nvmem_config.type = NVMEM_TYPE_EEPROM;
526 edev->nvmem_config.name = dev_name(&spi->dev);
527 edev->nvmem_config.dev = &spi->dev;
528 edev->nvmem_config.read_only = pd->flags & EE_READONLY;
529 edev->nvmem_config.root_only = true;
530 edev->nvmem_config.owner = THIS_MODULE;
531 edev->nvmem_config.compat = true;
532 edev->nvmem_config.base_dev = &spi->dev;
533 edev->nvmem_config.reg_read = eeprom_93xx46_read;
534 edev->nvmem_config.reg_write = eeprom_93xx46_write;
535 edev->nvmem_config.priv = edev;
536 edev->nvmem_config.stride = 4;
537 edev->nvmem_config.word_size = 1;
538 edev->nvmem_config.size = edev->size;
539
540 edev->nvmem = devm_nvmem_register(&spi->dev, &edev->nvmem_config);
541 if (IS_ERR(edev->nvmem))
542 return PTR_ERR(edev->nvmem);
543
544 dev_info(&spi->dev, "%d-bit eeprom containing %d bytes %s\n",
545 (pd->flags & EE_ADDR8) ? 8 : 16,
546 edev->size,
547 (pd->flags & EE_READONLY) ? "(readonly)" : "");
548
549 if (!(pd->flags & EE_READONLY)) {
550 if (device_create_file(&spi->dev, &dev_attr_erase))
551 dev_err(&spi->dev, "can't create erase interface\n");
552 }
553
554 spi_set_drvdata(spi, edev);
555 return 0;
556}
557
558static void eeprom_93xx46_remove(struct spi_device *spi)
559{
560 struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
561
562 if (!(edev->pdata->flags & EE_READONLY))
563 device_remove_file(&spi->dev, &dev_attr_erase);
564}
565
566static struct spi_driver eeprom_93xx46_driver = {
567 .driver = {
568 .name = "93xx46",
569 .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
570 },
571 .probe = eeprom_93xx46_probe,
572 .remove = eeprom_93xx46_remove,
573 .id_table = eeprom_93xx46_spi_ids,
574};
575
576module_spi_driver(eeprom_93xx46_driver);
577
578MODULE_LICENSE("GPL");
579MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
580MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
581MODULE_ALIAS("spi:93xx46");
582MODULE_ALIAS("spi:eeprom-93xx46");
583MODULE_ALIAS("spi:93lc46b");