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v3.1
 
  1/*
  2 * Driver for 93xx46 EEPROMs
  3 *
  4 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
  5 *
  6 * This program is free software; you can redistribute it and/or modify
  7 * it under the terms of the GNU General Public License version 2 as
  8 * published by the Free Software Foundation.
  9 */
 10
 11#include <linux/delay.h>
 12#include <linux/device.h>
 
 13#include <linux/kernel.h>
 14#include <linux/init.h>
 15#include <linux/module.h>
 16#include <linux/mutex.h>
 
 
 17#include <linux/slab.h>
 18#include <linux/spi/spi.h>
 19#include <linux/sysfs.h>
 20#include <linux/eeprom_93xx46.h>
 21
 22#define OP_START	0x4
 23#define OP_WRITE	(OP_START | 0x1)
 24#define OP_READ		(OP_START | 0x2)
 25#define ADDR_EWDS	0x00
 26#define ADDR_ERAL	0x20
 27#define ADDR_EWEN	0x30
 28
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 29struct eeprom_93xx46_dev {
 30	struct spi_device *spi;
 31	struct eeprom_93xx46_platform_data *pdata;
 32	struct bin_attribute bin;
 33	struct mutex lock;
 
 
 34	int addrlen;
 
 35};
 36
 37static ssize_t
 38eeprom_93xx46_bin_read(struct file *filp, struct kobject *kobj,
 39		       struct bin_attribute *bin_attr,
 40		       char *buf, loff_t off, size_t count)
 41{
 42	struct eeprom_93xx46_dev *edev;
 43	struct device *dev;
 44	struct spi_message m;
 45	struct spi_transfer t[2];
 46	int bits, ret;
 47	u16 cmd_addr;
 
 48
 49	dev = container_of(kobj, struct device, kobj);
 50	edev = dev_get_drvdata(dev);
 
 
 51
 52	if (unlikely(off >= edev->bin.size))
 
 
 
 
 
 
 
 
 53		return 0;
 54	if ((off + count) > edev->bin.size)
 55		count = edev->bin.size - off;
 56	if (unlikely(!count))
 57		return count;
 58
 59	cmd_addr = OP_READ << edev->addrlen;
 60
 61	if (edev->addrlen == 7) {
 62		cmd_addr |= off & 0x7f;
 63		bits = 10;
 64	} else {
 65		cmd_addr |= off & 0x3f;
 66		bits = 9;
 67	}
 68
 69	dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
 70		cmd_addr, edev->spi->max_speed_hz);
 71
 72	spi_message_init(&m);
 73	memset(t, 0, sizeof(t));
 
 
 
 
 
 
 
 
 
 
 
 
 
 74
 75	t[0].tx_buf = (char *)&cmd_addr;
 76	t[0].len = 2;
 77	t[0].bits_per_word = bits;
 78	spi_message_add_tail(&t[0], &m);
 79
 80	t[1].rx_buf = buf;
 81	t[1].len = count;
 82	t[1].bits_per_word = 8;
 83	spi_message_add_tail(&t[1], &m);
 84
 85	mutex_lock(&edev->lock);
 86
 87	if (edev->pdata->prepare)
 88		edev->pdata->prepare(edev);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 89
 90	ret = spi_sync(edev->spi, &m);
 91	/* have to wait at least Tcsl ns */
 92	ndelay(250);
 93	if (ret) {
 94		dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
 95			count, (int)off, ret);
 96	}
 97
 98	if (edev->pdata->finish)
 99		edev->pdata->finish(edev);
100
101	mutex_unlock(&edev->lock);
102	return ret ? : count;
 
103}
104
105static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
106{
107	struct spi_message m;
108	struct spi_transfer t;
109	int bits, ret;
110	u16 cmd_addr;
111
 
 
 
112	cmd_addr = OP_START << edev->addrlen;
113	if (edev->addrlen == 7) {
114		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
115		bits = 10;
116	} else {
117		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
118		bits = 9;
 
 
 
119	}
120
121	dev_dbg(&edev->spi->dev, "ew cmd 0x%04x\n", cmd_addr);
 
122
123	spi_message_init(&m);
124	memset(&t, 0, sizeof(t));
125
126	t.tx_buf = &cmd_addr;
127	t.len = 2;
128	t.bits_per_word = bits;
129	spi_message_add_tail(&t, &m);
130
131	mutex_lock(&edev->lock);
132
133	if (edev->pdata->prepare)
134		edev->pdata->prepare(edev);
135
136	ret = spi_sync(edev->spi, &m);
137	/* have to wait at least Tcsl ns */
138	ndelay(250);
139	if (ret)
140		dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
141			is_on ? "en" : "dis", ret);
142
143	if (edev->pdata->finish)
144		edev->pdata->finish(edev);
145
146	mutex_unlock(&edev->lock);
147	return ret;
148}
149
150static ssize_t
151eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
152			 const char *buf, unsigned off)
153{
154	struct spi_message m;
155	struct spi_transfer t[2];
156	int bits, data_len, ret;
157	u16 cmd_addr;
158
 
 
 
 
 
 
159	cmd_addr = OP_WRITE << edev->addrlen;
160
161	if (edev->addrlen == 7) {
162		cmd_addr |= off & 0x7f;
163		bits = 10;
164		data_len = 1;
165	} else {
166		cmd_addr |= off & 0x3f;
167		bits = 9;
168		data_len = 2;
169	}
170
171	dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
172
173	spi_message_init(&m);
174	memset(t, 0, sizeof(t));
175
176	t[0].tx_buf = (char *)&cmd_addr;
177	t[0].len = 2;
178	t[0].bits_per_word = bits;
179	spi_message_add_tail(&t[0], &m);
180
181	t[1].tx_buf = buf;
182	t[1].len = data_len;
183	t[1].bits_per_word = 8;
184	spi_message_add_tail(&t[1], &m);
185
186	ret = spi_sync(edev->spi, &m);
187	/* have to wait program cycle time Twc ms */
188	mdelay(6);
189	return ret;
190}
191
192static ssize_t
193eeprom_93xx46_bin_write(struct file *filp, struct kobject *kobj,
194			struct bin_attribute *bin_attr,
195			char *buf, loff_t off, size_t count)
196{
197	struct eeprom_93xx46_dev *edev;
198	struct device *dev;
199	int i, ret, step = 1;
200
201	dev = container_of(kobj, struct device, kobj);
202	edev = dev_get_drvdata(dev);
203
204	if (unlikely(off >= edev->bin.size))
205		return 0;
206	if ((off + count) > edev->bin.size)
207		count = edev->bin.size - off;
208	if (unlikely(!count))
209		return count;
210
211	/* only write even number of bytes on 16-bit devices */
212	if (edev->addrlen == 6) {
213		step = 2;
214		count &= ~1;
215	}
216
217	/* erase/write enable */
218	ret = eeprom_93xx46_ew(edev, 1);
219	if (ret)
220		return ret;
221
222	mutex_lock(&edev->lock);
223
224	if (edev->pdata->prepare)
225		edev->pdata->prepare(edev);
226
227	for (i = 0; i < count; i += step) {
228		ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
229		if (ret) {
230			dev_err(&edev->spi->dev, "write failed at %d: %d\n",
231				(int)off + i, ret);
232			break;
233		}
234	}
235
236	if (edev->pdata->finish)
237		edev->pdata->finish(edev);
238
239	mutex_unlock(&edev->lock);
240
241	/* erase/write disable */
242	eeprom_93xx46_ew(edev, 0);
243	return ret ? : count;
244}
245
246static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
247{
248	struct eeprom_93xx46_platform_data *pd = edev->pdata;
249	struct spi_message m;
250	struct spi_transfer t;
251	int bits, ret;
252	u16 cmd_addr;
253
 
 
 
254	cmd_addr = OP_START << edev->addrlen;
255	if (edev->addrlen == 7) {
256		cmd_addr |= ADDR_ERAL << 1;
257		bits = 10;
258	} else {
259		cmd_addr |= ADDR_ERAL;
260		bits = 9;
 
 
 
261	}
262
 
 
263	spi_message_init(&m);
264	memset(&t, 0, sizeof(t));
265
266	t.tx_buf = &cmd_addr;
267	t.len = 2;
268	t.bits_per_word = bits;
269	spi_message_add_tail(&t, &m);
270
271	mutex_lock(&edev->lock);
272
273	if (edev->pdata->prepare)
274		edev->pdata->prepare(edev);
275
276	ret = spi_sync(edev->spi, &m);
277	if (ret)
278		dev_err(&edev->spi->dev, "erase error %d\n", ret);
279	/* have to wait erase cycle time Tec ms */
280	mdelay(6);
281
282	if (pd->finish)
283		pd->finish(edev);
284
285	mutex_unlock(&edev->lock);
286	return ret;
287}
288
289static ssize_t eeprom_93xx46_store_erase(struct device *dev,
290					 struct device_attribute *attr,
291					 const char *buf, size_t count)
292{
293	struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
294	int erase = 0, ret;
295
296	sscanf(buf, "%d", &erase);
297	if (erase) {
298		ret = eeprom_93xx46_ew(edev, 1);
299		if (ret)
300			return ret;
301		ret = eeprom_93xx46_eral(edev);
302		if (ret)
303			return ret;
304		ret = eeprom_93xx46_ew(edev, 0);
305		if (ret)
306			return ret;
307	}
308	return count;
309}
310static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
311
312static int __devinit eeprom_93xx46_probe(struct spi_device *spi)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
313{
314	struct eeprom_93xx46_platform_data *pd;
315	struct eeprom_93xx46_dev *edev;
316	int err;
317
 
 
 
 
 
 
318	pd = spi->dev.platform_data;
319	if (!pd) {
320		dev_err(&spi->dev, "missing platform data\n");
321		return -ENODEV;
322	}
323
324	edev = kzalloc(sizeof(*edev), GFP_KERNEL);
325	if (!edev)
326		return -ENOMEM;
327
 
 
 
 
 
 
 
 
 
 
 
328	if (pd->flags & EE_ADDR8)
329		edev->addrlen = 7;
330	else if (pd->flags & EE_ADDR16)
331		edev->addrlen = 6;
332	else {
333		dev_err(&spi->dev, "unspecified address type\n");
334		err = -EINVAL;
335		goto fail;
336	}
337
338	mutex_init(&edev->lock);
339
340	edev->spi = spi_dev_get(spi);
341	edev->pdata = pd;
342
343	sysfs_bin_attr_init(&edev->bin);
344	edev->bin.attr.name = "eeprom";
345	edev->bin.attr.mode = S_IRUSR;
346	edev->bin.read = eeprom_93xx46_bin_read;
347	edev->bin.size = 128;
348	if (!(pd->flags & EE_READONLY)) {
349		edev->bin.write = eeprom_93xx46_bin_write;
350		edev->bin.attr.mode |= S_IWUSR;
351	}
352
353	err = sysfs_create_bin_file(&spi->dev.kobj, &edev->bin);
354	if (err)
355		goto fail;
 
 
 
 
 
356
357	dev_info(&spi->dev, "%d-bit eeprom %s\n",
358		(pd->flags & EE_ADDR8) ? 8 : 16,
 
359		(pd->flags & EE_READONLY) ? "(readonly)" : "");
360
361	if (!(pd->flags & EE_READONLY)) {
362		if (device_create_file(&spi->dev, &dev_attr_erase))
363			dev_err(&spi->dev, "can't create erase interface\n");
364	}
365
366	dev_set_drvdata(&spi->dev, edev);
367	return 0;
368fail:
369	kfree(edev);
370	return err;
371}
372
373static int __devexit eeprom_93xx46_remove(struct spi_device *spi)
374{
375	struct eeprom_93xx46_dev *edev = dev_get_drvdata(&spi->dev);
376
377	if (!(edev->pdata->flags & EE_READONLY))
378		device_remove_file(&spi->dev, &dev_attr_erase);
379
380	sysfs_remove_bin_file(&spi->dev.kobj, &edev->bin);
381	dev_set_drvdata(&spi->dev, NULL);
382	kfree(edev);
383	return 0;
384}
385
386static struct spi_driver eeprom_93xx46_driver = {
387	.driver = {
388		.name	= "93xx46",
389		.owner	= THIS_MODULE,
390	},
391	.probe		= eeprom_93xx46_probe,
392	.remove		= __devexit_p(eeprom_93xx46_remove),
 
393};
394
395static int __init eeprom_93xx46_init(void)
396{
397	return spi_register_driver(&eeprom_93xx46_driver);
398}
399module_init(eeprom_93xx46_init);
400
401static void __exit eeprom_93xx46_exit(void)
402{
403	spi_unregister_driver(&eeprom_93xx46_driver);
404}
405module_exit(eeprom_93xx46_exit);
406
407MODULE_LICENSE("GPL");
408MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
409MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
410MODULE_ALIAS("spi:93xx46");
v6.9.4
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Driver for 93xx46 EEPROMs
  4 *
  5 * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
 
 
 
 
  6 */
  7
  8#include <linux/delay.h>
  9#include <linux/device.h>
 10#include <linux/gpio/consumer.h>
 11#include <linux/kernel.h>
 12#include <linux/log2.h>
 13#include <linux/module.h>
 14#include <linux/mutex.h>
 15#include <linux/of.h>
 16#include <linux/of_device.h>
 17#include <linux/slab.h>
 18#include <linux/spi/spi.h>
 19#include <linux/nvmem-provider.h>
 20#include <linux/eeprom_93xx46.h>
 21
 22#define OP_START	0x4
 23#define OP_WRITE	(OP_START | 0x1)
 24#define OP_READ		(OP_START | 0x2)
 25#define ADDR_EWDS	0x00
 26#define ADDR_ERAL	0x20
 27#define ADDR_EWEN	0x30
 28
 29struct eeprom_93xx46_devtype_data {
 30	unsigned int quirks;
 31	unsigned char flags;
 32};
 33
 34static const struct eeprom_93xx46_devtype_data at93c46_data = {
 35	.flags = EE_SIZE1K,
 36};
 37
 38static const struct eeprom_93xx46_devtype_data at93c56_data = {
 39	.flags = EE_SIZE2K,
 40};
 41
 42static const struct eeprom_93xx46_devtype_data at93c66_data = {
 43	.flags = EE_SIZE4K,
 44};
 45
 46static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
 47	.flags = EE_SIZE1K,
 48	.quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
 49		  EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
 50};
 51
 52static const struct eeprom_93xx46_devtype_data microchip_93lc46b_data = {
 53	.flags = EE_SIZE1K,
 54	.quirks = EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE,
 55};
 56
 57struct eeprom_93xx46_dev {
 58	struct spi_device *spi;
 59	struct eeprom_93xx46_platform_data *pdata;
 
 60	struct mutex lock;
 61	struct nvmem_config nvmem_config;
 62	struct nvmem_device *nvmem;
 63	int addrlen;
 64	int size;
 65};
 66
 67static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
 
 
 
 68{
 69	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
 70}
 71
 72static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
 73{
 74	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
 75}
 76
 77static inline bool has_quirk_extra_read_cycle(struct eeprom_93xx46_dev *edev)
 78{
 79	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE;
 80}
 81
 82static int eeprom_93xx46_read(void *priv, unsigned int off,
 83			      void *val, size_t count)
 84{
 85	struct eeprom_93xx46_dev *edev = priv;
 86	char *buf = val;
 87	int err = 0;
 88	int bits;
 89
 90	if (unlikely(off >= edev->size))
 91		return 0;
 92	if ((off + count) > edev->size)
 93		count = edev->size - off;
 94	if (unlikely(!count))
 95		return count;
 96
 97	mutex_lock(&edev->lock);
 98
 99	if (edev->pdata->prepare)
100		edev->pdata->prepare(edev);
 
 
 
 
 
101
102	/* The opcode in front of the address is three bits. */
103	bits = edev->addrlen + 3;
104
105	while (count) {
106		struct spi_message m;
107		struct spi_transfer t[2] = { { 0 } };
108		u16 cmd_addr = OP_READ << edev->addrlen;
109		size_t nbytes = count;
110
111		if (edev->pdata->flags & EE_ADDR8) {
112			cmd_addr |= off;
113			if (has_quirk_single_word_read(edev))
114				nbytes = 1;
115		} else {
116			cmd_addr |= (off >> 1);
117			if (has_quirk_single_word_read(edev))
118				nbytes = 2;
119		}
120
121		dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
122			cmd_addr, edev->spi->max_speed_hz);
 
 
123
124		if (has_quirk_extra_read_cycle(edev)) {
125			cmd_addr <<= 1;
126			bits += 1;
127		}
128
129		spi_message_init(&m);
130
131		t[0].tx_buf = (char *)&cmd_addr;
132		t[0].len = 2;
133		t[0].bits_per_word = bits;
134		spi_message_add_tail(&t[0], &m);
135
136		t[1].rx_buf = buf;
137		t[1].len = count;
138		t[1].bits_per_word = 8;
139		spi_message_add_tail(&t[1], &m);
140
141		err = spi_sync(edev->spi, &m);
142		/* have to wait at least Tcsl ns */
143		ndelay(250);
144
145		if (err) {
146			dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
147				nbytes, (int)off, err);
148			break;
149		}
150
151		buf += nbytes;
152		off += nbytes;
153		count -= nbytes;
 
 
 
154	}
155
156	if (edev->pdata->finish)
157		edev->pdata->finish(edev);
158
159	mutex_unlock(&edev->lock);
160
161	return err;
162}
163
164static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
165{
166	struct spi_message m;
167	struct spi_transfer t;
168	int bits, ret;
169	u16 cmd_addr;
170
171	/* The opcode in front of the address is three bits. */
172	bits = edev->addrlen + 3;
173
174	cmd_addr = OP_START << edev->addrlen;
175	if (edev->pdata->flags & EE_ADDR8)
176		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
177	else
 
178		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
179
180	if (has_quirk_instruction_length(edev)) {
181		cmd_addr <<= 2;
182		bits += 2;
183	}
184
185	dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
186			is_on ? "en" : "ds", cmd_addr, bits);
187
188	spi_message_init(&m);
189	memset(&t, 0, sizeof(t));
190
191	t.tx_buf = &cmd_addr;
192	t.len = 2;
193	t.bits_per_word = bits;
194	spi_message_add_tail(&t, &m);
195
196	mutex_lock(&edev->lock);
197
198	if (edev->pdata->prepare)
199		edev->pdata->prepare(edev);
200
201	ret = spi_sync(edev->spi, &m);
202	/* have to wait at least Tcsl ns */
203	ndelay(250);
204	if (ret)
205		dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
206			is_on ? "en" : "dis", ret);
207
208	if (edev->pdata->finish)
209		edev->pdata->finish(edev);
210
211	mutex_unlock(&edev->lock);
212	return ret;
213}
214
215static ssize_t
216eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
217			 const char *buf, unsigned off)
218{
219	struct spi_message m;
220	struct spi_transfer t[2];
221	int bits, data_len, ret;
222	u16 cmd_addr;
223
224	if (unlikely(off >= edev->size))
225		return -EINVAL;
226
227	/* The opcode in front of the address is three bits. */
228	bits = edev->addrlen + 3;
229
230	cmd_addr = OP_WRITE << edev->addrlen;
231
232	if (edev->pdata->flags & EE_ADDR8) {
233		cmd_addr |= off;
 
234		data_len = 1;
235	} else {
236		cmd_addr |= (off >> 1);
 
237		data_len = 2;
238	}
239
240	dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
241
242	spi_message_init(&m);
243	memset(t, 0, sizeof(t));
244
245	t[0].tx_buf = (char *)&cmd_addr;
246	t[0].len = 2;
247	t[0].bits_per_word = bits;
248	spi_message_add_tail(&t[0], &m);
249
250	t[1].tx_buf = buf;
251	t[1].len = data_len;
252	t[1].bits_per_word = 8;
253	spi_message_add_tail(&t[1], &m);
254
255	ret = spi_sync(edev->spi, &m);
256	/* have to wait program cycle time Twc ms */
257	mdelay(6);
258	return ret;
259}
260
261static int eeprom_93xx46_write(void *priv, unsigned int off,
262				   void *val, size_t count)
 
 
263{
264	struct eeprom_93xx46_dev *edev = priv;
265	char *buf = val;
266	int i, ret, step = 1;
267
268	if (unlikely(off >= edev->size))
269		return -EFBIG;
270	if ((off + count) > edev->size)
271		count = edev->size - off;
 
 
 
272	if (unlikely(!count))
273		return count;
274
275	/* only write even number of bytes on 16-bit devices */
276	if (edev->pdata->flags & EE_ADDR16) {
277		step = 2;
278		count &= ~1;
279	}
280
281	/* erase/write enable */
282	ret = eeprom_93xx46_ew(edev, 1);
283	if (ret)
284		return ret;
285
286	mutex_lock(&edev->lock);
287
288	if (edev->pdata->prepare)
289		edev->pdata->prepare(edev);
290
291	for (i = 0; i < count; i += step) {
292		ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
293		if (ret) {
294			dev_err(&edev->spi->dev, "write failed at %d: %d\n",
295				(int)off + i, ret);
296			break;
297		}
298	}
299
300	if (edev->pdata->finish)
301		edev->pdata->finish(edev);
302
303	mutex_unlock(&edev->lock);
304
305	/* erase/write disable */
306	eeprom_93xx46_ew(edev, 0);
307	return ret;
308}
309
310static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
311{
312	struct eeprom_93xx46_platform_data *pd = edev->pdata;
313	struct spi_message m;
314	struct spi_transfer t;
315	int bits, ret;
316	u16 cmd_addr;
317
318	/* The opcode in front of the address is three bits. */
319	bits = edev->addrlen + 3;
320
321	cmd_addr = OP_START << edev->addrlen;
322	if (edev->pdata->flags & EE_ADDR8)
323		cmd_addr |= ADDR_ERAL << 1;
324	else
 
325		cmd_addr |= ADDR_ERAL;
326
327	if (has_quirk_instruction_length(edev)) {
328		cmd_addr <<= 2;
329		bits += 2;
330	}
331
332	dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
333
334	spi_message_init(&m);
335	memset(&t, 0, sizeof(t));
336
337	t.tx_buf = &cmd_addr;
338	t.len = 2;
339	t.bits_per_word = bits;
340	spi_message_add_tail(&t, &m);
341
342	mutex_lock(&edev->lock);
343
344	if (edev->pdata->prepare)
345		edev->pdata->prepare(edev);
346
347	ret = spi_sync(edev->spi, &m);
348	if (ret)
349		dev_err(&edev->spi->dev, "erase error %d\n", ret);
350	/* have to wait erase cycle time Tec ms */
351	mdelay(6);
352
353	if (pd->finish)
354		pd->finish(edev);
355
356	mutex_unlock(&edev->lock);
357	return ret;
358}
359
360static ssize_t eeprom_93xx46_store_erase(struct device *dev,
361					 struct device_attribute *attr,
362					 const char *buf, size_t count)
363{
364	struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
365	int erase = 0, ret;
366
367	sscanf(buf, "%d", &erase);
368	if (erase) {
369		ret = eeprom_93xx46_ew(edev, 1);
370		if (ret)
371			return ret;
372		ret = eeprom_93xx46_eral(edev);
373		if (ret)
374			return ret;
375		ret = eeprom_93xx46_ew(edev, 0);
376		if (ret)
377			return ret;
378	}
379	return count;
380}
381static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
382
383static void select_assert(void *context)
384{
385	struct eeprom_93xx46_dev *edev = context;
386
387	gpiod_set_value_cansleep(edev->pdata->select, 1);
388}
389
390static void select_deassert(void *context)
391{
392	struct eeprom_93xx46_dev *edev = context;
393
394	gpiod_set_value_cansleep(edev->pdata->select, 0);
395}
396
397static const struct of_device_id eeprom_93xx46_of_table[] = {
398	{ .compatible = "eeprom-93xx46", .data = &at93c46_data, },
399	{ .compatible = "atmel,at93c46", .data = &at93c46_data, },
400	{ .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
401	{ .compatible = "atmel,at93c56", .data = &at93c56_data, },
402	{ .compatible = "atmel,at93c66", .data = &at93c66_data, },
403	{ .compatible = "microchip,93lc46b", .data = &microchip_93lc46b_data, },
404	{}
405};
406MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
407
408static const struct spi_device_id eeprom_93xx46_spi_ids[] = {
409	{ .name = "eeprom-93xx46",
410	  .driver_data = (kernel_ulong_t)&at93c46_data, },
411	{ .name = "at93c46",
412	  .driver_data = (kernel_ulong_t)&at93c46_data, },
413	{ .name = "at93c46d",
414	  .driver_data = (kernel_ulong_t)&atmel_at93c46d_data, },
415	{ .name = "at93c56",
416	  .driver_data = (kernel_ulong_t)&at93c56_data, },
417	{ .name = "at93c66",
418	  .driver_data = (kernel_ulong_t)&at93c66_data, },
419	{ .name = "93lc46b",
420	  .driver_data = (kernel_ulong_t)&microchip_93lc46b_data, },
421	{}
422};
423MODULE_DEVICE_TABLE(spi, eeprom_93xx46_spi_ids);
424
425static int eeprom_93xx46_probe_dt(struct spi_device *spi)
426{
427	const struct of_device_id *of_id =
428		of_match_device(eeprom_93xx46_of_table, &spi->dev);
429	struct device_node *np = spi->dev.of_node;
430	struct eeprom_93xx46_platform_data *pd;
431	u32 tmp;
432	int ret;
433
434	pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
435	if (!pd)
436		return -ENOMEM;
437
438	ret = of_property_read_u32(np, "data-size", &tmp);
439	if (ret < 0) {
440		dev_err(&spi->dev, "data-size property not found\n");
441		return ret;
442	}
443
444	if (tmp == 8) {
445		pd->flags |= EE_ADDR8;
446	} else if (tmp == 16) {
447		pd->flags |= EE_ADDR16;
448	} else {
449		dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
450		return -EINVAL;
451	}
452
453	if (of_property_read_bool(np, "read-only"))
454		pd->flags |= EE_READONLY;
455
456	pd->select = devm_gpiod_get_optional(&spi->dev, "select",
457					     GPIOD_OUT_LOW);
458	if (IS_ERR(pd->select))
459		return PTR_ERR(pd->select);
460
461	pd->prepare = select_assert;
462	pd->finish = select_deassert;
463	gpiod_direction_output(pd->select, 0);
464
465	if (of_id->data) {
466		const struct eeprom_93xx46_devtype_data *data = of_id->data;
467
468		pd->quirks = data->quirks;
469		pd->flags |= data->flags;
470	}
471
472	spi->dev.platform_data = pd;
473
474	return 0;
475}
476
477static int eeprom_93xx46_probe(struct spi_device *spi)
478{
479	struct eeprom_93xx46_platform_data *pd;
480	struct eeprom_93xx46_dev *edev;
481	int err;
482
483	if (spi->dev.of_node) {
484		err = eeprom_93xx46_probe_dt(spi);
485		if (err < 0)
486			return err;
487	}
488
489	pd = spi->dev.platform_data;
490	if (!pd) {
491		dev_err(&spi->dev, "missing platform data\n");
492		return -ENODEV;
493	}
494
495	edev = devm_kzalloc(&spi->dev, sizeof(*edev), GFP_KERNEL);
496	if (!edev)
497		return -ENOMEM;
498
499	if (pd->flags & EE_SIZE1K)
500		edev->size = 128;
501	else if (pd->flags & EE_SIZE2K)
502		edev->size = 256;
503	else if (pd->flags & EE_SIZE4K)
504		edev->size = 512;
505	else {
506		dev_err(&spi->dev, "unspecified size\n");
507		return -EINVAL;
508	}
509
510	if (pd->flags & EE_ADDR8)
511		edev->addrlen = ilog2(edev->size);
512	else if (pd->flags & EE_ADDR16)
513		edev->addrlen = ilog2(edev->size) - 1;
514	else {
515		dev_err(&spi->dev, "unspecified address type\n");
516		return -EINVAL;
 
517	}
518
519	mutex_init(&edev->lock);
520
521	edev->spi = spi;
522	edev->pdata = pd;
523
524	edev->nvmem_config.type = NVMEM_TYPE_EEPROM;
525	edev->nvmem_config.name = dev_name(&spi->dev);
526	edev->nvmem_config.dev = &spi->dev;
527	edev->nvmem_config.read_only = pd->flags & EE_READONLY;
528	edev->nvmem_config.root_only = true;
529	edev->nvmem_config.owner = THIS_MODULE;
530	edev->nvmem_config.compat = true;
531	edev->nvmem_config.base_dev = &spi->dev;
532	edev->nvmem_config.reg_read = eeprom_93xx46_read;
533	edev->nvmem_config.reg_write = eeprom_93xx46_write;
534	edev->nvmem_config.priv = edev;
535	edev->nvmem_config.stride = 4;
536	edev->nvmem_config.word_size = 1;
537	edev->nvmem_config.size = edev->size;
538
539	edev->nvmem = devm_nvmem_register(&spi->dev, &edev->nvmem_config);
540	if (IS_ERR(edev->nvmem))
541		return PTR_ERR(edev->nvmem);
542
543	dev_info(&spi->dev, "%d-bit eeprom containing %d bytes %s\n",
544		(pd->flags & EE_ADDR8) ? 8 : 16,
545		edev->size,
546		(pd->flags & EE_READONLY) ? "(readonly)" : "");
547
548	if (!(pd->flags & EE_READONLY)) {
549		if (device_create_file(&spi->dev, &dev_attr_erase))
550			dev_err(&spi->dev, "can't create erase interface\n");
551	}
552
553	spi_set_drvdata(spi, edev);
554	return 0;
 
 
 
555}
556
557static void eeprom_93xx46_remove(struct spi_device *spi)
558{
559	struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
560
561	if (!(edev->pdata->flags & EE_READONLY))
562		device_remove_file(&spi->dev, &dev_attr_erase);
 
 
 
 
 
563}
564
565static struct spi_driver eeprom_93xx46_driver = {
566	.driver = {
567		.name	= "93xx46",
568		.of_match_table = of_match_ptr(eeprom_93xx46_of_table),
569	},
570	.probe		= eeprom_93xx46_probe,
571	.remove		= eeprom_93xx46_remove,
572	.id_table	= eeprom_93xx46_spi_ids,
573};
574
575module_spi_driver(eeprom_93xx46_driver);
 
 
 
 
 
 
 
 
 
 
576
577MODULE_LICENSE("GPL");
578MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
579MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
580MODULE_ALIAS("spi:93xx46");
581MODULE_ALIAS("spi:eeprom-93xx46");
582MODULE_ALIAS("spi:93lc46b");