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  1/*
  2 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
  3 * Copyright (c) 2007-2008 Intel Corporation
  4 *   Jesse Barnes <jesse.barnes@intel.com>
  5 *
  6 * Permission is hereby granted, free of charge, to any person obtaining a
  7 * copy of this software and associated documentation files (the "Software"),
  8 * to deal in the Software without restriction, including without limitation
  9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 10 * and/or sell copies of the Software, and to permit persons to whom the
 11 * Software is furnished to do so, subject to the following conditions:
 12 *
 13 * The above copyright notice and this permission notice (including the next
 14 * paragraph) shall be included in all copies or substantial portions of the
 15 * Software.
 16 *
 17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 23 * IN THE SOFTWARE.
 24 */
 25#ifndef __INTEL_DRV_H__
 26#define __INTEL_DRV_H__
 27
 28#include <linux/i2c.h>
 29#include "i915_drv.h"
 30#include "drm_crtc.h"
 31#include "drm_crtc_helper.h"
 32#include "drm_fb_helper.h"
 33
 34#define _wait_for(COND, MS, W) ({ \
 35	unsigned long timeout__ = jiffies + msecs_to_jiffies(MS);	\
 36	int ret__ = 0;							\
 37	while (! (COND)) {						\
 38		if (time_after(jiffies, timeout__)) {			\
 39			ret__ = -ETIMEDOUT;				\
 40			break;						\
 41		}							\
 42		if (W && !(in_atomic() || in_dbg_master())) msleep(W);	\
 43	}								\
 44	ret__;								\
 45})
 46
 47#define wait_for(COND, MS) _wait_for(COND, MS, 1)
 48#define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0)
 49
 50#define MSLEEP(x) do { \
 51	if (in_dbg_master()) \
 52	       	mdelay(x); \
 53	else \
 54		msleep(x); \
 55} while(0)
 56
 57#define KHz(x) (1000*x)
 58#define MHz(x) KHz(1000*x)
 59
 60/*
 61 * Display related stuff
 62 */
 63
 64/* store information about an Ixxx DVO */
 65/* The i830->i865 use multiple DVOs with multiple i2cs */
 66/* the i915, i945 have a single sDVO i2c bus - which is different */
 67#define MAX_OUTPUTS 6
 68/* maximum connectors per crtcs in the mode set */
 69#define INTELFB_CONN_LIMIT 4
 70
 71#define INTEL_I2C_BUS_DVO 1
 72#define INTEL_I2C_BUS_SDVO 2
 73
 74/* these are outputs from the chip - integrated only
 75   external chips are via DVO or SDVO output */
 76#define INTEL_OUTPUT_UNUSED 0
 77#define INTEL_OUTPUT_ANALOG 1
 78#define INTEL_OUTPUT_DVO 2
 79#define INTEL_OUTPUT_SDVO 3
 80#define INTEL_OUTPUT_LVDS 4
 81#define INTEL_OUTPUT_TVOUT 5
 82#define INTEL_OUTPUT_HDMI 6
 83#define INTEL_OUTPUT_DISPLAYPORT 7
 84#define INTEL_OUTPUT_EDP 8
 85
 86/* Intel Pipe Clone Bit */
 87#define INTEL_HDMIB_CLONE_BIT 1
 88#define INTEL_HDMIC_CLONE_BIT 2
 89#define INTEL_HDMID_CLONE_BIT 3
 90#define INTEL_HDMIE_CLONE_BIT 4
 91#define INTEL_HDMIF_CLONE_BIT 5
 92#define INTEL_SDVO_NON_TV_CLONE_BIT 6
 93#define INTEL_SDVO_TV_CLONE_BIT 7
 94#define INTEL_SDVO_LVDS_CLONE_BIT 8
 95#define INTEL_ANALOG_CLONE_BIT 9
 96#define INTEL_TV_CLONE_BIT 10
 97#define INTEL_DP_B_CLONE_BIT 11
 98#define INTEL_DP_C_CLONE_BIT 12
 99#define INTEL_DP_D_CLONE_BIT 13
100#define INTEL_LVDS_CLONE_BIT 14
101#define INTEL_DVO_TMDS_CLONE_BIT 15
102#define INTEL_DVO_LVDS_CLONE_BIT 16
103#define INTEL_EDP_CLONE_BIT 17
104
105#define INTEL_DVO_CHIP_NONE 0
106#define INTEL_DVO_CHIP_LVDS 1
107#define INTEL_DVO_CHIP_TMDS 2
108#define INTEL_DVO_CHIP_TVOUT 4
109
110/* drm_display_mode->private_flags */
111#define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0)
112#define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT)
113
114static inline void
115intel_mode_set_pixel_multiplier(struct drm_display_mode *mode,
116				int multiplier)
117{
118	mode->clock *= multiplier;
119	mode->private_flags |= multiplier;
120}
121
122static inline int
123intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode)
124{
125	return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT;
126}
127
128struct intel_framebuffer {
129	struct drm_framebuffer base;
130	struct drm_i915_gem_object *obj;
131};
132
133struct intel_fbdev {
134	struct drm_fb_helper helper;
135	struct intel_framebuffer ifb;
136	struct list_head fbdev_list;
137	struct drm_display_mode *our_mode;
138};
139
140struct intel_encoder {
141	struct drm_encoder base;
142	int type;
143	bool needs_tv_clock;
144	void (*hot_plug)(struct intel_encoder *);
145	int crtc_mask;
146	int clone_mask;
147};
148
149struct intel_connector {
150	struct drm_connector base;
151	struct intel_encoder *encoder;
152};
153
154struct intel_crtc {
155	struct drm_crtc base;
156	enum pipe pipe;
157	enum plane plane;
158	u8 lut_r[256], lut_g[256], lut_b[256];
159	int dpms_mode;
160	bool active; /* is the crtc on? independent of the dpms mode */
161	bool busy; /* is scanout buffer being updated frequently? */
162	struct timer_list idle_timer;
163	bool lowfreq_avail;
164	struct intel_overlay *overlay;
165	struct intel_unpin_work *unpin_work;
166	int fdi_lanes;
167
168	struct drm_i915_gem_object *cursor_bo;
169	uint32_t cursor_addr;
170	int16_t cursor_x, cursor_y;
171	int16_t cursor_width, cursor_height;
172	bool cursor_visible;
173	unsigned int bpp;
174};
175
176#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
177#define to_intel_connector(x) container_of(x, struct intel_connector, base)
178#define to_intel_encoder(x) container_of(x, struct intel_encoder, base)
179#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
180
181#define DIP_HEADER_SIZE	5
182
183#define DIP_TYPE_AVI    0x82
184#define DIP_VERSION_AVI 0x2
185#define DIP_LEN_AVI     13
186
187#define DIP_TYPE_SPD	0x3
188#define DIP_VERSION_SPD	0x1
189#define DIP_LEN_SPD	25
190#define DIP_SPD_UNKNOWN	0
191#define DIP_SPD_DSTB	0x1
192#define DIP_SPD_DVDP	0x2
193#define DIP_SPD_DVHS	0x3
194#define DIP_SPD_HDDVR	0x4
195#define DIP_SPD_DVC	0x5
196#define DIP_SPD_DSC	0x6
197#define DIP_SPD_VCD	0x7
198#define DIP_SPD_GAME	0x8
199#define DIP_SPD_PC	0x9
200#define DIP_SPD_BD	0xa
201#define DIP_SPD_SCD	0xb
202
203struct dip_infoframe {
204	uint8_t type;		/* HB0 */
205	uint8_t ver;		/* HB1 */
206	uint8_t len;		/* HB2 - body len, not including checksum */
207	uint8_t ecc;		/* Header ECC */
208	uint8_t checksum;	/* PB0 */
209	union {
210		struct {
211			/* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */
212			uint8_t Y_A_B_S;
213			/* PB2 - C 7:6, M 5:4, R 3:0 */
214			uint8_t C_M_R;
215			/* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */
216			uint8_t ITC_EC_Q_SC;
217			/* PB4 - VIC 6:0 */
218			uint8_t VIC;
219			/* PB5 - PR 3:0 */
220			uint8_t PR;
221			/* PB6 to PB13 */
222			uint16_t top_bar_end;
223			uint16_t bottom_bar_start;
224			uint16_t left_bar_end;
225			uint16_t right_bar_start;
226		} avi;
227		struct {
228			uint8_t vn[8];
229			uint8_t pd[16];
230			uint8_t sdi;
231		} spd;
232		uint8_t payload[27];
233	} __attribute__ ((packed)) body;
234} __attribute__((packed));
235
236static inline struct drm_crtc *
237intel_get_crtc_for_pipe(struct drm_device *dev, int pipe)
238{
239	struct drm_i915_private *dev_priv = dev->dev_private;
240	return dev_priv->pipe_to_crtc_mapping[pipe];
241}
242
243static inline struct drm_crtc *
244intel_get_crtc_for_plane(struct drm_device *dev, int plane)
245{
246	struct drm_i915_private *dev_priv = dev->dev_private;
247	return dev_priv->plane_to_crtc_mapping[plane];
248}
249
250struct intel_unpin_work {
251	struct work_struct work;
252	struct drm_device *dev;
253	struct drm_i915_gem_object *old_fb_obj;
254	struct drm_i915_gem_object *pending_flip_obj;
255	struct drm_pending_vblank_event *event;
256	int pending;
257	bool enable_stall_check;
258};
259
260struct intel_fbc_work {
261	struct delayed_work work;
262	struct drm_crtc *crtc;
263	struct drm_framebuffer *fb;
264	int interval;
265};
266
267int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
268extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus);
269
270extern void intel_attach_force_audio_property(struct drm_connector *connector);
271extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector);
272
273extern void intel_crt_init(struct drm_device *dev);
274extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
275void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
276extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
277extern void intel_dvo_init(struct drm_device *dev);
278extern void intel_tv_init(struct drm_device *dev);
279extern void intel_mark_busy(struct drm_device *dev,
280			    struct drm_i915_gem_object *obj);
281extern bool intel_lvds_init(struct drm_device *dev);
282extern void intel_dp_init(struct drm_device *dev, int dp_reg);
283void
284intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
285		 struct drm_display_mode *adjusted_mode);
286extern bool intel_dpd_is_edp(struct drm_device *dev);
287extern void intel_edp_link_config (struct intel_encoder *, int *, int *);
288extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder);
289
290/* intel_panel.c */
291extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
292				   struct drm_display_mode *adjusted_mode);
293extern void intel_pch_panel_fitting(struct drm_device *dev,
294				    int fitting_mode,
295				    struct drm_display_mode *mode,
296				    struct drm_display_mode *adjusted_mode);
297extern u32 intel_panel_get_max_backlight(struct drm_device *dev);
298extern u32 intel_panel_get_backlight(struct drm_device *dev);
299extern void intel_panel_set_backlight(struct drm_device *dev, u32 level);
300extern int intel_panel_setup_backlight(struct drm_device *dev);
301extern void intel_panel_enable_backlight(struct drm_device *dev);
302extern void intel_panel_disable_backlight(struct drm_device *dev);
303extern void intel_panel_destroy_backlight(struct drm_device *dev);
304extern enum drm_connector_status intel_panel_detect(struct drm_device *dev);
305
306extern void intel_crtc_load_lut(struct drm_crtc *crtc);
307extern void intel_encoder_prepare (struct drm_encoder *encoder);
308extern void intel_encoder_commit (struct drm_encoder *encoder);
309extern void intel_encoder_destroy(struct drm_encoder *encoder);
310
311static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector)
312{
313	return to_intel_connector(connector)->encoder;
314}
315
316extern void intel_connector_attach_encoder(struct intel_connector *connector,
317					   struct intel_encoder *encoder);
318extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector);
319
320extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
321						    struct drm_crtc *crtc);
322int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
323				struct drm_file *file_priv);
324extern void intel_wait_for_vblank(struct drm_device *dev, int pipe);
325extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe);
326
327struct intel_load_detect_pipe {
328	struct drm_framebuffer *release_fb;
329	bool load_detect_temp;
330	int dpms_mode;
331};
332extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
333				       struct drm_connector *connector,
334				       struct drm_display_mode *mode,
335				       struct intel_load_detect_pipe *old);
336extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
337					   struct drm_connector *connector,
338					   struct intel_load_detect_pipe *old);
339
340extern void intelfb_restore(void);
341extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
342				    u16 blue, int regno);
343extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
344				    u16 *blue, int regno);
345extern void intel_enable_clock_gating(struct drm_device *dev);
346extern void ironlake_enable_drps(struct drm_device *dev);
347extern void ironlake_disable_drps(struct drm_device *dev);
348extern void gen6_enable_rps(struct drm_i915_private *dev_priv);
349extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv);
350extern void gen6_disable_rps(struct drm_device *dev);
351extern void intel_init_emon(struct drm_device *dev);
352
353extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
354				      struct drm_i915_gem_object *obj,
355				      struct intel_ring_buffer *pipelined);
356
357extern int intel_framebuffer_init(struct drm_device *dev,
358				  struct intel_framebuffer *ifb,
359				  struct drm_mode_fb_cmd *mode_cmd,
360				  struct drm_i915_gem_object *obj);
361extern int intel_fbdev_init(struct drm_device *dev);
362extern void intel_fbdev_fini(struct drm_device *dev);
363
364extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
365extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
366extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
367
368extern void intel_setup_overlay(struct drm_device *dev);
369extern void intel_cleanup_overlay(struct drm_device *dev);
370extern int intel_overlay_switch_off(struct intel_overlay *overlay);
371extern int intel_overlay_put_image(struct drm_device *dev, void *data,
372				   struct drm_file *file_priv);
373extern int intel_overlay_attrs(struct drm_device *dev, void *data,
374			       struct drm_file *file_priv);
375
376extern void intel_fb_output_poll_changed(struct drm_device *dev);
377extern void intel_fb_restore_mode(struct drm_device *dev);
378
379extern void intel_init_clock_gating(struct drm_device *dev);
380#endif /* __INTEL_DRV_H__ */