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v3.1
 
   1config MIPS
   2	bool
   3	default y
   4	select HAVE_GENERIC_DMA_COHERENT
   5	select HAVE_IDE
   6	select HAVE_OPROFILE
   7	select HAVE_IRQ_WORK
   8	select HAVE_PERF_EVENTS
   9	select PERF_USE_VMALLOC
  10	select HAVE_ARCH_KGDB
  11	select HAVE_FUNCTION_TRACER
  12	select HAVE_FUNCTION_TRACE_MCOUNT_TEST
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  13	select HAVE_DYNAMIC_FTRACE
 
 
 
  14	select HAVE_FTRACE_MCOUNT_RECORD
  15	select HAVE_C_RECORDMCOUNT
  16	select HAVE_FUNCTION_GRAPH_TRACER
 
 
 
 
 
 
  17	select HAVE_KPROBES
  18	select HAVE_KRETPROBES
  19	select RTC_LIB if !MACH_LOONGSON
  20	select GENERIC_ATOMIC64 if !64BIT
  21	select HAVE_DMA_ATTRS
  22	select HAVE_DMA_API_DEBUG
  23	select HAVE_GENERIC_HARDIRQS
  24	select GENERIC_IRQ_PROBE
  25	select GENERIC_IRQ_SHOW
  26	select HAVE_ARCH_JUMP_LABEL
 
 
 
 
  27	select IRQ_FORCED_THREADING
 
 
 
 
 
 
 
 
 
 
 
  28
  29menu "Machine selection"
 
 
 
 
  30
  31config ZONE_DMA
  32	bool
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  33
  34choice
  35	prompt "System type"
  36	default SGI_IP22
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  37
  38config MIPS_ALCHEMY
  39	bool "Alchemy processor based machines"
  40	select 64BIT_PHYS_ADDR
  41	select CEVT_R4K_LIB
  42	select CSRC_R4K_LIB
  43	select IRQ_CPU
 
 
  44	select SYS_HAS_CPU_MIPS32_R1
  45	select SYS_SUPPORTS_32BIT_KERNEL
  46	select SYS_SUPPORTS_APM_EMULATION
  47	select GENERIC_GPIO
  48	select ARCH_WANT_OPTIONAL_GPIOLIB
  49	select SYS_SUPPORTS_ZBOOT
 
  50
  51config AR7
  52	bool "Texas Instruments AR7"
  53	select BOOT_ELF32
  54	select DMA_NONCOHERENT
  55	select CEVT_R4K
  56	select CSRC_R4K
  57	select IRQ_CPU
  58	select NO_EXCEPT_FILL
  59	select SWAP_IO_SPACE
  60	select SYS_HAS_CPU_MIPS32_R1
  61	select SYS_HAS_EARLY_PRINTK
  62	select SYS_SUPPORTS_32BIT_KERNEL
  63	select SYS_SUPPORTS_LITTLE_ENDIAN
  64	select SYS_SUPPORTS_ZBOOT_UART16550
  65	select ARCH_REQUIRE_GPIOLIB
  66	select GCD
  67	select VLYNQ
  68	help
  69	  Support for the Texas Instruments AR7 System-on-a-Chip
  70	  family: TNETD7100, 7200 and 7300.
  71
  72config ATH79
  73	bool "Atheros AR71XX/AR724X/AR913X based boards"
  74	select ARCH_REQUIRE_GPIOLIB
  75	select BOOT_RAW
  76	select CEVT_R4K
  77	select CSRC_R4K
  78	select DMA_NONCOHERENT
  79	select IRQ_CPU
  80	select MIPS_MACHINE
 
 
  81	select SYS_HAS_CPU_MIPS32_R2
  82	select SYS_HAS_EARLY_PRINTK
  83	select SYS_SUPPORTS_32BIT_KERNEL
  84	select SYS_SUPPORTS_BIG_ENDIAN
 
 
 
 
  85	help
  86	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
  87
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  88config BCM47XX
  89	bool "Broadcom BCM47XX based boards"
 
  90	select CEVT_R4K
  91	select CSRC_R4K
  92	select DMA_NONCOHERENT
  93	select HW_HAS_PCI
  94	select IRQ_CPU
  95	select SYS_HAS_CPU_MIPS32_R1
 
  96	select SYS_SUPPORTS_32BIT_KERNEL
  97	select SYS_SUPPORTS_LITTLE_ENDIAN
  98	select SSB
  99	select SSB_DRIVER_MIPS
 100	select SSB_DRIVER_EXTIF
 101	select SSB_EMBEDDED
 102	select SSB_B43_PCI_BRIDGE if PCI
 103	select SSB_PCICORE_HOSTMODE if PCI
 104	select GENERIC_GPIO
 105	select SYS_HAS_EARLY_PRINTK
 106	select CFE
 
 
 
 
 
 107	help
 108	 Support for BCM47XX based boards
 109
 110config BCM63XX
 111	bool "Broadcom BCM63XX based boards"
 
 112	select CEVT_R4K
 113	select CSRC_R4K
 
 114	select DMA_NONCOHERENT
 115	select IRQ_CPU
 116	select SYS_HAS_CPU_MIPS32_R1
 117	select SYS_SUPPORTS_32BIT_KERNEL
 118	select SYS_SUPPORTS_BIG_ENDIAN
 119	select SYS_HAS_EARLY_PRINTK
 120	select SWAP_IO_SPACE
 121	select ARCH_REQUIRE_GPIOLIB
 
 
 
 
 
 122	help
 123	 Support for BCM63XX based boards
 124
 125config MIPS_COBALT
 126	bool "Cobalt Server"
 127	select CEVT_R4K
 128	select CSRC_R4K
 129	select CEVT_GT641XX
 130	select DMA_NONCOHERENT
 131	select HW_HAS_PCI
 132	select I8253
 133	select I8259
 134	select IRQ_CPU
 135	select IRQ_GT641XX
 136	select PCI_GT64XXX_PCI0
 137	select PCI
 138	select SYS_HAS_CPU_NEVADA
 139	select SYS_HAS_EARLY_PRINTK
 140	select SYS_SUPPORTS_32BIT_KERNEL
 141	select SYS_SUPPORTS_64BIT_KERNEL
 142	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 143
 144config MACH_DECSTATION
 145	bool "DECstations"
 146	select BOOT_ELF32
 147	select CEVT_DS1287
 148	select CEVT_R4K
 149	select CSRC_IOASIC
 150	select CSRC_R4K
 151	select CPU_DADDI_WORKAROUNDS if 64BIT
 152	select CPU_R4000_WORKAROUNDS if 64BIT
 153	select CPU_R4400_WORKAROUNDS if 64BIT
 154	select DMA_NONCOHERENT
 155	select NO_IOPORT
 156	select IRQ_CPU
 157	select SYS_HAS_CPU_R3000
 158	select SYS_HAS_CPU_R4X00
 159	select SYS_SUPPORTS_32BIT_KERNEL
 160	select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
 161	select SYS_SUPPORTS_LITTLE_ENDIAN
 162	select SYS_SUPPORTS_128HZ
 163	select SYS_SUPPORTS_256HZ
 164	select SYS_SUPPORTS_1024HZ
 
 165	help
 166	  This enables support for DEC's MIPS based workstations.  For details
 167	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
 168	  DECstation porting pages on <http://decstation.unix-ag.org/>.
 169
 170	  If you have one of the following DECstation Models you definitely
 171	  want to choose R4xx0 for the CPU Type:
 172
 173		DECstation 5000/50
 174		DECstation 5000/150
 175		DECstation 5000/260
 176		DECsystem 5900/260
 177
 178	  otherwise choose R3000.
 179
 180config MACH_JAZZ
 181	bool "Jazz family of machines"
 182	select ARC
 183	select ARC32
 
 
 
 
 
 184	select ARCH_MAY_HAVE_PC_FDC
 185	select CEVT_R4K
 186	select CSRC_R4K
 187	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
 188	select GENERIC_ISA_DMA
 189	select HAVE_PCSPKR_PLATFORM
 190	select IRQ_CPU
 191	select I8253
 192	select I8259
 193	select ISA
 194	select SYS_HAS_CPU_R4X00
 195	select SYS_SUPPORTS_32BIT_KERNEL
 196	select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
 197	select SYS_SUPPORTS_100HZ
 198	help
 199	 This a family of machines based on the MIPS R4030 chipset which was
 200	 used by several vendors to build RISC/os and Windows NT workstations.
 201	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
 202	 Olivetti M700-10 workstations.
 203
 204config MACH_JZ4740
 205	bool "Ingenic JZ4740 based machines"
 206	select SYS_HAS_CPU_MIPS32_R1
 207	select SYS_SUPPORTS_32BIT_KERNEL
 208	select SYS_SUPPORTS_LITTLE_ENDIAN
 209	select DMA_NONCOHERENT
 210	select IRQ_CPU
 211	select GENERIC_GPIO
 212	select ARCH_REQUIRE_GPIOLIB
 213	select SYS_HAS_EARLY_PRINTK
 214	select HAVE_PWM
 215	select HAVE_CLK
 
 
 
 
 
 
 216
 217config LANTIQ
 218	bool "Lantiq based platforms"
 219	select DMA_NONCOHERENT
 220	select IRQ_CPU
 221	select CEVT_R4K
 222	select CSRC_R4K
 
 223	select SYS_HAS_CPU_MIPS32_R1
 224	select SYS_HAS_CPU_MIPS32_R2
 225	select SYS_SUPPORTS_BIG_ENDIAN
 226	select SYS_SUPPORTS_32BIT_KERNEL
 
 227	select SYS_SUPPORTS_MULTITHREADING
 
 228	select SYS_HAS_EARLY_PRINTK
 229	select ARCH_REQUIRE_GPIOLIB
 230	select SWAP_IO_SPACE
 231	select BOOT_RAW
 232	select HAVE_CLK
 233	select MIPS_MACHINE
 
 
 
 
 234
 235config LASAT
 236	bool "LASAT Networks platforms"
 237	select CEVT_R4K
 238	select CSRC_R4K
 239	select DMA_NONCOHERENT
 240	select SYS_HAS_EARLY_PRINTK
 241	select HW_HAS_PCI
 242	select IRQ_CPU
 243	select PCI_GT64XXX_PCI0
 244	select MIPS_NILE4
 245	select R5000_CPU_SCACHE
 246	select SYS_HAS_CPU_R5000
 247	select SYS_SUPPORTS_32BIT_KERNEL
 248	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
 249	select SYS_SUPPORTS_LITTLE_ENDIAN
 250
 251config MACH_LOONGSON
 252	bool "Loongson family of machines"
 253	select SYS_SUPPORTS_ZBOOT
 254	help
 255	  This enables the support of Loongson family of machines.
 256
 257	  Loongson is a family of general-purpose MIPS-compatible CPUs.
 258	  developed at Institute of Computing Technology (ICT),
 259	  Chinese Academy of Sciences (CAS) in the People's Republic
 260	  of China. The chief architect is Professor Weiwu Hu.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 261
 262config MIPS_MALTA
 263	bool "MIPS Malta board"
 264	select ARCH_MAY_HAVE_PC_FDC
 
 
 265	select BOOT_ELF32
 266	select BOOT_RAW
 
 267	select CEVT_R4K
 
 
 268	select CSRC_R4K
 269	select DMA_NONCOHERENT
 270	select GENERIC_ISA_DMA
 271	select HAVE_PCSPKR_PLATFORM
 272	select IRQ_CPU
 273	select IRQ_GIC
 274	select HW_HAS_PCI
 275	select I8253
 276	select I8259
 277	select MIPS_BOARDS_GEN
 278	select MIPS_BONITO64
 279	select MIPS_CPU_SCACHE
 280	select PCI_GT64XXX_PCI0
 
 281	select MIPS_MSC
 
 
 282	select SWAP_IO_SPACE
 283	select SYS_HAS_CPU_MIPS32_R1
 284	select SYS_HAS_CPU_MIPS32_R2
 
 
 
 285	select SYS_HAS_CPU_MIPS64_R1
 
 
 286	select SYS_HAS_CPU_NEVADA
 287	select SYS_HAS_CPU_RM7000
 288	select SYS_HAS_EARLY_PRINTK
 289	select SYS_SUPPORTS_32BIT_KERNEL
 290	select SYS_SUPPORTS_64BIT_KERNEL
 291	select SYS_SUPPORTS_BIG_ENDIAN
 
 292	select SYS_SUPPORTS_LITTLE_ENDIAN
 293	select SYS_SUPPORTS_MIPS_CMP
 
 
 294	select SYS_SUPPORTS_MULTITHREADING
 
 295	select SYS_SUPPORTS_SMARTMIPS
 
 296	select SYS_SUPPORTS_ZBOOT
 
 
 
 297	help
 298	  This enables support for the MIPS Technologies Malta evaluation
 299	  board.
 300
 301config MIPS_SIM
 302	bool 'MIPS simulator (MIPSsim)'
 303	select CEVT_R4K
 304	select CSRC_R4K
 305	select DMA_NONCOHERENT
 306	select SYS_HAS_EARLY_PRINTK
 307	select IRQ_CPU
 308	select BOOT_RAW
 309	select SYS_HAS_CPU_MIPS32_R1
 310	select SYS_HAS_CPU_MIPS32_R2
 311	select SYS_HAS_EARLY_PRINTK
 312	select SYS_SUPPORTS_32BIT_KERNEL
 313	select SYS_SUPPORTS_BIG_ENDIAN
 314	select SYS_SUPPORTS_MULTITHREADING
 315	select SYS_SUPPORTS_LITTLE_ENDIAN
 316	help
 317	  This option enables support for MIPS Technologies MIPSsim software
 318	  emulator.
 319
 320config NEC_MARKEINS
 321	bool "NEC EMMA2RH Mark-eins board"
 322	select SOC_EMMA2RH
 323	select HW_HAS_PCI
 324	help
 325	  This enables support for the NEC Electronics Mark-eins boards.
 326
 327config MACH_VR41XX
 328	bool "NEC VR4100 series based machines"
 329	select CEVT_R4K
 330	select CSRC_R4K
 331	select SYS_HAS_CPU_VR41XX
 332	select ARCH_REQUIRE_GPIOLIB
 333
 334config NXP_STB220
 335	bool "NXP STB220 board"
 336	select SOC_PNX833X
 337	help
 338	 Support for NXP Semiconductors STB220 Development Board.
 339
 340config NXP_STB225
 341	bool "NXP 225 board"
 342	select SOC_PNX833X
 343	select SOC_PNX8335
 344	help
 345	 Support for NXP Semiconductors STB225 Development Board.
 346
 347config PNX8550_JBS
 348	bool "NXP PNX8550 based JBS board"
 349	select PNX8550
 350	select SYS_SUPPORTS_LITTLE_ENDIAN
 351
 352config PNX8550_STB810
 353	bool "NXP PNX8550 based STB810 board"
 354	select PNX8550
 355	select SYS_SUPPORTS_LITTLE_ENDIAN
 356
 357config PMC_MSP
 358	bool "PMC-Sierra MSP chipsets"
 359	depends on EXPERIMENTAL
 360	select CEVT_R4K
 
 361	select CSRC_R4K
 362	select DMA_NONCOHERENT
 363	select SWAP_IO_SPACE
 364	select NO_EXCEPT_FILL
 365	select BOOT_RAW
 366	select SYS_HAS_CPU_MIPS32_R1
 
 
 367	select SYS_HAS_CPU_MIPS32_R2
 368	select SYS_SUPPORTS_32BIT_KERNEL
 369	select SYS_SUPPORTS_BIG_ENDIAN
 370	select IRQ_CPU
 371	select SERIAL_8250
 372	select SERIAL_8250_CONSOLE
 373	help
 374	  This adds support for the PMC-Sierra family of Multi-Service
 375	  Processor System-On-A-Chips.  These parts include a number
 376	  of integrated peripherals, interfaces and DSPs in addition to
 377	  a variety of MIPS cores.
 378
 379config PMC_YOSEMITE
 380	bool "PMC-Sierra Yosemite eval board"
 381	select CEVT_R4K
 382	select CSRC_R4K
 383	select DMA_COHERENT
 384	select HW_HAS_PCI
 385	select IRQ_CPU
 386	select IRQ_CPU_RM7K
 387	select IRQ_CPU_RM9K
 388	select SWAP_IO_SPACE
 389	select SYS_HAS_CPU_RM9000
 390	select SYS_HAS_EARLY_PRINTK
 391	select SYS_SUPPORTS_32BIT_KERNEL
 392	select SYS_SUPPORTS_64BIT_KERNEL
 393	select SYS_SUPPORTS_BIG_ENDIAN
 394	select SYS_SUPPORTS_HIGHMEM
 395	select SYS_SUPPORTS_SMP
 396	help
 397	  Yosemite is an evaluation board for the RM9000x2 processor
 398	  manufactured by PMC-Sierra.
 399
 400config POWERTV
 401	bool "Cisco PowerTV"
 402	select BOOT_ELF32
 403	select CEVT_R4K
 404	select CPU_MIPSR2_IRQ_VI
 405	select CPU_MIPSR2_IRQ_EI
 406	select CSRC_POWERTV
 407	select DMA_NONCOHERENT
 408	select HW_HAS_PCI
 409	select SYS_HAS_EARLY_PRINTK
 
 
 410	select SYS_HAS_CPU_MIPS32_R2
 411	select SYS_SUPPORTS_32BIT_KERNEL
 412	select SYS_SUPPORTS_BIG_ENDIAN
 413	select SYS_SUPPORTS_HIGHMEM
 414	select USB_OHCI_LITTLE_ENDIAN
 415	help
 416	  This enables support for the Cisco PowerTV Platform.
 
 
 
 417
 418config SGI_IP22
 419	bool "SGI IP22 (Indy/Indigo2)"
 420	select ARC
 421	select ARC32
 
 
 
 422	select BOOT_ELF32
 423	select CEVT_R4K
 424	select CSRC_R4K
 425	select DEFAULT_SGI_PARTITION
 426	select DMA_NONCOHERENT
 427	select HW_HAS_EISA
 428	select I8253
 429	select I8259
 430	select IP22_CPU_SCACHE
 431	select IRQ_CPU
 432	select GENERIC_ISA_DMA_SUPPORT_BROKEN
 433	select SGI_HAS_I8042
 434	select SGI_HAS_INDYDOG
 435	select SGI_HAS_HAL2
 436	select SGI_HAS_SEEQ
 437	select SGI_HAS_WD93
 438	select SGI_HAS_ZILOG
 439	select SWAP_IO_SPACE
 440	select SYS_HAS_CPU_R4X00
 441	select SYS_HAS_CPU_R5000
 442	#
 443	# Disable EARLY_PRINTK for now since it leads to overwritten prom
 444	# memory during early boot on some machines.
 445	#
 446	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
 447	# for a more details discussion
 448	#
 449	# select SYS_HAS_EARLY_PRINTK
 450	select SYS_SUPPORTS_32BIT_KERNEL
 451	select SYS_SUPPORTS_64BIT_KERNEL
 452	select SYS_SUPPORTS_BIG_ENDIAN
 
 
 
 
 453	help
 454	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
 455	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
 456	  that runs on these, say Y here.
 457
 458config SGI_IP27
 459	bool "SGI IP27 (Origin200/2000)"
 460	select ARC
 461	select ARC64
 
 
 
 462	select BOOT_ELF64
 463	select DEFAULT_SGI_PARTITION
 464	select DMA_COHERENT
 465	select SYS_HAS_EARLY_PRINTK
 466	select HW_HAS_PCI
 
 
 467	select NR_CPUS_DEFAULT_64
 
 
 468	select SYS_HAS_CPU_R10000
 469	select SYS_SUPPORTS_64BIT_KERNEL
 470	select SYS_SUPPORTS_BIG_ENDIAN
 471	select SYS_SUPPORTS_NUMA
 472	select SYS_SUPPORTS_SMP
 
 
 
 
 473	help
 474	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
 475	  workstations.  To compile a Linux kernel that runs on these, say Y
 476	  here.
 477
 478config SGI_IP28
 479	bool "SGI IP28 (Indigo2 R10k) (EXPERIMENTAL)"
 480	depends on EXPERIMENTAL
 481	select ARC
 482	select ARC64
 
 
 483	select BOOT_ELF64
 484	select CEVT_R4K
 485	select CSRC_R4K
 486	select DEFAULT_SGI_PARTITION
 487	select DMA_NONCOHERENT
 488	select GENERIC_ISA_DMA_SUPPORT_BROKEN
 489	select IRQ_CPU
 490	select HW_HAS_EISA
 491	select I8253
 492	select I8259
 493	select SGI_HAS_I8042
 494	select SGI_HAS_INDYDOG
 495	select SGI_HAS_HAL2
 496	select SGI_HAS_SEEQ
 497	select SGI_HAS_WD93
 498	select SGI_HAS_ZILOG
 499	select SWAP_IO_SPACE
 500	select SYS_HAS_CPU_R10000
 501	#
 502	# Disable EARLY_PRINTK for now since it leads to overwritten prom
 503	# memory during early boot on some machines.
 504	#
 505	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
 506	# for a more details discussion
 507	#
 508	# select SYS_HAS_EARLY_PRINTK
 509	select SYS_SUPPORTS_64BIT_KERNEL
 510	select SYS_SUPPORTS_BIG_ENDIAN
 511      help
 512        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
 513        kernel that runs on these, say Y here.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 514
 515config SGI_IP32
 516	bool "SGI IP32 (O2)"
 517	select ARC
 518	select ARC32
 
 
 
 519	select BOOT_ELF32
 520	select CEVT_R4K
 521	select CSRC_R4K
 522	select DMA_NONCOHERENT
 523	select HW_HAS_PCI
 524	select IRQ_CPU
 525	select R5000_CPU_SCACHE
 526	select RM7000_CPU_SCACHE
 527	select SYS_HAS_CPU_R5000
 528	select SYS_HAS_CPU_R10000 if BROKEN
 529	select SYS_HAS_CPU_RM7000
 530	select SYS_HAS_CPU_NEVADA
 531	select SYS_SUPPORTS_64BIT_KERNEL
 532	select SYS_SUPPORTS_BIG_ENDIAN
 
 533	help
 534	  If you want this kernel to run on SGI O2 workstation, say Y here.
 535
 536config SIBYTE_CRHINE
 537	bool "Sibyte BCM91120C-CRhine"
 538	depends on EXPERIMENTAL
 539	select BOOT_ELF32
 540	select DMA_COHERENT
 541	select SIBYTE_BCM1120
 542	select SWAP_IO_SPACE
 543	select SYS_HAS_CPU_SB1
 544	select SYS_SUPPORTS_BIG_ENDIAN
 545	select SYS_SUPPORTS_LITTLE_ENDIAN
 546
 547config SIBYTE_CARMEL
 548	bool "Sibyte BCM91120x-Carmel"
 549	depends on EXPERIMENTAL
 550	select BOOT_ELF32
 551	select DMA_COHERENT
 552	select SIBYTE_BCM1120
 553	select SWAP_IO_SPACE
 554	select SYS_HAS_CPU_SB1
 555	select SYS_SUPPORTS_BIG_ENDIAN
 556	select SYS_SUPPORTS_LITTLE_ENDIAN
 557
 558config SIBYTE_CRHONE
 559	bool "Sibyte BCM91125C-CRhone"
 560	depends on EXPERIMENTAL
 561	select BOOT_ELF32
 562	select DMA_COHERENT
 563	select SIBYTE_BCM1125
 564	select SWAP_IO_SPACE
 565	select SYS_HAS_CPU_SB1
 566	select SYS_SUPPORTS_BIG_ENDIAN
 567	select SYS_SUPPORTS_HIGHMEM
 568	select SYS_SUPPORTS_LITTLE_ENDIAN
 569
 570config SIBYTE_RHONE
 571	bool "Sibyte BCM91125E-Rhone"
 572	depends on EXPERIMENTAL
 573	select BOOT_ELF32
 574	select DMA_COHERENT
 575	select SIBYTE_BCM1125H
 576	select SWAP_IO_SPACE
 577	select SYS_HAS_CPU_SB1
 578	select SYS_SUPPORTS_BIG_ENDIAN
 579	select SYS_SUPPORTS_LITTLE_ENDIAN
 580
 581config SIBYTE_SWARM
 582	bool "Sibyte BCM91250A-SWARM"
 583	select BOOT_ELF32
 584	select DMA_COHERENT
 585	select HAVE_PATA_PLATFORM
 586	select NR_CPUS_DEFAULT_2
 587	select SIBYTE_SB1250
 588	select SWAP_IO_SPACE
 589	select SYS_HAS_CPU_SB1
 590	select SYS_SUPPORTS_BIG_ENDIAN
 591	select SYS_SUPPORTS_HIGHMEM
 592	select SYS_SUPPORTS_LITTLE_ENDIAN
 593	select ZONE_DMA32 if 64BIT
 
 594
 595config SIBYTE_LITTLESUR
 596	bool "Sibyte BCM91250C2-LittleSur"
 597	depends on EXPERIMENTAL
 598	select BOOT_ELF32
 599	select DMA_COHERENT
 600	select HAVE_PATA_PLATFORM
 601	select NR_CPUS_DEFAULT_2
 602	select SIBYTE_SB1250
 603	select SWAP_IO_SPACE
 604	select SYS_HAS_CPU_SB1
 605	select SYS_SUPPORTS_BIG_ENDIAN
 606	select SYS_SUPPORTS_HIGHMEM
 607	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 608
 609config SIBYTE_SENTOSA
 610	bool "Sibyte BCM91250E-Sentosa"
 611	depends on EXPERIMENTAL
 612	select BOOT_ELF32
 613	select DMA_COHERENT
 614	select NR_CPUS_DEFAULT_2
 615	select SIBYTE_SB1250
 616	select SWAP_IO_SPACE
 617	select SYS_HAS_CPU_SB1
 618	select SYS_SUPPORTS_BIG_ENDIAN
 619	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 620
 621config SIBYTE_BIGSUR
 622	bool "Sibyte BCM91480B-BigSur"
 623	select BOOT_ELF32
 624	select DMA_COHERENT
 625	select NR_CPUS_DEFAULT_4
 626	select SIBYTE_BCM1x80
 627	select SWAP_IO_SPACE
 628	select SYS_HAS_CPU_SB1
 629	select SYS_SUPPORTS_BIG_ENDIAN
 630	select SYS_SUPPORTS_HIGHMEM
 631	select SYS_SUPPORTS_LITTLE_ENDIAN
 632	select ZONE_DMA32 if 64BIT
 
 633
 634config SNI_RM
 635	bool "SNI RM200/300/400"
 636	select ARC if CPU_LITTLE_ENDIAN
 637	select ARC32 if CPU_LITTLE_ENDIAN
 638	select SNIPROM if CPU_BIG_ENDIAN
 
 
 639	select ARCH_MAY_HAVE_PC_FDC
 
 
 640	select BOOT_ELF32
 641	select CEVT_R4K
 642	select CSRC_R4K
 643	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
 644	select DMA_NONCOHERENT
 645	select GENERIC_ISA_DMA
 
 646	select HAVE_PCSPKR_PLATFORM
 647	select HW_HAS_EISA
 648	select HW_HAS_PCI
 649	select IRQ_CPU
 650	select I8253
 651	select I8259
 652	select ISA
 
 653	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
 654	select SYS_HAS_CPU_R4X00
 655	select SYS_HAS_CPU_R5000
 656	select SYS_HAS_CPU_R10000
 657	select R5000_CPU_SCACHE
 658	select SYS_HAS_EARLY_PRINTK
 659	select SYS_SUPPORTS_32BIT_KERNEL
 660	select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
 661	select SYS_SUPPORTS_BIG_ENDIAN
 662	select SYS_SUPPORTS_HIGHMEM
 663	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 664	help
 665	  The SNI RM200/300/400 are MIPS-based machines manufactured by
 666	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
 667	  Technology and now in turn merged with Fujitsu.  Say Y here to
 668	  support this machine type.
 669
 670config MACH_TX39XX
 671	bool "Toshiba TX39 series based machines"
 672
 673config MACH_TX49XX
 674	bool "Toshiba TX49 series based machines"
 
 675
 676config MIKROTIK_RB532
 677	bool "Mikrotik RB532 boards"
 678	select CEVT_R4K
 679	select CSRC_R4K
 680	select DMA_NONCOHERENT
 681	select HW_HAS_PCI
 682	select IRQ_CPU
 683	select SYS_HAS_CPU_MIPS32_R1
 684	select SYS_SUPPORTS_32BIT_KERNEL
 685	select SYS_SUPPORTS_LITTLE_ENDIAN
 686	select SWAP_IO_SPACE
 687	select BOOT_RAW
 688	select ARCH_REQUIRE_GPIOLIB
 
 689	help
 690	  Support the Mikrotik(tm) RouterBoard 532 series,
 691	  based on the IDT RC32434 SoC.
 692
 693config WR_PPMC
 694	bool "Wind River PPMC board"
 695	select CEVT_R4K
 696	select CSRC_R4K
 697	select IRQ_CPU
 698	select BOOT_ELF32
 699	select DMA_NONCOHERENT
 700	select HW_HAS_PCI
 701	select PCI_GT64XXX_PCI0
 702	select SWAP_IO_SPACE
 703	select SYS_HAS_CPU_MIPS32_R1
 704	select SYS_HAS_CPU_MIPS32_R2
 705	select SYS_HAS_CPU_MIPS64_R1
 706	select SYS_HAS_CPU_NEVADA
 707	select SYS_HAS_CPU_RM7000
 708	select SYS_SUPPORTS_32BIT_KERNEL
 709	select SYS_SUPPORTS_64BIT_KERNEL
 710	select SYS_SUPPORTS_BIG_ENDIAN
 
 
 711	select SYS_SUPPORTS_LITTLE_ENDIAN
 712	help
 713	  This enables support for the Wind River MIPS32 4KC PPMC evaluation
 714	  board, which is based on GT64120 bridge chip.
 715
 716config CAVIUM_OCTEON_SIMULATOR
 717	bool "Cavium Networks Octeon Simulator"
 718	select CEVT_R4K
 719	select 64BIT_PHYS_ADDR
 720	select DMA_COHERENT
 721	select SYS_SUPPORTS_64BIT_KERNEL
 722	select SYS_SUPPORTS_BIG_ENDIAN
 723	select SYS_SUPPORTS_HIGHMEM
 724	select SYS_SUPPORTS_HOTPLUG_CPU
 725	select SYS_HAS_CPU_CAVIUM_OCTEON
 726	select HOLES_IN_ZONE
 727	help
 728	  The Octeon simulator is software performance model of the Cavium
 729	  Octeon Processor. It supports simulating Octeon processors on x86
 730	  hardware.
 731
 732config CAVIUM_OCTEON_REFERENCE_BOARD
 733	bool "Cavium Networks Octeon reference board"
 734	select CEVT_R4K
 735	select 64BIT_PHYS_ADDR
 736	select DMA_COHERENT
 737	select SYS_SUPPORTS_64BIT_KERNEL
 738	select SYS_SUPPORTS_BIG_ENDIAN
 739	select SYS_SUPPORTS_HIGHMEM
 740	select SYS_SUPPORTS_HOTPLUG_CPU
 741	select SYS_HAS_EARLY_PRINTK
 742	select SYS_HAS_CPU_CAVIUM_OCTEON
 743	select SWAP_IO_SPACE
 744	select HW_HAS_PCI
 745	select ARCH_SUPPORTS_MSI
 
 746	select ZONE_DMA32
 747	select USB_ARCH_HAS_OHCI
 748	select USB_ARCH_HAS_EHCI
 749	select HOLES_IN_ZONE
 
 
 
 
 
 
 
 
 750	help
 751	  This option supports all of the Octeon reference boards from Cavium
 752	  Networks. It builds a kernel that dynamically determines the Octeon
 753	  CPU type and supports all known board reference implementations.
 754	  Some of the supported boards are:
 755		EBT3000
 756		EBH3000
 757		EBH3100
 758		Thunder
 759		Kodama
 760		Hikari
 761	  Say Y here for most Octeon reference boards.
 762
 763config NLM_XLR_BOARD
 764	bool "Netlogic XLR/XLS based systems"
 765	depends on EXPERIMENTAL
 766	select BOOT_ELF32
 767	select NLM_COMMON
 768	select NLM_XLR
 769	select SYS_HAS_CPU_XLR
 770	select SYS_SUPPORTS_SMP
 771	select HW_HAS_PCI
 772	select SWAP_IO_SPACE
 773	select SYS_SUPPORTS_32BIT_KERNEL
 774	select SYS_SUPPORTS_64BIT_KERNEL
 775	select 64BIT_PHYS_ADDR
 776	select SYS_SUPPORTS_BIG_ENDIAN
 777	select SYS_SUPPORTS_HIGHMEM
 778	select DMA_COHERENT
 779	select NR_CPUS_DEFAULT_32
 780	select CEVT_R4K
 781	select CSRC_R4K
 782	select IRQ_CPU
 783	select ZONE_DMA if 64BIT
 784	select SYNC_R4K
 785	select SYS_HAS_EARLY_PRINTK
 786	help
 787	  Support for systems based on Netlogic XLR and XLS processors.
 788	  Say Y here if you have a XLR or XLS based board.
 789
 790endchoice
 791
 792source "arch/mips/alchemy/Kconfig"
 
 793source "arch/mips/ath79/Kconfig"
 
 794source "arch/mips/bcm63xx/Kconfig"
 
 
 
 795source "arch/mips/jazz/Kconfig"
 796source "arch/mips/jz4740/Kconfig"
 797source "arch/mips/lantiq/Kconfig"
 798source "arch/mips/lasat/Kconfig"
 799source "arch/mips/pmc-sierra/Kconfig"
 800source "arch/mips/powertv/Kconfig"
 801source "arch/mips/sgi-ip27/Kconfig"
 802source "arch/mips/sibyte/Kconfig"
 803source "arch/mips/txx9/Kconfig"
 804source "arch/mips/vr41xx/Kconfig"
 805source "arch/mips/cavium-octeon/Kconfig"
 806source "arch/mips/loongson/Kconfig"
 807source "arch/mips/netlogic/Kconfig"
 
 808
 809endmenu
 810
 811config RWSEM_GENERIC_SPINLOCK
 812	bool
 813	default y
 814
 815config RWSEM_XCHGADD_ALGORITHM
 816	bool
 817
 818config ARCH_HAS_ILOG2_U32
 819	bool
 820	default n
 821
 822config ARCH_HAS_ILOG2_U64
 823	bool
 824	default n
 825
 826config ARCH_SUPPORTS_OPROFILE
 827	bool
 828	default y if !MIPS_MT_SMTC
 829
 830config GENERIC_HWEIGHT
 831	bool
 832	default y
 833
 834config GENERIC_CALIBRATE_DELAY
 835	bool
 836	default y
 837
 838config GENERIC_CLOCKEVENTS
 839	bool
 840	default y
 841
 842config GENERIC_CMOS_UPDATE
 843	bool
 844	default y
 845
 846config SCHED_OMIT_FRAME_POINTER
 847	bool
 848	default y
 849
 850#
 851# Select some configuration options automatically based on user selections.
 852#
 853config ARC
 854	bool
 855
 856config ARCH_MAY_HAVE_PC_FDC
 857	bool
 858
 859config BOOT_RAW
 860	bool
 861
 862config CEVT_BCM1480
 863	bool
 864
 865config CEVT_DS1287
 866	bool
 867
 868config CEVT_GT641XX
 869	bool
 870
 871config CEVT_R4K_LIB
 872	bool
 873
 874config CEVT_R4K
 875	select CEVT_R4K_LIB
 876	bool
 877
 878config CEVT_SB1250
 879	bool
 880
 881config CEVT_TXX9
 882	bool
 883
 884config CSRC_BCM1480
 885	bool
 886
 887config CSRC_IOASIC
 888	bool
 889
 890config CSRC_POWERTV
 891	bool
 892
 893config CSRC_R4K_LIB
 894	bool
 895
 896config CSRC_R4K
 897	select CSRC_R4K_LIB
 898	bool
 899
 900config CSRC_SB1250
 901	bool
 902
 
 
 
 903config GPIO_TXX9
 904	select GENERIC_GPIO
 905	select ARCH_REQUIRE_GPIOLIB
 906	bool
 907
 908config CFE
 909	bool
 910
 911config ARCH_DMA_ADDR_T_64BIT
 912	def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
 913
 914config DMA_COHERENT
 915	bool
 916
 917config DMA_NONCOHERENT
 918	bool
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 919	select NEED_DMA_MAP_STATE
 920
 921config NEED_DMA_MAP_STATE
 922	bool
 923
 924config SYS_HAS_EARLY_PRINTK
 925	bool
 926
 927config HOTPLUG_CPU
 928	bool "Support for hot-pluggable CPUs"
 929	depends on SMP && HOTPLUG && SYS_SUPPORTS_HOTPLUG_CPU
 930	help
 931	  Say Y here to allow turning CPUs off and on. CPUs can be
 932	  controlled through /sys/devices/system/cpu.
 933	  (Note: power management support will enable this option
 934	    automatically on SMP systems. )
 935	  Say N if you want to disable CPU hotplug.
 936
 937config SYS_SUPPORTS_HOTPLUG_CPU
 938	bool
 939
 940config I8259
 941	bool
 942
 943config MIPS_BONITO64
 944	bool
 945
 946config MIPS_MSC
 947	bool
 948
 949config MIPS_NILE4
 950	bool
 951
 952config MIPS_DISABLE_OBSOLETE_IDE
 953	bool
 954
 955config SYNC_R4K
 956	bool
 957
 958config MIPS_MACHINE
 959	def_bool n
 960
 961config NO_IOPORT
 962	def_bool n
 963
 964config GENERIC_ISA_DMA
 965	bool
 966	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
 967	select ISA_DMA_API
 968
 969config GENERIC_ISA_DMA_SUPPORT_BROKEN
 970	bool
 971	select GENERIC_ISA_DMA
 972
 973config ISA_DMA_API
 974	bool
 975
 976config GENERIC_GPIO
 977	bool
 978
 979config HOLES_IN_ZONE
 980	bool
 981
 
 
 
 
 
 
 
 
 
 
 982#
 983# Endianess selection.  Sufficiently obscure so many users don't know what to
 984# answer,so we try hard to limit the available choices.  Also the use of a
 985# choice statement should be more obvious to the user.
 986#
 987choice
 988	prompt "Endianess selection"
 989	help
 990	  Some MIPS machines can be configured for either little or big endian
 991	  byte order. These modes require different kernels and a different
 992	  Linux distribution.  In general there is one preferred byteorder for a
 993	  particular system but some systems are just as commonly used in the
 994	  one or the other endianness.
 995
 996config CPU_BIG_ENDIAN
 997	bool "Big endian"
 998	depends on SYS_SUPPORTS_BIG_ENDIAN
 999
1000config CPU_LITTLE_ENDIAN
1001	bool "Little endian"
1002	depends on SYS_SUPPORTS_LITTLE_ENDIAN
1003	help
1004
1005endchoice
1006
1007config EXPORT_UASM
1008	bool
1009
1010config SYS_SUPPORTS_APM_EMULATION
1011	bool
1012
1013config SYS_SUPPORTS_BIG_ENDIAN
1014	bool
1015
1016config SYS_SUPPORTS_LITTLE_ENDIAN
1017	bool
1018
1019config SYS_SUPPORTS_HUGETLBFS
1020	bool
1021	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
1022	default y
1023
1024config IRQ_CPU
1025	bool
1026
1027config IRQ_CPU_RM7K
1028	bool
1029
1030config IRQ_CPU_RM9K
1031	bool
1032
1033config IRQ_MSP_SLP
1034	bool
1035
1036config IRQ_MSP_CIC
1037	bool
1038
1039config IRQ_TXX9
1040	bool
1041
1042config IRQ_GT641XX
1043	bool
1044
1045config IRQ_GIC
1046	bool
1047
1048config MIPS_BOARDS_GEN
1049	bool
1050
1051config PCI_GT64XXX_PCI0
1052	bool
1053
1054config NO_EXCEPT_FILL
1055	bool
1056
1057config MIPS_RM9122
1058	bool
1059	select SERIAL_RM9000
1060
1061config SOC_EMMA2RH
1062	bool
1063	select CEVT_R4K
1064	select CSRC_R4K
1065	select DMA_NONCOHERENT
1066	select IRQ_CPU
1067	select SWAP_IO_SPACE
1068	select SYS_HAS_CPU_R5500
1069	select SYS_SUPPORTS_32BIT_KERNEL
1070	select SYS_SUPPORTS_64BIT_KERNEL
1071	select SYS_SUPPORTS_BIG_ENDIAN
1072
1073config SOC_PNX833X
1074	bool
1075	select CEVT_R4K
1076	select CSRC_R4K
1077	select IRQ_CPU
1078	select DMA_NONCOHERENT
1079	select SYS_HAS_CPU_MIPS32_R2
1080	select SYS_SUPPORTS_32BIT_KERNEL
1081	select SYS_SUPPORTS_LITTLE_ENDIAN
1082	select SYS_SUPPORTS_BIG_ENDIAN
1083	select GENERIC_GPIO
1084	select CPU_MIPSR2_IRQ_VI
1085
1086config SOC_PNX8335
1087	bool
1088	select SOC_PNX833X
1089
1090config PNX8550
1091	bool
1092	select SOC_PNX8550
1093
1094config SOC_PNX8550
1095	bool
1096	select DMA_NONCOHERENT
1097	select HW_HAS_PCI
1098	select SYS_HAS_CPU_MIPS32_R1
1099	select SYS_HAS_EARLY_PRINTK
1100	select SYS_SUPPORTS_32BIT_KERNEL
1101	select GENERIC_GPIO
1102
1103config SWAP_IO_SPACE
1104	bool
1105
1106config SERIAL_RM9000
1107	bool
1108
1109config SGI_HAS_INDYDOG
1110	bool
1111
1112config SGI_HAS_HAL2
1113	bool
1114
1115config SGI_HAS_SEEQ
1116	bool
1117
1118config SGI_HAS_WD93
1119	bool
1120
1121config SGI_HAS_ZILOG
1122	bool
1123
1124config SGI_HAS_I8042
1125	bool
1126
1127config DEFAULT_SGI_PARTITION
1128	bool
1129
1130config ARC32
1131	bool
1132
1133config SNIPROM
1134	bool
1135
1136config BOOT_ELF32
1137	bool
1138
 
 
 
 
 
 
 
 
 
 
 
 
1139config MIPS_L1_CACHE_SHIFT
1140	int
1141	default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL
1142	default "6" if MIPS_CPU_SCACHE
1143	default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
 
1144	default "5"
1145
1146config HAVE_STD_PC_SERIAL_PORT
1147	bool
1148
1149config ARC_CONSOLE
1150	bool "ARC console support"
1151	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1152
1153config ARC_MEMORY
1154	bool
1155	depends on MACH_JAZZ || SNI_RM || SGI_IP32
1156	default y
1157
1158config ARC_PROMLIB
1159	bool
1160	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
1161	default y
1162
1163config ARC64
1164	bool
1165
1166config BOOT_ELF64
1167	bool
1168
1169menu "CPU selection"
1170
1171choice
1172	prompt "CPU type"
1173	default CPU_R4X00
1174
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1175config CPU_LOONGSON2E
1176	bool "Loongson 2E"
1177	depends on SYS_HAS_CPU_LOONGSON2E
1178	select CPU_LOONGSON2
1179	help
1180	  The Loongson 2E processor implements the MIPS III instruction set
1181	  with many extensions.
1182
1183	  It has an internal FPGA northbridge, which is compatible to
1184	  bonito64.
1185
1186config CPU_LOONGSON2F
1187	bool "Loongson 2F"
1188	depends on SYS_HAS_CPU_LOONGSON2F
1189	select CPU_LOONGSON2
1190	select GENERIC_GPIO
1191	select ARCH_REQUIRE_GPIOLIB
1192	help
1193	  The Loongson 2F processor implements the MIPS III instruction set
1194	  with many extensions.
1195
1196	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1197	  have a similar programming interface with FPGA northbridge used in
1198	  Loongson2E.
1199
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1200config CPU_MIPS32_R1
1201	bool "MIPS32 Release 1"
1202	depends on SYS_HAS_CPU_MIPS32_R1
1203	select CPU_HAS_PREFETCH
1204	select CPU_SUPPORTS_32BIT_KERNEL
1205	select CPU_SUPPORTS_HIGHMEM
1206	help
1207	  Choose this option to build a kernel for release 1 or later of the
1208	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1209	  MIPS processor are based on a MIPS32 processor.  If you know the
1210	  specific type of processor in your system, choose those that one
1211	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1212	  Release 2 of the MIPS32 architecture is available since several
1213	  years so chances are you even have a MIPS32 Release 2 processor
1214	  in which case you should choose CPU_MIPS32_R2 instead for better
1215	  performance.
1216
1217config CPU_MIPS32_R2
1218	bool "MIPS32 Release 2"
1219	depends on SYS_HAS_CPU_MIPS32_R2
1220	select CPU_HAS_PREFETCH
1221	select CPU_SUPPORTS_32BIT_KERNEL
1222	select CPU_SUPPORTS_HIGHMEM
 
 
1223	help
1224	  Choose this option to build a kernel for release 2 or later of the
1225	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1226	  MIPS processor are based on a MIPS32 processor.  If you know the
1227	  specific type of processor in your system, choose those that one
1228	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1229
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1230config CPU_MIPS64_R1
1231	bool "MIPS64 Release 1"
1232	depends on SYS_HAS_CPU_MIPS64_R1
1233	select CPU_HAS_PREFETCH
1234	select CPU_SUPPORTS_32BIT_KERNEL
1235	select CPU_SUPPORTS_64BIT_KERNEL
1236	select CPU_SUPPORTS_HIGHMEM
1237	select CPU_SUPPORTS_HUGEPAGES
1238	help
1239	  Choose this option to build a kernel for release 1 or later of the
1240	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1241	  MIPS processor are based on a MIPS64 processor.  If you know the
1242	  specific type of processor in your system, choose those that one
1243	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1244	  Release 2 of the MIPS64 architecture is available since several
1245	  years so chances are you even have a MIPS64 Release 2 processor
1246	  in which case you should choose CPU_MIPS64_R2 instead for better
1247	  performance.
1248
1249config CPU_MIPS64_R2
1250	bool "MIPS64 Release 2"
1251	depends on SYS_HAS_CPU_MIPS64_R2
1252	select CPU_HAS_PREFETCH
1253	select CPU_SUPPORTS_32BIT_KERNEL
1254	select CPU_SUPPORTS_64BIT_KERNEL
1255	select CPU_SUPPORTS_HIGHMEM
1256	select CPU_SUPPORTS_HUGEPAGES
 
 
1257	help
1258	  Choose this option to build a kernel for release 2 or later of the
1259	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1260	  MIPS processor are based on a MIPS64 processor.  If you know the
1261	  specific type of processor in your system, choose those that one
1262	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1263
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1264config CPU_R3000
1265	bool "R3000"
1266	depends on SYS_HAS_CPU_R3000
1267	select CPU_HAS_WB
 
1268	select CPU_SUPPORTS_32BIT_KERNEL
1269	select CPU_SUPPORTS_HIGHMEM
1270	help
1271	  Please make sure to pick the right CPU type. Linux/MIPS is not
1272	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1273	  *not* work on R4000 machines and vice versa.  However, since most
1274	  of the supported machines have an R4000 (or similar) CPU, R4x00
1275	  might be a safe bet.  If the resulting kernel does not work,
1276	  try to recompile with R3000.
1277
1278config CPU_TX39XX
1279	bool "R39XX"
1280	depends on SYS_HAS_CPU_TX39XX
1281	select CPU_SUPPORTS_32BIT_KERNEL
1282
1283config CPU_VR41XX
1284	bool "R41xx"
1285	depends on SYS_HAS_CPU_VR41XX
1286	select CPU_SUPPORTS_32BIT_KERNEL
1287	select CPU_SUPPORTS_64BIT_KERNEL
1288	help
1289	  The options selects support for the NEC VR4100 series of processors.
1290	  Only choose this option if you have one of these processors as a
1291	  kernel built with this option will not run on any other type of
1292	  processor or vice versa.
1293
1294config CPU_R4300
1295	bool "R4300"
1296	depends on SYS_HAS_CPU_R4300
1297	select CPU_SUPPORTS_32BIT_KERNEL
1298	select CPU_SUPPORTS_64BIT_KERNEL
1299	help
1300	  MIPS Technologies R4300-series processors.
1301
1302config CPU_R4X00
1303	bool "R4x00"
1304	depends on SYS_HAS_CPU_R4X00
1305	select CPU_SUPPORTS_32BIT_KERNEL
1306	select CPU_SUPPORTS_64BIT_KERNEL
 
1307	help
1308	  MIPS Technologies R4000-series processors other than 4300, including
1309	  the R4000, R4400, R4600, and 4700.
1310
1311config CPU_TX49XX
1312	bool "R49XX"
1313	depends on SYS_HAS_CPU_TX49XX
1314	select CPU_HAS_PREFETCH
1315	select CPU_SUPPORTS_32BIT_KERNEL
1316	select CPU_SUPPORTS_64BIT_KERNEL
 
1317
1318config CPU_R5000
1319	bool "R5000"
1320	depends on SYS_HAS_CPU_R5000
1321	select CPU_SUPPORTS_32BIT_KERNEL
1322	select CPU_SUPPORTS_64BIT_KERNEL
 
1323	help
1324	  MIPS Technologies R5000-series processors other than the Nevada.
1325
1326config CPU_R5432
1327	bool "R5432"
1328	depends on SYS_HAS_CPU_R5432
1329	select CPU_SUPPORTS_32BIT_KERNEL
1330	select CPU_SUPPORTS_64BIT_KERNEL
1331
1332config CPU_R5500
1333	bool "R5500"
1334	depends on SYS_HAS_CPU_R5500
1335	select CPU_SUPPORTS_32BIT_KERNEL
1336	select CPU_SUPPORTS_64BIT_KERNEL
1337	select CPU_SUPPORTS_HUGEPAGES
1338	help
1339	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1340	  instruction set.
1341
1342config CPU_R6000
1343	bool "R6000"
1344	depends on EXPERIMENTAL
1345	depends on SYS_HAS_CPU_R6000
1346	select CPU_SUPPORTS_32BIT_KERNEL
1347	help
1348	  MIPS Technologies R6000 and R6000A series processors.  Note these
1349	  processors are extremely rare and the support for them is incomplete.
1350
1351config CPU_NEVADA
1352	bool "RM52xx"
1353	depends on SYS_HAS_CPU_NEVADA
1354	select CPU_SUPPORTS_32BIT_KERNEL
1355	select CPU_SUPPORTS_64BIT_KERNEL
 
1356	help
1357	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1358
1359config CPU_R8000
1360	bool "R8000"
1361	depends on EXPERIMENTAL
1362	depends on SYS_HAS_CPU_R8000
1363	select CPU_HAS_PREFETCH
1364	select CPU_SUPPORTS_64BIT_KERNEL
1365	help
1366	  MIPS Technologies R8000 processors.  Note these processors are
1367	  uncommon and the support for them is incomplete.
1368
1369config CPU_R10000
1370	bool "R10000"
1371	depends on SYS_HAS_CPU_R10000
1372	select CPU_HAS_PREFETCH
1373	select CPU_SUPPORTS_32BIT_KERNEL
1374	select CPU_SUPPORTS_64BIT_KERNEL
1375	select CPU_SUPPORTS_HIGHMEM
 
1376	help
1377	  MIPS Technologies R10000-series processors.
1378
1379config CPU_RM7000
1380	bool "RM7000"
1381	depends on SYS_HAS_CPU_RM7000
1382	select CPU_HAS_PREFETCH
1383	select CPU_SUPPORTS_32BIT_KERNEL
1384	select CPU_SUPPORTS_64BIT_KERNEL
1385	select CPU_SUPPORTS_HIGHMEM
1386
1387config CPU_RM9000
1388	bool "RM9000"
1389	depends on SYS_HAS_CPU_RM9000
1390	select CPU_HAS_PREFETCH
1391	select CPU_SUPPORTS_32BIT_KERNEL
1392	select CPU_SUPPORTS_64BIT_KERNEL
1393	select CPU_SUPPORTS_HIGHMEM
1394	select WEAK_ORDERING
1395
1396config CPU_SB1
1397	bool "SB1"
1398	depends on SYS_HAS_CPU_SB1
1399	select CPU_SUPPORTS_32BIT_KERNEL
1400	select CPU_SUPPORTS_64BIT_KERNEL
1401	select CPU_SUPPORTS_HIGHMEM
 
1402	select WEAK_ORDERING
1403
1404config CPU_CAVIUM_OCTEON
1405	bool "Cavium Octeon processor"
1406	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1407	select CPU_HAS_PREFETCH
1408	select CPU_SUPPORTS_64BIT_KERNEL
1409	select SYS_SUPPORTS_SMP
1410	select NR_CPUS_DEFAULT_16
1411	select WEAK_ORDERING
1412	select CPU_SUPPORTS_HIGHMEM
1413	select CPU_SUPPORTS_HUGEPAGES
 
 
 
 
1414	help
1415	  The Cavium Octeon processor is a highly integrated chip containing
1416	  many ethernet hardware widgets for networking tasks. The processor
1417	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1418	  Full details can be found at http://www.caviumnetworks.com.
1419
1420config CPU_BMIPS3300
1421	bool "BMIPS3300"
1422	depends on SYS_HAS_CPU_BMIPS3300
1423	select DMA_NONCOHERENT
1424	select IRQ_CPU
1425	select SWAP_IO_SPACE
1426	select SYS_SUPPORTS_32BIT_KERNEL
1427	select WEAK_ORDERING
1428	help
1429	  Broadcom BMIPS3300 processors.
1430
1431config CPU_BMIPS4350
1432	bool "BMIPS4350"
1433	depends on SYS_HAS_CPU_BMIPS4350
1434	select CPU_SUPPORTS_32BIT_KERNEL
1435	select DMA_NONCOHERENT
1436	select IRQ_CPU
1437	select SWAP_IO_SPACE
1438	select SYS_SUPPORTS_SMP
1439	select SYS_SUPPORTS_HOTPLUG_CPU
1440	select WEAK_ORDERING
 
 
 
 
 
1441	help
1442	  Broadcom BMIPS4350 ("VIPER") processors.
1443
1444config CPU_BMIPS4380
1445	bool "BMIPS4380"
1446	depends on SYS_HAS_CPU_BMIPS4380
1447	select CPU_SUPPORTS_32BIT_KERNEL
1448	select DMA_NONCOHERENT
1449	select IRQ_CPU
1450	select SWAP_IO_SPACE
1451	select SYS_SUPPORTS_SMP
1452	select SYS_SUPPORTS_HOTPLUG_CPU
1453	select WEAK_ORDERING
1454	help
1455	  Broadcom BMIPS4380 processors.
 
 
1456
1457config CPU_BMIPS5000
1458	bool "BMIPS5000"
1459	depends on SYS_HAS_CPU_BMIPS5000
1460	select CPU_SUPPORTS_32BIT_KERNEL
1461	select CPU_SUPPORTS_HIGHMEM
1462	select DMA_NONCOHERENT
1463	select IRQ_CPU
1464	select SWAP_IO_SPACE
1465	select SYS_SUPPORTS_SMP
1466	select SYS_SUPPORTS_HOTPLUG_CPU
1467	select WEAK_ORDERING
 
 
 
 
1468	help
1469	  Broadcom BMIPS5000 processors.
 
 
1470
1471config CPU_XLR
1472	bool "Netlogic XLR SoC"
1473	depends on SYS_HAS_CPU_XLR
1474	select CPU_SUPPORTS_32BIT_KERNEL
1475	select CPU_SUPPORTS_64BIT_KERNEL
1476	select CPU_SUPPORTS_HIGHMEM
1477	select WEAK_ORDERING
1478	select WEAK_REORDERING_BEYOND_LLSC
1479	select CPU_SUPPORTS_HUGEPAGES
 
1480	help
1481	  Netlogic Microsystems XLR/XLS processors.
1482endchoice
 
 
 
 
1483
1484if CPU_LOONGSON2F
1485config CPU_NOP_WORKAROUNDS
1486	bool
1487
1488config CPU_JUMP_WORKAROUNDS
1489	bool
1490
1491config CPU_LOONGSON2F_WORKAROUNDS
1492	bool "Loongson 2F Workarounds"
1493	default y
1494	select CPU_NOP_WORKAROUNDS
1495	select CPU_JUMP_WORKAROUNDS
1496	help
1497	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1498	  require workarounds.  Without workarounds the system may hang
1499	  unexpectedly.  For more information please refer to the gas
1500	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1501
1502	  Loongson 2F03 and later have fixed these issues and no workarounds
1503	  are needed.  The workarounds have no significant side effect on them
1504	  but may decrease the performance of the system so this option should
1505	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1506	  systems.
1507
1508	  If unsure, please say Y.
1509endif # CPU_LOONGSON2F
1510
1511config SYS_SUPPORTS_ZBOOT
1512	bool
1513	select HAVE_KERNEL_GZIP
1514	select HAVE_KERNEL_BZIP2
 
1515	select HAVE_KERNEL_LZMA
1516	select HAVE_KERNEL_LZO
 
 
1517
1518config SYS_SUPPORTS_ZBOOT_UART16550
1519	bool
1520	select SYS_SUPPORTS_ZBOOT
1521
1522config CPU_LOONGSON2
 
 
 
 
1523	bool
1524	select CPU_SUPPORTS_32BIT_KERNEL
1525	select CPU_SUPPORTS_64BIT_KERNEL
1526	select CPU_SUPPORTS_HIGHMEM
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1527
1528config SYS_HAS_CPU_LOONGSON2E
1529	bool
1530
1531config SYS_HAS_CPU_LOONGSON2F
1532	bool
1533	select CPU_SUPPORTS_CPUFREQ
1534	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1535	select CPU_SUPPORTS_UNCACHED_ACCELERATED
 
 
 
 
 
1536
1537config SYS_HAS_CPU_MIPS32_R1
1538	bool
1539
1540config SYS_HAS_CPU_MIPS32_R2
1541	bool
1542
 
 
 
 
 
 
 
 
 
1543config SYS_HAS_CPU_MIPS64_R1
1544	bool
1545
1546config SYS_HAS_CPU_MIPS64_R2
1547	bool
1548
1549config SYS_HAS_CPU_R3000
 
 
 
1550	bool
1551
1552config SYS_HAS_CPU_TX39XX
1553	bool
1554
1555config SYS_HAS_CPU_VR41XX
1556	bool
1557
1558config SYS_HAS_CPU_R4300
1559	bool
1560
1561config SYS_HAS_CPU_R4X00
1562	bool
1563
1564config SYS_HAS_CPU_TX49XX
1565	bool
1566
1567config SYS_HAS_CPU_R5000
1568	bool
1569
1570config SYS_HAS_CPU_R5432
1571	bool
1572
1573config SYS_HAS_CPU_R5500
1574	bool
1575
1576config SYS_HAS_CPU_R6000
1577	bool
1578
1579config SYS_HAS_CPU_NEVADA
1580	bool
1581
1582config SYS_HAS_CPU_R8000
1583	bool
1584
1585config SYS_HAS_CPU_R10000
1586	bool
1587
1588config SYS_HAS_CPU_RM7000
1589	bool
1590
1591config SYS_HAS_CPU_RM9000
1592	bool
1593
1594config SYS_HAS_CPU_SB1
1595	bool
1596
1597config SYS_HAS_CPU_CAVIUM_OCTEON
1598	bool
1599
1600config SYS_HAS_CPU_BMIPS3300
 
 
 
1601	bool
 
1602
1603config SYS_HAS_CPU_BMIPS4350
1604	bool
 
1605
1606config SYS_HAS_CPU_BMIPS4380
1607	bool
 
1608
1609config SYS_HAS_CPU_BMIPS5000
1610	bool
1611
1612config SYS_HAS_CPU_XLR
1613	bool
1614
1615#
1616# CPU may reorder R->R, R->W, W->R, W->W
1617# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1618#
1619config WEAK_ORDERING
1620	bool
1621
1622#
1623# CPU may reorder reads and writes beyond LL/SC
1624# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1625#
1626config WEAK_REORDERING_BEYOND_LLSC
1627	bool
1628endmenu
1629
1630#
1631# These two indicate any level of the MIPS32 and MIPS64 architecture
1632#
1633config CPU_MIPS32
1634	bool
1635	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
 
1636
1637config CPU_MIPS64
1638	bool
1639	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
 
1640
1641#
1642# These two indicate the revision of the architecture, either Release 1 or Release 2
1643#
1644config CPU_MIPSR1
1645	bool
1646	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1647
1648config CPU_MIPSR2
1649	bool
1650	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1651
1652config SYS_SUPPORTS_32BIT_KERNEL
1653	bool
1654config SYS_SUPPORTS_64BIT_KERNEL
1655	bool
1656config CPU_SUPPORTS_32BIT_KERNEL
1657	bool
1658config CPU_SUPPORTS_64BIT_KERNEL
1659	bool
1660config CPU_SUPPORTS_CPUFREQ
1661	bool
1662config CPU_SUPPORTS_ADDRWINCFG
1663	bool
1664config CPU_SUPPORTS_HUGEPAGES
1665	bool
1666config CPU_SUPPORTS_UNCACHED_ACCELERATED
1667	bool
1668config MIPS_PGD_C0_CONTEXT
1669	bool
1670	default y if 64BIT && CPU_MIPSR2
 
1671
1672#
1673# Set to y for ptrace access to watch registers.
1674#
1675config HARDWARE_WATCHPOINTS
1676       bool
1677       default y if CPU_MIPSR1 || CPU_MIPSR2
1678
1679menu "Kernel type"
1680
1681choice
1682
1683	prompt "Kernel code model"
1684	help
1685	  You should only select this option if you have a workload that
1686	  actually benefits from 64-bit processing or if your machine has
1687	  large memory.  You will only be presented a single option in this
1688	  menu if your system does not support both 32-bit and 64-bit kernels.
1689
1690config 32BIT
1691	bool "32-bit kernel"
1692	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
1693	select TRAD_SIGNALS
1694	help
1695	  Select this option if you want to build a 32-bit kernel.
 
1696config 64BIT
1697	bool "64-bit kernel"
1698	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
1699	select HAVE_SYSCALL_WRAPPERS
1700	help
1701	  Select this option if you want to build a 64-bit kernel.
1702
1703endchoice
1704
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1705choice
1706	prompt "Kernel page size"
1707	default PAGE_SIZE_4KB
1708
1709config PAGE_SIZE_4KB
1710	bool "4kB"
1711	depends on !CPU_LOONGSON2
1712	help
1713	 This option select the standard 4kB Linux page size.  On some
1714	 R3000-family processors this is the only available page size.  Using
1715	 4kB page size will minimize memory consumption and is therefore
1716	 recommended for low memory systems.
1717
1718config PAGE_SIZE_8KB
1719	bool "8kB"
1720	depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON
 
1721	help
1722	  Using 8kB page size will result in higher performance kernel at
1723	  the price of higher memory consumption.  This option is available
1724	  only on R8000 and cnMIPS processors.  Note that you will need a
1725	  suitable Linux distribution to support this.
1726
1727config PAGE_SIZE_16KB
1728	bool "16kB"
1729	depends on !CPU_R3000 && !CPU_TX39XX
1730	help
1731	  Using 16kB page size will result in higher performance kernel at
1732	  the price of higher memory consumption.  This option is available on
1733	  all non-R3000 family processors.  Note that you will need a suitable
1734	  Linux distribution to support this.
1735
1736config PAGE_SIZE_32KB
1737	bool "32kB"
1738	depends on CPU_CAVIUM_OCTEON
 
1739	help
1740	  Using 32kB page size will result in higher performance kernel at
1741	  the price of higher memory consumption.  This option is available
1742	  only on cnMIPS cores.  Note that you will need a suitable Linux
1743	  distribution to support this.
1744
1745config PAGE_SIZE_64KB
1746	bool "64kB"
1747	depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
1748	help
1749	  Using 64kB page size will result in higher performance kernel at
1750	  the price of higher memory consumption.  This option is available on
1751	  all non-R3000 family processor.  Not that at the time of this
1752	  writing this option is still high experimental.
1753
1754endchoice
1755
1756config FORCE_MAX_ZONEORDER
1757	int "Maximum zone order"
1758	range 13 64 if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_32KB
1759	default "13" if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_32KB
1760	range 12 64 if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_16KB
1761	default "12" if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_16KB
1762	range 11 64
1763	default "11"
1764	help
1765	  The kernel memory allocator divides physically contiguous memory
1766	  blocks into "zones", where each zone is a power of two number of
1767	  pages.  This option selects the largest power of two that the kernel
1768	  keeps in the memory allocator.  If you need to allocate very large
1769	  blocks of physically contiguous memory, then you may need to
1770	  increase this value.
1771
1772	  This config option is actually maximum order plus one. For example,
1773	  a value of 11 means that the largest free memory block is 2^10 pages.
1774
1775	  The page size is not necessarily 4KB.  Keep this in mind
1776	  when choosing a value for this option.
1777
1778config BOARD_SCACHE
1779	bool
1780
1781config IP22_CPU_SCACHE
1782	bool
1783	select BOARD_SCACHE
1784
1785#
1786# Support for a MIPS32 / MIPS64 style S-caches
1787#
1788config MIPS_CPU_SCACHE
1789	bool
1790	select BOARD_SCACHE
1791
1792config R5000_CPU_SCACHE
1793	bool
1794	select BOARD_SCACHE
1795
1796config RM7000_CPU_SCACHE
1797	bool
1798	select BOARD_SCACHE
1799
1800config SIBYTE_DMA_PAGEOPS
1801	bool "Use DMA to clear/copy pages"
1802	depends on CPU_SB1
1803	help
1804	  Instead of using the CPU to zero and copy pages, use a Data Mover
1805	  channel.  These DMA channels are otherwise unused by the standard
1806	  SiByte Linux port.  Seems to give a small performance benefit.
1807
1808config CPU_HAS_PREFETCH
1809	bool
1810
1811choice
1812	prompt "MIPS MT options"
 
1813
1814config MIPS_MT_DISABLED
1815	bool "Disable multithreading support."
 
1816	help
1817	  Use this option if your workload can't take advantage of
1818	  MIPS hardware multithreading support.  On systems that don't have
1819	  the option of an MT-enabled processor this option will be the only
1820	  option in this menu.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1821
1822config MIPS_MT_SMP
1823	bool "Use 1 TC on each available VPE for SMP"
1824	depends on SYS_SUPPORTS_MULTITHREADING
 
1825	select CPU_MIPSR2_IRQ_VI
1826	select CPU_MIPSR2_IRQ_EI
 
1827	select MIPS_MT
1828	select NR_CPUS_DEFAULT_2
1829	select SMP
1830	select SYS_SUPPORTS_SCHED_SMT if SMP
1831	select SYS_SUPPORTS_SMP
1832	select SMP_UP
1833	help
1834	  This is a kernel model which is known a VSMP but lately has been
1835	  marketesed into SMVP.
1836	  Virtual SMP uses the processor's VPEs  to implement virtual
1837	  processors. In currently available configuration of the 34K processor
1838	  this allows for a dual processor. Both processors will share the same
1839	  primary caches; each will obtain the half of the TLB for it's own
1840	  exclusive use. For a layman this model can be described as similar to
1841	  what Intel calls Hyperthreading.
1842
1843	  For further information see http://www.linux-mips.org/wiki/34K#VSMP
1844
1845config MIPS_MT_SMTC
1846	bool "SMTC: Use all TCs on all VPEs for SMP"
1847	depends on CPU_MIPS32_R2
1848	#depends on CPU_MIPS64_R2		# once there is hardware ...
1849	depends on SYS_SUPPORTS_MULTITHREADING
1850	select CPU_MIPSR2_IRQ_VI
1851	select CPU_MIPSR2_IRQ_EI
1852	select MIPS_MT
1853	select NR_CPUS_DEFAULT_8
1854	select SMP
1855	select SYS_SUPPORTS_SMP
1856	select SMP_UP
 
1857	help
1858	  This is a kernel model which is known a SMTC or lately has been
1859	  marketesed into SMVP.
1860	  is presenting the available TC's of the core as processors to Linux.
1861	  On currently available 34K processors this means a Linux system will
1862	  see up to 5 processors. The implementation of the SMTC kernel differs
1863	  significantly from VSMP and cannot efficiently coexist in the same
1864	  kernel binary so the choice between VSMP and SMTC is a compile time
1865	  decision.
1866
1867	  For further information see http://www.linux-mips.org/wiki/34K#SMTC
1868
1869endchoice
1870
1871config MIPS_MT
1872	bool
1873
1874config SCHED_SMT
1875	bool "SMT (multithreading) scheduler support"
1876	depends on SYS_SUPPORTS_SCHED_SMT
1877	default n
1878	help
1879	  SMT scheduler support improves the CPU scheduler's decision making
1880	  when dealing with MIPS MT enabled cores at a cost of slightly
1881	  increased overhead in some places. If unsure say N here.
1882
1883config SYS_SUPPORTS_SCHED_SMT
1884	bool
1885
1886
1887config SYS_SUPPORTS_MULTITHREADING
1888	bool
1889
1890config MIPS_MT_FPAFF
1891	bool "Dynamic FPU affinity for FP-intensive threads"
1892	default y
1893	depends on MIPS_MT_SMP || MIPS_MT_SMTC
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1894
1895config MIPS_VPE_LOADER
1896	bool "VPE loader support."
1897	depends on SYS_SUPPORTS_MULTITHREADING
1898	select CPU_MIPSR2_IRQ_VI
1899	select CPU_MIPSR2_IRQ_EI
1900	select MIPS_MT
1901	help
1902	  Includes a loader for loading an elf relocatable object
1903	  onto another VPE and running it.
1904
1905config MIPS_MT_SMTC_IM_BACKSTOP
1906	bool "Use per-TC register bits as backstop for inhibited IM bits"
1907	depends on MIPS_MT_SMTC
1908	default n
1909	help
1910	  To support multiple TC microthreads acting as "CPUs" within
1911	  a VPE, VPE-wide interrupt mask bits must be specially manipulated
1912	  during interrupt handling. To support legacy drivers and interrupt
1913	  controller management code, SMTC has a "backstop" to track and
1914	  if necessary restore the interrupt mask. This has some performance
1915	  impact on interrupt service overhead.
1916
1917config MIPS_MT_SMTC_IRQAFF
1918	bool "Support IRQ affinity API"
1919	depends on MIPS_MT_SMTC
1920	default n
1921	help
1922	  Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.)
1923	  for SMTC Linux kernel. Requires platform support, of which
1924	  an example can be found in the MIPS kernel i8259 and Malta
1925	  platform code.  Adds some overhead to interrupt dispatch, and
1926	  should be used only if you know what you are doing.
1927
1928config MIPS_VPE_LOADER_TOM
1929	bool "Load VPE program into memory hidden from linux"
1930	depends on MIPS_VPE_LOADER
1931	default y
1932	help
1933	  The loader can use memory that is present but has been hidden from
1934	  Linux using the kernel command line option "mem=xxMB". It's up to
1935	  you to ensure the amount you put in the option and the space your
1936	  program requires is less or equal to the amount physically present.
1937
1938# this should possibly be in drivers/char, but it is rather cpu related. Hmmm
1939config MIPS_VPE_APSP_API
1940	bool "Enable support for AP/SP API (RTLX)"
1941	depends on MIPS_VPE_LOADER
1942	help
1943
1944config MIPS_APSP_KSPD
1945	bool "Enable KSPD"
 
1946	depends on MIPS_VPE_APSP_API
1947	default y
1948	help
1949	  KSPD is a kernel daemon that accepts syscall requests from the SP
1950	  side, actions them and returns the results. It also handles the
1951	  "exit" syscall notifying other kernel modules the SP program is
1952	  exiting.  You probably want to say yes here.
1953
1954config MIPS_CMP
1955	bool "MIPS CMP framework support"
1956	depends on SYS_SUPPORTS_MIPS_CMP
1957	select SYNC_R4K
1958	select SYS_SUPPORTS_SMP
1959	select SYS_SUPPORTS_SCHED_SMT if SMP
1960	select WEAK_ORDERING
1961	default n
1962	help
1963	  This is a placeholder option for the GCMP work. It will need to
1964	  be handled differently...
 
 
 
1965
1966config SB1_PASS_1_WORKAROUNDS
 
 
 
 
 
 
 
 
1967	bool
1968	depends on CPU_SB1_PASS_1
1969	default y
1970
1971config SB1_PASS_2_WORKAROUNDS
1972	bool
1973	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
1974	default y
1975
1976config SB1_PASS_2_1_WORKAROUNDS
1977	bool
1978	depends on CPU_SB1 && CPU_SB1_PASS_2
1979	default y
1980
1981config 64BIT_PHYS_ADDR
1982	bool
1983
1984config ARCH_PHYS_ADDR_T_64BIT
1985       def_bool 64BIT_PHYS_ADDR
 
 
1986
1987config CPU_HAS_SMARTMIPS
1988	depends on SYS_SUPPORTS_SMARTMIPS
1989	bool "Support for the SmartMIPS ASE"
1990	help
1991	  SmartMIPS is a extension of the MIPS32 architecture aimed at
1992	  increased security at both hardware and software level for
1993	  smartcards.  Enabling this option will allow proper use of the
1994	  SmartMIPS instructions by Linux applications.  However a kernel with
1995	  this option will not work on a MIPS core without SmartMIPS core.  If
1996	  you don't know you probably don't have SmartMIPS and should say N
1997	  here.
1998
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1999config CPU_HAS_WB
2000	bool
2001
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2002#
2003# Vectored interrupt mode is an R2 feature
2004#
2005config CPU_MIPSR2_IRQ_VI
2006	bool
2007
2008#
2009# Extended interrupt mode is an R2 feature
2010#
2011config CPU_MIPSR2_IRQ_EI
2012	bool
2013
2014config CPU_HAS_SYNC
2015	bool
2016	depends on !CPU_R3000
2017	default y
2018
2019config GENERIC_CLOCKEVENTS_BROADCAST
2020	bool
2021
2022#
2023# CPU non-features
2024#
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2025config CPU_DADDI_WORKAROUNDS
2026	bool
2027
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2028config CPU_R4000_WORKAROUNDS
2029	bool
2030	select CPU_R4400_WORKAROUNDS
2031
 
 
 
 
 
 
2032config CPU_R4400_WORKAROUNDS
2033	bool
2034
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2035#
2036# - Highmem only makes sense for the 32-bit kernel.
2037# - The current highmem code will only work properly on physically indexed
2038#   caches such as R3000, SB1, R7000 or those that look like they're virtually
2039#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
2040#   moment we protect the user and offer the highmem option only on machines
2041#   where it's known to be safe.  This will not offer highmem on a few systems
2042#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2043#   indexed CPUs but we're playing safe.
2044# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2045#   know they might have memory configurations that could make use of highmem
2046#   support.
2047#
2048config HIGHMEM
2049	bool "High Memory Support"
2050	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM
 
2051
2052config CPU_SUPPORTS_HIGHMEM
2053	bool
2054
2055config SYS_SUPPORTS_HIGHMEM
2056	bool
2057
2058config SYS_SUPPORTS_SMARTMIPS
2059	bool
2060
2061config ARCH_FLATMEM_ENABLE
2062	def_bool y
2063	depends on !NUMA && !CPU_LOONGSON2
2064
2065config ARCH_DISCONTIGMEM_ENABLE
2066	bool
2067	default y if SGI_IP27
2068	help
2069	  Say Y to support efficient handling of discontiguous physical memory,
2070	  for architectures which are either NUMA (Non-Uniform Memory Access)
2071	  or have huge holes in the physical address space for other reasons.
2072	  See <file:Documentation/vm/numa> for more.
 
 
2073
2074config ARCH_POPULATES_NODE_MAP
2075	def_bool y
 
2076
2077config ARCH_SPARSEMEM_ENABLE
2078	bool
2079	select SPARSEMEM_STATIC
2080
2081config NUMA
2082	bool "NUMA Support"
2083	depends on SYS_SUPPORTS_NUMA
 
 
 
2084	help
2085	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2086	  Access).  This option improves performance on systems with more
2087	  than two nodes; on two node systems it is generally better to
2088	  leave it disabled; on single node systems disable this option
2089	  disabled.
2090
2091config SYS_SUPPORTS_NUMA
2092	bool
2093
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2094config NODES_SHIFT
2095	int
2096	default "6"
2097	depends on NEED_MULTIPLE_NODES
2098
2099config HW_PERF_EVENTS
2100	bool "Enable hardware performance counter support for perf events"
2101	depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && CPU_MIPS32
2102	default y
2103	help
2104	  Enable hardware performance counter support for perf events. If
2105	  disabled, perf events will use software events only.
2106
2107source "mm/Kconfig"
 
 
 
 
 
 
 
 
 
2108
2109config SMP
2110	bool "Multi-Processing support"
2111	depends on SYS_SUPPORTS_SMP
2112	select IRQ_PER_CPU
2113	select USE_GENERIC_SMP_HELPERS
2114	help
2115	  This enables support for systems with more than one CPU. If you have
2116	  a system with only one CPU, like most personal computers, say N. If
2117	  you have a system with more than one CPU, say Y.
2118
2119	  If you say N here, the kernel will run on single and multiprocessor
2120	  machines, but will use only one CPU of a multiprocessor machine. If
2121	  you say Y here, the kernel will run on many, but not all,
2122	  singleprocessor machines. On a singleprocessor machine, the kernel
2123	  will run faster if you say N here.
2124
2125	  People using multiprocessor machines who say Y here should also say
2126	  Y to "Enhanced Real Time Clock Support", below.
2127
2128	  See also the SMP-HOWTO available at
2129	  <http://www.tldp.org/docs.html#howto>.
2130
2131	  If you don't know what to do here, say N.
2132
 
 
 
 
 
 
 
 
 
 
2133config SMP_UP
2134	bool
2135
2136config SYS_SUPPORTS_MIPS_CMP
2137	bool
2138
2139config SYS_SUPPORTS_SMP
2140	bool
2141
2142config NR_CPUS_DEFAULT_1
2143	bool
2144
2145config NR_CPUS_DEFAULT_2
2146	bool
2147
2148config NR_CPUS_DEFAULT_4
2149	bool
2150
2151config NR_CPUS_DEFAULT_8
2152	bool
2153
2154config NR_CPUS_DEFAULT_16
2155	bool
2156
2157config NR_CPUS_DEFAULT_32
2158	bool
2159
2160config NR_CPUS_DEFAULT_64
2161	bool
2162
2163config NR_CPUS
2164	int "Maximum number of CPUs (2-64)"
2165	range 1 64 if NR_CPUS_DEFAULT_1
2166	depends on SMP
2167	default "1" if NR_CPUS_DEFAULT_1
2168	default "2" if NR_CPUS_DEFAULT_2
2169	default "4" if NR_CPUS_DEFAULT_4
2170	default "8" if NR_CPUS_DEFAULT_8
2171	default "16" if NR_CPUS_DEFAULT_16
2172	default "32" if NR_CPUS_DEFAULT_32
2173	default "64" if NR_CPUS_DEFAULT_64
2174	help
2175	  This allows you to specify the maximum number of CPUs which this
2176	  kernel will support.  The maximum supported value is 32 for 32-bit
2177	  kernel and 64 for 64-bit kernels; the minimum value which makes
2178	  sense is 1 for Qemu (useful only for kernel debugging purposes)
2179	  and 2 for all others.
2180
2181	  This is purely to save memory - each supported CPU adds
2182	  approximately eight kilobytes to the kernel image.  For best
2183	  performance should round up your number of processors to the next
2184	  power of two.
2185
2186source "kernel/time/Kconfig"
 
 
 
 
 
 
 
 
 
 
2187
2188#
2189# Timer Interrupt Frequency Configuration
2190#
2191
2192choice
2193	prompt "Timer frequency"
2194	default HZ_250
2195	help
2196	 Allows the configuration of the timer frequency.
 
 
 
2197
2198	config HZ_48
2199		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2200
2201	config HZ_100
2202		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2203
2204	config HZ_128
2205		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2206
2207	config HZ_250
2208		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2209
2210	config HZ_256
2211		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2212
2213	config HZ_1000
2214		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2215
2216	config HZ_1024
2217		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2218
2219endchoice
2220
 
 
 
2221config SYS_SUPPORTS_48HZ
2222	bool
2223
2224config SYS_SUPPORTS_100HZ
2225	bool
2226
2227config SYS_SUPPORTS_128HZ
2228	bool
2229
2230config SYS_SUPPORTS_250HZ
2231	bool
2232
2233config SYS_SUPPORTS_256HZ
2234	bool
2235
2236config SYS_SUPPORTS_1000HZ
2237	bool
2238
2239config SYS_SUPPORTS_1024HZ
2240	bool
2241
2242config SYS_SUPPORTS_ARBIT_HZ
2243	bool
2244	default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
2245		     !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
2246		     !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
 
 
 
 
2247		     !SYS_SUPPORTS_1024HZ
2248
2249config HZ
2250	int
 
2251	default 48 if HZ_48
2252	default 100 if HZ_100
2253	default 128 if HZ_128
2254	default 250 if HZ_250
2255	default 256 if HZ_256
2256	default 1000 if HZ_1000
2257	default 1024 if HZ_1024
2258
2259source "kernel/Kconfig.preempt"
 
2260
2261config MIPS_INSANE_LARGE
2262	bool "Support for large 64-bit configurations"
2263	depends on CPU_R10000 && 64BIT
2264	help
2265	  MIPS R10000 does support a 44 bit / 16TB address space as opposed to
2266	  previous 64-bit processors which only supported 40 bit / 1TB. If you
2267	  need processes of more than 1TB virtual address space, say Y here.
2268	  This will result in additional memory usage, so it is not
2269	  recommended for normal users.
2270
2271config KEXEC
2272	bool "Kexec system call (EXPERIMENTAL)"
2273	depends on EXPERIMENTAL
2274	help
2275	  kexec is a system call that implements the ability to shutdown your
2276	  current kernel, and to start another kernel.  It is like a reboot
2277	  but it is independent of the system firmware.   And like a reboot
2278	  you can start any kernel with it, not just Linux.
2279
2280	  The name comes from the similarity to the exec system call.
2281
2282	  It is an ongoing process to be certain the hardware in a machine
2283	  is properly shutdown, so do not be surprised if this code does not
2284	  initially work for you.  It may help to enable device hotplugging
2285	  support.  As of this writing the exact hardware interface is
2286	  strongly in flux, so no good recommendation can be made.
2287
2288config SECCOMP
2289	bool "Enable seccomp to safely compute untrusted bytecode"
2290	depends on PROC_FS
2291	default y
2292	help
2293	  This kernel feature is useful for number crunching applications
2294	  that may need to compute untrusted bytecode during their
2295	  execution. By using pipes or other transports made available to
2296	  the process as file descriptors supporting the read/write
2297	  syscalls, it's possible to isolate those applications in
2298	  their own address space using seccomp. Once seccomp is
2299	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2300	  and the task is only allowed to execute a few safe syscalls
2301	  defined by each seccomp mode.
2302
2303	  If unsure, say Y. Only embedded should say N here.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2304
2305config USE_OF
2306	bool "Flattened Device Tree support"
2307	select OF
2308	select OF_EARLY_FLATTREE
2309	help
2310	  Include support for flattened device tree machine descriptions.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2311
2312endmenu
2313
2314config LOCKDEP_SUPPORT
2315	bool
2316	default y
2317
2318config STACKTRACE_SUPPORT
2319	bool
2320	default y
2321
2322source "init/Kconfig"
2323
2324source "kernel/Kconfig.freezer"
2325
2326menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
2327
2328config HW_HAS_EISA
2329	bool
2330config HW_HAS_PCI
2331	bool
2332
2333config PCI
2334	bool "Support for PCI controller"
2335	depends on HW_HAS_PCI
2336	select PCI_DOMAINS
2337	help
2338	  Find out whether you have a PCI motherboard. PCI is the name of a
2339	  bus system, i.e. the way the CPU talks to the other stuff inside
2340	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
2341	  say Y, otherwise N.
2342
2343config PCI_DOMAINS
 
2344	bool
2345
2346source "drivers/pci/Kconfig"
 
 
 
2347
2348#
2349# ISA support is now enabled via select.  Too many systems still have the one
2350# or other ISA chip on the board that users don't know about so don't expect
2351# users to choose the right thing ...
2352#
2353config ISA
2354	bool
2355
2356config EISA
2357	bool "EISA support"
2358	depends on HW_HAS_EISA
2359	select ISA
2360	select GENERIC_ISA_DMA
2361	---help---
2362	  The Extended Industry Standard Architecture (EISA) bus was
2363	  developed as an open alternative to the IBM MicroChannel bus.
2364
2365	  The EISA bus provided some of the features of the IBM MicroChannel
2366	  bus while maintaining backward compatibility with cards made for
2367	  the older ISA bus.  The EISA bus saw limited use between 1988 and
2368	  1995 when it was made obsolete by the PCI bus.
2369
2370	  Say Y here if you are building a kernel for an EISA-based machine.
2371
2372	  Otherwise, say N.
2373
2374source "drivers/eisa/Kconfig"
2375
2376config TC
2377	bool "TURBOchannel support"
2378	depends on MACH_DECSTATION
2379	help
2380	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
2381	  processors.  TURBOchannel programming specifications are available
2382	  at:
2383	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
2384	  and:
2385	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
2386	  Linux driver support status is documented at:
2387	  <http://www.linux-mips.org/wiki/DECstation>
2388
2389#config ACCESSBUS
2390#	bool "Access.Bus support"
2391#	depends on TC
2392
2393config MMU
2394	bool
2395	default y
2396
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2397config I8253
2398	bool
2399	select CLKSRC_I8253
2400	select CLKEVT_I8253
2401	select MIPS_EXTERNAL_TIMER
2402
2403config ZONE_DMA32
2404	bool
2405
2406source "drivers/pcmcia/Kconfig"
2407
2408source "drivers/pci/hotplug/Kconfig"
2409
2410config RAPIDIO
2411	bool "RapidIO support"
2412	depends on PCI
2413	default n
2414	help
2415	  If you say Y here, the kernel will include drivers and
2416	  infrastructure code to support RapidIO interconnect devices.
2417
2418source "drivers/rapidio/Kconfig"
2419
2420endmenu
2421
2422menu "Executable file formats"
2423
2424source "fs/Kconfig.binfmt"
2425
2426config TRAD_SIGNALS
2427	bool
2428
2429config MIPS32_COMPAT
2430	bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
2431	depends on 64BIT
2432	help
2433	  Select this option if you want Linux/MIPS 32-bit binary
2434	  compatibility. Since all software available for Linux/MIPS is
2435	  currently 32-bit you should say Y here.
2436
2437config COMPAT
2438	bool
2439	depends on MIPS32_COMPAT
2440	default y
2441
2442config SYSVIPC_COMPAT
2443	bool
2444	depends on COMPAT && SYSVIPC
2445	default y
2446
2447config MIPS32_O32
2448	bool "Kernel support for o32 binaries"
2449	depends on MIPS32_COMPAT
 
 
 
2450	help
2451	  Select this option if you want to run o32 binaries.  These are pure
2452	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
2453	  existing binaries are in this format.
2454
2455	  If unsure, say Y.
2456
2457config MIPS32_N32
2458	bool "Kernel support for n32 binaries"
2459	depends on MIPS32_COMPAT
 
 
 
2460	help
2461	  Select this option if you want to run n32 binaries.  These are
2462	  64-bit binaries using 32-bit quantities for addressing and certain
2463	  data that would normally be 64-bit.  They are used in special
2464	  cases.
2465
2466	  If unsure, say N.
2467
2468config BINFMT_ELF32
2469	bool
2470	default y if MIPS32_O32 || MIPS32_N32
2471
2472endmenu
 
 
2473
2474menu "Power management options"
2475
2476config ARCH_HIBERNATION_POSSIBLE
2477	def_bool y
2478	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2479
2480config ARCH_SUSPEND_POSSIBLE
2481	def_bool y
2482	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2483
2484source "kernel/power/Kconfig"
2485
2486endmenu
2487
2488source "arch/mips/kernel/cpufreq/Kconfig"
2489
2490source "net/Kconfig"
2491
2492source "drivers/Kconfig"
2493
2494source "fs/Kconfig"
 
 
2495
2496source "arch/mips/Kconfig.debug"
2497
2498source "security/Kconfig"
2499
2500source "crypto/Kconfig"
2501
2502source "lib/Kconfig"
v6.8
   1# SPDX-License-Identifier: GPL-2.0
   2config MIPS
   3	bool
   4	default y
   5	select ARCH_32BIT_OFF_T if !64BIT
   6	select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
   7	select ARCH_HAS_CPU_FINALIZE_INIT
   8	select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
   9	select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
  10	select ARCH_HAS_FORTIFY_SOURCE
  11	select ARCH_HAS_KCOV
  12	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
  13	select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
  14	select ARCH_HAS_STRNCPY_FROM_USER
  15	select ARCH_HAS_STRNLEN_USER
  16	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
  17	select ARCH_HAS_UBSAN_SANITIZE_ALL
  18	select ARCH_HAS_GCOV_PROFILE_ALL
  19	select ARCH_KEEP_MEMBLOCK
  20	select ARCH_USE_BUILTIN_BSWAP
  21	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
  22	select ARCH_USE_MEMTEST
  23	select ARCH_USE_QUEUED_RWLOCKS
  24	select ARCH_USE_QUEUED_SPINLOCKS
  25	select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
  26	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
  27	select ARCH_WANT_IPC_PARSE_VERSION
  28	select ARCH_WANT_LD_ORPHAN_WARN
  29	select BUILDTIME_TABLE_SORT
  30	select CLONE_BACKWARDS
  31	select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
  32	select CPU_PM if CPU_IDLE
  33	select GENERIC_ATOMIC64 if !64BIT
  34	select GENERIC_CMOS_UPDATE
  35	select GENERIC_CPU_AUTOPROBE
  36	select GENERIC_GETTIMEOFDAY
  37	select GENERIC_IOMAP
  38	select GENERIC_IRQ_PROBE
  39	select GENERIC_IRQ_SHOW
  40	select GENERIC_ISA_DMA if EISA
  41	select GENERIC_LIB_ASHLDI3
  42	select GENERIC_LIB_ASHRDI3
  43	select GENERIC_LIB_CMPDI2
  44	select GENERIC_LIB_LSHRDI3
  45	select GENERIC_LIB_UCMPDI2
  46	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
  47	select GENERIC_SMP_IDLE_THREAD
  48	select GENERIC_IDLE_POLL_SETUP
  49	select GENERIC_TIME_VSYSCALL
  50	select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
  51	select HAS_IOPORT if !NO_IOPORT_MAP || ISA
  52	select HAVE_ARCH_COMPILER_H
  53	select HAVE_ARCH_JUMP_LABEL
  54	select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
  55	select HAVE_ARCH_MMAP_RND_BITS if MMU
  56	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
  57	select HAVE_ARCH_SECCOMP_FILTER
  58	select HAVE_ARCH_TRACEHOOK
  59	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
  60	select HAVE_ASM_MODVERSIONS
  61	select HAVE_CONTEXT_TRACKING_USER
  62	select HAVE_TIF_NOHZ
  63	select HAVE_C_RECORDMCOUNT
  64	select HAVE_DEBUG_KMEMLEAK
  65	select HAVE_DEBUG_STACKOVERFLOW
  66	select HAVE_DMA_CONTIGUOUS
  67	select HAVE_DYNAMIC_FTRACE
  68	select HAVE_EBPF_JIT if !CPU_MICROMIPS
  69	select HAVE_EXIT_THREAD
  70	select HAVE_FAST_GUP
  71	select HAVE_FTRACE_MCOUNT_RECORD
 
  72	select HAVE_FUNCTION_GRAPH_TRACER
  73	select HAVE_FUNCTION_TRACER
  74	select HAVE_GCC_PLUGINS
  75	select HAVE_GENERIC_VDSO
  76	select HAVE_IOREMAP_PROT
  77	select HAVE_IRQ_EXIT_ON_IRQ_STACK
  78	select HAVE_IRQ_TIME_ACCOUNTING
  79	select HAVE_KPROBES
  80	select HAVE_KRETPROBES
  81	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
  82	select HAVE_MOD_ARCH_SPECIFIC
  83	select HAVE_NMI
  84	select HAVE_PERF_EVENTS
  85	select HAVE_PERF_REGS
  86	select HAVE_PERF_USER_STACK_DUMP
  87	select HAVE_REGS_AND_STACK_ACCESS_API
  88	select HAVE_RSEQ
  89	select HAVE_SPARSE_SYSCALL_NR
  90	select HAVE_STACKPROTECTOR
  91	select HAVE_SYSCALL_TRACEPOINTS
  92	select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
  93	select IRQ_FORCED_THREADING
  94	select ISA if EISA
  95	select LOCK_MM_AND_FIND_VMA
  96	select MODULES_USE_ELF_REL if MODULES
  97	select MODULES_USE_ELF_RELA if MODULES && 64BIT
  98	select PERF_USE_VMALLOC
  99	select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
 100	select RTC_LIB
 101	select SYSCTL_EXCEPTION_TRACE
 102	select TRACE_IRQFLAGS_SUPPORT
 103	select ARCH_HAS_ELFCORE_COMPAT
 104	select HAVE_ARCH_KCSAN if 64BIT
 105
 106config MIPS_FIXUP_BIGPHYS_ADDR
 107	bool
 108
 109config MIPS_GENERIC
 110	bool
 111
 112config MACH_INGENIC
 113	bool
 114	select SYS_SUPPORTS_32BIT_KERNEL
 115	select SYS_SUPPORTS_LITTLE_ENDIAN
 116	select SYS_SUPPORTS_ZBOOT
 117	select DMA_NONCOHERENT
 118	select IRQ_MIPS_CPU
 119	select PINCTRL
 120	select GPIOLIB
 121	select COMMON_CLK
 122	select GENERIC_IRQ_CHIP
 123	select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
 124	select USE_OF
 125	select CPU_SUPPORTS_CPUFREQ
 126	select MIPS_EXTERNAL_TIMER
 127
 128menu "Machine selection"
 129
 130choice
 131	prompt "System type"
 132	default MIPS_GENERIC_KERNEL
 133
 134config MIPS_GENERIC_KERNEL
 135	bool "Generic board-agnostic MIPS kernel"
 136	select MIPS_GENERIC
 137	select BOOT_RAW
 138	select BUILTIN_DTB
 139	select CEVT_R4K
 140	select CLKSRC_MIPS_GIC
 141	select COMMON_CLK
 142	select CPU_MIPSR2_IRQ_EI
 143	select CPU_MIPSR2_IRQ_VI
 144	select CSRC_R4K
 145	select DMA_NONCOHERENT
 146	select HAVE_PCI
 147	select IRQ_MIPS_CPU
 148	select MIPS_AUTO_PFN_OFFSET
 149	select MIPS_CPU_SCACHE
 150	select MIPS_GIC
 151	select MIPS_L1_CACHE_SHIFT_7
 152	select NO_EXCEPT_FILL
 153	select PCI_DRIVERS_GENERIC
 154	select SMP_UP if SMP
 155	select SWAP_IO_SPACE
 156	select SYS_HAS_CPU_MIPS32_R1
 157	select SYS_HAS_CPU_MIPS32_R2
 158	select SYS_HAS_CPU_MIPS32_R5
 159	select SYS_HAS_CPU_MIPS32_R6
 160	select SYS_HAS_CPU_MIPS64_R1
 161	select SYS_HAS_CPU_MIPS64_R2
 162	select SYS_HAS_CPU_MIPS64_R5
 163	select SYS_HAS_CPU_MIPS64_R6
 164	select SYS_SUPPORTS_32BIT_KERNEL
 165	select SYS_SUPPORTS_64BIT_KERNEL
 166	select SYS_SUPPORTS_BIG_ENDIAN
 167	select SYS_SUPPORTS_HIGHMEM
 168	select SYS_SUPPORTS_LITTLE_ENDIAN
 169	select SYS_SUPPORTS_MICROMIPS
 170	select SYS_SUPPORTS_MIPS16
 171	select SYS_SUPPORTS_MIPS_CPS
 172	select SYS_SUPPORTS_MULTITHREADING
 173	select SYS_SUPPORTS_RELOCATABLE
 174	select SYS_SUPPORTS_SMARTMIPS
 175	select SYS_SUPPORTS_ZBOOT
 176	select UHI_BOOT
 177	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 178	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 179	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 180	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 181	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 182	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 183	select USE_OF
 184	help
 185	  Select this to build a kernel which aims to support multiple boards,
 186	  generally using a flattened device tree passed from the bootloader
 187	  using the boot protocol defined in the UHI (Unified Hosting
 188	  Interface) specification.
 189
 190config MIPS_ALCHEMY
 191	bool "Alchemy processor based machines"
 192	select PHYS_ADDR_T_64BIT
 193	select CEVT_R4K
 194	select CSRC_R4K
 195	select IRQ_MIPS_CPU
 196	select DMA_NONCOHERENT		# Au1000,1500,1100 aren't, rest is
 197	select MIPS_FIXUP_BIGPHYS_ADDR if PCI
 198	select SYS_HAS_CPU_MIPS32_R1
 199	select SYS_SUPPORTS_32BIT_KERNEL
 200	select SYS_SUPPORTS_APM_EMULATION
 201	select GPIOLIB
 
 202	select SYS_SUPPORTS_ZBOOT
 203	select COMMON_CLK
 204
 205config ATH25
 206	bool "Atheros AR231x/AR531x SoC support"
 
 
 207	select CEVT_R4K
 208	select CSRC_R4K
 209	select DMA_NONCOHERENT
 210	select IRQ_MIPS_CPU
 211	select IRQ_DOMAIN
 212	select SYS_HAS_CPU_MIPS32_R1
 213	select SYS_SUPPORTS_BIG_ENDIAN
 214	select SYS_SUPPORTS_32BIT_KERNEL
 215	select SYS_HAS_EARLY_PRINTK
 
 
 
 
 216	help
 217	  Support for Atheros AR231x and Atheros AR531x based boards
 
 218
 219config ATH79
 220	bool "Atheros AR71XX/AR724X/AR913X based boards"
 221	select ARCH_HAS_RESET_CONTROLLER
 222	select BOOT_RAW
 223	select CEVT_R4K
 224	select CSRC_R4K
 225	select DMA_NONCOHERENT
 226	select GPIOLIB
 227	select PINCTRL
 228	select COMMON_CLK
 229	select IRQ_MIPS_CPU
 230	select SYS_HAS_CPU_MIPS32_R2
 231	select SYS_HAS_EARLY_PRINTK
 232	select SYS_SUPPORTS_32BIT_KERNEL
 233	select SYS_SUPPORTS_BIG_ENDIAN
 234	select SYS_SUPPORTS_MIPS16
 235	select SYS_SUPPORTS_ZBOOT_UART_PROM
 236	select USE_OF
 237	select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
 238	help
 239	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
 240
 241config BMIPS_GENERIC
 242	bool "Broadcom Generic BMIPS kernel"
 243	select ARCH_HAS_RESET_CONTROLLER
 244	select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
 245	select BOOT_RAW
 246	select NO_EXCEPT_FILL
 247	select USE_OF
 248	select CEVT_R4K
 249	select CSRC_R4K
 250	select SYNC_R4K
 251	select COMMON_CLK
 252	select BCM6345_L1_IRQ
 253	select BCM7038_L1_IRQ
 254	select BCM7120_L2_IRQ
 255	select BRCMSTB_L2_IRQ
 256	select IRQ_MIPS_CPU
 257	select DMA_NONCOHERENT
 258	select SYS_SUPPORTS_32BIT_KERNEL
 259	select SYS_SUPPORTS_LITTLE_ENDIAN
 260	select SYS_SUPPORTS_BIG_ENDIAN
 261	select SYS_SUPPORTS_HIGHMEM
 262	select SYS_HAS_CPU_BMIPS32_3300
 263	select SYS_HAS_CPU_BMIPS4350
 264	select SYS_HAS_CPU_BMIPS4380
 265	select SYS_HAS_CPU_BMIPS5000
 266	select SWAP_IO_SPACE
 267	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 268	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 269	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 270	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 271	select HARDIRQS_SW_RESEND
 272	select HAVE_PCI
 273	select PCI_DRIVERS_GENERIC
 274	select FW_CFE
 275	help
 276	  Build a generic DT-based kernel image that boots on select
 277	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
 278	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
 279	  must be set appropriately for your board.
 280
 281config BCM47XX
 282	bool "Broadcom BCM47XX based boards"
 283	select BOOT_RAW
 284	select CEVT_R4K
 285	select CSRC_R4K
 286	select DMA_NONCOHERENT
 287	select HAVE_PCI
 288	select IRQ_MIPS_CPU
 289	select SYS_HAS_CPU_MIPS32_R1
 290	select NO_EXCEPT_FILL
 291	select SYS_SUPPORTS_32BIT_KERNEL
 292	select SYS_SUPPORTS_LITTLE_ENDIAN
 293	select SYS_SUPPORTS_MIPS16
 294	select SYS_SUPPORTS_ZBOOT
 
 
 
 
 
 295	select SYS_HAS_EARLY_PRINTK
 296	select USE_GENERIC_EARLY_PRINTK_8250
 297	select GPIOLIB
 298	select LEDS_GPIO_REGISTER
 299	select BCM47XX_NVRAM
 300	select BCM47XX_SPROM
 301	select BCM47XX_SSB if !BCM47XX_BCMA
 302	help
 303	  Support for BCM47XX based boards
 304
 305config BCM63XX
 306	bool "Broadcom BCM63XX based boards"
 307	select BOOT_RAW
 308	select CEVT_R4K
 309	select CSRC_R4K
 310	select SYNC_R4K
 311	select DMA_NONCOHERENT
 312	select IRQ_MIPS_CPU
 
 313	select SYS_SUPPORTS_32BIT_KERNEL
 314	select SYS_SUPPORTS_BIG_ENDIAN
 315	select SYS_HAS_EARLY_PRINTK
 316	select SYS_HAS_CPU_BMIPS32_3300
 317	select SYS_HAS_CPU_BMIPS4350
 318	select SYS_HAS_CPU_BMIPS4380
 319	select SWAP_IO_SPACE
 320	select GPIOLIB
 321	select MIPS_L1_CACHE_SHIFT_4
 322	select HAVE_LEGACY_CLK
 323	help
 324	  Support for BCM63XX based boards
 325
 326config MIPS_COBALT
 327	bool "Cobalt Server"
 328	select CEVT_R4K
 329	select CSRC_R4K
 330	select CEVT_GT641XX
 331	select DMA_NONCOHERENT
 332	select FORCE_PCI
 333	select I8253
 334	select I8259
 335	select IRQ_MIPS_CPU
 336	select IRQ_GT641XX
 337	select PCI_GT64XXX_PCI0
 
 338	select SYS_HAS_CPU_NEVADA
 339	select SYS_HAS_EARLY_PRINTK
 340	select SYS_SUPPORTS_32BIT_KERNEL
 341	select SYS_SUPPORTS_64BIT_KERNEL
 342	select SYS_SUPPORTS_LITTLE_ENDIAN
 343	select USE_GENERIC_EARLY_PRINTK_8250
 344
 345config MACH_DECSTATION
 346	bool "DECstations"
 347	select BOOT_ELF32
 348	select CEVT_DS1287
 349	select CEVT_R4K if CPU_R4X00
 350	select CSRC_IOASIC
 351	select CSRC_R4K if CPU_R4X00
 352	select CPU_DADDI_WORKAROUNDS if 64BIT
 353	select CPU_R4000_WORKAROUNDS if 64BIT
 354	select CPU_R4400_WORKAROUNDS if 64BIT
 355	select DMA_NONCOHERENT
 356	select NO_IOPORT_MAP
 357	select IRQ_MIPS_CPU
 358	select SYS_HAS_CPU_R3000
 359	select SYS_HAS_CPU_R4X00
 360	select SYS_SUPPORTS_32BIT_KERNEL
 361	select SYS_SUPPORTS_64BIT_KERNEL
 362	select SYS_SUPPORTS_LITTLE_ENDIAN
 363	select SYS_SUPPORTS_128HZ
 364	select SYS_SUPPORTS_256HZ
 365	select SYS_SUPPORTS_1024HZ
 366	select MIPS_L1_CACHE_SHIFT_4
 367	help
 368	  This enables support for DEC's MIPS based workstations.  For details
 369	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
 370	  DECstation porting pages on <http://decstation.unix-ag.org/>.
 371
 372	  If you have one of the following DECstation Models you definitely
 373	  want to choose R4xx0 for the CPU Type:
 374
 375		DECstation 5000/50
 376		DECstation 5000/150
 377		DECstation 5000/260
 378		DECsystem 5900/260
 379
 380	  otherwise choose R3000.
 381
 382config MACH_JAZZ
 383	bool "Jazz family of machines"
 384	select ARC_MEMORY
 385	select ARC_PROMLIB
 386	select ARCH_MIGHT_HAVE_PC_PARPORT
 387	select ARCH_MIGHT_HAVE_PC_SERIO
 388	select DMA_OPS
 389	select FW_ARC
 390	select FW_ARC32
 391	select ARCH_MAY_HAVE_PC_FDC
 392	select CEVT_R4K
 393	select CSRC_R4K
 394	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
 395	select GENERIC_ISA_DMA
 396	select HAVE_PCSPKR_PLATFORM
 397	select IRQ_MIPS_CPU
 398	select I8253
 399	select I8259
 400	select ISA
 401	select SYS_HAS_CPU_R4X00
 402	select SYS_SUPPORTS_32BIT_KERNEL
 403	select SYS_SUPPORTS_64BIT_KERNEL
 404	select SYS_SUPPORTS_100HZ
 
 
 
 
 
 
 
 
 
 
 405	select SYS_SUPPORTS_LITTLE_ENDIAN
 406	help
 407	  This a family of machines based on the MIPS R4030 chipset which was
 408	  used by several vendors to build RISC/os and Windows NT workstations.
 409	  Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
 410	  Olivetti M700-10 workstations.
 411
 412config MACH_INGENIC_SOC
 413	bool "Ingenic SoC based machines"
 414	select MIPS_GENERIC
 415	select MACH_INGENIC
 416	select SYS_SUPPORTS_ZBOOT_UART16550
 417	select CPU_SUPPORTS_CPUFREQ
 418	select MIPS_EXTERNAL_TIMER
 419
 420config LANTIQ
 421	bool "Lantiq based platforms"
 422	select DMA_NONCOHERENT
 423	select IRQ_MIPS_CPU
 424	select CEVT_R4K
 425	select CSRC_R4K
 426	select NO_EXCEPT_FILL
 427	select SYS_HAS_CPU_MIPS32_R1
 428	select SYS_HAS_CPU_MIPS32_R2
 429	select SYS_SUPPORTS_BIG_ENDIAN
 430	select SYS_SUPPORTS_32BIT_KERNEL
 431	select SYS_SUPPORTS_MIPS16
 432	select SYS_SUPPORTS_MULTITHREADING
 433	select SYS_SUPPORTS_VPE_LOADER
 434	select SYS_HAS_EARLY_PRINTK
 435	select GPIOLIB
 436	select SWAP_IO_SPACE
 437	select BOOT_RAW
 438	select HAVE_LEGACY_CLK
 439	select USE_OF
 440	select PINCTRL
 441	select PINCTRL_LANTIQ
 442	select ARCH_HAS_RESET_CONTROLLER
 443	select RESET_CONTROLLER
 444
 445config MACH_LOONGSON32
 446	bool "Loongson 32-bit family of machines"
 447	select SYS_SUPPORTS_ZBOOT
 448	help
 449	  This enables support for the Loongson-1 family of machines.
 450
 451	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
 452	  the Institute of Computing Technology (ICT), Chinese Academy of
 453	  Sciences (CAS).
 
 
 
 
 
 
 454
 455config MACH_LOONGSON2EF
 456	bool "Loongson-2E/F family of machines"
 457	select SYS_SUPPORTS_ZBOOT
 458	help
 459	  This enables the support of early Loongson-2E/F family of machines.
 460
 461config MACH_LOONGSON64
 462	bool "Loongson 64-bit family of machines"
 463	select ARCH_DMA_DEFAULT_COHERENT
 464	select ARCH_SPARSEMEM_ENABLE
 465	select ARCH_MIGHT_HAVE_PC_PARPORT
 466	select ARCH_MIGHT_HAVE_PC_SERIO
 467	select GENERIC_ISA_DMA_SUPPORT_BROKEN
 468	select BOOT_ELF32
 469	select BOARD_SCACHE
 470	select CSRC_R4K
 471	select CEVT_R4K
 472	select FORCE_PCI
 473	select ISA
 474	select I8259
 475	select IRQ_MIPS_CPU
 476	select NO_EXCEPT_FILL
 477	select NR_CPUS_DEFAULT_64
 478	select USE_GENERIC_EARLY_PRINTK_8250
 479	select PCI_DRIVERS_GENERIC
 480	select SYS_HAS_CPU_LOONGSON64
 481	select SYS_HAS_EARLY_PRINTK
 482	select SYS_SUPPORTS_SMP
 483	select SYS_SUPPORTS_HOTPLUG_CPU
 484	select SYS_SUPPORTS_NUMA
 485	select SYS_SUPPORTS_64BIT_KERNEL
 486	select SYS_SUPPORTS_HIGHMEM
 487	select SYS_SUPPORTS_LITTLE_ENDIAN
 488	select SYS_SUPPORTS_ZBOOT
 489	select SYS_SUPPORTS_RELOCATABLE
 490	select ZONE_DMA32
 491	select COMMON_CLK
 492	select USE_OF
 493	select BUILTIN_DTB
 494	select PCI_HOST_GENERIC
 495	select HAVE_ARCH_NODEDATA_EXTENSION if NUMA
 496	help
 497	  This enables the support of Loongson-2/3 family of machines.
 498
 499	  Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
 500	  GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
 501	  and Loongson-2F which will be removed), developed by the Institute
 502	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
 503
 504config MIPS_MALTA
 505	bool "MIPS Malta board"
 506	select ARCH_MAY_HAVE_PC_FDC
 507	select ARCH_MIGHT_HAVE_PC_PARPORT
 508	select ARCH_MIGHT_HAVE_PC_SERIO
 509	select BOOT_ELF32
 510	select BOOT_RAW
 511	select BUILTIN_DTB
 512	select CEVT_R4K
 513	select CLKSRC_MIPS_GIC
 514	select COMMON_CLK
 515	select CSRC_R4K
 516	select DMA_NONCOHERENT
 517	select GENERIC_ISA_DMA
 518	select HAVE_PCSPKR_PLATFORM
 519	select HAVE_PCI
 
 
 520	select I8253
 521	select I8259
 522	select IRQ_MIPS_CPU
 523	select MIPS_BONITO64
 524	select MIPS_CPU_SCACHE
 525	select MIPS_GIC
 526	select MIPS_L1_CACHE_SHIFT_6
 527	select MIPS_MSC
 528	select PCI_GT64XXX_PCI0
 529	select SMP_UP if SMP
 530	select SWAP_IO_SPACE
 531	select SYS_HAS_CPU_MIPS32_R1
 532	select SYS_HAS_CPU_MIPS32_R2
 533	select SYS_HAS_CPU_MIPS32_R3_5
 534	select SYS_HAS_CPU_MIPS32_R5
 535	select SYS_HAS_CPU_MIPS32_R6
 536	select SYS_HAS_CPU_MIPS64_R1
 537	select SYS_HAS_CPU_MIPS64_R2
 538	select SYS_HAS_CPU_MIPS64_R6
 539	select SYS_HAS_CPU_NEVADA
 540	select SYS_HAS_CPU_RM7000
 
 541	select SYS_SUPPORTS_32BIT_KERNEL
 542	select SYS_SUPPORTS_64BIT_KERNEL
 543	select SYS_SUPPORTS_BIG_ENDIAN
 544	select SYS_SUPPORTS_HIGHMEM
 545	select SYS_SUPPORTS_LITTLE_ENDIAN
 546	select SYS_SUPPORTS_MICROMIPS
 547	select SYS_SUPPORTS_MIPS16
 548	select SYS_SUPPORTS_MIPS_CPS
 549	select SYS_SUPPORTS_MULTITHREADING
 550	select SYS_SUPPORTS_RELOCATABLE
 551	select SYS_SUPPORTS_SMARTMIPS
 552	select SYS_SUPPORTS_VPE_LOADER
 553	select SYS_SUPPORTS_ZBOOT
 554	select USE_OF
 555	select WAR_ICACHE_REFILLS
 556	select ZONE_DMA32 if 64BIT
 557	help
 558	  This enables support for the MIPS Technologies Malta evaluation
 559	  board.
 560
 561config MACH_PIC32
 562	bool "Microchip PIC32 Family"
 
 
 
 
 
 
 
 
 
 
 
 
 
 563	help
 564	  This enables support for the Microchip PIC32 family of platforms.
 
 565
 566	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
 567	  microcontrollers.
 
 
 
 
 568
 569config MACH_NINTENDO64
 570	bool "Nintendo 64 console"
 571	select CEVT_R4K
 572	select CSRC_R4K
 573	select SYS_HAS_CPU_R4300
 574	select SYS_SUPPORTS_BIG_ENDIAN
 575	select SYS_SUPPORTS_ZBOOT
 576	select SYS_SUPPORTS_32BIT_KERNEL
 577	select SYS_SUPPORTS_64BIT_KERNEL
 578	select DMA_NONCOHERENT
 579	select IRQ_MIPS_CPU
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 580
 581config RALINK
 582	bool "Ralink based machines"
 
 583	select CEVT_R4K
 584	select COMMON_CLK
 585	select CSRC_R4K
 
 
 
 586	select BOOT_RAW
 587	select DMA_NONCOHERENT
 588	select IRQ_MIPS_CPU
 589	select USE_OF
 590	select SYS_HAS_CPU_MIPS32_R2
 591	select SYS_SUPPORTS_32BIT_KERNEL
 592	select SYS_SUPPORTS_LITTLE_ENDIAN
 593	select SYS_SUPPORTS_MIPS16
 594	select SYS_SUPPORTS_ZBOOT
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 595	select SYS_HAS_EARLY_PRINTK
 596	select ARCH_HAS_RESET_CONTROLLER
 597	select RESET_CONTROLLER
 
 
 
 
 
 
 598
 599config MACH_REALTEK_RTL
 600	bool "Realtek RTL838x/RTL839x based machines"
 601	select MIPS_GENERIC
 
 
 
 
 602	select DMA_NONCOHERENT
 603	select IRQ_MIPS_CPU
 604	select CSRC_R4K
 605	select CEVT_R4K
 606	select SYS_HAS_CPU_MIPS32_R1
 607	select SYS_HAS_CPU_MIPS32_R2
 
 608	select SYS_SUPPORTS_BIG_ENDIAN
 609	select SYS_SUPPORTS_32BIT_KERNEL
 610	select SYS_SUPPORTS_MIPS16
 611	select SYS_SUPPORTS_MULTITHREADING
 612	select SYS_SUPPORTS_VPE_LOADER
 613	select BOOT_RAW
 614	select PINCTRL
 615	select USE_OF
 616
 617config SGI_IP22
 618	bool "SGI IP22 (Indy/Indigo2)"
 619	select ARC_MEMORY
 620	select ARC_PROMLIB
 621	select FW_ARC
 622	select FW_ARC32
 623	select ARCH_MIGHT_HAVE_PC_SERIO
 624	select BOOT_ELF32
 625	select CEVT_R4K
 626	select CSRC_R4K
 627	select DEFAULT_SGI_PARTITION
 628	select DMA_NONCOHERENT
 629	select HAVE_EISA
 630	select I8253
 631	select I8259
 632	select IP22_CPU_SCACHE
 633	select IRQ_MIPS_CPU
 634	select GENERIC_ISA_DMA_SUPPORT_BROKEN
 635	select SGI_HAS_I8042
 636	select SGI_HAS_INDYDOG
 637	select SGI_HAS_HAL2
 638	select SGI_HAS_SEEQ
 639	select SGI_HAS_WD93
 640	select SGI_HAS_ZILOG
 641	select SWAP_IO_SPACE
 642	select SYS_HAS_CPU_R4X00
 643	select SYS_HAS_CPU_R5000
 644	select SYS_HAS_EARLY_PRINTK
 
 
 
 
 
 
 
 645	select SYS_SUPPORTS_32BIT_KERNEL
 646	select SYS_SUPPORTS_64BIT_KERNEL
 647	select SYS_SUPPORTS_BIG_ENDIAN
 648	select WAR_R4600_V1_INDEX_ICACHEOP
 649	select WAR_R4600_V1_HIT_CACHEOP
 650	select WAR_R4600_V2_HIT_CACHEOP
 651	select MIPS_L1_CACHE_SHIFT_7
 652	help
 653	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
 654	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
 655	  that runs on these, say Y here.
 656
 657config SGI_IP27
 658	bool "SGI IP27 (Origin200/2000)"
 659	select ARCH_HAS_PHYS_TO_DMA
 660	select ARCH_SPARSEMEM_ENABLE
 661	select FW_ARC
 662	select FW_ARC64
 663	select ARC_CMDLINE_ONLY
 664	select BOOT_ELF64
 665	select DEFAULT_SGI_PARTITION
 666	select FORCE_PCI
 667	select SYS_HAS_EARLY_PRINTK
 668	select HAVE_PCI
 669	select IRQ_MIPS_CPU
 670	select IRQ_DOMAIN_HIERARCHY
 671	select NR_CPUS_DEFAULT_64
 672	select PCI_DRIVERS_GENERIC
 673	select PCI_XTALK_BRIDGE
 674	select SYS_HAS_CPU_R10000
 675	select SYS_SUPPORTS_64BIT_KERNEL
 676	select SYS_SUPPORTS_BIG_ENDIAN
 677	select SYS_SUPPORTS_NUMA
 678	select SYS_SUPPORTS_SMP
 679	select WAR_R10000_LLSC
 680	select MIPS_L1_CACHE_SHIFT_7
 681	select NUMA
 682	select HAVE_ARCH_NODEDATA_EXTENSION
 683	help
 684	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
 685	  workstations.  To compile a Linux kernel that runs on these, say Y
 686	  here.
 687
 688config SGI_IP28
 689	bool "SGI IP28 (Indigo2 R10k)"
 690	select ARC_MEMORY
 691	select ARC_PROMLIB
 692	select FW_ARC
 693	select FW_ARC64
 694	select ARCH_MIGHT_HAVE_PC_SERIO
 695	select BOOT_ELF64
 696	select CEVT_R4K
 697	select CSRC_R4K
 698	select DEFAULT_SGI_PARTITION
 699	select DMA_NONCOHERENT
 700	select GENERIC_ISA_DMA_SUPPORT_BROKEN
 701	select IRQ_MIPS_CPU
 702	select HAVE_EISA
 703	select I8253
 704	select I8259
 705	select SGI_HAS_I8042
 706	select SGI_HAS_INDYDOG
 707	select SGI_HAS_HAL2
 708	select SGI_HAS_SEEQ
 709	select SGI_HAS_WD93
 710	select SGI_HAS_ZILOG
 711	select SWAP_IO_SPACE
 712	select SYS_HAS_CPU_R10000
 713	select SYS_HAS_EARLY_PRINTK
 
 
 
 
 
 
 
 714	select SYS_SUPPORTS_64BIT_KERNEL
 715	select SYS_SUPPORTS_BIG_ENDIAN
 716	select WAR_R10000_LLSC
 717	select MIPS_L1_CACHE_SHIFT_7
 718	help
 719	  This is the SGI Indigo2 with R10000 processor.  To compile a Linux
 720	  kernel that runs on these, say Y here.
 721
 722config SGI_IP30
 723	bool "SGI IP30 (Octane/Octane2)"
 724	select ARCH_HAS_PHYS_TO_DMA
 725	select FW_ARC
 726	select FW_ARC64
 727	select BOOT_ELF64
 728	select CEVT_R4K
 729	select CSRC_R4K
 730	select FORCE_PCI
 731	select SYNC_R4K if SMP
 732	select ZONE_DMA32
 733	select HAVE_PCI
 734	select IRQ_MIPS_CPU
 735	select IRQ_DOMAIN_HIERARCHY
 736	select PCI_DRIVERS_GENERIC
 737	select PCI_XTALK_BRIDGE
 738	select SYS_HAS_EARLY_PRINTK
 739	select SYS_HAS_CPU_R10000
 740	select SYS_SUPPORTS_64BIT_KERNEL
 741	select SYS_SUPPORTS_BIG_ENDIAN
 742	select SYS_SUPPORTS_SMP
 743	select WAR_R10000_LLSC
 744	select MIPS_L1_CACHE_SHIFT_7
 745	select ARC_MEMORY
 746	help
 747	  These are the SGI Octane and Octane2 graphics workstations.  To
 748	  compile a Linux kernel that runs on these, say Y here.
 749
 750config SGI_IP32
 751	bool "SGI IP32 (O2)"
 752	select ARC_MEMORY
 753	select ARC_PROMLIB
 754	select ARCH_HAS_PHYS_TO_DMA
 755	select FW_ARC
 756	select FW_ARC32
 757	select BOOT_ELF32
 758	select CEVT_R4K
 759	select CSRC_R4K
 760	select DMA_NONCOHERENT
 761	select HAVE_PCI
 762	select IRQ_MIPS_CPU
 763	select R5000_CPU_SCACHE
 764	select RM7000_CPU_SCACHE
 765	select SYS_HAS_CPU_R5000
 766	select SYS_HAS_CPU_R10000 if BROKEN
 767	select SYS_HAS_CPU_RM7000
 768	select SYS_HAS_CPU_NEVADA
 769	select SYS_SUPPORTS_64BIT_KERNEL
 770	select SYS_SUPPORTS_BIG_ENDIAN
 771	select WAR_ICACHE_REFILLS
 772	help
 773	  If you want this kernel to run on SGI O2 workstation, say Y here.
 774
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 775config SIBYTE_CRHONE
 776	bool "Sibyte BCM91125C-CRhone"
 
 777	select BOOT_ELF32
 
 778	select SIBYTE_BCM1125
 779	select SWAP_IO_SPACE
 780	select SYS_HAS_CPU_SB1
 781	select SYS_SUPPORTS_BIG_ENDIAN
 782	select SYS_SUPPORTS_HIGHMEM
 783	select SYS_SUPPORTS_LITTLE_ENDIAN
 784
 785config SIBYTE_RHONE
 786	bool "Sibyte BCM91125E-Rhone"
 
 787	select BOOT_ELF32
 788	select SIBYTE_SB1250
 
 789	select SWAP_IO_SPACE
 790	select SYS_HAS_CPU_SB1
 791	select SYS_SUPPORTS_BIG_ENDIAN
 792	select SYS_SUPPORTS_LITTLE_ENDIAN
 793
 794config SIBYTE_SWARM
 795	bool "Sibyte BCM91250A-SWARM"
 796	select BOOT_ELF32
 
 797	select HAVE_PATA_PLATFORM
 
 798	select SIBYTE_SB1250
 799	select SWAP_IO_SPACE
 800	select SYS_HAS_CPU_SB1
 801	select SYS_SUPPORTS_BIG_ENDIAN
 802	select SYS_SUPPORTS_HIGHMEM
 803	select SYS_SUPPORTS_LITTLE_ENDIAN
 804	select ZONE_DMA32 if 64BIT
 805	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
 806
 807config SIBYTE_LITTLESUR
 808	bool "Sibyte BCM91250C2-LittleSur"
 
 809	select BOOT_ELF32
 
 810	select HAVE_PATA_PLATFORM
 
 811	select SIBYTE_SB1250
 812	select SWAP_IO_SPACE
 813	select SYS_HAS_CPU_SB1
 814	select SYS_SUPPORTS_BIG_ENDIAN
 815	select SYS_SUPPORTS_HIGHMEM
 816	select SYS_SUPPORTS_LITTLE_ENDIAN
 817	select ZONE_DMA32 if 64BIT
 818
 819config SIBYTE_SENTOSA
 820	bool "Sibyte BCM91250E-Sentosa"
 
 821	select BOOT_ELF32
 
 
 822	select SIBYTE_SB1250
 823	select SWAP_IO_SPACE
 824	select SYS_HAS_CPU_SB1
 825	select SYS_SUPPORTS_BIG_ENDIAN
 826	select SYS_SUPPORTS_LITTLE_ENDIAN
 827	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
 828
 829config SIBYTE_BIGSUR
 830	bool "Sibyte BCM91480B-BigSur"
 831	select BOOT_ELF32
 
 832	select NR_CPUS_DEFAULT_4
 833	select SIBYTE_BCM1x80
 834	select SWAP_IO_SPACE
 835	select SYS_HAS_CPU_SB1
 836	select SYS_SUPPORTS_BIG_ENDIAN
 837	select SYS_SUPPORTS_HIGHMEM
 838	select SYS_SUPPORTS_LITTLE_ENDIAN
 839	select ZONE_DMA32 if 64BIT
 840	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
 841
 842config SNI_RM
 843	bool "SNI RM200/300/400"
 844	select ARC_MEMORY
 845	select ARC_PROMLIB
 846	select FW_ARC if CPU_LITTLE_ENDIAN
 847	select FW_ARC32 if CPU_LITTLE_ENDIAN
 848	select FW_SNIPROM if CPU_BIG_ENDIAN
 849	select ARCH_MAY_HAVE_PC_FDC
 850	select ARCH_MIGHT_HAVE_PC_PARPORT
 851	select ARCH_MIGHT_HAVE_PC_SERIO
 852	select BOOT_ELF32
 853	select CEVT_R4K
 854	select CSRC_R4K
 855	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
 856	select DMA_NONCOHERENT
 857	select GENERIC_ISA_DMA
 858	select HAVE_EISA
 859	select HAVE_PCSPKR_PLATFORM
 860	select HAVE_PCI
 861	select IRQ_MIPS_CPU
 
 862	select I8253
 863	select I8259
 864	select ISA
 865	select MIPS_L1_CACHE_SHIFT_6
 866	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
 867	select SYS_HAS_CPU_R4X00
 868	select SYS_HAS_CPU_R5000
 869	select SYS_HAS_CPU_R10000
 870	select R5000_CPU_SCACHE
 871	select SYS_HAS_EARLY_PRINTK
 872	select SYS_SUPPORTS_32BIT_KERNEL
 873	select SYS_SUPPORTS_64BIT_KERNEL
 874	select SYS_SUPPORTS_BIG_ENDIAN
 875	select SYS_SUPPORTS_HIGHMEM
 876	select SYS_SUPPORTS_LITTLE_ENDIAN
 877	select WAR_R4600_V2_HIT_CACHEOP
 878	help
 879	  The SNI RM200/300/400 are MIPS-based machines manufactured by
 880	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
 881	  Technology and now in turn merged with Fujitsu.  Say Y here to
 882	  support this machine type.
 883
 
 
 
 884config MACH_TX49XX
 885	bool "Toshiba TX49 series based machines"
 886	select WAR_TX49XX_ICACHE_INDEX_INV
 887
 888config MIKROTIK_RB532
 889	bool "Mikrotik RB532 boards"
 890	select CEVT_R4K
 891	select CSRC_R4K
 892	select DMA_NONCOHERENT
 893	select HAVE_PCI
 894	select IRQ_MIPS_CPU
 895	select SYS_HAS_CPU_MIPS32_R1
 896	select SYS_SUPPORTS_32BIT_KERNEL
 897	select SYS_SUPPORTS_LITTLE_ENDIAN
 898	select SWAP_IO_SPACE
 899	select BOOT_RAW
 900	select GPIOLIB
 901	select MIPS_L1_CACHE_SHIFT_4
 902	help
 903	  Support the Mikrotik(tm) RouterBoard 532 series,
 904	  based on the IDT RC32434 SoC.
 905
 906config CAVIUM_OCTEON_SOC
 907	bool "Cavium Networks Octeon SoC based boards"
 908	select CEVT_R4K
 909	select ARCH_HAS_PHYS_TO_DMA
 910	select HAVE_RAPIDIO
 911	select PHYS_ADDR_T_64BIT
 
 
 
 
 
 
 
 
 
 
 912	select SYS_SUPPORTS_64BIT_KERNEL
 913	select SYS_SUPPORTS_BIG_ENDIAN
 914	select EDAC_SUPPORT
 915	select EDAC_ATOMIC_SCRUB
 916	select SYS_SUPPORTS_LITTLE_ENDIAN
 917	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 918	select SYS_HAS_EARLY_PRINTK
 919	select SYS_HAS_CPU_CAVIUM_OCTEON
 920	select HAVE_PCI
 921	select HAVE_PLAT_DELAY
 922	select HAVE_PLAT_FW_INIT_CMDLINE
 923	select HAVE_PLAT_MEMCPY
 924	select ZONE_DMA32
 925	select GPIOLIB
 926	select USE_OF
 927	select ARCH_SPARSEMEM_ENABLE
 928	select SYS_SUPPORTS_SMP
 929	select NR_CPUS_DEFAULT_64
 930	select MIPS_NR_CPU_NR_MAP_1024
 931	select BUILTIN_DTB
 932	select MTD
 933	select MTD_COMPLEX_MAPPINGS
 934	select SWIOTLB
 935	select SYS_SUPPORTS_RELOCATABLE
 936	help
 937	  This option supports all of the Octeon reference boards from Cavium
 938	  Networks. It builds a kernel that dynamically determines the Octeon
 939	  CPU type and supports all known board reference implementations.
 940	  Some of the supported boards are:
 941		EBT3000
 942		EBH3000
 943		EBH3100
 944		Thunder
 945		Kodama
 946		Hikari
 947	  Say Y here for most Octeon reference boards.
 948
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 949endchoice
 950
 951source "arch/mips/alchemy/Kconfig"
 952source "arch/mips/ath25/Kconfig"
 953source "arch/mips/ath79/Kconfig"
 954source "arch/mips/bcm47xx/Kconfig"
 955source "arch/mips/bcm63xx/Kconfig"
 956source "arch/mips/bmips/Kconfig"
 957source "arch/mips/generic/Kconfig"
 958source "arch/mips/ingenic/Kconfig"
 959source "arch/mips/jazz/Kconfig"
 
 960source "arch/mips/lantiq/Kconfig"
 961source "arch/mips/pic32/Kconfig"
 962source "arch/mips/ralink/Kconfig"
 
 963source "arch/mips/sgi-ip27/Kconfig"
 964source "arch/mips/sibyte/Kconfig"
 965source "arch/mips/txx9/Kconfig"
 
 966source "arch/mips/cavium-octeon/Kconfig"
 967source "arch/mips/loongson2ef/Kconfig"
 968source "arch/mips/loongson32/Kconfig"
 969source "arch/mips/loongson64/Kconfig"
 970
 971endmenu
 972
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 973config GENERIC_HWEIGHT
 974	bool
 975	default y
 976
 977config GENERIC_CALIBRATE_DELAY
 978	bool
 979	default y
 980
 
 
 
 
 
 
 
 
 981config SCHED_OMIT_FRAME_POINTER
 982	bool
 983	default y
 984
 985#
 986# Select some configuration options automatically based on user selections.
 987#
 988config FW_ARC
 989	bool
 990
 991config ARCH_MAY_HAVE_PC_FDC
 992	bool
 993
 994config BOOT_RAW
 995	bool
 996
 997config CEVT_BCM1480
 998	bool
 999
1000config CEVT_DS1287
1001	bool
1002
1003config CEVT_GT641XX
1004	bool
1005
 
 
 
1006config CEVT_R4K
 
1007	bool
1008
1009config CEVT_SB1250
1010	bool
1011
1012config CEVT_TXX9
1013	bool
1014
1015config CSRC_BCM1480
1016	bool
1017
1018config CSRC_IOASIC
1019	bool
1020
 
 
 
 
 
 
1021config CSRC_R4K
1022	select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1023	bool
1024
1025config CSRC_SB1250
1026	bool
1027
1028config MIPS_CLOCK_VSYSCALL
1029	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1030
1031config GPIO_TXX9
1032	select GPIOLIB
 
1033	bool
1034
1035config FW_CFE
1036	bool
1037
1038config ARCH_SUPPORTS_UPROBES
1039	def_bool y
 
 
 
1040
1041config DMA_NONCOHERENT
1042	bool
1043	#
1044	# MIPS allows mixing "slightly different" Cacheability and Coherency
1045	# Attribute bits.  It is believed that the uncached access through
1046	# KSEG1 and the implementation specific "uncached accelerated" used
1047	# by pgprot_writcombine can be mixed, and the latter sometimes provides
1048	# significant advantages.
1049	#
1050	select ARCH_HAS_SETUP_DMA_OPS
1051	select ARCH_HAS_DMA_WRITE_COMBINE
1052	select ARCH_HAS_DMA_PREP_COHERENT
1053	select ARCH_HAS_SYNC_DMA_FOR_CPU
1054	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1055	select ARCH_HAS_DMA_SET_UNCACHED
1056	select DMA_NONCOHERENT_MMAP
1057	select NEED_DMA_MAP_STATE
1058
 
 
 
1059config SYS_HAS_EARLY_PRINTK
1060	bool
1061
 
 
 
 
 
 
 
 
 
 
1062config SYS_SUPPORTS_HOTPLUG_CPU
1063	bool
1064
 
 
 
1065config MIPS_BONITO64
1066	bool
1067
1068config MIPS_MSC
1069	bool
1070
 
 
 
 
 
 
1071config SYNC_R4K
1072	bool
1073
1074config NO_IOPORT_MAP
1075	def_bool n
1076
1077config GENERIC_CSUM
1078	def_bool CPU_NO_LOAD_STORE_LR
1079
1080config GENERIC_ISA_DMA
1081	bool
1082	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1083	select ISA_DMA_API
1084
1085config GENERIC_ISA_DMA_SUPPORT_BROKEN
1086	bool
1087	select GENERIC_ISA_DMA
1088
1089config HAVE_PLAT_DELAY
1090	bool
1091
1092config HAVE_PLAT_FW_INIT_CMDLINE
1093	bool
1094
1095config HAVE_PLAT_MEMCPY
1096	bool
1097
1098config ISA_DMA_API
1099	bool
1100
1101config SYS_SUPPORTS_RELOCATABLE
1102	bool
1103	help
1104	  Selected if the platform supports relocating the kernel.
1105	  The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1106	  to allow access to command line and entropy sources.
1107
1108#
1109# Endianness selection.  Sufficiently obscure so many users don't know what to
1110# answer,so we try hard to limit the available choices.  Also the use of a
1111# choice statement should be more obvious to the user.
1112#
1113choice
1114	prompt "Endianness selection"
1115	help
1116	  Some MIPS machines can be configured for either little or big endian
1117	  byte order. These modes require different kernels and a different
1118	  Linux distribution.  In general there is one preferred byteorder for a
1119	  particular system but some systems are just as commonly used in the
1120	  one or the other endianness.
1121
1122config CPU_BIG_ENDIAN
1123	bool "Big endian"
1124	depends on SYS_SUPPORTS_BIG_ENDIAN
1125
1126config CPU_LITTLE_ENDIAN
1127	bool "Little endian"
1128	depends on SYS_SUPPORTS_LITTLE_ENDIAN
 
1129
1130endchoice
1131
1132config EXPORT_UASM
1133	bool
1134
1135config SYS_SUPPORTS_APM_EMULATION
1136	bool
1137
1138config SYS_SUPPORTS_BIG_ENDIAN
1139	bool
1140
1141config SYS_SUPPORTS_LITTLE_ENDIAN
1142	bool
1143
1144config MIPS_HUGE_TLB_SUPPORT
1145	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1146
1147config IRQ_TXX9
1148	bool
1149
1150config IRQ_GT641XX
1151	bool
1152
 
 
 
 
 
 
1153config PCI_GT64XXX_PCI0
1154	bool
1155
1156config PCI_XTALK_BRIDGE
 
 
 
1157	bool
 
1158
1159config NO_EXCEPT_FILL
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1160	bool
 
1161
1162config MIPS_SPRAM
1163	bool
 
 
 
 
 
 
 
 
 
 
1164
1165config SWAP_IO_SPACE
1166	bool
1167
 
 
 
1168config SGI_HAS_INDYDOG
1169	bool
1170
1171config SGI_HAS_HAL2
1172	bool
1173
1174config SGI_HAS_SEEQ
1175	bool
1176
1177config SGI_HAS_WD93
1178	bool
1179
1180config SGI_HAS_ZILOG
1181	bool
1182
1183config SGI_HAS_I8042
1184	bool
1185
1186config DEFAULT_SGI_PARTITION
1187	bool
1188
1189config FW_ARC32
1190	bool
1191
1192config FW_SNIPROM
1193	bool
1194
1195config BOOT_ELF32
1196	bool
1197
1198config MIPS_L1_CACHE_SHIFT_4
1199	bool
1200
1201config MIPS_L1_CACHE_SHIFT_5
1202	bool
1203
1204config MIPS_L1_CACHE_SHIFT_6
1205	bool
1206
1207config MIPS_L1_CACHE_SHIFT_7
1208	bool
1209
1210config MIPS_L1_CACHE_SHIFT
1211	int
1212	default "7" if MIPS_L1_CACHE_SHIFT_7
1213	default "6" if MIPS_L1_CACHE_SHIFT_6
1214	default "5" if MIPS_L1_CACHE_SHIFT_5
1215	default "4" if MIPS_L1_CACHE_SHIFT_4
1216	default "5"
1217
1218config ARC_CMDLINE_ONLY
1219	bool
1220
1221config ARC_CONSOLE
1222	bool "ARC console support"
1223	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1224
1225config ARC_MEMORY
1226	bool
 
 
1227
1228config ARC_PROMLIB
1229	bool
 
 
1230
1231config FW_ARC64
1232	bool
1233
1234config BOOT_ELF64
1235	bool
1236
1237menu "CPU selection"
1238
1239choice
1240	prompt "CPU type"
1241	default CPU_R4X00
1242
1243config CPU_LOONGSON64
1244	bool "Loongson 64-bit CPU"
1245	depends on SYS_HAS_CPU_LOONGSON64
1246	select ARCH_HAS_PHYS_TO_DMA
1247	select CPU_MIPSR2
1248	select CPU_HAS_PREFETCH
1249	select CPU_SUPPORTS_64BIT_KERNEL
1250	select CPU_SUPPORTS_HIGHMEM
1251	select CPU_SUPPORTS_HUGEPAGES
1252	select CPU_SUPPORTS_MSA
1253	select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1254	select CPU_MIPSR2_IRQ_VI
1255	select DMA_NONCOHERENT
1256	select WEAK_ORDERING
1257	select WEAK_REORDERING_BEYOND_LLSC
1258	select MIPS_ASID_BITS_VARIABLE
1259	select MIPS_PGD_C0_CONTEXT
1260	select MIPS_L1_CACHE_SHIFT_6
1261	select MIPS_FP_SUPPORT
1262	select GPIOLIB
1263	select SWIOTLB
1264	select HAVE_KVM
1265	help
1266	  The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1267	  cores implements the MIPS64R2 instruction set with many extensions,
1268	  including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1269	  3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1270	  Loongson-2E/2F is not covered here and will be removed in future.
1271
1272config LOONGSON3_ENHANCEMENT
1273	bool "New Loongson-3 CPU Enhancements"
1274	default n
1275	depends on CPU_LOONGSON64
1276	help
1277	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1278	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1279	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1280	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1281	  Fast TLB refill support, etc.
1282
1283	  This option enable those enhancements which are not probed at run
1284	  time. If you want a generic kernel to run on all Loongson 3 machines,
1285	  please say 'N' here. If you want a high-performance kernel to run on
1286	  new Loongson-3 machines only, please say 'Y' here.
1287
1288config CPU_LOONGSON3_WORKAROUNDS
1289	bool "Loongson-3 LLSC Workarounds"
1290	default y if SMP
1291	depends on CPU_LOONGSON64
1292	help
1293	  Loongson-3 processors have the llsc issues which require workarounds.
1294	  Without workarounds the system may hang unexpectedly.
1295
1296	  Say Y, unless you know what you are doing.
1297
1298config CPU_LOONGSON3_CPUCFG_EMULATION
1299	bool "Emulate the CPUCFG instruction on older Loongson cores"
1300	default y
1301	depends on CPU_LOONGSON64
1302	help
1303	  Loongson-3A R4 and newer have the CPUCFG instruction available for
1304	  userland to query CPU capabilities, much like CPUID on x86. This
1305	  option provides emulation of the instruction on older Loongson
1306	  cores, back to Loongson-3A1000.
1307
1308	  If unsure, please say Y.
1309
1310config CPU_LOONGSON2E
1311	bool "Loongson 2E"
1312	depends on SYS_HAS_CPU_LOONGSON2E
1313	select CPU_LOONGSON2EF
1314	help
1315	  The Loongson 2E processor implements the MIPS III instruction set
1316	  with many extensions.
1317
1318	  It has an internal FPGA northbridge, which is compatible to
1319	  bonito64.
1320
1321config CPU_LOONGSON2F
1322	bool "Loongson 2F"
1323	depends on SYS_HAS_CPU_LOONGSON2F
1324	select CPU_LOONGSON2EF
 
 
1325	help
1326	  The Loongson 2F processor implements the MIPS III instruction set
1327	  with many extensions.
1328
1329	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1330	  have a similar programming interface with FPGA northbridge used in
1331	  Loongson2E.
1332
1333config CPU_LOONGSON1B
1334	bool "Loongson 1B"
1335	depends on SYS_HAS_CPU_LOONGSON1B
1336	select CPU_LOONGSON32
1337	select LEDS_GPIO_REGISTER
1338	help
1339	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1340	  Release 1 instruction set and part of the MIPS32 Release 2
1341	  instruction set.
1342
1343config CPU_LOONGSON1C
1344	bool "Loongson 1C"
1345	depends on SYS_HAS_CPU_LOONGSON1C
1346	select CPU_LOONGSON32
1347	select LEDS_GPIO_REGISTER
1348	help
1349	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1350	  Release 1 instruction set and part of the MIPS32 Release 2
1351	  instruction set.
1352
1353config CPU_MIPS32_R1
1354	bool "MIPS32 Release 1"
1355	depends on SYS_HAS_CPU_MIPS32_R1
1356	select CPU_HAS_PREFETCH
1357	select CPU_SUPPORTS_32BIT_KERNEL
1358	select CPU_SUPPORTS_HIGHMEM
1359	help
1360	  Choose this option to build a kernel for release 1 or later of the
1361	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1362	  MIPS processor are based on a MIPS32 processor.  If you know the
1363	  specific type of processor in your system, choose those that one
1364	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1365	  Release 2 of the MIPS32 architecture is available since several
1366	  years so chances are you even have a MIPS32 Release 2 processor
1367	  in which case you should choose CPU_MIPS32_R2 instead for better
1368	  performance.
1369
1370config CPU_MIPS32_R2
1371	bool "MIPS32 Release 2"
1372	depends on SYS_HAS_CPU_MIPS32_R2
1373	select CPU_HAS_PREFETCH
1374	select CPU_SUPPORTS_32BIT_KERNEL
1375	select CPU_SUPPORTS_HIGHMEM
1376	select CPU_SUPPORTS_MSA
1377	select HAVE_KVM
1378	help
1379	  Choose this option to build a kernel for release 2 or later of the
1380	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1381	  MIPS processor are based on a MIPS32 processor.  If you know the
1382	  specific type of processor in your system, choose those that one
1383	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1384
1385config CPU_MIPS32_R5
1386	bool "MIPS32 Release 5"
1387	depends on SYS_HAS_CPU_MIPS32_R5
1388	select CPU_HAS_PREFETCH
1389	select CPU_SUPPORTS_32BIT_KERNEL
1390	select CPU_SUPPORTS_HIGHMEM
1391	select CPU_SUPPORTS_MSA
1392	select HAVE_KVM
1393	select MIPS_O32_FP64_SUPPORT
1394	help
1395	  Choose this option to build a kernel for release 5 or later of the
1396	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1397	  family, are based on a MIPS32r5 processor. If you own an older
1398	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1399
1400config CPU_MIPS32_R6
1401	bool "MIPS32 Release 6"
1402	depends on SYS_HAS_CPU_MIPS32_R6
1403	select CPU_HAS_PREFETCH
1404	select CPU_NO_LOAD_STORE_LR
1405	select CPU_SUPPORTS_32BIT_KERNEL
1406	select CPU_SUPPORTS_HIGHMEM
1407	select CPU_SUPPORTS_MSA
1408	select HAVE_KVM
1409	select MIPS_O32_FP64_SUPPORT
1410	help
1411	  Choose this option to build a kernel for release 6 or later of the
1412	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1413	  family, are based on a MIPS32r6 processor. If you own an older
1414	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1415
1416config CPU_MIPS64_R1
1417	bool "MIPS64 Release 1"
1418	depends on SYS_HAS_CPU_MIPS64_R1
1419	select CPU_HAS_PREFETCH
1420	select CPU_SUPPORTS_32BIT_KERNEL
1421	select CPU_SUPPORTS_64BIT_KERNEL
1422	select CPU_SUPPORTS_HIGHMEM
1423	select CPU_SUPPORTS_HUGEPAGES
1424	help
1425	  Choose this option to build a kernel for release 1 or later of the
1426	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1427	  MIPS processor are based on a MIPS64 processor.  If you know the
1428	  specific type of processor in your system, choose those that one
1429	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1430	  Release 2 of the MIPS64 architecture is available since several
1431	  years so chances are you even have a MIPS64 Release 2 processor
1432	  in which case you should choose CPU_MIPS64_R2 instead for better
1433	  performance.
1434
1435config CPU_MIPS64_R2
1436	bool "MIPS64 Release 2"
1437	depends on SYS_HAS_CPU_MIPS64_R2
1438	select CPU_HAS_PREFETCH
1439	select CPU_SUPPORTS_32BIT_KERNEL
1440	select CPU_SUPPORTS_64BIT_KERNEL
1441	select CPU_SUPPORTS_HIGHMEM
1442	select CPU_SUPPORTS_HUGEPAGES
1443	select CPU_SUPPORTS_MSA
1444	select HAVE_KVM
1445	help
1446	  Choose this option to build a kernel for release 2 or later of the
1447	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1448	  MIPS processor are based on a MIPS64 processor.  If you know the
1449	  specific type of processor in your system, choose those that one
1450	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1451
1452config CPU_MIPS64_R5
1453	bool "MIPS64 Release 5"
1454	depends on SYS_HAS_CPU_MIPS64_R5
1455	select CPU_HAS_PREFETCH
1456	select CPU_SUPPORTS_32BIT_KERNEL
1457	select CPU_SUPPORTS_64BIT_KERNEL
1458	select CPU_SUPPORTS_HIGHMEM
1459	select CPU_SUPPORTS_HUGEPAGES
1460	select CPU_SUPPORTS_MSA
1461	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1462	select HAVE_KVM
1463	help
1464	  Choose this option to build a kernel for release 5 or later of the
1465	  MIPS64 architecture.  This is a intermediate MIPS architecture
1466	  release partly implementing release 6 features. Though there is no
1467	  any hardware known to be based on this release.
1468
1469config CPU_MIPS64_R6
1470	bool "MIPS64 Release 6"
1471	depends on SYS_HAS_CPU_MIPS64_R6
1472	select CPU_HAS_PREFETCH
1473	select CPU_NO_LOAD_STORE_LR
1474	select CPU_SUPPORTS_32BIT_KERNEL
1475	select CPU_SUPPORTS_64BIT_KERNEL
1476	select CPU_SUPPORTS_HIGHMEM
1477	select CPU_SUPPORTS_HUGEPAGES
1478	select CPU_SUPPORTS_MSA
1479	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1480	select HAVE_KVM
1481	help
1482	  Choose this option to build a kernel for release 6 or later of the
1483	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
1484	  family, are based on a MIPS64r6 processor. If you own an older
1485	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1486
1487config CPU_P5600
1488	bool "MIPS Warrior P5600"
1489	depends on SYS_HAS_CPU_P5600
1490	select CPU_HAS_PREFETCH
1491	select CPU_SUPPORTS_32BIT_KERNEL
1492	select CPU_SUPPORTS_HIGHMEM
1493	select CPU_SUPPORTS_MSA
1494	select CPU_SUPPORTS_CPUFREQ
1495	select CPU_MIPSR2_IRQ_VI
1496	select CPU_MIPSR2_IRQ_EI
1497	select HAVE_KVM
1498	select MIPS_O32_FP64_SUPPORT
1499	help
1500	  Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1501	  It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1502	  MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1503	  level features like up to six P5600 calculation cores, CM2 with L2
1504	  cache, IOCU/IOMMU (though might be unused depending on the system-
1505	  specific IP core configuration), GIC, CPC, virtualisation module,
1506	  eJTAG and PDtrace.
1507
1508config CPU_R3000
1509	bool "R3000"
1510	depends on SYS_HAS_CPU_R3000
1511	select CPU_HAS_WB
1512	select CPU_R3K_TLB
1513	select CPU_SUPPORTS_32BIT_KERNEL
1514	select CPU_SUPPORTS_HIGHMEM
1515	help
1516	  Please make sure to pick the right CPU type. Linux/MIPS is not
1517	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1518	  *not* work on R4000 machines and vice versa.  However, since most
1519	  of the supported machines have an R4000 (or similar) CPU, R4x00
1520	  might be a safe bet.  If the resulting kernel does not work,
1521	  try to recompile with R3000.
1522
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1523config CPU_R4300
1524	bool "R4300"
1525	depends on SYS_HAS_CPU_R4300
1526	select CPU_SUPPORTS_32BIT_KERNEL
1527	select CPU_SUPPORTS_64BIT_KERNEL
1528	help
1529	  MIPS Technologies R4300-series processors.
1530
1531config CPU_R4X00
1532	bool "R4x00"
1533	depends on SYS_HAS_CPU_R4X00
1534	select CPU_SUPPORTS_32BIT_KERNEL
1535	select CPU_SUPPORTS_64BIT_KERNEL
1536	select CPU_SUPPORTS_HUGEPAGES
1537	help
1538	  MIPS Technologies R4000-series processors other than 4300, including
1539	  the R4000, R4400, R4600, and 4700.
1540
1541config CPU_TX49XX
1542	bool "R49XX"
1543	depends on SYS_HAS_CPU_TX49XX
1544	select CPU_HAS_PREFETCH
1545	select CPU_SUPPORTS_32BIT_KERNEL
1546	select CPU_SUPPORTS_64BIT_KERNEL
1547	select CPU_SUPPORTS_HUGEPAGES
1548
1549config CPU_R5000
1550	bool "R5000"
1551	depends on SYS_HAS_CPU_R5000
1552	select CPU_SUPPORTS_32BIT_KERNEL
1553	select CPU_SUPPORTS_64BIT_KERNEL
1554	select CPU_SUPPORTS_HUGEPAGES
1555	help
1556	  MIPS Technologies R5000-series processors other than the Nevada.
1557
 
 
 
 
 
 
1558config CPU_R5500
1559	bool "R5500"
1560	depends on SYS_HAS_CPU_R5500
1561	select CPU_SUPPORTS_32BIT_KERNEL
1562	select CPU_SUPPORTS_64BIT_KERNEL
1563	select CPU_SUPPORTS_HUGEPAGES
1564	help
1565	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1566	  instruction set.
1567
 
 
 
 
 
 
 
 
 
1568config CPU_NEVADA
1569	bool "RM52xx"
1570	depends on SYS_HAS_CPU_NEVADA
1571	select CPU_SUPPORTS_32BIT_KERNEL
1572	select CPU_SUPPORTS_64BIT_KERNEL
1573	select CPU_SUPPORTS_HUGEPAGES
1574	help
1575	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1576
 
 
 
 
 
 
 
 
 
 
1577config CPU_R10000
1578	bool "R10000"
1579	depends on SYS_HAS_CPU_R10000
1580	select CPU_HAS_PREFETCH
1581	select CPU_SUPPORTS_32BIT_KERNEL
1582	select CPU_SUPPORTS_64BIT_KERNEL
1583	select CPU_SUPPORTS_HIGHMEM
1584	select CPU_SUPPORTS_HUGEPAGES
1585	help
1586	  MIPS Technologies R10000-series processors.
1587
1588config CPU_RM7000
1589	bool "RM7000"
1590	depends on SYS_HAS_CPU_RM7000
1591	select CPU_HAS_PREFETCH
1592	select CPU_SUPPORTS_32BIT_KERNEL
1593	select CPU_SUPPORTS_64BIT_KERNEL
1594	select CPU_SUPPORTS_HIGHMEM
1595	select CPU_SUPPORTS_HUGEPAGES
 
 
 
 
 
 
 
 
1596
1597config CPU_SB1
1598	bool "SB1"
1599	depends on SYS_HAS_CPU_SB1
1600	select CPU_SUPPORTS_32BIT_KERNEL
1601	select CPU_SUPPORTS_64BIT_KERNEL
1602	select CPU_SUPPORTS_HIGHMEM
1603	select CPU_SUPPORTS_HUGEPAGES
1604	select WEAK_ORDERING
1605
1606config CPU_CAVIUM_OCTEON
1607	bool "Cavium Octeon processor"
1608	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1609	select CPU_HAS_PREFETCH
1610	select CPU_SUPPORTS_64BIT_KERNEL
 
 
1611	select WEAK_ORDERING
1612	select CPU_SUPPORTS_HIGHMEM
1613	select CPU_SUPPORTS_HUGEPAGES
1614	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1615	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1616	select MIPS_L1_CACHE_SHIFT_7
1617	select HAVE_KVM
1618	help
1619	  The Cavium Octeon processor is a highly integrated chip containing
1620	  many ethernet hardware widgets for networking tasks. The processor
1621	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1622	  Full details can be found at http://www.caviumnetworks.com.
1623
1624config CPU_BMIPS
1625	bool "Broadcom BMIPS"
1626	depends on SYS_HAS_CPU_BMIPS
1627	select CPU_MIPS32
1628	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1629	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1630	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1631	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
 
 
 
 
 
 
1632	select CPU_SUPPORTS_32BIT_KERNEL
1633	select DMA_NONCOHERENT
1634	select IRQ_MIPS_CPU
1635	select SWAP_IO_SPACE
 
 
1636	select WEAK_ORDERING
1637	select CPU_SUPPORTS_HIGHMEM
1638	select CPU_HAS_PREFETCH
1639	select CPU_SUPPORTS_CPUFREQ
1640	select MIPS_EXTERNAL_TIMER
1641	select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1642	help
1643	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1644
1645endchoice
1646
1647config CPU_MIPS32_3_5_FEATURES
1648	bool "MIPS32 Release 3.5 Features"
1649	depends on SYS_HAS_CPU_MIPS32_R3_5
1650	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1651		   CPU_P5600
 
 
 
1652	help
1653	  Choose this option to build a kernel for release 2 or later of the
1654	  MIPS32 architecture including features from the 3.5 release such as
1655	  support for Enhanced Virtual Addressing (EVA).
1656
1657config CPU_MIPS32_3_5_EVA
1658	bool "Enhanced Virtual Addressing (EVA)"
1659	depends on CPU_MIPS32_3_5_FEATURES
1660	select EVA
1661	default y
1662	help
1663	  Choose this option if you want to enable the Enhanced Virtual
1664	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1665	  One of its primary benefits is an increase in the maximum size
1666	  of lowmem (up to 3GB). If unsure, say 'N' here.
1667
1668config CPU_MIPS32_R5_FEATURES
1669	bool "MIPS32 Release 5 Features"
1670	depends on SYS_HAS_CPU_MIPS32_R5
1671	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1672	help
1673	  Choose this option to build a kernel for release 2 or later of the
1674	  MIPS32 architecture including features from release 5 such as
1675	  support for Extended Physical Addressing (XPA).
1676
1677config CPU_MIPS32_R5_XPA
1678	bool "Extended Physical Addressing (XPA)"
1679	depends on CPU_MIPS32_R5_FEATURES
1680	depends on !EVA
1681	depends on !PAGE_SIZE_4KB
1682	depends on SYS_SUPPORTS_HIGHMEM
1683	select XPA
1684	select HIGHMEM
1685	select PHYS_ADDR_T_64BIT
1686	default n
1687	help
1688	  Choose this option if you want to enable the Extended Physical
1689	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1690	  benefit is to increase physical addressing equal to or greater
1691	  than 40 bits. Note that this has the side effect of turning on
1692	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1693	  If unsure, say 'N' here.
1694
1695if CPU_LOONGSON2F
1696config CPU_NOP_WORKAROUNDS
1697	bool
1698
1699config CPU_JUMP_WORKAROUNDS
1700	bool
1701
1702config CPU_LOONGSON2F_WORKAROUNDS
1703	bool "Loongson 2F Workarounds"
1704	default y
1705	select CPU_NOP_WORKAROUNDS
1706	select CPU_JUMP_WORKAROUNDS
1707	help
1708	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1709	  require workarounds.  Without workarounds the system may hang
1710	  unexpectedly.  For more information please refer to the gas
1711	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1712
1713	  Loongson 2F03 and later have fixed these issues and no workarounds
1714	  are needed.  The workarounds have no significant side effect on them
1715	  but may decrease the performance of the system so this option should
1716	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1717	  systems.
1718
1719	  If unsure, please say Y.
1720endif # CPU_LOONGSON2F
1721
1722config SYS_SUPPORTS_ZBOOT
1723	bool
1724	select HAVE_KERNEL_GZIP
1725	select HAVE_KERNEL_BZIP2
1726	select HAVE_KERNEL_LZ4
1727	select HAVE_KERNEL_LZMA
1728	select HAVE_KERNEL_LZO
1729	select HAVE_KERNEL_XZ
1730	select HAVE_KERNEL_ZSTD
1731
1732config SYS_SUPPORTS_ZBOOT_UART16550
1733	bool
1734	select SYS_SUPPORTS_ZBOOT
1735
1736config SYS_SUPPORTS_ZBOOT_UART_PROM
1737	bool
1738	select SYS_SUPPORTS_ZBOOT
1739
1740config CPU_LOONGSON2EF
1741	bool
1742	select CPU_SUPPORTS_32BIT_KERNEL
1743	select CPU_SUPPORTS_64BIT_KERNEL
1744	select CPU_SUPPORTS_HIGHMEM
1745	select CPU_SUPPORTS_HUGEPAGES
1746
1747config CPU_LOONGSON32
1748	bool
1749	select CPU_MIPS32
1750	select CPU_MIPSR2
1751	select CPU_HAS_PREFETCH
1752	select CPU_SUPPORTS_32BIT_KERNEL
1753	select CPU_SUPPORTS_HIGHMEM
1754	select CPU_SUPPORTS_CPUFREQ
1755
1756config CPU_BMIPS32_3300
1757	select SMP_UP if SMP
1758	bool
1759
1760config CPU_BMIPS4350
1761	bool
1762	select SYS_SUPPORTS_SMP
1763	select SYS_SUPPORTS_HOTPLUG_CPU
1764
1765config CPU_BMIPS4380
1766	bool
1767	select MIPS_L1_CACHE_SHIFT_6
1768	select SYS_SUPPORTS_SMP
1769	select SYS_SUPPORTS_HOTPLUG_CPU
1770	select CPU_HAS_RIXI
1771
1772config CPU_BMIPS5000
1773	bool
1774	select MIPS_CPU_SCACHE
1775	select MIPS_L1_CACHE_SHIFT_7
1776	select SYS_SUPPORTS_SMP
1777	select SYS_SUPPORTS_HOTPLUG_CPU
1778	select CPU_HAS_RIXI
1779
1780config SYS_HAS_CPU_LOONGSON64
1781	bool
1782	select CPU_SUPPORTS_CPUFREQ
1783	select CPU_HAS_RIXI
1784
1785config SYS_HAS_CPU_LOONGSON2E
1786	bool
1787
1788config SYS_HAS_CPU_LOONGSON2F
1789	bool
1790	select CPU_SUPPORTS_CPUFREQ
1791	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1792
1793config SYS_HAS_CPU_LOONGSON1B
1794	bool
1795
1796config SYS_HAS_CPU_LOONGSON1C
1797	bool
1798
1799config SYS_HAS_CPU_MIPS32_R1
1800	bool
1801
1802config SYS_HAS_CPU_MIPS32_R2
1803	bool
1804
1805config SYS_HAS_CPU_MIPS32_R3_5
1806	bool
1807
1808config SYS_HAS_CPU_MIPS32_R5
1809	bool
1810
1811config SYS_HAS_CPU_MIPS32_R6
1812	bool
1813
1814config SYS_HAS_CPU_MIPS64_R1
1815	bool
1816
1817config SYS_HAS_CPU_MIPS64_R2
1818	bool
1819
1820config SYS_HAS_CPU_MIPS64_R5
1821	bool
1822
1823config SYS_HAS_CPU_MIPS64_R6
1824	bool
1825
1826config SYS_HAS_CPU_P5600
1827	bool
1828
1829config SYS_HAS_CPU_R3000
1830	bool
1831
1832config SYS_HAS_CPU_R4300
1833	bool
1834
1835config SYS_HAS_CPU_R4X00
1836	bool
1837
1838config SYS_HAS_CPU_TX49XX
1839	bool
1840
1841config SYS_HAS_CPU_R5000
1842	bool
1843
 
 
 
1844config SYS_HAS_CPU_R5500
1845	bool
1846
 
 
 
1847config SYS_HAS_CPU_NEVADA
1848	bool
1849
 
 
 
1850config SYS_HAS_CPU_R10000
1851	bool
1852
1853config SYS_HAS_CPU_RM7000
1854	bool
1855
 
 
 
1856config SYS_HAS_CPU_SB1
1857	bool
1858
1859config SYS_HAS_CPU_CAVIUM_OCTEON
1860	bool
1861
1862config SYS_HAS_CPU_BMIPS
1863	bool
1864
1865config SYS_HAS_CPU_BMIPS32_3300
1866	bool
1867	select SYS_HAS_CPU_BMIPS
1868
1869config SYS_HAS_CPU_BMIPS4350
1870	bool
1871	select SYS_HAS_CPU_BMIPS
1872
1873config SYS_HAS_CPU_BMIPS4380
1874	bool
1875	select SYS_HAS_CPU_BMIPS
1876
1877config SYS_HAS_CPU_BMIPS5000
1878	bool
1879	select SYS_HAS_CPU_BMIPS
 
 
1880
1881#
1882# CPU may reorder R->R, R->W, W->R, W->W
1883# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1884#
1885config WEAK_ORDERING
1886	bool
1887
1888#
1889# CPU may reorder reads and writes beyond LL/SC
1890# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1891#
1892config WEAK_REORDERING_BEYOND_LLSC
1893	bool
1894endmenu
1895
1896#
1897# These two indicate any level of the MIPS32 and MIPS64 architecture
1898#
1899config CPU_MIPS32
1900	bool
1901	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1902		     CPU_MIPS32_R6 || CPU_P5600
1903
1904config CPU_MIPS64
1905	bool
1906	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1907		     CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1908
1909#
1910# These indicate the revision of the architecture
1911#
1912config CPU_MIPSR1
1913	bool
1914	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1915
1916config CPU_MIPSR2
1917	bool
1918	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1919	select CPU_HAS_RIXI
1920	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1921	select MIPS_SPRAM
1922
1923config CPU_MIPSR5
1924	bool
1925	default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
1926	select CPU_HAS_RIXI
1927	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1928	select MIPS_SPRAM
1929
1930config CPU_MIPSR6
1931	bool
1932	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1933	select CPU_HAS_RIXI
1934	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1935	select HAVE_ARCH_BITREVERSE
1936	select MIPS_ASID_BITS_VARIABLE
1937	select MIPS_CRC_SUPPORT
1938	select MIPS_SPRAM
1939
1940config TARGET_ISA_REV
1941	int
1942	default 1 if CPU_MIPSR1
1943	default 2 if CPU_MIPSR2
1944	default 5 if CPU_MIPSR5
1945	default 6 if CPU_MIPSR6
1946	default 0
1947	help
1948	  Reflects the ISA revision being targeted by the kernel build. This
1949	  is effectively the Kconfig equivalent of MIPS_ISA_REV.
1950
1951config EVA
1952	bool
1953
1954config XPA
1955	bool
1956
1957config SYS_SUPPORTS_32BIT_KERNEL
1958	bool
1959config SYS_SUPPORTS_64BIT_KERNEL
1960	bool
1961config CPU_SUPPORTS_32BIT_KERNEL
1962	bool
1963config CPU_SUPPORTS_64BIT_KERNEL
1964	bool
1965config CPU_SUPPORTS_CPUFREQ
1966	bool
1967config CPU_SUPPORTS_ADDRWINCFG
1968	bool
1969config CPU_SUPPORTS_HUGEPAGES
1970	bool
1971	depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
 
1972config MIPS_PGD_C0_CONTEXT
1973	bool
1974	depends on 64BIT
1975	default y if (CPU_MIPSR2 || CPU_MIPSR6)
1976
1977#
1978# Set to y for ptrace access to watch registers.
1979#
1980config HARDWARE_WATCHPOINTS
1981	bool
1982	default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
1983
1984menu "Kernel type"
1985
1986choice
 
1987	prompt "Kernel code model"
1988	help
1989	  You should only select this option if you have a workload that
1990	  actually benefits from 64-bit processing or if your machine has
1991	  large memory.  You will only be presented a single option in this
1992	  menu if your system does not support both 32-bit and 64-bit kernels.
1993
1994config 32BIT
1995	bool "32-bit kernel"
1996	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
1997	select TRAD_SIGNALS
1998	help
1999	  Select this option if you want to build a 32-bit kernel.
2000
2001config 64BIT
2002	bool "64-bit kernel"
2003	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
 
2004	help
2005	  Select this option if you want to build a 64-bit kernel.
2006
2007endchoice
2008
2009config MIPS_VA_BITS_48
2010	bool "48 bits virtual memory"
2011	depends on 64BIT
2012	help
2013	  Support a maximum at least 48 bits of application virtual
2014	  memory.  Default is 40 bits or less, depending on the CPU.
2015	  For page sizes 16k and above, this option results in a small
2016	  memory overhead for page tables.  For 4k page size, a fourth
2017	  level of page tables is added which imposes both a memory
2018	  overhead as well as slower TLB fault handling.
2019
2020	  If unsure, say N.
2021
2022config ZBOOT_LOAD_ADDRESS
2023	hex "Compressed kernel load address"
2024	default 0xffffffff80400000 if BCM47XX
2025	default 0x0
2026	depends on SYS_SUPPORTS_ZBOOT
2027	help
2028	  The address to load compressed kernel, aka vmlinuz.
2029
2030	  This is only used if non-zero.
2031
2032choice
2033	prompt "Kernel page size"
2034	default PAGE_SIZE_4KB
2035
2036config PAGE_SIZE_4KB
2037	bool "4kB"
2038	depends on !CPU_LOONGSON2EF && !CPU_LOONGSON64
2039	help
2040	  This option select the standard 4kB Linux page size.  On some
2041	  R3000-family processors this is the only available page size.  Using
2042	  4kB page size will minimize memory consumption and is therefore
2043	  recommended for low memory systems.
2044
2045config PAGE_SIZE_8KB
2046	bool "8kB"
2047	depends on CPU_CAVIUM_OCTEON
2048	depends on !MIPS_VA_BITS_48
2049	help
2050	  Using 8kB page size will result in higher performance kernel at
2051	  the price of higher memory consumption.  This option is available
2052	  only on cnMIPS processors.  Note that you will need a suitable Linux
2053	  distribution to support this.
2054
2055config PAGE_SIZE_16KB
2056	bool "16kB"
2057	depends on !CPU_R3000
2058	help
2059	  Using 16kB page size will result in higher performance kernel at
2060	  the price of higher memory consumption.  This option is available on
2061	  all non-R3000 family processors.  Note that you will need a suitable
2062	  Linux distribution to support this.
2063
2064config PAGE_SIZE_32KB
2065	bool "32kB"
2066	depends on CPU_CAVIUM_OCTEON
2067	depends on !MIPS_VA_BITS_48
2068	help
2069	  Using 32kB page size will result in higher performance kernel at
2070	  the price of higher memory consumption.  This option is available
2071	  only on cnMIPS cores.  Note that you will need a suitable Linux
2072	  distribution to support this.
2073
2074config PAGE_SIZE_64KB
2075	bool "64kB"
2076	depends on !CPU_R3000
2077	help
2078	  Using 64kB page size will result in higher performance kernel at
2079	  the price of higher memory consumption.  This option is available on
2080	  all non-R3000 family processor.  Not that at the time of this
2081	  writing this option is still high experimental.
2082
2083endchoice
2084
2085config ARCH_FORCE_MAX_ORDER
2086	int "Maximum zone order"
2087	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2088	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2089	default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2090	default "10"
 
 
2091	help
2092	  The kernel memory allocator divides physically contiguous memory
2093	  blocks into "zones", where each zone is a power of two number of
2094	  pages.  This option selects the largest power of two that the kernel
2095	  keeps in the memory allocator.  If you need to allocate very large
2096	  blocks of physically contiguous memory, then you may need to
2097	  increase this value.
2098
 
 
 
2099	  The page size is not necessarily 4KB.  Keep this in mind
2100	  when choosing a value for this option.
2101
2102config BOARD_SCACHE
2103	bool
2104
2105config IP22_CPU_SCACHE
2106	bool
2107	select BOARD_SCACHE
2108
2109#
2110# Support for a MIPS32 / MIPS64 style S-caches
2111#
2112config MIPS_CPU_SCACHE
2113	bool
2114	select BOARD_SCACHE
2115
2116config R5000_CPU_SCACHE
2117	bool
2118	select BOARD_SCACHE
2119
2120config RM7000_CPU_SCACHE
2121	bool
2122	select BOARD_SCACHE
2123
2124config SIBYTE_DMA_PAGEOPS
2125	bool "Use DMA to clear/copy pages"
2126	depends on CPU_SB1
2127	help
2128	  Instead of using the CPU to zero and copy pages, use a Data Mover
2129	  channel.  These DMA channels are otherwise unused by the standard
2130	  SiByte Linux port.  Seems to give a small performance benefit.
2131
2132config CPU_HAS_PREFETCH
2133	bool
2134
2135config CPU_GENERIC_DUMP_TLB
2136	bool
2137	default y if !CPU_R3000
2138
2139config MIPS_FP_SUPPORT
2140	bool "Floating Point support" if EXPERT
2141	default y
2142	help
2143	  Select y to include support for floating point in the kernel
2144	  including initialization of FPU hardware, FP context save & restore
2145	  and emulation of an FPU where necessary. Without this support any
2146	  userland program attempting to use floating point instructions will
2147	  receive a SIGILL.
2148
2149	  If you know that your userland will not attempt to use floating point
2150	  instructions then you can say n here to shrink the kernel a little.
2151
2152	  If unsure, say y.
2153
2154config CPU_R2300_FPU
2155	bool
2156	depends on MIPS_FP_SUPPORT
2157	default y if CPU_R3000
2158
2159config CPU_R3K_TLB
2160	bool
2161
2162config CPU_R4K_FPU
2163	bool
2164	depends on MIPS_FP_SUPPORT
2165	default y if !CPU_R2300_FPU
2166
2167config CPU_R4K_CACHE_TLB
2168	bool
2169	default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2170
2171config MIPS_MT_SMP
2172	bool "MIPS MT SMP support (1 TC on each available VPE)"
2173	default y
2174	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MIPSR6 && !CPU_MICROMIPS
2175	select CPU_MIPSR2_IRQ_VI
2176	select CPU_MIPSR2_IRQ_EI
2177	select SYNC_R4K
2178	select MIPS_MT
 
2179	select SMP
 
 
2180	select SMP_UP
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2181	select SYS_SUPPORTS_SMP
2182	select SYS_SUPPORTS_SCHED_SMT
2183	select MIPS_PERF_SHARED_TC_COUNTERS
2184	help
2185	  This is a kernel model which is known as SMVP. This is supported
2186	  on cores with the MT ASE and uses the available VPEs to implement
2187	  virtual processors which supports SMP. This is equivalent to the
2188	  Intel Hyperthreading feature. For further information go to
2189	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
 
 
 
 
 
 
 
2190
2191config MIPS_MT
2192	bool
2193
2194config SCHED_SMT
2195	bool "SMT (multithreading) scheduler support"
2196	depends on SYS_SUPPORTS_SCHED_SMT
2197	default n
2198	help
2199	  SMT scheduler support improves the CPU scheduler's decision making
2200	  when dealing with MIPS MT enabled cores at a cost of slightly
2201	  increased overhead in some places. If unsure say N here.
2202
2203config SYS_SUPPORTS_SCHED_SMT
2204	bool
2205
 
2206config SYS_SUPPORTS_MULTITHREADING
2207	bool
2208
2209config MIPS_MT_FPAFF
2210	bool "Dynamic FPU affinity for FP-intensive threads"
2211	default y
2212	depends on MIPS_MT_SMP
2213
2214config MIPSR2_TO_R6_EMULATOR
2215	bool "MIPS R2-to-R6 emulator"
2216	depends on CPU_MIPSR6
2217	depends on MIPS_FP_SUPPORT
2218	default y
2219	help
2220	  Choose this option if you want to run non-R6 MIPS userland code.
2221	  Even if you say 'Y' here, the emulator will still be disabled by
2222	  default. You can enable it using the 'mipsr2emu' kernel option.
2223	  The only reason this is a build-time option is to save ~14K from the
2224	  final kernel image.
2225
2226config SYS_SUPPORTS_VPE_LOADER
2227	bool
2228	depends on SYS_SUPPORTS_MULTITHREADING
2229	help
2230	  Indicates that the platform supports the VPE loader, and provides
2231	  physical_memsize.
2232
2233config MIPS_VPE_LOADER
2234	bool "VPE loader support."
2235	depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2236	select CPU_MIPSR2_IRQ_VI
2237	select CPU_MIPSR2_IRQ_EI
2238	select MIPS_MT
2239	help
2240	  Includes a loader for loading an elf relocatable object
2241	  onto another VPE and running it.
2242
2243config MIPS_VPE_LOADER_MT
2244	bool
2245	default "y"
2246	depends on MIPS_VPE_LOADER
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2247
2248config MIPS_VPE_LOADER_TOM
2249	bool "Load VPE program into memory hidden from linux"
2250	depends on MIPS_VPE_LOADER
2251	default y
2252	help
2253	  The loader can use memory that is present but has been hidden from
2254	  Linux using the kernel command line option "mem=xxMB". It's up to
2255	  you to ensure the amount you put in the option and the space your
2256	  program requires is less or equal to the amount physically present.
2257
 
2258config MIPS_VPE_APSP_API
2259	bool "Enable support for AP/SP API (RTLX)"
2260	depends on MIPS_VPE_LOADER
 
2261
2262config MIPS_VPE_APSP_API_MT
2263	bool
2264	default "y"
2265	depends on MIPS_VPE_APSP_API
2266
2267config MIPS_CPS
2268	bool "MIPS Coherent Processing System support"
2269	depends on SYS_SUPPORTS_MIPS_CPS
2270	select MIPS_CM
2271	select MIPS_CPS_PM if HOTPLUG_CPU
2272	select SMP
2273	select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
2274	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2275	select SYS_SUPPORTS_HOTPLUG_CPU
2276	select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2277	select SYS_SUPPORTS_SMP
 
2278	select WEAK_ORDERING
2279	select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2280	help
2281	  Select this if you wish to run an SMP kernel across multiple cores
2282	  within a MIPS Coherent Processing System. When this option is
2283	  enabled the kernel will probe for other cores and boot them with
2284	  no external assistance. It is safe to enable this when hardware
2285	  support is unavailable.
2286
2287config MIPS_CPS_PM
2288	depends on MIPS_CPS
2289	bool
2290
2291config MIPS_CM
2292	bool
2293	select MIPS_CPC
2294
2295config MIPS_CPC
2296	bool
 
 
2297
2298config SB1_PASS_2_WORKAROUNDS
2299	bool
2300	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2301	default y
2302
2303config SB1_PASS_2_1_WORKAROUNDS
2304	bool
2305	depends on CPU_SB1 && CPU_SB1_PASS_2
2306	default y
2307
2308choice
2309	prompt "SmartMIPS or microMIPS ASE support"
2310
2311config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2312	bool "None"
2313	help
2314	  Select this if you want neither microMIPS nor SmartMIPS support
2315
2316config CPU_HAS_SMARTMIPS
2317	depends on SYS_SUPPORTS_SMARTMIPS
2318	bool "SmartMIPS"
2319	help
2320	  SmartMIPS is a extension of the MIPS32 architecture aimed at
2321	  increased security at both hardware and software level for
2322	  smartcards.  Enabling this option will allow proper use of the
2323	  SmartMIPS instructions by Linux applications.  However a kernel with
2324	  this option will not work on a MIPS core without SmartMIPS core.  If
2325	  you don't know you probably don't have SmartMIPS and should say N
2326	  here.
2327
2328config CPU_MICROMIPS
2329	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2330	bool "microMIPS"
2331	help
2332	  When this option is enabled the kernel will be built using the
2333	  microMIPS ISA
2334
2335endchoice
2336
2337config CPU_HAS_MSA
2338	bool "Support for the MIPS SIMD Architecture"
2339	depends on CPU_SUPPORTS_MSA
2340	depends on MIPS_FP_SUPPORT
2341	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2342	help
2343	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2344	  and a set of SIMD instructions to operate on them. When this option
2345	  is enabled the kernel will support allocating & switching MSA
2346	  vector register contexts. If you know that your kernel will only be
2347	  running on CPUs which do not support MSA or that your userland will
2348	  not be making use of it then you may wish to say N here to reduce
2349	  the size & complexity of your kernel.
2350
2351	  If unsure, say Y.
2352
2353config CPU_HAS_WB
2354	bool
2355
2356config XKS01
2357	bool
2358
2359config CPU_HAS_DIEI
2360	depends on !CPU_DIEI_BROKEN
2361	bool
2362
2363config CPU_DIEI_BROKEN
2364	bool
2365
2366config CPU_HAS_RIXI
2367	bool
2368
2369config CPU_NO_LOAD_STORE_LR
2370	bool
2371	help
2372	  CPU lacks support for unaligned load and store instructions:
2373	  LWL, LWR, SWL, SWR (Load/store word left/right).
2374	  LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2375	  systems).
2376
2377#
2378# Vectored interrupt mode is an R2 feature
2379#
2380config CPU_MIPSR2_IRQ_VI
2381	bool
2382
2383#
2384# Extended interrupt mode is an R2 feature
2385#
2386config CPU_MIPSR2_IRQ_EI
2387	bool
2388
2389config CPU_HAS_SYNC
2390	bool
2391	depends on !CPU_R3000
2392	default y
2393
 
 
 
2394#
2395# CPU non-features
2396#
2397
2398# Work around the "daddi" and "daddiu" CPU errata:
2399#
2400# - The `daddi' instruction fails to trap on overflow.
2401#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2402#   erratum #23
2403#
2404# - The `daddiu' instruction can produce an incorrect result.
2405#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2406#   erratum #41
2407#   "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2408#   #15
2409#   "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2410#   "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2411config CPU_DADDI_WORKAROUNDS
2412	bool
2413
2414# Work around certain R4000 CPU errata (as implemented by GCC):
2415#
2416# - A double-word or a variable shift may give an incorrect result
2417#   if executed immediately after starting an integer division:
2418#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2419#   erratum #28
2420#   "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2421#   #19
2422#
2423# - A double-word or a variable shift may give an incorrect result
2424#   if executed while an integer multiplication is in progress:
2425#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2426#   errata #16 & #28
2427#
2428# - An integer division may give an incorrect result if started in
2429#   a delay slot of a taken branch or a jump:
2430#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2431#   erratum #52
2432config CPU_R4000_WORKAROUNDS
2433	bool
2434	select CPU_R4400_WORKAROUNDS
2435
2436# Work around certain R4400 CPU errata (as implemented by GCC):
2437#
2438# - A double-word or a variable shift may give an incorrect result
2439#   if executed immediately after starting an integer division:
2440#   "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2441#   "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2442config CPU_R4400_WORKAROUNDS
2443	bool
2444
2445config CPU_R4X00_BUGS64
2446	bool
2447	default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2448
2449config MIPS_ASID_SHIFT
2450	int
2451	default 6 if CPU_R3000
2452	default 0
2453
2454config MIPS_ASID_BITS
2455	int
2456	default 0 if MIPS_ASID_BITS_VARIABLE
2457	default 6 if CPU_R3000
2458	default 8
2459
2460config MIPS_ASID_BITS_VARIABLE
2461	bool
2462
2463config MIPS_CRC_SUPPORT
2464	bool
2465
2466# R4600 erratum.  Due to the lack of errata information the exact
2467# technical details aren't known.  I've experimentally found that disabling
2468# interrupts during indexed I-cache flushes seems to be sufficient to deal
2469# with the issue.
2470config WAR_R4600_V1_INDEX_ICACHEOP
2471	bool
2472
2473# Pleasures of the R4600 V1.x.  Cite from the IDT R4600 V1.7 errata:
2474#
2475#  18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2476#      Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2477#      executed if there is no other dcache activity. If the dcache is
2478#      accessed for another instruction immediately preceding when these
2479#      cache instructions are executing, it is possible that the dcache
2480#      tag match outputs used by these cache instructions will be
2481#      incorrect. These cache instructions should be preceded by at least
2482#      four instructions that are not any kind of load or store
2483#      instruction.
2484#
2485#      This is not allowed:    lw
2486#                              nop
2487#                              nop
2488#                              nop
2489#                              cache       Hit_Writeback_Invalidate_D
2490#
2491#      This is allowed:        lw
2492#                              nop
2493#                              nop
2494#                              nop
2495#                              nop
2496#                              cache       Hit_Writeback_Invalidate_D
2497config WAR_R4600_V1_HIT_CACHEOP
2498	bool
2499
2500# Writeback and invalidate the primary cache dcache before DMA.
2501#
2502# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2503# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2504# operate correctly if the internal data cache refill buffer is empty.  These
2505# CACHE instructions should be separated from any potential data cache miss
2506# by a load instruction to an uncached address to empty the response buffer."
2507# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2508# in .pdf format.)
2509config WAR_R4600_V2_HIT_CACHEOP
2510	bool
2511
2512# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2513# the line which this instruction itself exists, the following
2514# operation is not guaranteed."
2515#
2516# Workaround: do two phase flushing for Index_Invalidate_I
2517config WAR_TX49XX_ICACHE_INDEX_INV
2518	bool
2519
2520# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2521# opposes it being called that) where invalid instructions in the same
2522# I-cache line worth of instructions being fetched may case spurious
2523# exceptions.
2524config WAR_ICACHE_REFILLS
2525	bool
2526
2527# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2528# may cause ll / sc and lld / scd sequences to execute non-atomically.
2529config WAR_R10000_LLSC
2530	bool
2531
2532# 34K core erratum: "Problems Executing the TLBR Instruction"
2533config WAR_MIPS34K_MISSED_ITLB
2534	bool
2535
2536#
2537# - Highmem only makes sense for the 32-bit kernel.
2538# - The current highmem code will only work properly on physically indexed
2539#   caches such as R3000, SB1, R7000 or those that look like they're virtually
2540#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
2541#   moment we protect the user and offer the highmem option only on machines
2542#   where it's known to be safe.  This will not offer highmem on a few systems
2543#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2544#   indexed CPUs but we're playing safe.
2545# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2546#   know they might have memory configurations that could make use of highmem
2547#   support.
2548#
2549config HIGHMEM
2550	bool "High Memory Support"
2551	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2552	select KMAP_LOCAL
2553
2554config CPU_SUPPORTS_HIGHMEM
2555	bool
2556
2557config SYS_SUPPORTS_HIGHMEM
2558	bool
2559
2560config SYS_SUPPORTS_SMARTMIPS
2561	bool
2562
2563config SYS_SUPPORTS_MICROMIPS
2564	bool
 
2565
2566config SYS_SUPPORTS_MIPS16
2567	bool
 
2568	help
2569	  This option must be set if a kernel might be executed on a MIPS16-
2570	  enabled CPU even if MIPS16 is not actually being used.  In other
2571	  words, it makes the kernel MIPS16-tolerant.
2572
2573config CPU_SUPPORTS_MSA
2574	bool
2575
2576config ARCH_FLATMEM_ENABLE
2577	def_bool y
2578	depends on !NUMA && !CPU_LOONGSON2EF
2579
2580config ARCH_SPARSEMEM_ENABLE
2581	bool
 
2582
2583config NUMA
2584	bool "NUMA Support"
2585	depends on SYS_SUPPORTS_NUMA
2586	select SMP
2587	select HAVE_SETUP_PER_CPU_AREA
2588	select NEED_PER_CPU_EMBED_FIRST_CHUNK
2589	help
2590	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2591	  Access).  This option improves performance on systems with more
2592	  than two nodes; on two node systems it is generally better to
2593	  leave it disabled; on single node systems leave this option
2594	  disabled.
2595
2596config SYS_SUPPORTS_NUMA
2597	bool
2598
2599config HAVE_ARCH_NODEDATA_EXTENSION
2600	bool
2601
2602config RELOCATABLE
2603	bool "Relocatable kernel"
2604	depends on SYS_SUPPORTS_RELOCATABLE
2605	depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2606		   CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2607		   CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2608		   CPU_P5600 || CAVIUM_OCTEON_SOC || \
2609		   CPU_LOONGSON64
2610	help
2611	  This builds a kernel image that retains relocation information
2612	  so it can be loaded someplace besides the default 1MB.
2613	  The relocations make the kernel binary about 15% larger,
2614	  but are discarded at runtime
2615
2616config RELOCATION_TABLE_SIZE
2617	hex "Relocation table size"
2618	depends on RELOCATABLE
2619	range 0x0 0x01000000
2620	default "0x00200000" if CPU_LOONGSON64
2621	default "0x00100000"
2622	help
2623	  A table of relocation data will be appended to the kernel binary
2624	  and parsed at boot to fix up the relocated kernel.
2625
2626	  This option allows the amount of space reserved for the table to be
2627	  adjusted, although the default of 1Mb should be ok in most cases.
2628
2629	  The build will fail and a valid size suggested if this is too small.
2630
2631	  If unsure, leave at the default value.
2632
2633config RANDOMIZE_BASE
2634	bool "Randomize the address of the kernel image"
2635	depends on RELOCATABLE
2636	help
2637	  Randomizes the physical and virtual address at which the
2638	  kernel image is loaded, as a security feature that
2639	  deters exploit attempts relying on knowledge of the location
2640	  of kernel internals.
2641
2642	  Entropy is generated using any coprocessor 0 registers available.
2643
2644	  The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2645
2646	  If unsure, say N.
2647
2648config RANDOMIZE_BASE_MAX_OFFSET
2649	hex "Maximum kASLR offset" if EXPERT
2650	depends on RANDOMIZE_BASE
2651	range 0x0 0x40000000 if EVA || 64BIT
2652	range 0x0 0x08000000
2653	default "0x01000000"
2654	help
2655	  When kASLR is active, this provides the maximum offset that will
2656	  be applied to the kernel image. It should be set according to the
2657	  amount of physical RAM available in the target system minus
2658	  PHYSICAL_START and must be a power of 2.
2659
2660	  This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2661	  EVA or 64-bit. The default is 16Mb.
2662
2663config NODES_SHIFT
2664	int
2665	default "6"
2666	depends on NUMA
2667
2668config HW_PERF_EVENTS
2669	bool "Enable hardware performance counter support for perf events"
2670	depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2671	default y
2672	help
2673	  Enable hardware performance counter support for perf events. If
2674	  disabled, perf events will use software events only.
2675
2676config DMI
2677	bool "Enable DMI scanning"
2678	depends on MACH_LOONGSON64
2679	select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2680	default y
2681	help
2682	  Enabled scanning of DMI to identify machine quirks. Say Y
2683	  here unless you have verified that your setup is not
2684	  affected by entries in the DMI blacklist. Required by PNP
2685	  BIOS code.
2686
2687config SMP
2688	bool "Multi-Processing support"
2689	depends on SYS_SUPPORTS_SMP
 
 
2690	help
2691	  This enables support for systems with more than one CPU. If you have
2692	  a system with only one CPU, say N. If you have a system with more
2693	  than one CPU, say Y.
2694
2695	  If you say N here, the kernel will run on uni- and multiprocessor
2696	  machines, but will use only one CPU of a multiprocessor machine. If
2697	  you say Y here, the kernel will run on many, but not all,
2698	  uniprocessor machines. On a uniprocessor machine, the kernel
2699	  will run faster if you say N here.
2700
2701	  People using multiprocessor machines who say Y here should also say
2702	  Y to "Enhanced Real Time Clock Support", below.
2703
2704	  See also the SMP-HOWTO available at
2705	  <https://www.tldp.org/docs.html#howto>.
2706
2707	  If you don't know what to do here, say N.
2708
2709config HOTPLUG_CPU
2710	bool "Support for hot-pluggable CPUs"
2711	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2712	help
2713	  Say Y here to allow turning CPUs off and on. CPUs can be
2714	  controlled through /sys/devices/system/cpu.
2715	  (Note: power management support will enable this option
2716	    automatically on SMP systems. )
2717	  Say N if you want to disable CPU hotplug.
2718
2719config SMP_UP
2720	bool
2721
2722config SYS_SUPPORTS_MIPS_CPS
2723	bool
2724
2725config SYS_SUPPORTS_SMP
2726	bool
2727
 
 
 
 
 
 
2728config NR_CPUS_DEFAULT_4
2729	bool
2730
2731config NR_CPUS_DEFAULT_8
2732	bool
2733
2734config NR_CPUS_DEFAULT_16
2735	bool
2736
2737config NR_CPUS_DEFAULT_32
2738	bool
2739
2740config NR_CPUS_DEFAULT_64
2741	bool
2742
2743config NR_CPUS
2744	int "Maximum number of CPUs (2-256)"
2745	range 2 256
2746	depends on SMP
 
 
2747	default "4" if NR_CPUS_DEFAULT_4
2748	default "8" if NR_CPUS_DEFAULT_8
2749	default "16" if NR_CPUS_DEFAULT_16
2750	default "32" if NR_CPUS_DEFAULT_32
2751	default "64" if NR_CPUS_DEFAULT_64
2752	help
2753	  This allows you to specify the maximum number of CPUs which this
2754	  kernel will support.  The maximum supported value is 32 for 32-bit
2755	  kernel and 64 for 64-bit kernels; the minimum value which makes
2756	  sense is 1 for Qemu (useful only for kernel debugging purposes)
2757	  and 2 for all others.
2758
2759	  This is purely to save memory - each supported CPU adds
2760	  approximately eight kilobytes to the kernel image.  For best
2761	  performance should round up your number of processors to the next
2762	  power of two.
2763
2764config MIPS_PERF_SHARED_TC_COUNTERS
2765	bool
2766
2767config MIPS_NR_CPU_NR_MAP_1024
2768	bool
2769
2770config MIPS_NR_CPU_NR_MAP
2771	int
2772	depends on SMP
2773	default 1024 if MIPS_NR_CPU_NR_MAP_1024
2774	default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2775
2776#
2777# Timer Interrupt Frequency Configuration
2778#
2779
2780choice
2781	prompt "Timer frequency"
2782	default HZ_250
2783	help
2784	  Allows the configuration of the timer frequency.
2785
2786	config HZ_24
2787		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2788
2789	config HZ_48
2790		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2791
2792	config HZ_100
2793		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2794
2795	config HZ_128
2796		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2797
2798	config HZ_250
2799		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2800
2801	config HZ_256
2802		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2803
2804	config HZ_1000
2805		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2806
2807	config HZ_1024
2808		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2809
2810endchoice
2811
2812config SYS_SUPPORTS_24HZ
2813	bool
2814
2815config SYS_SUPPORTS_48HZ
2816	bool
2817
2818config SYS_SUPPORTS_100HZ
2819	bool
2820
2821config SYS_SUPPORTS_128HZ
2822	bool
2823
2824config SYS_SUPPORTS_250HZ
2825	bool
2826
2827config SYS_SUPPORTS_256HZ
2828	bool
2829
2830config SYS_SUPPORTS_1000HZ
2831	bool
2832
2833config SYS_SUPPORTS_1024HZ
2834	bool
2835
2836config SYS_SUPPORTS_ARBIT_HZ
2837	bool
2838	default y if !SYS_SUPPORTS_24HZ && \
2839		     !SYS_SUPPORTS_48HZ && \
2840		     !SYS_SUPPORTS_100HZ && \
2841		     !SYS_SUPPORTS_128HZ && \
2842		     !SYS_SUPPORTS_250HZ && \
2843		     !SYS_SUPPORTS_256HZ && \
2844		     !SYS_SUPPORTS_1000HZ && \
2845		     !SYS_SUPPORTS_1024HZ
2846
2847config HZ
2848	int
2849	default 24 if HZ_24
2850	default 48 if HZ_48
2851	default 100 if HZ_100
2852	default 128 if HZ_128
2853	default 250 if HZ_250
2854	default 256 if HZ_256
2855	default 1000 if HZ_1000
2856	default 1024 if HZ_1024
2857
2858config SCHED_HRTICK
2859	def_bool HIGH_RES_TIMERS
2860
2861config ARCH_SUPPORTS_KEXEC
2862	def_bool y
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2863
2864config ARCH_SUPPORTS_CRASH_DUMP
2865	def_bool y
2866
2867config PHYSICAL_START
2868	hex "Physical address where the kernel is loaded"
2869	default "0xffffffff84000000"
2870	depends on CRASH_DUMP
2871	help
2872	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2873	  If you plan to use kernel for capturing the crash dump change
2874	  this value to start of the reserved region (the "X" value as
2875	  specified in the "crashkernel=YM@XM" command line boot parameter
2876	  passed to the panic-ed kernel).
2877
2878config MIPS_O32_FP64_SUPPORT
2879	bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2880	depends on 32BIT || MIPS32_O32
2881	help
2882	  When this is enabled, the kernel will support use of 64-bit floating
2883	  point registers with binaries using the O32 ABI along with the
2884	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2885	  32-bit MIPS systems this support is at the cost of increasing the
2886	  size and complexity of the compiled FPU emulator. Thus if you are
2887	  running a MIPS32 system and know that none of your userland binaries
2888	  will require 64-bit floating point, you may wish to reduce the size
2889	  of your kernel & potentially improve FP emulation performance by
2890	  saying N here.
2891
2892	  Although binutils currently supports use of this flag the details
2893	  concerning its effect upon the O32 ABI in userland are still being
2894	  worked on. In order to avoid userland becoming dependent upon current
2895	  behaviour before the details have been finalised, this option should
2896	  be considered experimental and only enabled by those working upon
2897	  said details.
2898
2899	  If unsure, say N.
2900
2901config USE_OF
2902	bool
2903	select OF
2904	select OF_EARLY_FLATTREE
2905	select IRQ_DOMAIN
2906
2907config UHI_BOOT
2908	bool
2909
2910config BUILTIN_DTB
2911	bool
2912
2913choice
2914	prompt "Kernel appended dtb support" if USE_OF
2915	default MIPS_NO_APPENDED_DTB
2916
2917	config MIPS_NO_APPENDED_DTB
2918		bool "None"
2919		help
2920		  Do not enable appended dtb support.
2921
2922	config MIPS_ELF_APPENDED_DTB
2923		bool "vmlinux"
2924		help
2925		  With this option, the boot code will look for a device tree binary
2926		  DTB) included in the vmlinux ELF section .appended_dtb. By default
2927		  it is empty and the DTB can be appended using binutils command
2928		  objcopy:
2929
2930		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2931
2932		  This is meant as a backward compatibility convenience for those
2933		  systems with a bootloader that can't be upgraded to accommodate
2934		  the documented boot protocol using a device tree.
2935
2936	config MIPS_RAW_APPENDED_DTB
2937		bool "vmlinux.bin or vmlinuz.bin"
2938		help
2939		  With this option, the boot code will look for a device tree binary
2940		  DTB) appended to raw vmlinux.bin or vmlinuz.bin.
2941		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
2942
2943		  This is meant as a backward compatibility convenience for those
2944		  systems with a bootloader that can't be upgraded to accommodate
2945		  the documented boot protocol using a device tree.
2946
2947		  Beware that there is very little in terms of protection against
2948		  this option being confused by leftover garbage in memory that might
2949		  look like a DTB header after a reboot if no actual DTB is appended
2950		  to vmlinux.bin.  Do not leave this option active in a production kernel
2951		  if you don't intend to always append a DTB.
2952endchoice
2953
2954choice
2955	prompt "Kernel command line type" if !CMDLINE_OVERRIDE
2956	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
2957					 !MACH_LOONGSON64 && !MIPS_MALTA && \
2958					 !CAVIUM_OCTEON_SOC
2959	default MIPS_CMDLINE_FROM_BOOTLOADER
2960
2961	config MIPS_CMDLINE_FROM_DTB
2962		depends on USE_OF
2963		bool "Dtb kernel arguments if available"
2964
2965	config MIPS_CMDLINE_DTB_EXTEND
2966		depends on USE_OF
2967		bool "Extend dtb kernel arguments with bootloader arguments"
2968
2969	config MIPS_CMDLINE_FROM_BOOTLOADER
2970		bool "Bootloader kernel arguments if available"
2971
2972	config MIPS_CMDLINE_BUILTIN_EXTEND
2973		depends on CMDLINE_BOOL
2974		bool "Extend builtin kernel arguments with bootloader arguments"
2975endchoice
2976
2977endmenu
2978
2979config LOCKDEP_SUPPORT
2980	bool
2981	default y
2982
2983config STACKTRACE_SUPPORT
2984	bool
2985	default y
2986
2987config PGTABLE_LEVELS
2988	int
2989	default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
2990	default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
2991	default 2
2992
2993config MIPS_AUTO_PFN_OFFSET
 
 
2994	bool
2995
2996menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
 
 
 
 
 
 
 
 
2997
2998config PCI_DRIVERS_GENERIC
2999	select PCI_DOMAINS_GENERIC if PCI
3000	bool
3001
3002config PCI_DRIVERS_LEGACY
3003	def_bool !PCI_DRIVERS_GENERIC
3004	select NO_GENERIC_PCI_IOPORT_MAP
3005	select PCI_DOMAINS if PCI
3006
3007#
3008# ISA support is now enabled via select.  Too many systems still have the one
3009# or other ISA chip on the board that users don't know about so don't expect
3010# users to choose the right thing ...
3011#
3012config ISA
3013	bool
3014
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
3015config TC
3016	bool "TURBOchannel support"
3017	depends on MACH_DECSTATION
3018	help
3019	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3020	  processors.  TURBOchannel programming specifications are available
3021	  at:
3022	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3023	  and:
3024	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3025	  Linux driver support status is documented at:
3026	  <http://www.linux-mips.org/wiki/DECstation>
3027
 
 
 
 
3028config MMU
3029	bool
3030	default y
3031
3032config ARCH_MMAP_RND_BITS_MIN
3033	default 12 if 64BIT
3034	default 8
3035
3036config ARCH_MMAP_RND_BITS_MAX
3037	default 18 if 64BIT
3038	default 15
3039
3040config ARCH_MMAP_RND_COMPAT_BITS_MIN
3041	default 8
3042
3043config ARCH_MMAP_RND_COMPAT_BITS_MAX
3044	default 15
3045
3046config I8253
3047	bool
3048	select CLKSRC_I8253
3049	select CLKEVT_I8253
3050	select MIPS_EXTERNAL_TIMER
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
3051endmenu
3052
 
 
 
 
3053config TRAD_SIGNALS
3054	bool
3055
3056config MIPS32_COMPAT
 
 
 
 
 
 
 
 
3057	bool
 
 
3058
3059config COMPAT
3060	bool
 
 
3061
3062config MIPS32_O32
3063	bool "Kernel support for o32 binaries"
3064	depends on 64BIT
3065	select ARCH_WANT_OLD_COMPAT_IPC
3066	select COMPAT
3067	select MIPS32_COMPAT
3068	help
3069	  Select this option if you want to run o32 binaries.  These are pure
3070	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
3071	  existing binaries are in this format.
3072
3073	  If unsure, say Y.
3074
3075config MIPS32_N32
3076	bool "Kernel support for n32 binaries"
3077	depends on 64BIT
3078	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3079	select COMPAT
3080	select MIPS32_COMPAT
3081	help
3082	  Select this option if you want to run n32 binaries.  These are
3083	  64-bit binaries using 32-bit quantities for addressing and certain
3084	  data that would normally be 64-bit.  They are used in special
3085	  cases.
3086
3087	  If unsure, say N.
3088
3089config CC_HAS_MNO_BRANCH_LIKELY
3090	def_bool y
3091	depends on $(cc-option,-mno-branch-likely)
3092
3093# https://github.com/llvm/llvm-project/issues/61045
3094config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
3095	def_bool y if CC_IS_CLANG
3096
3097menu "Power management options"
3098
3099config ARCH_HIBERNATION_POSSIBLE
3100	def_bool y
3101	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3102
3103config ARCH_SUSPEND_POSSIBLE
3104	def_bool y
3105	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3106
3107source "kernel/power/Kconfig"
3108
3109endmenu
3110
3111config MIPS_EXTERNAL_TIMER
3112	bool
 
3113
3114menu "CPU Power Management"
3115
3116if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3117source "drivers/cpufreq/Kconfig"
3118endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3119
3120source "drivers/cpuidle/Kconfig"
3121
3122endmenu
3123
3124source "arch/mips/kvm/Kconfig"
3125
3126source "arch/mips/vdso/Kconfig"