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v3.1
 
   1config MIPS
   2	bool
   3	default y
   4	select HAVE_GENERIC_DMA_COHERENT
   5	select HAVE_IDE
   6	select HAVE_OPROFILE
   7	select HAVE_IRQ_WORK
   8	select HAVE_PERF_EVENTS
   9	select PERF_USE_VMALLOC
  10	select HAVE_ARCH_KGDB
  11	select HAVE_FUNCTION_TRACER
  12	select HAVE_FUNCTION_TRACE_MCOUNT_TEST
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  13	select HAVE_DYNAMIC_FTRACE
 
 
 
  14	select HAVE_FTRACE_MCOUNT_RECORD
  15	select HAVE_C_RECORDMCOUNT
  16	select HAVE_FUNCTION_GRAPH_TRACER
 
 
 
 
 
 
  17	select HAVE_KPROBES
  18	select HAVE_KRETPROBES
  19	select RTC_LIB if !MACH_LOONGSON
  20	select GENERIC_ATOMIC64 if !64BIT
  21	select HAVE_DMA_ATTRS
  22	select HAVE_DMA_API_DEBUG
  23	select HAVE_GENERIC_HARDIRQS
  24	select GENERIC_IRQ_PROBE
  25	select GENERIC_IRQ_SHOW
  26	select HAVE_ARCH_JUMP_LABEL
 
 
 
 
 
 
 
  27	select IRQ_FORCED_THREADING
 
 
 
 
 
 
 
 
 
 
 
  28
  29menu "Machine selection"
 
 
 
 
 
 
 
  30
  31config ZONE_DMA
  32	bool
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  33
  34choice
  35	prompt "System type"
  36	default SGI_IP22
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  37
  38config MIPS_ALCHEMY
  39	bool "Alchemy processor based machines"
  40	select 64BIT_PHYS_ADDR
  41	select CEVT_R4K_LIB
  42	select CSRC_R4K_LIB
  43	select IRQ_CPU
 
 
  44	select SYS_HAS_CPU_MIPS32_R1
  45	select SYS_SUPPORTS_32BIT_KERNEL
  46	select SYS_SUPPORTS_APM_EMULATION
  47	select GENERIC_GPIO
  48	select ARCH_WANT_OPTIONAL_GPIOLIB
  49	select SYS_SUPPORTS_ZBOOT
 
  50
  51config AR7
  52	bool "Texas Instruments AR7"
  53	select BOOT_ELF32
  54	select DMA_NONCOHERENT
  55	select CEVT_R4K
  56	select CSRC_R4K
  57	select IRQ_CPU
  58	select NO_EXCEPT_FILL
  59	select SWAP_IO_SPACE
  60	select SYS_HAS_CPU_MIPS32_R1
  61	select SYS_HAS_EARLY_PRINTK
  62	select SYS_SUPPORTS_32BIT_KERNEL
  63	select SYS_SUPPORTS_LITTLE_ENDIAN
  64	select SYS_SUPPORTS_ZBOOT_UART16550
  65	select ARCH_REQUIRE_GPIOLIB
  66	select GCD
  67	select VLYNQ
  68	help
  69	  Support for the Texas Instruments AR7 System-on-a-Chip
  70	  family: TNETD7100, 7200 and 7300.
  71
  72config ATH79
  73	bool "Atheros AR71XX/AR724X/AR913X based boards"
  74	select ARCH_REQUIRE_GPIOLIB
  75	select BOOT_RAW
  76	select CEVT_R4K
  77	select CSRC_R4K
  78	select DMA_NONCOHERENT
  79	select IRQ_CPU
  80	select MIPS_MACHINE
 
 
  81	select SYS_HAS_CPU_MIPS32_R2
  82	select SYS_HAS_EARLY_PRINTK
  83	select SYS_SUPPORTS_32BIT_KERNEL
  84	select SYS_SUPPORTS_BIG_ENDIAN
 
 
 
 
  85	help
  86	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
  87
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  88config BCM47XX
  89	bool "Broadcom BCM47XX based boards"
 
  90	select CEVT_R4K
  91	select CSRC_R4K
  92	select DMA_NONCOHERENT
  93	select HW_HAS_PCI
  94	select IRQ_CPU
  95	select SYS_HAS_CPU_MIPS32_R1
 
  96	select SYS_SUPPORTS_32BIT_KERNEL
  97	select SYS_SUPPORTS_LITTLE_ENDIAN
  98	select SSB
  99	select SSB_DRIVER_MIPS
 100	select SSB_DRIVER_EXTIF
 101	select SSB_EMBEDDED
 102	select SSB_B43_PCI_BRIDGE if PCI
 103	select SSB_PCICORE_HOSTMODE if PCI
 104	select GENERIC_GPIO
 105	select SYS_HAS_EARLY_PRINTK
 106	select CFE
 
 
 
 
 
 107	help
 108	 Support for BCM47XX based boards
 109
 110config BCM63XX
 111	bool "Broadcom BCM63XX based boards"
 
 112	select CEVT_R4K
 113	select CSRC_R4K
 
 114	select DMA_NONCOHERENT
 115	select IRQ_CPU
 116	select SYS_HAS_CPU_MIPS32_R1
 117	select SYS_SUPPORTS_32BIT_KERNEL
 118	select SYS_SUPPORTS_BIG_ENDIAN
 119	select SYS_HAS_EARLY_PRINTK
 120	select SWAP_IO_SPACE
 121	select ARCH_REQUIRE_GPIOLIB
 
 
 
 
 
 122	help
 123	 Support for BCM63XX based boards
 124
 125config MIPS_COBALT
 126	bool "Cobalt Server"
 127	select CEVT_R4K
 128	select CSRC_R4K
 129	select CEVT_GT641XX
 130	select DMA_NONCOHERENT
 131	select HW_HAS_PCI
 132	select I8253
 133	select I8259
 134	select IRQ_CPU
 135	select IRQ_GT641XX
 136	select PCI_GT64XXX_PCI0
 137	select PCI
 138	select SYS_HAS_CPU_NEVADA
 139	select SYS_HAS_EARLY_PRINTK
 140	select SYS_SUPPORTS_32BIT_KERNEL
 141	select SYS_SUPPORTS_64BIT_KERNEL
 142	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 143
 144config MACH_DECSTATION
 145	bool "DECstations"
 146	select BOOT_ELF32
 147	select CEVT_DS1287
 148	select CEVT_R4K
 149	select CSRC_IOASIC
 150	select CSRC_R4K
 151	select CPU_DADDI_WORKAROUNDS if 64BIT
 152	select CPU_R4000_WORKAROUNDS if 64BIT
 153	select CPU_R4400_WORKAROUNDS if 64BIT
 154	select DMA_NONCOHERENT
 155	select NO_IOPORT
 156	select IRQ_CPU
 157	select SYS_HAS_CPU_R3000
 158	select SYS_HAS_CPU_R4X00
 159	select SYS_SUPPORTS_32BIT_KERNEL
 160	select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
 161	select SYS_SUPPORTS_LITTLE_ENDIAN
 162	select SYS_SUPPORTS_128HZ
 163	select SYS_SUPPORTS_256HZ
 164	select SYS_SUPPORTS_1024HZ
 
 165	help
 166	  This enables support for DEC's MIPS based workstations.  For details
 167	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
 168	  DECstation porting pages on <http://decstation.unix-ag.org/>.
 169
 170	  If you have one of the following DECstation Models you definitely
 171	  want to choose R4xx0 for the CPU Type:
 172
 173		DECstation 5000/50
 174		DECstation 5000/150
 175		DECstation 5000/260
 176		DECsystem 5900/260
 177
 178	  otherwise choose R3000.
 179
 180config MACH_JAZZ
 181	bool "Jazz family of machines"
 182	select ARC
 183	select ARC32
 
 
 
 
 184	select ARCH_MAY_HAVE_PC_FDC
 185	select CEVT_R4K
 186	select CSRC_R4K
 187	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
 188	select GENERIC_ISA_DMA
 189	select HAVE_PCSPKR_PLATFORM
 190	select IRQ_CPU
 191	select I8253
 192	select I8259
 193	select ISA
 194	select SYS_HAS_CPU_R4X00
 195	select SYS_SUPPORTS_32BIT_KERNEL
 196	select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
 197	select SYS_SUPPORTS_100HZ
 198	help
 199	 This a family of machines based on the MIPS R4030 chipset which was
 200	 used by several vendors to build RISC/os and Windows NT workstations.
 201	 Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
 202	 Olivetti M700-10 workstations.
 203
 204config MACH_JZ4740
 205	bool "Ingenic JZ4740 based machines"
 206	select SYS_HAS_CPU_MIPS32_R1
 207	select SYS_SUPPORTS_32BIT_KERNEL
 208	select SYS_SUPPORTS_LITTLE_ENDIAN
 209	select DMA_NONCOHERENT
 210	select IRQ_CPU
 211	select GENERIC_GPIO
 212	select ARCH_REQUIRE_GPIOLIB
 213	select SYS_HAS_EARLY_PRINTK
 214	select HAVE_PWM
 215	select HAVE_CLK
 
 
 
 
 
 
 
 216
 217config LANTIQ
 218	bool "Lantiq based platforms"
 219	select DMA_NONCOHERENT
 220	select IRQ_CPU
 221	select CEVT_R4K
 222	select CSRC_R4K
 
 223	select SYS_HAS_CPU_MIPS32_R1
 224	select SYS_HAS_CPU_MIPS32_R2
 225	select SYS_SUPPORTS_BIG_ENDIAN
 226	select SYS_SUPPORTS_32BIT_KERNEL
 
 227	select SYS_SUPPORTS_MULTITHREADING
 
 228	select SYS_HAS_EARLY_PRINTK
 229	select ARCH_REQUIRE_GPIOLIB
 230	select SWAP_IO_SPACE
 231	select BOOT_RAW
 232	select HAVE_CLK
 233	select MIPS_MACHINE
 
 
 
 
 234
 235config LASAT
 236	bool "LASAT Networks platforms"
 237	select CEVT_R4K
 238	select CSRC_R4K
 239	select DMA_NONCOHERENT
 240	select SYS_HAS_EARLY_PRINTK
 241	select HW_HAS_PCI
 242	select IRQ_CPU
 243	select PCI_GT64XXX_PCI0
 244	select MIPS_NILE4
 245	select R5000_CPU_SCACHE
 246	select SYS_HAS_CPU_R5000
 247	select SYS_SUPPORTS_32BIT_KERNEL
 248	select SYS_SUPPORTS_64BIT_KERNEL if BROKEN
 249	select SYS_SUPPORTS_LITTLE_ENDIAN
 250
 251config MACH_LOONGSON
 252	bool "Loongson family of machines"
 
 
 
 
 253	select SYS_SUPPORTS_ZBOOT
 254	help
 255	  This enables the support of Loongson family of machines.
 256
 257	  Loongson is a family of general-purpose MIPS-compatible CPUs.
 258	  developed at Institute of Computing Technology (ICT),
 259	  Chinese Academy of Sciences (CAS) in the People's Republic
 260	  of China. The chief architect is Professor Weiwu Hu.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 261
 262config MIPS_MALTA
 263	bool "MIPS Malta board"
 264	select ARCH_MAY_HAVE_PC_FDC
 
 
 265	select BOOT_ELF32
 266	select BOOT_RAW
 
 267	select CEVT_R4K
 
 
 268	select CSRC_R4K
 269	select DMA_NONCOHERENT
 270	select GENERIC_ISA_DMA
 271	select HAVE_PCSPKR_PLATFORM
 272	select IRQ_CPU
 273	select IRQ_GIC
 274	select HW_HAS_PCI
 275	select I8253
 276	select I8259
 277	select MIPS_BOARDS_GEN
 278	select MIPS_BONITO64
 279	select MIPS_CPU_SCACHE
 280	select PCI_GT64XXX_PCI0
 
 281	select MIPS_MSC
 
 
 282	select SWAP_IO_SPACE
 283	select SYS_HAS_CPU_MIPS32_R1
 284	select SYS_HAS_CPU_MIPS32_R2
 
 
 
 285	select SYS_HAS_CPU_MIPS64_R1
 
 
 286	select SYS_HAS_CPU_NEVADA
 287	select SYS_HAS_CPU_RM7000
 288	select SYS_HAS_EARLY_PRINTK
 289	select SYS_SUPPORTS_32BIT_KERNEL
 290	select SYS_SUPPORTS_64BIT_KERNEL
 291	select SYS_SUPPORTS_BIG_ENDIAN
 
 292	select SYS_SUPPORTS_LITTLE_ENDIAN
 293	select SYS_SUPPORTS_MIPS_CMP
 
 
 294	select SYS_SUPPORTS_MULTITHREADING
 
 295	select SYS_SUPPORTS_SMARTMIPS
 
 296	select SYS_SUPPORTS_ZBOOT
 
 
 
 297	help
 298	  This enables support for the MIPS Technologies Malta evaluation
 299	  board.
 300
 301config MIPS_SIM
 302	bool 'MIPS simulator (MIPSsim)'
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 303	select CEVT_R4K
 
 
 
 
 304	select CSRC_R4K
 305	select DMA_NONCOHERENT
 306	select SYS_HAS_EARLY_PRINTK
 307	select IRQ_CPU
 308	select BOOT_RAW
 309	select SYS_HAS_CPU_MIPS32_R1
 310	select SYS_HAS_CPU_MIPS32_R2
 311	select SYS_HAS_EARLY_PRINTK
 312	select SYS_SUPPORTS_32BIT_KERNEL
 313	select SYS_SUPPORTS_BIG_ENDIAN
 314	select SYS_SUPPORTS_MULTITHREADING
 
 
 
 315	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 
 
 
 
 
 
 
 
 
 
 316	help
 317	  This option enables support for MIPS Technologies MIPSsim software
 318	  emulator.
 319
 320config NEC_MARKEINS
 321	bool "NEC EMMA2RH Mark-eins board"
 322	select SOC_EMMA2RH
 323	select HW_HAS_PCI
 324	help
 325	  This enables support for the NEC Electronics Mark-eins boards.
 326
 327config MACH_VR41XX
 328	bool "NEC VR4100 series based machines"
 329	select CEVT_R4K
 330	select CSRC_R4K
 331	select SYS_HAS_CPU_VR41XX
 332	select ARCH_REQUIRE_GPIOLIB
 333
 334config NXP_STB220
 335	bool "NXP STB220 board"
 336	select SOC_PNX833X
 337	help
 338	 Support for NXP Semiconductors STB220 Development Board.
 339
 340config NXP_STB225
 341	bool "NXP 225 board"
 342	select SOC_PNX833X
 343	select SOC_PNX8335
 344	help
 345	 Support for NXP Semiconductors STB225 Development Board.
 346
 347config PNX8550_JBS
 348	bool "NXP PNX8550 based JBS board"
 349	select PNX8550
 350	select SYS_SUPPORTS_LITTLE_ENDIAN
 351
 352config PNX8550_STB810
 353	bool "NXP PNX8550 based STB810 board"
 354	select PNX8550
 355	select SYS_SUPPORTS_LITTLE_ENDIAN
 356
 357config PMC_MSP
 358	bool "PMC-Sierra MSP chipsets"
 359	depends on EXPERIMENTAL
 360	select CEVT_R4K
 
 361	select CSRC_R4K
 362	select DMA_NONCOHERENT
 363	select SWAP_IO_SPACE
 364	select NO_EXCEPT_FILL
 365	select BOOT_RAW
 366	select SYS_HAS_CPU_MIPS32_R1
 
 
 367	select SYS_HAS_CPU_MIPS32_R2
 368	select SYS_SUPPORTS_32BIT_KERNEL
 369	select SYS_SUPPORTS_BIG_ENDIAN
 370	select IRQ_CPU
 371	select SERIAL_8250
 372	select SERIAL_8250_CONSOLE
 373	help
 374	  This adds support for the PMC-Sierra family of Multi-Service
 375	  Processor System-On-A-Chips.  These parts include a number
 376	  of integrated peripherals, interfaces and DSPs in addition to
 377	  a variety of MIPS cores.
 378
 379config PMC_YOSEMITE
 380	bool "PMC-Sierra Yosemite eval board"
 381	select CEVT_R4K
 382	select CSRC_R4K
 383	select DMA_COHERENT
 384	select HW_HAS_PCI
 385	select IRQ_CPU
 386	select IRQ_CPU_RM7K
 387	select IRQ_CPU_RM9K
 388	select SWAP_IO_SPACE
 389	select SYS_HAS_CPU_RM9000
 390	select SYS_HAS_EARLY_PRINTK
 391	select SYS_SUPPORTS_32BIT_KERNEL
 392	select SYS_SUPPORTS_64BIT_KERNEL
 393	select SYS_SUPPORTS_BIG_ENDIAN
 394	select SYS_SUPPORTS_HIGHMEM
 395	select SYS_SUPPORTS_SMP
 396	help
 397	  Yosemite is an evaluation board for the RM9000x2 processor
 398	  manufactured by PMC-Sierra.
 399
 400config POWERTV
 401	bool "Cisco PowerTV"
 402	select BOOT_ELF32
 403	select CEVT_R4K
 404	select CPU_MIPSR2_IRQ_VI
 405	select CPU_MIPSR2_IRQ_EI
 406	select CSRC_POWERTV
 407	select DMA_NONCOHERENT
 408	select HW_HAS_PCI
 409	select SYS_HAS_EARLY_PRINTK
 
 
 410	select SYS_HAS_CPU_MIPS32_R2
 411	select SYS_SUPPORTS_32BIT_KERNEL
 412	select SYS_SUPPORTS_BIG_ENDIAN
 413	select SYS_SUPPORTS_HIGHMEM
 414	select USB_OHCI_LITTLE_ENDIAN
 415	help
 416	  This enables support for the Cisco PowerTV Platform.
 
 
 
 
 417
 418config SGI_IP22
 419	bool "SGI IP22 (Indy/Indigo2)"
 420	select ARC
 421	select ARC32
 
 
 
 422	select BOOT_ELF32
 423	select CEVT_R4K
 424	select CSRC_R4K
 425	select DEFAULT_SGI_PARTITION
 426	select DMA_NONCOHERENT
 427	select HW_HAS_EISA
 428	select I8253
 429	select I8259
 430	select IP22_CPU_SCACHE
 431	select IRQ_CPU
 432	select GENERIC_ISA_DMA_SUPPORT_BROKEN
 433	select SGI_HAS_I8042
 434	select SGI_HAS_INDYDOG
 435	select SGI_HAS_HAL2
 436	select SGI_HAS_SEEQ
 437	select SGI_HAS_WD93
 438	select SGI_HAS_ZILOG
 439	select SWAP_IO_SPACE
 440	select SYS_HAS_CPU_R4X00
 441	select SYS_HAS_CPU_R5000
 442	#
 443	# Disable EARLY_PRINTK for now since it leads to overwritten prom
 444	# memory during early boot on some machines.
 445	#
 446	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
 447	# for a more details discussion
 448	#
 449	# select SYS_HAS_EARLY_PRINTK
 450	select SYS_SUPPORTS_32BIT_KERNEL
 451	select SYS_SUPPORTS_64BIT_KERNEL
 452	select SYS_SUPPORTS_BIG_ENDIAN
 
 
 
 
 453	help
 454	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
 455	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
 456	  that runs on these, say Y here.
 457
 458config SGI_IP27
 459	bool "SGI IP27 (Origin200/2000)"
 460	select ARC
 461	select ARC64
 
 
 
 462	select BOOT_ELF64
 463	select DEFAULT_SGI_PARTITION
 464	select DMA_COHERENT
 465	select SYS_HAS_EARLY_PRINTK
 466	select HW_HAS_PCI
 
 
 467	select NR_CPUS_DEFAULT_64
 
 
 468	select SYS_HAS_CPU_R10000
 469	select SYS_SUPPORTS_64BIT_KERNEL
 470	select SYS_SUPPORTS_BIG_ENDIAN
 471	select SYS_SUPPORTS_NUMA
 472	select SYS_SUPPORTS_SMP
 
 
 
 473	help
 474	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
 475	  workstations.  To compile a Linux kernel that runs on these, say Y
 476	  here.
 477
 478config SGI_IP28
 479	bool "SGI IP28 (Indigo2 R10k) (EXPERIMENTAL)"
 480	depends on EXPERIMENTAL
 481	select ARC
 482	select ARC64
 
 
 483	select BOOT_ELF64
 484	select CEVT_R4K
 485	select CSRC_R4K
 486	select DEFAULT_SGI_PARTITION
 487	select DMA_NONCOHERENT
 488	select GENERIC_ISA_DMA_SUPPORT_BROKEN
 489	select IRQ_CPU
 490	select HW_HAS_EISA
 491	select I8253
 492	select I8259
 493	select SGI_HAS_I8042
 494	select SGI_HAS_INDYDOG
 495	select SGI_HAS_HAL2
 496	select SGI_HAS_SEEQ
 497	select SGI_HAS_WD93
 498	select SGI_HAS_ZILOG
 499	select SWAP_IO_SPACE
 500	select SYS_HAS_CPU_R10000
 501	#
 502	# Disable EARLY_PRINTK for now since it leads to overwritten prom
 503	# memory during early boot on some machines.
 504	#
 505	# See http://www.linux-mips.org/cgi-bin/mesg.cgi?a=linux-mips&i=20091119164009.GA15038%40deprecation.cyrius.com
 506	# for a more details discussion
 507	#
 508	# select SYS_HAS_EARLY_PRINTK
 509	select SYS_SUPPORTS_64BIT_KERNEL
 510	select SYS_SUPPORTS_BIG_ENDIAN
 511      help
 512        This is the SGI Indigo2 with R10000 processor.  To compile a Linux
 513        kernel that runs on these, say Y here.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 514
 515config SGI_IP32
 516	bool "SGI IP32 (O2)"
 517	select ARC
 518	select ARC32
 
 
 
 519	select BOOT_ELF32
 520	select CEVT_R4K
 521	select CSRC_R4K
 522	select DMA_NONCOHERENT
 523	select HW_HAS_PCI
 524	select IRQ_CPU
 525	select R5000_CPU_SCACHE
 526	select RM7000_CPU_SCACHE
 527	select SYS_HAS_CPU_R5000
 528	select SYS_HAS_CPU_R10000 if BROKEN
 529	select SYS_HAS_CPU_RM7000
 530	select SYS_HAS_CPU_NEVADA
 531	select SYS_SUPPORTS_64BIT_KERNEL
 532	select SYS_SUPPORTS_BIG_ENDIAN
 
 533	help
 534	  If you want this kernel to run on SGI O2 workstation, say Y here.
 535
 536config SIBYTE_CRHINE
 537	bool "Sibyte BCM91120C-CRhine"
 538	depends on EXPERIMENTAL
 539	select BOOT_ELF32
 540	select DMA_COHERENT
 541	select SIBYTE_BCM1120
 542	select SWAP_IO_SPACE
 543	select SYS_HAS_CPU_SB1
 544	select SYS_SUPPORTS_BIG_ENDIAN
 545	select SYS_SUPPORTS_LITTLE_ENDIAN
 546
 547config SIBYTE_CARMEL
 548	bool "Sibyte BCM91120x-Carmel"
 549	depends on EXPERIMENTAL
 550	select BOOT_ELF32
 551	select DMA_COHERENT
 552	select SIBYTE_BCM1120
 553	select SWAP_IO_SPACE
 554	select SYS_HAS_CPU_SB1
 555	select SYS_SUPPORTS_BIG_ENDIAN
 556	select SYS_SUPPORTS_LITTLE_ENDIAN
 557
 558config SIBYTE_CRHONE
 559	bool "Sibyte BCM91125C-CRhone"
 560	depends on EXPERIMENTAL
 561	select BOOT_ELF32
 562	select DMA_COHERENT
 563	select SIBYTE_BCM1125
 564	select SWAP_IO_SPACE
 565	select SYS_HAS_CPU_SB1
 566	select SYS_SUPPORTS_BIG_ENDIAN
 567	select SYS_SUPPORTS_HIGHMEM
 568	select SYS_SUPPORTS_LITTLE_ENDIAN
 569
 570config SIBYTE_RHONE
 571	bool "Sibyte BCM91125E-Rhone"
 572	depends on EXPERIMENTAL
 573	select BOOT_ELF32
 574	select DMA_COHERENT
 575	select SIBYTE_BCM1125H
 576	select SWAP_IO_SPACE
 577	select SYS_HAS_CPU_SB1
 578	select SYS_SUPPORTS_BIG_ENDIAN
 579	select SYS_SUPPORTS_LITTLE_ENDIAN
 580
 581config SIBYTE_SWARM
 582	bool "Sibyte BCM91250A-SWARM"
 583	select BOOT_ELF32
 584	select DMA_COHERENT
 585	select HAVE_PATA_PLATFORM
 586	select NR_CPUS_DEFAULT_2
 587	select SIBYTE_SB1250
 588	select SWAP_IO_SPACE
 589	select SYS_HAS_CPU_SB1
 590	select SYS_SUPPORTS_BIG_ENDIAN
 591	select SYS_SUPPORTS_HIGHMEM
 592	select SYS_SUPPORTS_LITTLE_ENDIAN
 593	select ZONE_DMA32 if 64BIT
 
 594
 595config SIBYTE_LITTLESUR
 596	bool "Sibyte BCM91250C2-LittleSur"
 597	depends on EXPERIMENTAL
 598	select BOOT_ELF32
 599	select DMA_COHERENT
 600	select HAVE_PATA_PLATFORM
 601	select NR_CPUS_DEFAULT_2
 602	select SIBYTE_SB1250
 603	select SWAP_IO_SPACE
 604	select SYS_HAS_CPU_SB1
 605	select SYS_SUPPORTS_BIG_ENDIAN
 606	select SYS_SUPPORTS_HIGHMEM
 607	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 608
 609config SIBYTE_SENTOSA
 610	bool "Sibyte BCM91250E-Sentosa"
 611	depends on EXPERIMENTAL
 612	select BOOT_ELF32
 613	select DMA_COHERENT
 614	select NR_CPUS_DEFAULT_2
 615	select SIBYTE_SB1250
 616	select SWAP_IO_SPACE
 617	select SYS_HAS_CPU_SB1
 618	select SYS_SUPPORTS_BIG_ENDIAN
 619	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 620
 621config SIBYTE_BIGSUR
 622	bool "Sibyte BCM91480B-BigSur"
 623	select BOOT_ELF32
 624	select DMA_COHERENT
 625	select NR_CPUS_DEFAULT_4
 626	select SIBYTE_BCM1x80
 627	select SWAP_IO_SPACE
 628	select SYS_HAS_CPU_SB1
 629	select SYS_SUPPORTS_BIG_ENDIAN
 630	select SYS_SUPPORTS_HIGHMEM
 631	select SYS_SUPPORTS_LITTLE_ENDIAN
 632	select ZONE_DMA32 if 64BIT
 
 633
 634config SNI_RM
 635	bool "SNI RM200/300/400"
 636	select ARC if CPU_LITTLE_ENDIAN
 637	select ARC32 if CPU_LITTLE_ENDIAN
 638	select SNIPROM if CPU_BIG_ENDIAN
 
 
 639	select ARCH_MAY_HAVE_PC_FDC
 
 
 640	select BOOT_ELF32
 641	select CEVT_R4K
 642	select CSRC_R4K
 643	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
 644	select DMA_NONCOHERENT
 645	select GENERIC_ISA_DMA
 
 646	select HAVE_PCSPKR_PLATFORM
 647	select HW_HAS_EISA
 648	select HW_HAS_PCI
 649	select IRQ_CPU
 650	select I8253
 651	select I8259
 652	select ISA
 
 653	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
 654	select SYS_HAS_CPU_R4X00
 655	select SYS_HAS_CPU_R5000
 656	select SYS_HAS_CPU_R10000
 657	select R5000_CPU_SCACHE
 658	select SYS_HAS_EARLY_PRINTK
 659	select SYS_SUPPORTS_32BIT_KERNEL
 660	select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
 661	select SYS_SUPPORTS_BIG_ENDIAN
 662	select SYS_SUPPORTS_HIGHMEM
 663	select SYS_SUPPORTS_LITTLE_ENDIAN
 
 664	help
 665	  The SNI RM200/300/400 are MIPS-based machines manufactured by
 666	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
 667	  Technology and now in turn merged with Fujitsu.  Say Y here to
 668	  support this machine type.
 669
 670config MACH_TX39XX
 671	bool "Toshiba TX39 series based machines"
 672
 673config MACH_TX49XX
 674	bool "Toshiba TX49 series based machines"
 
 675
 676config MIKROTIK_RB532
 677	bool "Mikrotik RB532 boards"
 678	select CEVT_R4K
 679	select CSRC_R4K
 680	select DMA_NONCOHERENT
 681	select HW_HAS_PCI
 682	select IRQ_CPU
 683	select SYS_HAS_CPU_MIPS32_R1
 684	select SYS_SUPPORTS_32BIT_KERNEL
 685	select SYS_SUPPORTS_LITTLE_ENDIAN
 686	select SWAP_IO_SPACE
 687	select BOOT_RAW
 688	select ARCH_REQUIRE_GPIOLIB
 
 689	help
 690	  Support the Mikrotik(tm) RouterBoard 532 series,
 691	  based on the IDT RC32434 SoC.
 692
 693config WR_PPMC
 694	bool "Wind River PPMC board"
 695	select CEVT_R4K
 696	select CSRC_R4K
 697	select IRQ_CPU
 698	select BOOT_ELF32
 699	select DMA_NONCOHERENT
 700	select HW_HAS_PCI
 701	select PCI_GT64XXX_PCI0
 702	select SWAP_IO_SPACE
 703	select SYS_HAS_CPU_MIPS32_R1
 704	select SYS_HAS_CPU_MIPS32_R2
 705	select SYS_HAS_CPU_MIPS64_R1
 706	select SYS_HAS_CPU_NEVADA
 707	select SYS_HAS_CPU_RM7000
 708	select SYS_SUPPORTS_32BIT_KERNEL
 709	select SYS_SUPPORTS_64BIT_KERNEL
 710	select SYS_SUPPORTS_BIG_ENDIAN
 
 
 711	select SYS_SUPPORTS_LITTLE_ENDIAN
 712	help
 713	  This enables support for the Wind River MIPS32 4KC PPMC evaluation
 714	  board, which is based on GT64120 bridge chip.
 715
 716config CAVIUM_OCTEON_SIMULATOR
 717	bool "Cavium Networks Octeon Simulator"
 718	select CEVT_R4K
 719	select 64BIT_PHYS_ADDR
 720	select DMA_COHERENT
 721	select SYS_SUPPORTS_64BIT_KERNEL
 722	select SYS_SUPPORTS_BIG_ENDIAN
 723	select SYS_SUPPORTS_HIGHMEM
 724	select SYS_SUPPORTS_HOTPLUG_CPU
 725	select SYS_HAS_CPU_CAVIUM_OCTEON
 726	select HOLES_IN_ZONE
 727	help
 728	  The Octeon simulator is software performance model of the Cavium
 729	  Octeon Processor. It supports simulating Octeon processors on x86
 730	  hardware.
 731
 732config CAVIUM_OCTEON_REFERENCE_BOARD
 733	bool "Cavium Networks Octeon reference board"
 734	select CEVT_R4K
 735	select 64BIT_PHYS_ADDR
 736	select DMA_COHERENT
 737	select SYS_SUPPORTS_64BIT_KERNEL
 738	select SYS_SUPPORTS_BIG_ENDIAN
 739	select SYS_SUPPORTS_HIGHMEM
 740	select SYS_SUPPORTS_HOTPLUG_CPU
 741	select SYS_HAS_EARLY_PRINTK
 742	select SYS_HAS_CPU_CAVIUM_OCTEON
 743	select SWAP_IO_SPACE
 744	select HW_HAS_PCI
 745	select ARCH_SUPPORTS_MSI
 
 746	select ZONE_DMA32
 747	select USB_ARCH_HAS_OHCI
 748	select USB_ARCH_HAS_EHCI
 749	select HOLES_IN_ZONE
 
 
 
 
 
 
 
 
 750	help
 751	  This option supports all of the Octeon reference boards from Cavium
 752	  Networks. It builds a kernel that dynamically determines the Octeon
 753	  CPU type and supports all known board reference implementations.
 754	  Some of the supported boards are:
 755		EBT3000
 756		EBH3000
 757		EBH3100
 758		Thunder
 759		Kodama
 760		Hikari
 761	  Say Y here for most Octeon reference boards.
 762
 763config NLM_XLR_BOARD
 764	bool "Netlogic XLR/XLS based systems"
 765	depends on EXPERIMENTAL
 766	select BOOT_ELF32
 767	select NLM_COMMON
 768	select NLM_XLR
 769	select SYS_HAS_CPU_XLR
 770	select SYS_SUPPORTS_SMP
 771	select HW_HAS_PCI
 772	select SWAP_IO_SPACE
 773	select SYS_SUPPORTS_32BIT_KERNEL
 774	select SYS_SUPPORTS_64BIT_KERNEL
 775	select 64BIT_PHYS_ADDR
 776	select SYS_SUPPORTS_BIG_ENDIAN
 777	select SYS_SUPPORTS_HIGHMEM
 778	select DMA_COHERENT
 779	select NR_CPUS_DEFAULT_32
 780	select CEVT_R4K
 781	select CSRC_R4K
 782	select IRQ_CPU
 783	select ZONE_DMA if 64BIT
 784	select SYNC_R4K
 785	select SYS_HAS_EARLY_PRINTK
 786	help
 787	  Support for systems based on Netlogic XLR and XLS processors.
 788	  Say Y here if you have a XLR or XLS based board.
 789
 790endchoice
 791
 
 
 
 
 
 
 
 
 
 792source "arch/mips/alchemy/Kconfig"
 
 793source "arch/mips/ath79/Kconfig"
 
 794source "arch/mips/bcm63xx/Kconfig"
 
 
 
 795source "arch/mips/jazz/Kconfig"
 796source "arch/mips/jz4740/Kconfig"
 797source "arch/mips/lantiq/Kconfig"
 798source "arch/mips/lasat/Kconfig"
 799source "arch/mips/pmc-sierra/Kconfig"
 800source "arch/mips/powertv/Kconfig"
 801source "arch/mips/sgi-ip27/Kconfig"
 802source "arch/mips/sibyte/Kconfig"
 803source "arch/mips/txx9/Kconfig"
 804source "arch/mips/vr41xx/Kconfig"
 805source "arch/mips/cavium-octeon/Kconfig"
 806source "arch/mips/loongson/Kconfig"
 807source "arch/mips/netlogic/Kconfig"
 
 808
 809endmenu
 810
 811config RWSEM_GENERIC_SPINLOCK
 812	bool
 813	default y
 814
 815config RWSEM_XCHGADD_ALGORITHM
 816	bool
 817
 818config ARCH_HAS_ILOG2_U32
 819	bool
 820	default n
 821
 822config ARCH_HAS_ILOG2_U64
 823	bool
 824	default n
 825
 826config ARCH_SUPPORTS_OPROFILE
 827	bool
 828	default y if !MIPS_MT_SMTC
 829
 830config GENERIC_HWEIGHT
 831	bool
 832	default y
 833
 834config GENERIC_CALIBRATE_DELAY
 835	bool
 836	default y
 837
 838config GENERIC_CLOCKEVENTS
 839	bool
 840	default y
 841
 842config GENERIC_CMOS_UPDATE
 843	bool
 844	default y
 845
 846config SCHED_OMIT_FRAME_POINTER
 847	bool
 848	default y
 849
 850#
 851# Select some configuration options automatically based on user selections.
 852#
 853config ARC
 854	bool
 855
 856config ARCH_MAY_HAVE_PC_FDC
 857	bool
 858
 859config BOOT_RAW
 860	bool
 861
 862config CEVT_BCM1480
 863	bool
 864
 865config CEVT_DS1287
 866	bool
 867
 868config CEVT_GT641XX
 869	bool
 870
 871config CEVT_R4K_LIB
 872	bool
 873
 874config CEVT_R4K
 875	select CEVT_R4K_LIB
 876	bool
 877
 878config CEVT_SB1250
 879	bool
 880
 881config CEVT_TXX9
 882	bool
 883
 884config CSRC_BCM1480
 885	bool
 886
 887config CSRC_IOASIC
 888	bool
 889
 890config CSRC_POWERTV
 891	bool
 892
 893config CSRC_R4K_LIB
 894	bool
 895
 896config CSRC_R4K
 897	select CSRC_R4K_LIB
 898	bool
 899
 900config CSRC_SB1250
 901	bool
 902
 
 
 
 903config GPIO_TXX9
 904	select GENERIC_GPIO
 905	select ARCH_REQUIRE_GPIOLIB
 906	bool
 907
 908config CFE
 909	bool
 910
 911config ARCH_DMA_ADDR_T_64BIT
 912	def_bool (HIGHMEM && 64BIT_PHYS_ADDR) || 64BIT
 913
 914config DMA_COHERENT
 915	bool
 916
 917config DMA_NONCOHERENT
 918	bool
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 919	select NEED_DMA_MAP_STATE
 920
 921config NEED_DMA_MAP_STATE
 922	bool
 923
 924config SYS_HAS_EARLY_PRINTK
 925	bool
 926
 927config HOTPLUG_CPU
 928	bool "Support for hot-pluggable CPUs"
 929	depends on SMP && HOTPLUG && SYS_SUPPORTS_HOTPLUG_CPU
 930	help
 931	  Say Y here to allow turning CPUs off and on. CPUs can be
 932	  controlled through /sys/devices/system/cpu.
 933	  (Note: power management support will enable this option
 934	    automatically on SMP systems. )
 935	  Say N if you want to disable CPU hotplug.
 936
 937config SYS_SUPPORTS_HOTPLUG_CPU
 938	bool
 939
 940config I8259
 941	bool
 942
 943config MIPS_BONITO64
 944	bool
 945
 946config MIPS_MSC
 947	bool
 948
 949config MIPS_NILE4
 950	bool
 951
 952config MIPS_DISABLE_OBSOLETE_IDE
 953	bool
 954
 955config SYNC_R4K
 956	bool
 957
 958config MIPS_MACHINE
 959	def_bool n
 960
 961config NO_IOPORT
 962	def_bool n
 963
 964config GENERIC_ISA_DMA
 965	bool
 966	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
 967	select ISA_DMA_API
 968
 969config GENERIC_ISA_DMA_SUPPORT_BROKEN
 970	bool
 971	select GENERIC_ISA_DMA
 972
 973config ISA_DMA_API
 974	bool
 975
 976config GENERIC_GPIO
 977	bool
 978
 979config HOLES_IN_ZONE
 980	bool
 981
 
 
 
 
 
 
 
 
 
 
 982#
 983# Endianess selection.  Sufficiently obscure so many users don't know what to
 984# answer,so we try hard to limit the available choices.  Also the use of a
 985# choice statement should be more obvious to the user.
 986#
 987choice
 988	prompt "Endianess selection"
 989	help
 990	  Some MIPS machines can be configured for either little or big endian
 991	  byte order. These modes require different kernels and a different
 992	  Linux distribution.  In general there is one preferred byteorder for a
 993	  particular system but some systems are just as commonly used in the
 994	  one or the other endianness.
 995
 996config CPU_BIG_ENDIAN
 997	bool "Big endian"
 998	depends on SYS_SUPPORTS_BIG_ENDIAN
 999
1000config CPU_LITTLE_ENDIAN
1001	bool "Little endian"
1002	depends on SYS_SUPPORTS_LITTLE_ENDIAN
1003	help
1004
1005endchoice
1006
1007config EXPORT_UASM
1008	bool
1009
1010config SYS_SUPPORTS_APM_EMULATION
1011	bool
1012
1013config SYS_SUPPORTS_BIG_ENDIAN
1014	bool
1015
1016config SYS_SUPPORTS_LITTLE_ENDIAN
1017	bool
1018
1019config SYS_SUPPORTS_HUGETLBFS
1020	bool
1021	depends on CPU_SUPPORTS_HUGEPAGES && 64BIT
1022	default y
1023
1024config IRQ_CPU
1025	bool
1026
1027config IRQ_CPU_RM7K
1028	bool
1029
1030config IRQ_CPU_RM9K
1031	bool
1032
1033config IRQ_MSP_SLP
1034	bool
1035
1036config IRQ_MSP_CIC
1037	bool
1038
1039config IRQ_TXX9
1040	bool
1041
1042config IRQ_GT641XX
1043	bool
1044
1045config IRQ_GIC
1046	bool
1047
1048config MIPS_BOARDS_GEN
1049	bool
1050
1051config PCI_GT64XXX_PCI0
1052	bool
1053
1054config NO_EXCEPT_FILL
1055	bool
1056
1057config MIPS_RM9122
1058	bool
1059	select SERIAL_RM9000
1060
1061config SOC_EMMA2RH
1062	bool
1063	select CEVT_R4K
1064	select CSRC_R4K
1065	select DMA_NONCOHERENT
1066	select IRQ_CPU
1067	select SWAP_IO_SPACE
1068	select SYS_HAS_CPU_R5500
1069	select SYS_SUPPORTS_32BIT_KERNEL
1070	select SYS_SUPPORTS_64BIT_KERNEL
1071	select SYS_SUPPORTS_BIG_ENDIAN
1072
1073config SOC_PNX833X
1074	bool
1075	select CEVT_R4K
1076	select CSRC_R4K
1077	select IRQ_CPU
1078	select DMA_NONCOHERENT
1079	select SYS_HAS_CPU_MIPS32_R2
1080	select SYS_SUPPORTS_32BIT_KERNEL
1081	select SYS_SUPPORTS_LITTLE_ENDIAN
1082	select SYS_SUPPORTS_BIG_ENDIAN
1083	select GENERIC_GPIO
1084	select CPU_MIPSR2_IRQ_VI
1085
1086config SOC_PNX8335
1087	bool
1088	select SOC_PNX833X
1089
1090config PNX8550
1091	bool
1092	select SOC_PNX8550
1093
1094config SOC_PNX8550
1095	bool
1096	select DMA_NONCOHERENT
1097	select HW_HAS_PCI
1098	select SYS_HAS_CPU_MIPS32_R1
1099	select SYS_HAS_EARLY_PRINTK
1100	select SYS_SUPPORTS_32BIT_KERNEL
1101	select GENERIC_GPIO
1102
1103config SWAP_IO_SPACE
1104	bool
1105
1106config SERIAL_RM9000
1107	bool
1108
1109config SGI_HAS_INDYDOG
1110	bool
1111
1112config SGI_HAS_HAL2
1113	bool
1114
1115config SGI_HAS_SEEQ
1116	bool
1117
1118config SGI_HAS_WD93
1119	bool
1120
1121config SGI_HAS_ZILOG
1122	bool
1123
1124config SGI_HAS_I8042
1125	bool
1126
1127config DEFAULT_SGI_PARTITION
1128	bool
1129
1130config ARC32
1131	bool
1132
1133config SNIPROM
1134	bool
1135
1136config BOOT_ELF32
1137	bool
1138
 
 
 
 
 
 
 
 
 
 
 
 
1139config MIPS_L1_CACHE_SHIFT
1140	int
1141	default "4" if MACH_DECSTATION || MIKROTIK_RB532 || PMC_MSP4200_EVAL
1142	default "6" if MIPS_CPU_SCACHE
1143	default "7" if SGI_IP22 || SGI_IP27 || SGI_IP28 || SNI_RM || CPU_CAVIUM_OCTEON
 
1144	default "5"
1145
1146config HAVE_STD_PC_SERIAL_PORT
1147	bool
1148
1149config ARC_CONSOLE
1150	bool "ARC console support"
1151	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1152
1153config ARC_MEMORY
1154	bool
1155	depends on MACH_JAZZ || SNI_RM || SGI_IP32
1156	default y
1157
1158config ARC_PROMLIB
1159	bool
1160	depends on MACH_JAZZ || SNI_RM || SGI_IP22 || SGI_IP28 || SGI_IP32
1161	default y
1162
1163config ARC64
1164	bool
1165
1166config BOOT_ELF64
1167	bool
1168
1169menu "CPU selection"
1170
1171choice
1172	prompt "CPU type"
1173	default CPU_R4X00
1174
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1175config CPU_LOONGSON2E
1176	bool "Loongson 2E"
1177	depends on SYS_HAS_CPU_LOONGSON2E
1178	select CPU_LOONGSON2
1179	help
1180	  The Loongson 2E processor implements the MIPS III instruction set
1181	  with many extensions.
1182
1183	  It has an internal FPGA northbridge, which is compatible to
1184	  bonito64.
1185
1186config CPU_LOONGSON2F
1187	bool "Loongson 2F"
1188	depends on SYS_HAS_CPU_LOONGSON2F
1189	select CPU_LOONGSON2
1190	select GENERIC_GPIO
1191	select ARCH_REQUIRE_GPIOLIB
1192	help
1193	  The Loongson 2F processor implements the MIPS III instruction set
1194	  with many extensions.
1195
1196	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1197	  have a similar programming interface with FPGA northbridge used in
1198	  Loongson2E.
1199
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1200config CPU_MIPS32_R1
1201	bool "MIPS32 Release 1"
1202	depends on SYS_HAS_CPU_MIPS32_R1
1203	select CPU_HAS_PREFETCH
1204	select CPU_SUPPORTS_32BIT_KERNEL
1205	select CPU_SUPPORTS_HIGHMEM
1206	help
1207	  Choose this option to build a kernel for release 1 or later of the
1208	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1209	  MIPS processor are based on a MIPS32 processor.  If you know the
1210	  specific type of processor in your system, choose those that one
1211	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1212	  Release 2 of the MIPS32 architecture is available since several
1213	  years so chances are you even have a MIPS32 Release 2 processor
1214	  in which case you should choose CPU_MIPS32_R2 instead for better
1215	  performance.
1216
1217config CPU_MIPS32_R2
1218	bool "MIPS32 Release 2"
1219	depends on SYS_HAS_CPU_MIPS32_R2
1220	select CPU_HAS_PREFETCH
1221	select CPU_SUPPORTS_32BIT_KERNEL
1222	select CPU_SUPPORTS_HIGHMEM
 
1223	help
1224	  Choose this option to build a kernel for release 2 or later of the
1225	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1226	  MIPS processor are based on a MIPS32 processor.  If you know the
1227	  specific type of processor in your system, choose those that one
1228	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1229
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1230config CPU_MIPS64_R1
1231	bool "MIPS64 Release 1"
1232	depends on SYS_HAS_CPU_MIPS64_R1
1233	select CPU_HAS_PREFETCH
1234	select CPU_SUPPORTS_32BIT_KERNEL
1235	select CPU_SUPPORTS_64BIT_KERNEL
1236	select CPU_SUPPORTS_HIGHMEM
1237	select CPU_SUPPORTS_HUGEPAGES
1238	help
1239	  Choose this option to build a kernel for release 1 or later of the
1240	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1241	  MIPS processor are based on a MIPS64 processor.  If you know the
1242	  specific type of processor in your system, choose those that one
1243	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1244	  Release 2 of the MIPS64 architecture is available since several
1245	  years so chances are you even have a MIPS64 Release 2 processor
1246	  in which case you should choose CPU_MIPS64_R2 instead for better
1247	  performance.
1248
1249config CPU_MIPS64_R2
1250	bool "MIPS64 Release 2"
1251	depends on SYS_HAS_CPU_MIPS64_R2
1252	select CPU_HAS_PREFETCH
1253	select CPU_SUPPORTS_32BIT_KERNEL
1254	select CPU_SUPPORTS_64BIT_KERNEL
1255	select CPU_SUPPORTS_HIGHMEM
1256	select CPU_SUPPORTS_HUGEPAGES
 
1257	help
1258	  Choose this option to build a kernel for release 2 or later of the
1259	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1260	  MIPS processor are based on a MIPS64 processor.  If you know the
1261	  specific type of processor in your system, choose those that one
1262	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1263
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1264config CPU_R3000
1265	bool "R3000"
1266	depends on SYS_HAS_CPU_R3000
1267	select CPU_HAS_WB
 
1268	select CPU_SUPPORTS_32BIT_KERNEL
1269	select CPU_SUPPORTS_HIGHMEM
1270	help
1271	  Please make sure to pick the right CPU type. Linux/MIPS is not
1272	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1273	  *not* work on R4000 machines and vice versa.  However, since most
1274	  of the supported machines have an R4000 (or similar) CPU, R4x00
1275	  might be a safe bet.  If the resulting kernel does not work,
1276	  try to recompile with R3000.
1277
1278config CPU_TX39XX
1279	bool "R39XX"
1280	depends on SYS_HAS_CPU_TX39XX
1281	select CPU_SUPPORTS_32BIT_KERNEL
1282
1283config CPU_VR41XX
1284	bool "R41xx"
1285	depends on SYS_HAS_CPU_VR41XX
1286	select CPU_SUPPORTS_32BIT_KERNEL
1287	select CPU_SUPPORTS_64BIT_KERNEL
1288	help
1289	  The options selects support for the NEC VR4100 series of processors.
1290	  Only choose this option if you have one of these processors as a
1291	  kernel built with this option will not run on any other type of
1292	  processor or vice versa.
1293
1294config CPU_R4300
1295	bool "R4300"
1296	depends on SYS_HAS_CPU_R4300
1297	select CPU_SUPPORTS_32BIT_KERNEL
1298	select CPU_SUPPORTS_64BIT_KERNEL
1299	help
1300	  MIPS Technologies R4300-series processors.
1301
1302config CPU_R4X00
1303	bool "R4x00"
1304	depends on SYS_HAS_CPU_R4X00
1305	select CPU_SUPPORTS_32BIT_KERNEL
1306	select CPU_SUPPORTS_64BIT_KERNEL
 
1307	help
1308	  MIPS Technologies R4000-series processors other than 4300, including
1309	  the R4000, R4400, R4600, and 4700.
1310
1311config CPU_TX49XX
1312	bool "R49XX"
1313	depends on SYS_HAS_CPU_TX49XX
1314	select CPU_HAS_PREFETCH
1315	select CPU_SUPPORTS_32BIT_KERNEL
1316	select CPU_SUPPORTS_64BIT_KERNEL
 
1317
1318config CPU_R5000
1319	bool "R5000"
1320	depends on SYS_HAS_CPU_R5000
1321	select CPU_SUPPORTS_32BIT_KERNEL
1322	select CPU_SUPPORTS_64BIT_KERNEL
 
1323	help
1324	  MIPS Technologies R5000-series processors other than the Nevada.
1325
1326config CPU_R5432
1327	bool "R5432"
1328	depends on SYS_HAS_CPU_R5432
1329	select CPU_SUPPORTS_32BIT_KERNEL
1330	select CPU_SUPPORTS_64BIT_KERNEL
1331
1332config CPU_R5500
1333	bool "R5500"
1334	depends on SYS_HAS_CPU_R5500
1335	select CPU_SUPPORTS_32BIT_KERNEL
1336	select CPU_SUPPORTS_64BIT_KERNEL
1337	select CPU_SUPPORTS_HUGEPAGES
1338	help
1339	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1340	  instruction set.
1341
1342config CPU_R6000
1343	bool "R6000"
1344	depends on EXPERIMENTAL
1345	depends on SYS_HAS_CPU_R6000
1346	select CPU_SUPPORTS_32BIT_KERNEL
1347	help
1348	  MIPS Technologies R6000 and R6000A series processors.  Note these
1349	  processors are extremely rare and the support for them is incomplete.
1350
1351config CPU_NEVADA
1352	bool "RM52xx"
1353	depends on SYS_HAS_CPU_NEVADA
1354	select CPU_SUPPORTS_32BIT_KERNEL
1355	select CPU_SUPPORTS_64BIT_KERNEL
 
1356	help
1357	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1358
1359config CPU_R8000
1360	bool "R8000"
1361	depends on EXPERIMENTAL
1362	depends on SYS_HAS_CPU_R8000
1363	select CPU_HAS_PREFETCH
1364	select CPU_SUPPORTS_64BIT_KERNEL
1365	help
1366	  MIPS Technologies R8000 processors.  Note these processors are
1367	  uncommon and the support for them is incomplete.
1368
1369config CPU_R10000
1370	bool "R10000"
1371	depends on SYS_HAS_CPU_R10000
1372	select CPU_HAS_PREFETCH
1373	select CPU_SUPPORTS_32BIT_KERNEL
1374	select CPU_SUPPORTS_64BIT_KERNEL
1375	select CPU_SUPPORTS_HIGHMEM
 
1376	help
1377	  MIPS Technologies R10000-series processors.
1378
1379config CPU_RM7000
1380	bool "RM7000"
1381	depends on SYS_HAS_CPU_RM7000
1382	select CPU_HAS_PREFETCH
1383	select CPU_SUPPORTS_32BIT_KERNEL
1384	select CPU_SUPPORTS_64BIT_KERNEL
1385	select CPU_SUPPORTS_HIGHMEM
1386
1387config CPU_RM9000
1388	bool "RM9000"
1389	depends on SYS_HAS_CPU_RM9000
1390	select CPU_HAS_PREFETCH
1391	select CPU_SUPPORTS_32BIT_KERNEL
1392	select CPU_SUPPORTS_64BIT_KERNEL
1393	select CPU_SUPPORTS_HIGHMEM
1394	select WEAK_ORDERING
1395
1396config CPU_SB1
1397	bool "SB1"
1398	depends on SYS_HAS_CPU_SB1
1399	select CPU_SUPPORTS_32BIT_KERNEL
1400	select CPU_SUPPORTS_64BIT_KERNEL
1401	select CPU_SUPPORTS_HIGHMEM
 
1402	select WEAK_ORDERING
1403
1404config CPU_CAVIUM_OCTEON
1405	bool "Cavium Octeon processor"
1406	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1407	select CPU_HAS_PREFETCH
1408	select CPU_SUPPORTS_64BIT_KERNEL
1409	select SYS_SUPPORTS_SMP
1410	select NR_CPUS_DEFAULT_16
1411	select WEAK_ORDERING
1412	select CPU_SUPPORTS_HIGHMEM
1413	select CPU_SUPPORTS_HUGEPAGES
 
 
 
 
1414	help
1415	  The Cavium Octeon processor is a highly integrated chip containing
1416	  many ethernet hardware widgets for networking tasks. The processor
1417	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1418	  Full details can be found at http://www.caviumnetworks.com.
1419
1420config CPU_BMIPS3300
1421	bool "BMIPS3300"
1422	depends on SYS_HAS_CPU_BMIPS3300
 
 
 
 
 
 
1423	select DMA_NONCOHERENT
1424	select IRQ_CPU
1425	select SWAP_IO_SPACE
1426	select SYS_SUPPORTS_32BIT_KERNEL
1427	select WEAK_ORDERING
 
 
 
 
 
1428	help
1429	  Broadcom BMIPS3300 processors.
1430
1431config CPU_BMIPS4350
1432	bool "BMIPS4350"
1433	depends on SYS_HAS_CPU_BMIPS4350
1434	select CPU_SUPPORTS_32BIT_KERNEL
1435	select DMA_NONCOHERENT
1436	select IRQ_CPU
1437	select SWAP_IO_SPACE
1438	select SYS_SUPPORTS_SMP
1439	select SYS_SUPPORTS_HOTPLUG_CPU
1440	select WEAK_ORDERING
1441	help
1442	  Broadcom BMIPS4350 ("VIPER") processors.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1443
1444config CPU_BMIPS4380
1445	bool "BMIPS4380"
1446	depends on SYS_HAS_CPU_BMIPS4380
1447	select CPU_SUPPORTS_32BIT_KERNEL
1448	select DMA_NONCOHERENT
1449	select IRQ_CPU
1450	select SWAP_IO_SPACE
1451	select SYS_SUPPORTS_SMP
1452	select SYS_SUPPORTS_HOTPLUG_CPU
1453	select WEAK_ORDERING
1454	help
1455	  Broadcom BMIPS4380 processors.
 
 
1456
1457config CPU_BMIPS5000
1458	bool "BMIPS5000"
1459	depends on SYS_HAS_CPU_BMIPS5000
1460	select CPU_SUPPORTS_32BIT_KERNEL
1461	select CPU_SUPPORTS_HIGHMEM
1462	select DMA_NONCOHERENT
1463	select IRQ_CPU
1464	select SWAP_IO_SPACE
1465	select SYS_SUPPORTS_SMP
1466	select SYS_SUPPORTS_HOTPLUG_CPU
1467	select WEAK_ORDERING
 
 
 
 
1468	help
1469	  Broadcom BMIPS5000 processors.
 
 
1470
1471config CPU_XLR
1472	bool "Netlogic XLR SoC"
1473	depends on SYS_HAS_CPU_XLR
1474	select CPU_SUPPORTS_32BIT_KERNEL
1475	select CPU_SUPPORTS_64BIT_KERNEL
1476	select CPU_SUPPORTS_HIGHMEM
1477	select WEAK_ORDERING
1478	select WEAK_REORDERING_BEYOND_LLSC
1479	select CPU_SUPPORTS_HUGEPAGES
 
1480	help
1481	  Netlogic Microsystems XLR/XLS processors.
1482endchoice
 
 
 
 
1483
1484if CPU_LOONGSON2F
1485config CPU_NOP_WORKAROUNDS
1486	bool
1487
1488config CPU_JUMP_WORKAROUNDS
1489	bool
1490
1491config CPU_LOONGSON2F_WORKAROUNDS
1492	bool "Loongson 2F Workarounds"
1493	default y
1494	select CPU_NOP_WORKAROUNDS
1495	select CPU_JUMP_WORKAROUNDS
1496	help
1497	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1498	  require workarounds.  Without workarounds the system may hang
1499	  unexpectedly.  For more information please refer to the gas
1500	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1501
1502	  Loongson 2F03 and later have fixed these issues and no workarounds
1503	  are needed.  The workarounds have no significant side effect on them
1504	  but may decrease the performance of the system so this option should
1505	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1506	  systems.
1507
1508	  If unsure, please say Y.
1509endif # CPU_LOONGSON2F
1510
1511config SYS_SUPPORTS_ZBOOT
1512	bool
1513	select HAVE_KERNEL_GZIP
1514	select HAVE_KERNEL_BZIP2
 
1515	select HAVE_KERNEL_LZMA
1516	select HAVE_KERNEL_LZO
 
 
1517
1518config SYS_SUPPORTS_ZBOOT_UART16550
1519	bool
1520	select SYS_SUPPORTS_ZBOOT
1521
1522config CPU_LOONGSON2
 
 
 
 
1523	bool
1524	select CPU_SUPPORTS_32BIT_KERNEL
1525	select CPU_SUPPORTS_64BIT_KERNEL
1526	select CPU_SUPPORTS_HIGHMEM
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1527
1528config SYS_HAS_CPU_LOONGSON2E
1529	bool
1530
1531config SYS_HAS_CPU_LOONGSON2F
1532	bool
1533	select CPU_SUPPORTS_CPUFREQ
1534	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1535	select CPU_SUPPORTS_UNCACHED_ACCELERATED
 
 
 
 
 
1536
1537config SYS_HAS_CPU_MIPS32_R1
1538	bool
1539
1540config SYS_HAS_CPU_MIPS32_R2
1541	bool
1542
 
 
 
 
 
 
 
 
 
1543config SYS_HAS_CPU_MIPS64_R1
1544	bool
1545
1546config SYS_HAS_CPU_MIPS64_R2
1547	bool
1548
1549config SYS_HAS_CPU_R3000
1550	bool
1551
1552config SYS_HAS_CPU_TX39XX
1553	bool
1554
1555config SYS_HAS_CPU_VR41XX
 
 
 
1556	bool
1557
1558config SYS_HAS_CPU_R4300
1559	bool
1560
1561config SYS_HAS_CPU_R4X00
1562	bool
1563
1564config SYS_HAS_CPU_TX49XX
1565	bool
1566
1567config SYS_HAS_CPU_R5000
1568	bool
1569
1570config SYS_HAS_CPU_R5432
1571	bool
1572
1573config SYS_HAS_CPU_R5500
1574	bool
1575
1576config SYS_HAS_CPU_R6000
1577	bool
1578
1579config SYS_HAS_CPU_NEVADA
1580	bool
1581
1582config SYS_HAS_CPU_R8000
1583	bool
1584
1585config SYS_HAS_CPU_R10000
1586	bool
1587
1588config SYS_HAS_CPU_RM7000
1589	bool
1590
1591config SYS_HAS_CPU_RM9000
1592	bool
1593
1594config SYS_HAS_CPU_SB1
1595	bool
1596
1597config SYS_HAS_CPU_CAVIUM_OCTEON
1598	bool
1599
1600config SYS_HAS_CPU_BMIPS3300
 
 
 
1601	bool
 
1602
1603config SYS_HAS_CPU_BMIPS4350
1604	bool
 
1605
1606config SYS_HAS_CPU_BMIPS4380
1607	bool
 
1608
1609config SYS_HAS_CPU_BMIPS5000
1610	bool
1611
1612config SYS_HAS_CPU_XLR
1613	bool
1614
1615#
1616# CPU may reorder R->R, R->W, W->R, W->W
1617# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1618#
1619config WEAK_ORDERING
1620	bool
1621
1622#
1623# CPU may reorder reads and writes beyond LL/SC
1624# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1625#
1626config WEAK_REORDERING_BEYOND_LLSC
1627	bool
1628endmenu
1629
1630#
1631# These two indicate any level of the MIPS32 and MIPS64 architecture
1632#
1633config CPU_MIPS32
1634	bool
1635	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2
 
1636
1637config CPU_MIPS64
1638	bool
1639	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2
 
1640
1641#
1642# These two indicate the revision of the architecture, either Release 1 or Release 2
1643#
1644config CPU_MIPSR1
1645	bool
1646	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1647
1648config CPU_MIPSR2
1649	bool
1650	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1651
1652config SYS_SUPPORTS_32BIT_KERNEL
1653	bool
1654config SYS_SUPPORTS_64BIT_KERNEL
1655	bool
1656config CPU_SUPPORTS_32BIT_KERNEL
1657	bool
1658config CPU_SUPPORTS_64BIT_KERNEL
1659	bool
1660config CPU_SUPPORTS_CPUFREQ
1661	bool
1662config CPU_SUPPORTS_ADDRWINCFG
1663	bool
1664config CPU_SUPPORTS_HUGEPAGES
1665	bool
1666config CPU_SUPPORTS_UNCACHED_ACCELERATED
 
1667	bool
1668config MIPS_PGD_C0_CONTEXT
1669	bool
1670	default y if 64BIT && CPU_MIPSR2
 
1671
1672#
1673# Set to y for ptrace access to watch registers.
1674#
1675config HARDWARE_WATCHPOINTS
1676       bool
1677       default y if CPU_MIPSR1 || CPU_MIPSR2
1678
1679menu "Kernel type"
1680
1681choice
1682
1683	prompt "Kernel code model"
1684	help
1685	  You should only select this option if you have a workload that
1686	  actually benefits from 64-bit processing or if your machine has
1687	  large memory.  You will only be presented a single option in this
1688	  menu if your system does not support both 32-bit and 64-bit kernels.
1689
1690config 32BIT
1691	bool "32-bit kernel"
1692	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
1693	select TRAD_SIGNALS
1694	help
1695	  Select this option if you want to build a 32-bit kernel.
 
1696config 64BIT
1697	bool "64-bit kernel"
1698	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
1699	select HAVE_SYSCALL_WRAPPERS
1700	help
1701	  Select this option if you want to build a 64-bit kernel.
1702
1703endchoice
1704
1705choice
1706	prompt "Kernel page size"
1707	default PAGE_SIZE_4KB
 
 
 
 
 
 
 
 
 
1708
1709config PAGE_SIZE_4KB
1710	bool "4kB"
1711	depends on !CPU_LOONGSON2
1712	help
1713	 This option select the standard 4kB Linux page size.  On some
1714	 R3000-family processors this is the only available page size.  Using
1715	 4kB page size will minimize memory consumption and is therefore
1716	 recommended for low memory systems.
1717
1718config PAGE_SIZE_8KB
1719	bool "8kB"
1720	depends on (EXPERIMENTAL && CPU_R8000) || CPU_CAVIUM_OCTEON
1721	help
1722	  Using 8kB page size will result in higher performance kernel at
1723	  the price of higher memory consumption.  This option is available
1724	  only on R8000 and cnMIPS processors.  Note that you will need a
1725	  suitable Linux distribution to support this.
1726
1727config PAGE_SIZE_16KB
1728	bool "16kB"
1729	depends on !CPU_R3000 && !CPU_TX39XX
1730	help
1731	  Using 16kB page size will result in higher performance kernel at
1732	  the price of higher memory consumption.  This option is available on
1733	  all non-R3000 family processors.  Note that you will need a suitable
1734	  Linux distribution to support this.
1735
1736config PAGE_SIZE_32KB
1737	bool "32kB"
1738	depends on CPU_CAVIUM_OCTEON
1739	help
1740	  Using 32kB page size will result in higher performance kernel at
1741	  the price of higher memory consumption.  This option is available
1742	  only on cnMIPS cores.  Note that you will need a suitable Linux
1743	  distribution to support this.
1744
1745config PAGE_SIZE_64KB
1746	bool "64kB"
1747	depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX
1748	help
1749	  Using 64kB page size will result in higher performance kernel at
1750	  the price of higher memory consumption.  This option is available on
1751	  all non-R3000 family processor.  Not that at the time of this
1752	  writing this option is still high experimental.
1753
1754endchoice
1755
1756config FORCE_MAX_ZONEORDER
1757	int "Maximum zone order"
1758	range 13 64 if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_32KB
1759	default "13" if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_32KB
1760	range 12 64 if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_16KB
1761	default "12" if SYS_SUPPORTS_HUGETLBFS && PAGE_SIZE_16KB
1762	range 11 64
1763	default "11"
1764	help
1765	  The kernel memory allocator divides physically contiguous memory
1766	  blocks into "zones", where each zone is a power of two number of
1767	  pages.  This option selects the largest power of two that the kernel
1768	  keeps in the memory allocator.  If you need to allocate very large
1769	  blocks of physically contiguous memory, then you may need to
1770	  increase this value.
1771
1772	  This config option is actually maximum order plus one. For example,
1773	  a value of 11 means that the largest free memory block is 2^10 pages.
1774
1775	  The page size is not necessarily 4KB.  Keep this in mind
1776	  when choosing a value for this option.
1777
1778config BOARD_SCACHE
1779	bool
1780
1781config IP22_CPU_SCACHE
1782	bool
1783	select BOARD_SCACHE
1784
1785#
1786# Support for a MIPS32 / MIPS64 style S-caches
1787#
1788config MIPS_CPU_SCACHE
1789	bool
1790	select BOARD_SCACHE
1791
1792config R5000_CPU_SCACHE
1793	bool
1794	select BOARD_SCACHE
1795
1796config RM7000_CPU_SCACHE
1797	bool
1798	select BOARD_SCACHE
1799
1800config SIBYTE_DMA_PAGEOPS
1801	bool "Use DMA to clear/copy pages"
1802	depends on CPU_SB1
1803	help
1804	  Instead of using the CPU to zero and copy pages, use a Data Mover
1805	  channel.  These DMA channels are otherwise unused by the standard
1806	  SiByte Linux port.  Seems to give a small performance benefit.
1807
1808config CPU_HAS_PREFETCH
1809	bool
1810
1811choice
1812	prompt "MIPS MT options"
 
1813
1814config MIPS_MT_DISABLED
1815	bool "Disable multithreading support."
 
1816	help
1817	  Use this option if your workload can't take advantage of
1818	  MIPS hardware multithreading support.  On systems that don't have
1819	  the option of an MT-enabled processor this option will be the only
1820	  option in this menu.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1821
1822config MIPS_MT_SMP
1823	bool "Use 1 TC on each available VPE for SMP"
1824	depends on SYS_SUPPORTS_MULTITHREADING
 
 
1825	select CPU_MIPSR2_IRQ_VI
1826	select CPU_MIPSR2_IRQ_EI
 
1827	select MIPS_MT
1828	select NR_CPUS_DEFAULT_2
1829	select SMP
1830	select SYS_SUPPORTS_SCHED_SMT if SMP
1831	select SYS_SUPPORTS_SMP
1832	select SMP_UP
1833	help
1834	  This is a kernel model which is known a VSMP but lately has been
1835	  marketesed into SMVP.
1836	  Virtual SMP uses the processor's VPEs  to implement virtual
1837	  processors. In currently available configuration of the 34K processor
1838	  this allows for a dual processor. Both processors will share the same
1839	  primary caches; each will obtain the half of the TLB for it's own
1840	  exclusive use. For a layman this model can be described as similar to
1841	  what Intel calls Hyperthreading.
1842
1843	  For further information see http://www.linux-mips.org/wiki/34K#VSMP
1844
1845config MIPS_MT_SMTC
1846	bool "SMTC: Use all TCs on all VPEs for SMP"
1847	depends on CPU_MIPS32_R2
1848	#depends on CPU_MIPS64_R2		# once there is hardware ...
1849	depends on SYS_SUPPORTS_MULTITHREADING
1850	select CPU_MIPSR2_IRQ_VI
1851	select CPU_MIPSR2_IRQ_EI
1852	select MIPS_MT
1853	select NR_CPUS_DEFAULT_8
1854	select SMP
1855	select SYS_SUPPORTS_SMP
1856	select SMP_UP
 
1857	help
1858	  This is a kernel model which is known a SMTC or lately has been
1859	  marketesed into SMVP.
1860	  is presenting the available TC's of the core as processors to Linux.
1861	  On currently available 34K processors this means a Linux system will
1862	  see up to 5 processors. The implementation of the SMTC kernel differs
1863	  significantly from VSMP and cannot efficiently coexist in the same
1864	  kernel binary so the choice between VSMP and SMTC is a compile time
1865	  decision.
1866
1867	  For further information see http://www.linux-mips.org/wiki/34K#SMTC
1868
1869endchoice
1870
1871config MIPS_MT
1872	bool
1873
1874config SCHED_SMT
1875	bool "SMT (multithreading) scheduler support"
1876	depends on SYS_SUPPORTS_SCHED_SMT
1877	default n
1878	help
1879	  SMT scheduler support improves the CPU scheduler's decision making
1880	  when dealing with MIPS MT enabled cores at a cost of slightly
1881	  increased overhead in some places. If unsure say N here.
1882
1883config SYS_SUPPORTS_SCHED_SMT
1884	bool
1885
1886
1887config SYS_SUPPORTS_MULTITHREADING
1888	bool
1889
1890config MIPS_MT_FPAFF
1891	bool "Dynamic FPU affinity for FP-intensive threads"
1892	default y
1893	depends on MIPS_MT_SMP || MIPS_MT_SMTC
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1894
1895config MIPS_VPE_LOADER
1896	bool "VPE loader support."
1897	depends on SYS_SUPPORTS_MULTITHREADING
1898	select CPU_MIPSR2_IRQ_VI
1899	select CPU_MIPSR2_IRQ_EI
1900	select MIPS_MT
1901	help
1902	  Includes a loader for loading an elf relocatable object
1903	  onto another VPE and running it.
1904
1905config MIPS_MT_SMTC_IM_BACKSTOP
1906	bool "Use per-TC register bits as backstop for inhibited IM bits"
1907	depends on MIPS_MT_SMTC
1908	default n
1909	help
1910	  To support multiple TC microthreads acting as "CPUs" within
1911	  a VPE, VPE-wide interrupt mask bits must be specially manipulated
1912	  during interrupt handling. To support legacy drivers and interrupt
1913	  controller management code, SMTC has a "backstop" to track and
1914	  if necessary restore the interrupt mask. This has some performance
1915	  impact on interrupt service overhead.
1916
1917config MIPS_MT_SMTC_IRQAFF
1918	bool "Support IRQ affinity API"
1919	depends on MIPS_MT_SMTC
1920	default n
1921	help
1922	  Enables SMP IRQ affinity API (/proc/irq/*/smp_affinity, etc.)
1923	  for SMTC Linux kernel. Requires platform support, of which
1924	  an example can be found in the MIPS kernel i8259 and Malta
1925	  platform code.  Adds some overhead to interrupt dispatch, and
1926	  should be used only if you know what you are doing.
1927
1928config MIPS_VPE_LOADER_TOM
1929	bool "Load VPE program into memory hidden from linux"
1930	depends on MIPS_VPE_LOADER
1931	default y
1932	help
1933	  The loader can use memory that is present but has been hidden from
1934	  Linux using the kernel command line option "mem=xxMB". It's up to
1935	  you to ensure the amount you put in the option and the space your
1936	  program requires is less or equal to the amount physically present.
1937
1938# this should possibly be in drivers/char, but it is rather cpu related. Hmmm
1939config MIPS_VPE_APSP_API
1940	bool "Enable support for AP/SP API (RTLX)"
1941	depends on MIPS_VPE_LOADER
1942	help
1943
1944config MIPS_APSP_KSPD
1945	bool "Enable KSPD"
 
1946	depends on MIPS_VPE_APSP_API
1947	default y
1948	help
1949	  KSPD is a kernel daemon that accepts syscall requests from the SP
1950	  side, actions them and returns the results. It also handles the
1951	  "exit" syscall notifying other kernel modules the SP program is
1952	  exiting.  You probably want to say yes here.
1953
1954config MIPS_CMP
1955	bool "MIPS CMP framework support"
1956	depends on SYS_SUPPORTS_MIPS_CMP
1957	select SYNC_R4K
1958	select SYS_SUPPORTS_SMP
1959	select SYS_SUPPORTS_SCHED_SMT if SMP
1960	select WEAK_ORDERING
1961	default n
1962	help
1963	  This is a placeholder option for the GCMP work. It will need to
1964	  be handled differently...
 
 
 
1965
1966config SB1_PASS_1_WORKAROUNDS
 
 
 
 
 
 
 
 
1967	bool
1968	depends on CPU_SB1_PASS_1
1969	default y
1970
1971config SB1_PASS_2_WORKAROUNDS
1972	bool
1973	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
1974	default y
1975
1976config SB1_PASS_2_1_WORKAROUNDS
1977	bool
1978	depends on CPU_SB1 && CPU_SB1_PASS_2
1979	default y
1980
1981config 64BIT_PHYS_ADDR
1982	bool
1983
1984config ARCH_PHYS_ADDR_T_64BIT
1985       def_bool 64BIT_PHYS_ADDR
 
 
1986
1987config CPU_HAS_SMARTMIPS
1988	depends on SYS_SUPPORTS_SMARTMIPS
1989	bool "Support for the SmartMIPS ASE"
1990	help
1991	  SmartMIPS is a extension of the MIPS32 architecture aimed at
1992	  increased security at both hardware and software level for
1993	  smartcards.  Enabling this option will allow proper use of the
1994	  SmartMIPS instructions by Linux applications.  However a kernel with
1995	  this option will not work on a MIPS core without SmartMIPS core.  If
1996	  you don't know you probably don't have SmartMIPS and should say N
1997	  here.
1998
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1999config CPU_HAS_WB
2000	bool
2001
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2002#
2003# Vectored interrupt mode is an R2 feature
2004#
2005config CPU_MIPSR2_IRQ_VI
2006	bool
2007
2008#
2009# Extended interrupt mode is an R2 feature
2010#
2011config CPU_MIPSR2_IRQ_EI
2012	bool
2013
2014config CPU_HAS_SYNC
2015	bool
2016	depends on !CPU_R3000
2017	default y
2018
2019config GENERIC_CLOCKEVENTS_BROADCAST
2020	bool
2021
2022#
2023# CPU non-features
2024#
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2025config CPU_DADDI_WORKAROUNDS
2026	bool
2027
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2028config CPU_R4000_WORKAROUNDS
2029	bool
2030	select CPU_R4400_WORKAROUNDS
2031
 
 
 
 
 
 
2032config CPU_R4400_WORKAROUNDS
2033	bool
2034
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2035#
2036# - Highmem only makes sense for the 32-bit kernel.
2037# - The current highmem code will only work properly on physically indexed
2038#   caches such as R3000, SB1, R7000 or those that look like they're virtually
2039#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
2040#   moment we protect the user and offer the highmem option only on machines
2041#   where it's known to be safe.  This will not offer highmem on a few systems
2042#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2043#   indexed CPUs but we're playing safe.
2044# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2045#   know they might have memory configurations that could make use of highmem
2046#   support.
2047#
2048config HIGHMEM
2049	bool "High Memory Support"
2050	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM
 
2051
2052config CPU_SUPPORTS_HIGHMEM
2053	bool
2054
2055config SYS_SUPPORTS_HIGHMEM
2056	bool
2057
2058config SYS_SUPPORTS_SMARTMIPS
2059	bool
2060
2061config ARCH_FLATMEM_ENABLE
2062	def_bool y
2063	depends on !NUMA && !CPU_LOONGSON2
2064
2065config ARCH_DISCONTIGMEM_ENABLE
2066	bool
2067	default y if SGI_IP27
2068	help
2069	  Say Y to support efficient handling of discontiguous physical memory,
2070	  for architectures which are either NUMA (Non-Uniform Memory Access)
2071	  or have huge holes in the physical address space for other reasons.
2072	  See <file:Documentation/vm/numa> for more.
 
 
2073
2074config ARCH_POPULATES_NODE_MAP
2075	def_bool y
 
2076
2077config ARCH_SPARSEMEM_ENABLE
2078	bool
2079	select SPARSEMEM_STATIC
2080
2081config NUMA
2082	bool "NUMA Support"
2083	depends on SYS_SUPPORTS_NUMA
 
 
 
2084	help
2085	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2086	  Access).  This option improves performance on systems with more
2087	  than two nodes; on two node systems it is generally better to
2088	  leave it disabled; on single node systems disable this option
2089	  disabled.
2090
2091config SYS_SUPPORTS_NUMA
2092	bool
2093
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2094config NODES_SHIFT
2095	int
2096	default "6"
2097	depends on NEED_MULTIPLE_NODES
2098
2099config HW_PERF_EVENTS
2100	bool "Enable hardware performance counter support for perf events"
2101	depends on PERF_EVENTS && !MIPS_MT_SMTC && OPROFILE=n && CPU_MIPS32
2102	default y
2103	help
2104	  Enable hardware performance counter support for perf events. If
2105	  disabled, perf events will use software events only.
2106
2107source "mm/Kconfig"
 
 
 
 
 
 
 
 
 
2108
2109config SMP
2110	bool "Multi-Processing support"
2111	depends on SYS_SUPPORTS_SMP
2112	select IRQ_PER_CPU
2113	select USE_GENERIC_SMP_HELPERS
2114	help
2115	  This enables support for systems with more than one CPU. If you have
2116	  a system with only one CPU, like most personal computers, say N. If
2117	  you have a system with more than one CPU, say Y.
2118
2119	  If you say N here, the kernel will run on single and multiprocessor
2120	  machines, but will use only one CPU of a multiprocessor machine. If
2121	  you say Y here, the kernel will run on many, but not all,
2122	  singleprocessor machines. On a singleprocessor machine, the kernel
2123	  will run faster if you say N here.
2124
2125	  People using multiprocessor machines who say Y here should also say
2126	  Y to "Enhanced Real Time Clock Support", below.
2127
2128	  See also the SMP-HOWTO available at
2129	  <http://www.tldp.org/docs.html#howto>.
2130
2131	  If you don't know what to do here, say N.
2132
 
 
 
 
 
 
 
 
 
 
2133config SMP_UP
2134	bool
2135
2136config SYS_SUPPORTS_MIPS_CMP
2137	bool
2138
2139config SYS_SUPPORTS_SMP
2140	bool
2141
2142config NR_CPUS_DEFAULT_1
2143	bool
2144
2145config NR_CPUS_DEFAULT_2
2146	bool
2147
2148config NR_CPUS_DEFAULT_4
2149	bool
2150
2151config NR_CPUS_DEFAULT_8
2152	bool
2153
2154config NR_CPUS_DEFAULT_16
2155	bool
2156
2157config NR_CPUS_DEFAULT_32
2158	bool
2159
2160config NR_CPUS_DEFAULT_64
2161	bool
2162
2163config NR_CPUS
2164	int "Maximum number of CPUs (2-64)"
2165	range 1 64 if NR_CPUS_DEFAULT_1
2166	depends on SMP
2167	default "1" if NR_CPUS_DEFAULT_1
2168	default "2" if NR_CPUS_DEFAULT_2
2169	default "4" if NR_CPUS_DEFAULT_4
2170	default "8" if NR_CPUS_DEFAULT_8
2171	default "16" if NR_CPUS_DEFAULT_16
2172	default "32" if NR_CPUS_DEFAULT_32
2173	default "64" if NR_CPUS_DEFAULT_64
2174	help
2175	  This allows you to specify the maximum number of CPUs which this
2176	  kernel will support.  The maximum supported value is 32 for 32-bit
2177	  kernel and 64 for 64-bit kernels; the minimum value which makes
2178	  sense is 1 for Qemu (useful only for kernel debugging purposes)
2179	  and 2 for all others.
2180
2181	  This is purely to save memory - each supported CPU adds
2182	  approximately eight kilobytes to the kernel image.  For best
2183	  performance should round up your number of processors to the next
2184	  power of two.
2185
2186source "kernel/time/Kconfig"
 
 
 
 
 
 
 
 
 
 
2187
2188#
2189# Timer Interrupt Frequency Configuration
2190#
2191
2192choice
2193	prompt "Timer frequency"
2194	default HZ_250
2195	help
2196	 Allows the configuration of the timer frequency.
 
 
 
2197
2198	config HZ_48
2199		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2200
2201	config HZ_100
2202		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2203
2204	config HZ_128
2205		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2206
2207	config HZ_250
2208		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2209
2210	config HZ_256
2211		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2212
2213	config HZ_1000
2214		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2215
2216	config HZ_1024
2217		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2218
2219endchoice
2220
 
 
 
2221config SYS_SUPPORTS_48HZ
2222	bool
2223
2224config SYS_SUPPORTS_100HZ
2225	bool
2226
2227config SYS_SUPPORTS_128HZ
2228	bool
2229
2230config SYS_SUPPORTS_250HZ
2231	bool
2232
2233config SYS_SUPPORTS_256HZ
2234	bool
2235
2236config SYS_SUPPORTS_1000HZ
2237	bool
2238
2239config SYS_SUPPORTS_1024HZ
2240	bool
2241
2242config SYS_SUPPORTS_ARBIT_HZ
2243	bool
2244	default y if !SYS_SUPPORTS_48HZ && !SYS_SUPPORTS_100HZ && \
2245		     !SYS_SUPPORTS_128HZ && !SYS_SUPPORTS_250HZ && \
2246		     !SYS_SUPPORTS_256HZ && !SYS_SUPPORTS_1000HZ && \
 
 
 
 
2247		     !SYS_SUPPORTS_1024HZ
2248
2249config HZ
2250	int
 
2251	default 48 if HZ_48
2252	default 100 if HZ_100
2253	default 128 if HZ_128
2254	default 250 if HZ_250
2255	default 256 if HZ_256
2256	default 1000 if HZ_1000
2257	default 1024 if HZ_1024
2258
2259source "kernel/Kconfig.preempt"
 
2260
2261config MIPS_INSANE_LARGE
2262	bool "Support for large 64-bit configurations"
2263	depends on CPU_R10000 && 64BIT
2264	help
2265	  MIPS R10000 does support a 44 bit / 16TB address space as opposed to
2266	  previous 64-bit processors which only supported 40 bit / 1TB. If you
2267	  need processes of more than 1TB virtual address space, say Y here.
2268	  This will result in additional memory usage, so it is not
2269	  recommended for normal users.
2270
2271config KEXEC
2272	bool "Kexec system call (EXPERIMENTAL)"
2273	depends on EXPERIMENTAL
2274	help
2275	  kexec is a system call that implements the ability to shutdown your
2276	  current kernel, and to start another kernel.  It is like a reboot
2277	  but it is independent of the system firmware.   And like a reboot
2278	  you can start any kernel with it, not just Linux.
2279
2280	  The name comes from the similarity to the exec system call.
2281
2282	  It is an ongoing process to be certain the hardware in a machine
2283	  is properly shutdown, so do not be surprised if this code does not
2284	  initially work for you.  It may help to enable device hotplugging
2285	  support.  As of this writing the exact hardware interface is
2286	  strongly in flux, so no good recommendation can be made.
2287
2288config SECCOMP
2289	bool "Enable seccomp to safely compute untrusted bytecode"
2290	depends on PROC_FS
2291	default y
2292	help
2293	  This kernel feature is useful for number crunching applications
2294	  that may need to compute untrusted bytecode during their
2295	  execution. By using pipes or other transports made available to
2296	  the process as file descriptors supporting the read/write
2297	  syscalls, it's possible to isolate those applications in
2298	  their own address space using seccomp. Once seccomp is
2299	  enabled via /proc/<pid>/seccomp, it cannot be disabled
2300	  and the task is only allowed to execute a few safe syscalls
2301	  defined by each seccomp mode.
2302
2303	  If unsure, say Y. Only embedded should say N here.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2304
2305config USE_OF
2306	bool "Flattened Device Tree support"
2307	select OF
2308	select OF_EARLY_FLATTREE
2309	help
2310	  Include support for flattened device tree machine descriptions.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2311
2312endmenu
2313
2314config LOCKDEP_SUPPORT
2315	bool
2316	default y
2317
2318config STACKTRACE_SUPPORT
2319	bool
2320	default y
2321
2322source "init/Kconfig"
2323
2324source "kernel/Kconfig.freezer"
2325
2326menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
2327
2328config HW_HAS_EISA
2329	bool
2330config HW_HAS_PCI
2331	bool
2332
2333config PCI
2334	bool "Support for PCI controller"
2335	depends on HW_HAS_PCI
2336	select PCI_DOMAINS
2337	help
2338	  Find out whether you have a PCI motherboard. PCI is the name of a
2339	  bus system, i.e. the way the CPU talks to the other stuff inside
2340	  your box. Other bus systems are ISA, EISA, or VESA. If you have PCI,
2341	  say Y, otherwise N.
2342
2343config PCI_DOMAINS
 
2344	bool
2345
2346source "drivers/pci/Kconfig"
 
 
 
2347
2348#
2349# ISA support is now enabled via select.  Too many systems still have the one
2350# or other ISA chip on the board that users don't know about so don't expect
2351# users to choose the right thing ...
2352#
2353config ISA
2354	bool
2355
2356config EISA
2357	bool "EISA support"
2358	depends on HW_HAS_EISA
2359	select ISA
2360	select GENERIC_ISA_DMA
2361	---help---
2362	  The Extended Industry Standard Architecture (EISA) bus was
2363	  developed as an open alternative to the IBM MicroChannel bus.
2364
2365	  The EISA bus provided some of the features of the IBM MicroChannel
2366	  bus while maintaining backward compatibility with cards made for
2367	  the older ISA bus.  The EISA bus saw limited use between 1988 and
2368	  1995 when it was made obsolete by the PCI bus.
2369
2370	  Say Y here if you are building a kernel for an EISA-based machine.
2371
2372	  Otherwise, say N.
2373
2374source "drivers/eisa/Kconfig"
2375
2376config TC
2377	bool "TURBOchannel support"
2378	depends on MACH_DECSTATION
2379	help
2380	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
2381	  processors.  TURBOchannel programming specifications are available
2382	  at:
2383	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
2384	  and:
2385	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
2386	  Linux driver support status is documented at:
2387	  <http://www.linux-mips.org/wiki/DECstation>
2388
2389#config ACCESSBUS
2390#	bool "Access.Bus support"
2391#	depends on TC
2392
2393config MMU
2394	bool
2395	default y
2396
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2397config I8253
2398	bool
2399	select CLKSRC_I8253
2400	select CLKEVT_I8253
2401	select MIPS_EXTERNAL_TIMER
2402
2403config ZONE_DMA32
2404	bool
2405
2406source "drivers/pcmcia/Kconfig"
2407
2408source "drivers/pci/hotplug/Kconfig"
2409
2410config RAPIDIO
2411	bool "RapidIO support"
2412	depends on PCI
2413	default n
2414	help
2415	  If you say Y here, the kernel will include drivers and
2416	  infrastructure code to support RapidIO interconnect devices.
2417
2418source "drivers/rapidio/Kconfig"
2419
2420endmenu
2421
2422menu "Executable file formats"
2423
2424source "fs/Kconfig.binfmt"
2425
2426config TRAD_SIGNALS
2427	bool
2428
2429config MIPS32_COMPAT
2430	bool "Kernel support for Linux/MIPS 32-bit binary compatibility"
2431	depends on 64BIT
2432	help
2433	  Select this option if you want Linux/MIPS 32-bit binary
2434	  compatibility. Since all software available for Linux/MIPS is
2435	  currently 32-bit you should say Y here.
2436
2437config COMPAT
2438	bool
2439	depends on MIPS32_COMPAT
2440	default y
2441
2442config SYSVIPC_COMPAT
2443	bool
2444	depends on COMPAT && SYSVIPC
2445	default y
2446
2447config MIPS32_O32
2448	bool "Kernel support for o32 binaries"
2449	depends on MIPS32_COMPAT
 
 
 
2450	help
2451	  Select this option if you want to run o32 binaries.  These are pure
2452	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
2453	  existing binaries are in this format.
2454
2455	  If unsure, say Y.
2456
2457config MIPS32_N32
2458	bool "Kernel support for n32 binaries"
2459	depends on MIPS32_COMPAT
 
 
 
2460	help
2461	  Select this option if you want to run n32 binaries.  These are
2462	  64-bit binaries using 32-bit quantities for addressing and certain
2463	  data that would normally be 64-bit.  They are used in special
2464	  cases.
2465
2466	  If unsure, say N.
2467
2468config BINFMT_ELF32
2469	bool
2470	default y if MIPS32_O32 || MIPS32_N32
2471
2472endmenu
 
 
2473
2474menu "Power management options"
2475
2476config ARCH_HIBERNATION_POSSIBLE
2477	def_bool y
2478	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2479
2480config ARCH_SUSPEND_POSSIBLE
2481	def_bool y
2482	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
2483
2484source "kernel/power/Kconfig"
2485
2486endmenu
2487
2488source "arch/mips/kernel/cpufreq/Kconfig"
2489
2490source "net/Kconfig"
2491
2492source "drivers/Kconfig"
2493
2494source "fs/Kconfig"
 
 
2495
2496source "arch/mips/Kconfig.debug"
2497
2498source "security/Kconfig"
2499
2500source "crypto/Kconfig"
2501
2502source "lib/Kconfig"
v6.13.7
   1# SPDX-License-Identifier: GPL-2.0
   2config MIPS
   3	bool
   4	default y
   5	select ARCH_32BIT_OFF_T if !64BIT
   6	select ARCH_BINFMT_ELF_STATE if MIPS_FP_SUPPORT
   7	select ARCH_HAS_CPU_CACHE_ALIASING
   8	select ARCH_HAS_CPU_FINALIZE_INIT
   9	select ARCH_HAS_CURRENT_STACK_POINTER if !CC_IS_CLANG || CLANG_VERSION >= 140000
  10	select ARCH_HAS_DEBUG_VIRTUAL if !64BIT
  11	select ARCH_HAS_DMA_OPS if MACH_JAZZ
  12	select ARCH_HAS_FORTIFY_SOURCE
  13	select ARCH_HAS_KCOV
  14	select ARCH_HAS_NON_OVERLAPPING_ADDRESS_SPACE if !EVA
  15	select ARCH_HAS_PTE_SPECIAL if !(32BIT && CPU_HAS_RIXI)
  16	select ARCH_HAS_STRNCPY_FROM_USER
  17	select ARCH_HAS_STRNLEN_USER
  18	select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
  19	select ARCH_HAS_UBSAN
  20	select ARCH_HAS_GCOV_PROFILE_ALL
  21	select ARCH_KEEP_MEMBLOCK
  22	select ARCH_USE_BUILTIN_BSWAP
  23	select ARCH_USE_CMPXCHG_LOCKREF if 64BIT
  24	select ARCH_USE_MEMTEST
  25	select ARCH_USE_QUEUED_RWLOCKS
  26	select ARCH_USE_QUEUED_SPINLOCKS
  27	select ARCH_SUPPORTS_HUGETLBFS if CPU_SUPPORTS_HUGEPAGES
  28	select ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT if MMU
  29	select ARCH_WANT_IPC_PARSE_VERSION
  30	select ARCH_WANT_LD_ORPHAN_WARN
  31	select BUILDTIME_TABLE_SORT
  32	select CLONE_BACKWARDS
  33	select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
  34	select CPU_PM if CPU_IDLE || SUSPEND
  35	select GENERIC_ATOMIC64 if !64BIT
  36	select GENERIC_CMOS_UPDATE
  37	select GENERIC_CPU_AUTOPROBE
  38	select GENERIC_GETTIMEOFDAY
  39	select GENERIC_IOMAP
  40	select GENERIC_IRQ_PROBE
  41	select GENERIC_IRQ_SHOW
  42	select GENERIC_ISA_DMA if EISA
  43	select GENERIC_LIB_ASHLDI3
  44	select GENERIC_LIB_ASHRDI3
  45	select GENERIC_LIB_CMPDI2
  46	select GENERIC_LIB_LSHRDI3
  47	select GENERIC_LIB_UCMPDI2
  48	select GENERIC_SCHED_CLOCK if !CAVIUM_OCTEON_SOC
  49	select GENERIC_SMP_IDLE_THREAD
  50	select GENERIC_IDLE_POLL_SETUP
  51	select GENERIC_TIME_VSYSCALL
  52	select GUP_GET_PXX_LOW_HIGH if CPU_MIPS32 && PHYS_ADDR_T_64BIT
  53	select HAS_IOPORT if !NO_IOPORT_MAP || ISA
  54	select HAVE_ARCH_COMPILER_H
  55	select HAVE_ARCH_JUMP_LABEL
  56	select HAVE_ARCH_KGDB if MIPS_FP_SUPPORT
  57	select HAVE_ARCH_MMAP_RND_BITS if MMU
  58	select HAVE_ARCH_MMAP_RND_COMPAT_BITS if MMU && COMPAT
  59	select HAVE_ARCH_SECCOMP_FILTER
  60	select HAVE_ARCH_TRACEHOOK
  61	select HAVE_ARCH_TRANSPARENT_HUGEPAGE if CPU_SUPPORTS_HUGEPAGES
  62	select HAVE_ASM_MODVERSIONS
  63	select HAVE_CONTEXT_TRACKING_USER
  64	select HAVE_TIF_NOHZ
  65	select HAVE_C_RECORDMCOUNT
  66	select HAVE_DEBUG_KMEMLEAK
  67	select HAVE_DEBUG_STACKOVERFLOW
  68	select HAVE_DMA_CONTIGUOUS
  69	select HAVE_DYNAMIC_FTRACE
  70	select HAVE_EBPF_JIT if !CPU_MICROMIPS
  71	select HAVE_EXIT_THREAD
  72	select HAVE_GUP_FAST
  73	select HAVE_FTRACE_MCOUNT_RECORD
 
  74	select HAVE_FUNCTION_GRAPH_TRACER
  75	select HAVE_FUNCTION_TRACER
  76	select HAVE_GCC_PLUGINS
  77	select HAVE_GENERIC_VDSO
  78	select HAVE_IOREMAP_PROT
  79	select HAVE_IRQ_EXIT_ON_IRQ_STACK
  80	select HAVE_IRQ_TIME_ACCOUNTING
  81	select HAVE_KPROBES
  82	select HAVE_KRETPROBES
  83	select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
  84	select HAVE_MOD_ARCH_SPECIFIC
  85	select HAVE_NMI
  86	select HAVE_PAGE_SIZE_4KB if !CPU_LOONGSON2EF && !CPU_LOONGSON64
  87	select HAVE_PAGE_SIZE_16KB if !CPU_R3000
  88	select HAVE_PAGE_SIZE_64KB if !CPU_R3000
  89	select HAVE_PERF_EVENTS
  90	select HAVE_PERF_REGS
  91	select HAVE_PERF_USER_STACK_DUMP
  92	select HAVE_REGS_AND_STACK_ACCESS_API
  93	select HAVE_RSEQ
  94	select HAVE_SPARSE_SYSCALL_NR
  95	select HAVE_STACKPROTECTOR
  96	select HAVE_SYSCALL_TRACEPOINTS
  97	select HAVE_VIRT_CPU_ACCOUNTING_GEN if 64BIT || !SMP
  98	select IRQ_FORCED_THREADING
  99	select ISA if EISA
 100	select LOCK_MM_AND_FIND_VMA
 101	select MODULES_USE_ELF_REL if MODULES
 102	select MODULES_USE_ELF_RELA if MODULES && 64BIT
 103	select PERF_USE_VMALLOC
 104	select PCI_MSI_ARCH_FALLBACKS if PCI_MSI
 105	select RTC_LIB
 106	select SYSCTL_EXCEPTION_TRACE
 107	select TRACE_IRQFLAGS_SUPPORT
 108	select ARCH_HAS_ELFCORE_COMPAT
 109	select HAVE_ARCH_KCSAN if 64BIT
 110
 111config MIPS_FIXUP_BIGPHYS_ADDR
 112	bool
 113
 114config MIPS_GENERIC
 115	bool
 116
 117config MACH_GENERIC_CORE
 118	bool
 119
 120config MACH_INGENIC
 121	bool
 122	select SYS_SUPPORTS_32BIT_KERNEL
 123	select SYS_SUPPORTS_LITTLE_ENDIAN
 124	select SYS_SUPPORTS_ZBOOT
 125	select DMA_NONCOHERENT
 126	select IRQ_MIPS_CPU
 127	select PINCTRL
 128	select GPIOLIB
 129	select COMMON_CLK
 130	select GENERIC_IRQ_CHIP
 131	select BUILTIN_DTB if MIPS_NO_APPENDED_DTB
 132	select USE_OF
 133	select CPU_SUPPORTS_CPUFREQ
 134	select MIPS_EXTERNAL_TIMER
 135
 136menu "Machine selection"
 137
 138choice
 139	prompt "System type"
 140	default MIPS_GENERIC_KERNEL
 141
 142config MIPS_GENERIC_KERNEL
 143	bool "Generic board-agnostic MIPS kernel"
 144	select MIPS_GENERIC
 145	select BOOT_RAW
 146	select BUILTIN_DTB
 147	select CEVT_R4K
 148	select CLKSRC_MIPS_GIC
 149	select COMMON_CLK
 150	select CPU_MIPSR2_IRQ_EI
 151	select CPU_MIPSR2_IRQ_VI
 152	select CSRC_R4K
 153	select DMA_NONCOHERENT
 154	select HAVE_PCI
 155	select IRQ_MIPS_CPU
 156	select MACH_GENERIC_CORE
 157	select MIPS_AUTO_PFN_OFFSET
 158	select MIPS_CPU_SCACHE
 159	select MIPS_GIC
 160	select MIPS_L1_CACHE_SHIFT_7
 161	select NO_EXCEPT_FILL
 162	select PCI_DRIVERS_GENERIC
 163	select SMP_UP if SMP
 164	select SWAP_IO_SPACE
 165	select SYS_HAS_CPU_MIPS32_R1
 166	select SYS_HAS_CPU_MIPS32_R2
 167	select SYS_HAS_CPU_MIPS32_R5
 168	select SYS_HAS_CPU_MIPS32_R6
 169	select SYS_HAS_CPU_MIPS64_R1
 170	select SYS_HAS_CPU_MIPS64_R2
 171	select SYS_HAS_CPU_MIPS64_R5
 172	select SYS_HAS_CPU_MIPS64_R6
 173	select SYS_SUPPORTS_32BIT_KERNEL
 174	select SYS_SUPPORTS_64BIT_KERNEL
 175	select SYS_SUPPORTS_BIG_ENDIAN
 176	select SYS_SUPPORTS_HIGHMEM
 177	select SYS_SUPPORTS_LITTLE_ENDIAN
 178	select SYS_SUPPORTS_MICROMIPS
 179	select SYS_SUPPORTS_MIPS16
 180	select SYS_SUPPORTS_MIPS_CPS
 181	select SYS_SUPPORTS_MULTITHREADING
 182	select SYS_SUPPORTS_RELOCATABLE
 183	select SYS_SUPPORTS_SMARTMIPS
 184	select SYS_SUPPORTS_ZBOOT
 185	select UHI_BOOT
 186	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 187	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 188	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 189	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 190	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 191	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 192	select USE_OF
 193	help
 194	  Select this to build a kernel which aims to support multiple boards,
 195	  generally using a flattened device tree passed from the bootloader
 196	  using the boot protocol defined in the UHI (Unified Hosting
 197	  Interface) specification.
 198
 199config MIPS_ALCHEMY
 200	bool "Alchemy processor based machines"
 201	select PHYS_ADDR_T_64BIT
 202	select CEVT_R4K
 203	select CSRC_R4K
 204	select IRQ_MIPS_CPU
 205	select DMA_NONCOHERENT		# Au1000,1500,1100 aren't, rest is
 206	select MIPS_FIXUP_BIGPHYS_ADDR if PCI
 207	select SYS_HAS_CPU_MIPS32_R1
 208	select SYS_SUPPORTS_32BIT_KERNEL
 209	select SYS_SUPPORTS_APM_EMULATION
 210	select GPIOLIB
 
 211	select SYS_SUPPORTS_ZBOOT
 212	select COMMON_CLK
 213
 214config ATH25
 215	bool "Atheros AR231x/AR531x SoC support"
 
 
 216	select CEVT_R4K
 217	select CSRC_R4K
 218	select DMA_NONCOHERENT
 219	select IRQ_MIPS_CPU
 220	select IRQ_DOMAIN
 221	select SYS_HAS_CPU_MIPS32_R1
 222	select SYS_SUPPORTS_BIG_ENDIAN
 223	select SYS_SUPPORTS_32BIT_KERNEL
 224	select SYS_HAS_EARLY_PRINTK
 
 
 
 
 225	help
 226	  Support for Atheros AR231x and Atheros AR531x based boards
 
 227
 228config ATH79
 229	bool "Atheros AR71XX/AR724X/AR913X based boards"
 230	select ARCH_HAS_RESET_CONTROLLER
 231	select BOOT_RAW
 232	select CEVT_R4K
 233	select CSRC_R4K
 234	select DMA_NONCOHERENT
 235	select GPIOLIB
 236	select PINCTRL
 237	select COMMON_CLK
 238	select IRQ_MIPS_CPU
 239	select SYS_HAS_CPU_MIPS32_R2
 240	select SYS_HAS_EARLY_PRINTK
 241	select SYS_SUPPORTS_32BIT_KERNEL
 242	select SYS_SUPPORTS_BIG_ENDIAN
 243	select SYS_SUPPORTS_MIPS16
 244	select SYS_SUPPORTS_ZBOOT_UART_PROM
 245	select USE_OF
 246	select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM
 247	help
 248	  Support for the Atheros AR71XX/AR724X/AR913X SoCs.
 249
 250config BMIPS_GENERIC
 251	bool "Broadcom Generic BMIPS kernel"
 252	select ARCH_HAS_RESET_CONTROLLER
 253	select ARCH_HAS_SYNC_DMA_FOR_CPU_ALL
 254	select BOOT_RAW
 255	select NO_EXCEPT_FILL
 256	select USE_OF
 257	select CEVT_R4K
 258	select CSRC_R4K
 259	select SYNC_R4K
 260	select COMMON_CLK
 261	select BCM6345_L1_IRQ
 262	select BCM7038_L1_IRQ
 263	select BCM7120_L2_IRQ
 264	select BRCMSTB_L2_IRQ
 265	select IRQ_MIPS_CPU
 266	select DMA_NONCOHERENT
 267	select SYS_SUPPORTS_32BIT_KERNEL
 268	select SYS_SUPPORTS_LITTLE_ENDIAN
 269	select SYS_SUPPORTS_BIG_ENDIAN
 270	select SYS_SUPPORTS_HIGHMEM
 271	select SYS_HAS_CPU_BMIPS32_3300
 272	select SYS_HAS_CPU_BMIPS4350
 273	select SYS_HAS_CPU_BMIPS4380
 274	select SYS_HAS_CPU_BMIPS5000
 275	select SWAP_IO_SPACE
 276	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 277	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 278	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 279	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 280	select HARDIRQS_SW_RESEND
 281	select HAVE_PCI
 282	select PCI_DRIVERS_GENERIC
 283	select FW_CFE
 284	help
 285	  Build a generic DT-based kernel image that boots on select
 286	  BCM33xx cable modem chips, BCM63xx DSL chips, and BCM7xxx set-top
 287	  box chips.  Note that CONFIG_CPU_BIG_ENDIAN/CONFIG_CPU_LITTLE_ENDIAN
 288	  must be set appropriately for your board.
 289
 290config BCM47XX
 291	bool "Broadcom BCM47XX based boards"
 292	select BOOT_RAW
 293	select CEVT_R4K
 294	select CSRC_R4K
 295	select DMA_NONCOHERENT
 296	select HAVE_PCI
 297	select IRQ_MIPS_CPU
 298	select SYS_HAS_CPU_MIPS32_R1
 299	select NO_EXCEPT_FILL
 300	select SYS_SUPPORTS_32BIT_KERNEL
 301	select SYS_SUPPORTS_LITTLE_ENDIAN
 302	select SYS_SUPPORTS_MIPS16
 303	select SYS_SUPPORTS_ZBOOT
 
 
 
 
 
 304	select SYS_HAS_EARLY_PRINTK
 305	select USE_GENERIC_EARLY_PRINTK_8250
 306	select GPIOLIB
 307	select LEDS_GPIO_REGISTER
 308	select BCM47XX_NVRAM
 309	select BCM47XX_SPROM
 310	select BCM47XX_SSB if !BCM47XX_BCMA
 311	help
 312	  Support for BCM47XX based boards
 313
 314config BCM63XX
 315	bool "Broadcom BCM63XX based boards"
 316	select BOOT_RAW
 317	select CEVT_R4K
 318	select CSRC_R4K
 319	select SYNC_R4K
 320	select DMA_NONCOHERENT
 321	select IRQ_MIPS_CPU
 
 322	select SYS_SUPPORTS_32BIT_KERNEL
 323	select SYS_SUPPORTS_BIG_ENDIAN
 324	select SYS_HAS_EARLY_PRINTK
 325	select SYS_HAS_CPU_BMIPS32_3300
 326	select SYS_HAS_CPU_BMIPS4350
 327	select SYS_HAS_CPU_BMIPS4380
 328	select SWAP_IO_SPACE
 329	select GPIOLIB
 330	select MIPS_L1_CACHE_SHIFT_4
 331	select HAVE_LEGACY_CLK
 332	help
 333	  Support for BCM63XX based boards
 334
 335config MIPS_COBALT
 336	bool "Cobalt Server"
 337	select CEVT_R4K
 338	select CSRC_R4K
 339	select CEVT_GT641XX
 340	select DMA_NONCOHERENT
 341	select FORCE_PCI
 342	select I8253
 343	select I8259
 344	select IRQ_MIPS_CPU
 345	select IRQ_GT641XX
 346	select PCI_GT64XXX_PCI0
 
 347	select SYS_HAS_CPU_NEVADA
 348	select SYS_HAS_EARLY_PRINTK
 349	select SYS_SUPPORTS_32BIT_KERNEL
 350	select SYS_SUPPORTS_64BIT_KERNEL
 351	select SYS_SUPPORTS_LITTLE_ENDIAN
 352	select USE_GENERIC_EARLY_PRINTK_8250
 353
 354config MACH_DECSTATION
 355	bool "DECstations"
 356	select BOOT_ELF32
 357	select CEVT_DS1287
 358	select CEVT_R4K if CPU_R4X00
 359	select CSRC_IOASIC
 360	select CSRC_R4K if CPU_R4X00
 361	select CPU_DADDI_WORKAROUNDS if 64BIT
 362	select CPU_R4000_WORKAROUNDS if 64BIT
 363	select CPU_R4400_WORKAROUNDS if 64BIT
 364	select DMA_NONCOHERENT
 365	select NO_IOPORT_MAP
 366	select IRQ_MIPS_CPU
 367	select SYS_HAS_CPU_R3000
 368	select SYS_HAS_CPU_R4X00
 369	select SYS_SUPPORTS_32BIT_KERNEL
 370	select SYS_SUPPORTS_64BIT_KERNEL
 371	select SYS_SUPPORTS_LITTLE_ENDIAN
 372	select SYS_SUPPORTS_128HZ
 373	select SYS_SUPPORTS_256HZ
 374	select SYS_SUPPORTS_1024HZ
 375	select MIPS_L1_CACHE_SHIFT_4
 376	help
 377	  This enables support for DEC's MIPS based workstations.  For details
 378	  see the Linux/MIPS FAQ on <http://www.linux-mips.org/> and the
 379	  DECstation porting pages on <http://decstation.unix-ag.org/>.
 380
 381	  If you have one of the following DECstation Models you definitely
 382	  want to choose R4xx0 for the CPU Type:
 383
 384		DECstation 5000/50
 385		DECstation 5000/150
 386		DECstation 5000/260
 387		DECsystem 5900/260
 388
 389	  otherwise choose R3000.
 390
 391config MACH_JAZZ
 392	bool "Jazz family of machines"
 393	select ARC_MEMORY
 394	select ARC_PROMLIB
 395	select ARCH_MIGHT_HAVE_PC_PARPORT
 396	select ARCH_MIGHT_HAVE_PC_SERIO
 397	select FW_ARC
 398	select FW_ARC32
 399	select ARCH_MAY_HAVE_PC_FDC
 400	select CEVT_R4K
 401	select CSRC_R4K
 402	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
 403	select GENERIC_ISA_DMA
 404	select HAVE_PCSPKR_PLATFORM
 405	select IRQ_MIPS_CPU
 406	select I8253
 407	select I8259
 408	select ISA
 409	select SYS_HAS_CPU_R4X00
 410	select SYS_SUPPORTS_32BIT_KERNEL
 411	select SYS_SUPPORTS_64BIT_KERNEL
 412	select SYS_SUPPORTS_100HZ
 
 
 
 
 
 
 
 
 
 
 413	select SYS_SUPPORTS_LITTLE_ENDIAN
 414	help
 415	  This a family of machines based on the MIPS R4030 chipset which was
 416	  used by several vendors to build RISC/os and Windows NT workstations.
 417	  Members include the Acer PICA, MIPS Magnum 4000, MIPS Millennium and
 418	  Olivetti M700-10 workstations.
 419
 420config MACH_INGENIC_SOC
 421	bool "Ingenic SoC based machines"
 422	select MIPS_GENERIC
 423	select MACH_INGENIC
 424	select MACH_GENERIC_CORE
 425	select SYS_SUPPORTS_ZBOOT_UART16550
 426	select CPU_SUPPORTS_CPUFREQ
 427	select MIPS_EXTERNAL_TIMER
 428
 429config LANTIQ
 430	bool "Lantiq based platforms"
 431	select DMA_NONCOHERENT
 432	select IRQ_MIPS_CPU
 433	select CEVT_R4K
 434	select CSRC_R4K
 435	select NO_EXCEPT_FILL
 436	select SYS_HAS_CPU_MIPS32_R1
 437	select SYS_HAS_CPU_MIPS32_R2
 438	select SYS_SUPPORTS_BIG_ENDIAN
 439	select SYS_SUPPORTS_32BIT_KERNEL
 440	select SYS_SUPPORTS_MIPS16
 441	select SYS_SUPPORTS_MULTITHREADING
 442	select SYS_SUPPORTS_VPE_LOADER
 443	select SYS_HAS_EARLY_PRINTK
 444	select GPIOLIB
 445	select SWAP_IO_SPACE
 446	select BOOT_RAW
 447	select HAVE_LEGACY_CLK
 448	select USE_OF
 449	select PINCTRL
 450	select PINCTRL_LANTIQ
 451	select ARCH_HAS_RESET_CONTROLLER
 452	select RESET_CONTROLLER
 453
 454config MACH_LOONGSON32
 455	bool "Loongson 32-bit family of machines"
 456	select SYS_SUPPORTS_ZBOOT
 457	help
 458	  This enables support for the Loongson-1 family of machines.
 
 
 
 
 
 
 
 
 
 
 459
 460	  Loongson-1 is a family of 32-bit MIPS-compatible SoCs developed by
 461	  the Institute of Computing Technology (ICT), Chinese Academy of
 462	  Sciences (CAS).
 463
 464config MACH_LOONGSON2EF
 465	bool "Loongson-2E/F family of machines"
 466	select SYS_SUPPORTS_ZBOOT
 467	help
 468	  This enables the support of early Loongson-2E/F family of machines.
 469
 470config MACH_LOONGSON64
 471	bool "Loongson 64-bit family of machines"
 472	select ARCH_DMA_DEFAULT_COHERENT
 473	select ARCH_SPARSEMEM_ENABLE
 474	select ARCH_MIGHT_HAVE_PC_PARPORT
 475	select ARCH_MIGHT_HAVE_PC_SERIO
 476	select GENERIC_ISA_DMA_SUPPORT_BROKEN
 477	select BOOT_ELF32
 478	select BOARD_SCACHE
 479	select CSRC_R4K
 480	select CEVT_R4K
 481	select SYNC_R4K
 482	select FORCE_PCI
 483	select ISA
 484	select I8259
 485	select IRQ_MIPS_CPU
 486	select NO_EXCEPT_FILL
 487	select NR_CPUS_DEFAULT_64
 488	select USE_GENERIC_EARLY_PRINTK_8250
 489	select PCI_DRIVERS_GENERIC
 490	select SYS_HAS_CPU_LOONGSON64
 491	select SYS_HAS_EARLY_PRINTK
 492	select SYS_SUPPORTS_SMP
 493	select SYS_SUPPORTS_HOTPLUG_CPU
 494	select SYS_SUPPORTS_NUMA
 495	select SYS_SUPPORTS_64BIT_KERNEL
 496	select SYS_SUPPORTS_HIGHMEM
 497	select SYS_SUPPORTS_LITTLE_ENDIAN
 498	select SYS_SUPPORTS_ZBOOT
 499	select SYS_SUPPORTS_RELOCATABLE
 500	select ZONE_DMA32
 501	select COMMON_CLK
 502	select USE_OF
 503	select BUILTIN_DTB
 504	select PCI_HOST_GENERIC
 505	help
 506	  This enables the support of Loongson-2/3 family of machines.
 507
 508	  Loongson-2 and Loongson-3 are 64-bit general-purpose processors with
 509	  GS264/GS464/GS464E/GS464V microarchitecture (except old Loongson-2E
 510	  and Loongson-2F which will be removed), developed by the Institute
 511	  of Computing Technology (ICT), Chinese Academy of Sciences (CAS).
 512
 513config MIPS_MALTA
 514	bool "MIPS Malta board"
 515	select ARCH_MAY_HAVE_PC_FDC
 516	select ARCH_MIGHT_HAVE_PC_PARPORT
 517	select ARCH_MIGHT_HAVE_PC_SERIO
 518	select BOOT_ELF32
 519	select BOOT_RAW
 520	select BUILTIN_DTB
 521	select CEVT_R4K
 522	select CLKSRC_MIPS_GIC
 523	select COMMON_CLK
 524	select CSRC_R4K
 525	select DMA_NONCOHERENT
 526	select GENERIC_ISA_DMA
 527	select HAVE_PCSPKR_PLATFORM
 528	select HAVE_PCI
 
 
 529	select I8253
 530	select I8259
 531	select IRQ_MIPS_CPU
 532	select MIPS_BONITO64
 533	select MIPS_CPU_SCACHE
 534	select MIPS_GIC
 535	select MIPS_L1_CACHE_SHIFT_6
 536	select MIPS_MSC
 537	select PCI_GT64XXX_PCI0
 538	select SMP_UP if SMP
 539	select SWAP_IO_SPACE
 540	select SYS_HAS_CPU_MIPS32_R1
 541	select SYS_HAS_CPU_MIPS32_R2
 542	select SYS_HAS_CPU_MIPS32_R3_5
 543	select SYS_HAS_CPU_MIPS32_R5
 544	select SYS_HAS_CPU_MIPS32_R6
 545	select SYS_HAS_CPU_MIPS64_R1
 546	select SYS_HAS_CPU_MIPS64_R2
 547	select SYS_HAS_CPU_MIPS64_R6
 548	select SYS_HAS_CPU_NEVADA
 549	select SYS_HAS_CPU_RM7000
 
 550	select SYS_SUPPORTS_32BIT_KERNEL
 551	select SYS_SUPPORTS_64BIT_KERNEL
 552	select SYS_SUPPORTS_BIG_ENDIAN
 553	select SYS_SUPPORTS_HIGHMEM
 554	select SYS_SUPPORTS_LITTLE_ENDIAN
 555	select SYS_SUPPORTS_MICROMIPS
 556	select SYS_SUPPORTS_MIPS16
 557	select SYS_SUPPORTS_MIPS_CPS
 558	select SYS_SUPPORTS_MULTITHREADING
 559	select SYS_SUPPORTS_RELOCATABLE
 560	select SYS_SUPPORTS_SMARTMIPS
 561	select SYS_SUPPORTS_VPE_LOADER
 562	select SYS_SUPPORTS_ZBOOT
 563	select USE_OF
 564	select WAR_ICACHE_REFILLS
 565	select ZONE_DMA32 if 64BIT
 566	help
 567	  This enables support for the MIPS Technologies Malta evaluation
 568	  board.
 569
 570config MACH_PIC32
 571	bool "Microchip PIC32 Family"
 572	help
 573	  This enables support for the Microchip PIC32 family of platforms.
 574
 575	  Microchip PIC32 is a family of general-purpose 32 bit MIPS core
 576	  microcontrollers.
 577
 578config EYEQ
 579	bool "Mobileye EyeQ SoC"
 580	select MACH_GENERIC_CORE
 581	select ARM_AMBA
 582	select PHYSICAL_START_BOOL
 583	select ARCH_SPARSEMEM_DEFAULT if 64BIT
 584	select BOOT_RAW
 585	select BUILTIN_DTB
 586	select CEVT_R4K
 587	select CLKSRC_MIPS_GIC
 588	select COMMON_CLK
 589	select CPU_MIPSR2_IRQ_EI
 590	select CPU_MIPSR2_IRQ_VI
 591	select CSRC_R4K
 592	select DMA_NONCOHERENT
 593	select HAVE_PCI
 594	select IRQ_MIPS_CPU
 595	select MIPS_AUTO_PFN_OFFSET
 596	select MIPS_CPU_SCACHE
 597	select MIPS_GIC
 598	select MIPS_L1_CACHE_SHIFT_7
 599	select PCI_DRIVERS_GENERIC
 600	select SMP_UP if SMP
 601	select SWAP_IO_SPACE
 602	select SYS_HAS_CPU_MIPS64_R6
 603	select SYS_SUPPORTS_64BIT_KERNEL
 604	select SYS_SUPPORTS_HIGHMEM
 605	select SYS_SUPPORTS_LITTLE_ENDIAN
 606	select SYS_SUPPORTS_MIPS_CPS
 607	select SYS_SUPPORTS_RELOCATABLE
 608	select SYS_SUPPORTS_ZBOOT
 609	select UHI_BOOT
 610	select USB_EHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 611	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 612	select USB_OHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 613	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 614	select USB_UHCI_BIG_ENDIAN_DESC if CPU_BIG_ENDIAN
 615	select USB_UHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
 616	select USE_OF
 617	help
 618	  Select this to build a kernel supporting EyeQ SoC from Mobileye.
 
 619
 620	bool
 
 
 
 
 
 621
 622config MACH_NINTENDO64
 623	bool "Nintendo 64 console"
 624	select CEVT_R4K
 625	select CSRC_R4K
 626	select SYS_HAS_CPU_R4300
 627	select SYS_SUPPORTS_BIG_ENDIAN
 628	select SYS_SUPPORTS_ZBOOT
 629	select SYS_SUPPORTS_32BIT_KERNEL
 630	select SYS_SUPPORTS_64BIT_KERNEL
 631	select DMA_NONCOHERENT
 632	select IRQ_MIPS_CPU
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 633
 634config RALINK
 635	bool "Ralink based machines"
 
 636	select CEVT_R4K
 637	select COMMON_CLK
 638	select CSRC_R4K
 
 
 
 639	select BOOT_RAW
 640	select DMA_NONCOHERENT
 641	select IRQ_MIPS_CPU
 642	select USE_OF
 643	select SYS_HAS_CPU_MIPS32_R2
 644	select SYS_SUPPORTS_32BIT_KERNEL
 645	select SYS_SUPPORTS_LITTLE_ENDIAN
 646	select SYS_SUPPORTS_MIPS16
 647	select SYS_SUPPORTS_ZBOOT
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 648	select SYS_HAS_EARLY_PRINTK
 649	select ARCH_HAS_RESET_CONTROLLER
 650	select RESET_CONTROLLER
 
 
 
 
 
 
 651
 652config MACH_REALTEK_RTL
 653	bool "Realtek RTL838x/RTL839x based machines"
 654	select MIPS_GENERIC
 655	select MACH_GENERIC_CORE
 
 
 
 656	select DMA_NONCOHERENT
 657	select IRQ_MIPS_CPU
 658	select CSRC_R4K
 659	select CEVT_R4K
 660	select SYS_HAS_CPU_MIPS32_R1
 661	select SYS_HAS_CPU_MIPS32_R2
 
 662	select SYS_SUPPORTS_BIG_ENDIAN
 663	select SYS_SUPPORTS_32BIT_KERNEL
 664	select SYS_SUPPORTS_MIPS16
 665	select SYS_SUPPORTS_MULTITHREADING
 666	select SYS_SUPPORTS_VPE_LOADER
 667	select BOOT_RAW
 668	select PINCTRL
 669	select USE_OF
 670	select REALTEK_OTTO_TIMER
 671
 672config SGI_IP22
 673	bool "SGI IP22 (Indy/Indigo2)"
 674	select ARC_MEMORY
 675	select ARC_PROMLIB
 676	select FW_ARC
 677	select FW_ARC32
 678	select ARCH_MIGHT_HAVE_PC_SERIO
 679	select BOOT_ELF32
 680	select CEVT_R4K
 681	select CSRC_R4K
 682	select DEFAULT_SGI_PARTITION
 683	select DMA_NONCOHERENT
 684	select HAVE_EISA
 685	select I8253
 686	select I8259
 687	select IP22_CPU_SCACHE
 688	select IRQ_MIPS_CPU
 689	select GENERIC_ISA_DMA_SUPPORT_BROKEN
 690	select SGI_HAS_I8042
 691	select SGI_HAS_INDYDOG
 692	select SGI_HAS_HAL2
 693	select SGI_HAS_SEEQ
 694	select SGI_HAS_WD93
 695	select SGI_HAS_ZILOG
 696	select SWAP_IO_SPACE
 697	select SYS_HAS_CPU_R4X00
 698	select SYS_HAS_CPU_R5000
 699	select SYS_HAS_EARLY_PRINTK
 
 
 
 
 
 
 
 700	select SYS_SUPPORTS_32BIT_KERNEL
 701	select SYS_SUPPORTS_64BIT_KERNEL
 702	select SYS_SUPPORTS_BIG_ENDIAN
 703	select WAR_R4600_V1_INDEX_ICACHEOP
 704	select WAR_R4600_V1_HIT_CACHEOP
 705	select WAR_R4600_V2_HIT_CACHEOP
 706	select MIPS_L1_CACHE_SHIFT_7
 707	help
 708	  This are the SGI Indy, Challenge S and Indigo2, as well as certain
 709	  OEM variants like the Tandem CMN B006S. To compile a Linux kernel
 710	  that runs on these, say Y here.
 711
 712config SGI_IP27
 713	bool "SGI IP27 (Origin200/2000)"
 714	select ARCH_HAS_PHYS_TO_DMA
 715	select ARCH_SPARSEMEM_ENABLE
 716	select FW_ARC
 717	select FW_ARC64
 718	select ARC_CMDLINE_ONLY
 719	select BOOT_ELF64
 720	select DEFAULT_SGI_PARTITION
 721	select FORCE_PCI
 722	select SYS_HAS_EARLY_PRINTK
 723	select HAVE_PCI
 724	select IRQ_MIPS_CPU
 725	select IRQ_DOMAIN_HIERARCHY
 726	select NR_CPUS_DEFAULT_64
 727	select PCI_DRIVERS_GENERIC
 728	select PCI_XTALK_BRIDGE
 729	select SYS_HAS_CPU_R10000
 730	select SYS_SUPPORTS_64BIT_KERNEL
 731	select SYS_SUPPORTS_BIG_ENDIAN
 732	select SYS_SUPPORTS_NUMA
 733	select SYS_SUPPORTS_SMP
 734	select WAR_R10000_LLSC
 735	select MIPS_L1_CACHE_SHIFT_7
 736	select NUMA
 737	help
 738	  This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
 739	  workstations.  To compile a Linux kernel that runs on these, say Y
 740	  here.
 741
 742config SGI_IP28
 743	bool "SGI IP28 (Indigo2 R10k)"
 744	select ARC_MEMORY
 745	select ARC_PROMLIB
 746	select FW_ARC
 747	select FW_ARC64
 748	select ARCH_MIGHT_HAVE_PC_SERIO
 749	select BOOT_ELF64
 750	select CEVT_R4K
 751	select CSRC_R4K
 752	select DEFAULT_SGI_PARTITION
 753	select DMA_NONCOHERENT
 754	select GENERIC_ISA_DMA_SUPPORT_BROKEN
 755	select IRQ_MIPS_CPU
 756	select HAVE_EISA
 757	select I8253
 758	select I8259
 759	select SGI_HAS_I8042
 760	select SGI_HAS_INDYDOG
 761	select SGI_HAS_HAL2
 762	select SGI_HAS_SEEQ
 763	select SGI_HAS_WD93
 764	select SGI_HAS_ZILOG
 765	select SWAP_IO_SPACE
 766	select SYS_HAS_CPU_R10000
 767	select SYS_HAS_EARLY_PRINTK
 
 
 
 
 
 
 
 768	select SYS_SUPPORTS_64BIT_KERNEL
 769	select SYS_SUPPORTS_BIG_ENDIAN
 770	select WAR_R10000_LLSC
 771	select MIPS_L1_CACHE_SHIFT_7
 772	help
 773	  This is the SGI Indigo2 with R10000 processor.  To compile a Linux
 774	  kernel that runs on these, say Y here.
 775
 776config SGI_IP30
 777	bool "SGI IP30 (Octane/Octane2)"
 778	select ARCH_HAS_PHYS_TO_DMA
 779	select FW_ARC
 780	select FW_ARC64
 781	select BOOT_ELF64
 782	select CEVT_R4K
 783	select CSRC_R4K
 784	select FORCE_PCI
 785	select SYNC_R4K if SMP
 786	select ZONE_DMA32
 787	select HAVE_PCI
 788	select IRQ_MIPS_CPU
 789	select IRQ_DOMAIN_HIERARCHY
 790	select PCI_DRIVERS_GENERIC
 791	select PCI_XTALK_BRIDGE
 792	select SYS_HAS_EARLY_PRINTK
 793	select SYS_HAS_CPU_R10000
 794	select SYS_SUPPORTS_64BIT_KERNEL
 795	select SYS_SUPPORTS_BIG_ENDIAN
 796	select SYS_SUPPORTS_SMP
 797	select WAR_R10000_LLSC
 798	select MIPS_L1_CACHE_SHIFT_7
 799	select ARC_MEMORY
 800	help
 801	  These are the SGI Octane and Octane2 graphics workstations.  To
 802	  compile a Linux kernel that runs on these, say Y here.
 803
 804config SGI_IP32
 805	bool "SGI IP32 (O2)"
 806	select ARC_MEMORY
 807	select ARC_PROMLIB
 808	select ARCH_HAS_PHYS_TO_DMA
 809	select FW_ARC
 810	select FW_ARC32
 811	select BOOT_ELF32
 812	select CEVT_R4K
 813	select CSRC_R4K
 814	select DMA_NONCOHERENT
 815	select HAVE_PCI
 816	select IRQ_MIPS_CPU
 817	select R5000_CPU_SCACHE
 818	select RM7000_CPU_SCACHE
 819	select SYS_HAS_CPU_R5000
 820	select SYS_HAS_CPU_R10000 if BROKEN
 821	select SYS_HAS_CPU_RM7000
 822	select SYS_HAS_CPU_NEVADA
 823	select SYS_SUPPORTS_64BIT_KERNEL
 824	select SYS_SUPPORTS_BIG_ENDIAN
 825	select WAR_ICACHE_REFILLS
 826	help
 827	  If you want this kernel to run on SGI O2 workstation, say Y here.
 828
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 829config SIBYTE_CRHONE
 830	bool "Sibyte BCM91125C-CRhone"
 
 831	select BOOT_ELF32
 
 832	select SIBYTE_BCM1125
 833	select SWAP_IO_SPACE
 834	select SYS_HAS_CPU_SB1
 835	select SYS_SUPPORTS_BIG_ENDIAN
 836	select SYS_SUPPORTS_HIGHMEM
 837	select SYS_SUPPORTS_LITTLE_ENDIAN
 838
 839config SIBYTE_RHONE
 840	bool "Sibyte BCM91125E-Rhone"
 
 841	select BOOT_ELF32
 842	select SIBYTE_SB1250
 
 843	select SWAP_IO_SPACE
 844	select SYS_HAS_CPU_SB1
 845	select SYS_SUPPORTS_BIG_ENDIAN
 846	select SYS_SUPPORTS_LITTLE_ENDIAN
 847
 848config SIBYTE_SWARM
 849	bool "Sibyte BCM91250A-SWARM"
 850	select BOOT_ELF32
 
 851	select HAVE_PATA_PLATFORM
 
 852	select SIBYTE_SB1250
 853	select SWAP_IO_SPACE
 854	select SYS_HAS_CPU_SB1
 855	select SYS_SUPPORTS_BIG_ENDIAN
 856	select SYS_SUPPORTS_HIGHMEM
 857	select SYS_SUPPORTS_LITTLE_ENDIAN
 858	select ZONE_DMA32 if 64BIT
 859	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
 860
 861config SIBYTE_LITTLESUR
 862	bool "Sibyte BCM91250C2-LittleSur"
 
 863	select BOOT_ELF32
 
 864	select HAVE_PATA_PLATFORM
 
 865	select SIBYTE_SB1250
 866	select SWAP_IO_SPACE
 867	select SYS_HAS_CPU_SB1
 868	select SYS_SUPPORTS_BIG_ENDIAN
 869	select SYS_SUPPORTS_HIGHMEM
 870	select SYS_SUPPORTS_LITTLE_ENDIAN
 871	select ZONE_DMA32 if 64BIT
 872
 873config SIBYTE_SENTOSA
 874	bool "Sibyte BCM91250E-Sentosa"
 
 875	select BOOT_ELF32
 
 
 876	select SIBYTE_SB1250
 877	select SWAP_IO_SPACE
 878	select SYS_HAS_CPU_SB1
 879	select SYS_SUPPORTS_BIG_ENDIAN
 880	select SYS_SUPPORTS_LITTLE_ENDIAN
 881	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
 882
 883config SIBYTE_BIGSUR
 884	bool "Sibyte BCM91480B-BigSur"
 885	select BOOT_ELF32
 
 886	select NR_CPUS_DEFAULT_4
 887	select SIBYTE_BCM1x80
 888	select SWAP_IO_SPACE
 889	select SYS_HAS_CPU_SB1
 890	select SYS_SUPPORTS_BIG_ENDIAN
 891	select SYS_SUPPORTS_HIGHMEM
 892	select SYS_SUPPORTS_LITTLE_ENDIAN
 893	select ZONE_DMA32 if 64BIT
 894	select SWIOTLB if ARCH_DMA_ADDR_T_64BIT && PCI
 895
 896config SNI_RM
 897	bool "SNI RM200/300/400"
 898	select ARC_MEMORY
 899	select ARC_PROMLIB
 900	select FW_ARC if CPU_LITTLE_ENDIAN
 901	select FW_ARC32 if CPU_LITTLE_ENDIAN
 902	select FW_SNIPROM if CPU_BIG_ENDIAN
 903	select ARCH_MAY_HAVE_PC_FDC
 904	select ARCH_MIGHT_HAVE_PC_PARPORT
 905	select ARCH_MIGHT_HAVE_PC_SERIO
 906	select BOOT_ELF32
 907	select CEVT_R4K
 908	select CSRC_R4K
 909	select DEFAULT_SGI_PARTITION if CPU_BIG_ENDIAN
 910	select DMA_NONCOHERENT
 911	select GENERIC_ISA_DMA
 912	select HAVE_EISA
 913	select HAVE_PCSPKR_PLATFORM
 914	select HAVE_PCI
 915	select IRQ_MIPS_CPU
 
 916	select I8253
 917	select I8259
 918	select ISA
 919	select MIPS_L1_CACHE_SHIFT_6
 920	select SWAP_IO_SPACE if CPU_BIG_ENDIAN
 921	select SYS_HAS_CPU_R4X00
 922	select SYS_HAS_CPU_R5000
 923	select SYS_HAS_CPU_R10000
 924	select R5000_CPU_SCACHE
 925	select SYS_HAS_EARLY_PRINTK
 926	select SYS_SUPPORTS_32BIT_KERNEL
 927	select SYS_SUPPORTS_64BIT_KERNEL
 928	select SYS_SUPPORTS_BIG_ENDIAN
 929	select SYS_SUPPORTS_HIGHMEM
 930	select SYS_SUPPORTS_LITTLE_ENDIAN
 931	select WAR_R4600_V2_HIT_CACHEOP
 932	help
 933	  The SNI RM200/300/400 are MIPS-based machines manufactured by
 934	  Siemens Nixdorf Informationssysteme (SNI), parent company of Pyramid
 935	  Technology and now in turn merged with Fujitsu.  Say Y here to
 936	  support this machine type.
 937
 
 
 
 938config MACH_TX49XX
 939	bool "Toshiba TX49 series based machines"
 940	select WAR_TX49XX_ICACHE_INDEX_INV
 941
 942config MIKROTIK_RB532
 943	bool "Mikrotik RB532 boards"
 944	select CEVT_R4K
 945	select CSRC_R4K
 946	select DMA_NONCOHERENT
 947	select HAVE_PCI
 948	select IRQ_MIPS_CPU
 949	select SYS_HAS_CPU_MIPS32_R1
 950	select SYS_SUPPORTS_32BIT_KERNEL
 951	select SYS_SUPPORTS_LITTLE_ENDIAN
 952	select SWAP_IO_SPACE
 953	select BOOT_RAW
 954	select GPIOLIB
 955	select MIPS_L1_CACHE_SHIFT_4
 956	help
 957	  Support the Mikrotik(tm) RouterBoard 532 series,
 958	  based on the IDT RC32434 SoC.
 959
 960config CAVIUM_OCTEON_SOC
 961	bool "Cavium Networks Octeon SoC based boards"
 962	select CEVT_R4K
 963	select ARCH_HAS_PHYS_TO_DMA
 964	select HAVE_RAPIDIO
 965	select PHYS_ADDR_T_64BIT
 
 
 
 
 
 
 
 
 
 
 966	select SYS_SUPPORTS_64BIT_KERNEL
 967	select SYS_SUPPORTS_BIG_ENDIAN
 968	select EDAC_SUPPORT
 969	select EDAC_ATOMIC_SCRUB
 970	select SYS_SUPPORTS_LITTLE_ENDIAN
 971	select SYS_SUPPORTS_HOTPLUG_CPU if CPU_BIG_ENDIAN
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 972	select SYS_HAS_EARLY_PRINTK
 973	select SYS_HAS_CPU_CAVIUM_OCTEON
 974	select HAVE_PCI
 975	select HAVE_PLAT_DELAY
 976	select HAVE_PLAT_FW_INIT_CMDLINE
 977	select HAVE_PLAT_MEMCPY
 978	select ZONE_DMA32
 979	select GPIOLIB
 980	select USE_OF
 981	select ARCH_SPARSEMEM_ENABLE
 982	select SYS_SUPPORTS_SMP
 983	select NR_CPUS_DEFAULT_64
 984	select MIPS_NR_CPU_NR_MAP_1024
 985	select BUILTIN_DTB
 986	select MTD
 987	select MTD_COMPLEX_MAPPINGS
 988	select SWIOTLB
 989	select SYS_SUPPORTS_RELOCATABLE
 990	help
 991	  This option supports all of the Octeon reference boards from Cavium
 992	  Networks. It builds a kernel that dynamically determines the Octeon
 993	  CPU type and supports all known board reference implementations.
 994	  Some of the supported boards are:
 995		EBT3000
 996		EBH3000
 997		EBH3100
 998		Thunder
 999		Kodama
1000		Hikari
1001	  Say Y here for most Octeon reference boards.
1002
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1003endchoice
1004
1005config FIT_IMAGE_FDT_EPM5
1006	bool "Include FDT for Mobileye EyeQ5 development platforms"
1007	depends on MACH_EYEQ5
1008	default n
1009	help
1010	  Enable this to include the FDT for the EyeQ5 development platforms
1011	  from Mobileye in the FIT kernel image.
1012	  This requires u-boot on the platform.
1013
1014source "arch/mips/alchemy/Kconfig"
1015source "arch/mips/ath25/Kconfig"
1016source "arch/mips/ath79/Kconfig"
1017source "arch/mips/bcm47xx/Kconfig"
1018source "arch/mips/bcm63xx/Kconfig"
1019source "arch/mips/bmips/Kconfig"
1020source "arch/mips/generic/Kconfig"
1021source "arch/mips/ingenic/Kconfig"
1022source "arch/mips/jazz/Kconfig"
 
1023source "arch/mips/lantiq/Kconfig"
1024source "arch/mips/mobileye/Kconfig"
1025source "arch/mips/pic32/Kconfig"
1026source "arch/mips/ralink/Kconfig"
1027source "arch/mips/sgi-ip27/Kconfig"
1028source "arch/mips/sibyte/Kconfig"
1029source "arch/mips/txx9/Kconfig"
 
1030source "arch/mips/cavium-octeon/Kconfig"
1031source "arch/mips/loongson2ef/Kconfig"
1032source "arch/mips/loongson32/Kconfig"
1033source "arch/mips/loongson64/Kconfig"
1034
1035endmenu
1036
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1037config GENERIC_HWEIGHT
1038	bool
1039	default y
1040
1041config GENERIC_CALIBRATE_DELAY
1042	bool
1043	default y
1044
 
 
 
 
 
 
 
 
1045config SCHED_OMIT_FRAME_POINTER
1046	bool
1047	default y
1048
1049#
1050# Select some configuration options automatically based on user selections.
1051#
1052config FW_ARC
1053	bool
1054
1055config ARCH_MAY_HAVE_PC_FDC
1056	bool
1057
1058config BOOT_RAW
1059	bool
1060
1061config CEVT_BCM1480
1062	bool
1063
1064config CEVT_DS1287
1065	bool
1066
1067config CEVT_GT641XX
1068	bool
1069
 
 
 
1070config CEVT_R4K
 
1071	bool
1072
1073config CEVT_SB1250
1074	bool
1075
1076config CEVT_TXX9
1077	bool
1078
1079config CSRC_BCM1480
1080	bool
1081
1082config CSRC_IOASIC
1083	bool
1084
 
 
 
 
 
 
1085config CSRC_R4K
1086	select CLOCKSOURCE_WATCHDOG if CPU_FREQ
1087	bool
1088
1089config CSRC_SB1250
1090	bool
1091
1092config MIPS_CLOCK_VSYSCALL
1093	def_bool CSRC_R4K || CLKSRC_MIPS_GIC
1094
1095config GPIO_TXX9
1096	select GPIOLIB
 
1097	bool
1098
1099config FW_CFE
1100	bool
1101
1102config ARCH_SUPPORTS_UPROBES
1103	def_bool y
 
 
 
1104
1105config DMA_NONCOHERENT
1106	bool
1107	#
1108	# MIPS allows mixing "slightly different" Cacheability and Coherency
1109	# Attribute bits.  It is believed that the uncached access through
1110	# KSEG1 and the implementation specific "uncached accelerated" used
1111	# by pgprot_writcombine can be mixed, and the latter sometimes provides
1112	# significant advantages.
1113	#
1114	select ARCH_HAS_SETUP_DMA_OPS
1115	select ARCH_HAS_DMA_WRITE_COMBINE
1116	select ARCH_HAS_DMA_PREP_COHERENT
1117	select ARCH_HAS_SYNC_DMA_FOR_CPU
1118	select ARCH_HAS_SYNC_DMA_FOR_DEVICE
1119	select ARCH_HAS_DMA_SET_UNCACHED
1120	select DMA_NONCOHERENT_MMAP
1121	select NEED_DMA_MAP_STATE
1122
 
 
 
1123config SYS_HAS_EARLY_PRINTK
1124	bool
1125
 
 
 
 
 
 
 
 
 
 
1126config SYS_SUPPORTS_HOTPLUG_CPU
1127	bool
1128
 
 
 
1129config MIPS_BONITO64
1130	bool
1131
1132config MIPS_MSC
1133	bool
1134
 
 
 
 
 
 
1135config SYNC_R4K
1136	bool
1137
1138config NO_IOPORT_MAP
1139	def_bool n
1140
1141config GENERIC_CSUM
1142	def_bool CPU_NO_LOAD_STORE_LR
1143
1144config GENERIC_ISA_DMA
1145	bool
1146	select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
1147	select ISA_DMA_API
1148
1149config GENERIC_ISA_DMA_SUPPORT_BROKEN
1150	bool
1151	select GENERIC_ISA_DMA
1152
1153config HAVE_PLAT_DELAY
1154	bool
1155
1156config HAVE_PLAT_FW_INIT_CMDLINE
1157	bool
1158
1159config HAVE_PLAT_MEMCPY
1160	bool
1161
1162config ISA_DMA_API
1163	bool
1164
1165config SYS_SUPPORTS_RELOCATABLE
1166	bool
1167	help
1168	  Selected if the platform supports relocating the kernel.
1169	  The platform must provide plat_get_fdt() if it selects CONFIG_USE_OF
1170	  to allow access to command line and entropy sources.
1171
1172#
1173# Endianness selection.  Sufficiently obscure so many users don't know what to
1174# answer,so we try hard to limit the available choices.  Also the use of a
1175# choice statement should be more obvious to the user.
1176#
1177choice
1178	prompt "Endianness selection"
1179	help
1180	  Some MIPS machines can be configured for either little or big endian
1181	  byte order. These modes require different kernels and a different
1182	  Linux distribution.  In general there is one preferred byteorder for a
1183	  particular system but some systems are just as commonly used in the
1184	  one or the other endianness.
1185
1186config CPU_BIG_ENDIAN
1187	bool "Big endian"
1188	depends on SYS_SUPPORTS_BIG_ENDIAN
1189
1190config CPU_LITTLE_ENDIAN
1191	bool "Little endian"
1192	depends on SYS_SUPPORTS_LITTLE_ENDIAN
 
1193
1194endchoice
1195
1196config EXPORT_UASM
1197	bool
1198
1199config SYS_SUPPORTS_APM_EMULATION
1200	bool
1201
1202config SYS_SUPPORTS_BIG_ENDIAN
1203	bool
1204
1205config SYS_SUPPORTS_LITTLE_ENDIAN
1206	bool
1207
1208config MIPS_HUGE_TLB_SUPPORT
1209	def_bool HUGETLB_PAGE || TRANSPARENT_HUGEPAGE
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1210
1211config IRQ_TXX9
1212	bool
1213
1214config IRQ_GT641XX
1215	bool
1216
 
 
 
 
 
 
1217config PCI_GT64XXX_PCI0
1218	bool
1219
1220config PCI_XTALK_BRIDGE
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1221	bool
 
1222
1223config NO_EXCEPT_FILL
1224	bool
 
1225
1226config MIPS_SPRAM
1227	bool
 
 
 
 
 
 
1228
1229config SWAP_IO_SPACE
1230	bool
1231
 
 
 
1232config SGI_HAS_INDYDOG
1233	bool
1234
1235config SGI_HAS_HAL2
1236	bool
1237
1238config SGI_HAS_SEEQ
1239	bool
1240
1241config SGI_HAS_WD93
1242	bool
1243
1244config SGI_HAS_ZILOG
1245	bool
1246
1247config SGI_HAS_I8042
1248	bool
1249
1250config DEFAULT_SGI_PARTITION
1251	bool
1252
1253config FW_ARC32
1254	bool
1255
1256config FW_SNIPROM
1257	bool
1258
1259config BOOT_ELF32
1260	bool
1261
1262config MIPS_L1_CACHE_SHIFT_4
1263	bool
1264
1265config MIPS_L1_CACHE_SHIFT_5
1266	bool
1267
1268config MIPS_L1_CACHE_SHIFT_6
1269	bool
1270
1271config MIPS_L1_CACHE_SHIFT_7
1272	bool
1273
1274config MIPS_L1_CACHE_SHIFT
1275	int
1276	default "7" if MIPS_L1_CACHE_SHIFT_7
1277	default "6" if MIPS_L1_CACHE_SHIFT_6
1278	default "5" if MIPS_L1_CACHE_SHIFT_5
1279	default "4" if MIPS_L1_CACHE_SHIFT_4
1280	default "5"
1281
1282config ARC_CMDLINE_ONLY
1283	bool
1284
1285config ARC_CONSOLE
1286	bool "ARC console support"
1287	depends on SGI_IP22 || SGI_IP28 || (SNI_RM && CPU_LITTLE_ENDIAN)
1288
1289config ARC_MEMORY
1290	bool
 
 
1291
1292config ARC_PROMLIB
1293	bool
 
 
1294
1295config FW_ARC64
1296	bool
1297
1298config BOOT_ELF64
1299	bool
1300
1301menu "CPU selection"
1302
1303choice
1304	prompt "CPU type"
1305	default CPU_R4X00
1306
1307config CPU_LOONGSON64
1308	bool "Loongson 64-bit CPU"
1309	depends on SYS_HAS_CPU_LOONGSON64
1310	select ARCH_HAS_PHYS_TO_DMA
1311	select CPU_MIPSR2
1312	select CPU_HAS_PREFETCH
1313	select CPU_SUPPORTS_64BIT_KERNEL
1314	select CPU_SUPPORTS_HIGHMEM
1315	select CPU_SUPPORTS_HUGEPAGES
1316	select CPU_SUPPORTS_MSA
1317	select CPU_SUPPORTS_VZ
1318	select CPU_DIEI_BROKEN if !LOONGSON3_ENHANCEMENT
1319	select CPU_MIPSR2_IRQ_VI
1320	select DMA_NONCOHERENT
1321	select WEAK_ORDERING
1322	select WEAK_REORDERING_BEYOND_LLSC
1323	select MIPS_ASID_BITS_VARIABLE
1324	select MIPS_PGD_C0_CONTEXT
1325	select MIPS_L1_CACHE_SHIFT_6
1326	select MIPS_FP_SUPPORT
1327	select GPIOLIB
1328	select SWIOTLB
1329	help
1330	  The Loongson GSx64(GS264/GS464/GS464E/GS464V) series of processor
1331	  cores implements the MIPS64R2 instruction set with many extensions,
1332	  including most 64-bit Loongson-2 (2H, 2K) and Loongson-3 (3A1000,
1333	  3B1000, 3B1500, 3A2000, 3A3000 and 3A4000) processors. However, old
1334	  Loongson-2E/2F is not covered here and will be removed in future.
1335
1336config CPU_LOONGSON2E
1337	bool "Loongson 2E"
1338	depends on SYS_HAS_CPU_LOONGSON2E
1339	select CPU_LOONGSON2EF
1340	help
1341	  The Loongson 2E processor implements the MIPS III instruction set
1342	  with many extensions.
1343
1344	  It has an internal FPGA northbridge, which is compatible to
1345	  bonito64.
1346
1347config CPU_LOONGSON2F
1348	bool "Loongson 2F"
1349	depends on SYS_HAS_CPU_LOONGSON2F
1350	select CPU_LOONGSON2EF
 
 
1351	help
1352	  The Loongson 2F processor implements the MIPS III instruction set
1353	  with many extensions.
1354
1355	  Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller
1356	  have a similar programming interface with FPGA northbridge used in
1357	  Loongson2E.
1358
1359config CPU_LOONGSON1B
1360	bool "Loongson 1B"
1361	depends on SYS_HAS_CPU_LOONGSON1B
1362	select CPU_LOONGSON32
1363	select LEDS_GPIO_REGISTER
1364	help
1365	  The Loongson 1B is a 32-bit SoC, which implements the MIPS32
1366	  Release 1 instruction set and part of the MIPS32 Release 2
1367	  instruction set.
1368
1369config CPU_LOONGSON1C
1370	bool "Loongson 1C"
1371	depends on SYS_HAS_CPU_LOONGSON1C
1372	select CPU_LOONGSON32
1373	select LEDS_GPIO_REGISTER
1374	help
1375	  The Loongson 1C is a 32-bit SoC, which implements the MIPS32
1376	  Release 1 instruction set and part of the MIPS32 Release 2
1377	  instruction set.
1378
1379config CPU_MIPS32_R1
1380	bool "MIPS32 Release 1"
1381	depends on SYS_HAS_CPU_MIPS32_R1
1382	select CPU_HAS_PREFETCH
1383	select CPU_SUPPORTS_32BIT_KERNEL
1384	select CPU_SUPPORTS_HIGHMEM
1385	help
1386	  Choose this option to build a kernel for release 1 or later of the
1387	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1388	  MIPS processor are based on a MIPS32 processor.  If you know the
1389	  specific type of processor in your system, choose those that one
1390	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1391	  Release 2 of the MIPS32 architecture is available since several
1392	  years so chances are you even have a MIPS32 Release 2 processor
1393	  in which case you should choose CPU_MIPS32_R2 instead for better
1394	  performance.
1395
1396config CPU_MIPS32_R2
1397	bool "MIPS32 Release 2"
1398	depends on SYS_HAS_CPU_MIPS32_R2
1399	select CPU_HAS_PREFETCH
1400	select CPU_SUPPORTS_32BIT_KERNEL
1401	select CPU_SUPPORTS_HIGHMEM
1402	select CPU_SUPPORTS_MSA
1403	help
1404	  Choose this option to build a kernel for release 2 or later of the
1405	  MIPS32 architecture.  Most modern embedded systems with a 32-bit
1406	  MIPS processor are based on a MIPS32 processor.  If you know the
1407	  specific type of processor in your system, choose those that one
1408	  otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1409
1410config CPU_MIPS32_R5
1411	bool "MIPS32 Release 5"
1412	depends on SYS_HAS_CPU_MIPS32_R5
1413	select CPU_HAS_PREFETCH
1414	select CPU_SUPPORTS_32BIT_KERNEL
1415	select CPU_SUPPORTS_HIGHMEM
1416	select CPU_SUPPORTS_MSA
1417	select CPU_SUPPORTS_VZ
1418	select MIPS_O32_FP64_SUPPORT
1419	help
1420	  Choose this option to build a kernel for release 5 or later of the
1421	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1422	  family, are based on a MIPS32r5 processor. If you own an older
1423	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1424
1425config CPU_MIPS32_R6
1426	bool "MIPS32 Release 6"
1427	depends on SYS_HAS_CPU_MIPS32_R6
1428	select CPU_HAS_PREFETCH
1429	select CPU_NO_LOAD_STORE_LR
1430	select CPU_SUPPORTS_32BIT_KERNEL
1431	select CPU_SUPPORTS_HIGHMEM
1432	select CPU_SUPPORTS_MSA
1433	select CPU_SUPPORTS_VZ
1434	select MIPS_O32_FP64_SUPPORT
1435	help
1436	  Choose this option to build a kernel for release 6 or later of the
1437	  MIPS32 architecture.  New MIPS processors, starting with the Warrior
1438	  family, are based on a MIPS32r6 processor. If you own an older
1439	  processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1440
1441config CPU_MIPS64_R1
1442	bool "MIPS64 Release 1"
1443	depends on SYS_HAS_CPU_MIPS64_R1
1444	select CPU_HAS_PREFETCH
1445	select CPU_SUPPORTS_32BIT_KERNEL
1446	select CPU_SUPPORTS_64BIT_KERNEL
1447	select CPU_SUPPORTS_HIGHMEM
1448	select CPU_SUPPORTS_HUGEPAGES
1449	help
1450	  Choose this option to build a kernel for release 1 or later of the
1451	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1452	  MIPS processor are based on a MIPS64 processor.  If you know the
1453	  specific type of processor in your system, choose those that one
1454	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1455	  Release 2 of the MIPS64 architecture is available since several
1456	  years so chances are you even have a MIPS64 Release 2 processor
1457	  in which case you should choose CPU_MIPS64_R2 instead for better
1458	  performance.
1459
1460config CPU_MIPS64_R2
1461	bool "MIPS64 Release 2"
1462	depends on SYS_HAS_CPU_MIPS64_R2
1463	select CPU_HAS_PREFETCH
1464	select CPU_SUPPORTS_32BIT_KERNEL
1465	select CPU_SUPPORTS_64BIT_KERNEL
1466	select CPU_SUPPORTS_HIGHMEM
1467	select CPU_SUPPORTS_HUGEPAGES
1468	select CPU_SUPPORTS_MSA
1469	help
1470	  Choose this option to build a kernel for release 2 or later of the
1471	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
1472	  MIPS processor are based on a MIPS64 processor.  If you know the
1473	  specific type of processor in your system, choose those that one
1474	  otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1475
1476config CPU_MIPS64_R5
1477	bool "MIPS64 Release 5"
1478	depends on SYS_HAS_CPU_MIPS64_R5
1479	select CPU_HAS_PREFETCH
1480	select CPU_SUPPORTS_32BIT_KERNEL
1481	select CPU_SUPPORTS_64BIT_KERNEL
1482	select CPU_SUPPORTS_HIGHMEM
1483	select CPU_SUPPORTS_HUGEPAGES
1484	select CPU_SUPPORTS_MSA
1485	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1486	select CPU_SUPPORTS_VZ
1487	help
1488	  Choose this option to build a kernel for release 5 or later of the
1489	  MIPS64 architecture.  This is a intermediate MIPS architecture
1490	  release partly implementing release 6 features. Though there is no
1491	  any hardware known to be based on this release.
1492
1493config CPU_MIPS64_R6
1494	bool "MIPS64 Release 6"
1495	depends on SYS_HAS_CPU_MIPS64_R6
1496	select CPU_HAS_PREFETCH
1497	select CPU_NO_LOAD_STORE_LR
1498	select CPU_SUPPORTS_32BIT_KERNEL
1499	select CPU_SUPPORTS_64BIT_KERNEL
1500	select CPU_SUPPORTS_HIGHMEM
1501	select CPU_SUPPORTS_HUGEPAGES
1502	select CPU_SUPPORTS_MSA
1503	select MIPS_O32_FP64_SUPPORT if 32BIT || MIPS32_O32
1504	select CPU_SUPPORTS_VZ
1505	help
1506	  Choose this option to build a kernel for release 6 or later of the
1507	  MIPS64 architecture.  New MIPS processors, starting with the Warrior
1508	  family, are based on a MIPS64r6 processor. If you own an older
1509	  processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1510
1511config CPU_P5600
1512	bool "MIPS Warrior P5600"
1513	depends on SYS_HAS_CPU_P5600
1514	select CPU_HAS_PREFETCH
1515	select CPU_SUPPORTS_32BIT_KERNEL
1516	select CPU_SUPPORTS_HIGHMEM
1517	select CPU_SUPPORTS_MSA
1518	select CPU_SUPPORTS_CPUFREQ
1519	select CPU_SUPPORTS_VZ
1520	select CPU_MIPSR2_IRQ_VI
1521	select CPU_MIPSR2_IRQ_EI
1522	select MIPS_O32_FP64_SUPPORT
1523	help
1524	  Choose this option to build a kernel for MIPS Warrior P5600 CPU.
1525	  It's based on MIPS32r5 ISA with XPA, EVA, dual/quad issue exec pipes,
1526	  MMU with two-levels TLB, UCA, MSA, MDU core level features and system
1527	  level features like up to six P5600 calculation cores, CM2 with L2
1528	  cache, IOCU/IOMMU (though might be unused depending on the system-
1529	  specific IP core configuration), GIC, CPC, virtualisation module,
1530	  eJTAG and PDtrace.
1531
1532config CPU_R3000
1533	bool "R3000"
1534	depends on SYS_HAS_CPU_R3000
1535	select CPU_HAS_WB
1536	select CPU_R3K_TLB
1537	select CPU_SUPPORTS_32BIT_KERNEL
1538	select CPU_SUPPORTS_HIGHMEM
1539	help
1540	  Please make sure to pick the right CPU type. Linux/MIPS is not
1541	  designed to be generic, i.e. Kernels compiled for R3000 CPUs will
1542	  *not* work on R4000 machines and vice versa.  However, since most
1543	  of the supported machines have an R4000 (or similar) CPU, R4x00
1544	  might be a safe bet.  If the resulting kernel does not work,
1545	  try to recompile with R3000.
1546
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1547config CPU_R4300
1548	bool "R4300"
1549	depends on SYS_HAS_CPU_R4300
1550	select CPU_SUPPORTS_32BIT_KERNEL
1551	select CPU_SUPPORTS_64BIT_KERNEL
1552	help
1553	  MIPS Technologies R4300-series processors.
1554
1555config CPU_R4X00
1556	bool "R4x00"
1557	depends on SYS_HAS_CPU_R4X00
1558	select CPU_SUPPORTS_32BIT_KERNEL
1559	select CPU_SUPPORTS_64BIT_KERNEL
1560	select CPU_SUPPORTS_HUGEPAGES
1561	help
1562	  MIPS Technologies R4000-series processors other than 4300, including
1563	  the R4000, R4400, R4600, and 4700.
1564
1565config CPU_TX49XX
1566	bool "R49XX"
1567	depends on SYS_HAS_CPU_TX49XX
1568	select CPU_HAS_PREFETCH
1569	select CPU_SUPPORTS_32BIT_KERNEL
1570	select CPU_SUPPORTS_64BIT_KERNEL
1571	select CPU_SUPPORTS_HUGEPAGES
1572
1573config CPU_R5000
1574	bool "R5000"
1575	depends on SYS_HAS_CPU_R5000
1576	select CPU_SUPPORTS_32BIT_KERNEL
1577	select CPU_SUPPORTS_64BIT_KERNEL
1578	select CPU_SUPPORTS_HUGEPAGES
1579	help
1580	  MIPS Technologies R5000-series processors other than the Nevada.
1581
 
 
 
 
 
 
1582config CPU_R5500
1583	bool "R5500"
1584	depends on SYS_HAS_CPU_R5500
1585	select CPU_SUPPORTS_32BIT_KERNEL
1586	select CPU_SUPPORTS_64BIT_KERNEL
1587	select CPU_SUPPORTS_HUGEPAGES
1588	help
1589	  NEC VR5500 and VR5500A series processors implement 64-bit MIPS IV
1590	  instruction set.
1591
 
 
 
 
 
 
 
 
 
1592config CPU_NEVADA
1593	bool "RM52xx"
1594	depends on SYS_HAS_CPU_NEVADA
1595	select CPU_SUPPORTS_32BIT_KERNEL
1596	select CPU_SUPPORTS_64BIT_KERNEL
1597	select CPU_SUPPORTS_HUGEPAGES
1598	help
1599	  QED / PMC-Sierra RM52xx-series ("Nevada") processors.
1600
 
 
 
 
 
 
 
 
 
 
1601config CPU_R10000
1602	bool "R10000"
1603	depends on SYS_HAS_CPU_R10000
1604	select CPU_HAS_PREFETCH
1605	select CPU_SUPPORTS_32BIT_KERNEL
1606	select CPU_SUPPORTS_64BIT_KERNEL
1607	select CPU_SUPPORTS_HIGHMEM
1608	select CPU_SUPPORTS_HUGEPAGES
1609	help
1610	  MIPS Technologies R10000-series processors.
1611
1612config CPU_RM7000
1613	bool "RM7000"
1614	depends on SYS_HAS_CPU_RM7000
1615	select CPU_HAS_PREFETCH
1616	select CPU_SUPPORTS_32BIT_KERNEL
1617	select CPU_SUPPORTS_64BIT_KERNEL
1618	select CPU_SUPPORTS_HIGHMEM
1619	select CPU_SUPPORTS_HUGEPAGES
 
 
 
 
 
 
 
 
1620
1621config CPU_SB1
1622	bool "SB1"
1623	depends on SYS_HAS_CPU_SB1
1624	select CPU_SUPPORTS_32BIT_KERNEL
1625	select CPU_SUPPORTS_64BIT_KERNEL
1626	select CPU_SUPPORTS_HIGHMEM
1627	select CPU_SUPPORTS_HUGEPAGES
1628	select WEAK_ORDERING
1629
1630config CPU_CAVIUM_OCTEON
1631	bool "Cavium Octeon processor"
1632	depends on SYS_HAS_CPU_CAVIUM_OCTEON
1633	select CPU_HAS_PREFETCH
1634	select CPU_SUPPORTS_64BIT_KERNEL
1635	select HAVE_PAGE_SIZE_8KB if !MIPS_VA_BITS_48
1636	select HAVE_PAGE_SIZE_32KB if !MIPS_VA_BITS_48
1637	select WEAK_ORDERING
1638	select CPU_SUPPORTS_HIGHMEM
1639	select CPU_SUPPORTS_HUGEPAGES
1640	select USB_EHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1641	select USB_OHCI_BIG_ENDIAN_MMIO if CPU_BIG_ENDIAN
1642	select MIPS_L1_CACHE_SHIFT_7
1643	select CPU_SUPPORTS_VZ
1644	help
1645	  The Cavium Octeon processor is a highly integrated chip containing
1646	  many ethernet hardware widgets for networking tasks. The processor
1647	  can have up to 16 Mips64v2 cores and 8 integrated gigabit ethernets.
1648	  Full details can be found at http://www.caviumnetworks.com.
1649
1650config CPU_BMIPS
1651	bool "Broadcom BMIPS"
1652	depends on SYS_HAS_CPU_BMIPS
1653	select CPU_MIPS32
1654	select CPU_BMIPS32_3300 if SYS_HAS_CPU_BMIPS32_3300
1655	select CPU_BMIPS4350 if SYS_HAS_CPU_BMIPS4350
1656	select CPU_BMIPS4380 if SYS_HAS_CPU_BMIPS4380
1657	select CPU_BMIPS5000 if SYS_HAS_CPU_BMIPS5000
1658	select CPU_SUPPORTS_32BIT_KERNEL
1659	select DMA_NONCOHERENT
1660	select IRQ_MIPS_CPU
1661	select SWAP_IO_SPACE
 
1662	select WEAK_ORDERING
1663	select CPU_SUPPORTS_HIGHMEM
1664	select CPU_HAS_PREFETCH
1665	select CPU_SUPPORTS_CPUFREQ
1666	select MIPS_EXTERNAL_TIMER
1667	select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
1668	help
1669	  Support for BMIPS32/3300/4350/4380 and BMIPS5000 processors.
1670
1671endchoice
1672
1673config LOONGSON3_ENHANCEMENT
1674	bool "New Loongson-3 CPU Enhancements"
1675	default n
1676	depends on CPU_LOONGSON64
 
 
 
 
1677	help
1678	  New Loongson-3 cores (since Loongson-3A R2, as opposed to Loongson-3A
1679	  R1, Loongson-3B R1 and Loongson-3B R2) has many enhancements, such as
1680	  FTLB, L1-VCache, EI/DI/Wait/Prefetch instruction, DSP/DSPr2 ASE, User
1681	  Local register, Read-Inhibit/Execute-Inhibit, SFB (Store Fill Buffer),
1682	  Fast TLB refill support, etc.
1683
1684	  This option enable those enhancements which are not probed at run
1685	  time. If you want a generic kernel to run on all Loongson 3 machines,
1686	  please say 'N' here. If you want a high-performance kernel to run on
1687	  new Loongson-3 machines only, please say 'Y' here.
1688
1689config CPU_LOONGSON3_WORKAROUNDS
1690	bool "Loongson-3 LLSC Workarounds"
1691	default y if SMP
1692	depends on CPU_LOONGSON64
1693	help
1694	  Loongson-3 processors have the llsc issues which require workarounds.
1695	  Without workarounds the system may hang unexpectedly.
1696
1697	  Say Y, unless you know what you are doing.
1698
1699config CPU_LOONGSON3_CPUCFG_EMULATION
1700	bool "Emulate the CPUCFG instruction on older Loongson cores"
1701	default y
1702	depends on CPU_LOONGSON64
1703	help
1704	  Loongson-3A R4 and newer have the CPUCFG instruction available for
1705	  userland to query CPU capabilities, much like CPUID on x86. This
1706	  option provides emulation of the instruction on older Loongson
1707	  cores, back to Loongson-3A1000.
1708
1709	  If unsure, please say Y.
1710
1711config CPU_MIPS32_3_5_FEATURES
1712	bool "MIPS32 Release 3.5 Features"
1713	depends on SYS_HAS_CPU_MIPS32_R3_5
1714	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_MIPS32_R6 || \
1715		   CPU_P5600
 
 
 
1716	help
1717	  Choose this option to build a kernel for release 2 or later of the
1718	  MIPS32 architecture including features from the 3.5 release such as
1719	  support for Enhanced Virtual Addressing (EVA).
1720
1721config CPU_MIPS32_3_5_EVA
1722	bool "Enhanced Virtual Addressing (EVA)"
1723	depends on CPU_MIPS32_3_5_FEATURES
1724	select EVA
1725	default y
1726	help
1727	  Choose this option if you want to enable the Enhanced Virtual
1728	  Addressing (EVA) on your MIPS32 core (such as proAptiv).
1729	  One of its primary benefits is an increase in the maximum size
1730	  of lowmem (up to 3GB). If unsure, say 'N' here.
1731
1732config CPU_MIPS32_R5_FEATURES
1733	bool "MIPS32 Release 5 Features"
1734	depends on SYS_HAS_CPU_MIPS32_R5
1735	depends on CPU_MIPS32_R2 || CPU_MIPS32_R5 || CPU_P5600
1736	help
1737	  Choose this option to build a kernel for release 2 or later of the
1738	  MIPS32 architecture including features from release 5 such as
1739	  support for Extended Physical Addressing (XPA).
1740
1741config CPU_MIPS32_R5_XPA
1742	bool "Extended Physical Addressing (XPA)"
1743	depends on CPU_MIPS32_R5_FEATURES
1744	depends on !EVA
1745	depends on !PAGE_SIZE_4KB
1746	depends on SYS_SUPPORTS_HIGHMEM
1747	select XPA
1748	select HIGHMEM
1749	select PHYS_ADDR_T_64BIT
1750	default n
1751	help
1752	  Choose this option if you want to enable the Extended Physical
1753	  Addressing (XPA) on your MIPS32 core (such as P5600 series). The
1754	  benefit is to increase physical addressing equal to or greater
1755	  than 40 bits. Note that this has the side effect of turning on
1756	  64-bit addressing which in turn makes the PTEs 64-bit in size.
1757	  If unsure, say 'N' here.
1758
1759if CPU_LOONGSON2F
1760config CPU_NOP_WORKAROUNDS
1761	bool
1762
1763config CPU_JUMP_WORKAROUNDS
1764	bool
1765
1766config CPU_LOONGSON2F_WORKAROUNDS
1767	bool "Loongson 2F Workarounds"
1768	default y
1769	select CPU_NOP_WORKAROUNDS
1770	select CPU_JUMP_WORKAROUNDS
1771	help
1772	  Loongson 2F01 / 2F02 processors have the NOP & JUMP issues which
1773	  require workarounds.  Without workarounds the system may hang
1774	  unexpectedly.  For more information please refer to the gas
1775	  -mfix-loongson2f-nop and -mfix-loongson2f-jump options.
1776
1777	  Loongson 2F03 and later have fixed these issues and no workarounds
1778	  are needed.  The workarounds have no significant side effect on them
1779	  but may decrease the performance of the system so this option should
1780	  be disabled unless the kernel is intended to be run on 2F01 or 2F02
1781	  systems.
1782
1783	  If unsure, please say Y.
1784endif # CPU_LOONGSON2F
1785
1786config SYS_SUPPORTS_ZBOOT
1787	bool
1788	select HAVE_KERNEL_GZIP
1789	select HAVE_KERNEL_BZIP2
1790	select HAVE_KERNEL_LZ4
1791	select HAVE_KERNEL_LZMA
1792	select HAVE_KERNEL_LZO
1793	select HAVE_KERNEL_XZ
1794	select HAVE_KERNEL_ZSTD
1795
1796config SYS_SUPPORTS_ZBOOT_UART16550
1797	bool
1798	select SYS_SUPPORTS_ZBOOT
1799
1800config SYS_SUPPORTS_ZBOOT_UART_PROM
1801	bool
1802	select SYS_SUPPORTS_ZBOOT
1803
1804config CPU_LOONGSON2EF
1805	bool
1806	select CPU_SUPPORTS_32BIT_KERNEL
1807	select CPU_SUPPORTS_64BIT_KERNEL
1808	select CPU_SUPPORTS_HIGHMEM
1809	select CPU_SUPPORTS_HUGEPAGES
1810
1811config CPU_LOONGSON32
1812	bool
1813	select CPU_MIPS32
1814	select CPU_MIPSR2
1815	select CPU_HAS_PREFETCH
1816	select CPU_SUPPORTS_32BIT_KERNEL
1817	select CPU_SUPPORTS_HIGHMEM
1818	select CPU_SUPPORTS_CPUFREQ
1819
1820config CPU_BMIPS32_3300
1821	select SMP_UP if SMP
1822	bool
1823
1824config CPU_BMIPS4350
1825	bool
1826	select SYS_SUPPORTS_SMP
1827	select SYS_SUPPORTS_HOTPLUG_CPU
1828
1829config CPU_BMIPS4380
1830	bool
1831	select MIPS_L1_CACHE_SHIFT_6
1832	select SYS_SUPPORTS_SMP
1833	select SYS_SUPPORTS_HOTPLUG_CPU
1834	select CPU_HAS_RIXI
1835
1836config CPU_BMIPS5000
1837	bool
1838	select MIPS_CPU_SCACHE
1839	select MIPS_L1_CACHE_SHIFT_7
1840	select SYS_SUPPORTS_SMP
1841	select SYS_SUPPORTS_HOTPLUG_CPU
1842	select CPU_HAS_RIXI
1843
1844config SYS_HAS_CPU_LOONGSON64
1845	bool
1846	select CPU_SUPPORTS_CPUFREQ
1847	select CPU_HAS_RIXI
1848
1849config SYS_HAS_CPU_LOONGSON2E
1850	bool
1851
1852config SYS_HAS_CPU_LOONGSON2F
1853	bool
1854	select CPU_SUPPORTS_CPUFREQ
1855	select CPU_SUPPORTS_ADDRWINCFG if 64BIT
1856
1857config SYS_HAS_CPU_LOONGSON1B
1858	bool
1859
1860config SYS_HAS_CPU_LOONGSON1C
1861	bool
1862
1863config SYS_HAS_CPU_MIPS32_R1
1864	bool
1865
1866config SYS_HAS_CPU_MIPS32_R2
1867	bool
1868
1869config SYS_HAS_CPU_MIPS32_R3_5
1870	bool
1871
1872config SYS_HAS_CPU_MIPS32_R5
1873	bool
1874
1875config SYS_HAS_CPU_MIPS32_R6
1876	bool
1877
1878config SYS_HAS_CPU_MIPS64_R1
1879	bool
1880
1881config SYS_HAS_CPU_MIPS64_R2
1882	bool
1883
1884config SYS_HAS_CPU_MIPS64_R5
1885	bool
1886
1887config SYS_HAS_CPU_MIPS64_R6
1888	bool
1889
1890config SYS_HAS_CPU_P5600
1891	bool
1892
1893config SYS_HAS_CPU_R3000
1894	bool
1895
1896config SYS_HAS_CPU_R4300
1897	bool
1898
1899config SYS_HAS_CPU_R4X00
1900	bool
1901
1902config SYS_HAS_CPU_TX49XX
1903	bool
1904
1905config SYS_HAS_CPU_R5000
1906	bool
1907
 
 
 
1908config SYS_HAS_CPU_R5500
1909	bool
1910
 
 
 
1911config SYS_HAS_CPU_NEVADA
1912	bool
1913
 
 
 
1914config SYS_HAS_CPU_R10000
1915	bool
1916
1917config SYS_HAS_CPU_RM7000
1918	bool
1919
 
 
 
1920config SYS_HAS_CPU_SB1
1921	bool
1922
1923config SYS_HAS_CPU_CAVIUM_OCTEON
1924	bool
1925
1926config SYS_HAS_CPU_BMIPS
1927	bool
1928
1929config SYS_HAS_CPU_BMIPS32_3300
1930	bool
1931	select SYS_HAS_CPU_BMIPS
1932
1933config SYS_HAS_CPU_BMIPS4350
1934	bool
1935	select SYS_HAS_CPU_BMIPS
1936
1937config SYS_HAS_CPU_BMIPS4380
1938	bool
1939	select SYS_HAS_CPU_BMIPS
1940
1941config SYS_HAS_CPU_BMIPS5000
1942	bool
1943	select SYS_HAS_CPU_BMIPS
 
 
1944
1945#
1946# CPU may reorder R->R, R->W, W->R, W->W
1947# Reordering beyond LL and SC is handled in WEAK_REORDERING_BEYOND_LLSC
1948#
1949config WEAK_ORDERING
1950	bool
1951
1952#
1953# CPU may reorder reads and writes beyond LL/SC
1954# CPU may reorder R->LL, R->LL, W->LL, W->LL, R->SC, R->SC, W->SC, W->SC
1955#
1956config WEAK_REORDERING_BEYOND_LLSC
1957	bool
1958endmenu
1959
1960#
1961# These two indicate any level of the MIPS32 and MIPS64 architecture
1962#
1963config CPU_MIPS32
1964	bool
1965	default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R5 || \
1966		     CPU_MIPS32_R6 || CPU_P5600
1967
1968config CPU_MIPS64
1969	bool
1970	default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R5 || \
1971		     CPU_MIPS64_R6 || CPU_LOONGSON64 || CPU_CAVIUM_OCTEON
1972
1973#
1974# These indicate the revision of the architecture
1975#
1976config CPU_MIPSR1
1977	bool
1978	default y if CPU_MIPS32_R1 || CPU_MIPS64_R1
1979
1980config CPU_MIPSR2
1981	bool
1982	default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1983	select CPU_HAS_RIXI
1984	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1985	select MIPS_SPRAM
1986
1987config CPU_MIPSR5
1988	bool
1989	default y if CPU_MIPS32_R5 || CPU_MIPS64_R5 || CPU_P5600
1990	select CPU_HAS_RIXI
1991	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1992	select MIPS_SPRAM
1993
1994config CPU_MIPSR6
1995	bool
1996	default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1997	select CPU_HAS_RIXI
1998	select CPU_HAS_DIEI if !CPU_DIEI_BROKEN
1999	select HAVE_ARCH_BITREVERSE
2000	select MIPS_ASID_BITS_VARIABLE
2001	select MIPS_CRC_SUPPORT
2002	select MIPS_SPRAM
2003
2004config TARGET_ISA_REV
2005	int
2006	default 1 if CPU_MIPSR1
2007	default 2 if CPU_MIPSR2
2008	default 5 if CPU_MIPSR5
2009	default 6 if CPU_MIPSR6
2010	default 0
2011	help
2012	  Reflects the ISA revision being targeted by the kernel build. This
2013	  is effectively the Kconfig equivalent of MIPS_ISA_REV.
2014
2015config EVA
2016	bool
2017
2018config XPA
2019	bool
2020
2021config SYS_SUPPORTS_32BIT_KERNEL
2022	bool
2023config SYS_SUPPORTS_64BIT_KERNEL
2024	bool
2025config CPU_SUPPORTS_32BIT_KERNEL
2026	bool
2027config CPU_SUPPORTS_64BIT_KERNEL
2028	bool
2029config CPU_SUPPORTS_CPUFREQ
2030	bool
2031config CPU_SUPPORTS_ADDRWINCFG
2032	bool
2033config CPU_SUPPORTS_HUGEPAGES
2034	bool
2035	depends on !(32BIT && (PHYS_ADDR_T_64BIT || EVA))
2036config CPU_SUPPORTS_VZ
2037	bool
2038config MIPS_PGD_C0_CONTEXT
2039	bool
2040	depends on 64BIT
2041	default y if (CPU_MIPSR2 || CPU_MIPSR6)
2042
2043#
2044# Set to y for ptrace access to watch registers.
2045#
2046config HARDWARE_WATCHPOINTS
2047	bool
2048	default y if CPU_MIPSR1 || CPU_MIPSR2 || CPU_MIPSR6
2049
2050menu "Kernel type"
2051
2052choice
 
2053	prompt "Kernel code model"
2054	help
2055	  You should only select this option if you have a workload that
2056	  actually benefits from 64-bit processing or if your machine has
2057	  large memory.  You will only be presented a single option in this
2058	  menu if your system does not support both 32-bit and 64-bit kernels.
2059
2060config 32BIT
2061	bool "32-bit kernel"
2062	depends on CPU_SUPPORTS_32BIT_KERNEL && SYS_SUPPORTS_32BIT_KERNEL
2063	select TRAD_SIGNALS
2064	help
2065	  Select this option if you want to build a 32-bit kernel.
2066
2067config 64BIT
2068	bool "64-bit kernel"
2069	depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL
 
2070	help
2071	  Select this option if you want to build a 64-bit kernel.
2072
2073endchoice
2074
2075config MIPS_VA_BITS_48
2076	bool "48 bits virtual memory"
2077	depends on 64BIT
2078	help
2079	  Support a maximum at least 48 bits of application virtual
2080	  memory.  Default is 40 bits or less, depending on the CPU.
2081	  For page sizes 16k and above, this option results in a small
2082	  memory overhead for page tables.  For 4k page size, a fourth
2083	  level of page tables is added which imposes both a memory
2084	  overhead as well as slower TLB fault handling.
2085
2086	  If unsure, say N.
2087
2088config ZBOOT_LOAD_ADDRESS
2089	hex "Compressed kernel load address"
2090	default 0xffffffff80400000 if BCM47XX
2091	default 0x0
2092	depends on SYS_SUPPORTS_ZBOOT
2093	help
2094	  The address to load compressed kernel, aka vmlinuz.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2095
2096	  This is only used if non-zero.
2097
2098config ARCH_FORCE_MAX_ORDER
2099	int "Maximum zone order"
2100	default "13" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_64KB
2101	default "12" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_32KB
2102	default "11" if MIPS_HUGE_TLB_SUPPORT && PAGE_SIZE_16KB
2103	default "10"
 
 
2104	help
2105	  The kernel memory allocator divides physically contiguous memory
2106	  blocks into "zones", where each zone is a power of two number of
2107	  pages.  This option selects the largest power of two that the kernel
2108	  keeps in the memory allocator.  If you need to allocate very large
2109	  blocks of physically contiguous memory, then you may need to
2110	  increase this value.
2111
 
 
 
2112	  The page size is not necessarily 4KB.  Keep this in mind
2113	  when choosing a value for this option.
2114
2115config BOARD_SCACHE
2116	bool
2117
2118config IP22_CPU_SCACHE
2119	bool
2120	select BOARD_SCACHE
2121
2122#
2123# Support for a MIPS32 / MIPS64 style S-caches
2124#
2125config MIPS_CPU_SCACHE
2126	bool
2127	select BOARD_SCACHE
2128
2129config R5000_CPU_SCACHE
2130	bool
2131	select BOARD_SCACHE
2132
2133config RM7000_CPU_SCACHE
2134	bool
2135	select BOARD_SCACHE
2136
2137config SIBYTE_DMA_PAGEOPS
2138	bool "Use DMA to clear/copy pages"
2139	depends on CPU_SB1
2140	help
2141	  Instead of using the CPU to zero and copy pages, use a Data Mover
2142	  channel.  These DMA channels are otherwise unused by the standard
2143	  SiByte Linux port.  Seems to give a small performance benefit.
2144
2145config CPU_HAS_PREFETCH
2146	bool
2147
2148config CPU_GENERIC_DUMP_TLB
2149	bool
2150	default y if !CPU_R3000
2151
2152config MIPS_FP_SUPPORT
2153	bool "Floating Point support" if EXPERT
2154	default y
2155	help
2156	  Select y to include support for floating point in the kernel
2157	  including initialization of FPU hardware, FP context save & restore
2158	  and emulation of an FPU where necessary. Without this support any
2159	  userland program attempting to use floating point instructions will
2160	  receive a SIGILL.
2161
2162	  If you know that your userland will not attempt to use floating point
2163	  instructions then you can say n here to shrink the kernel a little.
2164
2165	  If unsure, say y.
2166
2167config CPU_R2300_FPU
2168	bool
2169	depends on MIPS_FP_SUPPORT
2170	default y if CPU_R3000
2171
2172config CPU_R3K_TLB
2173	bool
2174
2175config CPU_R4K_FPU
2176	bool
2177	depends on MIPS_FP_SUPPORT
2178	default y if !CPU_R2300_FPU
2179
2180config CPU_R4K_CACHE_TLB
2181	bool
2182	default y if !(CPU_R3K_TLB || CPU_SB1 || CPU_CAVIUM_OCTEON)
2183
2184config MIPS_MT_SMP
2185	bool "MIPS MT SMP support (1 TC on each available VPE)"
2186	default y
2187	depends on TARGET_ISA_REV > 0 && TARGET_ISA_REV < 6
2188	depends on SYS_SUPPORTS_MULTITHREADING && !CPU_MICROMIPS
2189	select CPU_MIPSR2_IRQ_VI
2190	select CPU_MIPSR2_IRQ_EI
2191	select SYNC_R4K
2192	select MIPS_MT
 
2193	select SMP
 
 
2194	select SMP_UP
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2195	select SYS_SUPPORTS_SMP
2196	select SYS_SUPPORTS_SCHED_SMT
2197	select MIPS_PERF_SHARED_TC_COUNTERS
2198	help
2199	  This is a kernel model which is known as SMVP. This is supported
2200	  on cores with the MT ASE and uses the available VPEs to implement
2201	  virtual processors which supports SMP. This is equivalent to the
2202	  Intel Hyperthreading feature. For further information go to
2203	  <http://www.imgtec.com/mips/mips-multithreading.asp>.
 
 
 
 
 
 
 
2204
2205config MIPS_MT
2206	bool
2207
2208config SCHED_SMT
2209	bool "SMT (multithreading) scheduler support"
2210	depends on SYS_SUPPORTS_SCHED_SMT
2211	default n
2212	help
2213	  SMT scheduler support improves the CPU scheduler's decision making
2214	  when dealing with MIPS MT enabled cores at a cost of slightly
2215	  increased overhead in some places. If unsure say N here.
2216
2217config SYS_SUPPORTS_SCHED_SMT
2218	bool
2219
 
2220config SYS_SUPPORTS_MULTITHREADING
2221	bool
2222
2223config MIPS_MT_FPAFF
2224	bool "Dynamic FPU affinity for FP-intensive threads"
2225	default y
2226	depends on MIPS_MT_SMP
2227
2228config MIPSR2_TO_R6_EMULATOR
2229	bool "MIPS R2-to-R6 emulator"
2230	depends on CPU_MIPSR6
2231	depends on MIPS_FP_SUPPORT
2232	default y
2233	help
2234	  Choose this option if you want to run non-R6 MIPS userland code.
2235	  Even if you say 'Y' here, the emulator will still be disabled by
2236	  default. You can enable it using the 'mipsr2emu' kernel option.
2237	  The only reason this is a build-time option is to save ~14K from the
2238	  final kernel image.
2239
2240config SYS_SUPPORTS_VPE_LOADER
2241	bool
2242	depends on SYS_SUPPORTS_MULTITHREADING
2243	help
2244	  Indicates that the platform supports the VPE loader, and provides
2245	  physical_memsize.
2246
2247config MIPS_VPE_LOADER
2248	bool "VPE loader support."
2249	depends on SYS_SUPPORTS_VPE_LOADER && MODULES
2250	select CPU_MIPSR2_IRQ_VI
2251	select CPU_MIPSR2_IRQ_EI
2252	select MIPS_MT
2253	help
2254	  Includes a loader for loading an elf relocatable object
2255	  onto another VPE and running it.
2256
2257config MIPS_VPE_LOADER_MT
2258	bool
2259	default "y"
2260	depends on MIPS_VPE_LOADER
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2261
2262config MIPS_VPE_LOADER_TOM
2263	bool "Load VPE program into memory hidden from linux"
2264	depends on MIPS_VPE_LOADER
2265	default y
2266	help
2267	  The loader can use memory that is present but has been hidden from
2268	  Linux using the kernel command line option "mem=xxMB". It's up to
2269	  you to ensure the amount you put in the option and the space your
2270	  program requires is less or equal to the amount physically present.
2271
 
2272config MIPS_VPE_APSP_API
2273	bool "Enable support for AP/SP API (RTLX)"
2274	depends on MIPS_VPE_LOADER
 
2275
2276config MIPS_VPE_APSP_API_MT
2277	bool
2278	default "y"
2279	depends on MIPS_VPE_APSP_API
2280
2281config MIPS_CPS
2282	bool "MIPS Coherent Processing System support"
2283	depends on SYS_SUPPORTS_MIPS_CPS
2284	select MIPS_CM
2285	select MIPS_CPS_PM if HOTPLUG_CPU
2286	select SMP
2287	select HOTPLUG_CORE_SYNC_DEAD if HOTPLUG_CPU
2288	select SYNC_R4K if (CEVT_R4K || CSRC_R4K)
2289	select SYS_SUPPORTS_HOTPLUG_CPU
2290	select SYS_SUPPORTS_SCHED_SMT if CPU_MIPSR6
2291	select SYS_SUPPORTS_SMP
 
2292	select WEAK_ORDERING
2293	select GENERIC_IRQ_MIGRATION if HOTPLUG_CPU
2294	help
2295	  Select this if you wish to run an SMP kernel across multiple cores
2296	  within a MIPS Coherent Processing System. When this option is
2297	  enabled the kernel will probe for other cores and boot them with
2298	  no external assistance. It is safe to enable this when hardware
2299	  support is unavailable.
2300
2301config MIPS_CPS_PM
2302	depends on MIPS_CPS
2303	bool
2304
2305config MIPS_CM
2306	bool
2307	select MIPS_CPC
2308
2309config MIPS_CPC
2310	bool
 
 
2311
2312config SB1_PASS_2_WORKAROUNDS
2313	bool
2314	depends on CPU_SB1 && (CPU_SB1_PASS_2_2 || CPU_SB1_PASS_2)
2315	default y
2316
2317config SB1_PASS_2_1_WORKAROUNDS
2318	bool
2319	depends on CPU_SB1 && CPU_SB1_PASS_2
2320	default y
2321
2322choice
2323	prompt "SmartMIPS or microMIPS ASE support"
2324
2325config CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS
2326	bool "None"
2327	help
2328	  Select this if you want neither microMIPS nor SmartMIPS support
2329
2330config CPU_HAS_SMARTMIPS
2331	depends on SYS_SUPPORTS_SMARTMIPS
2332	bool "SmartMIPS"
2333	help
2334	  SmartMIPS is a extension of the MIPS32 architecture aimed at
2335	  increased security at both hardware and software level for
2336	  smartcards.  Enabling this option will allow proper use of the
2337	  SmartMIPS instructions by Linux applications.  However a kernel with
2338	  this option will not work on a MIPS core without SmartMIPS core.  If
2339	  you don't know you probably don't have SmartMIPS and should say N
2340	  here.
2341
2342config CPU_MICROMIPS
2343	depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2344	bool "microMIPS"
2345	help
2346	  When this option is enabled the kernel will be built using the
2347	  microMIPS ISA
2348
2349endchoice
2350
2351config CPU_HAS_MSA
2352	bool "Support for the MIPS SIMD Architecture"
2353	depends on CPU_SUPPORTS_MSA
2354	depends on MIPS_FP_SUPPORT
2355	depends on 64BIT || MIPS_O32_FP64_SUPPORT
2356	help
2357	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers
2358	  and a set of SIMD instructions to operate on them. When this option
2359	  is enabled the kernel will support allocating & switching MSA
2360	  vector register contexts. If you know that your kernel will only be
2361	  running on CPUs which do not support MSA or that your userland will
2362	  not be making use of it then you may wish to say N here to reduce
2363	  the size & complexity of your kernel.
2364
2365	  If unsure, say Y.
2366
2367config CPU_HAS_WB
2368	bool
2369
2370config XKS01
2371	bool
2372
2373config CPU_HAS_DIEI
2374	depends on !CPU_DIEI_BROKEN
2375	bool
2376
2377config CPU_DIEI_BROKEN
2378	bool
2379
2380config CPU_HAS_RIXI
2381	bool
2382
2383config CPU_NO_LOAD_STORE_LR
2384	bool
2385	help
2386	  CPU lacks support for unaligned load and store instructions:
2387	  LWL, LWR, SWL, SWR (Load/store word left/right).
2388	  LDL, LDR, SDL, SDR (Load/store doubleword left/right, for 64bit
2389	  systems).
2390
2391#
2392# Vectored interrupt mode is an R2 feature
2393#
2394config CPU_MIPSR2_IRQ_VI
2395	bool
2396
2397#
2398# Extended interrupt mode is an R2 feature
2399#
2400config CPU_MIPSR2_IRQ_EI
2401	bool
2402
2403config CPU_HAS_SYNC
2404	bool
2405	depends on !CPU_R3000
2406	default y
2407
 
 
 
2408#
2409# CPU non-features
2410#
2411
2412# Work around the "daddi" and "daddiu" CPU errata:
2413#
2414# - The `daddi' instruction fails to trap on overflow.
2415#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2416#   erratum #23
2417#
2418# - The `daddiu' instruction can produce an incorrect result.
2419#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2420#   erratum #41
2421#   "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2422#   #15
2423#   "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
2424#   "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
2425config CPU_DADDI_WORKAROUNDS
2426	bool
2427
2428# Work around certain R4000 CPU errata (as implemented by GCC):
2429#
2430# - A double-word or a variable shift may give an incorrect result
2431#   if executed immediately after starting an integer division:
2432#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2433#   erratum #28
2434#   "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
2435#   #19
2436#
2437# - A double-word or a variable shift may give an incorrect result
2438#   if executed while an integer multiplication is in progress:
2439#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2440#   errata #16 & #28
2441#
2442# - An integer division may give an incorrect result if started in
2443#   a delay slot of a taken branch or a jump:
2444#   "MIPS R4000PC/SC Errata, Processor Revision 2.2 and 3.0",
2445#   erratum #52
2446config CPU_R4000_WORKAROUNDS
2447	bool
2448	select CPU_R4400_WORKAROUNDS
2449
2450# Work around certain R4400 CPU errata (as implemented by GCC):
2451#
2452# - A double-word or a variable shift may give an incorrect result
2453#   if executed immediately after starting an integer division:
2454#   "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
2455#   "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
2456config CPU_R4400_WORKAROUNDS
2457	bool
2458
2459config CPU_R4X00_BUGS64
2460	bool
2461	default y if SYS_HAS_CPU_R4X00 && 64BIT && (TARGET_ISA_REV < 1)
2462
2463config MIPS_ASID_SHIFT
2464	int
2465	default 6 if CPU_R3000
2466	default 0
2467
2468config MIPS_ASID_BITS
2469	int
2470	default 0 if MIPS_ASID_BITS_VARIABLE
2471	default 6 if CPU_R3000
2472	default 8
2473
2474config MIPS_ASID_BITS_VARIABLE
2475	bool
2476
2477config MIPS_CRC_SUPPORT
2478	bool
2479
2480# R4600 erratum.  Due to the lack of errata information the exact
2481# technical details aren't known.  I've experimentally found that disabling
2482# interrupts during indexed I-cache flushes seems to be sufficient to deal
2483# with the issue.
2484config WAR_R4600_V1_INDEX_ICACHEOP
2485	bool
2486
2487# Pleasures of the R4600 V1.x.  Cite from the IDT R4600 V1.7 errata:
2488#
2489#  18. The CACHE instructions Hit_Writeback_Invalidate_D, Hit_Writeback_D,
2490#      Hit_Invalidate_D and Create_Dirty_Excl_D should only be
2491#      executed if there is no other dcache activity. If the dcache is
2492#      accessed for another instruction immediately preceding when these
2493#      cache instructions are executing, it is possible that the dcache
2494#      tag match outputs used by these cache instructions will be
2495#      incorrect. These cache instructions should be preceded by at least
2496#      four instructions that are not any kind of load or store
2497#      instruction.
2498#
2499#      This is not allowed:    lw
2500#                              nop
2501#                              nop
2502#                              nop
2503#                              cache       Hit_Writeback_Invalidate_D
2504#
2505#      This is allowed:        lw
2506#                              nop
2507#                              nop
2508#                              nop
2509#                              nop
2510#                              cache       Hit_Writeback_Invalidate_D
2511config WAR_R4600_V1_HIT_CACHEOP
2512	bool
2513
2514# Writeback and invalidate the primary cache dcache before DMA.
2515#
2516# R4600 v2.0 bug: "The CACHE instructions Hit_Writeback_Inv_D,
2517# Hit_Writeback_D, Hit_Invalidate_D and Create_Dirty_Exclusive_D will only
2518# operate correctly if the internal data cache refill buffer is empty.  These
2519# CACHE instructions should be separated from any potential data cache miss
2520# by a load instruction to an uncached address to empty the response buffer."
2521# (Revision 2.0 device errata from IDT available on https://www.idt.com/
2522# in .pdf format.)
2523config WAR_R4600_V2_HIT_CACHEOP
2524	bool
2525
2526# From TX49/H2 manual: "If the instruction (i.e. CACHE) is issued for
2527# the line which this instruction itself exists, the following
2528# operation is not guaranteed."
2529#
2530# Workaround: do two phase flushing for Index_Invalidate_I
2531config WAR_TX49XX_ICACHE_INDEX_INV
2532	bool
2533
2534# The RM7000 processors and the E9000 cores have a bug (though PMC-Sierra
2535# opposes it being called that) where invalid instructions in the same
2536# I-cache line worth of instructions being fetched may case spurious
2537# exceptions.
2538config WAR_ICACHE_REFILLS
2539	bool
2540
2541# On the R10000 up to version 2.6 (not sure about 2.7) there is a bug that
2542# may cause ll / sc and lld / scd sequences to execute non-atomically.
2543config WAR_R10000_LLSC
2544	bool
2545
2546# 34K core erratum: "Problems Executing the TLBR Instruction"
2547config WAR_MIPS34K_MISSED_ITLB
2548	bool
2549
2550#
2551# - Highmem only makes sense for the 32-bit kernel.
2552# - The current highmem code will only work properly on physically indexed
2553#   caches such as R3000, SB1, R7000 or those that look like they're virtually
2554#   indexed such as R4000/R4400 SC and MC versions or R10000.  So for the
2555#   moment we protect the user and offer the highmem option only on machines
2556#   where it's known to be safe.  This will not offer highmem on a few systems
2557#   such as MIPS32 and MIPS64 CPUs which may have virtual and physically
2558#   indexed CPUs but we're playing safe.
2559# - We use SYS_SUPPORTS_HIGHMEM to offer highmem only for systems where we
2560#   know they might have memory configurations that could make use of highmem
2561#   support.
2562#
2563config HIGHMEM
2564	bool "High Memory Support"
2565	depends on 32BIT && CPU_SUPPORTS_HIGHMEM && SYS_SUPPORTS_HIGHMEM && !CPU_MIPS32_3_5_EVA
2566	select KMAP_LOCAL
2567
2568config CPU_SUPPORTS_HIGHMEM
2569	bool
2570
2571config SYS_SUPPORTS_HIGHMEM
2572	bool
2573
2574config SYS_SUPPORTS_SMARTMIPS
2575	bool
2576
2577config SYS_SUPPORTS_MICROMIPS
2578	bool
 
2579
2580config SYS_SUPPORTS_MIPS16
2581	bool
 
2582	help
2583	  This option must be set if a kernel might be executed on a MIPS16-
2584	  enabled CPU even if MIPS16 is not actually being used.  In other
2585	  words, it makes the kernel MIPS16-tolerant.
2586
2587config CPU_SUPPORTS_MSA
2588	bool
2589
2590config ARCH_FLATMEM_ENABLE
2591	def_bool y
2592	depends on !NUMA && !CPU_LOONGSON2EF
2593
2594config ARCH_SPARSEMEM_ENABLE
2595	bool
 
2596
2597config NUMA
2598	bool "NUMA Support"
2599	depends on SYS_SUPPORTS_NUMA
2600	select SMP
2601	select HAVE_SETUP_PER_CPU_AREA
2602	select NEED_PER_CPU_EMBED_FIRST_CHUNK
2603	help
2604	  Say Y to compile the kernel to support NUMA (Non-Uniform Memory
2605	  Access).  This option improves performance on systems with more
2606	  than two nodes; on two node systems it is generally better to
2607	  leave it disabled; on single node systems leave this option
2608	  disabled.
2609
2610config SYS_SUPPORTS_NUMA
2611	bool
2612
2613config RELOCATABLE
2614	bool "Relocatable kernel"
2615	depends on SYS_SUPPORTS_RELOCATABLE
2616	depends on CPU_MIPS32_R2 || CPU_MIPS64_R2 || \
2617		   CPU_MIPS32_R5 || CPU_MIPS64_R5 || \
2618		   CPU_MIPS32_R6 || CPU_MIPS64_R6 || \
2619		   CPU_P5600 || CAVIUM_OCTEON_SOC || \
2620		   CPU_LOONGSON64
2621	help
2622	  This builds a kernel image that retains relocation information
2623	  so it can be loaded someplace besides the default 1MB.
2624	  The relocations make the kernel binary about 15% larger,
2625	  but are discarded at runtime
2626
2627config RELOCATION_TABLE_SIZE
2628	hex "Relocation table size"
2629	depends on RELOCATABLE
2630	range 0x0 0x01000000
2631	default "0x00200000" if CPU_LOONGSON64
2632	default "0x00100000"
2633	help
2634	  A table of relocation data will be appended to the kernel binary
2635	  and parsed at boot to fix up the relocated kernel.
2636
2637	  This option allows the amount of space reserved for the table to be
2638	  adjusted, although the default of 1Mb should be ok in most cases.
2639
2640	  The build will fail and a valid size suggested if this is too small.
2641
2642	  If unsure, leave at the default value.
2643
2644config RANDOMIZE_BASE
2645	bool "Randomize the address of the kernel image"
2646	depends on RELOCATABLE
2647	help
2648	  Randomizes the physical and virtual address at which the
2649	  kernel image is loaded, as a security feature that
2650	  deters exploit attempts relying on knowledge of the location
2651	  of kernel internals.
2652
2653	  Entropy is generated using any coprocessor 0 registers available.
2654
2655	  The kernel will be offset by up to RANDOMIZE_BASE_MAX_OFFSET.
2656
2657	  If unsure, say N.
2658
2659config RANDOMIZE_BASE_MAX_OFFSET
2660	hex "Maximum kASLR offset" if EXPERT
2661	depends on RANDOMIZE_BASE
2662	range 0x0 0x40000000 if EVA || 64BIT
2663	range 0x0 0x08000000
2664	default "0x01000000"
2665	help
2666	  When kASLR is active, this provides the maximum offset that will
2667	  be applied to the kernel image. It should be set according to the
2668	  amount of physical RAM available in the target system minus
2669	  PHYSICAL_START and must be a power of 2.
2670
2671	  This is limited by the size of KSEG0, 256Mb on 32-bit or 1Gb with
2672	  EVA or 64-bit. The default is 16Mb.
2673
2674config NODES_SHIFT
2675	int
2676	default "6"
2677	depends on NUMA
2678
2679config HW_PERF_EVENTS
2680	bool "Enable hardware performance counter support for perf events"
2681	depends on PERF_EVENTS && (CPU_MIPS32 || CPU_MIPS64 || CPU_R10000 || CPU_SB1 || CPU_CAVIUM_OCTEON || CPU_LOONGSON64)
2682	default y
2683	help
2684	  Enable hardware performance counter support for perf events. If
2685	  disabled, perf events will use software events only.
2686
2687config DMI
2688	bool "Enable DMI scanning"
2689	depends on MACH_LOONGSON64
2690	select DMI_SCAN_MACHINE_NON_EFI_FALLBACK
2691	default y
2692	help
2693	  Enabled scanning of DMI to identify machine quirks. Say Y
2694	  here unless you have verified that your setup is not
2695	  affected by entries in the DMI blacklist. Required by PNP
2696	  BIOS code.
2697
2698config SMP
2699	bool "Multi-Processing support"
2700	depends on SYS_SUPPORTS_SMP
 
 
2701	help
2702	  This enables support for systems with more than one CPU. If you have
2703	  a system with only one CPU, say N. If you have a system with more
2704	  than one CPU, say Y.
2705
2706	  If you say N here, the kernel will run on uni- and multiprocessor
2707	  machines, but will use only one CPU of a multiprocessor machine. If
2708	  you say Y here, the kernel will run on many, but not all,
2709	  uniprocessor machines. On a uniprocessor machine, the kernel
2710	  will run faster if you say N here.
2711
2712	  People using multiprocessor machines who say Y here should also say
2713	  Y to "Enhanced Real Time Clock Support", below.
2714
2715	  See also the SMP-HOWTO available at
2716	  <https://www.tldp.org/docs.html#howto>.
2717
2718	  If you don't know what to do here, say N.
2719
2720config HOTPLUG_CPU
2721	bool "Support for hot-pluggable CPUs"
2722	depends on SMP && SYS_SUPPORTS_HOTPLUG_CPU
2723	help
2724	  Say Y here to allow turning CPUs off and on. CPUs can be
2725	  controlled through /sys/devices/system/cpu.
2726	  (Note: power management support will enable this option
2727	    automatically on SMP systems. )
2728	  Say N if you want to disable CPU hotplug.
2729
2730config SMP_UP
2731	bool
2732
2733config SYS_SUPPORTS_MIPS_CPS
2734	bool
2735
2736config SYS_SUPPORTS_SMP
2737	bool
2738
 
 
 
 
 
 
2739config NR_CPUS_DEFAULT_4
2740	bool
2741
2742config NR_CPUS_DEFAULT_8
2743	bool
2744
2745config NR_CPUS_DEFAULT_16
2746	bool
2747
2748config NR_CPUS_DEFAULT_32
2749	bool
2750
2751config NR_CPUS_DEFAULT_64
2752	bool
2753
2754config NR_CPUS
2755	int "Maximum number of CPUs (2-256)"
2756	range 2 256
2757	depends on SMP
 
 
2758	default "4" if NR_CPUS_DEFAULT_4
2759	default "8" if NR_CPUS_DEFAULT_8
2760	default "16" if NR_CPUS_DEFAULT_16
2761	default "32" if NR_CPUS_DEFAULT_32
2762	default "64" if NR_CPUS_DEFAULT_64
2763	help
2764	  This allows you to specify the maximum number of CPUs which this
2765	  kernel will support.  The maximum supported value is 32 for 32-bit
2766	  kernel and 64 for 64-bit kernels; the minimum value which makes
2767	  sense is 1 for Qemu (useful only for kernel debugging purposes)
2768	  and 2 for all others.
2769
2770	  This is purely to save memory - each supported CPU adds
2771	  approximately eight kilobytes to the kernel image.  For best
2772	  performance should round up your number of processors to the next
2773	  power of two.
2774
2775config MIPS_PERF_SHARED_TC_COUNTERS
2776	bool
2777
2778config MIPS_NR_CPU_NR_MAP_1024
2779	bool
2780
2781config MIPS_NR_CPU_NR_MAP
2782	int
2783	depends on SMP
2784	default 1024 if MIPS_NR_CPU_NR_MAP_1024
2785	default NR_CPUS if !MIPS_NR_CPU_NR_MAP_1024
2786
2787#
2788# Timer Interrupt Frequency Configuration
2789#
2790
2791choice
2792	prompt "Timer frequency"
2793	default HZ_250
2794	help
2795	  Allows the configuration of the timer frequency.
2796
2797	config HZ_24
2798		bool "24 HZ" if SYS_SUPPORTS_24HZ || SYS_SUPPORTS_ARBIT_HZ
2799
2800	config HZ_48
2801		bool "48 HZ" if SYS_SUPPORTS_48HZ || SYS_SUPPORTS_ARBIT_HZ
2802
2803	config HZ_100
2804		bool "100 HZ" if SYS_SUPPORTS_100HZ || SYS_SUPPORTS_ARBIT_HZ
2805
2806	config HZ_128
2807		bool "128 HZ" if SYS_SUPPORTS_128HZ || SYS_SUPPORTS_ARBIT_HZ
2808
2809	config HZ_250
2810		bool "250 HZ" if SYS_SUPPORTS_250HZ || SYS_SUPPORTS_ARBIT_HZ
2811
2812	config HZ_256
2813		bool "256 HZ" if SYS_SUPPORTS_256HZ || SYS_SUPPORTS_ARBIT_HZ
2814
2815	config HZ_1000
2816		bool "1000 HZ" if SYS_SUPPORTS_1000HZ || SYS_SUPPORTS_ARBIT_HZ
2817
2818	config HZ_1024
2819		bool "1024 HZ" if SYS_SUPPORTS_1024HZ || SYS_SUPPORTS_ARBIT_HZ
2820
2821endchoice
2822
2823config SYS_SUPPORTS_24HZ
2824	bool
2825
2826config SYS_SUPPORTS_48HZ
2827	bool
2828
2829config SYS_SUPPORTS_100HZ
2830	bool
2831
2832config SYS_SUPPORTS_128HZ
2833	bool
2834
2835config SYS_SUPPORTS_250HZ
2836	bool
2837
2838config SYS_SUPPORTS_256HZ
2839	bool
2840
2841config SYS_SUPPORTS_1000HZ
2842	bool
2843
2844config SYS_SUPPORTS_1024HZ
2845	bool
2846
2847config SYS_SUPPORTS_ARBIT_HZ
2848	bool
2849	default y if !SYS_SUPPORTS_24HZ && \
2850		     !SYS_SUPPORTS_48HZ && \
2851		     !SYS_SUPPORTS_100HZ && \
2852		     !SYS_SUPPORTS_128HZ && \
2853		     !SYS_SUPPORTS_250HZ && \
2854		     !SYS_SUPPORTS_256HZ && \
2855		     !SYS_SUPPORTS_1000HZ && \
2856		     !SYS_SUPPORTS_1024HZ
2857
2858config HZ
2859	int
2860	default 24 if HZ_24
2861	default 48 if HZ_48
2862	default 100 if HZ_100
2863	default 128 if HZ_128
2864	default 250 if HZ_250
2865	default 256 if HZ_256
2866	default 1000 if HZ_1000
2867	default 1024 if HZ_1024
2868
2869config SCHED_HRTICK
2870	def_bool HIGH_RES_TIMERS
2871
2872config ARCH_SUPPORTS_KEXEC
2873	def_bool y
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2874
2875config ARCH_SUPPORTS_CRASH_DUMP
2876	def_bool y
2877
2878config ARCH_DEFAULT_CRASH_DUMP
2879	def_bool y
2880
2881config PHYSICAL_START
2882	hex "Physical address where the kernel is loaded"
2883	default "0xffffffff84000000"
2884	depends on CRASH_DUMP
2885	help
2886	  This gives the CKSEG0 or KSEG0 address where the kernel is loaded.
2887	  If you plan to use kernel for capturing the crash dump change
2888	  this value to start of the reserved region (the "X" value as
2889	  specified in the "crashkernel=YM@XM" command line boot parameter
2890	  passed to the panic-ed kernel).
2891
2892config MIPS_O32_FP64_SUPPORT
2893	bool "Support for O32 binaries using 64-bit FP" if !CPU_MIPSR6
2894	depends on 32BIT || MIPS32_O32
2895	help
2896	  When this is enabled, the kernel will support use of 64-bit floating
2897	  point registers with binaries using the O32 ABI along with the
2898	  EF_MIPS_FP64 ELF header flag (typically built with -mfp64). On
2899	  32-bit MIPS systems this support is at the cost of increasing the
2900	  size and complexity of the compiled FPU emulator. Thus if you are
2901	  running a MIPS32 system and know that none of your userland binaries
2902	  will require 64-bit floating point, you may wish to reduce the size
2903	  of your kernel & potentially improve FP emulation performance by
2904	  saying N here.
2905
2906	  Although binutils currently supports use of this flag the details
2907	  concerning its effect upon the O32 ABI in userland are still being
2908	  worked on. In order to avoid userland becoming dependent upon current
2909	  behaviour before the details have been finalised, this option should
2910	  be considered experimental and only enabled by those working upon
2911	  said details.
2912
2913	  If unsure, say N.
2914
2915config USE_OF
2916	bool
2917	select OF
2918	select OF_EARLY_FLATTREE
2919	select IRQ_DOMAIN
2920
2921config UHI_BOOT
2922	bool
2923
2924config BUILTIN_DTB
2925	bool
2926
2927choice
2928	prompt "Kernel appended dtb support"
2929	depends on USE_OF
2930	default MIPS_NO_APPENDED_DTB
2931
2932	config MIPS_NO_APPENDED_DTB
2933		bool "None"
2934		help
2935		  Do not enable appended dtb support.
2936
2937	config MIPS_ELF_APPENDED_DTB
2938		bool "vmlinux"
2939		help
2940		  With this option, the boot code will look for a device tree binary
2941		  DTB) included in the vmlinux ELF section .appended_dtb. By default
2942		  it is empty and the DTB can be appended using binutils command
2943		  objcopy:
2944
2945		    objcopy --update-section .appended_dtb=<filename>.dtb vmlinux
2946
2947		  This is meant as a backward compatibility convenience for those
2948		  systems with a bootloader that can't be upgraded to accommodate
2949		  the documented boot protocol using a device tree.
2950
2951	config MIPS_RAW_APPENDED_DTB
2952		bool "vmlinux.bin or vmlinuz.bin"
2953		help
2954		  With this option, the boot code will look for a device tree binary
2955		  DTB) appended to raw vmlinux.bin or vmlinuz.bin.
2956		  (e.g. cat vmlinux.bin <filename>.dtb > vmlinux_w_dtb).
2957
2958		  This is meant as a backward compatibility convenience for those
2959		  systems with a bootloader that can't be upgraded to accommodate
2960		  the documented boot protocol using a device tree.
2961
2962		  Beware that there is very little in terms of protection against
2963		  this option being confused by leftover garbage in memory that might
2964		  look like a DTB header after a reboot if no actual DTB is appended
2965		  to vmlinux.bin.  Do not leave this option active in a production kernel
2966		  if you don't intend to always append a DTB.
2967endchoice
2968
2969choice
2970	prompt "Kernel command line type"
2971	depends on !CMDLINE_OVERRIDE
2972	default MIPS_CMDLINE_FROM_DTB if USE_OF && !ATH79 && !MACH_INGENIC && \
2973					 !MACH_LOONGSON64 && !MIPS_MALTA && \
2974					 !CAVIUM_OCTEON_SOC
2975	default MIPS_CMDLINE_FROM_BOOTLOADER
2976
2977	config MIPS_CMDLINE_FROM_DTB
2978		depends on USE_OF
2979		bool "Dtb kernel arguments if available"
2980
2981	config MIPS_CMDLINE_DTB_EXTEND
2982		depends on USE_OF
2983		bool "Extend dtb kernel arguments with bootloader arguments"
2984
2985	config MIPS_CMDLINE_FROM_BOOTLOADER
2986		bool "Bootloader kernel arguments if available"
2987
2988	config MIPS_CMDLINE_BUILTIN_EXTEND
2989		depends on CMDLINE_BOOL
2990		bool "Extend builtin kernel arguments with bootloader arguments"
2991endchoice
2992
2993endmenu
2994
2995config LOCKDEP_SUPPORT
2996	bool
2997	default y
2998
2999config STACKTRACE_SUPPORT
3000	bool
3001	default y
3002
3003config PGTABLE_LEVELS
3004	int
3005	default 4 if PAGE_SIZE_4KB && MIPS_VA_BITS_48
3006	default 3 if 64BIT && (!PAGE_SIZE_64KB || MIPS_VA_BITS_48)
3007	default 2
3008
3009config MIPS_AUTO_PFN_OFFSET
 
 
3010	bool
3011
3012menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)"
 
 
 
 
 
 
 
 
3013
3014config PCI_DRIVERS_GENERIC
3015	select PCI_DOMAINS_GENERIC if PCI
3016	bool
3017
3018config PCI_DRIVERS_LEGACY
3019	def_bool !PCI_DRIVERS_GENERIC
3020	select NO_GENERIC_PCI_IOPORT_MAP
3021	select PCI_DOMAINS if PCI
3022
3023#
3024# ISA support is now enabled via select.  Too many systems still have the one
3025# or other ISA chip on the board that users don't know about so don't expect
3026# users to choose the right thing ...
3027#
3028config ISA
3029	bool
3030
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
3031config TC
3032	bool "TURBOchannel support"
3033	depends on MACH_DECSTATION
3034	help
3035	  TURBOchannel is a DEC (now Compaq (now HP)) bus for Alpha and MIPS
3036	  processors.  TURBOchannel programming specifications are available
3037	  at:
3038	  <ftp://ftp.hp.com/pub/alphaserver/archive/triadd/>
3039	  and:
3040	  <http://www.computer-refuge.org/classiccmp/ftp.digital.com/pub/DEC/TriAdd/>
3041	  Linux driver support status is documented at:
3042	  <http://www.linux-mips.org/wiki/DECstation>
3043
 
 
 
 
3044config MMU
3045	bool
3046	default y
3047
3048config ARCH_MMAP_RND_BITS_MIN
3049	default 12 if 64BIT
3050	default 8
3051
3052config ARCH_MMAP_RND_BITS_MAX
3053	default 18 if 64BIT
3054	default 15
3055
3056config ARCH_MMAP_RND_COMPAT_BITS_MIN
3057	default 8
3058
3059config ARCH_MMAP_RND_COMPAT_BITS_MAX
3060	default 15
3061
3062config I8253
3063	bool
3064	select CLKSRC_I8253
3065	select CLKEVT_I8253
3066	select MIPS_EXTERNAL_TIMER
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
3067endmenu
3068
 
 
 
 
3069config TRAD_SIGNALS
3070	bool
3071
3072config MIPS32_COMPAT
 
 
 
 
 
 
 
 
3073	bool
 
 
3074
3075config COMPAT
3076	bool
 
 
3077
3078config MIPS32_O32
3079	bool "Kernel support for o32 binaries"
3080	depends on 64BIT
3081	select ARCH_WANT_OLD_COMPAT_IPC
3082	select COMPAT
3083	select MIPS32_COMPAT
3084	help
3085	  Select this option if you want to run o32 binaries.  These are pure
3086	  32-bit binaries as used by the 32-bit Linux/MIPS port.  Most of
3087	  existing binaries are in this format.
3088
3089	  If unsure, say Y.
3090
3091config MIPS32_N32
3092	bool "Kernel support for n32 binaries"
3093	depends on 64BIT
3094	select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
3095	select COMPAT
3096	select MIPS32_COMPAT
3097	help
3098	  Select this option if you want to run n32 binaries.  These are
3099	  64-bit binaries using 32-bit quantities for addressing and certain
3100	  data that would normally be 64-bit.  They are used in special
3101	  cases.
3102
3103	  If unsure, say N.
3104
3105config CC_HAS_MNO_BRANCH_LIKELY
3106	def_bool y
3107	depends on $(cc-option,-mno-branch-likely)
3108
3109# https://github.com/llvm/llvm-project/issues/61045
3110config CC_HAS_BROKEN_INLINE_COMPAT_BRANCH
3111	def_bool y if CC_IS_CLANG
3112
3113menu "Power management options"
3114
3115config ARCH_HIBERNATION_POSSIBLE
3116	def_bool y
3117	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3118
3119config ARCH_SUSPEND_POSSIBLE
3120	def_bool y
3121	depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP
3122
3123source "kernel/power/Kconfig"
3124
3125endmenu
3126
3127config MIPS_EXTERNAL_TIMER
3128	bool
 
3129
3130menu "CPU Power Management"
3131
3132if CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3133source "drivers/cpufreq/Kconfig"
3134endif # CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
3135
3136source "drivers/cpuidle/Kconfig"
3137
3138endmenu
3139
3140source "arch/mips/kvm/Kconfig"
3141
3142source "arch/mips/vdso/Kconfig"