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1/*
2 A FORE Systems 200E-series driver for ATM on Linux.
3 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003.
4
5 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
6
7 This driver simultaneously supports PCA-200E and SBA-200E adapters
8 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23*/
24
25
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/init.h>
29#include <linux/capability.h>
30#include <linux/interrupt.h>
31#include <linux/bitops.h>
32#include <linux/pci.h>
33#include <linux/module.h>
34#include <linux/atmdev.h>
35#include <linux/sonet.h>
36#include <linux/atm_suni.h>
37#include <linux/dma-mapping.h>
38#include <linux/delay.h>
39#include <linux/firmware.h>
40#include <asm/io.h>
41#include <asm/string.h>
42#include <asm/page.h>
43#include <asm/irq.h>
44#include <asm/dma.h>
45#include <asm/byteorder.h>
46#include <asm/uaccess.h>
47#include <linux/atomic.h>
48
49#ifdef CONFIG_SBUS
50#include <linux/of.h>
51#include <linux/of_device.h>
52#include <asm/idprom.h>
53#include <asm/openprom.h>
54#include <asm/oplib.h>
55#include <asm/pgtable.h>
56#endif
57
58#if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */
59#define FORE200E_USE_TASKLET
60#endif
61
62#if 0 /* enable the debugging code of the buffer supply queues */
63#define FORE200E_BSQ_DEBUG
64#endif
65
66#if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */
67#define FORE200E_52BYTE_AAL0_SDU
68#endif
69
70#include "fore200e.h"
71#include "suni.h"
72
73#define FORE200E_VERSION "0.3e"
74
75#define FORE200E "fore200e: "
76
77#if 0 /* override .config */
78#define CONFIG_ATM_FORE200E_DEBUG 1
79#endif
80#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
81#define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
82 printk(FORE200E format, ##args); } while (0)
83#else
84#define DPRINTK(level, format, args...) do {} while (0)
85#endif
86
87
88#define FORE200E_ALIGN(addr, alignment) \
89 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
90
91#define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
92
93#define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
94
95#define FORE200E_NEXT_ENTRY(index, modulo) (index = ((index) + 1) % (modulo))
96
97#if 1
98#define ASSERT(expr) if (!(expr)) { \
99 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
100 __func__, __LINE__, #expr); \
101 panic(FORE200E "%s", __func__); \
102 }
103#else
104#define ASSERT(expr) do {} while (0)
105#endif
106
107
108static const struct atmdev_ops fore200e_ops;
109static const struct fore200e_bus fore200e_bus[];
110
111static LIST_HEAD(fore200e_boards);
112
113
114MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
115MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
116MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
117
118
119static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
120 { BUFFER_S1_NBR, BUFFER_L1_NBR },
121 { BUFFER_S2_NBR, BUFFER_L2_NBR }
122};
123
124static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
125 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
126 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
127};
128
129
130#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
131static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
132#endif
133
134
135#if 0 /* currently unused */
136static int
137fore200e_fore2atm_aal(enum fore200e_aal aal)
138{
139 switch(aal) {
140 case FORE200E_AAL0: return ATM_AAL0;
141 case FORE200E_AAL34: return ATM_AAL34;
142 case FORE200E_AAL5: return ATM_AAL5;
143 }
144
145 return -EINVAL;
146}
147#endif
148
149
150static enum fore200e_aal
151fore200e_atm2fore_aal(int aal)
152{
153 switch(aal) {
154 case ATM_AAL0: return FORE200E_AAL0;
155 case ATM_AAL34: return FORE200E_AAL34;
156 case ATM_AAL1:
157 case ATM_AAL2:
158 case ATM_AAL5: return FORE200E_AAL5;
159 }
160
161 return -EINVAL;
162}
163
164
165static char*
166fore200e_irq_itoa(int irq)
167{
168 static char str[8];
169 sprintf(str, "%d", irq);
170 return str;
171}
172
173
174/* allocate and align a chunk of memory intended to hold the data behing exchanged
175 between the driver and the adapter (using streaming DVMA) */
176
177static int
178fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
179{
180 unsigned long offset = 0;
181
182 if (alignment <= sizeof(int))
183 alignment = 0;
184
185 chunk->alloc_size = size + alignment;
186 chunk->align_size = size;
187 chunk->direction = direction;
188
189 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
190 if (chunk->alloc_addr == NULL)
191 return -ENOMEM;
192
193 if (alignment > 0)
194 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
195
196 chunk->align_addr = chunk->alloc_addr + offset;
197
198 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
199
200 return 0;
201}
202
203
204/* free a chunk of memory */
205
206static void
207fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
208{
209 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
210
211 kfree(chunk->alloc_addr);
212}
213
214
215static void
216fore200e_spin(int msecs)
217{
218 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
219 while (time_before(jiffies, timeout));
220}
221
222
223static int
224fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
225{
226 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
227 int ok;
228
229 mb();
230 do {
231 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
232 break;
233
234 } while (time_before(jiffies, timeout));
235
236#if 1
237 if (!ok) {
238 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
239 *addr, val);
240 }
241#endif
242
243 return ok;
244}
245
246
247static int
248fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
249{
250 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
251 int ok;
252
253 do {
254 if ((ok = (fore200e->bus->read(addr) == val)))
255 break;
256
257 } while (time_before(jiffies, timeout));
258
259#if 1
260 if (!ok) {
261 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
262 fore200e->bus->read(addr), val);
263 }
264#endif
265
266 return ok;
267}
268
269
270static void
271fore200e_free_rx_buf(struct fore200e* fore200e)
272{
273 int scheme, magn, nbr;
274 struct buffer* buffer;
275
276 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
277 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
278
279 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
280
281 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
282
283 struct chunk* data = &buffer[ nbr ].data;
284
285 if (data->alloc_addr != NULL)
286 fore200e_chunk_free(fore200e, data);
287 }
288 }
289 }
290 }
291}
292
293
294static void
295fore200e_uninit_bs_queue(struct fore200e* fore200e)
296{
297 int scheme, magn;
298
299 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
300 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
301
302 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
303 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
304
305 if (status->alloc_addr)
306 fore200e->bus->dma_chunk_free(fore200e, status);
307
308 if (rbd_block->alloc_addr)
309 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
310 }
311 }
312}
313
314
315static int
316fore200e_reset(struct fore200e* fore200e, int diag)
317{
318 int ok;
319
320 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
321
322 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
323
324 fore200e->bus->reset(fore200e);
325
326 if (diag) {
327 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
328 if (ok == 0) {
329
330 printk(FORE200E "device %s self-test failed\n", fore200e->name);
331 return -ENODEV;
332 }
333
334 printk(FORE200E "device %s self-test passed\n", fore200e->name);
335
336 fore200e->state = FORE200E_STATE_RESET;
337 }
338
339 return 0;
340}
341
342
343static void
344fore200e_shutdown(struct fore200e* fore200e)
345{
346 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
347 fore200e->name, fore200e->phys_base,
348 fore200e_irq_itoa(fore200e->irq));
349
350 if (fore200e->state > FORE200E_STATE_RESET) {
351 /* first, reset the board to prevent further interrupts or data transfers */
352 fore200e_reset(fore200e, 0);
353 }
354
355 /* then, release all allocated resources */
356 switch(fore200e->state) {
357
358 case FORE200E_STATE_COMPLETE:
359 kfree(fore200e->stats);
360
361 case FORE200E_STATE_IRQ:
362 free_irq(fore200e->irq, fore200e->atm_dev);
363
364 case FORE200E_STATE_ALLOC_BUF:
365 fore200e_free_rx_buf(fore200e);
366
367 case FORE200E_STATE_INIT_BSQ:
368 fore200e_uninit_bs_queue(fore200e);
369
370 case FORE200E_STATE_INIT_RXQ:
371 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
372 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
373
374 case FORE200E_STATE_INIT_TXQ:
375 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
376 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
377
378 case FORE200E_STATE_INIT_CMDQ:
379 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
380
381 case FORE200E_STATE_INITIALIZE:
382 /* nothing to do for that state */
383
384 case FORE200E_STATE_START_FW:
385 /* nothing to do for that state */
386
387 case FORE200E_STATE_RESET:
388 /* nothing to do for that state */
389
390 case FORE200E_STATE_MAP:
391 fore200e->bus->unmap(fore200e);
392
393 case FORE200E_STATE_CONFIGURE:
394 /* nothing to do for that state */
395
396 case FORE200E_STATE_REGISTER:
397 /* XXX shouldn't we *start* by deregistering the device? */
398 atm_dev_deregister(fore200e->atm_dev);
399
400 case FORE200E_STATE_BLANK:
401 /* nothing to do for that state */
402 break;
403 }
404}
405
406
407#ifdef CONFIG_PCI
408
409static u32 fore200e_pca_read(volatile u32 __iomem *addr)
410{
411 /* on big-endian hosts, the board is configured to convert
412 the endianess of slave RAM accesses */
413 return le32_to_cpu(readl(addr));
414}
415
416
417static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
418{
419 /* on big-endian hosts, the board is configured to convert
420 the endianess of slave RAM accesses */
421 writel(cpu_to_le32(val), addr);
422}
423
424
425static u32
426fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
427{
428 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
429
430 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
431 virt_addr, size, direction, dma_addr);
432
433 return dma_addr;
434}
435
436
437static void
438fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
439{
440 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
441 dma_addr, size, direction);
442
443 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
444}
445
446
447static void
448fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
449{
450 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
451
452 pci_dma_sync_single_for_cpu((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
453}
454
455static void
456fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
457{
458 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
459
460 pci_dma_sync_single_for_device((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
461}
462
463
464/* allocate a DMA consistent chunk of memory intended to act as a communication mechanism
465 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
466
467static int
468fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
469 int size, int nbr, int alignment)
470{
471 /* returned chunks are page-aligned */
472 chunk->alloc_size = size * nbr;
473 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
474 chunk->alloc_size,
475 &chunk->dma_addr);
476
477 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
478 return -ENOMEM;
479
480 chunk->align_addr = chunk->alloc_addr;
481
482 return 0;
483}
484
485
486/* free a DMA consistent chunk of memory */
487
488static void
489fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
490{
491 pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
492 chunk->alloc_size,
493 chunk->alloc_addr,
494 chunk->dma_addr);
495}
496
497
498static int
499fore200e_pca_irq_check(struct fore200e* fore200e)
500{
501 /* this is a 1 bit register */
502 int irq_posted = readl(fore200e->regs.pca.psr);
503
504#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
505 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
506 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
507 }
508#endif
509
510 return irq_posted;
511}
512
513
514static void
515fore200e_pca_irq_ack(struct fore200e* fore200e)
516{
517 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
518}
519
520
521static void
522fore200e_pca_reset(struct fore200e* fore200e)
523{
524 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
525 fore200e_spin(10);
526 writel(0, fore200e->regs.pca.hcr);
527}
528
529
530static int __devinit
531fore200e_pca_map(struct fore200e* fore200e)
532{
533 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
534
535 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
536
537 if (fore200e->virt_base == NULL) {
538 printk(FORE200E "can't map device %s\n", fore200e->name);
539 return -EFAULT;
540 }
541
542 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
543
544 /* gain access to the PCA specific registers */
545 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
546 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
547 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
548
549 fore200e->state = FORE200E_STATE_MAP;
550 return 0;
551}
552
553
554static void
555fore200e_pca_unmap(struct fore200e* fore200e)
556{
557 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
558
559 if (fore200e->virt_base != NULL)
560 iounmap(fore200e->virt_base);
561}
562
563
564static int __devinit
565fore200e_pca_configure(struct fore200e* fore200e)
566{
567 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
568 u8 master_ctrl, latency;
569
570 DPRINTK(2, "device %s being configured\n", fore200e->name);
571
572 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
573 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
574 return -EIO;
575 }
576
577 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
578
579 master_ctrl = master_ctrl
580#if defined(__BIG_ENDIAN)
581 /* request the PCA board to convert the endianess of slave RAM accesses */
582 | PCA200E_CTRL_CONVERT_ENDIAN
583#endif
584#if 0
585 | PCA200E_CTRL_DIS_CACHE_RD
586 | PCA200E_CTRL_DIS_WRT_INVAL
587 | PCA200E_CTRL_ENA_CONT_REQ_MODE
588 | PCA200E_CTRL_2_CACHE_WRT_INVAL
589#endif
590 | PCA200E_CTRL_LARGE_PCI_BURSTS;
591
592 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
593
594 /* raise latency from 32 (default) to 192, as this seems to prevent NIC
595 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition.
596 this may impact the performances of other PCI devices on the same bus, though */
597 latency = 192;
598 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
599
600 fore200e->state = FORE200E_STATE_CONFIGURE;
601 return 0;
602}
603
604
605static int __init
606fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
607{
608 struct host_cmdq* cmdq = &fore200e->host_cmdq;
609 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
610 struct prom_opcode opcode;
611 int ok;
612 u32 prom_dma;
613
614 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
615
616 opcode.opcode = OPCODE_GET_PROM;
617 opcode.pad = 0;
618
619 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE);
620
621 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
622
623 *entry->status = STATUS_PENDING;
624
625 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
626
627 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
628
629 *entry->status = STATUS_FREE;
630
631 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
632
633 if (ok == 0) {
634 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
635 return -EIO;
636 }
637
638#if defined(__BIG_ENDIAN)
639
640#define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
641
642 /* MAC address is stored as little-endian */
643 swap_here(&prom->mac_addr[0]);
644 swap_here(&prom->mac_addr[4]);
645#endif
646
647 return 0;
648}
649
650
651static int
652fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
653{
654 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
655
656 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
657 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
658}
659
660#endif /* CONFIG_PCI */
661
662
663#ifdef CONFIG_SBUS
664
665static u32 fore200e_sba_read(volatile u32 __iomem *addr)
666{
667 return sbus_readl(addr);
668}
669
670static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
671{
672 sbus_writel(val, addr);
673}
674
675static u32 fore200e_sba_dma_map(struct fore200e *fore200e, void* virt_addr, int size, int direction)
676{
677 struct platform_device *op = fore200e->bus_dev;
678 u32 dma_addr;
679
680 dma_addr = dma_map_single(&op->dev, virt_addr, size, direction);
681
682 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
683 virt_addr, size, direction, dma_addr);
684
685 return dma_addr;
686}
687
688static void fore200e_sba_dma_unmap(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
689{
690 struct platform_device *op = fore200e->bus_dev;
691
692 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
693 dma_addr, size, direction);
694
695 dma_unmap_single(&op->dev, dma_addr, size, direction);
696}
697
698static void fore200e_sba_dma_sync_for_cpu(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
699{
700 struct platform_device *op = fore200e->bus_dev;
701
702 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
703
704 dma_sync_single_for_cpu(&op->dev, dma_addr, size, direction);
705}
706
707static void fore200e_sba_dma_sync_for_device(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
708{
709 struct platform_device *op = fore200e->bus_dev;
710
711 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
712
713 dma_sync_single_for_device(&op->dev, dma_addr, size, direction);
714}
715
716/* Allocate a DVMA consistent chunk of memory intended to act as a communication mechanism
717 * (to hold descriptors, status, queues, etc.) shared by the driver and the adapter.
718 */
719static int fore200e_sba_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk,
720 int size, int nbr, int alignment)
721{
722 struct platform_device *op = fore200e->bus_dev;
723
724 chunk->alloc_size = chunk->align_size = size * nbr;
725
726 /* returned chunks are page-aligned */
727 chunk->alloc_addr = dma_alloc_coherent(&op->dev, chunk->alloc_size,
728 &chunk->dma_addr, GFP_ATOMIC);
729
730 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
731 return -ENOMEM;
732
733 chunk->align_addr = chunk->alloc_addr;
734
735 return 0;
736}
737
738/* free a DVMA consistent chunk of memory */
739static void fore200e_sba_dma_chunk_free(struct fore200e *fore200e, struct chunk *chunk)
740{
741 struct platform_device *op = fore200e->bus_dev;
742
743 dma_free_coherent(&op->dev, chunk->alloc_size,
744 chunk->alloc_addr, chunk->dma_addr);
745}
746
747static void fore200e_sba_irq_enable(struct fore200e *fore200e)
748{
749 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
750 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
751}
752
753static int fore200e_sba_irq_check(struct fore200e *fore200e)
754{
755 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
756}
757
758static void fore200e_sba_irq_ack(struct fore200e *fore200e)
759{
760 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
761 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
762}
763
764static void fore200e_sba_reset(struct fore200e *fore200e)
765{
766 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
767 fore200e_spin(10);
768 fore200e->bus->write(0, fore200e->regs.sba.hcr);
769}
770
771static int __init fore200e_sba_map(struct fore200e *fore200e)
772{
773 struct platform_device *op = fore200e->bus_dev;
774 unsigned int bursts;
775
776 /* gain access to the SBA specific registers */
777 fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
778 fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
779 fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
780 fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
781
782 if (!fore200e->virt_base) {
783 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
784 return -EFAULT;
785 }
786
787 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
788
789 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
790
791 /* get the supported DVMA burst sizes */
792 bursts = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0x00);
793
794 if (sbus_can_dma_64bit())
795 sbus_set_sbus64(&op->dev, bursts);
796
797 fore200e->state = FORE200E_STATE_MAP;
798 return 0;
799}
800
801static void fore200e_sba_unmap(struct fore200e *fore200e)
802{
803 struct platform_device *op = fore200e->bus_dev;
804
805 of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
806 of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
807 of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
808 of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH);
809}
810
811static int __init fore200e_sba_configure(struct fore200e *fore200e)
812{
813 fore200e->state = FORE200E_STATE_CONFIGURE;
814 return 0;
815}
816
817static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom)
818{
819 struct platform_device *op = fore200e->bus_dev;
820 const u8 *prop;
821 int len;
822
823 prop = of_get_property(op->dev.of_node, "madaddrlo2", &len);
824 if (!prop)
825 return -ENODEV;
826 memcpy(&prom->mac_addr[4], prop, 4);
827
828 prop = of_get_property(op->dev.of_node, "madaddrhi4", &len);
829 if (!prop)
830 return -ENODEV;
831 memcpy(&prom->mac_addr[2], prop, 4);
832
833 prom->serial_number = of_getintprop_default(op->dev.of_node,
834 "serialnumber", 0);
835 prom->hw_revision = of_getintprop_default(op->dev.of_node,
836 "promversion", 0);
837
838 return 0;
839}
840
841static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page)
842{
843 struct platform_device *op = fore200e->bus_dev;
844 const struct linux_prom_registers *regs;
845
846 regs = of_get_property(op->dev.of_node, "reg", NULL);
847
848 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n",
849 (regs ? regs->which_io : 0), op->dev.of_node->name);
850}
851#endif /* CONFIG_SBUS */
852
853
854static void
855fore200e_tx_irq(struct fore200e* fore200e)
856{
857 struct host_txq* txq = &fore200e->host_txq;
858 struct host_txq_entry* entry;
859 struct atm_vcc* vcc;
860 struct fore200e_vc_map* vc_map;
861
862 if (fore200e->host_txq.txing == 0)
863 return;
864
865 for (;;) {
866
867 entry = &txq->host_entry[ txq->tail ];
868
869 if ((*entry->status & STATUS_COMPLETE) == 0) {
870 break;
871 }
872
873 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
874 entry, txq->tail, entry->vc_map, entry->skb);
875
876 /* free copy of misaligned data */
877 kfree(entry->data);
878
879 /* remove DMA mapping */
880 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
881 DMA_TO_DEVICE);
882
883 vc_map = entry->vc_map;
884
885 /* vcc closed since the time the entry was submitted for tx? */
886 if ((vc_map->vcc == NULL) ||
887 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
888
889 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
890 fore200e->atm_dev->number);
891
892 dev_kfree_skb_any(entry->skb);
893 }
894 else {
895 ASSERT(vc_map->vcc);
896
897 /* vcc closed then immediately re-opened? */
898 if (vc_map->incarn != entry->incarn) {
899
900 /* when a vcc is closed, some PDUs may be still pending in the tx queue.
901 if the same vcc is immediately re-opened, those pending PDUs must
902 not be popped after the completion of their emission, as they refer
903 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc
904 would be decremented by the size of the (unrelated) skb, possibly
905 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc.
906 we thus bind the tx entry to the current incarnation of the vcc
907 when the entry is submitted for tx. When the tx later completes,
908 if the incarnation number of the tx entry does not match the one
909 of the vcc, then this implies that the vcc has been closed then re-opened.
910 we thus just drop the skb here. */
911
912 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
913 fore200e->atm_dev->number);
914
915 dev_kfree_skb_any(entry->skb);
916 }
917 else {
918 vcc = vc_map->vcc;
919 ASSERT(vcc);
920
921 /* notify tx completion */
922 if (vcc->pop) {
923 vcc->pop(vcc, entry->skb);
924 }
925 else {
926 dev_kfree_skb_any(entry->skb);
927 }
928#if 1
929 /* race fixed by the above incarnation mechanism, but... */
930 if (atomic_read(&sk_atm(vcc)->sk_wmem_alloc) < 0) {
931 atomic_set(&sk_atm(vcc)->sk_wmem_alloc, 0);
932 }
933#endif
934 /* check error condition */
935 if (*entry->status & STATUS_ERROR)
936 atomic_inc(&vcc->stats->tx_err);
937 else
938 atomic_inc(&vcc->stats->tx);
939 }
940 }
941
942 *entry->status = STATUS_FREE;
943
944 fore200e->host_txq.txing--;
945
946 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
947 }
948}
949
950
951#ifdef FORE200E_BSQ_DEBUG
952int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
953{
954 struct buffer* buffer;
955 int count = 0;
956
957 buffer = bsq->freebuf;
958 while (buffer) {
959
960 if (buffer->supplied) {
961 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
962 where, scheme, magn, buffer->index);
963 }
964
965 if (buffer->magn != magn) {
966 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
967 where, scheme, magn, buffer->index, buffer->magn);
968 }
969
970 if (buffer->scheme != scheme) {
971 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
972 where, scheme, magn, buffer->index, buffer->scheme);
973 }
974
975 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
976 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
977 where, scheme, magn, buffer->index);
978 }
979
980 count++;
981 buffer = buffer->next;
982 }
983
984 if (count != bsq->freebuf_count) {
985 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
986 where, scheme, magn, count, bsq->freebuf_count);
987 }
988 return 0;
989}
990#endif
991
992
993static void
994fore200e_supply(struct fore200e* fore200e)
995{
996 int scheme, magn, i;
997
998 struct host_bsq* bsq;
999 struct host_bsq_entry* entry;
1000 struct buffer* buffer;
1001
1002 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1003 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1004
1005 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1006
1007#ifdef FORE200E_BSQ_DEBUG
1008 bsq_audit(1, bsq, scheme, magn);
1009#endif
1010 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
1011
1012 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
1013 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
1014
1015 entry = &bsq->host_entry[ bsq->head ];
1016
1017 for (i = 0; i < RBD_BLK_SIZE; i++) {
1018
1019 /* take the first buffer in the free buffer list */
1020 buffer = bsq->freebuf;
1021 if (!buffer) {
1022 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
1023 scheme, magn, bsq->freebuf_count);
1024 return;
1025 }
1026 bsq->freebuf = buffer->next;
1027
1028#ifdef FORE200E_BSQ_DEBUG
1029 if (buffer->supplied)
1030 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
1031 scheme, magn, buffer->index);
1032 buffer->supplied = 1;
1033#endif
1034 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1035 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1036 }
1037
1038 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1039
1040 /* decrease accordingly the number of free rx buffers */
1041 bsq->freebuf_count -= RBD_BLK_SIZE;
1042
1043 *entry->status = STATUS_PENDING;
1044 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1045 }
1046 }
1047 }
1048}
1049
1050
1051static int
1052fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
1053{
1054 struct sk_buff* skb;
1055 struct buffer* buffer;
1056 struct fore200e_vcc* fore200e_vcc;
1057 int i, pdu_len = 0;
1058#ifdef FORE200E_52BYTE_AAL0_SDU
1059 u32 cell_header = 0;
1060#endif
1061
1062 ASSERT(vcc);
1063
1064 fore200e_vcc = FORE200E_VCC(vcc);
1065 ASSERT(fore200e_vcc);
1066
1067#ifdef FORE200E_52BYTE_AAL0_SDU
1068 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1069
1070 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1071 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1072 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1073 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1074 rpd->atm_header.clp;
1075 pdu_len = 4;
1076 }
1077#endif
1078
1079 /* compute total PDU length */
1080 for (i = 0; i < rpd->nseg; i++)
1081 pdu_len += rpd->rsd[ i ].length;
1082
1083 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1084 if (skb == NULL) {
1085 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1086
1087 atomic_inc(&vcc->stats->rx_drop);
1088 return -ENOMEM;
1089 }
1090
1091 __net_timestamp(skb);
1092
1093#ifdef FORE200E_52BYTE_AAL0_SDU
1094 if (cell_header) {
1095 *((u32*)skb_put(skb, 4)) = cell_header;
1096 }
1097#endif
1098
1099 /* reassemble segments */
1100 for (i = 0; i < rpd->nseg; i++) {
1101
1102 /* rebuild rx buffer address from rsd handle */
1103 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1104
1105 /* Make device DMA transfer visible to CPU. */
1106 fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1107
1108 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
1109
1110 /* Now let the device get at it again. */
1111 fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1112 }
1113
1114 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1115
1116 if (pdu_len < fore200e_vcc->rx_min_pdu)
1117 fore200e_vcc->rx_min_pdu = pdu_len;
1118 if (pdu_len > fore200e_vcc->rx_max_pdu)
1119 fore200e_vcc->rx_max_pdu = pdu_len;
1120 fore200e_vcc->rx_pdu++;
1121
1122 /* push PDU */
1123 if (atm_charge(vcc, skb->truesize) == 0) {
1124
1125 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1126 vcc->itf, vcc->vpi, vcc->vci);
1127
1128 dev_kfree_skb_any(skb);
1129
1130 atomic_inc(&vcc->stats->rx_drop);
1131 return -ENOMEM;
1132 }
1133
1134 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1135
1136 vcc->push(vcc, skb);
1137 atomic_inc(&vcc->stats->rx);
1138
1139 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1140
1141 return 0;
1142}
1143
1144
1145static void
1146fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1147{
1148 struct host_bsq* bsq;
1149 struct buffer* buffer;
1150 int i;
1151
1152 for (i = 0; i < rpd->nseg; i++) {
1153
1154 /* rebuild rx buffer address from rsd handle */
1155 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1156
1157 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1158
1159#ifdef FORE200E_BSQ_DEBUG
1160 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1161
1162 if (buffer->supplied == 0)
1163 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1164 buffer->scheme, buffer->magn, buffer->index);
1165 buffer->supplied = 0;
1166#endif
1167
1168 /* re-insert the buffer into the free buffer list */
1169 buffer->next = bsq->freebuf;
1170 bsq->freebuf = buffer;
1171
1172 /* then increment the number of free rx buffers */
1173 bsq->freebuf_count++;
1174 }
1175}
1176
1177
1178static void
1179fore200e_rx_irq(struct fore200e* fore200e)
1180{
1181 struct host_rxq* rxq = &fore200e->host_rxq;
1182 struct host_rxq_entry* entry;
1183 struct atm_vcc* vcc;
1184 struct fore200e_vc_map* vc_map;
1185
1186 for (;;) {
1187
1188 entry = &rxq->host_entry[ rxq->head ];
1189
1190 /* no more received PDUs */
1191 if ((*entry->status & STATUS_COMPLETE) == 0)
1192 break;
1193
1194 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1195
1196 if ((vc_map->vcc == NULL) ||
1197 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1198
1199 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1200 fore200e->atm_dev->number,
1201 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1202 }
1203 else {
1204 vcc = vc_map->vcc;
1205 ASSERT(vcc);
1206
1207 if ((*entry->status & STATUS_ERROR) == 0) {
1208
1209 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1210 }
1211 else {
1212 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1213 fore200e->atm_dev->number,
1214 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1215 atomic_inc(&vcc->stats->rx_err);
1216 }
1217 }
1218
1219 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1220
1221 fore200e_collect_rpd(fore200e, entry->rpd);
1222
1223 /* rewrite the rpd address to ack the received PDU */
1224 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1225 *entry->status = STATUS_FREE;
1226
1227 fore200e_supply(fore200e);
1228 }
1229}
1230
1231
1232#ifndef FORE200E_USE_TASKLET
1233static void
1234fore200e_irq(struct fore200e* fore200e)
1235{
1236 unsigned long flags;
1237
1238 spin_lock_irqsave(&fore200e->q_lock, flags);
1239 fore200e_rx_irq(fore200e);
1240 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1241
1242 spin_lock_irqsave(&fore200e->q_lock, flags);
1243 fore200e_tx_irq(fore200e);
1244 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1245}
1246#endif
1247
1248
1249static irqreturn_t
1250fore200e_interrupt(int irq, void* dev)
1251{
1252 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1253
1254 if (fore200e->bus->irq_check(fore200e) == 0) {
1255
1256 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1257 return IRQ_NONE;
1258 }
1259 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1260
1261#ifdef FORE200E_USE_TASKLET
1262 tasklet_schedule(&fore200e->tx_tasklet);
1263 tasklet_schedule(&fore200e->rx_tasklet);
1264#else
1265 fore200e_irq(fore200e);
1266#endif
1267
1268 fore200e->bus->irq_ack(fore200e);
1269 return IRQ_HANDLED;
1270}
1271
1272
1273#ifdef FORE200E_USE_TASKLET
1274static void
1275fore200e_tx_tasklet(unsigned long data)
1276{
1277 struct fore200e* fore200e = (struct fore200e*) data;
1278 unsigned long flags;
1279
1280 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1281
1282 spin_lock_irqsave(&fore200e->q_lock, flags);
1283 fore200e_tx_irq(fore200e);
1284 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1285}
1286
1287
1288static void
1289fore200e_rx_tasklet(unsigned long data)
1290{
1291 struct fore200e* fore200e = (struct fore200e*) data;
1292 unsigned long flags;
1293
1294 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1295
1296 spin_lock_irqsave(&fore200e->q_lock, flags);
1297 fore200e_rx_irq((struct fore200e*) data);
1298 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1299}
1300#endif
1301
1302
1303static int
1304fore200e_select_scheme(struct atm_vcc* vcc)
1305{
1306 /* fairly balance the VCs over (identical) buffer schemes */
1307 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1308
1309 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1310 vcc->itf, vcc->vpi, vcc->vci, scheme);
1311
1312 return scheme;
1313}
1314
1315
1316static int
1317fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1318{
1319 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1320 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1321 struct activate_opcode activ_opcode;
1322 struct deactivate_opcode deactiv_opcode;
1323 struct vpvc vpvc;
1324 int ok;
1325 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1326
1327 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1328
1329 if (activate) {
1330 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1331
1332 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1333 activ_opcode.aal = aal;
1334 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1335 activ_opcode.pad = 0;
1336 }
1337 else {
1338 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1339 deactiv_opcode.pad = 0;
1340 }
1341
1342 vpvc.vci = vcc->vci;
1343 vpvc.vpi = vcc->vpi;
1344
1345 *entry->status = STATUS_PENDING;
1346
1347 if (activate) {
1348
1349#ifdef FORE200E_52BYTE_AAL0_SDU
1350 mtu = 48;
1351#endif
1352 /* the MTU is not used by the cp, except in the case of AAL0 */
1353 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1354 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
1355 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
1356 }
1357 else {
1358 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
1359 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
1360 }
1361
1362 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1363
1364 *entry->status = STATUS_FREE;
1365
1366 if (ok == 0) {
1367 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1368 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1369 return -EIO;
1370 }
1371
1372 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1373 activate ? "open" : "clos");
1374
1375 return 0;
1376}
1377
1378
1379#define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1380
1381static void
1382fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1383{
1384 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1385
1386 /* compute the data cells to idle cells ratio from the tx PCR */
1387 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1388 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1389 }
1390 else {
1391 /* disable rate control */
1392 rate->data_cells = rate->idle_cells = 0;
1393 }
1394}
1395
1396
1397static int
1398fore200e_open(struct atm_vcc *vcc)
1399{
1400 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1401 struct fore200e_vcc* fore200e_vcc;
1402 struct fore200e_vc_map* vc_map;
1403 unsigned long flags;
1404 int vci = vcc->vci;
1405 short vpi = vcc->vpi;
1406
1407 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1408 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1409
1410 spin_lock_irqsave(&fore200e->q_lock, flags);
1411
1412 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1413 if (vc_map->vcc) {
1414
1415 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1416
1417 printk(FORE200E "VC %d.%d.%d already in use\n",
1418 fore200e->atm_dev->number, vpi, vci);
1419
1420 return -EINVAL;
1421 }
1422
1423 vc_map->vcc = vcc;
1424
1425 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1426
1427 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1428 if (fore200e_vcc == NULL) {
1429 vc_map->vcc = NULL;
1430 return -ENOMEM;
1431 }
1432
1433 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1434 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1435 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1436 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1437 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1438 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1439 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1440
1441 /* pseudo-CBR bandwidth requested? */
1442 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1443
1444 mutex_lock(&fore200e->rate_mtx);
1445 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1446 mutex_unlock(&fore200e->rate_mtx);
1447
1448 kfree(fore200e_vcc);
1449 vc_map->vcc = NULL;
1450 return -EAGAIN;
1451 }
1452
1453 /* reserve bandwidth */
1454 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1455 mutex_unlock(&fore200e->rate_mtx);
1456 }
1457
1458 vcc->itf = vcc->dev->number;
1459
1460 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1461 set_bit(ATM_VF_ADDR, &vcc->flags);
1462
1463 vcc->dev_data = fore200e_vcc;
1464
1465 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1466
1467 vc_map->vcc = NULL;
1468
1469 clear_bit(ATM_VF_ADDR, &vcc->flags);
1470 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1471
1472 vcc->dev_data = NULL;
1473
1474 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1475
1476 kfree(fore200e_vcc);
1477 return -EINVAL;
1478 }
1479
1480 /* compute rate control parameters */
1481 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1482
1483 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1484 set_bit(ATM_VF_HASQOS, &vcc->flags);
1485
1486 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1487 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1488 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1489 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1490 }
1491
1492 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1493 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1494 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1495
1496 /* new incarnation of the vcc */
1497 vc_map->incarn = ++fore200e->incarn_count;
1498
1499 /* VC unusable before this flag is set */
1500 set_bit(ATM_VF_READY, &vcc->flags);
1501
1502 return 0;
1503}
1504
1505
1506static void
1507fore200e_close(struct atm_vcc* vcc)
1508{
1509 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1510 struct fore200e_vcc* fore200e_vcc;
1511 struct fore200e_vc_map* vc_map;
1512 unsigned long flags;
1513
1514 ASSERT(vcc);
1515 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1516 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1517
1518 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1519
1520 clear_bit(ATM_VF_READY, &vcc->flags);
1521
1522 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1523
1524 spin_lock_irqsave(&fore200e->q_lock, flags);
1525
1526 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1527
1528 /* the vc is no longer considered as "in use" by fore200e_open() */
1529 vc_map->vcc = NULL;
1530
1531 vcc->itf = vcc->vci = vcc->vpi = 0;
1532
1533 fore200e_vcc = FORE200E_VCC(vcc);
1534 vcc->dev_data = NULL;
1535
1536 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1537
1538 /* release reserved bandwidth, if any */
1539 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1540
1541 mutex_lock(&fore200e->rate_mtx);
1542 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1543 mutex_unlock(&fore200e->rate_mtx);
1544
1545 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1546 }
1547
1548 clear_bit(ATM_VF_ADDR, &vcc->flags);
1549 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1550
1551 ASSERT(fore200e_vcc);
1552 kfree(fore200e_vcc);
1553}
1554
1555
1556static int
1557fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1558{
1559 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1560 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1561 struct fore200e_vc_map* vc_map;
1562 struct host_txq* txq = &fore200e->host_txq;
1563 struct host_txq_entry* entry;
1564 struct tpd* tpd;
1565 struct tpd_haddr tpd_haddr;
1566 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1567 int tx_copy = 0;
1568 int tx_len = skb->len;
1569 u32* cell_header = NULL;
1570 unsigned char* skb_data;
1571 int skb_len;
1572 unsigned char* data;
1573 unsigned long flags;
1574
1575 ASSERT(vcc);
1576 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1577 ASSERT(fore200e);
1578 ASSERT(fore200e_vcc);
1579
1580 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1581 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1582 dev_kfree_skb_any(skb);
1583 return -EINVAL;
1584 }
1585
1586#ifdef FORE200E_52BYTE_AAL0_SDU
1587 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1588 cell_header = (u32*) skb->data;
1589 skb_data = skb->data + 4; /* skip 4-byte cell header */
1590 skb_len = tx_len = skb->len - 4;
1591
1592 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1593 }
1594 else
1595#endif
1596 {
1597 skb_data = skb->data;
1598 skb_len = skb->len;
1599 }
1600
1601 if (((unsigned long)skb_data) & 0x3) {
1602
1603 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1604 tx_copy = 1;
1605 tx_len = skb_len;
1606 }
1607
1608 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1609
1610 /* this simply NUKES the PCA board */
1611 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1612 tx_copy = 1;
1613 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1614 }
1615
1616 if (tx_copy) {
1617 data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1618 if (data == NULL) {
1619 if (vcc->pop) {
1620 vcc->pop(vcc, skb);
1621 }
1622 else {
1623 dev_kfree_skb_any(skb);
1624 }
1625 return -ENOMEM;
1626 }
1627
1628 memcpy(data, skb_data, skb_len);
1629 if (skb_len < tx_len)
1630 memset(data + skb_len, 0x00, tx_len - skb_len);
1631 }
1632 else {
1633 data = skb_data;
1634 }
1635
1636 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1637 ASSERT(vc_map->vcc == vcc);
1638
1639 retry_here:
1640
1641 spin_lock_irqsave(&fore200e->q_lock, flags);
1642
1643 entry = &txq->host_entry[ txq->head ];
1644
1645 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1646
1647 /* try to free completed tx queue entries */
1648 fore200e_tx_irq(fore200e);
1649
1650 if (*entry->status != STATUS_FREE) {
1651
1652 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1653
1654 /* retry once again? */
1655 if (--retry > 0) {
1656 udelay(50);
1657 goto retry_here;
1658 }
1659
1660 atomic_inc(&vcc->stats->tx_err);
1661
1662 fore200e->tx_sat++;
1663 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1664 fore200e->name, fore200e->cp_queues->heartbeat);
1665 if (vcc->pop) {
1666 vcc->pop(vcc, skb);
1667 }
1668 else {
1669 dev_kfree_skb_any(skb);
1670 }
1671
1672 if (tx_copy)
1673 kfree(data);
1674
1675 return -ENOBUFS;
1676 }
1677 }
1678
1679 entry->incarn = vc_map->incarn;
1680 entry->vc_map = vc_map;
1681 entry->skb = skb;
1682 entry->data = tx_copy ? data : NULL;
1683
1684 tpd = entry->tpd;
1685 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE);
1686 tpd->tsd[ 0 ].length = tx_len;
1687
1688 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1689 txq->txing++;
1690
1691 /* The dma_map call above implies a dma_sync so the device can use it,
1692 * thus no explicit dma_sync call is necessary here.
1693 */
1694
1695 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1696 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1697 tpd->tsd[0].length, skb_len);
1698
1699 if (skb_len < fore200e_vcc->tx_min_pdu)
1700 fore200e_vcc->tx_min_pdu = skb_len;
1701 if (skb_len > fore200e_vcc->tx_max_pdu)
1702 fore200e_vcc->tx_max_pdu = skb_len;
1703 fore200e_vcc->tx_pdu++;
1704
1705 /* set tx rate control information */
1706 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1707 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1708
1709 if (cell_header) {
1710 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1711 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1712 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1713 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1714 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1715 }
1716 else {
1717 /* set the ATM header, common to all cells conveying the PDU */
1718 tpd->atm_header.clp = 0;
1719 tpd->atm_header.plt = 0;
1720 tpd->atm_header.vci = vcc->vci;
1721 tpd->atm_header.vpi = vcc->vpi;
1722 tpd->atm_header.gfc = 0;
1723 }
1724
1725 tpd->spec.length = tx_len;
1726 tpd->spec.nseg = 1;
1727 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1728 tpd->spec.intr = 1;
1729
1730 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */
1731 tpd_haddr.pad = 0;
1732 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
1733
1734 *entry->status = STATUS_PENDING;
1735 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
1736
1737 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1738
1739 return 0;
1740}
1741
1742
1743static int
1744fore200e_getstats(struct fore200e* fore200e)
1745{
1746 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1747 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1748 struct stats_opcode opcode;
1749 int ok;
1750 u32 stats_dma_addr;
1751
1752 if (fore200e->stats == NULL) {
1753 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1754 if (fore200e->stats == NULL)
1755 return -ENOMEM;
1756 }
1757
1758 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats,
1759 sizeof(struct stats), DMA_FROM_DEVICE);
1760
1761 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1762
1763 opcode.opcode = OPCODE_GET_STATS;
1764 opcode.pad = 0;
1765
1766 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1767
1768 *entry->status = STATUS_PENDING;
1769
1770 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
1771
1772 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1773
1774 *entry->status = STATUS_FREE;
1775
1776 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
1777
1778 if (ok == 0) {
1779 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1780 return -EIO;
1781 }
1782
1783 return 0;
1784}
1785
1786
1787static int
1788fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen)
1789{
1790 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1791
1792 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1793 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1794
1795 return -EINVAL;
1796}
1797
1798
1799static int
1800fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, unsigned int optlen)
1801{
1802 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1803
1804 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1805 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1806
1807 return -EINVAL;
1808}
1809
1810
1811#if 0 /* currently unused */
1812static int
1813fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1814{
1815 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1816 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1817 struct oc3_opcode opcode;
1818 int ok;
1819 u32 oc3_regs_dma_addr;
1820
1821 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1822
1823 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1824
1825 opcode.opcode = OPCODE_GET_OC3;
1826 opcode.reg = 0;
1827 opcode.value = 0;
1828 opcode.mask = 0;
1829
1830 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1831
1832 *entry->status = STATUS_PENDING;
1833
1834 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1835
1836 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1837
1838 *entry->status = STATUS_FREE;
1839
1840 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1841
1842 if (ok == 0) {
1843 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1844 return -EIO;
1845 }
1846
1847 return 0;
1848}
1849#endif
1850
1851
1852static int
1853fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1854{
1855 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1856 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1857 struct oc3_opcode opcode;
1858 int ok;
1859
1860 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
1861
1862 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1863
1864 opcode.opcode = OPCODE_SET_OC3;
1865 opcode.reg = reg;
1866 opcode.value = value;
1867 opcode.mask = mask;
1868
1869 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1870
1871 *entry->status = STATUS_PENDING;
1872
1873 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
1874
1875 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1876
1877 *entry->status = STATUS_FREE;
1878
1879 if (ok == 0) {
1880 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1881 return -EIO;
1882 }
1883
1884 return 0;
1885}
1886
1887
1888static int
1889fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1890{
1891 u32 mct_value, mct_mask;
1892 int error;
1893
1894 if (!capable(CAP_NET_ADMIN))
1895 return -EPERM;
1896
1897 switch (loop_mode) {
1898
1899 case ATM_LM_NONE:
1900 mct_value = 0;
1901 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1902 break;
1903
1904 case ATM_LM_LOC_PHY:
1905 mct_value = mct_mask = SUNI_MCT_DLE;
1906 break;
1907
1908 case ATM_LM_RMT_PHY:
1909 mct_value = mct_mask = SUNI_MCT_LLE;
1910 break;
1911
1912 default:
1913 return -EINVAL;
1914 }
1915
1916 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1917 if (error == 0)
1918 fore200e->loop_mode = loop_mode;
1919
1920 return error;
1921}
1922
1923
1924static int
1925fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
1926{
1927 struct sonet_stats tmp;
1928
1929 if (fore200e_getstats(fore200e) < 0)
1930 return -EIO;
1931
1932 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors);
1933 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors);
1934 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors);
1935 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors);
1936 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors);
1937 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors);
1938 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors);
1939 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) +
1940 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) +
1941 be32_to_cpu(fore200e->stats->aal5.cells_transmitted);
1942 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) +
1943 be32_to_cpu(fore200e->stats->aal34.cells_received) +
1944 be32_to_cpu(fore200e->stats->aal5.cells_received);
1945
1946 if (arg)
1947 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1948
1949 return 0;
1950}
1951
1952
1953static int
1954fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
1955{
1956 struct fore200e* fore200e = FORE200E_DEV(dev);
1957
1958 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1959
1960 switch (cmd) {
1961
1962 case SONET_GETSTAT:
1963 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
1964
1965 case SONET_GETDIAG:
1966 return put_user(0, (int __user *)arg) ? -EFAULT : 0;
1967
1968 case ATM_SETLOOP:
1969 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1970
1971 case ATM_GETLOOP:
1972 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
1973
1974 case ATM_QUERYLOOP:
1975 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
1976 }
1977
1978 return -ENOSYS; /* not implemented */
1979}
1980
1981
1982static int
1983fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1984{
1985 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1986 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1987
1988 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1989 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
1990 return -EINVAL;
1991 }
1992
1993 DPRINTK(2, "change_qos %d.%d.%d, "
1994 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1995 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1996 "available_cell_rate = %u",
1997 vcc->itf, vcc->vpi, vcc->vci,
1998 fore200e_traffic_class[ qos->txtp.traffic_class ],
1999 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
2000 fore200e_traffic_class[ qos->rxtp.traffic_class ],
2001 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
2002 flags, fore200e->available_cell_rate);
2003
2004 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
2005
2006 mutex_lock(&fore200e->rate_mtx);
2007 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
2008 mutex_unlock(&fore200e->rate_mtx);
2009 return -EAGAIN;
2010 }
2011
2012 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
2013 fore200e->available_cell_rate -= qos->txtp.max_pcr;
2014
2015 mutex_unlock(&fore200e->rate_mtx);
2016
2017 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2018
2019 /* update rate control parameters */
2020 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
2021
2022 set_bit(ATM_VF_HASQOS, &vcc->flags);
2023
2024 return 0;
2025 }
2026
2027 return -EINVAL;
2028}
2029
2030
2031static int __devinit
2032fore200e_irq_request(struct fore200e* fore200e)
2033{
2034 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) {
2035
2036 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2037 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2038 return -EBUSY;
2039 }
2040
2041 printk(FORE200E "IRQ %s reserved for device %s\n",
2042 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2043
2044#ifdef FORE200E_USE_TASKLET
2045 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
2046 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
2047#endif
2048
2049 fore200e->state = FORE200E_STATE_IRQ;
2050 return 0;
2051}
2052
2053
2054static int __devinit
2055fore200e_get_esi(struct fore200e* fore200e)
2056{
2057 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2058 int ok, i;
2059
2060 if (!prom)
2061 return -ENOMEM;
2062
2063 ok = fore200e->bus->prom_read(fore200e, prom);
2064 if (ok < 0) {
2065 kfree(prom);
2066 return -EBUSY;
2067 }
2068
2069 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n",
2070 fore200e->name,
2071 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
2072 prom->serial_number & 0xFFFF, &prom->mac_addr[2]);
2073
2074 for (i = 0; i < ESI_LEN; i++) {
2075 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2076 }
2077
2078 kfree(prom);
2079
2080 return 0;
2081}
2082
2083
2084static int __devinit
2085fore200e_alloc_rx_buf(struct fore200e* fore200e)
2086{
2087 int scheme, magn, nbr, size, i;
2088
2089 struct host_bsq* bsq;
2090 struct buffer* buffer;
2091
2092 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2093 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2094
2095 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2096
2097 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2098 size = fore200e_rx_buf_size[ scheme ][ magn ];
2099
2100 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2101
2102 /* allocate the array of receive buffers */
2103 buffer = bsq->buffer = kzalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2104
2105 if (buffer == NULL)
2106 return -ENOMEM;
2107
2108 bsq->freebuf = NULL;
2109
2110 for (i = 0; i < nbr; i++) {
2111
2112 buffer[ i ].scheme = scheme;
2113 buffer[ i ].magn = magn;
2114#ifdef FORE200E_BSQ_DEBUG
2115 buffer[ i ].index = i;
2116 buffer[ i ].supplied = 0;
2117#endif
2118
2119 /* allocate the receive buffer body */
2120 if (fore200e_chunk_alloc(fore200e,
2121 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2122 DMA_FROM_DEVICE) < 0) {
2123
2124 while (i > 0)
2125 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2126 kfree(buffer);
2127
2128 return -ENOMEM;
2129 }
2130
2131 /* insert the buffer into the free buffer list */
2132 buffer[ i ].next = bsq->freebuf;
2133 bsq->freebuf = &buffer[ i ];
2134 }
2135 /* all the buffers are free, initially */
2136 bsq->freebuf_count = nbr;
2137
2138#ifdef FORE200E_BSQ_DEBUG
2139 bsq_audit(3, bsq, scheme, magn);
2140#endif
2141 }
2142 }
2143
2144 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2145 return 0;
2146}
2147
2148
2149static int __devinit
2150fore200e_init_bs_queue(struct fore200e* fore200e)
2151{
2152 int scheme, magn, i;
2153
2154 struct host_bsq* bsq;
2155 struct cp_bsq_entry __iomem * cp_entry;
2156
2157 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2158 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2159
2160 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2161
2162 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2163
2164 /* allocate and align the array of status words */
2165 if (fore200e->bus->dma_chunk_alloc(fore200e,
2166 &bsq->status,
2167 sizeof(enum status),
2168 QUEUE_SIZE_BS,
2169 fore200e->bus->status_alignment) < 0) {
2170 return -ENOMEM;
2171 }
2172
2173 /* allocate and align the array of receive buffer descriptors */
2174 if (fore200e->bus->dma_chunk_alloc(fore200e,
2175 &bsq->rbd_block,
2176 sizeof(struct rbd_block),
2177 QUEUE_SIZE_BS,
2178 fore200e->bus->descr_alignment) < 0) {
2179
2180 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2181 return -ENOMEM;
2182 }
2183
2184 /* get the base address of the cp resident buffer supply queue entries */
2185 cp_entry = fore200e->virt_base +
2186 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
2187
2188 /* fill the host resident and cp resident buffer supply queue entries */
2189 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2190
2191 bsq->host_entry[ i ].status =
2192 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2193 bsq->host_entry[ i ].rbd_block =
2194 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2195 bsq->host_entry[ i ].rbd_block_dma =
2196 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2197 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2198
2199 *bsq->host_entry[ i ].status = STATUS_FREE;
2200
2201 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2202 &cp_entry[ i ].status_haddr);
2203 }
2204 }
2205 }
2206
2207 fore200e->state = FORE200E_STATE_INIT_BSQ;
2208 return 0;
2209}
2210
2211
2212static int __devinit
2213fore200e_init_rx_queue(struct fore200e* fore200e)
2214{
2215 struct host_rxq* rxq = &fore200e->host_rxq;
2216 struct cp_rxq_entry __iomem * cp_entry;
2217 int i;
2218
2219 DPRINTK(2, "receive queue is being initialized\n");
2220
2221 /* allocate and align the array of status words */
2222 if (fore200e->bus->dma_chunk_alloc(fore200e,
2223 &rxq->status,
2224 sizeof(enum status),
2225 QUEUE_SIZE_RX,
2226 fore200e->bus->status_alignment) < 0) {
2227 return -ENOMEM;
2228 }
2229
2230 /* allocate and align the array of receive PDU descriptors */
2231 if (fore200e->bus->dma_chunk_alloc(fore200e,
2232 &rxq->rpd,
2233 sizeof(struct rpd),
2234 QUEUE_SIZE_RX,
2235 fore200e->bus->descr_alignment) < 0) {
2236
2237 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2238 return -ENOMEM;
2239 }
2240
2241 /* get the base address of the cp resident rx queue entries */
2242 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
2243
2244 /* fill the host resident and cp resident rx entries */
2245 for (i=0; i < QUEUE_SIZE_RX; i++) {
2246
2247 rxq->host_entry[ i ].status =
2248 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2249 rxq->host_entry[ i ].rpd =
2250 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2251 rxq->host_entry[ i ].rpd_dma =
2252 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2253 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2254
2255 *rxq->host_entry[ i ].status = STATUS_FREE;
2256
2257 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2258 &cp_entry[ i ].status_haddr);
2259
2260 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2261 &cp_entry[ i ].rpd_haddr);
2262 }
2263
2264 /* set the head entry of the queue */
2265 rxq->head = 0;
2266
2267 fore200e->state = FORE200E_STATE_INIT_RXQ;
2268 return 0;
2269}
2270
2271
2272static int __devinit
2273fore200e_init_tx_queue(struct fore200e* fore200e)
2274{
2275 struct host_txq* txq = &fore200e->host_txq;
2276 struct cp_txq_entry __iomem * cp_entry;
2277 int i;
2278
2279 DPRINTK(2, "transmit queue is being initialized\n");
2280
2281 /* allocate and align the array of status words */
2282 if (fore200e->bus->dma_chunk_alloc(fore200e,
2283 &txq->status,
2284 sizeof(enum status),
2285 QUEUE_SIZE_TX,
2286 fore200e->bus->status_alignment) < 0) {
2287 return -ENOMEM;
2288 }
2289
2290 /* allocate and align the array of transmit PDU descriptors */
2291 if (fore200e->bus->dma_chunk_alloc(fore200e,
2292 &txq->tpd,
2293 sizeof(struct tpd),
2294 QUEUE_SIZE_TX,
2295 fore200e->bus->descr_alignment) < 0) {
2296
2297 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2298 return -ENOMEM;
2299 }
2300
2301 /* get the base address of the cp resident tx queue entries */
2302 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
2303
2304 /* fill the host resident and cp resident tx entries */
2305 for (i=0; i < QUEUE_SIZE_TX; i++) {
2306
2307 txq->host_entry[ i ].status =
2308 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2309 txq->host_entry[ i ].tpd =
2310 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2311 txq->host_entry[ i ].tpd_dma =
2312 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2313 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2314
2315 *txq->host_entry[ i ].status = STATUS_FREE;
2316
2317 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2318 &cp_entry[ i ].status_haddr);
2319
2320 /* although there is a one-to-one mapping of tx queue entries and tpds,
2321 we do not write here the DMA (physical) base address of each tpd into
2322 the related cp resident entry, because the cp relies on this write
2323 operation to detect that a new pdu has been submitted for tx */
2324 }
2325
2326 /* set the head and tail entries of the queue */
2327 txq->head = 0;
2328 txq->tail = 0;
2329
2330 fore200e->state = FORE200E_STATE_INIT_TXQ;
2331 return 0;
2332}
2333
2334
2335static int __devinit
2336fore200e_init_cmd_queue(struct fore200e* fore200e)
2337{
2338 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2339 struct cp_cmdq_entry __iomem * cp_entry;
2340 int i;
2341
2342 DPRINTK(2, "command queue is being initialized\n");
2343
2344 /* allocate and align the array of status words */
2345 if (fore200e->bus->dma_chunk_alloc(fore200e,
2346 &cmdq->status,
2347 sizeof(enum status),
2348 QUEUE_SIZE_CMD,
2349 fore200e->bus->status_alignment) < 0) {
2350 return -ENOMEM;
2351 }
2352
2353 /* get the base address of the cp resident cmd queue entries */
2354 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
2355
2356 /* fill the host resident and cp resident cmd entries */
2357 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2358
2359 cmdq->host_entry[ i ].status =
2360 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2361 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2362
2363 *cmdq->host_entry[ i ].status = STATUS_FREE;
2364
2365 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2366 &cp_entry[ i ].status_haddr);
2367 }
2368
2369 /* set the head entry of the queue */
2370 cmdq->head = 0;
2371
2372 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2373 return 0;
2374}
2375
2376
2377static void __devinit
2378fore200e_param_bs_queue(struct fore200e* fore200e,
2379 enum buffer_scheme scheme, enum buffer_magn magn,
2380 int queue_length, int pool_size, int supply_blksize)
2381{
2382 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2383
2384 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2385 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2386 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2387 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2388}
2389
2390
2391static int __devinit
2392fore200e_initialize(struct fore200e* fore200e)
2393{
2394 struct cp_queues __iomem * cpq;
2395 int ok, scheme, magn;
2396
2397 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2398
2399 mutex_init(&fore200e->rate_mtx);
2400 spin_lock_init(&fore200e->q_lock);
2401
2402 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
2403
2404 /* enable cp to host interrupts */
2405 fore200e->bus->write(1, &cpq->imask);
2406
2407 if (fore200e->bus->irq_enable)
2408 fore200e->bus->irq_enable(fore200e);
2409
2410 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2411
2412 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2413 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2414 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2415
2416 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2417 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2418
2419 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2420 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2421 fore200e_param_bs_queue(fore200e, scheme, magn,
2422 QUEUE_SIZE_BS,
2423 fore200e_rx_buf_nbr[ scheme ][ magn ],
2424 RBD_BLK_SIZE);
2425
2426 /* issue the initialize command */
2427 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2428 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2429
2430 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2431 if (ok == 0) {
2432 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2433 return -ENODEV;
2434 }
2435
2436 printk(FORE200E "device %s initialized\n", fore200e->name);
2437
2438 fore200e->state = FORE200E_STATE_INITIALIZE;
2439 return 0;
2440}
2441
2442
2443static void __devinit
2444fore200e_monitor_putc(struct fore200e* fore200e, char c)
2445{
2446 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2447
2448#if 0
2449 printk("%c", c);
2450#endif
2451 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2452}
2453
2454
2455static int __devinit
2456fore200e_monitor_getc(struct fore200e* fore200e)
2457{
2458 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2459 unsigned long timeout = jiffies + msecs_to_jiffies(50);
2460 int c;
2461
2462 while (time_before(jiffies, timeout)) {
2463
2464 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2465
2466 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2467
2468 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2469#if 0
2470 printk("%c", c & 0xFF);
2471#endif
2472 return c & 0xFF;
2473 }
2474 }
2475
2476 return -1;
2477}
2478
2479
2480static void __devinit
2481fore200e_monitor_puts(struct fore200e* fore200e, char* str)
2482{
2483 while (*str) {
2484
2485 /* the i960 monitor doesn't accept any new character if it has something to say */
2486 while (fore200e_monitor_getc(fore200e) >= 0);
2487
2488 fore200e_monitor_putc(fore200e, *str++);
2489 }
2490
2491 while (fore200e_monitor_getc(fore200e) >= 0);
2492}
2493
2494#ifdef __LITTLE_ENDIAN
2495#define FW_EXT ".bin"
2496#else
2497#define FW_EXT "_ecd.bin2"
2498#endif
2499
2500static int __devinit
2501fore200e_load_and_start_fw(struct fore200e* fore200e)
2502{
2503 const struct firmware *firmware;
2504 struct device *device;
2505 struct fw_header *fw_header;
2506 const __le32 *fw_data;
2507 u32 fw_size;
2508 u32 __iomem *load_addr;
2509 char buf[48];
2510 int err = -ENODEV;
2511
2512 if (strcmp(fore200e->bus->model_name, "PCA-200E") == 0)
2513 device = &((struct pci_dev *) fore200e->bus_dev)->dev;
2514#ifdef CONFIG_SBUS
2515 else if (strcmp(fore200e->bus->model_name, "SBA-200E") == 0)
2516 device = &((struct platform_device *) fore200e->bus_dev)->dev;
2517#endif
2518 else
2519 return err;
2520
2521 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
2522 if ((err = request_firmware(&firmware, buf, device)) < 0) {
2523 printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name);
2524 return err;
2525 }
2526
2527 fw_data = (__le32 *) firmware->data;
2528 fw_size = firmware->size / sizeof(u32);
2529 fw_header = (struct fw_header *) firmware->data;
2530 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2531
2532 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2533 fore200e->name, load_addr, fw_size);
2534
2535 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2536 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2537 goto release;
2538 }
2539
2540 for (; fw_size--; fw_data++, load_addr++)
2541 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2542
2543 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2544
2545#if defined(__sparc_v9__)
2546 /* reported to be required by SBA cards on some sparc64 hosts */
2547 fore200e_spin(100);
2548#endif
2549
2550 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2551 fore200e_monitor_puts(fore200e, buf);
2552
2553 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) {
2554 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2555 goto release;
2556 }
2557
2558 printk(FORE200E "device %s firmware started\n", fore200e->name);
2559
2560 fore200e->state = FORE200E_STATE_START_FW;
2561 err = 0;
2562
2563release:
2564 release_firmware(firmware);
2565 return err;
2566}
2567
2568
2569static int __devinit
2570fore200e_register(struct fore200e* fore200e, struct device *parent)
2571{
2572 struct atm_dev* atm_dev;
2573
2574 DPRINTK(2, "device %s being registered\n", fore200e->name);
2575
2576 atm_dev = atm_dev_register(fore200e->bus->proc_name, parent, &fore200e_ops,
2577 -1, NULL);
2578 if (atm_dev == NULL) {
2579 printk(FORE200E "unable to register device %s\n", fore200e->name);
2580 return -ENODEV;
2581 }
2582
2583 atm_dev->dev_data = fore200e;
2584 fore200e->atm_dev = atm_dev;
2585
2586 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2587 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2588
2589 fore200e->available_cell_rate = ATM_OC3_PCR;
2590
2591 fore200e->state = FORE200E_STATE_REGISTER;
2592 return 0;
2593}
2594
2595
2596static int __devinit
2597fore200e_init(struct fore200e* fore200e, struct device *parent)
2598{
2599 if (fore200e_register(fore200e, parent) < 0)
2600 return -ENODEV;
2601
2602 if (fore200e->bus->configure(fore200e) < 0)
2603 return -ENODEV;
2604
2605 if (fore200e->bus->map(fore200e) < 0)
2606 return -ENODEV;
2607
2608 if (fore200e_reset(fore200e, 1) < 0)
2609 return -ENODEV;
2610
2611 if (fore200e_load_and_start_fw(fore200e) < 0)
2612 return -ENODEV;
2613
2614 if (fore200e_initialize(fore200e) < 0)
2615 return -ENODEV;
2616
2617 if (fore200e_init_cmd_queue(fore200e) < 0)
2618 return -ENOMEM;
2619
2620 if (fore200e_init_tx_queue(fore200e) < 0)
2621 return -ENOMEM;
2622
2623 if (fore200e_init_rx_queue(fore200e) < 0)
2624 return -ENOMEM;
2625
2626 if (fore200e_init_bs_queue(fore200e) < 0)
2627 return -ENOMEM;
2628
2629 if (fore200e_alloc_rx_buf(fore200e) < 0)
2630 return -ENOMEM;
2631
2632 if (fore200e_get_esi(fore200e) < 0)
2633 return -EIO;
2634
2635 if (fore200e_irq_request(fore200e) < 0)
2636 return -EBUSY;
2637
2638 fore200e_supply(fore200e);
2639
2640 /* all done, board initialization is now complete */
2641 fore200e->state = FORE200E_STATE_COMPLETE;
2642 return 0;
2643}
2644
2645#ifdef CONFIG_SBUS
2646static const struct of_device_id fore200e_sba_match[];
2647static int __devinit fore200e_sba_probe(struct platform_device *op)
2648{
2649 const struct of_device_id *match;
2650 const struct fore200e_bus *bus;
2651 struct fore200e *fore200e;
2652 static int index = 0;
2653 int err;
2654
2655 match = of_match_device(fore200e_sba_match, &op->dev);
2656 if (!match)
2657 return -EINVAL;
2658 bus = match->data;
2659
2660 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2661 if (!fore200e)
2662 return -ENOMEM;
2663
2664 fore200e->bus = bus;
2665 fore200e->bus_dev = op;
2666 fore200e->irq = op->archdata.irqs[0];
2667 fore200e->phys_base = op->resource[0].start;
2668
2669 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2670
2671 err = fore200e_init(fore200e, &op->dev);
2672 if (err < 0) {
2673 fore200e_shutdown(fore200e);
2674 kfree(fore200e);
2675 return err;
2676 }
2677
2678 index++;
2679 dev_set_drvdata(&op->dev, fore200e);
2680
2681 return 0;
2682}
2683
2684static int __devexit fore200e_sba_remove(struct platform_device *op)
2685{
2686 struct fore200e *fore200e = dev_get_drvdata(&op->dev);
2687
2688 fore200e_shutdown(fore200e);
2689 kfree(fore200e);
2690
2691 return 0;
2692}
2693
2694static const struct of_device_id fore200e_sba_match[] = {
2695 {
2696 .name = SBA200E_PROM_NAME,
2697 .data = (void *) &fore200e_bus[1],
2698 },
2699 {},
2700};
2701MODULE_DEVICE_TABLE(of, fore200e_sba_match);
2702
2703static struct platform_driver fore200e_sba_driver = {
2704 .driver = {
2705 .name = "fore_200e",
2706 .owner = THIS_MODULE,
2707 .of_match_table = fore200e_sba_match,
2708 },
2709 .probe = fore200e_sba_probe,
2710 .remove = __devexit_p(fore200e_sba_remove),
2711};
2712#endif
2713
2714#ifdef CONFIG_PCI
2715static int __devinit
2716fore200e_pca_detect(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent)
2717{
2718 const struct fore200e_bus* bus = (struct fore200e_bus*) pci_ent->driver_data;
2719 struct fore200e* fore200e;
2720 int err = 0;
2721 static int index = 0;
2722
2723 if (pci_enable_device(pci_dev)) {
2724 err = -EINVAL;
2725 goto out;
2726 }
2727
2728 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2729 if (fore200e == NULL) {
2730 err = -ENOMEM;
2731 goto out_disable;
2732 }
2733
2734 fore200e->bus = bus;
2735 fore200e->bus_dev = pci_dev;
2736 fore200e->irq = pci_dev->irq;
2737 fore200e->phys_base = pci_resource_start(pci_dev, 0);
2738
2739 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
2740
2741 pci_set_master(pci_dev);
2742
2743 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2744 fore200e->bus->model_name,
2745 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2746
2747 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2748
2749 err = fore200e_init(fore200e, &pci_dev->dev);
2750 if (err < 0) {
2751 fore200e_shutdown(fore200e);
2752 goto out_free;
2753 }
2754
2755 ++index;
2756 pci_set_drvdata(pci_dev, fore200e);
2757
2758out:
2759 return err;
2760
2761out_free:
2762 kfree(fore200e);
2763out_disable:
2764 pci_disable_device(pci_dev);
2765 goto out;
2766}
2767
2768
2769static void __devexit fore200e_pca_remove_one(struct pci_dev *pci_dev)
2770{
2771 struct fore200e *fore200e;
2772
2773 fore200e = pci_get_drvdata(pci_dev);
2774
2775 fore200e_shutdown(fore200e);
2776 kfree(fore200e);
2777 pci_disable_device(pci_dev);
2778}
2779
2780
2781static struct pci_device_id fore200e_pca_tbl[] = {
2782 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID,
2783 0, 0, (unsigned long) &fore200e_bus[0] },
2784 { 0, }
2785};
2786
2787MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl);
2788
2789static struct pci_driver fore200e_pca_driver = {
2790 .name = "fore_200e",
2791 .probe = fore200e_pca_detect,
2792 .remove = __devexit_p(fore200e_pca_remove_one),
2793 .id_table = fore200e_pca_tbl,
2794};
2795#endif
2796
2797static int __init fore200e_module_init(void)
2798{
2799 int err;
2800
2801 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2802
2803#ifdef CONFIG_SBUS
2804 err = platform_driver_register(&fore200e_sba_driver);
2805 if (err)
2806 return err;
2807#endif
2808
2809#ifdef CONFIG_PCI
2810 err = pci_register_driver(&fore200e_pca_driver);
2811#endif
2812
2813#ifdef CONFIG_SBUS
2814 if (err)
2815 platform_driver_unregister(&fore200e_sba_driver);
2816#endif
2817
2818 return err;
2819}
2820
2821static void __exit fore200e_module_cleanup(void)
2822{
2823#ifdef CONFIG_PCI
2824 pci_unregister_driver(&fore200e_pca_driver);
2825#endif
2826#ifdef CONFIG_SBUS
2827 platform_driver_unregister(&fore200e_sba_driver);
2828#endif
2829}
2830
2831static int
2832fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2833{
2834 struct fore200e* fore200e = FORE200E_DEV(dev);
2835 struct fore200e_vcc* fore200e_vcc;
2836 struct atm_vcc* vcc;
2837 int i, len, left = *pos;
2838 unsigned long flags;
2839
2840 if (!left--) {
2841
2842 if (fore200e_getstats(fore200e) < 0)
2843 return -EIO;
2844
2845 len = sprintf(page,"\n"
2846 " device:\n"
2847 " internal name:\t\t%s\n", fore200e->name);
2848
2849 /* print bus-specific information */
2850 if (fore200e->bus->proc_read)
2851 len += fore200e->bus->proc_read(fore200e, page + len);
2852
2853 len += sprintf(page + len,
2854 " interrupt line:\t\t%s\n"
2855 " physical base address:\t0x%p\n"
2856 " virtual base address:\t0x%p\n"
2857 " factory address (ESI):\t%pM\n"
2858 " board serial number:\t\t%d\n\n",
2859 fore200e_irq_itoa(fore200e->irq),
2860 (void*)fore200e->phys_base,
2861 fore200e->virt_base,
2862 fore200e->esi,
2863 fore200e->esi[4] * 256 + fore200e->esi[5]);
2864
2865 return len;
2866 }
2867
2868 if (!left--)
2869 return sprintf(page,
2870 " free small bufs, scheme 1:\t%d\n"
2871 " free large bufs, scheme 1:\t%d\n"
2872 " free small bufs, scheme 2:\t%d\n"
2873 " free large bufs, scheme 2:\t%d\n",
2874 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2875 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2876 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2877 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2878
2879 if (!left--) {
2880 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2881
2882 len = sprintf(page,"\n\n"
2883 " cell processor:\n"
2884 " heartbeat state:\t\t");
2885
2886 if (hb >> 16 != 0xDEAD)
2887 len += sprintf(page + len, "0x%08x\n", hb);
2888 else
2889 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2890
2891 return len;
2892 }
2893
2894 if (!left--) {
2895 static const char* media_name[] = {
2896 "unshielded twisted pair",
2897 "multimode optical fiber ST",
2898 "multimode optical fiber SC",
2899 "single-mode optical fiber ST",
2900 "single-mode optical fiber SC",
2901 "unknown"
2902 };
2903
2904 static const char* oc3_mode[] = {
2905 "normal operation",
2906 "diagnostic loopback",
2907 "line loopback",
2908 "unknown"
2909 };
2910
2911 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2912 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2913 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2914 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2915 u32 oc3_index;
2916
2917 if (media_index > 4)
2918 media_index = 5;
2919
2920 switch (fore200e->loop_mode) {
2921 case ATM_LM_NONE: oc3_index = 0;
2922 break;
2923 case ATM_LM_LOC_PHY: oc3_index = 1;
2924 break;
2925 case ATM_LM_RMT_PHY: oc3_index = 2;
2926 break;
2927 default: oc3_index = 3;
2928 }
2929
2930 return sprintf(page,
2931 " firmware release:\t\t%d.%d.%d\n"
2932 " monitor release:\t\t%d.%d\n"
2933 " media type:\t\t\t%s\n"
2934 " OC-3 revision:\t\t0x%x\n"
2935 " OC-3 mode:\t\t\t%s",
2936 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2937 mon960_release >> 16, mon960_release << 16 >> 16,
2938 media_name[ media_index ],
2939 oc3_revision,
2940 oc3_mode[ oc3_index ]);
2941 }
2942
2943 if (!left--) {
2944 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
2945
2946 return sprintf(page,
2947 "\n\n"
2948 " monitor:\n"
2949 " version number:\t\t%d\n"
2950 " boot status word:\t\t0x%08x\n",
2951 fore200e->bus->read(&cp_monitor->mon_version),
2952 fore200e->bus->read(&cp_monitor->bstat));
2953 }
2954
2955 if (!left--)
2956 return sprintf(page,
2957 "\n"
2958 " device statistics:\n"
2959 " 4b5b:\n"
2960 " crc_header_errors:\t\t%10u\n"
2961 " framing_errors:\t\t%10u\n",
2962 be32_to_cpu(fore200e->stats->phy.crc_header_errors),
2963 be32_to_cpu(fore200e->stats->phy.framing_errors));
2964
2965 if (!left--)
2966 return sprintf(page, "\n"
2967 " OC-3:\n"
2968 " section_bip8_errors:\t%10u\n"
2969 " path_bip8_errors:\t\t%10u\n"
2970 " line_bip24_errors:\t\t%10u\n"
2971 " line_febe_errors:\t\t%10u\n"
2972 " path_febe_errors:\t\t%10u\n"
2973 " corr_hcs_errors:\t\t%10u\n"
2974 " ucorr_hcs_errors:\t\t%10u\n",
2975 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors),
2976 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors),
2977 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors),
2978 be32_to_cpu(fore200e->stats->oc3.line_febe_errors),
2979 be32_to_cpu(fore200e->stats->oc3.path_febe_errors),
2980 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors),
2981 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors));
2982
2983 if (!left--)
2984 return sprintf(page,"\n"
2985 " ATM:\t\t\t\t cells\n"
2986 " TX:\t\t\t%10u\n"
2987 " RX:\t\t\t%10u\n"
2988 " vpi out of range:\t\t%10u\n"
2989 " vpi no conn:\t\t%10u\n"
2990 " vci out of range:\t\t%10u\n"
2991 " vci no conn:\t\t%10u\n",
2992 be32_to_cpu(fore200e->stats->atm.cells_transmitted),
2993 be32_to_cpu(fore200e->stats->atm.cells_received),
2994 be32_to_cpu(fore200e->stats->atm.vpi_bad_range),
2995 be32_to_cpu(fore200e->stats->atm.vpi_no_conn),
2996 be32_to_cpu(fore200e->stats->atm.vci_bad_range),
2997 be32_to_cpu(fore200e->stats->atm.vci_no_conn));
2998
2999 if (!left--)
3000 return sprintf(page,"\n"
3001 " AAL0:\t\t\t cells\n"
3002 " TX:\t\t\t%10u\n"
3003 " RX:\t\t\t%10u\n"
3004 " dropped:\t\t\t%10u\n",
3005 be32_to_cpu(fore200e->stats->aal0.cells_transmitted),
3006 be32_to_cpu(fore200e->stats->aal0.cells_received),
3007 be32_to_cpu(fore200e->stats->aal0.cells_dropped));
3008
3009 if (!left--)
3010 return sprintf(page,"\n"
3011 " AAL3/4:\n"
3012 " SAR sublayer:\t\t cells\n"
3013 " TX:\t\t\t%10u\n"
3014 " RX:\t\t\t%10u\n"
3015 " dropped:\t\t\t%10u\n"
3016 " CRC errors:\t\t%10u\n"
3017 " protocol errors:\t\t%10u\n\n"
3018 " CS sublayer:\t\t PDUs\n"
3019 " TX:\t\t\t%10u\n"
3020 " RX:\t\t\t%10u\n"
3021 " dropped:\t\t\t%10u\n"
3022 " protocol errors:\t\t%10u\n",
3023 be32_to_cpu(fore200e->stats->aal34.cells_transmitted),
3024 be32_to_cpu(fore200e->stats->aal34.cells_received),
3025 be32_to_cpu(fore200e->stats->aal34.cells_dropped),
3026 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors),
3027 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors),
3028 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted),
3029 be32_to_cpu(fore200e->stats->aal34.cspdus_received),
3030 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped),
3031 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors));
3032
3033 if (!left--)
3034 return sprintf(page,"\n"
3035 " AAL5:\n"
3036 " SAR sublayer:\t\t cells\n"
3037 " TX:\t\t\t%10u\n"
3038 " RX:\t\t\t%10u\n"
3039 " dropped:\t\t\t%10u\n"
3040 " congestions:\t\t%10u\n\n"
3041 " CS sublayer:\t\t PDUs\n"
3042 " TX:\t\t\t%10u\n"
3043 " RX:\t\t\t%10u\n"
3044 " dropped:\t\t\t%10u\n"
3045 " CRC errors:\t\t%10u\n"
3046 " protocol errors:\t\t%10u\n",
3047 be32_to_cpu(fore200e->stats->aal5.cells_transmitted),
3048 be32_to_cpu(fore200e->stats->aal5.cells_received),
3049 be32_to_cpu(fore200e->stats->aal5.cells_dropped),
3050 be32_to_cpu(fore200e->stats->aal5.congestion_experienced),
3051 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted),
3052 be32_to_cpu(fore200e->stats->aal5.cspdus_received),
3053 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped),
3054 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors),
3055 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors));
3056
3057 if (!left--)
3058 return sprintf(page,"\n"
3059 " AUX:\t\t allocation failures\n"
3060 " small b1:\t\t\t%10u\n"
3061 " large b1:\t\t\t%10u\n"
3062 " small b2:\t\t\t%10u\n"
3063 " large b2:\t\t\t%10u\n"
3064 " RX PDUs:\t\t\t%10u\n"
3065 " TX PDUs:\t\t\t%10lu\n",
3066 be32_to_cpu(fore200e->stats->aux.small_b1_failed),
3067 be32_to_cpu(fore200e->stats->aux.large_b1_failed),
3068 be32_to_cpu(fore200e->stats->aux.small_b2_failed),
3069 be32_to_cpu(fore200e->stats->aux.large_b2_failed),
3070 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed),
3071 fore200e->tx_sat);
3072
3073 if (!left--)
3074 return sprintf(page,"\n"
3075 " receive carrier:\t\t\t%s\n",
3076 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
3077
3078 if (!left--) {
3079 return sprintf(page,"\n"
3080 " VCCs:\n address VPI VCI AAL "
3081 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
3082 }
3083
3084 for (i = 0; i < NBR_CONNECT; i++) {
3085
3086 vcc = fore200e->vc_map[i].vcc;
3087
3088 if (vcc == NULL)
3089 continue;
3090
3091 spin_lock_irqsave(&fore200e->q_lock, flags);
3092
3093 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
3094
3095 fore200e_vcc = FORE200E_VCC(vcc);
3096 ASSERT(fore200e_vcc);
3097
3098 len = sprintf(page,
3099 " %08x %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
3100 (u32)(unsigned long)vcc,
3101 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
3102 fore200e_vcc->tx_pdu,
3103 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
3104 fore200e_vcc->tx_max_pdu,
3105 fore200e_vcc->rx_pdu,
3106 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
3107 fore200e_vcc->rx_max_pdu);
3108
3109 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3110 return len;
3111 }
3112
3113 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3114 }
3115
3116 return 0;
3117}
3118
3119module_init(fore200e_module_init);
3120module_exit(fore200e_module_cleanup);
3121
3122
3123static const struct atmdev_ops fore200e_ops =
3124{
3125 .open = fore200e_open,
3126 .close = fore200e_close,
3127 .ioctl = fore200e_ioctl,
3128 .getsockopt = fore200e_getsockopt,
3129 .setsockopt = fore200e_setsockopt,
3130 .send = fore200e_send,
3131 .change_qos = fore200e_change_qos,
3132 .proc_read = fore200e_proc_read,
3133 .owner = THIS_MODULE
3134};
3135
3136
3137static const struct fore200e_bus fore200e_bus[] = {
3138#ifdef CONFIG_PCI
3139 { "PCA-200E", "pca200e", 32, 4, 32,
3140 fore200e_pca_read,
3141 fore200e_pca_write,
3142 fore200e_pca_dma_map,
3143 fore200e_pca_dma_unmap,
3144 fore200e_pca_dma_sync_for_cpu,
3145 fore200e_pca_dma_sync_for_device,
3146 fore200e_pca_dma_chunk_alloc,
3147 fore200e_pca_dma_chunk_free,
3148 fore200e_pca_configure,
3149 fore200e_pca_map,
3150 fore200e_pca_reset,
3151 fore200e_pca_prom_read,
3152 fore200e_pca_unmap,
3153 NULL,
3154 fore200e_pca_irq_check,
3155 fore200e_pca_irq_ack,
3156 fore200e_pca_proc_read,
3157 },
3158#endif
3159#ifdef CONFIG_SBUS
3160 { "SBA-200E", "sba200e", 32, 64, 32,
3161 fore200e_sba_read,
3162 fore200e_sba_write,
3163 fore200e_sba_dma_map,
3164 fore200e_sba_dma_unmap,
3165 fore200e_sba_dma_sync_for_cpu,
3166 fore200e_sba_dma_sync_for_device,
3167 fore200e_sba_dma_chunk_alloc,
3168 fore200e_sba_dma_chunk_free,
3169 fore200e_sba_configure,
3170 fore200e_sba_map,
3171 fore200e_sba_reset,
3172 fore200e_sba_prom_read,
3173 fore200e_sba_unmap,
3174 fore200e_sba_irq_enable,
3175 fore200e_sba_irq_check,
3176 fore200e_sba_irq_ack,
3177 fore200e_sba_proc_read,
3178 },
3179#endif
3180 {}
3181};
3182
3183MODULE_LICENSE("GPL");
3184#ifdef CONFIG_PCI
3185#ifdef __LITTLE_ENDIAN__
3186MODULE_FIRMWARE("pca200e.bin");
3187#else
3188MODULE_FIRMWARE("pca200e_ecd.bin2");
3189#endif
3190#endif /* CONFIG_PCI */
3191#ifdef CONFIG_SBUS
3192MODULE_FIRMWARE("sba200e_ecd.bin2");
3193#endif
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 A FORE Systems 200E-series driver for ATM on Linux.
4 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003.
5
6 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
7
8 This driver simultaneously supports PCA-200E and SBA-200E adapters
9 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
10
11*/
12
13
14#include <linux/kernel.h>
15#include <linux/slab.h>
16#include <linux/init.h>
17#include <linux/capability.h>
18#include <linux/interrupt.h>
19#include <linux/bitops.h>
20#include <linux/pci.h>
21#include <linux/module.h>
22#include <linux/atmdev.h>
23#include <linux/sonet.h>
24#include <linux/dma-mapping.h>
25#include <linux/delay.h>
26#include <linux/firmware.h>
27#include <linux/pgtable.h>
28#include <asm/io.h>
29#include <asm/string.h>
30#include <asm/page.h>
31#include <asm/irq.h>
32#include <asm/dma.h>
33#include <asm/byteorder.h>
34#include <linux/uaccess.h>
35#include <linux/atomic.h>
36
37#ifdef CONFIG_SBUS
38#include <linux/of.h>
39#include <linux/of_device.h>
40#include <asm/idprom.h>
41#include <asm/openprom.h>
42#include <asm/oplib.h>
43#endif
44
45#if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */
46#define FORE200E_USE_TASKLET
47#endif
48
49#if 0 /* enable the debugging code of the buffer supply queues */
50#define FORE200E_BSQ_DEBUG
51#endif
52
53#if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */
54#define FORE200E_52BYTE_AAL0_SDU
55#endif
56
57#include "fore200e.h"
58#include "suni.h"
59
60#define FORE200E_VERSION "0.3e"
61
62#define FORE200E "fore200e: "
63
64#if 0 /* override .config */
65#define CONFIG_ATM_FORE200E_DEBUG 1
66#endif
67#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
68#define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
69 printk(FORE200E format, ##args); } while (0)
70#else
71#define DPRINTK(level, format, args...) do {} while (0)
72#endif
73
74
75#define FORE200E_ALIGN(addr, alignment) \
76 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
77
78#define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
79
80#define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
81
82#define FORE200E_NEXT_ENTRY(index, modulo) (index = ((index) + 1) % (modulo))
83
84#if 1
85#define ASSERT(expr) if (!(expr)) { \
86 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
87 __func__, __LINE__, #expr); \
88 panic(FORE200E "%s", __func__); \
89 }
90#else
91#define ASSERT(expr) do {} while (0)
92#endif
93
94
95static const struct atmdev_ops fore200e_ops;
96
97static LIST_HEAD(fore200e_boards);
98
99
100MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
101MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
102
103static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
104 { BUFFER_S1_NBR, BUFFER_L1_NBR },
105 { BUFFER_S2_NBR, BUFFER_L2_NBR }
106};
107
108static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
109 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
110 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
111};
112
113
114#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
115static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
116#endif
117
118
119#if 0 /* currently unused */
120static int
121fore200e_fore2atm_aal(enum fore200e_aal aal)
122{
123 switch(aal) {
124 case FORE200E_AAL0: return ATM_AAL0;
125 case FORE200E_AAL34: return ATM_AAL34;
126 case FORE200E_AAL5: return ATM_AAL5;
127 }
128
129 return -EINVAL;
130}
131#endif
132
133
134static enum fore200e_aal
135fore200e_atm2fore_aal(int aal)
136{
137 switch(aal) {
138 case ATM_AAL0: return FORE200E_AAL0;
139 case ATM_AAL34: return FORE200E_AAL34;
140 case ATM_AAL1:
141 case ATM_AAL2:
142 case ATM_AAL5: return FORE200E_AAL5;
143 }
144
145 return -EINVAL;
146}
147
148
149static char*
150fore200e_irq_itoa(int irq)
151{
152 static char str[8];
153 sprintf(str, "%d", irq);
154 return str;
155}
156
157
158/* allocate and align a chunk of memory intended to hold the data behing exchanged
159 between the driver and the adapter (using streaming DVMA) */
160
161static int
162fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
163{
164 unsigned long offset = 0;
165
166 if (alignment <= sizeof(int))
167 alignment = 0;
168
169 chunk->alloc_size = size + alignment;
170 chunk->direction = direction;
171
172 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL);
173 if (chunk->alloc_addr == NULL)
174 return -ENOMEM;
175
176 if (alignment > 0)
177 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
178
179 chunk->align_addr = chunk->alloc_addr + offset;
180
181 chunk->dma_addr = dma_map_single(fore200e->dev, chunk->align_addr,
182 size, direction);
183 if (dma_mapping_error(fore200e->dev, chunk->dma_addr)) {
184 kfree(chunk->alloc_addr);
185 return -ENOMEM;
186 }
187 return 0;
188}
189
190
191/* free a chunk of memory */
192
193static void
194fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
195{
196 dma_unmap_single(fore200e->dev, chunk->dma_addr, chunk->dma_size,
197 chunk->direction);
198 kfree(chunk->alloc_addr);
199}
200
201/*
202 * Allocate a DMA consistent chunk of memory intended to act as a communication
203 * mechanism (to hold descriptors, status, queues, etc.) shared by the driver
204 * and the adapter.
205 */
206static int
207fore200e_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk,
208 int size, int nbr, int alignment)
209{
210 /* returned chunks are page-aligned */
211 chunk->alloc_size = size * nbr;
212 chunk->alloc_addr = dma_alloc_coherent(fore200e->dev, chunk->alloc_size,
213 &chunk->dma_addr, GFP_KERNEL);
214 if (!chunk->alloc_addr)
215 return -ENOMEM;
216 chunk->align_addr = chunk->alloc_addr;
217 return 0;
218}
219
220/*
221 * Free a DMA consistent chunk of memory.
222 */
223static void
224fore200e_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
225{
226 dma_free_coherent(fore200e->dev, chunk->alloc_size, chunk->alloc_addr,
227 chunk->dma_addr);
228}
229
230static void
231fore200e_spin(int msecs)
232{
233 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
234 while (time_before(jiffies, timeout));
235}
236
237
238static int
239fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
240{
241 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
242 int ok;
243
244 mb();
245 do {
246 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
247 break;
248
249 } while (time_before(jiffies, timeout));
250
251#if 1
252 if (!ok) {
253 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
254 *addr, val);
255 }
256#endif
257
258 return ok;
259}
260
261
262static int
263fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
264{
265 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
266 int ok;
267
268 do {
269 if ((ok = (fore200e->bus->read(addr) == val)))
270 break;
271
272 } while (time_before(jiffies, timeout));
273
274#if 1
275 if (!ok) {
276 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
277 fore200e->bus->read(addr), val);
278 }
279#endif
280
281 return ok;
282}
283
284
285static void
286fore200e_free_rx_buf(struct fore200e* fore200e)
287{
288 int scheme, magn, nbr;
289 struct buffer* buffer;
290
291 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
292 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
293
294 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
295
296 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
297
298 struct chunk* data = &buffer[ nbr ].data;
299
300 if (data->alloc_addr != NULL)
301 fore200e_chunk_free(fore200e, data);
302 }
303 }
304 }
305 }
306}
307
308
309static void
310fore200e_uninit_bs_queue(struct fore200e* fore200e)
311{
312 int scheme, magn;
313
314 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
315 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
316
317 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
318 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
319
320 if (status->alloc_addr)
321 fore200e_dma_chunk_free(fore200e, status);
322
323 if (rbd_block->alloc_addr)
324 fore200e_dma_chunk_free(fore200e, rbd_block);
325 }
326 }
327}
328
329
330static int
331fore200e_reset(struct fore200e* fore200e, int diag)
332{
333 int ok;
334
335 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
336
337 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
338
339 fore200e->bus->reset(fore200e);
340
341 if (diag) {
342 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
343 if (ok == 0) {
344
345 printk(FORE200E "device %s self-test failed\n", fore200e->name);
346 return -ENODEV;
347 }
348
349 printk(FORE200E "device %s self-test passed\n", fore200e->name);
350
351 fore200e->state = FORE200E_STATE_RESET;
352 }
353
354 return 0;
355}
356
357
358static void
359fore200e_shutdown(struct fore200e* fore200e)
360{
361 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
362 fore200e->name, fore200e->phys_base,
363 fore200e_irq_itoa(fore200e->irq));
364
365 if (fore200e->state > FORE200E_STATE_RESET) {
366 /* first, reset the board to prevent further interrupts or data transfers */
367 fore200e_reset(fore200e, 0);
368 }
369
370 /* then, release all allocated resources */
371 switch(fore200e->state) {
372
373 case FORE200E_STATE_COMPLETE:
374 kfree(fore200e->stats);
375
376 fallthrough;
377 case FORE200E_STATE_IRQ:
378 free_irq(fore200e->irq, fore200e->atm_dev);
379
380 fallthrough;
381 case FORE200E_STATE_ALLOC_BUF:
382 fore200e_free_rx_buf(fore200e);
383
384 fallthrough;
385 case FORE200E_STATE_INIT_BSQ:
386 fore200e_uninit_bs_queue(fore200e);
387
388 fallthrough;
389 case FORE200E_STATE_INIT_RXQ:
390 fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.status);
391 fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
392
393 fallthrough;
394 case FORE200E_STATE_INIT_TXQ:
395 fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.status);
396 fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
397
398 fallthrough;
399 case FORE200E_STATE_INIT_CMDQ:
400 fore200e_dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
401
402 fallthrough;
403 case FORE200E_STATE_INITIALIZE:
404 /* nothing to do for that state */
405
406 case FORE200E_STATE_START_FW:
407 /* nothing to do for that state */
408
409 case FORE200E_STATE_RESET:
410 /* nothing to do for that state */
411
412 case FORE200E_STATE_MAP:
413 fore200e->bus->unmap(fore200e);
414
415 fallthrough;
416 case FORE200E_STATE_CONFIGURE:
417 /* nothing to do for that state */
418
419 case FORE200E_STATE_REGISTER:
420 /* XXX shouldn't we *start* by deregistering the device? */
421 atm_dev_deregister(fore200e->atm_dev);
422
423 fallthrough;
424 case FORE200E_STATE_BLANK:
425 /* nothing to do for that state */
426 break;
427 }
428}
429
430
431#ifdef CONFIG_PCI
432
433static u32 fore200e_pca_read(volatile u32 __iomem *addr)
434{
435 /* on big-endian hosts, the board is configured to convert
436 the endianess of slave RAM accesses */
437 return le32_to_cpu(readl(addr));
438}
439
440
441static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
442{
443 /* on big-endian hosts, the board is configured to convert
444 the endianess of slave RAM accesses */
445 writel(cpu_to_le32(val), addr);
446}
447
448static int
449fore200e_pca_irq_check(struct fore200e* fore200e)
450{
451 /* this is a 1 bit register */
452 int irq_posted = readl(fore200e->regs.pca.psr);
453
454#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
455 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
456 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
457 }
458#endif
459
460 return irq_posted;
461}
462
463
464static void
465fore200e_pca_irq_ack(struct fore200e* fore200e)
466{
467 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
468}
469
470
471static void
472fore200e_pca_reset(struct fore200e* fore200e)
473{
474 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
475 fore200e_spin(10);
476 writel(0, fore200e->regs.pca.hcr);
477}
478
479
480static int fore200e_pca_map(struct fore200e* fore200e)
481{
482 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
483
484 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
485
486 if (fore200e->virt_base == NULL) {
487 printk(FORE200E "can't map device %s\n", fore200e->name);
488 return -EFAULT;
489 }
490
491 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
492
493 /* gain access to the PCA specific registers */
494 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
495 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
496 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
497
498 fore200e->state = FORE200E_STATE_MAP;
499 return 0;
500}
501
502
503static void
504fore200e_pca_unmap(struct fore200e* fore200e)
505{
506 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
507
508 if (fore200e->virt_base != NULL)
509 iounmap(fore200e->virt_base);
510}
511
512
513static int fore200e_pca_configure(struct fore200e *fore200e)
514{
515 struct pci_dev *pci_dev = to_pci_dev(fore200e->dev);
516 u8 master_ctrl, latency;
517
518 DPRINTK(2, "device %s being configured\n", fore200e->name);
519
520 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
521 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
522 return -EIO;
523 }
524
525 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
526
527 master_ctrl = master_ctrl
528#if defined(__BIG_ENDIAN)
529 /* request the PCA board to convert the endianess of slave RAM accesses */
530 | PCA200E_CTRL_CONVERT_ENDIAN
531#endif
532#if 0
533 | PCA200E_CTRL_DIS_CACHE_RD
534 | PCA200E_CTRL_DIS_WRT_INVAL
535 | PCA200E_CTRL_ENA_CONT_REQ_MODE
536 | PCA200E_CTRL_2_CACHE_WRT_INVAL
537#endif
538 | PCA200E_CTRL_LARGE_PCI_BURSTS;
539
540 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
541
542 /* raise latency from 32 (default) to 192, as this seems to prevent NIC
543 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition.
544 this may impact the performances of other PCI devices on the same bus, though */
545 latency = 192;
546 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
547
548 fore200e->state = FORE200E_STATE_CONFIGURE;
549 return 0;
550}
551
552
553static int __init
554fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
555{
556 struct host_cmdq* cmdq = &fore200e->host_cmdq;
557 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
558 struct prom_opcode opcode;
559 int ok;
560 u32 prom_dma;
561
562 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
563
564 opcode.opcode = OPCODE_GET_PROM;
565 opcode.pad = 0;
566
567 prom_dma = dma_map_single(fore200e->dev, prom, sizeof(struct prom_data),
568 DMA_FROM_DEVICE);
569 if (dma_mapping_error(fore200e->dev, prom_dma))
570 return -ENOMEM;
571
572 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
573
574 *entry->status = STATUS_PENDING;
575
576 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
577
578 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
579
580 *entry->status = STATUS_FREE;
581
582 dma_unmap_single(fore200e->dev, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
583
584 if (ok == 0) {
585 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
586 return -EIO;
587 }
588
589#if defined(__BIG_ENDIAN)
590
591#define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
592
593 /* MAC address is stored as little-endian */
594 swap_here(&prom->mac_addr[0]);
595 swap_here(&prom->mac_addr[4]);
596#endif
597
598 return 0;
599}
600
601
602static int
603fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
604{
605 struct pci_dev *pci_dev = to_pci_dev(fore200e->dev);
606
607 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
608 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
609}
610
611static const struct fore200e_bus fore200e_pci_ops = {
612 .model_name = "PCA-200E",
613 .proc_name = "pca200e",
614 .descr_alignment = 32,
615 .buffer_alignment = 4,
616 .status_alignment = 32,
617 .read = fore200e_pca_read,
618 .write = fore200e_pca_write,
619 .configure = fore200e_pca_configure,
620 .map = fore200e_pca_map,
621 .reset = fore200e_pca_reset,
622 .prom_read = fore200e_pca_prom_read,
623 .unmap = fore200e_pca_unmap,
624 .irq_check = fore200e_pca_irq_check,
625 .irq_ack = fore200e_pca_irq_ack,
626 .proc_read = fore200e_pca_proc_read,
627};
628#endif /* CONFIG_PCI */
629
630#ifdef CONFIG_SBUS
631
632static u32 fore200e_sba_read(volatile u32 __iomem *addr)
633{
634 return sbus_readl(addr);
635}
636
637static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
638{
639 sbus_writel(val, addr);
640}
641
642static void fore200e_sba_irq_enable(struct fore200e *fore200e)
643{
644 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
645 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
646}
647
648static int fore200e_sba_irq_check(struct fore200e *fore200e)
649{
650 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
651}
652
653static void fore200e_sba_irq_ack(struct fore200e *fore200e)
654{
655 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
656 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
657}
658
659static void fore200e_sba_reset(struct fore200e *fore200e)
660{
661 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
662 fore200e_spin(10);
663 fore200e->bus->write(0, fore200e->regs.sba.hcr);
664}
665
666static int __init fore200e_sba_map(struct fore200e *fore200e)
667{
668 struct platform_device *op = to_platform_device(fore200e->dev);
669 unsigned int bursts;
670
671 /* gain access to the SBA specific registers */
672 fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
673 fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
674 fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
675 fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
676
677 if (!fore200e->virt_base) {
678 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
679 return -EFAULT;
680 }
681
682 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
683
684 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
685
686 /* get the supported DVMA burst sizes */
687 bursts = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0x00);
688
689 if (sbus_can_dma_64bit())
690 sbus_set_sbus64(&op->dev, bursts);
691
692 fore200e->state = FORE200E_STATE_MAP;
693 return 0;
694}
695
696static void fore200e_sba_unmap(struct fore200e *fore200e)
697{
698 struct platform_device *op = to_platform_device(fore200e->dev);
699
700 of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
701 of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
702 of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
703 of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH);
704}
705
706static int __init fore200e_sba_configure(struct fore200e *fore200e)
707{
708 fore200e->state = FORE200E_STATE_CONFIGURE;
709 return 0;
710}
711
712static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom)
713{
714 struct platform_device *op = to_platform_device(fore200e->dev);
715 const u8 *prop;
716 int len;
717
718 prop = of_get_property(op->dev.of_node, "madaddrlo2", &len);
719 if (!prop)
720 return -ENODEV;
721 memcpy(&prom->mac_addr[4], prop, 4);
722
723 prop = of_get_property(op->dev.of_node, "madaddrhi4", &len);
724 if (!prop)
725 return -ENODEV;
726 memcpy(&prom->mac_addr[2], prop, 4);
727
728 prom->serial_number = of_getintprop_default(op->dev.of_node,
729 "serialnumber", 0);
730 prom->hw_revision = of_getintprop_default(op->dev.of_node,
731 "promversion", 0);
732
733 return 0;
734}
735
736static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page)
737{
738 struct platform_device *op = to_platform_device(fore200e->dev);
739 const struct linux_prom_registers *regs;
740
741 regs = of_get_property(op->dev.of_node, "reg", NULL);
742
743 return sprintf(page, " SBUS slot/device:\t\t%d/'%pOFn'\n",
744 (regs ? regs->which_io : 0), op->dev.of_node);
745}
746
747static const struct fore200e_bus fore200e_sbus_ops = {
748 .model_name = "SBA-200E",
749 .proc_name = "sba200e",
750 .descr_alignment = 32,
751 .buffer_alignment = 64,
752 .status_alignment = 32,
753 .read = fore200e_sba_read,
754 .write = fore200e_sba_write,
755 .configure = fore200e_sba_configure,
756 .map = fore200e_sba_map,
757 .reset = fore200e_sba_reset,
758 .prom_read = fore200e_sba_prom_read,
759 .unmap = fore200e_sba_unmap,
760 .irq_enable = fore200e_sba_irq_enable,
761 .irq_check = fore200e_sba_irq_check,
762 .irq_ack = fore200e_sba_irq_ack,
763 .proc_read = fore200e_sba_proc_read,
764};
765#endif /* CONFIG_SBUS */
766
767static void
768fore200e_tx_irq(struct fore200e* fore200e)
769{
770 struct host_txq* txq = &fore200e->host_txq;
771 struct host_txq_entry* entry;
772 struct atm_vcc* vcc;
773 struct fore200e_vc_map* vc_map;
774
775 if (fore200e->host_txq.txing == 0)
776 return;
777
778 for (;;) {
779
780 entry = &txq->host_entry[ txq->tail ];
781
782 if ((*entry->status & STATUS_COMPLETE) == 0) {
783 break;
784 }
785
786 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
787 entry, txq->tail, entry->vc_map, entry->skb);
788
789 /* free copy of misaligned data */
790 kfree(entry->data);
791
792 /* remove DMA mapping */
793 dma_unmap_single(fore200e->dev, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
794 DMA_TO_DEVICE);
795
796 vc_map = entry->vc_map;
797
798 /* vcc closed since the time the entry was submitted for tx? */
799 if ((vc_map->vcc == NULL) ||
800 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
801
802 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
803 fore200e->atm_dev->number);
804
805 dev_kfree_skb_any(entry->skb);
806 }
807 else {
808 ASSERT(vc_map->vcc);
809
810 /* vcc closed then immediately re-opened? */
811 if (vc_map->incarn != entry->incarn) {
812
813 /* when a vcc is closed, some PDUs may be still pending in the tx queue.
814 if the same vcc is immediately re-opened, those pending PDUs must
815 not be popped after the completion of their emission, as they refer
816 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc
817 would be decremented by the size of the (unrelated) skb, possibly
818 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc.
819 we thus bind the tx entry to the current incarnation of the vcc
820 when the entry is submitted for tx. When the tx later completes,
821 if the incarnation number of the tx entry does not match the one
822 of the vcc, then this implies that the vcc has been closed then re-opened.
823 we thus just drop the skb here. */
824
825 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
826 fore200e->atm_dev->number);
827
828 dev_kfree_skb_any(entry->skb);
829 }
830 else {
831 vcc = vc_map->vcc;
832 ASSERT(vcc);
833
834 /* notify tx completion */
835 if (vcc->pop) {
836 vcc->pop(vcc, entry->skb);
837 }
838 else {
839 dev_kfree_skb_any(entry->skb);
840 }
841
842 /* check error condition */
843 if (*entry->status & STATUS_ERROR)
844 atomic_inc(&vcc->stats->tx_err);
845 else
846 atomic_inc(&vcc->stats->tx);
847 }
848 }
849
850 *entry->status = STATUS_FREE;
851
852 fore200e->host_txq.txing--;
853
854 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
855 }
856}
857
858
859#ifdef FORE200E_BSQ_DEBUG
860int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
861{
862 struct buffer* buffer;
863 int count = 0;
864
865 buffer = bsq->freebuf;
866 while (buffer) {
867
868 if (buffer->supplied) {
869 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
870 where, scheme, magn, buffer->index);
871 }
872
873 if (buffer->magn != magn) {
874 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
875 where, scheme, magn, buffer->index, buffer->magn);
876 }
877
878 if (buffer->scheme != scheme) {
879 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
880 where, scheme, magn, buffer->index, buffer->scheme);
881 }
882
883 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
884 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
885 where, scheme, magn, buffer->index);
886 }
887
888 count++;
889 buffer = buffer->next;
890 }
891
892 if (count != bsq->freebuf_count) {
893 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
894 where, scheme, magn, count, bsq->freebuf_count);
895 }
896 return 0;
897}
898#endif
899
900
901static void
902fore200e_supply(struct fore200e* fore200e)
903{
904 int scheme, magn, i;
905
906 struct host_bsq* bsq;
907 struct host_bsq_entry* entry;
908 struct buffer* buffer;
909
910 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
911 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
912
913 bsq = &fore200e->host_bsq[ scheme ][ magn ];
914
915#ifdef FORE200E_BSQ_DEBUG
916 bsq_audit(1, bsq, scheme, magn);
917#endif
918 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
919
920 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
921 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
922
923 entry = &bsq->host_entry[ bsq->head ];
924
925 for (i = 0; i < RBD_BLK_SIZE; i++) {
926
927 /* take the first buffer in the free buffer list */
928 buffer = bsq->freebuf;
929 if (!buffer) {
930 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
931 scheme, magn, bsq->freebuf_count);
932 return;
933 }
934 bsq->freebuf = buffer->next;
935
936#ifdef FORE200E_BSQ_DEBUG
937 if (buffer->supplied)
938 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
939 scheme, magn, buffer->index);
940 buffer->supplied = 1;
941#endif
942 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
943 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
944 }
945
946 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
947
948 /* decrease accordingly the number of free rx buffers */
949 bsq->freebuf_count -= RBD_BLK_SIZE;
950
951 *entry->status = STATUS_PENDING;
952 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
953 }
954 }
955 }
956}
957
958
959static int
960fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
961{
962 struct sk_buff* skb;
963 struct buffer* buffer;
964 struct fore200e_vcc* fore200e_vcc;
965 int i, pdu_len = 0;
966#ifdef FORE200E_52BYTE_AAL0_SDU
967 u32 cell_header = 0;
968#endif
969
970 ASSERT(vcc);
971
972 fore200e_vcc = FORE200E_VCC(vcc);
973 ASSERT(fore200e_vcc);
974
975#ifdef FORE200E_52BYTE_AAL0_SDU
976 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
977
978 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
979 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
980 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
981 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
982 rpd->atm_header.clp;
983 pdu_len = 4;
984 }
985#endif
986
987 /* compute total PDU length */
988 for (i = 0; i < rpd->nseg; i++)
989 pdu_len += rpd->rsd[ i ].length;
990
991 skb = alloc_skb(pdu_len, GFP_ATOMIC);
992 if (skb == NULL) {
993 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
994
995 atomic_inc(&vcc->stats->rx_drop);
996 return -ENOMEM;
997 }
998
999 __net_timestamp(skb);
1000
1001#ifdef FORE200E_52BYTE_AAL0_SDU
1002 if (cell_header) {
1003 *((u32*)skb_put(skb, 4)) = cell_header;
1004 }
1005#endif
1006
1007 /* reassemble segments */
1008 for (i = 0; i < rpd->nseg; i++) {
1009
1010 /* rebuild rx buffer address from rsd handle */
1011 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1012
1013 /* Make device DMA transfer visible to CPU. */
1014 dma_sync_single_for_cpu(fore200e->dev, buffer->data.dma_addr,
1015 rpd->rsd[i].length, DMA_FROM_DEVICE);
1016
1017 skb_put_data(skb, buffer->data.align_addr, rpd->rsd[i].length);
1018
1019 /* Now let the device get at it again. */
1020 dma_sync_single_for_device(fore200e->dev, buffer->data.dma_addr,
1021 rpd->rsd[i].length, DMA_FROM_DEVICE);
1022 }
1023
1024 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1025
1026 if (pdu_len < fore200e_vcc->rx_min_pdu)
1027 fore200e_vcc->rx_min_pdu = pdu_len;
1028 if (pdu_len > fore200e_vcc->rx_max_pdu)
1029 fore200e_vcc->rx_max_pdu = pdu_len;
1030 fore200e_vcc->rx_pdu++;
1031
1032 /* push PDU */
1033 if (atm_charge(vcc, skb->truesize) == 0) {
1034
1035 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1036 vcc->itf, vcc->vpi, vcc->vci);
1037
1038 dev_kfree_skb_any(skb);
1039
1040 atomic_inc(&vcc->stats->rx_drop);
1041 return -ENOMEM;
1042 }
1043
1044 vcc->push(vcc, skb);
1045 atomic_inc(&vcc->stats->rx);
1046
1047 return 0;
1048}
1049
1050
1051static void
1052fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1053{
1054 struct host_bsq* bsq;
1055 struct buffer* buffer;
1056 int i;
1057
1058 for (i = 0; i < rpd->nseg; i++) {
1059
1060 /* rebuild rx buffer address from rsd handle */
1061 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1062
1063 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1064
1065#ifdef FORE200E_BSQ_DEBUG
1066 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1067
1068 if (buffer->supplied == 0)
1069 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1070 buffer->scheme, buffer->magn, buffer->index);
1071 buffer->supplied = 0;
1072#endif
1073
1074 /* re-insert the buffer into the free buffer list */
1075 buffer->next = bsq->freebuf;
1076 bsq->freebuf = buffer;
1077
1078 /* then increment the number of free rx buffers */
1079 bsq->freebuf_count++;
1080 }
1081}
1082
1083
1084static void
1085fore200e_rx_irq(struct fore200e* fore200e)
1086{
1087 struct host_rxq* rxq = &fore200e->host_rxq;
1088 struct host_rxq_entry* entry;
1089 struct atm_vcc* vcc;
1090 struct fore200e_vc_map* vc_map;
1091
1092 for (;;) {
1093
1094 entry = &rxq->host_entry[ rxq->head ];
1095
1096 /* no more received PDUs */
1097 if ((*entry->status & STATUS_COMPLETE) == 0)
1098 break;
1099
1100 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1101
1102 if ((vc_map->vcc == NULL) ||
1103 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1104
1105 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1106 fore200e->atm_dev->number,
1107 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1108 }
1109 else {
1110 vcc = vc_map->vcc;
1111 ASSERT(vcc);
1112
1113 if ((*entry->status & STATUS_ERROR) == 0) {
1114
1115 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1116 }
1117 else {
1118 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1119 fore200e->atm_dev->number,
1120 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1121 atomic_inc(&vcc->stats->rx_err);
1122 }
1123 }
1124
1125 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1126
1127 fore200e_collect_rpd(fore200e, entry->rpd);
1128
1129 /* rewrite the rpd address to ack the received PDU */
1130 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1131 *entry->status = STATUS_FREE;
1132
1133 fore200e_supply(fore200e);
1134 }
1135}
1136
1137
1138#ifndef FORE200E_USE_TASKLET
1139static void
1140fore200e_irq(struct fore200e* fore200e)
1141{
1142 unsigned long flags;
1143
1144 spin_lock_irqsave(&fore200e->q_lock, flags);
1145 fore200e_rx_irq(fore200e);
1146 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1147
1148 spin_lock_irqsave(&fore200e->q_lock, flags);
1149 fore200e_tx_irq(fore200e);
1150 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1151}
1152#endif
1153
1154
1155static irqreturn_t
1156fore200e_interrupt(int irq, void* dev)
1157{
1158 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1159
1160 if (fore200e->bus->irq_check(fore200e) == 0) {
1161
1162 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1163 return IRQ_NONE;
1164 }
1165 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1166
1167#ifdef FORE200E_USE_TASKLET
1168 tasklet_schedule(&fore200e->tx_tasklet);
1169 tasklet_schedule(&fore200e->rx_tasklet);
1170#else
1171 fore200e_irq(fore200e);
1172#endif
1173
1174 fore200e->bus->irq_ack(fore200e);
1175 return IRQ_HANDLED;
1176}
1177
1178
1179#ifdef FORE200E_USE_TASKLET
1180static void
1181fore200e_tx_tasklet(unsigned long data)
1182{
1183 struct fore200e* fore200e = (struct fore200e*) data;
1184 unsigned long flags;
1185
1186 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1187
1188 spin_lock_irqsave(&fore200e->q_lock, flags);
1189 fore200e_tx_irq(fore200e);
1190 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1191}
1192
1193
1194static void
1195fore200e_rx_tasklet(unsigned long data)
1196{
1197 struct fore200e* fore200e = (struct fore200e*) data;
1198 unsigned long flags;
1199
1200 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1201
1202 spin_lock_irqsave(&fore200e->q_lock, flags);
1203 fore200e_rx_irq((struct fore200e*) data);
1204 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1205}
1206#endif
1207
1208
1209static int
1210fore200e_select_scheme(struct atm_vcc* vcc)
1211{
1212 /* fairly balance the VCs over (identical) buffer schemes */
1213 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1214
1215 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1216 vcc->itf, vcc->vpi, vcc->vci, scheme);
1217
1218 return scheme;
1219}
1220
1221
1222static int
1223fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1224{
1225 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1226 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1227 struct activate_opcode activ_opcode;
1228 struct deactivate_opcode deactiv_opcode;
1229 struct vpvc vpvc;
1230 int ok;
1231 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1232
1233 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1234
1235 if (activate) {
1236 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1237
1238 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1239 activ_opcode.aal = aal;
1240 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1241 activ_opcode.pad = 0;
1242 }
1243 else {
1244 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1245 deactiv_opcode.pad = 0;
1246 }
1247
1248 vpvc.vci = vcc->vci;
1249 vpvc.vpi = vcc->vpi;
1250
1251 *entry->status = STATUS_PENDING;
1252
1253 if (activate) {
1254
1255#ifdef FORE200E_52BYTE_AAL0_SDU
1256 mtu = 48;
1257#endif
1258 /* the MTU is not used by the cp, except in the case of AAL0 */
1259 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1260 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
1261 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
1262 }
1263 else {
1264 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
1265 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
1266 }
1267
1268 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1269
1270 *entry->status = STATUS_FREE;
1271
1272 if (ok == 0) {
1273 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1274 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1275 return -EIO;
1276 }
1277
1278 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1279 activate ? "open" : "clos");
1280
1281 return 0;
1282}
1283
1284
1285#define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1286
1287static void
1288fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1289{
1290 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1291
1292 /* compute the data cells to idle cells ratio from the tx PCR */
1293 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1294 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1295 }
1296 else {
1297 /* disable rate control */
1298 rate->data_cells = rate->idle_cells = 0;
1299 }
1300}
1301
1302
1303static int
1304fore200e_open(struct atm_vcc *vcc)
1305{
1306 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1307 struct fore200e_vcc* fore200e_vcc;
1308 struct fore200e_vc_map* vc_map;
1309 unsigned long flags;
1310 int vci = vcc->vci;
1311 short vpi = vcc->vpi;
1312
1313 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1314 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1315
1316 spin_lock_irqsave(&fore200e->q_lock, flags);
1317
1318 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1319 if (vc_map->vcc) {
1320
1321 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1322
1323 printk(FORE200E "VC %d.%d.%d already in use\n",
1324 fore200e->atm_dev->number, vpi, vci);
1325
1326 return -EINVAL;
1327 }
1328
1329 vc_map->vcc = vcc;
1330
1331 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1332
1333 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1334 if (fore200e_vcc == NULL) {
1335 vc_map->vcc = NULL;
1336 return -ENOMEM;
1337 }
1338
1339 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1340 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1341 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1342 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1343 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1344 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1345 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1346
1347 /* pseudo-CBR bandwidth requested? */
1348 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1349
1350 mutex_lock(&fore200e->rate_mtx);
1351 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1352 mutex_unlock(&fore200e->rate_mtx);
1353
1354 kfree(fore200e_vcc);
1355 vc_map->vcc = NULL;
1356 return -EAGAIN;
1357 }
1358
1359 /* reserve bandwidth */
1360 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1361 mutex_unlock(&fore200e->rate_mtx);
1362 }
1363
1364 vcc->itf = vcc->dev->number;
1365
1366 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1367 set_bit(ATM_VF_ADDR, &vcc->flags);
1368
1369 vcc->dev_data = fore200e_vcc;
1370
1371 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1372
1373 vc_map->vcc = NULL;
1374
1375 clear_bit(ATM_VF_ADDR, &vcc->flags);
1376 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1377
1378 vcc->dev_data = NULL;
1379
1380 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1381
1382 kfree(fore200e_vcc);
1383 return -EINVAL;
1384 }
1385
1386 /* compute rate control parameters */
1387 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1388
1389 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1390 set_bit(ATM_VF_HASQOS, &vcc->flags);
1391
1392 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1393 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1394 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1395 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1396 }
1397
1398 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1399 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1400 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1401
1402 /* new incarnation of the vcc */
1403 vc_map->incarn = ++fore200e->incarn_count;
1404
1405 /* VC unusable before this flag is set */
1406 set_bit(ATM_VF_READY, &vcc->flags);
1407
1408 return 0;
1409}
1410
1411
1412static void
1413fore200e_close(struct atm_vcc* vcc)
1414{
1415 struct fore200e_vcc* fore200e_vcc;
1416 struct fore200e* fore200e;
1417 struct fore200e_vc_map* vc_map;
1418 unsigned long flags;
1419
1420 ASSERT(vcc);
1421 fore200e = FORE200E_DEV(vcc->dev);
1422
1423 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1424 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1425
1426 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1427
1428 clear_bit(ATM_VF_READY, &vcc->flags);
1429
1430 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1431
1432 spin_lock_irqsave(&fore200e->q_lock, flags);
1433
1434 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1435
1436 /* the vc is no longer considered as "in use" by fore200e_open() */
1437 vc_map->vcc = NULL;
1438
1439 vcc->itf = vcc->vci = vcc->vpi = 0;
1440
1441 fore200e_vcc = FORE200E_VCC(vcc);
1442 vcc->dev_data = NULL;
1443
1444 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1445
1446 /* release reserved bandwidth, if any */
1447 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1448
1449 mutex_lock(&fore200e->rate_mtx);
1450 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1451 mutex_unlock(&fore200e->rate_mtx);
1452
1453 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1454 }
1455
1456 clear_bit(ATM_VF_ADDR, &vcc->flags);
1457 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1458
1459 ASSERT(fore200e_vcc);
1460 kfree(fore200e_vcc);
1461}
1462
1463
1464static int
1465fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1466{
1467 struct fore200e* fore200e;
1468 struct fore200e_vcc* fore200e_vcc;
1469 struct fore200e_vc_map* vc_map;
1470 struct host_txq* txq;
1471 struct host_txq_entry* entry;
1472 struct tpd* tpd;
1473 struct tpd_haddr tpd_haddr;
1474 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1475 int tx_copy = 0;
1476 int tx_len = skb->len;
1477 u32* cell_header = NULL;
1478 unsigned char* skb_data;
1479 int skb_len;
1480 unsigned char* data;
1481 unsigned long flags;
1482
1483 if (!vcc)
1484 return -EINVAL;
1485
1486 fore200e = FORE200E_DEV(vcc->dev);
1487 fore200e_vcc = FORE200E_VCC(vcc);
1488
1489 if (!fore200e)
1490 return -EINVAL;
1491
1492 txq = &fore200e->host_txq;
1493 if (!fore200e_vcc)
1494 return -EINVAL;
1495
1496 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1497 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1498 dev_kfree_skb_any(skb);
1499 return -EINVAL;
1500 }
1501
1502#ifdef FORE200E_52BYTE_AAL0_SDU
1503 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1504 cell_header = (u32*) skb->data;
1505 skb_data = skb->data + 4; /* skip 4-byte cell header */
1506 skb_len = tx_len = skb->len - 4;
1507
1508 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1509 }
1510 else
1511#endif
1512 {
1513 skb_data = skb->data;
1514 skb_len = skb->len;
1515 }
1516
1517 if (((unsigned long)skb_data) & 0x3) {
1518
1519 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1520 tx_copy = 1;
1521 tx_len = skb_len;
1522 }
1523
1524 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1525
1526 /* this simply NUKES the PCA board */
1527 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1528 tx_copy = 1;
1529 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1530 }
1531
1532 if (tx_copy) {
1533 data = kmalloc(tx_len, GFP_ATOMIC);
1534 if (data == NULL) {
1535 if (vcc->pop) {
1536 vcc->pop(vcc, skb);
1537 }
1538 else {
1539 dev_kfree_skb_any(skb);
1540 }
1541 return -ENOMEM;
1542 }
1543
1544 memcpy(data, skb_data, skb_len);
1545 if (skb_len < tx_len)
1546 memset(data + skb_len, 0x00, tx_len - skb_len);
1547 }
1548 else {
1549 data = skb_data;
1550 }
1551
1552 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1553 ASSERT(vc_map->vcc == vcc);
1554
1555 retry_here:
1556
1557 spin_lock_irqsave(&fore200e->q_lock, flags);
1558
1559 entry = &txq->host_entry[ txq->head ];
1560
1561 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1562
1563 /* try to free completed tx queue entries */
1564 fore200e_tx_irq(fore200e);
1565
1566 if (*entry->status != STATUS_FREE) {
1567
1568 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1569
1570 /* retry once again? */
1571 if (--retry > 0) {
1572 udelay(50);
1573 goto retry_here;
1574 }
1575
1576 atomic_inc(&vcc->stats->tx_err);
1577
1578 fore200e->tx_sat++;
1579 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1580 fore200e->name, fore200e->cp_queues->heartbeat);
1581 if (vcc->pop) {
1582 vcc->pop(vcc, skb);
1583 }
1584 else {
1585 dev_kfree_skb_any(skb);
1586 }
1587
1588 if (tx_copy)
1589 kfree(data);
1590
1591 return -ENOBUFS;
1592 }
1593 }
1594
1595 entry->incarn = vc_map->incarn;
1596 entry->vc_map = vc_map;
1597 entry->skb = skb;
1598 entry->data = tx_copy ? data : NULL;
1599
1600 tpd = entry->tpd;
1601 tpd->tsd[ 0 ].buffer = dma_map_single(fore200e->dev, data, tx_len,
1602 DMA_TO_DEVICE);
1603 if (dma_mapping_error(fore200e->dev, tpd->tsd[0].buffer)) {
1604 if (tx_copy)
1605 kfree(data);
1606 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1607 return -ENOMEM;
1608 }
1609 tpd->tsd[ 0 ].length = tx_len;
1610
1611 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1612 txq->txing++;
1613
1614 /* The dma_map call above implies a dma_sync so the device can use it,
1615 * thus no explicit dma_sync call is necessary here.
1616 */
1617
1618 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1619 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1620 tpd->tsd[0].length, skb_len);
1621
1622 if (skb_len < fore200e_vcc->tx_min_pdu)
1623 fore200e_vcc->tx_min_pdu = skb_len;
1624 if (skb_len > fore200e_vcc->tx_max_pdu)
1625 fore200e_vcc->tx_max_pdu = skb_len;
1626 fore200e_vcc->tx_pdu++;
1627
1628 /* set tx rate control information */
1629 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1630 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1631
1632 if (cell_header) {
1633 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1634 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1635 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1636 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1637 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1638 }
1639 else {
1640 /* set the ATM header, common to all cells conveying the PDU */
1641 tpd->atm_header.clp = 0;
1642 tpd->atm_header.plt = 0;
1643 tpd->atm_header.vci = vcc->vci;
1644 tpd->atm_header.vpi = vcc->vpi;
1645 tpd->atm_header.gfc = 0;
1646 }
1647
1648 tpd->spec.length = tx_len;
1649 tpd->spec.nseg = 1;
1650 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1651 tpd->spec.intr = 1;
1652
1653 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */
1654 tpd_haddr.pad = 0;
1655 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
1656
1657 *entry->status = STATUS_PENDING;
1658 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
1659
1660 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1661
1662 return 0;
1663}
1664
1665
1666static int
1667fore200e_getstats(struct fore200e* fore200e)
1668{
1669 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1670 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1671 struct stats_opcode opcode;
1672 int ok;
1673 u32 stats_dma_addr;
1674
1675 if (fore200e->stats == NULL) {
1676 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL);
1677 if (fore200e->stats == NULL)
1678 return -ENOMEM;
1679 }
1680
1681 stats_dma_addr = dma_map_single(fore200e->dev, fore200e->stats,
1682 sizeof(struct stats), DMA_FROM_DEVICE);
1683 if (dma_mapping_error(fore200e->dev, stats_dma_addr))
1684 return -ENOMEM;
1685
1686 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1687
1688 opcode.opcode = OPCODE_GET_STATS;
1689 opcode.pad = 0;
1690
1691 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1692
1693 *entry->status = STATUS_PENDING;
1694
1695 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
1696
1697 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1698
1699 *entry->status = STATUS_FREE;
1700
1701 dma_unmap_single(fore200e->dev, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
1702
1703 if (ok == 0) {
1704 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1705 return -EIO;
1706 }
1707
1708 return 0;
1709}
1710
1711#if 0 /* currently unused */
1712static int
1713fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1714{
1715 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1716 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1717 struct oc3_opcode opcode;
1718 int ok;
1719 u32 oc3_regs_dma_addr;
1720
1721 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1722
1723 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1724
1725 opcode.opcode = OPCODE_GET_OC3;
1726 opcode.reg = 0;
1727 opcode.value = 0;
1728 opcode.mask = 0;
1729
1730 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1731
1732 *entry->status = STATUS_PENDING;
1733
1734 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1735
1736 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1737
1738 *entry->status = STATUS_FREE;
1739
1740 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1741
1742 if (ok == 0) {
1743 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1744 return -EIO;
1745 }
1746
1747 return 0;
1748}
1749#endif
1750
1751
1752static int
1753fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1754{
1755 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1756 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1757 struct oc3_opcode opcode;
1758 int ok;
1759
1760 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
1761
1762 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1763
1764 opcode.opcode = OPCODE_SET_OC3;
1765 opcode.reg = reg;
1766 opcode.value = value;
1767 opcode.mask = mask;
1768
1769 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1770
1771 *entry->status = STATUS_PENDING;
1772
1773 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
1774
1775 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1776
1777 *entry->status = STATUS_FREE;
1778
1779 if (ok == 0) {
1780 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1781 return -EIO;
1782 }
1783
1784 return 0;
1785}
1786
1787
1788static int
1789fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1790{
1791 u32 mct_value, mct_mask;
1792 int error;
1793
1794 if (!capable(CAP_NET_ADMIN))
1795 return -EPERM;
1796
1797 switch (loop_mode) {
1798
1799 case ATM_LM_NONE:
1800 mct_value = 0;
1801 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1802 break;
1803
1804 case ATM_LM_LOC_PHY:
1805 mct_value = mct_mask = SUNI_MCT_DLE;
1806 break;
1807
1808 case ATM_LM_RMT_PHY:
1809 mct_value = mct_mask = SUNI_MCT_LLE;
1810 break;
1811
1812 default:
1813 return -EINVAL;
1814 }
1815
1816 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1817 if (error == 0)
1818 fore200e->loop_mode = loop_mode;
1819
1820 return error;
1821}
1822
1823
1824static int
1825fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
1826{
1827 struct sonet_stats tmp;
1828
1829 if (fore200e_getstats(fore200e) < 0)
1830 return -EIO;
1831
1832 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors);
1833 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors);
1834 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors);
1835 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors);
1836 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors);
1837 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors);
1838 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors);
1839 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) +
1840 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) +
1841 be32_to_cpu(fore200e->stats->aal5.cells_transmitted);
1842 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) +
1843 be32_to_cpu(fore200e->stats->aal34.cells_received) +
1844 be32_to_cpu(fore200e->stats->aal5.cells_received);
1845
1846 if (arg)
1847 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1848
1849 return 0;
1850}
1851
1852
1853static int
1854fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
1855{
1856 struct fore200e* fore200e = FORE200E_DEV(dev);
1857
1858 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1859
1860 switch (cmd) {
1861
1862 case SONET_GETSTAT:
1863 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
1864
1865 case SONET_GETDIAG:
1866 return put_user(0, (int __user *)arg) ? -EFAULT : 0;
1867
1868 case ATM_SETLOOP:
1869 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1870
1871 case ATM_GETLOOP:
1872 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
1873
1874 case ATM_QUERYLOOP:
1875 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
1876 }
1877
1878 return -ENOSYS; /* not implemented */
1879}
1880
1881
1882static int
1883fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1884{
1885 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1886 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1887
1888 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1889 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
1890 return -EINVAL;
1891 }
1892
1893 DPRINTK(2, "change_qos %d.%d.%d, "
1894 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1895 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1896 "available_cell_rate = %u",
1897 vcc->itf, vcc->vpi, vcc->vci,
1898 fore200e_traffic_class[ qos->txtp.traffic_class ],
1899 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
1900 fore200e_traffic_class[ qos->rxtp.traffic_class ],
1901 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
1902 flags, fore200e->available_cell_rate);
1903
1904 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
1905
1906 mutex_lock(&fore200e->rate_mtx);
1907 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
1908 mutex_unlock(&fore200e->rate_mtx);
1909 return -EAGAIN;
1910 }
1911
1912 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1913 fore200e->available_cell_rate -= qos->txtp.max_pcr;
1914
1915 mutex_unlock(&fore200e->rate_mtx);
1916
1917 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
1918
1919 /* update rate control parameters */
1920 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
1921
1922 set_bit(ATM_VF_HASQOS, &vcc->flags);
1923
1924 return 0;
1925 }
1926
1927 return -EINVAL;
1928}
1929
1930
1931static int fore200e_irq_request(struct fore200e *fore200e)
1932{
1933 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) {
1934
1935 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
1936 fore200e_irq_itoa(fore200e->irq), fore200e->name);
1937 return -EBUSY;
1938 }
1939
1940 printk(FORE200E "IRQ %s reserved for device %s\n",
1941 fore200e_irq_itoa(fore200e->irq), fore200e->name);
1942
1943#ifdef FORE200E_USE_TASKLET
1944 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
1945 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
1946#endif
1947
1948 fore200e->state = FORE200E_STATE_IRQ;
1949 return 0;
1950}
1951
1952
1953static int fore200e_get_esi(struct fore200e *fore200e)
1954{
1955 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL);
1956 int ok, i;
1957
1958 if (!prom)
1959 return -ENOMEM;
1960
1961 ok = fore200e->bus->prom_read(fore200e, prom);
1962 if (ok < 0) {
1963 kfree(prom);
1964 return -EBUSY;
1965 }
1966
1967 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n",
1968 fore200e->name,
1969 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
1970 prom->serial_number & 0xFFFF, &prom->mac_addr[2]);
1971
1972 for (i = 0; i < ESI_LEN; i++) {
1973 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
1974 }
1975
1976 kfree(prom);
1977
1978 return 0;
1979}
1980
1981
1982static int fore200e_alloc_rx_buf(struct fore200e *fore200e)
1983{
1984 int scheme, magn, nbr, size, i;
1985
1986 struct host_bsq* bsq;
1987 struct buffer* buffer;
1988
1989 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1990 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1991
1992 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1993
1994 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
1995 size = fore200e_rx_buf_size[ scheme ][ magn ];
1996
1997 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
1998
1999 /* allocate the array of receive buffers */
2000 buffer = bsq->buffer = kcalloc(nbr, sizeof(struct buffer),
2001 GFP_KERNEL);
2002
2003 if (buffer == NULL)
2004 return -ENOMEM;
2005
2006 bsq->freebuf = NULL;
2007
2008 for (i = 0; i < nbr; i++) {
2009
2010 buffer[ i ].scheme = scheme;
2011 buffer[ i ].magn = magn;
2012#ifdef FORE200E_BSQ_DEBUG
2013 buffer[ i ].index = i;
2014 buffer[ i ].supplied = 0;
2015#endif
2016
2017 /* allocate the receive buffer body */
2018 if (fore200e_chunk_alloc(fore200e,
2019 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2020 DMA_FROM_DEVICE) < 0) {
2021
2022 while (i > 0)
2023 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2024 kfree(buffer);
2025
2026 return -ENOMEM;
2027 }
2028
2029 /* insert the buffer into the free buffer list */
2030 buffer[ i ].next = bsq->freebuf;
2031 bsq->freebuf = &buffer[ i ];
2032 }
2033 /* all the buffers are free, initially */
2034 bsq->freebuf_count = nbr;
2035
2036#ifdef FORE200E_BSQ_DEBUG
2037 bsq_audit(3, bsq, scheme, magn);
2038#endif
2039 }
2040 }
2041
2042 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2043 return 0;
2044}
2045
2046
2047static int fore200e_init_bs_queue(struct fore200e *fore200e)
2048{
2049 int scheme, magn, i;
2050
2051 struct host_bsq* bsq;
2052 struct cp_bsq_entry __iomem * cp_entry;
2053
2054 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2055 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2056
2057 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2058
2059 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2060
2061 /* allocate and align the array of status words */
2062 if (fore200e_dma_chunk_alloc(fore200e,
2063 &bsq->status,
2064 sizeof(enum status),
2065 QUEUE_SIZE_BS,
2066 fore200e->bus->status_alignment) < 0) {
2067 return -ENOMEM;
2068 }
2069
2070 /* allocate and align the array of receive buffer descriptors */
2071 if (fore200e_dma_chunk_alloc(fore200e,
2072 &bsq->rbd_block,
2073 sizeof(struct rbd_block),
2074 QUEUE_SIZE_BS,
2075 fore200e->bus->descr_alignment) < 0) {
2076
2077 fore200e_dma_chunk_free(fore200e, &bsq->status);
2078 return -ENOMEM;
2079 }
2080
2081 /* get the base address of the cp resident buffer supply queue entries */
2082 cp_entry = fore200e->virt_base +
2083 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
2084
2085 /* fill the host resident and cp resident buffer supply queue entries */
2086 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2087
2088 bsq->host_entry[ i ].status =
2089 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2090 bsq->host_entry[ i ].rbd_block =
2091 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2092 bsq->host_entry[ i ].rbd_block_dma =
2093 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2094 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2095
2096 *bsq->host_entry[ i ].status = STATUS_FREE;
2097
2098 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2099 &cp_entry[ i ].status_haddr);
2100 }
2101 }
2102 }
2103
2104 fore200e->state = FORE200E_STATE_INIT_BSQ;
2105 return 0;
2106}
2107
2108
2109static int fore200e_init_rx_queue(struct fore200e *fore200e)
2110{
2111 struct host_rxq* rxq = &fore200e->host_rxq;
2112 struct cp_rxq_entry __iomem * cp_entry;
2113 int i;
2114
2115 DPRINTK(2, "receive queue is being initialized\n");
2116
2117 /* allocate and align the array of status words */
2118 if (fore200e_dma_chunk_alloc(fore200e,
2119 &rxq->status,
2120 sizeof(enum status),
2121 QUEUE_SIZE_RX,
2122 fore200e->bus->status_alignment) < 0) {
2123 return -ENOMEM;
2124 }
2125
2126 /* allocate and align the array of receive PDU descriptors */
2127 if (fore200e_dma_chunk_alloc(fore200e,
2128 &rxq->rpd,
2129 sizeof(struct rpd),
2130 QUEUE_SIZE_RX,
2131 fore200e->bus->descr_alignment) < 0) {
2132
2133 fore200e_dma_chunk_free(fore200e, &rxq->status);
2134 return -ENOMEM;
2135 }
2136
2137 /* get the base address of the cp resident rx queue entries */
2138 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
2139
2140 /* fill the host resident and cp resident rx entries */
2141 for (i=0; i < QUEUE_SIZE_RX; i++) {
2142
2143 rxq->host_entry[ i ].status =
2144 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2145 rxq->host_entry[ i ].rpd =
2146 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2147 rxq->host_entry[ i ].rpd_dma =
2148 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2149 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2150
2151 *rxq->host_entry[ i ].status = STATUS_FREE;
2152
2153 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2154 &cp_entry[ i ].status_haddr);
2155
2156 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2157 &cp_entry[ i ].rpd_haddr);
2158 }
2159
2160 /* set the head entry of the queue */
2161 rxq->head = 0;
2162
2163 fore200e->state = FORE200E_STATE_INIT_RXQ;
2164 return 0;
2165}
2166
2167
2168static int fore200e_init_tx_queue(struct fore200e *fore200e)
2169{
2170 struct host_txq* txq = &fore200e->host_txq;
2171 struct cp_txq_entry __iomem * cp_entry;
2172 int i;
2173
2174 DPRINTK(2, "transmit queue is being initialized\n");
2175
2176 /* allocate and align the array of status words */
2177 if (fore200e_dma_chunk_alloc(fore200e,
2178 &txq->status,
2179 sizeof(enum status),
2180 QUEUE_SIZE_TX,
2181 fore200e->bus->status_alignment) < 0) {
2182 return -ENOMEM;
2183 }
2184
2185 /* allocate and align the array of transmit PDU descriptors */
2186 if (fore200e_dma_chunk_alloc(fore200e,
2187 &txq->tpd,
2188 sizeof(struct tpd),
2189 QUEUE_SIZE_TX,
2190 fore200e->bus->descr_alignment) < 0) {
2191
2192 fore200e_dma_chunk_free(fore200e, &txq->status);
2193 return -ENOMEM;
2194 }
2195
2196 /* get the base address of the cp resident tx queue entries */
2197 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
2198
2199 /* fill the host resident and cp resident tx entries */
2200 for (i=0; i < QUEUE_SIZE_TX; i++) {
2201
2202 txq->host_entry[ i ].status =
2203 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2204 txq->host_entry[ i ].tpd =
2205 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2206 txq->host_entry[ i ].tpd_dma =
2207 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2208 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2209
2210 *txq->host_entry[ i ].status = STATUS_FREE;
2211
2212 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2213 &cp_entry[ i ].status_haddr);
2214
2215 /* although there is a one-to-one mapping of tx queue entries and tpds,
2216 we do not write here the DMA (physical) base address of each tpd into
2217 the related cp resident entry, because the cp relies on this write
2218 operation to detect that a new pdu has been submitted for tx */
2219 }
2220
2221 /* set the head and tail entries of the queue */
2222 txq->head = 0;
2223 txq->tail = 0;
2224
2225 fore200e->state = FORE200E_STATE_INIT_TXQ;
2226 return 0;
2227}
2228
2229
2230static int fore200e_init_cmd_queue(struct fore200e *fore200e)
2231{
2232 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2233 struct cp_cmdq_entry __iomem * cp_entry;
2234 int i;
2235
2236 DPRINTK(2, "command queue is being initialized\n");
2237
2238 /* allocate and align the array of status words */
2239 if (fore200e_dma_chunk_alloc(fore200e,
2240 &cmdq->status,
2241 sizeof(enum status),
2242 QUEUE_SIZE_CMD,
2243 fore200e->bus->status_alignment) < 0) {
2244 return -ENOMEM;
2245 }
2246
2247 /* get the base address of the cp resident cmd queue entries */
2248 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
2249
2250 /* fill the host resident and cp resident cmd entries */
2251 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2252
2253 cmdq->host_entry[ i ].status =
2254 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2255 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2256
2257 *cmdq->host_entry[ i ].status = STATUS_FREE;
2258
2259 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2260 &cp_entry[ i ].status_haddr);
2261 }
2262
2263 /* set the head entry of the queue */
2264 cmdq->head = 0;
2265
2266 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2267 return 0;
2268}
2269
2270
2271static void fore200e_param_bs_queue(struct fore200e *fore200e,
2272 enum buffer_scheme scheme,
2273 enum buffer_magn magn, int queue_length,
2274 int pool_size, int supply_blksize)
2275{
2276 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2277
2278 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2279 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2280 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2281 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2282}
2283
2284
2285static int fore200e_initialize(struct fore200e *fore200e)
2286{
2287 struct cp_queues __iomem * cpq;
2288 int ok, scheme, magn;
2289
2290 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2291
2292 mutex_init(&fore200e->rate_mtx);
2293 spin_lock_init(&fore200e->q_lock);
2294
2295 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
2296
2297 /* enable cp to host interrupts */
2298 fore200e->bus->write(1, &cpq->imask);
2299
2300 if (fore200e->bus->irq_enable)
2301 fore200e->bus->irq_enable(fore200e);
2302
2303 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2304
2305 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2306 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2307 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2308
2309 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2310 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2311
2312 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2313 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2314 fore200e_param_bs_queue(fore200e, scheme, magn,
2315 QUEUE_SIZE_BS,
2316 fore200e_rx_buf_nbr[ scheme ][ magn ],
2317 RBD_BLK_SIZE);
2318
2319 /* issue the initialize command */
2320 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2321 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2322
2323 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2324 if (ok == 0) {
2325 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2326 return -ENODEV;
2327 }
2328
2329 printk(FORE200E "device %s initialized\n", fore200e->name);
2330
2331 fore200e->state = FORE200E_STATE_INITIALIZE;
2332 return 0;
2333}
2334
2335
2336static void fore200e_monitor_putc(struct fore200e *fore200e, char c)
2337{
2338 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2339
2340#if 0
2341 printk("%c", c);
2342#endif
2343 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2344}
2345
2346
2347static int fore200e_monitor_getc(struct fore200e *fore200e)
2348{
2349 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2350 unsigned long timeout = jiffies + msecs_to_jiffies(50);
2351 int c;
2352
2353 while (time_before(jiffies, timeout)) {
2354
2355 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2356
2357 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2358
2359 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2360#if 0
2361 printk("%c", c & 0xFF);
2362#endif
2363 return c & 0xFF;
2364 }
2365 }
2366
2367 return -1;
2368}
2369
2370
2371static void fore200e_monitor_puts(struct fore200e *fore200e, char *str)
2372{
2373 while (*str) {
2374
2375 /* the i960 monitor doesn't accept any new character if it has something to say */
2376 while (fore200e_monitor_getc(fore200e) >= 0);
2377
2378 fore200e_monitor_putc(fore200e, *str++);
2379 }
2380
2381 while (fore200e_monitor_getc(fore200e) >= 0);
2382}
2383
2384#ifdef __LITTLE_ENDIAN
2385#define FW_EXT ".bin"
2386#else
2387#define FW_EXT "_ecd.bin2"
2388#endif
2389
2390static int fore200e_load_and_start_fw(struct fore200e *fore200e)
2391{
2392 const struct firmware *firmware;
2393 const struct fw_header *fw_header;
2394 const __le32 *fw_data;
2395 u32 fw_size;
2396 u32 __iomem *load_addr;
2397 char buf[48];
2398 int err;
2399
2400 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
2401 if ((err = request_firmware(&firmware, buf, fore200e->dev)) < 0) {
2402 printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name);
2403 return err;
2404 }
2405
2406 fw_data = (const __le32 *)firmware->data;
2407 fw_size = firmware->size / sizeof(u32);
2408 fw_header = (const struct fw_header *)firmware->data;
2409 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2410
2411 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2412 fore200e->name, load_addr, fw_size);
2413
2414 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2415 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2416 goto release;
2417 }
2418
2419 for (; fw_size--; fw_data++, load_addr++)
2420 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2421
2422 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2423
2424#if defined(__sparc_v9__)
2425 /* reported to be required by SBA cards on some sparc64 hosts */
2426 fore200e_spin(100);
2427#endif
2428
2429 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2430 fore200e_monitor_puts(fore200e, buf);
2431
2432 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) {
2433 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2434 goto release;
2435 }
2436
2437 printk(FORE200E "device %s firmware started\n", fore200e->name);
2438
2439 fore200e->state = FORE200E_STATE_START_FW;
2440 err = 0;
2441
2442release:
2443 release_firmware(firmware);
2444 return err;
2445}
2446
2447
2448static int fore200e_register(struct fore200e *fore200e, struct device *parent)
2449{
2450 struct atm_dev* atm_dev;
2451
2452 DPRINTK(2, "device %s being registered\n", fore200e->name);
2453
2454 atm_dev = atm_dev_register(fore200e->bus->proc_name, parent, &fore200e_ops,
2455 -1, NULL);
2456 if (atm_dev == NULL) {
2457 printk(FORE200E "unable to register device %s\n", fore200e->name);
2458 return -ENODEV;
2459 }
2460
2461 atm_dev->dev_data = fore200e;
2462 fore200e->atm_dev = atm_dev;
2463
2464 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2465 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2466
2467 fore200e->available_cell_rate = ATM_OC3_PCR;
2468
2469 fore200e->state = FORE200E_STATE_REGISTER;
2470 return 0;
2471}
2472
2473
2474static int fore200e_init(struct fore200e *fore200e, struct device *parent)
2475{
2476 if (fore200e_register(fore200e, parent) < 0)
2477 return -ENODEV;
2478
2479 if (fore200e->bus->configure(fore200e) < 0)
2480 return -ENODEV;
2481
2482 if (fore200e->bus->map(fore200e) < 0)
2483 return -ENODEV;
2484
2485 if (fore200e_reset(fore200e, 1) < 0)
2486 return -ENODEV;
2487
2488 if (fore200e_load_and_start_fw(fore200e) < 0)
2489 return -ENODEV;
2490
2491 if (fore200e_initialize(fore200e) < 0)
2492 return -ENODEV;
2493
2494 if (fore200e_init_cmd_queue(fore200e) < 0)
2495 return -ENOMEM;
2496
2497 if (fore200e_init_tx_queue(fore200e) < 0)
2498 return -ENOMEM;
2499
2500 if (fore200e_init_rx_queue(fore200e) < 0)
2501 return -ENOMEM;
2502
2503 if (fore200e_init_bs_queue(fore200e) < 0)
2504 return -ENOMEM;
2505
2506 if (fore200e_alloc_rx_buf(fore200e) < 0)
2507 return -ENOMEM;
2508
2509 if (fore200e_get_esi(fore200e) < 0)
2510 return -EIO;
2511
2512 if (fore200e_irq_request(fore200e) < 0)
2513 return -EBUSY;
2514
2515 fore200e_supply(fore200e);
2516
2517 /* all done, board initialization is now complete */
2518 fore200e->state = FORE200E_STATE_COMPLETE;
2519 return 0;
2520}
2521
2522#ifdef CONFIG_SBUS
2523static const struct of_device_id fore200e_sba_match[];
2524static int fore200e_sba_probe(struct platform_device *op)
2525{
2526 const struct of_device_id *match;
2527 struct fore200e *fore200e;
2528 static int index = 0;
2529 int err;
2530
2531 match = of_match_device(fore200e_sba_match, &op->dev);
2532 if (!match)
2533 return -EINVAL;
2534
2535 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2536 if (!fore200e)
2537 return -ENOMEM;
2538
2539 fore200e->bus = &fore200e_sbus_ops;
2540 fore200e->dev = &op->dev;
2541 fore200e->irq = op->archdata.irqs[0];
2542 fore200e->phys_base = op->resource[0].start;
2543
2544 sprintf(fore200e->name, "SBA-200E-%d", index);
2545
2546 err = fore200e_init(fore200e, &op->dev);
2547 if (err < 0) {
2548 fore200e_shutdown(fore200e);
2549 kfree(fore200e);
2550 return err;
2551 }
2552
2553 index++;
2554 dev_set_drvdata(&op->dev, fore200e);
2555
2556 return 0;
2557}
2558
2559static int fore200e_sba_remove(struct platform_device *op)
2560{
2561 struct fore200e *fore200e = dev_get_drvdata(&op->dev);
2562
2563 fore200e_shutdown(fore200e);
2564 kfree(fore200e);
2565
2566 return 0;
2567}
2568
2569static const struct of_device_id fore200e_sba_match[] = {
2570 {
2571 .name = SBA200E_PROM_NAME,
2572 },
2573 {},
2574};
2575MODULE_DEVICE_TABLE(of, fore200e_sba_match);
2576
2577static struct platform_driver fore200e_sba_driver = {
2578 .driver = {
2579 .name = "fore_200e",
2580 .of_match_table = fore200e_sba_match,
2581 },
2582 .probe = fore200e_sba_probe,
2583 .remove = fore200e_sba_remove,
2584};
2585#endif
2586
2587#ifdef CONFIG_PCI
2588static int fore200e_pca_detect(struct pci_dev *pci_dev,
2589 const struct pci_device_id *pci_ent)
2590{
2591 struct fore200e* fore200e;
2592 int err = 0;
2593 static int index = 0;
2594
2595 if (pci_enable_device(pci_dev)) {
2596 err = -EINVAL;
2597 goto out;
2598 }
2599
2600 if (dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32))) {
2601 err = -EINVAL;
2602 goto out;
2603 }
2604
2605 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2606 if (fore200e == NULL) {
2607 err = -ENOMEM;
2608 goto out_disable;
2609 }
2610
2611 fore200e->bus = &fore200e_pci_ops;
2612 fore200e->dev = &pci_dev->dev;
2613 fore200e->irq = pci_dev->irq;
2614 fore200e->phys_base = pci_resource_start(pci_dev, 0);
2615
2616 sprintf(fore200e->name, "PCA-200E-%d", index - 1);
2617
2618 pci_set_master(pci_dev);
2619
2620 printk(FORE200E "device PCA-200E found at 0x%lx, IRQ %s\n",
2621 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2622
2623 sprintf(fore200e->name, "PCA-200E-%d", index);
2624
2625 err = fore200e_init(fore200e, &pci_dev->dev);
2626 if (err < 0) {
2627 fore200e_shutdown(fore200e);
2628 goto out_free;
2629 }
2630
2631 ++index;
2632 pci_set_drvdata(pci_dev, fore200e);
2633
2634out:
2635 return err;
2636
2637out_free:
2638 kfree(fore200e);
2639out_disable:
2640 pci_disable_device(pci_dev);
2641 goto out;
2642}
2643
2644
2645static void fore200e_pca_remove_one(struct pci_dev *pci_dev)
2646{
2647 struct fore200e *fore200e;
2648
2649 fore200e = pci_get_drvdata(pci_dev);
2650
2651 fore200e_shutdown(fore200e);
2652 kfree(fore200e);
2653 pci_disable_device(pci_dev);
2654}
2655
2656
2657static const struct pci_device_id fore200e_pca_tbl[] = {
2658 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID },
2659 { 0, }
2660};
2661
2662MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl);
2663
2664static struct pci_driver fore200e_pca_driver = {
2665 .name = "fore_200e",
2666 .probe = fore200e_pca_detect,
2667 .remove = fore200e_pca_remove_one,
2668 .id_table = fore200e_pca_tbl,
2669};
2670#endif
2671
2672static int __init fore200e_module_init(void)
2673{
2674 int err = 0;
2675
2676 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2677
2678#ifdef CONFIG_SBUS
2679 err = platform_driver_register(&fore200e_sba_driver);
2680 if (err)
2681 return err;
2682#endif
2683
2684#ifdef CONFIG_PCI
2685 err = pci_register_driver(&fore200e_pca_driver);
2686#endif
2687
2688#ifdef CONFIG_SBUS
2689 if (err)
2690 platform_driver_unregister(&fore200e_sba_driver);
2691#endif
2692
2693 return err;
2694}
2695
2696static void __exit fore200e_module_cleanup(void)
2697{
2698#ifdef CONFIG_PCI
2699 pci_unregister_driver(&fore200e_pca_driver);
2700#endif
2701#ifdef CONFIG_SBUS
2702 platform_driver_unregister(&fore200e_sba_driver);
2703#endif
2704}
2705
2706static int
2707fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2708{
2709 struct fore200e* fore200e = FORE200E_DEV(dev);
2710 struct fore200e_vcc* fore200e_vcc;
2711 struct atm_vcc* vcc;
2712 int i, len, left = *pos;
2713 unsigned long flags;
2714
2715 if (!left--) {
2716
2717 if (fore200e_getstats(fore200e) < 0)
2718 return -EIO;
2719
2720 len = sprintf(page,"\n"
2721 " device:\n"
2722 " internal name:\t\t%s\n", fore200e->name);
2723
2724 /* print bus-specific information */
2725 if (fore200e->bus->proc_read)
2726 len += fore200e->bus->proc_read(fore200e, page + len);
2727
2728 len += sprintf(page + len,
2729 " interrupt line:\t\t%s\n"
2730 " physical base address:\t0x%p\n"
2731 " virtual base address:\t0x%p\n"
2732 " factory address (ESI):\t%pM\n"
2733 " board serial number:\t\t%d\n\n",
2734 fore200e_irq_itoa(fore200e->irq),
2735 (void*)fore200e->phys_base,
2736 fore200e->virt_base,
2737 fore200e->esi,
2738 fore200e->esi[4] * 256 + fore200e->esi[5]);
2739
2740 return len;
2741 }
2742
2743 if (!left--)
2744 return sprintf(page,
2745 " free small bufs, scheme 1:\t%d\n"
2746 " free large bufs, scheme 1:\t%d\n"
2747 " free small bufs, scheme 2:\t%d\n"
2748 " free large bufs, scheme 2:\t%d\n",
2749 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2750 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2751 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2752 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2753
2754 if (!left--) {
2755 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2756
2757 len = sprintf(page,"\n\n"
2758 " cell processor:\n"
2759 " heartbeat state:\t\t");
2760
2761 if (hb >> 16 != 0xDEAD)
2762 len += sprintf(page + len, "0x%08x\n", hb);
2763 else
2764 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2765
2766 return len;
2767 }
2768
2769 if (!left--) {
2770 static const char* media_name[] = {
2771 "unshielded twisted pair",
2772 "multimode optical fiber ST",
2773 "multimode optical fiber SC",
2774 "single-mode optical fiber ST",
2775 "single-mode optical fiber SC",
2776 "unknown"
2777 };
2778
2779 static const char* oc3_mode[] = {
2780 "normal operation",
2781 "diagnostic loopback",
2782 "line loopback",
2783 "unknown"
2784 };
2785
2786 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2787 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2788 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2789 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2790 u32 oc3_index;
2791
2792 if (media_index > 4)
2793 media_index = 5;
2794
2795 switch (fore200e->loop_mode) {
2796 case ATM_LM_NONE: oc3_index = 0;
2797 break;
2798 case ATM_LM_LOC_PHY: oc3_index = 1;
2799 break;
2800 case ATM_LM_RMT_PHY: oc3_index = 2;
2801 break;
2802 default: oc3_index = 3;
2803 }
2804
2805 return sprintf(page,
2806 " firmware release:\t\t%d.%d.%d\n"
2807 " monitor release:\t\t%d.%d\n"
2808 " media type:\t\t\t%s\n"
2809 " OC-3 revision:\t\t0x%x\n"
2810 " OC-3 mode:\t\t\t%s",
2811 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2812 mon960_release >> 16, mon960_release << 16 >> 16,
2813 media_name[ media_index ],
2814 oc3_revision,
2815 oc3_mode[ oc3_index ]);
2816 }
2817
2818 if (!left--) {
2819 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
2820
2821 return sprintf(page,
2822 "\n\n"
2823 " monitor:\n"
2824 " version number:\t\t%d\n"
2825 " boot status word:\t\t0x%08x\n",
2826 fore200e->bus->read(&cp_monitor->mon_version),
2827 fore200e->bus->read(&cp_monitor->bstat));
2828 }
2829
2830 if (!left--)
2831 return sprintf(page,
2832 "\n"
2833 " device statistics:\n"
2834 " 4b5b:\n"
2835 " crc_header_errors:\t\t%10u\n"
2836 " framing_errors:\t\t%10u\n",
2837 be32_to_cpu(fore200e->stats->phy.crc_header_errors),
2838 be32_to_cpu(fore200e->stats->phy.framing_errors));
2839
2840 if (!left--)
2841 return sprintf(page, "\n"
2842 " OC-3:\n"
2843 " section_bip8_errors:\t%10u\n"
2844 " path_bip8_errors:\t\t%10u\n"
2845 " line_bip24_errors:\t\t%10u\n"
2846 " line_febe_errors:\t\t%10u\n"
2847 " path_febe_errors:\t\t%10u\n"
2848 " corr_hcs_errors:\t\t%10u\n"
2849 " ucorr_hcs_errors:\t\t%10u\n",
2850 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors),
2851 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors),
2852 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors),
2853 be32_to_cpu(fore200e->stats->oc3.line_febe_errors),
2854 be32_to_cpu(fore200e->stats->oc3.path_febe_errors),
2855 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors),
2856 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors));
2857
2858 if (!left--)
2859 return sprintf(page,"\n"
2860 " ATM:\t\t\t\t cells\n"
2861 " TX:\t\t\t%10u\n"
2862 " RX:\t\t\t%10u\n"
2863 " vpi out of range:\t\t%10u\n"
2864 " vpi no conn:\t\t%10u\n"
2865 " vci out of range:\t\t%10u\n"
2866 " vci no conn:\t\t%10u\n",
2867 be32_to_cpu(fore200e->stats->atm.cells_transmitted),
2868 be32_to_cpu(fore200e->stats->atm.cells_received),
2869 be32_to_cpu(fore200e->stats->atm.vpi_bad_range),
2870 be32_to_cpu(fore200e->stats->atm.vpi_no_conn),
2871 be32_to_cpu(fore200e->stats->atm.vci_bad_range),
2872 be32_to_cpu(fore200e->stats->atm.vci_no_conn));
2873
2874 if (!left--)
2875 return sprintf(page,"\n"
2876 " AAL0:\t\t\t cells\n"
2877 " TX:\t\t\t%10u\n"
2878 " RX:\t\t\t%10u\n"
2879 " dropped:\t\t\t%10u\n",
2880 be32_to_cpu(fore200e->stats->aal0.cells_transmitted),
2881 be32_to_cpu(fore200e->stats->aal0.cells_received),
2882 be32_to_cpu(fore200e->stats->aal0.cells_dropped));
2883
2884 if (!left--)
2885 return sprintf(page,"\n"
2886 " AAL3/4:\n"
2887 " SAR sublayer:\t\t cells\n"
2888 " TX:\t\t\t%10u\n"
2889 " RX:\t\t\t%10u\n"
2890 " dropped:\t\t\t%10u\n"
2891 " CRC errors:\t\t%10u\n"
2892 " protocol errors:\t\t%10u\n\n"
2893 " CS sublayer:\t\t PDUs\n"
2894 " TX:\t\t\t%10u\n"
2895 " RX:\t\t\t%10u\n"
2896 " dropped:\t\t\t%10u\n"
2897 " protocol errors:\t\t%10u\n",
2898 be32_to_cpu(fore200e->stats->aal34.cells_transmitted),
2899 be32_to_cpu(fore200e->stats->aal34.cells_received),
2900 be32_to_cpu(fore200e->stats->aal34.cells_dropped),
2901 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors),
2902 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors),
2903 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted),
2904 be32_to_cpu(fore200e->stats->aal34.cspdus_received),
2905 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped),
2906 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors));
2907
2908 if (!left--)
2909 return sprintf(page,"\n"
2910 " AAL5:\n"
2911 " SAR sublayer:\t\t cells\n"
2912 " TX:\t\t\t%10u\n"
2913 " RX:\t\t\t%10u\n"
2914 " dropped:\t\t\t%10u\n"
2915 " congestions:\t\t%10u\n\n"
2916 " CS sublayer:\t\t PDUs\n"
2917 " TX:\t\t\t%10u\n"
2918 " RX:\t\t\t%10u\n"
2919 " dropped:\t\t\t%10u\n"
2920 " CRC errors:\t\t%10u\n"
2921 " protocol errors:\t\t%10u\n",
2922 be32_to_cpu(fore200e->stats->aal5.cells_transmitted),
2923 be32_to_cpu(fore200e->stats->aal5.cells_received),
2924 be32_to_cpu(fore200e->stats->aal5.cells_dropped),
2925 be32_to_cpu(fore200e->stats->aal5.congestion_experienced),
2926 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted),
2927 be32_to_cpu(fore200e->stats->aal5.cspdus_received),
2928 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped),
2929 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors),
2930 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors));
2931
2932 if (!left--)
2933 return sprintf(page,"\n"
2934 " AUX:\t\t allocation failures\n"
2935 " small b1:\t\t\t%10u\n"
2936 " large b1:\t\t\t%10u\n"
2937 " small b2:\t\t\t%10u\n"
2938 " large b2:\t\t\t%10u\n"
2939 " RX PDUs:\t\t\t%10u\n"
2940 " TX PDUs:\t\t\t%10lu\n",
2941 be32_to_cpu(fore200e->stats->aux.small_b1_failed),
2942 be32_to_cpu(fore200e->stats->aux.large_b1_failed),
2943 be32_to_cpu(fore200e->stats->aux.small_b2_failed),
2944 be32_to_cpu(fore200e->stats->aux.large_b2_failed),
2945 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed),
2946 fore200e->tx_sat);
2947
2948 if (!left--)
2949 return sprintf(page,"\n"
2950 " receive carrier:\t\t\t%s\n",
2951 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
2952
2953 if (!left--) {
2954 return sprintf(page,"\n"
2955 " VCCs:\n address VPI VCI AAL "
2956 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
2957 }
2958
2959 for (i = 0; i < NBR_CONNECT; i++) {
2960
2961 vcc = fore200e->vc_map[i].vcc;
2962
2963 if (vcc == NULL)
2964 continue;
2965
2966 spin_lock_irqsave(&fore200e->q_lock, flags);
2967
2968 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
2969
2970 fore200e_vcc = FORE200E_VCC(vcc);
2971 ASSERT(fore200e_vcc);
2972
2973 len = sprintf(page,
2974 " %pK %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
2975 vcc,
2976 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
2977 fore200e_vcc->tx_pdu,
2978 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
2979 fore200e_vcc->tx_max_pdu,
2980 fore200e_vcc->rx_pdu,
2981 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
2982 fore200e_vcc->rx_max_pdu);
2983
2984 spin_unlock_irqrestore(&fore200e->q_lock, flags);
2985 return len;
2986 }
2987
2988 spin_unlock_irqrestore(&fore200e->q_lock, flags);
2989 }
2990
2991 return 0;
2992}
2993
2994module_init(fore200e_module_init);
2995module_exit(fore200e_module_cleanup);
2996
2997
2998static const struct atmdev_ops fore200e_ops = {
2999 .open = fore200e_open,
3000 .close = fore200e_close,
3001 .ioctl = fore200e_ioctl,
3002 .send = fore200e_send,
3003 .change_qos = fore200e_change_qos,
3004 .proc_read = fore200e_proc_read,
3005 .owner = THIS_MODULE
3006};
3007
3008MODULE_LICENSE("GPL");
3009#ifdef CONFIG_PCI
3010#ifdef __LITTLE_ENDIAN__
3011MODULE_FIRMWARE("pca200e.bin");
3012#else
3013MODULE_FIRMWARE("pca200e_ecd.bin2");
3014#endif
3015#endif /* CONFIG_PCI */
3016#ifdef CONFIG_SBUS
3017MODULE_FIRMWARE("sba200e_ecd.bin2");
3018#endif