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v3.1
 
  1/*
  2 * SPI master driver using generic bitbanged GPIO
  3 *
  4 * Copyright (C) 2006,2008 David Brownell
  5 *
  6 * This program is free software; you can redistribute it and/or modify
  7 * it under the terms of the GNU General Public License as published by
  8 * the Free Software Foundation; either version 2 of the License, or
  9 * (at your option) any later version.
 10 *
 11 * This program is distributed in the hope that it will be useful,
 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 14 * GNU General Public License for more details.
 15 *
 16 * You should have received a copy of the GNU General Public License
 17 * along with this program; if not, write to the Free Software
 18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 19 */
 
 20#include <linux/kernel.h>
 21#include <linux/init.h>
 
 22#include <linux/platform_device.h>
 23#include <linux/gpio.h>
 24
 25#include <linux/spi/spi.h>
 26#include <linux/spi/spi_bitbang.h>
 27#include <linux/spi/spi_gpio.h>
 28
 29
 30/*
 31 * This bitbanging SPI master driver should help make systems usable
 32 * when a native hardware SPI engine is not available, perhaps because
 33 * its driver isn't yet working or because the I/O pins it requires
 34 * are used for other purposes.
 35 *
 36 * platform_device->driver_data ... points to spi_gpio
 37 *
 38 * spi->controller_state ... reserved for bitbang framework code
 39 * spi->controller_data ... holds chipselect GPIO
 40 *
 41 * spi->master->dev.driver_data ... points to spi_gpio->bitbang
 42 */
 43
 44struct spi_gpio {
 45	struct spi_bitbang		bitbang;
 46	struct spi_gpio_platform_data	pdata;
 47	struct platform_device		*pdev;
 
 
 48};
 49
 50/*----------------------------------------------------------------------*/
 51
 52/*
 53 * Because the overhead of going through four GPIO procedure calls
 54 * per transferred bit can make performance a problem, this code
 55 * is set up so that you can use it in either of two ways:
 56 *
 57 *   - The slow generic way:  set up platform_data to hold the GPIO
 58 *     numbers used for MISO/MOSI/SCK, and issue procedure calls for
 59 *     each of them.  This driver can handle several such busses.
 60 *
 61 *   - The quicker inlined way:  only helps with platform GPIO code
 62 *     that inlines operations for constant GPIOs.  This can give
 63 *     you tight (fast!) inner loops, but each such bus needs a
 64 *     new driver.  You'll define a new C file, with Makefile and
 65 *     Kconfig support; the C code can be a total of six lines:
 66 *
 67 *		#define DRIVER_NAME	"myboard_spi2"
 68 *		#define	SPI_MISO_GPIO	119
 69 *		#define	SPI_MOSI_GPIO	120
 70 *		#define	SPI_SCK_GPIO	121
 71 *		#define	SPI_N_CHIPSEL	4
 72 *		#include "spi-gpio.c"
 73 */
 74
 75#ifndef DRIVER_NAME
 76#define DRIVER_NAME	"spi_gpio"
 77
 78#define GENERIC_BITBANG	/* vs tight inlines */
 79
 80/* all functions referencing these symbols must define pdata */
 81#define SPI_MISO_GPIO	((pdata)->miso)
 82#define SPI_MOSI_GPIO	((pdata)->mosi)
 83#define SPI_SCK_GPIO	((pdata)->sck)
 84
 85#define SPI_N_CHIPSEL	((pdata)->num_chipselect)
 86
 87#endif
 88
 89/*----------------------------------------------------------------------*/
 90
 91static inline const struct spi_gpio_platform_data * __pure
 92spi_to_pdata(const struct spi_device *spi)
 93{
 94	const struct spi_bitbang	*bang;
 95	const struct spi_gpio		*spi_gpio;
 96
 97	bang = spi_master_get_devdata(spi->master);
 98	spi_gpio = container_of(bang, struct spi_gpio, bitbang);
 99	return &spi_gpio->pdata;
100}
101
102/* this is #defined to avoid unused-variable warnings when inlining */
103#define pdata		spi_to_pdata(spi)
104
105static inline void setsck(const struct spi_device *spi, int is_on)
106{
107	gpio_set_value(SPI_SCK_GPIO, is_on);
 
 
108}
109
110static inline void setmosi(const struct spi_device *spi, int is_on)
111{
112	gpio_set_value(SPI_MOSI_GPIO, is_on);
 
 
113}
114
115static inline int getmiso(const struct spi_device *spi)
116{
117	return !!gpio_get_value(SPI_MISO_GPIO);
118}
119
120#undef pdata
 
 
 
 
121
122/*
123 * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
124 * requested device clock.  Software overhead means we usually have trouble
125 * reaching even one Mbit/sec (except when we can inline bitops), so for now
126 * we'll just assume we never need additional per-bit slowdowns.
127 */
128#define spidelay(nsecs)	do {} while (0)
129
130#include "spi-bitbang-txrx.h"
131
132/*
133 * These functions can leverage inline expansion of GPIO calls to shrink
134 * costs for a txrx bit, often by factors of around ten (by instruction
135 * count).  That is particularly visible for larger word sizes, but helps
136 * even with default 8-bit words.
137 *
138 * REVISIT overheads calling these functions for each word also have
139 * significant performance costs.  Having txrx_bufs() calls that inline
140 * the txrx_word() logic would help performance, e.g. on larger blocks
141 * used with flash storage or MMC/SD.  There should also be ways to make
142 * GCC be less stupid about reloading registers inside the I/O loops,
143 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
144 */
145
146static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
147		unsigned nsecs, u32 word, u8 bits)
148{
149	return bitbang_txrx_be_cpha0(spi, nsecs, 0, 0, word, bits);
 
 
 
150}
151
152static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
153		unsigned nsecs, u32 word, u8 bits)
154{
155	return bitbang_txrx_be_cpha1(spi, nsecs, 0, 0, word, bits);
 
 
 
156}
157
158static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
159		unsigned nsecs, u32 word, u8 bits)
160{
161	return bitbang_txrx_be_cpha0(spi, nsecs, 1, 0, word, bits);
 
 
 
162}
163
164static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
165		unsigned nsecs, u32 word, u8 bits)
166{
167	return bitbang_txrx_be_cpha1(spi, nsecs, 1, 0, word, bits);
 
 
 
168}
169
170/*
171 * These functions do not call setmosi or getmiso if respective flag
172 * (SPI_MASTER_NO_RX or SPI_MASTER_NO_TX) is set, so they are safe to
173 * call when such pin is not present or defined in the controller.
174 * A separate set of callbacks is defined to get highest possible
175 * speed in the generic case (when both MISO and MOSI lines are
176 * available), as optimiser will remove the checks when argument is
177 * constant.
178 */
179
180static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
181		unsigned nsecs, u32 word, u8 bits)
182{
183	unsigned flags = spi->master->flags;
184	return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
 
 
 
185}
186
187static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
188		unsigned nsecs, u32 word, u8 bits)
189{
190	unsigned flags = spi->master->flags;
191	return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
 
 
 
192}
193
194static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
195		unsigned nsecs, u32 word, u8 bits)
196{
197	unsigned flags = spi->master->flags;
198	return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
 
 
 
199}
200
201static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
202		unsigned nsecs, u32 word, u8 bits)
203{
204	unsigned flags = spi->master->flags;
205	return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
 
 
 
206}
207
208/*----------------------------------------------------------------------*/
209
210static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
211{
212	unsigned long cs = (unsigned long) spi->controller_data;
213
214	/* set initial clock polarity */
215	if (is_active)
216		setsck(spi, spi->mode & SPI_CPOL);
217
218	if (cs != SPI_GPIO_NO_CHIPSELECT) {
219		/* SPI is normally active-low */
220		gpio_set_value(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
 
 
 
221	}
222}
223
224static int spi_gpio_setup(struct spi_device *spi)
225{
226	unsigned long	cs = (unsigned long) spi->controller_data;
227	int		status = 0;
228
229	if (spi->bits_per_word > 32)
230		return -EINVAL;
 
231
232	if (!spi->controller_state) {
233		if (cs != SPI_GPIO_NO_CHIPSELECT) {
234			status = gpio_request(cs, dev_name(&spi->dev));
235			if (status)
236				return status;
237			status = gpio_direction_output(cs, spi->mode & SPI_CS_HIGH);
 
 
 
 
 
 
 
 
 
 
238		}
239	}
240	if (!status)
241		status = spi_bitbang_setup(spi);
242	if (status) {
243		if (!spi->controller_state && cs != SPI_GPIO_NO_CHIPSELECT)
244			gpio_free(cs);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
245	}
246	return status;
247}
248
249static void spi_gpio_cleanup(struct spi_device *spi)
250{
251	unsigned long	cs = (unsigned long) spi->controller_data;
252
253	if (cs != SPI_GPIO_NO_CHIPSELECT)
254		gpio_free(cs);
255	spi_bitbang_cleanup(spi);
256}
257
258static int __init spi_gpio_alloc(unsigned pin, const char *label, bool is_in)
 
 
 
 
 
 
 
 
 
 
259{
260	int value;
 
 
261
262	value = gpio_request(pin, label);
263	if (value == 0) {
264		if (is_in)
265			value = gpio_direction_input(pin);
266		else
267			value = gpio_direction_output(pin, 0);
268	}
269	return value;
270}
271
272static int __init
273spi_gpio_request(struct spi_gpio_platform_data *pdata, const char *label,
274	u16 *res_flags)
275{
276	int value;
277
278	/* NOTE:  SPI_*_GPIO symbols may reference "pdata" */
279
280	if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI) {
281		value = spi_gpio_alloc(SPI_MOSI_GPIO, label, false);
282		if (value)
283			goto done;
284	} else {
285		/* HW configuration without MOSI pin */
286		*res_flags |= SPI_MASTER_NO_TX;
287	}
288
289	if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO) {
290		value = spi_gpio_alloc(SPI_MISO_GPIO, label, true);
291		if (value)
292			goto free_mosi;
293	} else {
294		/* HW configuration without MISO pin */
295		*res_flags |= SPI_MASTER_NO_RX;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
296	}
297
298	value = spi_gpio_alloc(SPI_SCK_GPIO, label, false);
299	if (value)
300		goto free_miso;
301
302	goto done;
303
304free_miso:
305	if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
306		gpio_free(SPI_MISO_GPIO);
307free_mosi:
308	if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
309		gpio_free(SPI_MOSI_GPIO);
310done:
311	return value;
312}
313
314static int __init spi_gpio_probe(struct platform_device *pdev)
315{
316	int				status;
317	struct spi_master		*master;
318	struct spi_gpio			*spi_gpio;
319	struct spi_gpio_platform_data	*pdata;
320	u16 master_flags = 0;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
321
322	pdata = pdev->dev.platform_data;
323#ifdef GENERIC_BITBANG
324	if (!pdata || !pdata->num_chipselect)
325		return -ENODEV;
326#endif
327
328	status = spi_gpio_request(pdata, dev_name(&pdev->dev), &master_flags);
329	if (status < 0)
330		return status;
331
332	master = spi_alloc_master(&pdev->dev, sizeof *spi_gpio);
333	if (!master) {
334		status = -ENOMEM;
335		goto gpio_free;
 
 
 
 
 
 
 
 
336	}
337	spi_gpio = spi_master_get_devdata(master);
338	platform_set_drvdata(pdev, spi_gpio);
339
340	spi_gpio->pdev = pdev;
341	if (pdata)
342		spi_gpio->pdata = *pdata;
343
344	master->flags = master_flags;
345	master->bus_num = pdev->id;
346	master->num_chipselect = SPI_N_CHIPSEL;
347	master->setup = spi_gpio_setup;
348	master->cleanup = spi_gpio_cleanup;
349
350	spi_gpio->bitbang.master = spi_master_get(master);
351	spi_gpio->bitbang.chipselect = spi_gpio_chipselect;
352
353	if ((master_flags & (SPI_MASTER_NO_TX | SPI_MASTER_NO_RX)) == 0) {
354		spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
355		spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
356		spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
357		spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
 
 
 
358	} else {
359		spi_gpio->bitbang.txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
360		spi_gpio->bitbang.txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
361		spi_gpio->bitbang.txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
362		spi_gpio->bitbang.txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
363	}
364	spi_gpio->bitbang.setup_transfer = spi_bitbang_setup_transfer;
365	spi_gpio->bitbang.flags = SPI_CS_HIGH;
366
367	status = spi_bitbang_start(&spi_gpio->bitbang);
368	if (status < 0) {
369		spi_master_put(spi_gpio->bitbang.master);
370gpio_free:
371		if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
372			gpio_free(SPI_MISO_GPIO);
373		if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
374			gpio_free(SPI_MOSI_GPIO);
375		gpio_free(SPI_SCK_GPIO);
376		spi_master_put(master);
377	}
378
379	return status;
380}
381
382static int __exit spi_gpio_remove(struct platform_device *pdev)
383{
384	struct spi_gpio			*spi_gpio;
385	struct spi_gpio_platform_data	*pdata;
386	int				status;
387
388	spi_gpio = platform_get_drvdata(pdev);
389	pdata = pdev->dev.platform_data;
390
391	/* stop() unregisters child devices too */
392	status = spi_bitbang_stop(&spi_gpio->bitbang);
393	spi_master_put(spi_gpio->bitbang.master);
394
395	platform_set_drvdata(pdev, NULL);
396
397	if (SPI_MISO_GPIO != SPI_GPIO_NO_MISO)
398		gpio_free(SPI_MISO_GPIO);
399	if (SPI_MOSI_GPIO != SPI_GPIO_NO_MOSI)
400		gpio_free(SPI_MOSI_GPIO);
401	gpio_free(SPI_SCK_GPIO);
402
403	return status;
404}
405
406MODULE_ALIAS("platform:" DRIVER_NAME);
407
408static struct platform_driver spi_gpio_driver = {
409	.driver.name	= DRIVER_NAME,
410	.driver.owner	= THIS_MODULE,
411	.remove		= __exit_p(spi_gpio_remove),
412};
 
413
414static int __init spi_gpio_init(void)
415{
416	return platform_driver_probe(&spi_gpio_driver, spi_gpio_probe);
417}
418module_init(spi_gpio_init);
419
420static void __exit spi_gpio_exit(void)
421{
422	platform_driver_unregister(&spi_gpio_driver);
423}
424module_exit(spi_gpio_exit);
425
426
427MODULE_DESCRIPTION("SPI master driver using generic bitbanged GPIO ");
428MODULE_AUTHOR("David Brownell");
429MODULE_LICENSE("GPL");
v6.13.7
  1// SPDX-License-Identifier: GPL-2.0-or-later
  2/*
  3 * SPI host driver using generic bitbanged GPIO
  4 *
  5 * Copyright (C) 2006,2008 David Brownell
  6 * Copyright (C) 2017 Linus Walleij
 
 
 
 
 
 
 
 
 
 
 
 
 
  7 */
  8#include <linux/gpio/consumer.h>
  9#include <linux/kernel.h>
 10#include <linux/mod_devicetable.h>
 11#include <linux/module.h>
 12#include <linux/platform_device.h>
 13#include <linux/property.h>
 14
 15#include <linux/spi/spi.h>
 16#include <linux/spi/spi_bitbang.h>
 17#include <linux/spi/spi_gpio.h>
 18
 
 19/*
 20 * This bitbanging SPI host driver should help make systems usable
 21 * when a native hardware SPI engine is not available, perhaps because
 22 * its driver isn't yet working or because the I/O pins it requires
 23 * are used for other purposes.
 24 *
 25 * platform_device->driver_data ... points to spi_gpio
 26 *
 27 * spi->controller_state ... reserved for bitbang framework code
 
 28 *
 29 * spi->controller->dev.driver_data ... points to spi_gpio->bitbang
 30 */
 31
 32struct spi_gpio {
 33	struct spi_bitbang		bitbang;
 34	struct gpio_desc		*sck;
 35	struct gpio_desc		*miso;
 36	struct gpio_desc		*mosi;
 37	struct gpio_desc		**cs_gpios;
 38};
 39
 40/*----------------------------------------------------------------------*/
 41
 42/*
 43 * Because the overhead of going through four GPIO procedure calls
 44 * per transferred bit can make performance a problem, this code
 45 * is set up so that you can use it in either of two ways:
 46 *
 47 *   - The slow generic way:  set up platform_data to hold the GPIO
 48 *     numbers used for MISO/MOSI/SCK, and issue procedure calls for
 49 *     each of them.  This driver can handle several such busses.
 50 *
 51 *   - The quicker inlined way:  only helps with platform GPIO code
 52 *     that inlines operations for constant GPIOs.  This can give
 53 *     you tight (fast!) inner loops, but each such bus needs a
 54 *     new driver.  You'll define a new C file, with Makefile and
 55 *     Kconfig support; the C code can be a total of six lines:
 56 *
 57 *		#define DRIVER_NAME	"myboard_spi2"
 58 *		#define	SPI_MISO_GPIO	119
 59 *		#define	SPI_MOSI_GPIO	120
 60 *		#define	SPI_SCK_GPIO	121
 61 *		#define	SPI_N_CHIPSEL	4
 62 *		#include "spi-gpio.c"
 63 */
 64
 65#ifndef DRIVER_NAME
 66#define DRIVER_NAME	"spi_gpio"
 67
 68#define GENERIC_BITBANG	/* vs tight inlines */
 69
 
 
 
 
 
 
 
 70#endif
 71
 72/*----------------------------------------------------------------------*/
 73
 74static inline struct spi_gpio *__pure
 75spi_to_spi_gpio(const struct spi_device *spi)
 76{
 77	const struct spi_bitbang	*bang;
 78	struct spi_gpio			*spi_gpio;
 79
 80	bang = spi_controller_get_devdata(spi->controller);
 81	spi_gpio = container_of(bang, struct spi_gpio, bitbang);
 82	return spi_gpio;
 83}
 84
 85/* These helpers are in turn called by the bitbang inlines */
 
 
 86static inline void setsck(const struct spi_device *spi, int is_on)
 87{
 88	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
 89
 90	gpiod_set_value_cansleep(spi_gpio->sck, is_on);
 91}
 92
 93static inline void setmosi(const struct spi_device *spi, int is_on)
 94{
 95	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
 96
 97	gpiod_set_value_cansleep(spi_gpio->mosi, is_on);
 98}
 99
100static inline int getmiso(const struct spi_device *spi)
101{
102	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
 
103
104	if (spi->mode & SPI_3WIRE)
105		return !!gpiod_get_value_cansleep(spi_gpio->mosi);
106	else
107		return !!gpiod_get_value_cansleep(spi_gpio->miso);
108}
109
110/*
111 * NOTE:  this clocks "as fast as we can".  It "should" be a function of the
112 * requested device clock.  Software overhead means we usually have trouble
113 * reaching even one Mbit/sec (except when we can inline bitops), so for now
114 * we'll just assume we never need additional per-bit slowdowns.
115 */
116#define spidelay(nsecs)	do {} while (0)
117
118#include "spi-bitbang-txrx.h"
119
120/*
121 * These functions can leverage inline expansion of GPIO calls to shrink
122 * costs for a txrx bit, often by factors of around ten (by instruction
123 * count).  That is particularly visible for larger word sizes, but helps
124 * even with default 8-bit words.
125 *
126 * REVISIT overheads calling these functions for each word also have
127 * significant performance costs.  Having txrx_bufs() calls that inline
128 * the txrx_word() logic would help performance, e.g. on larger blocks
129 * used with flash storage or MMC/SD.  There should also be ways to make
130 * GCC be less stupid about reloading registers inside the I/O loops,
131 * even without inlined GPIO calls; __attribute__((hot)) on GCC 4.3?
132 */
133
134static u32 spi_gpio_txrx_word_mode0(struct spi_device *spi,
135		unsigned nsecs, u32 word, u8 bits, unsigned flags)
136{
137	if (unlikely(spi->mode & SPI_LSB_FIRST))
138		return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
139	else
140		return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
141}
142
143static u32 spi_gpio_txrx_word_mode1(struct spi_device *spi,
144		unsigned nsecs, u32 word, u8 bits, unsigned flags)
145{
146	if (unlikely(spi->mode & SPI_LSB_FIRST))
147		return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
148	else
149		return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
150}
151
152static u32 spi_gpio_txrx_word_mode2(struct spi_device *spi,
153		unsigned nsecs, u32 word, u8 bits, unsigned flags)
154{
155	if (unlikely(spi->mode & SPI_LSB_FIRST))
156		return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
157	else
158		return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
159}
160
161static u32 spi_gpio_txrx_word_mode3(struct spi_device *spi,
162		unsigned nsecs, u32 word, u8 bits, unsigned flags)
163{
164	if (unlikely(spi->mode & SPI_LSB_FIRST))
165		return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
166	else
167		return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
168}
169
170/*
171 * These functions do not call setmosi or getmiso if respective flag
172 * (SPI_CONTROLLER_NO_RX or SPI_CONTROLLER_NO_TX) is set, so they are safe to
173 * call when such pin is not present or defined in the controller.
174 * A separate set of callbacks is defined to get highest possible
175 * speed in the generic case (when both MISO and MOSI lines are
176 * available), as optimiser will remove the checks when argument is
177 * constant.
178 */
179
180static u32 spi_gpio_spec_txrx_word_mode0(struct spi_device *spi,
181		unsigned nsecs, u32 word, u8 bits, unsigned flags)
182{
183	flags = spi->controller->flags;
184	if (unlikely(spi->mode & SPI_LSB_FIRST))
185		return bitbang_txrx_le_cpha0(spi, nsecs, 0, flags, word, bits);
186	else
187		return bitbang_txrx_be_cpha0(spi, nsecs, 0, flags, word, bits);
188}
189
190static u32 spi_gpio_spec_txrx_word_mode1(struct spi_device *spi,
191		unsigned nsecs, u32 word, u8 bits, unsigned flags)
192{
193	flags = spi->controller->flags;
194	if (unlikely(spi->mode & SPI_LSB_FIRST))
195		return bitbang_txrx_le_cpha1(spi, nsecs, 0, flags, word, bits);
196	else
197		return bitbang_txrx_be_cpha1(spi, nsecs, 0, flags, word, bits);
198}
199
200static u32 spi_gpio_spec_txrx_word_mode2(struct spi_device *spi,
201		unsigned nsecs, u32 word, u8 bits, unsigned flags)
202{
203	flags = spi->controller->flags;
204	if (unlikely(spi->mode & SPI_LSB_FIRST))
205		return bitbang_txrx_le_cpha0(spi, nsecs, 1, flags, word, bits);
206	else
207		return bitbang_txrx_be_cpha0(spi, nsecs, 1, flags, word, bits);
208}
209
210static u32 spi_gpio_spec_txrx_word_mode3(struct spi_device *spi,
211		unsigned nsecs, u32 word, u8 bits, unsigned flags)
212{
213	flags = spi->controller->flags;
214	if (unlikely(spi->mode & SPI_LSB_FIRST))
215		return bitbang_txrx_le_cpha1(spi, nsecs, 1, flags, word, bits);
216	else
217		return bitbang_txrx_be_cpha1(spi, nsecs, 1, flags, word, bits);
218}
219
220/*----------------------------------------------------------------------*/
221
222static void spi_gpio_chipselect(struct spi_device *spi, int is_active)
223{
224	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
225
226	/* set initial clock line level */
227	if (is_active)
228		gpiod_set_value_cansleep(spi_gpio->sck, spi->mode & SPI_CPOL);
229
230	/* Drive chip select line, if we have one */
231	if (spi_gpio->cs_gpios) {
232		struct gpio_desc *cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
233
234		/* SPI chip selects are normally active-low */
235		gpiod_set_value_cansleep(cs, (spi->mode & SPI_CS_HIGH) ? is_active : !is_active);
236	}
237}
238
239static void spi_gpio_set_mosi_idle(struct spi_device *spi)
240{
241	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
 
242
243	gpiod_set_value_cansleep(spi_gpio->mosi,
244				 !!(spi->mode & SPI_MOSI_IDLE_HIGH));
245}
246
247static int spi_gpio_setup(struct spi_device *spi)
248{
249	struct gpio_desc	*cs;
250	struct spi_gpio		*spi_gpio = spi_to_spi_gpio(spi);
251	int ret;
252
253	/*
254	 * The CS GPIOs have already been
255	 * initialized from the descriptor lookup.
256	 */
257	if (spi_gpio->cs_gpios) {
258		cs = spi_gpio->cs_gpios[spi_get_chipselect(spi, 0)];
259		if (!spi->controller_state && cs) {
260			ret = gpiod_direction_output(cs, !(spi->mode & SPI_CS_HIGH));
261			if (ret)
262				return ret;
263		}
264	}
265
266	return spi_bitbang_setup(spi);
267}
268
269static int spi_gpio_set_direction(struct spi_device *spi, bool output)
270{
271	struct spi_gpio *spi_gpio = spi_to_spi_gpio(spi);
272	int ret;
273
274	if (output)
275		return gpiod_direction_output(spi_gpio->mosi, 1);
276
277	/*
278	 * Only change MOSI to an input if using 3WIRE mode.
279	 * Otherwise, MOSI could be left floating if there is
280	 * no pull resistor connected to the I/O pin, or could
281	 * be left logic high if there is a pull-up. Transmitting
282	 * logic high when only clocking MISO data in can put some
283	 * SPI devices in to a bad state.
284	 */
285	if (spi->mode & SPI_3WIRE) {
286		ret = gpiod_direction_input(spi_gpio->mosi);
287		if (ret)
288			return ret;
289	}
290	/*
291	 * Send a turnaround high impedance cycle when switching
292	 * from output to input. Theoretically there should be
293	 * a clock delay here, but as has been noted above, the
294	 * nsec delay function for bit-banged GPIO is simply
295	 * {} because bit-banging just doesn't get fast enough
296	 * anyway.
297	 */
298	if (spi->mode & SPI_3WIRE_HIZ) {
299		gpiod_set_value_cansleep(spi_gpio->sck,
300					 !(spi->mode & SPI_CPOL));
301		gpiod_set_value_cansleep(spi_gpio->sck,
302					 !!(spi->mode & SPI_CPOL));
303	}
304	return 0;
305}
306
307static void spi_gpio_cleanup(struct spi_device *spi)
308{
 
 
 
 
309	spi_bitbang_cleanup(spi);
310}
311
312/*
313 * It can be convenient to use this driver with pins that have alternate
314 * functions associated with a "native" SPI controller if a driver for that
315 * controller is not available, or is missing important functionality.
316 *
317 * On platforms which can do so, configure MISO with a weak pullup unless
318 * there's an external pullup on that signal.  That saves power by avoiding
319 * floating signals.  (A weak pulldown would save power too, but many
320 * drivers expect to see all-ones data as the no target "response".)
321 */
322static int spi_gpio_request(struct device *dev, struct spi_gpio *spi_gpio)
323{
324	spi_gpio->mosi = devm_gpiod_get_optional(dev, "mosi", GPIOD_OUT_LOW);
325	if (IS_ERR(spi_gpio->mosi))
326		return PTR_ERR(spi_gpio->mosi);
327
328	spi_gpio->miso = devm_gpiod_get_optional(dev, "miso", GPIOD_IN);
329	if (IS_ERR(spi_gpio->miso))
330		return PTR_ERR(spi_gpio->miso);
331
332	spi_gpio->sck = devm_gpiod_get(dev, "sck", GPIOD_OUT_LOW);
333	return PTR_ERR_OR_ZERO(spi_gpio->sck);
 
 
334}
335
336static int spi_gpio_probe_pdata(struct platform_device *pdev,
337				struct spi_controller *host)
 
338{
339	struct device *dev = &pdev->dev;
340	struct spi_gpio_platform_data *pdata = dev_get_platdata(dev);
341	struct spi_gpio *spi_gpio = spi_controller_get_devdata(host);
342	int i;
 
 
 
 
 
 
 
 
343
344#ifdef GENERIC_BITBANG
345	if (!pdata || !pdata->num_chipselect)
346		return -ENODEV;
347#endif
348	/*
349	 * The host needs to think there is a chipselect even if not
350	 * connected
351	 */
352	host->num_chipselect = pdata->num_chipselect ?: 1;
353
354	spi_gpio->cs_gpios = devm_kcalloc(dev, host->num_chipselect,
355					  sizeof(*spi_gpio->cs_gpios),
356					  GFP_KERNEL);
357	if (!spi_gpio->cs_gpios)
358		return -ENOMEM;
359
360	for (i = 0; i < host->num_chipselect; i++) {
361		spi_gpio->cs_gpios[i] = devm_gpiod_get_index(dev, "cs", i,
362							     GPIOD_OUT_HIGH);
363		if (IS_ERR(spi_gpio->cs_gpios[i]))
364			return PTR_ERR(spi_gpio->cs_gpios[i]);
365	}
366
367	return 0;
 
 
 
 
 
 
 
 
 
 
 
 
 
368}
369
370static int spi_gpio_probe(struct platform_device *pdev)
371{
372	int				status;
373	struct spi_controller		*host;
374	struct spi_gpio			*spi_gpio;
375	struct device			*dev = &pdev->dev;
376	struct fwnode_handle		*fwnode = dev_fwnode(dev);
377	struct spi_bitbang		*bb;
378
379	host = devm_spi_alloc_host(dev, sizeof(*spi_gpio));
380	if (!host)
381		return -ENOMEM;
382
383	if (fwnode) {
384		device_set_node(&host->dev, fwnode);
385		host->use_gpio_descriptors = true;
386	} else {
387		status = spi_gpio_probe_pdata(pdev, host);
388		if (status)
389			return status;
390	}
391
392	spi_gpio = spi_controller_get_devdata(host);
 
 
 
 
393
394	status = spi_gpio_request(dev, spi_gpio);
395	if (status)
396		return status;
397
398	host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
399	host->mode_bits = SPI_3WIRE | SPI_3WIRE_HIZ | SPI_CPHA | SPI_CPOL |
400			  SPI_CS_HIGH | SPI_LSB_FIRST | SPI_MOSI_IDLE_LOW |
401			  SPI_MOSI_IDLE_HIGH;
402	if (!spi_gpio->mosi) {
403		/* HW configuration without MOSI pin
404		 *
405		 * No setting SPI_CONTROLLER_NO_RX here - if there is only
406		 * a MOSI pin connected the host can still do RX by
407		 * changing the direction of the line.
408		 */
409		host->flags = SPI_CONTROLLER_NO_TX;
410	}
 
 
411
412	host->bus_num = pdev->id;
413	host->setup = spi_gpio_setup;
414	host->cleanup = spi_gpio_cleanup;
415
416	bb = &spi_gpio->bitbang;
417	bb->ctlr = host;
418	/*
419	 * There is some additional business, apart from driving the CS GPIO
420	 * line, that we need to do on selection. This makes the local
421	 * callback for chipselect always get called.
422	 */
423	host->flags |= SPI_CONTROLLER_GPIO_SS;
424	bb->chipselect = spi_gpio_chipselect;
425	bb->set_line_direction = spi_gpio_set_direction;
426	bb->set_mosi_idle = spi_gpio_set_mosi_idle;
427
428	if (host->flags & SPI_CONTROLLER_NO_TX) {
429		bb->txrx_word[SPI_MODE_0] = spi_gpio_spec_txrx_word_mode0;
430		bb->txrx_word[SPI_MODE_1] = spi_gpio_spec_txrx_word_mode1;
431		bb->txrx_word[SPI_MODE_2] = spi_gpio_spec_txrx_word_mode2;
432		bb->txrx_word[SPI_MODE_3] = spi_gpio_spec_txrx_word_mode3;
433	} else {
434		bb->txrx_word[SPI_MODE_0] = spi_gpio_txrx_word_mode0;
435		bb->txrx_word[SPI_MODE_1] = spi_gpio_txrx_word_mode1;
436		bb->txrx_word[SPI_MODE_2] = spi_gpio_txrx_word_mode2;
437		bb->txrx_word[SPI_MODE_3] = spi_gpio_txrx_word_mode3;
438	}
439	bb->setup_transfer = spi_bitbang_setup_transfer;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
440
441	status = spi_bitbang_init(&spi_gpio->bitbang);
442	if (status)
443		return status;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
444
445	return devm_spi_register_controller(&pdev->dev, host);
446}
447
448MODULE_ALIAS("platform:" DRIVER_NAME);
449
450static const struct of_device_id spi_gpio_dt_ids[] = {
451	{ .compatible = "spi-gpio" },
452	{}
 
453};
454MODULE_DEVICE_TABLE(of, spi_gpio_dt_ids);
455
456static struct platform_driver spi_gpio_driver = {
457	.driver = {
458		.name	= DRIVER_NAME,
459		.of_match_table = spi_gpio_dt_ids,
460	},
461	.probe		= spi_gpio_probe,
462};
463module_platform_driver(spi_gpio_driver);
 
 
 
 
464
465MODULE_DESCRIPTION("SPI host driver using generic bitbanged GPIO ");
466MODULE_AUTHOR("David Brownell");
467MODULE_LICENSE("GPL");