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1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2010 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 *****************************************************************************/
20
21#include <linux/module.h>
22#include <linux/kmod.h>
23#include <linux/init.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/mii.h>
28#include <linux/usb.h>
29#include <linux/crc32.h>
30#include <linux/usb/usbnet.h>
31#include <linux/slab.h>
32#include "smsc75xx.h"
33
34#define SMSC_CHIPNAME "smsc75xx"
35#define SMSC_DRIVER_VERSION "1.0.0"
36#define HS_USB_PKT_SIZE (512)
37#define FS_USB_PKT_SIZE (64)
38#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
39#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
40#define DEFAULT_BULK_IN_DELAY (0x00002000)
41#define MAX_SINGLE_PACKET_SIZE (9000)
42#define LAN75XX_EEPROM_MAGIC (0x7500)
43#define EEPROM_MAC_OFFSET (0x01)
44#define DEFAULT_TX_CSUM_ENABLE (true)
45#define DEFAULT_RX_CSUM_ENABLE (true)
46#define DEFAULT_TSO_ENABLE (true)
47#define SMSC75XX_INTERNAL_PHY_ID (1)
48#define SMSC75XX_TX_OVERHEAD (8)
49#define MAX_RX_FIFO_SIZE (20 * 1024)
50#define MAX_TX_FIFO_SIZE (12 * 1024)
51#define USB_VENDOR_ID_SMSC (0x0424)
52#define USB_PRODUCT_ID_LAN7500 (0x7500)
53#define USB_PRODUCT_ID_LAN7505 (0x7505)
54
55#define check_warn(ret, fmt, args...) \
56 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); })
57
58#define check_warn_return(ret, fmt, args...) \
59 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } })
60
61#define check_warn_goto_done(ret, fmt, args...) \
62 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } })
63
64struct smsc75xx_priv {
65 struct usbnet *dev;
66 u32 rfe_ctl;
67 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
68 struct mutex dataport_mutex;
69 spinlock_t rfe_ctl_lock;
70 struct work_struct set_multicast;
71};
72
73struct usb_context {
74 struct usb_ctrlrequest req;
75 struct usbnet *dev;
76};
77
78static int turbo_mode = true;
79module_param(turbo_mode, bool, 0644);
80MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
81
82static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
83 u32 *data)
84{
85 u32 *buf = kmalloc(4, GFP_KERNEL);
86 int ret;
87
88 BUG_ON(!dev);
89
90 if (!buf)
91 return -ENOMEM;
92
93 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
94 USB_VENDOR_REQUEST_READ_REGISTER,
95 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
96 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
97
98 if (unlikely(ret < 0))
99 netdev_warn(dev->net,
100 "Failed to read register index 0x%08x", index);
101
102 le32_to_cpus(buf);
103 *data = *buf;
104 kfree(buf);
105
106 return ret;
107}
108
109static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
110 u32 data)
111{
112 u32 *buf = kmalloc(4, GFP_KERNEL);
113 int ret;
114
115 BUG_ON(!dev);
116
117 if (!buf)
118 return -ENOMEM;
119
120 *buf = data;
121 cpu_to_le32s(buf);
122
123 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
124 USB_VENDOR_REQUEST_WRITE_REGISTER,
125 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
126 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
127
128 if (unlikely(ret < 0))
129 netdev_warn(dev->net,
130 "Failed to write register index 0x%08x", index);
131
132 kfree(buf);
133
134 return ret;
135}
136
137/* Loop until the read is completed with timeout
138 * called with phy_mutex held */
139static int smsc75xx_phy_wait_not_busy(struct usbnet *dev)
140{
141 unsigned long start_time = jiffies;
142 u32 val;
143 int ret;
144
145 do {
146 ret = smsc75xx_read_reg(dev, MII_ACCESS, &val);
147 check_warn_return(ret, "Error reading MII_ACCESS");
148
149 if (!(val & MII_ACCESS_BUSY))
150 return 0;
151 } while (!time_after(jiffies, start_time + HZ));
152
153 return -EIO;
154}
155
156static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
157{
158 struct usbnet *dev = netdev_priv(netdev);
159 u32 val, addr;
160 int ret;
161
162 mutex_lock(&dev->phy_mutex);
163
164 /* confirm MII not busy */
165 ret = smsc75xx_phy_wait_not_busy(dev);
166 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_read");
167
168 /* set the address, index & direction (read from PHY) */
169 phy_id &= dev->mii.phy_id_mask;
170 idx &= dev->mii.reg_num_mask;
171 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
172 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
173 | MII_ACCESS_READ;
174 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
175 check_warn_goto_done(ret, "Error writing MII_ACCESS");
176
177 ret = smsc75xx_phy_wait_not_busy(dev);
178 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx);
179
180 ret = smsc75xx_read_reg(dev, MII_DATA, &val);
181 check_warn_goto_done(ret, "Error reading MII_DATA");
182
183 ret = (u16)(val & 0xFFFF);
184
185done:
186 mutex_unlock(&dev->phy_mutex);
187 return ret;
188}
189
190static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
191 int regval)
192{
193 struct usbnet *dev = netdev_priv(netdev);
194 u32 val, addr;
195 int ret;
196
197 mutex_lock(&dev->phy_mutex);
198
199 /* confirm MII not busy */
200 ret = smsc75xx_phy_wait_not_busy(dev);
201 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_write");
202
203 val = regval;
204 ret = smsc75xx_write_reg(dev, MII_DATA, val);
205 check_warn_goto_done(ret, "Error writing MII_DATA");
206
207 /* set the address, index & direction (write to PHY) */
208 phy_id &= dev->mii.phy_id_mask;
209 idx &= dev->mii.reg_num_mask;
210 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
211 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
212 | MII_ACCESS_WRITE;
213 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
214 check_warn_goto_done(ret, "Error writing MII_ACCESS");
215
216 ret = smsc75xx_phy_wait_not_busy(dev);
217 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx);
218
219done:
220 mutex_unlock(&dev->phy_mutex);
221}
222
223static int smsc75xx_wait_eeprom(struct usbnet *dev)
224{
225 unsigned long start_time = jiffies;
226 u32 val;
227 int ret;
228
229 do {
230 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
231 check_warn_return(ret, "Error reading E2P_CMD");
232
233 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
234 break;
235 udelay(40);
236 } while (!time_after(jiffies, start_time + HZ));
237
238 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
239 netdev_warn(dev->net, "EEPROM read operation timeout");
240 return -EIO;
241 }
242
243 return 0;
244}
245
246static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
247{
248 unsigned long start_time = jiffies;
249 u32 val;
250 int ret;
251
252 do {
253 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
254 check_warn_return(ret, "Error reading E2P_CMD");
255
256 if (!(val & E2P_CMD_BUSY))
257 return 0;
258
259 udelay(40);
260 } while (!time_after(jiffies, start_time + HZ));
261
262 netdev_warn(dev->net, "EEPROM is busy");
263 return -EIO;
264}
265
266static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
267 u8 *data)
268{
269 u32 val;
270 int i, ret;
271
272 BUG_ON(!dev);
273 BUG_ON(!data);
274
275 ret = smsc75xx_eeprom_confirm_not_busy(dev);
276 if (ret)
277 return ret;
278
279 for (i = 0; i < length; i++) {
280 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
281 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
282 check_warn_return(ret, "Error writing E2P_CMD");
283
284 ret = smsc75xx_wait_eeprom(dev);
285 if (ret < 0)
286 return ret;
287
288 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
289 check_warn_return(ret, "Error reading E2P_DATA");
290
291 data[i] = val & 0xFF;
292 offset++;
293 }
294
295 return 0;
296}
297
298static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
299 u8 *data)
300{
301 u32 val;
302 int i, ret;
303
304 BUG_ON(!dev);
305 BUG_ON(!data);
306
307 ret = smsc75xx_eeprom_confirm_not_busy(dev);
308 if (ret)
309 return ret;
310
311 /* Issue write/erase enable command */
312 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
313 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
314 check_warn_return(ret, "Error writing E2P_CMD");
315
316 ret = smsc75xx_wait_eeprom(dev);
317 if (ret < 0)
318 return ret;
319
320 for (i = 0; i < length; i++) {
321
322 /* Fill data register */
323 val = data[i];
324 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
325 check_warn_return(ret, "Error writing E2P_DATA");
326
327 /* Send "write" command */
328 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
329 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
330 check_warn_return(ret, "Error writing E2P_CMD");
331
332 ret = smsc75xx_wait_eeprom(dev);
333 if (ret < 0)
334 return ret;
335
336 offset++;
337 }
338
339 return 0;
340}
341
342static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
343{
344 int i, ret;
345
346 for (i = 0; i < 100; i++) {
347 u32 dp_sel;
348 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
349 check_warn_return(ret, "Error reading DP_SEL");
350
351 if (dp_sel & DP_SEL_DPRDY)
352 return 0;
353
354 udelay(40);
355 }
356
357 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out");
358
359 return -EIO;
360}
361
362static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
363 u32 length, u32 *buf)
364{
365 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
366 u32 dp_sel;
367 int i, ret;
368
369 mutex_lock(&pdata->dataport_mutex);
370
371 ret = smsc75xx_dataport_wait_not_busy(dev);
372 check_warn_goto_done(ret, "smsc75xx_dataport_write busy on entry");
373
374 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
375 check_warn_goto_done(ret, "Error reading DP_SEL");
376
377 dp_sel &= ~DP_SEL_RSEL;
378 dp_sel |= ram_select;
379 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
380 check_warn_goto_done(ret, "Error writing DP_SEL");
381
382 for (i = 0; i < length; i++) {
383 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
384 check_warn_goto_done(ret, "Error writing DP_ADDR");
385
386 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
387 check_warn_goto_done(ret, "Error writing DP_DATA");
388
389 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
390 check_warn_goto_done(ret, "Error writing DP_CMD");
391
392 ret = smsc75xx_dataport_wait_not_busy(dev);
393 check_warn_goto_done(ret, "smsc75xx_dataport_write timeout");
394 }
395
396done:
397 mutex_unlock(&pdata->dataport_mutex);
398 return ret;
399}
400
401/* returns hash bit number for given MAC address */
402static u32 smsc75xx_hash(char addr[ETH_ALEN])
403{
404 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
405}
406
407static void smsc75xx_deferred_multicast_write(struct work_struct *param)
408{
409 struct smsc75xx_priv *pdata =
410 container_of(param, struct smsc75xx_priv, set_multicast);
411 struct usbnet *dev = pdata->dev;
412 int ret;
413
414 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x",
415 pdata->rfe_ctl);
416
417 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
418 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
419
420 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
421 check_warn(ret, "Error writing RFE_CRL");
422}
423
424static void smsc75xx_set_multicast(struct net_device *netdev)
425{
426 struct usbnet *dev = netdev_priv(netdev);
427 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
428 unsigned long flags;
429 int i;
430
431 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
432
433 pdata->rfe_ctl &=
434 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
435 pdata->rfe_ctl |= RFE_CTL_AB;
436
437 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
438 pdata->multicast_hash_table[i] = 0;
439
440 if (dev->net->flags & IFF_PROMISC) {
441 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
442 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
443 } else if (dev->net->flags & IFF_ALLMULTI) {
444 netif_dbg(dev, drv, dev->net, "receive all multicast enabled");
445 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
446 } else if (!netdev_mc_empty(dev->net)) {
447 struct netdev_hw_addr *ha;
448
449 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
450
451 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
452
453 netdev_for_each_mc_addr(ha, netdev) {
454 u32 bitnum = smsc75xx_hash(ha->addr);
455 pdata->multicast_hash_table[bitnum / 32] |=
456 (1 << (bitnum % 32));
457 }
458 } else {
459 netif_dbg(dev, drv, dev->net, "receive own packets only");
460 pdata->rfe_ctl |= RFE_CTL_DPF;
461 }
462
463 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
464
465 /* defer register writes to a sleepable context */
466 schedule_work(&pdata->set_multicast);
467}
468
469static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
470 u16 lcladv, u16 rmtadv)
471{
472 u32 flow = 0, fct_flow = 0;
473 int ret;
474
475 if (duplex == DUPLEX_FULL) {
476 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
477
478 if (cap & FLOW_CTRL_TX) {
479 flow = (FLOW_TX_FCEN | 0xFFFF);
480 /* set fct_flow thresholds to 20% and 80% */
481 fct_flow = (8 << 8) | 32;
482 }
483
484 if (cap & FLOW_CTRL_RX)
485 flow |= FLOW_RX_FCEN;
486
487 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
488 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
489 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
490 } else {
491 netif_dbg(dev, link, dev->net, "half duplex");
492 }
493
494 ret = smsc75xx_write_reg(dev, FLOW, flow);
495 check_warn_return(ret, "Error writing FLOW");
496
497 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
498 check_warn_return(ret, "Error writing FCT_FLOW");
499
500 return 0;
501}
502
503static int smsc75xx_link_reset(struct usbnet *dev)
504{
505 struct mii_if_info *mii = &dev->mii;
506 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
507 u16 lcladv, rmtadv;
508 int ret;
509
510 /* clear interrupt status */
511 ret = smsc75xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
512 check_warn_return(ret, "Error reading PHY_INT_SRC");
513
514 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
515 check_warn_return(ret, "Error writing INT_STS");
516
517 mii_check_media(mii, 1, 1);
518 mii_ethtool_gset(&dev->mii, &ecmd);
519 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
520 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
521
522 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x"
523 " rmtadv: %04x", ethtool_cmd_speed(&ecmd),
524 ecmd.duplex, lcladv, rmtadv);
525
526 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
527}
528
529static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
530{
531 u32 intdata;
532
533 if (urb->actual_length != 4) {
534 netdev_warn(dev->net,
535 "unexpected urb length %d", urb->actual_length);
536 return;
537 }
538
539 memcpy(&intdata, urb->transfer_buffer, 4);
540 le32_to_cpus(&intdata);
541
542 netif_dbg(dev, link, dev->net, "intdata: 0x%08X", intdata);
543
544 if (intdata & INT_ENP_PHY_INT)
545 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
546 else
547 netdev_warn(dev->net,
548 "unexpected interrupt, intdata=0x%08X", intdata);
549}
550
551static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
552{
553 return MAX_EEPROM_SIZE;
554}
555
556static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
557 struct ethtool_eeprom *ee, u8 *data)
558{
559 struct usbnet *dev = netdev_priv(netdev);
560
561 ee->magic = LAN75XX_EEPROM_MAGIC;
562
563 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
564}
565
566static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
567 struct ethtool_eeprom *ee, u8 *data)
568{
569 struct usbnet *dev = netdev_priv(netdev);
570
571 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
572 netdev_warn(dev->net,
573 "EEPROM: magic value mismatch: 0x%x", ee->magic);
574 return -EINVAL;
575 }
576
577 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
578}
579
580static const struct ethtool_ops smsc75xx_ethtool_ops = {
581 .get_link = usbnet_get_link,
582 .nway_reset = usbnet_nway_reset,
583 .get_drvinfo = usbnet_get_drvinfo,
584 .get_msglevel = usbnet_get_msglevel,
585 .set_msglevel = usbnet_set_msglevel,
586 .get_settings = usbnet_get_settings,
587 .set_settings = usbnet_set_settings,
588 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
589 .get_eeprom = smsc75xx_ethtool_get_eeprom,
590 .set_eeprom = smsc75xx_ethtool_set_eeprom,
591};
592
593static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
594{
595 struct usbnet *dev = netdev_priv(netdev);
596
597 if (!netif_running(netdev))
598 return -EINVAL;
599
600 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
601}
602
603static void smsc75xx_init_mac_address(struct usbnet *dev)
604{
605 /* try reading mac address from EEPROM */
606 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
607 dev->net->dev_addr) == 0) {
608 if (is_valid_ether_addr(dev->net->dev_addr)) {
609 /* eeprom values are valid so use them */
610 netif_dbg(dev, ifup, dev->net,
611 "MAC address read from EEPROM");
612 return;
613 }
614 }
615
616 /* no eeprom, or eeprom values are invalid. generate random MAC */
617 random_ether_addr(dev->net->dev_addr);
618 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr");
619}
620
621static int smsc75xx_set_mac_address(struct usbnet *dev)
622{
623 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
624 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
625 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
626
627 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
628 check_warn_return(ret, "Failed to write RX_ADDRH: %d", ret);
629
630 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
631 check_warn_return(ret, "Failed to write RX_ADDRL: %d", ret);
632
633 addr_hi |= ADDR_FILTX_FB_VALID;
634 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
635 check_warn_return(ret, "Failed to write ADDR_FILTX: %d", ret);
636
637 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
638 check_warn_return(ret, "Failed to write ADDR_FILTX+4: %d", ret);
639
640 return 0;
641}
642
643static int smsc75xx_phy_initialize(struct usbnet *dev)
644{
645 int bmcr, timeout = 0;
646
647 /* Initialize MII structure */
648 dev->mii.dev = dev->net;
649 dev->mii.mdio_read = smsc75xx_mdio_read;
650 dev->mii.mdio_write = smsc75xx_mdio_write;
651 dev->mii.phy_id_mask = 0x1f;
652 dev->mii.reg_num_mask = 0x1f;
653 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
654
655 /* reset phy and wait for reset to complete */
656 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
657
658 do {
659 msleep(10);
660 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
661 check_warn_return(bmcr, "Error reading MII_BMCR");
662 timeout++;
663 } while ((bmcr & MII_BMCR) && (timeout < 100));
664
665 if (timeout >= 100) {
666 netdev_warn(dev->net, "timeout on PHY Reset");
667 return -EIO;
668 }
669
670 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
671 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
672 ADVERTISE_PAUSE_ASYM);
673
674 /* read to clear */
675 smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
676 check_warn_return(bmcr, "Error reading PHY_INT_SRC");
677
678 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
679 PHY_INT_MASK_DEFAULT);
680 mii_nway_restart(&dev->mii);
681
682 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
683 return 0;
684}
685
686static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
687{
688 int ret = 0;
689 u32 buf;
690 bool rxenabled;
691
692 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
693 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
694
695 rxenabled = ((buf & MAC_RX_RXEN) != 0);
696
697 if (rxenabled) {
698 buf &= ~MAC_RX_RXEN;
699 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
700 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
701 }
702
703 /* add 4 to size for FCS */
704 buf &= ~MAC_RX_MAX_SIZE;
705 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
706
707 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
708 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
709
710 if (rxenabled) {
711 buf |= MAC_RX_RXEN;
712 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
713 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
714 }
715
716 return 0;
717}
718
719static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
720{
721 struct usbnet *dev = netdev_priv(netdev);
722
723 int ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu);
724 check_warn_return(ret, "Failed to set mac rx frame length");
725
726 return usbnet_change_mtu(netdev, new_mtu);
727}
728
729/* Enable or disable Rx checksum offload engine */
730static int smsc75xx_set_features(struct net_device *netdev, u32 features)
731{
732 struct usbnet *dev = netdev_priv(netdev);
733 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
734 unsigned long flags;
735 int ret;
736
737 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
738
739 if (features & NETIF_F_RXCSUM)
740 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
741 else
742 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
743
744 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
745 /* it's racing here! */
746
747 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
748 check_warn_return(ret, "Error writing RFE_CTL");
749
750 return 0;
751}
752
753static int smsc75xx_reset(struct usbnet *dev)
754{
755 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
756 u32 buf;
757 int ret = 0, timeout;
758
759 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset");
760
761 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
762 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
763
764 buf |= HW_CFG_LRST;
765
766 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
767 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
768
769 timeout = 0;
770 do {
771 msleep(10);
772 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
773 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
774 timeout++;
775 } while ((buf & HW_CFG_LRST) && (timeout < 100));
776
777 if (timeout >= 100) {
778 netdev_warn(dev->net, "timeout on completion of Lite Reset");
779 return -EIO;
780 }
781
782 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY");
783
784 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
785 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
786
787 buf |= PMT_CTL_PHY_RST;
788
789 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
790 check_warn_return(ret, "Failed to write PMT_CTL: %d", ret);
791
792 timeout = 0;
793 do {
794 msleep(10);
795 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
796 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
797 timeout++;
798 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
799
800 if (timeout >= 100) {
801 netdev_warn(dev->net, "timeout waiting for PHY Reset");
802 return -EIO;
803 }
804
805 netif_dbg(dev, ifup, dev->net, "PHY reset complete");
806
807 smsc75xx_init_mac_address(dev);
808
809 ret = smsc75xx_set_mac_address(dev);
810 check_warn_return(ret, "Failed to set mac address");
811
812 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM", dev->net->dev_addr);
813
814 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
815 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
816
817 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x", buf);
818
819 buf |= HW_CFG_BIR;
820
821 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
822 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
823
824 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
825 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
826
827 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after "
828 "writing HW_CFG_BIR: 0x%08x", buf);
829
830 if (!turbo_mode) {
831 buf = 0;
832 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
833 } else if (dev->udev->speed == USB_SPEED_HIGH) {
834 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
835 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
836 } else {
837 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
838 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
839 }
840
841 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld",
842 (ulong)dev->rx_urb_size);
843
844 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
845 check_warn_return(ret, "Failed to write BURST_CAP: %d", ret);
846
847 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
848 check_warn_return(ret, "Failed to read BURST_CAP: %d", ret);
849
850 netif_dbg(dev, ifup, dev->net,
851 "Read Value from BURST_CAP after writing: 0x%08x", buf);
852
853 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
854 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d", ret);
855
856 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
857 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d", ret);
858
859 netif_dbg(dev, ifup, dev->net,
860 "Read Value from BULK_IN_DLY after writing: 0x%08x", buf);
861
862 if (turbo_mode) {
863 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
864 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
865
866 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
867
868 buf |= (HW_CFG_MEF | HW_CFG_BCE);
869
870 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
871 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
872
873 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
874 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
875
876 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
877 }
878
879 /* set FIFO sizes */
880 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
881 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
882 check_warn_return(ret, "Failed to write FCT_RX_FIFO_END: %d", ret);
883
884 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x", buf);
885
886 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
887 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
888 check_warn_return(ret, "Failed to write FCT_TX_FIFO_END: %d", ret);
889
890 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x", buf);
891
892 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
893 check_warn_return(ret, "Failed to write INT_STS: %d", ret);
894
895 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
896 check_warn_return(ret, "Failed to read ID_REV: %d", ret);
897
898 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x", buf);
899
900 /* Configure GPIO pins as LED outputs */
901 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
902 check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret);
903
904 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
905 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
906
907 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
908 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret);
909
910 ret = smsc75xx_write_reg(dev, FLOW, 0);
911 check_warn_return(ret, "Failed to write FLOW: %d", ret);
912
913 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
914 check_warn_return(ret, "Failed to write FCT_FLOW: %d", ret);
915
916 /* Don't need rfe_ctl_lock during initialisation */
917 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
918 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
919
920 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
921
922 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
923 check_warn_return(ret, "Failed to write RFE_CTL: %d", ret);
924
925 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
926 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
927
928 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x", pdata->rfe_ctl);
929
930 /* Enable or disable checksum offload engines */
931 smsc75xx_set_features(dev->net, dev->net->features);
932
933 smsc75xx_set_multicast(dev->net);
934
935 ret = smsc75xx_phy_initialize(dev);
936 check_warn_return(ret, "Failed to initialize PHY: %d", ret);
937
938 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
939 check_warn_return(ret, "Failed to read INT_EP_CTL: %d", ret);
940
941 /* enable PHY interrupts */
942 buf |= INT_ENP_PHY_INT;
943
944 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
945 check_warn_return(ret, "Failed to write INT_EP_CTL: %d", ret);
946
947 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
948 check_warn_return(ret, "Failed to read MAC_TX: %d", ret);
949
950 buf |= MAC_TX_TXEN;
951
952 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
953 check_warn_return(ret, "Failed to write MAC_TX: %d", ret);
954
955 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x", buf);
956
957 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
958 check_warn_return(ret, "Failed to read FCT_TX_CTL: %d", ret);
959
960 buf |= FCT_TX_CTL_EN;
961
962 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
963 check_warn_return(ret, "Failed to write FCT_TX_CTL: %d", ret);
964
965 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x", buf);
966
967 ret = smsc75xx_set_rx_max_frame_length(dev, 1514);
968 check_warn_return(ret, "Failed to set max rx frame length");
969
970 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
971 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
972
973 buf |= MAC_RX_RXEN;
974
975 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
976 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
977
978 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x", buf);
979
980 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
981 check_warn_return(ret, "Failed to read FCT_RX_CTL: %d", ret);
982
983 buf |= FCT_RX_CTL_EN;
984
985 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
986 check_warn_return(ret, "Failed to write FCT_RX_CTL: %d", ret);
987
988 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x", buf);
989
990 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0");
991 return 0;
992}
993
994static const struct net_device_ops smsc75xx_netdev_ops = {
995 .ndo_open = usbnet_open,
996 .ndo_stop = usbnet_stop,
997 .ndo_start_xmit = usbnet_start_xmit,
998 .ndo_tx_timeout = usbnet_tx_timeout,
999 .ndo_change_mtu = smsc75xx_change_mtu,
1000 .ndo_set_mac_address = eth_mac_addr,
1001 .ndo_validate_addr = eth_validate_addr,
1002 .ndo_do_ioctl = smsc75xx_ioctl,
1003 .ndo_set_multicast_list = smsc75xx_set_multicast,
1004 .ndo_set_features = smsc75xx_set_features,
1005};
1006
1007static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1008{
1009 struct smsc75xx_priv *pdata = NULL;
1010 int ret;
1011
1012 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1013
1014 ret = usbnet_get_endpoints(dev, intf);
1015 check_warn_return(ret, "usbnet_get_endpoints failed: %d", ret);
1016
1017 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
1018 GFP_KERNEL);
1019
1020 pdata = (struct smsc75xx_priv *)(dev->data[0]);
1021 if (!pdata) {
1022 netdev_warn(dev->net, "Unable to allocate smsc75xx_priv");
1023 return -ENOMEM;
1024 }
1025
1026 pdata->dev = dev;
1027
1028 spin_lock_init(&pdata->rfe_ctl_lock);
1029 mutex_init(&pdata->dataport_mutex);
1030
1031 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1032
1033 if (DEFAULT_TX_CSUM_ENABLE) {
1034 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1035 if (DEFAULT_TSO_ENABLE)
1036 dev->net->features |= NETIF_F_SG |
1037 NETIF_F_TSO | NETIF_F_TSO6;
1038 }
1039 if (DEFAULT_RX_CSUM_ENABLE)
1040 dev->net->features |= NETIF_F_RXCSUM;
1041
1042 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1043 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_RXCSUM;
1044
1045 /* Init all registers */
1046 ret = smsc75xx_reset(dev);
1047
1048 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1049 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1050 dev->net->flags |= IFF_MULTICAST;
1051 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
1052 return 0;
1053}
1054
1055static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1056{
1057 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1058 if (pdata) {
1059 netif_dbg(dev, ifdown, dev->net, "free pdata");
1060 kfree(pdata);
1061 pdata = NULL;
1062 dev->data[0] = 0;
1063 }
1064}
1065
1066static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
1067 u32 rx_cmd_a, u32 rx_cmd_b)
1068{
1069 if (!(dev->net->features & NETIF_F_RXCSUM) ||
1070 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
1071 skb->ip_summed = CHECKSUM_NONE;
1072 } else {
1073 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
1074 skb->ip_summed = CHECKSUM_COMPLETE;
1075 }
1076}
1077
1078static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1079{
1080 while (skb->len > 0) {
1081 u32 rx_cmd_a, rx_cmd_b, align_count, size;
1082 struct sk_buff *ax_skb;
1083 unsigned char *packet;
1084
1085 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
1086 le32_to_cpus(&rx_cmd_a);
1087 skb_pull(skb, 4);
1088
1089 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
1090 le32_to_cpus(&rx_cmd_b);
1091 skb_pull(skb, 4 + NET_IP_ALIGN);
1092
1093 packet = skb->data;
1094
1095 /* get the packet length */
1096 size = (rx_cmd_a & RX_CMD_A_LEN) - NET_IP_ALIGN;
1097 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1098
1099 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
1100 netif_dbg(dev, rx_err, dev->net,
1101 "Error rx_cmd_a=0x%08x", rx_cmd_a);
1102 dev->net->stats.rx_errors++;
1103 dev->net->stats.rx_dropped++;
1104
1105 if (rx_cmd_a & RX_CMD_A_FCS)
1106 dev->net->stats.rx_crc_errors++;
1107 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
1108 dev->net->stats.rx_frame_errors++;
1109 } else {
1110 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1111 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1112 netif_dbg(dev, rx_err, dev->net,
1113 "size err rx_cmd_a=0x%08x", rx_cmd_a);
1114 return 0;
1115 }
1116
1117 /* last frame in this batch */
1118 if (skb->len == size) {
1119 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
1120 rx_cmd_b);
1121
1122 skb_trim(skb, skb->len - 4); /* remove fcs */
1123 skb->truesize = size + sizeof(struct sk_buff);
1124
1125 return 1;
1126 }
1127
1128 ax_skb = skb_clone(skb, GFP_ATOMIC);
1129 if (unlikely(!ax_skb)) {
1130 netdev_warn(dev->net, "Error allocating skb");
1131 return 0;
1132 }
1133
1134 ax_skb->len = size;
1135 ax_skb->data = packet;
1136 skb_set_tail_pointer(ax_skb, size);
1137
1138 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
1139 rx_cmd_b);
1140
1141 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1142 ax_skb->truesize = size + sizeof(struct sk_buff);
1143
1144 usbnet_skb_return(dev, ax_skb);
1145 }
1146
1147 skb_pull(skb, size);
1148
1149 /* padding bytes before the next frame starts */
1150 if (skb->len)
1151 skb_pull(skb, align_count);
1152 }
1153
1154 if (unlikely(skb->len < 0)) {
1155 netdev_warn(dev->net, "invalid rx length<0 %d", skb->len);
1156 return 0;
1157 }
1158
1159 return 1;
1160}
1161
1162static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
1163 struct sk_buff *skb, gfp_t flags)
1164{
1165 u32 tx_cmd_a, tx_cmd_b;
1166
1167 skb_linearize(skb);
1168
1169 if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) {
1170 struct sk_buff *skb2 =
1171 skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags);
1172 dev_kfree_skb_any(skb);
1173 skb = skb2;
1174 if (!skb)
1175 return NULL;
1176 }
1177
1178 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
1179
1180 if (skb->ip_summed == CHECKSUM_PARTIAL)
1181 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
1182
1183 if (skb_is_gso(skb)) {
1184 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
1185 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
1186
1187 tx_cmd_a |= TX_CMD_A_LSO;
1188 } else {
1189 tx_cmd_b = 0;
1190 }
1191
1192 skb_push(skb, 4);
1193 cpu_to_le32s(&tx_cmd_b);
1194 memcpy(skb->data, &tx_cmd_b, 4);
1195
1196 skb_push(skb, 4);
1197 cpu_to_le32s(&tx_cmd_a);
1198 memcpy(skb->data, &tx_cmd_a, 4);
1199
1200 return skb;
1201}
1202
1203static const struct driver_info smsc75xx_info = {
1204 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
1205 .bind = smsc75xx_bind,
1206 .unbind = smsc75xx_unbind,
1207 .link_reset = smsc75xx_link_reset,
1208 .reset = smsc75xx_reset,
1209 .rx_fixup = smsc75xx_rx_fixup,
1210 .tx_fixup = smsc75xx_tx_fixup,
1211 .status = smsc75xx_status,
1212 .flags = FLAG_ETHER | FLAG_SEND_ZLP,
1213};
1214
1215static const struct usb_device_id products[] = {
1216 {
1217 /* SMSC7500 USB Gigabit Ethernet Device */
1218 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
1219 .driver_info = (unsigned long) &smsc75xx_info,
1220 },
1221 {
1222 /* SMSC7500 USB Gigabit Ethernet Device */
1223 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
1224 .driver_info = (unsigned long) &smsc75xx_info,
1225 },
1226 { }, /* END */
1227};
1228MODULE_DEVICE_TABLE(usb, products);
1229
1230static struct usb_driver smsc75xx_driver = {
1231 .name = SMSC_CHIPNAME,
1232 .id_table = products,
1233 .probe = usbnet_probe,
1234 .suspend = usbnet_suspend,
1235 .resume = usbnet_resume,
1236 .disconnect = usbnet_disconnect,
1237};
1238
1239static int __init smsc75xx_init(void)
1240{
1241 return usb_register(&smsc75xx_driver);
1242}
1243module_init(smsc75xx_init);
1244
1245static void __exit smsc75xx_exit(void)
1246{
1247 usb_deregister(&smsc75xx_driver);
1248}
1249module_exit(smsc75xx_exit);
1250
1251MODULE_AUTHOR("Nancy Lin");
1252MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1253MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
1254MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2 /***************************************************************************
3 *
4 * Copyright (C) 2007-2010 SMSC
5 *
6 *****************************************************************************/
7
8#include <linux/module.h>
9#include <linux/kmod.h>
10#include <linux/netdevice.h>
11#include <linux/etherdevice.h>
12#include <linux/ethtool.h>
13#include <linux/mii.h>
14#include <linux/usb.h>
15#include <linux/bitrev.h>
16#include <linux/crc16.h>
17#include <linux/crc32.h>
18#include <linux/usb/usbnet.h>
19#include <linux/slab.h>
20#include <linux/of_net.h>
21#include "smsc75xx.h"
22
23#define SMSC_CHIPNAME "smsc75xx"
24#define SMSC_DRIVER_VERSION "1.0.0"
25#define HS_USB_PKT_SIZE (512)
26#define FS_USB_PKT_SIZE (64)
27#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
28#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
29#define DEFAULT_BULK_IN_DELAY (0x00002000)
30#define MAX_SINGLE_PACKET_SIZE (9000)
31#define LAN75XX_EEPROM_MAGIC (0x7500)
32#define EEPROM_MAC_OFFSET (0x01)
33#define DEFAULT_TX_CSUM_ENABLE (true)
34#define DEFAULT_RX_CSUM_ENABLE (true)
35#define SMSC75XX_INTERNAL_PHY_ID (1)
36#define SMSC75XX_TX_OVERHEAD (8)
37#define MAX_RX_FIFO_SIZE (20 * 1024)
38#define MAX_TX_FIFO_SIZE (12 * 1024)
39#define USB_VENDOR_ID_SMSC (0x0424)
40#define USB_PRODUCT_ID_LAN7500 (0x7500)
41#define USB_PRODUCT_ID_LAN7505 (0x7505)
42#define RXW_PADDING 2
43#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
44 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
45
46#define SUSPEND_SUSPEND0 (0x01)
47#define SUSPEND_SUSPEND1 (0x02)
48#define SUSPEND_SUSPEND2 (0x04)
49#define SUSPEND_SUSPEND3 (0x08)
50#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
51 SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
52
53struct smsc75xx_priv {
54 struct usbnet *dev;
55 u32 rfe_ctl;
56 u32 wolopts;
57 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
58 struct mutex dataport_mutex;
59 spinlock_t rfe_ctl_lock;
60 struct work_struct set_multicast;
61 u8 suspend_flags;
62};
63
64static bool turbo_mode = true;
65module_param(turbo_mode, bool, 0644);
66MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
67
68static int smsc75xx_link_ok_nopm(struct usbnet *dev);
69static int smsc75xx_phy_gig_workaround(struct usbnet *dev);
70
71static int __must_check __smsc75xx_read_reg(struct usbnet *dev, u32 index,
72 u32 *data, int in_pm)
73{
74 u32 buf;
75 int ret;
76 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
77
78 BUG_ON(!dev);
79
80 if (!in_pm)
81 fn = usbnet_read_cmd;
82 else
83 fn = usbnet_read_cmd_nopm;
84
85 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
86 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
87 0, index, &buf, 4);
88 if (unlikely(ret < 4)) {
89 ret = ret < 0 ? ret : -ENODATA;
90
91 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
92 index, ret);
93 return ret;
94 }
95
96 le32_to_cpus(&buf);
97 *data = buf;
98
99 return ret;
100}
101
102static int __must_check __smsc75xx_write_reg(struct usbnet *dev, u32 index,
103 u32 data, int in_pm)
104{
105 u32 buf;
106 int ret;
107 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
108
109 BUG_ON(!dev);
110
111 if (!in_pm)
112 fn = usbnet_write_cmd;
113 else
114 fn = usbnet_write_cmd_nopm;
115
116 buf = data;
117 cpu_to_le32s(&buf);
118
119 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
120 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
121 0, index, &buf, 4);
122 if (unlikely(ret < 0))
123 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
124 index, ret);
125
126 return ret;
127}
128
129static int __must_check smsc75xx_read_reg_nopm(struct usbnet *dev, u32 index,
130 u32 *data)
131{
132 return __smsc75xx_read_reg(dev, index, data, 1);
133}
134
135static int __must_check smsc75xx_write_reg_nopm(struct usbnet *dev, u32 index,
136 u32 data)
137{
138 return __smsc75xx_write_reg(dev, index, data, 1);
139}
140
141static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
142 u32 *data)
143{
144 return __smsc75xx_read_reg(dev, index, data, 0);
145}
146
147static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
148 u32 data)
149{
150 return __smsc75xx_write_reg(dev, index, data, 0);
151}
152
153/* Loop until the read is completed with timeout
154 * called with phy_mutex held */
155static __must_check int __smsc75xx_phy_wait_not_busy(struct usbnet *dev,
156 int in_pm)
157{
158 unsigned long start_time = jiffies;
159 u32 val;
160 int ret;
161
162 do {
163 ret = __smsc75xx_read_reg(dev, MII_ACCESS, &val, in_pm);
164 if (ret < 0) {
165 netdev_warn(dev->net, "Error reading MII_ACCESS\n");
166 return ret;
167 }
168
169 if (!(val & MII_ACCESS_BUSY))
170 return 0;
171 } while (!time_after(jiffies, start_time + HZ));
172
173 return -EIO;
174}
175
176static int __smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
177 int in_pm)
178{
179 struct usbnet *dev = netdev_priv(netdev);
180 u32 val, addr;
181 int ret;
182
183 mutex_lock(&dev->phy_mutex);
184
185 /* confirm MII not busy */
186 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
187 if (ret < 0) {
188 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_read\n");
189 goto done;
190 }
191
192 /* set the address, index & direction (read from PHY) */
193 phy_id &= dev->mii.phy_id_mask;
194 idx &= dev->mii.reg_num_mask;
195 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
196 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
197 | MII_ACCESS_READ | MII_ACCESS_BUSY;
198 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm);
199 if (ret < 0) {
200 netdev_warn(dev->net, "Error writing MII_ACCESS\n");
201 goto done;
202 }
203
204 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
205 if (ret < 0) {
206 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
207 goto done;
208 }
209
210 ret = __smsc75xx_read_reg(dev, MII_DATA, &val, in_pm);
211 if (ret < 0) {
212 netdev_warn(dev->net, "Error reading MII_DATA\n");
213 goto done;
214 }
215
216 ret = (u16)(val & 0xFFFF);
217
218done:
219 mutex_unlock(&dev->phy_mutex);
220 return ret;
221}
222
223static void __smsc75xx_mdio_write(struct net_device *netdev, int phy_id,
224 int idx, int regval, int in_pm)
225{
226 struct usbnet *dev = netdev_priv(netdev);
227 u32 val, addr;
228 int ret;
229
230 mutex_lock(&dev->phy_mutex);
231
232 /* confirm MII not busy */
233 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
234 if (ret < 0) {
235 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_write\n");
236 goto done;
237 }
238
239 val = regval;
240 ret = __smsc75xx_write_reg(dev, MII_DATA, val, in_pm);
241 if (ret < 0) {
242 netdev_warn(dev->net, "Error writing MII_DATA\n");
243 goto done;
244 }
245
246 /* set the address, index & direction (write to PHY) */
247 phy_id &= dev->mii.phy_id_mask;
248 idx &= dev->mii.reg_num_mask;
249 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
250 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
251 | MII_ACCESS_WRITE | MII_ACCESS_BUSY;
252 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm);
253 if (ret < 0) {
254 netdev_warn(dev->net, "Error writing MII_ACCESS\n");
255 goto done;
256 }
257
258 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
259 if (ret < 0) {
260 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
261 goto done;
262 }
263
264done:
265 mutex_unlock(&dev->phy_mutex);
266}
267
268static int smsc75xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
269 int idx)
270{
271 return __smsc75xx_mdio_read(netdev, phy_id, idx, 1);
272}
273
274static void smsc75xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
275 int idx, int regval)
276{
277 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 1);
278}
279
280static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
281{
282 return __smsc75xx_mdio_read(netdev, phy_id, idx, 0);
283}
284
285static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
286 int regval)
287{
288 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 0);
289}
290
291static int smsc75xx_wait_eeprom(struct usbnet *dev)
292{
293 unsigned long start_time = jiffies;
294 u32 val;
295 int ret;
296
297 do {
298 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
299 if (ret < 0) {
300 netdev_warn(dev->net, "Error reading E2P_CMD\n");
301 return ret;
302 }
303
304 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
305 break;
306 udelay(40);
307 } while (!time_after(jiffies, start_time + HZ));
308
309 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
310 netdev_warn(dev->net, "EEPROM read operation timeout\n");
311 return -EIO;
312 }
313
314 return 0;
315}
316
317static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
318{
319 unsigned long start_time = jiffies;
320 u32 val;
321 int ret;
322
323 do {
324 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
325 if (ret < 0) {
326 netdev_warn(dev->net, "Error reading E2P_CMD\n");
327 return ret;
328 }
329
330 if (!(val & E2P_CMD_BUSY))
331 return 0;
332
333 udelay(40);
334 } while (!time_after(jiffies, start_time + HZ));
335
336 netdev_warn(dev->net, "EEPROM is busy\n");
337 return -EIO;
338}
339
340static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
341 u8 *data)
342{
343 u32 val;
344 int i, ret;
345
346 BUG_ON(!dev);
347 BUG_ON(!data);
348
349 ret = smsc75xx_eeprom_confirm_not_busy(dev);
350 if (ret)
351 return ret;
352
353 for (i = 0; i < length; i++) {
354 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
355 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
356 if (ret < 0) {
357 netdev_warn(dev->net, "Error writing E2P_CMD\n");
358 return ret;
359 }
360
361 ret = smsc75xx_wait_eeprom(dev);
362 if (ret < 0)
363 return ret;
364
365 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
366 if (ret < 0) {
367 netdev_warn(dev->net, "Error reading E2P_DATA\n");
368 return ret;
369 }
370
371 data[i] = val & 0xFF;
372 offset++;
373 }
374
375 return 0;
376}
377
378static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
379 u8 *data)
380{
381 u32 val;
382 int i, ret;
383
384 BUG_ON(!dev);
385 BUG_ON(!data);
386
387 ret = smsc75xx_eeprom_confirm_not_busy(dev);
388 if (ret)
389 return ret;
390
391 /* Issue write/erase enable command */
392 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
393 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
394 if (ret < 0) {
395 netdev_warn(dev->net, "Error writing E2P_CMD\n");
396 return ret;
397 }
398
399 ret = smsc75xx_wait_eeprom(dev);
400 if (ret < 0)
401 return ret;
402
403 for (i = 0; i < length; i++) {
404
405 /* Fill data register */
406 val = data[i];
407 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
408 if (ret < 0) {
409 netdev_warn(dev->net, "Error writing E2P_DATA\n");
410 return ret;
411 }
412
413 /* Send "write" command */
414 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
415 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
416 if (ret < 0) {
417 netdev_warn(dev->net, "Error writing E2P_CMD\n");
418 return ret;
419 }
420
421 ret = smsc75xx_wait_eeprom(dev);
422 if (ret < 0)
423 return ret;
424
425 offset++;
426 }
427
428 return 0;
429}
430
431static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
432{
433 int i, ret;
434
435 for (i = 0; i < 100; i++) {
436 u32 dp_sel;
437 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
438 if (ret < 0) {
439 netdev_warn(dev->net, "Error reading DP_SEL\n");
440 return ret;
441 }
442
443 if (dp_sel & DP_SEL_DPRDY)
444 return 0;
445
446 udelay(40);
447 }
448
449 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out\n");
450
451 return -EIO;
452}
453
454static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
455 u32 length, u32 *buf)
456{
457 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
458 u32 dp_sel;
459 int i, ret;
460
461 mutex_lock(&pdata->dataport_mutex);
462
463 ret = smsc75xx_dataport_wait_not_busy(dev);
464 if (ret < 0) {
465 netdev_warn(dev->net, "smsc75xx_dataport_write busy on entry\n");
466 goto done;
467 }
468
469 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
470 if (ret < 0) {
471 netdev_warn(dev->net, "Error reading DP_SEL\n");
472 goto done;
473 }
474
475 dp_sel &= ~DP_SEL_RSEL;
476 dp_sel |= ram_select;
477 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
478 if (ret < 0) {
479 netdev_warn(dev->net, "Error writing DP_SEL\n");
480 goto done;
481 }
482
483 for (i = 0; i < length; i++) {
484 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
485 if (ret < 0) {
486 netdev_warn(dev->net, "Error writing DP_ADDR\n");
487 goto done;
488 }
489
490 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
491 if (ret < 0) {
492 netdev_warn(dev->net, "Error writing DP_DATA\n");
493 goto done;
494 }
495
496 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
497 if (ret < 0) {
498 netdev_warn(dev->net, "Error writing DP_CMD\n");
499 goto done;
500 }
501
502 ret = smsc75xx_dataport_wait_not_busy(dev);
503 if (ret < 0) {
504 netdev_warn(dev->net, "smsc75xx_dataport_write timeout\n");
505 goto done;
506 }
507 }
508
509done:
510 mutex_unlock(&pdata->dataport_mutex);
511 return ret;
512}
513
514/* returns hash bit number for given MAC address */
515static u32 smsc75xx_hash(char addr[ETH_ALEN])
516{
517 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
518}
519
520static void smsc75xx_deferred_multicast_write(struct work_struct *param)
521{
522 struct smsc75xx_priv *pdata =
523 container_of(param, struct smsc75xx_priv, set_multicast);
524 struct usbnet *dev = pdata->dev;
525 int ret;
526
527 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
528 pdata->rfe_ctl);
529
530 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
531 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
532
533 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
534 if (ret < 0)
535 netdev_warn(dev->net, "Error writing RFE_CRL\n");
536}
537
538static void smsc75xx_set_multicast(struct net_device *netdev)
539{
540 struct usbnet *dev = netdev_priv(netdev);
541 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
542 unsigned long flags;
543 int i;
544
545 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
546
547 pdata->rfe_ctl &=
548 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
549 pdata->rfe_ctl |= RFE_CTL_AB;
550
551 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
552 pdata->multicast_hash_table[i] = 0;
553
554 if (dev->net->flags & IFF_PROMISC) {
555 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
556 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
557 } else if (dev->net->flags & IFF_ALLMULTI) {
558 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
559 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
560 } else if (!netdev_mc_empty(dev->net)) {
561 struct netdev_hw_addr *ha;
562
563 netif_dbg(dev, drv, dev->net, "receive multicast hash filter\n");
564
565 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
566
567 netdev_for_each_mc_addr(ha, netdev) {
568 u32 bitnum = smsc75xx_hash(ha->addr);
569 pdata->multicast_hash_table[bitnum / 32] |=
570 (1 << (bitnum % 32));
571 }
572 } else {
573 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
574 pdata->rfe_ctl |= RFE_CTL_DPF;
575 }
576
577 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
578
579 /* defer register writes to a sleepable context */
580 schedule_work(&pdata->set_multicast);
581}
582
583static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
584 u16 lcladv, u16 rmtadv)
585{
586 u32 flow = 0, fct_flow = 0;
587 int ret;
588
589 if (duplex == DUPLEX_FULL) {
590 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
591
592 if (cap & FLOW_CTRL_TX) {
593 flow = (FLOW_TX_FCEN | 0xFFFF);
594 /* set fct_flow thresholds to 20% and 80% */
595 fct_flow = (8 << 8) | 32;
596 }
597
598 if (cap & FLOW_CTRL_RX)
599 flow |= FLOW_RX_FCEN;
600
601 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
602 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
603 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
604 } else {
605 netif_dbg(dev, link, dev->net, "half duplex\n");
606 }
607
608 ret = smsc75xx_write_reg(dev, FLOW, flow);
609 if (ret < 0) {
610 netdev_warn(dev->net, "Error writing FLOW\n");
611 return ret;
612 }
613
614 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
615 if (ret < 0) {
616 netdev_warn(dev->net, "Error writing FCT_FLOW\n");
617 return ret;
618 }
619
620 return 0;
621}
622
623static int smsc75xx_link_reset(struct usbnet *dev)
624{
625 struct mii_if_info *mii = &dev->mii;
626 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
627 u16 lcladv, rmtadv;
628 int ret;
629
630 /* write to clear phy interrupt status */
631 smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC,
632 PHY_INT_SRC_CLEAR_ALL);
633
634 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
635 if (ret < 0) {
636 netdev_warn(dev->net, "Error writing INT_STS\n");
637 return ret;
638 }
639
640 mii_check_media(mii, 1, 1);
641 mii_ethtool_gset(&dev->mii, &ecmd);
642 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
643 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
644
645 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
646 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
647
648 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
649}
650
651static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
652{
653 u32 intdata;
654
655 if (urb->actual_length != 4) {
656 netdev_warn(dev->net, "unexpected urb length %d\n",
657 urb->actual_length);
658 return;
659 }
660
661 intdata = get_unaligned_le32(urb->transfer_buffer);
662
663 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
664
665 if (intdata & INT_ENP_PHY_INT)
666 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
667 else
668 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
669 intdata);
670}
671
672static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
673{
674 return MAX_EEPROM_SIZE;
675}
676
677static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
678 struct ethtool_eeprom *ee, u8 *data)
679{
680 struct usbnet *dev = netdev_priv(netdev);
681
682 ee->magic = LAN75XX_EEPROM_MAGIC;
683
684 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
685}
686
687static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
688 struct ethtool_eeprom *ee, u8 *data)
689{
690 struct usbnet *dev = netdev_priv(netdev);
691
692 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
693 netdev_warn(dev->net, "EEPROM: magic value mismatch: 0x%x\n",
694 ee->magic);
695 return -EINVAL;
696 }
697
698 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
699}
700
701static void smsc75xx_ethtool_get_wol(struct net_device *net,
702 struct ethtool_wolinfo *wolinfo)
703{
704 struct usbnet *dev = netdev_priv(net);
705 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
706
707 wolinfo->supported = SUPPORTED_WAKE;
708 wolinfo->wolopts = pdata->wolopts;
709}
710
711static int smsc75xx_ethtool_set_wol(struct net_device *net,
712 struct ethtool_wolinfo *wolinfo)
713{
714 struct usbnet *dev = netdev_priv(net);
715 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
716 int ret;
717
718 if (wolinfo->wolopts & ~SUPPORTED_WAKE)
719 return -EINVAL;
720
721 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
722
723 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
724 if (ret < 0)
725 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
726
727 return ret;
728}
729
730static const struct ethtool_ops smsc75xx_ethtool_ops = {
731 .get_link = usbnet_get_link,
732 .nway_reset = usbnet_nway_reset,
733 .get_drvinfo = usbnet_get_drvinfo,
734 .get_msglevel = usbnet_get_msglevel,
735 .set_msglevel = usbnet_set_msglevel,
736 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
737 .get_eeprom = smsc75xx_ethtool_get_eeprom,
738 .set_eeprom = smsc75xx_ethtool_set_eeprom,
739 .get_wol = smsc75xx_ethtool_get_wol,
740 .set_wol = smsc75xx_ethtool_set_wol,
741 .get_link_ksettings = usbnet_get_link_ksettings_mii,
742 .set_link_ksettings = usbnet_set_link_ksettings_mii,
743};
744
745static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
746{
747 struct usbnet *dev = netdev_priv(netdev);
748
749 if (!netif_running(netdev))
750 return -EINVAL;
751
752 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
753}
754
755static void smsc75xx_init_mac_address(struct usbnet *dev)
756{
757 u8 addr[ETH_ALEN];
758
759 /* maybe the boot loader passed the MAC address in devicetree */
760 if (!platform_get_ethdev_address(&dev->udev->dev, dev->net)) {
761 if (is_valid_ether_addr(dev->net->dev_addr)) {
762 /* device tree values are valid so use them */
763 netif_dbg(dev, ifup, dev->net, "MAC address read from the device tree\n");
764 return;
765 }
766 }
767
768 /* try reading mac address from EEPROM */
769 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, addr) == 0) {
770 eth_hw_addr_set(dev->net, addr);
771 if (is_valid_ether_addr(dev->net->dev_addr)) {
772 /* eeprom values are valid so use them */
773 netif_dbg(dev, ifup, dev->net,
774 "MAC address read from EEPROM\n");
775 return;
776 }
777 }
778
779 /* no useful static MAC address found. generate a random one */
780 eth_hw_addr_random(dev->net);
781 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
782}
783
784static int smsc75xx_set_mac_address(struct usbnet *dev)
785{
786 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
787 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
788 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
789
790 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
791 if (ret < 0) {
792 netdev_warn(dev->net, "Failed to write RX_ADDRH: %d\n", ret);
793 return ret;
794 }
795
796 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
797 if (ret < 0) {
798 netdev_warn(dev->net, "Failed to write RX_ADDRL: %d\n", ret);
799 return ret;
800 }
801
802 addr_hi |= ADDR_FILTX_FB_VALID;
803 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
804 if (ret < 0) {
805 netdev_warn(dev->net, "Failed to write ADDR_FILTX: %d\n", ret);
806 return ret;
807 }
808
809 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
810 if (ret < 0)
811 netdev_warn(dev->net, "Failed to write ADDR_FILTX+4: %d\n", ret);
812
813 return ret;
814}
815
816static int smsc75xx_phy_initialize(struct usbnet *dev)
817{
818 int bmcr, ret, timeout = 0;
819
820 /* Initialize MII structure */
821 dev->mii.dev = dev->net;
822 dev->mii.mdio_read = smsc75xx_mdio_read;
823 dev->mii.mdio_write = smsc75xx_mdio_write;
824 dev->mii.phy_id_mask = 0x1f;
825 dev->mii.reg_num_mask = 0x1f;
826 dev->mii.supports_gmii = 1;
827 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
828
829 /* reset phy and wait for reset to complete */
830 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
831
832 do {
833 msleep(10);
834 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
835 if (bmcr < 0) {
836 netdev_warn(dev->net, "Error reading MII_BMCR\n");
837 return bmcr;
838 }
839 timeout++;
840 } while ((bmcr & BMCR_RESET) && (timeout < 100));
841
842 if (timeout >= 100) {
843 netdev_warn(dev->net, "timeout on PHY Reset\n");
844 return -EIO;
845 }
846
847 /* phy workaround for gig link */
848 smsc75xx_phy_gig_workaround(dev);
849
850 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
851 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
852 ADVERTISE_PAUSE_ASYM);
853 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
854 ADVERTISE_1000FULL);
855
856 /* read and write to clear phy interrupt status */
857 ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
858 if (ret < 0) {
859 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n");
860 return ret;
861 }
862
863 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff);
864
865 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
866 PHY_INT_MASK_DEFAULT);
867 mii_nway_restart(&dev->mii);
868
869 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
870 return 0;
871}
872
873static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
874{
875 int ret = 0;
876 u32 buf;
877 bool rxenabled;
878
879 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
880 if (ret < 0) {
881 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
882 return ret;
883 }
884
885 rxenabled = ((buf & MAC_RX_RXEN) != 0);
886
887 if (rxenabled) {
888 buf &= ~MAC_RX_RXEN;
889 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
890 if (ret < 0) {
891 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
892 return ret;
893 }
894 }
895
896 /* add 4 to size for FCS */
897 buf &= ~MAC_RX_MAX_SIZE;
898 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
899
900 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
901 if (ret < 0) {
902 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
903 return ret;
904 }
905
906 if (rxenabled) {
907 buf |= MAC_RX_RXEN;
908 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
909 if (ret < 0) {
910 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
911 return ret;
912 }
913 }
914
915 return 0;
916}
917
918static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
919{
920 struct usbnet *dev = netdev_priv(netdev);
921 int ret;
922
923 ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN);
924 if (ret < 0) {
925 netdev_warn(dev->net, "Failed to set mac rx frame length\n");
926 return ret;
927 }
928
929 return usbnet_change_mtu(netdev, new_mtu);
930}
931
932/* Enable or disable Rx checksum offload engine */
933static int smsc75xx_set_features(struct net_device *netdev,
934 netdev_features_t features)
935{
936 struct usbnet *dev = netdev_priv(netdev);
937 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
938 unsigned long flags;
939 int ret;
940
941 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
942
943 if (features & NETIF_F_RXCSUM)
944 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
945 else
946 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
947
948 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
949 /* it's racing here! */
950
951 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
952 if (ret < 0) {
953 netdev_warn(dev->net, "Error writing RFE_CTL\n");
954 return ret;
955 }
956 return 0;
957}
958
959static int smsc75xx_wait_ready(struct usbnet *dev, int in_pm)
960{
961 int timeout = 0;
962
963 do {
964 u32 buf;
965 int ret;
966
967 ret = __smsc75xx_read_reg(dev, PMT_CTL, &buf, in_pm);
968
969 if (ret < 0) {
970 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
971 return ret;
972 }
973
974 if (buf & PMT_CTL_DEV_RDY)
975 return 0;
976
977 msleep(10);
978 timeout++;
979 } while (timeout < 100);
980
981 netdev_warn(dev->net, "timeout waiting for device ready\n");
982 return -EIO;
983}
984
985static int smsc75xx_phy_gig_workaround(struct usbnet *dev)
986{
987 struct mii_if_info *mii = &dev->mii;
988 int ret = 0, timeout = 0;
989 u32 buf, link_up = 0;
990
991 /* Set the phy in Gig loopback */
992 smsc75xx_mdio_write(dev->net, mii->phy_id, MII_BMCR, 0x4040);
993
994 /* Wait for the link up */
995 do {
996 link_up = smsc75xx_link_ok_nopm(dev);
997 usleep_range(10000, 20000);
998 timeout++;
999 } while ((!link_up) && (timeout < 1000));
1000
1001 if (timeout >= 1000) {
1002 netdev_warn(dev->net, "Timeout waiting for PHY link up\n");
1003 return -EIO;
1004 }
1005
1006 /* phy reset */
1007 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1008 if (ret < 0) {
1009 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1010 return ret;
1011 }
1012
1013 buf |= PMT_CTL_PHY_RST;
1014
1015 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
1016 if (ret < 0) {
1017 netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret);
1018 return ret;
1019 }
1020
1021 timeout = 0;
1022 do {
1023 usleep_range(10000, 20000);
1024 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1025 if (ret < 0) {
1026 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n",
1027 ret);
1028 return ret;
1029 }
1030 timeout++;
1031 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
1032
1033 if (timeout >= 100) {
1034 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
1035 return -EIO;
1036 }
1037
1038 return 0;
1039}
1040
1041static int smsc75xx_reset(struct usbnet *dev)
1042{
1043 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1044 u32 buf;
1045 int ret = 0, timeout;
1046
1047 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset\n");
1048
1049 ret = smsc75xx_wait_ready(dev, 0);
1050 if (ret < 0) {
1051 netdev_warn(dev->net, "device not ready in smsc75xx_reset\n");
1052 return ret;
1053 }
1054
1055 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1056 if (ret < 0) {
1057 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1058 return ret;
1059 }
1060
1061 buf |= HW_CFG_LRST;
1062
1063 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
1064 if (ret < 0) {
1065 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1066 return ret;
1067 }
1068
1069 timeout = 0;
1070 do {
1071 msleep(10);
1072 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1073 if (ret < 0) {
1074 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1075 return ret;
1076 }
1077 timeout++;
1078 } while ((buf & HW_CFG_LRST) && (timeout < 100));
1079
1080 if (timeout >= 100) {
1081 netdev_warn(dev->net, "timeout on completion of Lite Reset\n");
1082 return -EIO;
1083 }
1084
1085 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY\n");
1086
1087 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1088 if (ret < 0) {
1089 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1090 return ret;
1091 }
1092
1093 buf |= PMT_CTL_PHY_RST;
1094
1095 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
1096 if (ret < 0) {
1097 netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret);
1098 return ret;
1099 }
1100
1101 timeout = 0;
1102 do {
1103 msleep(10);
1104 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1105 if (ret < 0) {
1106 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1107 return ret;
1108 }
1109 timeout++;
1110 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
1111
1112 if (timeout >= 100) {
1113 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
1114 return -EIO;
1115 }
1116
1117 netif_dbg(dev, ifup, dev->net, "PHY reset complete\n");
1118
1119 ret = smsc75xx_set_mac_address(dev);
1120 if (ret < 0) {
1121 netdev_warn(dev->net, "Failed to set mac address\n");
1122 return ret;
1123 }
1124
1125 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
1126 dev->net->dev_addr);
1127
1128 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1129 if (ret < 0) {
1130 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1131 return ret;
1132 }
1133
1134 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
1135 buf);
1136
1137 buf |= HW_CFG_BIR;
1138
1139 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
1140 if (ret < 0) {
1141 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1142 return ret;
1143 }
1144
1145 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1146 if (ret < 0) {
1147 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1148 return ret;
1149 }
1150
1151 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after writing HW_CFG_BIR: 0x%08x\n",
1152 buf);
1153
1154 if (!turbo_mode) {
1155 buf = 0;
1156 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
1157 } else if (dev->udev->speed == USB_SPEED_HIGH) {
1158 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
1159 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
1160 } else {
1161 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
1162 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
1163 }
1164
1165 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
1166 (ulong)dev->rx_urb_size);
1167
1168 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
1169 if (ret < 0) {
1170 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
1171 return ret;
1172 }
1173
1174 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
1175 if (ret < 0) {
1176 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret);
1177 return ret;
1178 }
1179
1180 netif_dbg(dev, ifup, dev->net,
1181 "Read Value from BURST_CAP after writing: 0x%08x\n", buf);
1182
1183 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
1184 if (ret < 0) {
1185 netdev_warn(dev->net, "Failed to write BULK_IN_DLY: %d\n", ret);
1186 return ret;
1187 }
1188
1189 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
1190 if (ret < 0) {
1191 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret);
1192 return ret;
1193 }
1194
1195 netif_dbg(dev, ifup, dev->net,
1196 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", buf);
1197
1198 if (turbo_mode) {
1199 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1200 if (ret < 0) {
1201 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1202 return ret;
1203 }
1204
1205 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf);
1206
1207 buf |= (HW_CFG_MEF | HW_CFG_BCE);
1208
1209 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
1210 if (ret < 0) {
1211 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1212 return ret;
1213 }
1214
1215 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1216 if (ret < 0) {
1217 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1218 return ret;
1219 }
1220
1221 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf);
1222 }
1223
1224 /* set FIFO sizes */
1225 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
1226 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
1227 if (ret < 0) {
1228 netdev_warn(dev->net, "Failed to write FCT_RX_FIFO_END: %d\n", ret);
1229 return ret;
1230 }
1231
1232 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x\n", buf);
1233
1234 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
1235 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
1236 if (ret < 0) {
1237 netdev_warn(dev->net, "Failed to write FCT_TX_FIFO_END: %d\n", ret);
1238 return ret;
1239 }
1240
1241 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x\n", buf);
1242
1243 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
1244 if (ret < 0) {
1245 netdev_warn(dev->net, "Failed to write INT_STS: %d\n", ret);
1246 return ret;
1247 }
1248
1249 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
1250 if (ret < 0) {
1251 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
1252 return ret;
1253 }
1254
1255 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", buf);
1256
1257 ret = smsc75xx_read_reg(dev, E2P_CMD, &buf);
1258 if (ret < 0) {
1259 netdev_warn(dev->net, "Failed to read E2P_CMD: %d\n", ret);
1260 return ret;
1261 }
1262
1263 /* only set default GPIO/LED settings if no EEPROM is detected */
1264 if (!(buf & E2P_CMD_LOADED)) {
1265 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
1266 if (ret < 0) {
1267 netdev_warn(dev->net, "Failed to read LED_GPIO_CFG: %d\n", ret);
1268 return ret;
1269 }
1270
1271 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
1272 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
1273
1274 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
1275 if (ret < 0) {
1276 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG: %d\n", ret);
1277 return ret;
1278 }
1279 }
1280
1281 ret = smsc75xx_write_reg(dev, FLOW, 0);
1282 if (ret < 0) {
1283 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
1284 return ret;
1285 }
1286
1287 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
1288 if (ret < 0) {
1289 netdev_warn(dev->net, "Failed to write FCT_FLOW: %d\n", ret);
1290 return ret;
1291 }
1292
1293 /* Don't need rfe_ctl_lock during initialisation */
1294 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
1295 if (ret < 0) {
1296 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret);
1297 return ret;
1298 }
1299
1300 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
1301
1302 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1303 if (ret < 0) {
1304 netdev_warn(dev->net, "Failed to write RFE_CTL: %d\n", ret);
1305 return ret;
1306 }
1307
1308 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
1309 if (ret < 0) {
1310 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret);
1311 return ret;
1312 }
1313
1314 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x\n",
1315 pdata->rfe_ctl);
1316
1317 /* Enable or disable checksum offload engines */
1318 smsc75xx_set_features(dev->net, dev->net->features);
1319
1320 smsc75xx_set_multicast(dev->net);
1321
1322 ret = smsc75xx_phy_initialize(dev);
1323 if (ret < 0) {
1324 netdev_warn(dev->net, "Failed to initialize PHY: %d\n", ret);
1325 return ret;
1326 }
1327
1328 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
1329 if (ret < 0) {
1330 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
1331 return ret;
1332 }
1333
1334 /* enable PHY interrupts */
1335 buf |= INT_ENP_PHY_INT;
1336
1337 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
1338 if (ret < 0) {
1339 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
1340 return ret;
1341 }
1342
1343 /* allow mac to detect speed and duplex from phy */
1344 ret = smsc75xx_read_reg(dev, MAC_CR, &buf);
1345 if (ret < 0) {
1346 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
1347 return ret;
1348 }
1349
1350 buf |= (MAC_CR_ADD | MAC_CR_ASD);
1351 ret = smsc75xx_write_reg(dev, MAC_CR, buf);
1352 if (ret < 0) {
1353 netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret);
1354 return ret;
1355 }
1356
1357 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
1358 if (ret < 0) {
1359 netdev_warn(dev->net, "Failed to read MAC_TX: %d\n", ret);
1360 return ret;
1361 }
1362
1363 buf |= MAC_TX_TXEN;
1364
1365 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
1366 if (ret < 0) {
1367 netdev_warn(dev->net, "Failed to write MAC_TX: %d\n", ret);
1368 return ret;
1369 }
1370
1371 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x\n", buf);
1372
1373 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
1374 if (ret < 0) {
1375 netdev_warn(dev->net, "Failed to read FCT_TX_CTL: %d\n", ret);
1376 return ret;
1377 }
1378
1379 buf |= FCT_TX_CTL_EN;
1380
1381 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
1382 if (ret < 0) {
1383 netdev_warn(dev->net, "Failed to write FCT_TX_CTL: %d\n", ret);
1384 return ret;
1385 }
1386
1387 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x\n", buf);
1388
1389 ret = smsc75xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN);
1390 if (ret < 0) {
1391 netdev_warn(dev->net, "Failed to set max rx frame length\n");
1392 return ret;
1393 }
1394
1395 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
1396 if (ret < 0) {
1397 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
1398 return ret;
1399 }
1400
1401 buf |= MAC_RX_RXEN;
1402
1403 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
1404 if (ret < 0) {
1405 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
1406 return ret;
1407 }
1408
1409 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x\n", buf);
1410
1411 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
1412 if (ret < 0) {
1413 netdev_warn(dev->net, "Failed to read FCT_RX_CTL: %d\n", ret);
1414 return ret;
1415 }
1416
1417 buf |= FCT_RX_CTL_EN;
1418
1419 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
1420 if (ret < 0) {
1421 netdev_warn(dev->net, "Failed to write FCT_RX_CTL: %d\n", ret);
1422 return ret;
1423 }
1424
1425 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x\n", buf);
1426
1427 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0\n");
1428 return 0;
1429}
1430
1431static const struct net_device_ops smsc75xx_netdev_ops = {
1432 .ndo_open = usbnet_open,
1433 .ndo_stop = usbnet_stop,
1434 .ndo_start_xmit = usbnet_start_xmit,
1435 .ndo_tx_timeout = usbnet_tx_timeout,
1436 .ndo_get_stats64 = dev_get_tstats64,
1437 .ndo_change_mtu = smsc75xx_change_mtu,
1438 .ndo_set_mac_address = eth_mac_addr,
1439 .ndo_validate_addr = eth_validate_addr,
1440 .ndo_eth_ioctl = smsc75xx_ioctl,
1441 .ndo_set_rx_mode = smsc75xx_set_multicast,
1442 .ndo_set_features = smsc75xx_set_features,
1443};
1444
1445static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1446{
1447 struct smsc75xx_priv *pdata = NULL;
1448 int ret;
1449
1450 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1451
1452 ret = usbnet_get_endpoints(dev, intf);
1453 if (ret < 0) {
1454 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1455 return ret;
1456 }
1457
1458 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
1459 GFP_KERNEL);
1460
1461 pdata = (struct smsc75xx_priv *)(dev->data[0]);
1462 if (!pdata)
1463 return -ENOMEM;
1464
1465 pdata->dev = dev;
1466
1467 spin_lock_init(&pdata->rfe_ctl_lock);
1468 mutex_init(&pdata->dataport_mutex);
1469
1470 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1471
1472 if (DEFAULT_TX_CSUM_ENABLE)
1473 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1474
1475 if (DEFAULT_RX_CSUM_ENABLE)
1476 dev->net->features |= NETIF_F_RXCSUM;
1477
1478 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1479 NETIF_F_RXCSUM;
1480
1481 ret = smsc75xx_wait_ready(dev, 0);
1482 if (ret < 0) {
1483 netdev_warn(dev->net, "device not ready in smsc75xx_bind\n");
1484 goto free_pdata;
1485 }
1486
1487 smsc75xx_init_mac_address(dev);
1488
1489 /* Init all registers */
1490 ret = smsc75xx_reset(dev);
1491 if (ret < 0) {
1492 netdev_warn(dev->net, "smsc75xx_reset error %d\n", ret);
1493 goto cancel_work;
1494 }
1495
1496 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1497 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1498 dev->net->flags |= IFF_MULTICAST;
1499 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
1500 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
1501 dev->net->max_mtu = MAX_SINGLE_PACKET_SIZE;
1502 return 0;
1503
1504cancel_work:
1505 cancel_work_sync(&pdata->set_multicast);
1506free_pdata:
1507 kfree(pdata);
1508 dev->data[0] = 0;
1509 return ret;
1510}
1511
1512static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1513{
1514 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1515 if (pdata) {
1516 cancel_work_sync(&pdata->set_multicast);
1517 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
1518 kfree(pdata);
1519 dev->data[0] = 0;
1520 }
1521}
1522
1523static u16 smsc_crc(const u8 *buffer, size_t len)
1524{
1525 return bitrev16(crc16(0xFFFF, buffer, len));
1526}
1527
1528static int smsc75xx_write_wuff(struct usbnet *dev, int filter, u32 wuf_cfg,
1529 u32 wuf_mask1)
1530{
1531 int cfg_base = WUF_CFGX + filter * 4;
1532 int mask_base = WUF_MASKX + filter * 16;
1533 int ret;
1534
1535 ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg);
1536 if (ret < 0) {
1537 netdev_warn(dev->net, "Error writing WUF_CFGX\n");
1538 return ret;
1539 }
1540
1541 ret = smsc75xx_write_reg(dev, mask_base, wuf_mask1);
1542 if (ret < 0) {
1543 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1544 return ret;
1545 }
1546
1547 ret = smsc75xx_write_reg(dev, mask_base + 4, 0);
1548 if (ret < 0) {
1549 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1550 return ret;
1551 }
1552
1553 ret = smsc75xx_write_reg(dev, mask_base + 8, 0);
1554 if (ret < 0) {
1555 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1556 return ret;
1557 }
1558
1559 ret = smsc75xx_write_reg(dev, mask_base + 12, 0);
1560 if (ret < 0) {
1561 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1562 return ret;
1563 }
1564
1565 return 0;
1566}
1567
1568static int smsc75xx_enter_suspend0(struct usbnet *dev)
1569{
1570 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1571 u32 val;
1572 int ret;
1573
1574 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1575 if (ret < 0) {
1576 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1577 return ret;
1578 }
1579
1580 val &= (~(PMT_CTL_SUS_MODE | PMT_CTL_PHY_RST));
1581 val |= PMT_CTL_SUS_MODE_0 | PMT_CTL_WOL_EN | PMT_CTL_WUPS;
1582
1583 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1584 if (ret < 0) {
1585 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1586 return ret;
1587 }
1588
1589 pdata->suspend_flags |= SUSPEND_SUSPEND0;
1590
1591 return 0;
1592}
1593
1594static int smsc75xx_enter_suspend1(struct usbnet *dev)
1595{
1596 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1597 u32 val;
1598 int ret;
1599
1600 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1601 if (ret < 0) {
1602 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1603 return ret;
1604 }
1605
1606 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1607 val |= PMT_CTL_SUS_MODE_1;
1608
1609 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1610 if (ret < 0) {
1611 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1612 return ret;
1613 }
1614
1615 /* clear wol status, enable energy detection */
1616 val &= ~PMT_CTL_WUPS;
1617 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN);
1618
1619 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1620 if (ret < 0) {
1621 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1622 return ret;
1623 }
1624
1625 pdata->suspend_flags |= SUSPEND_SUSPEND1;
1626
1627 return 0;
1628}
1629
1630static int smsc75xx_enter_suspend2(struct usbnet *dev)
1631{
1632 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1633 u32 val;
1634 int ret;
1635
1636 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1637 if (ret < 0) {
1638 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1639 return ret;
1640 }
1641
1642 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1643 val |= PMT_CTL_SUS_MODE_2;
1644
1645 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1646 if (ret < 0) {
1647 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1648 return ret;
1649 }
1650
1651 pdata->suspend_flags |= SUSPEND_SUSPEND2;
1652
1653 return 0;
1654}
1655
1656static int smsc75xx_enter_suspend3(struct usbnet *dev)
1657{
1658 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1659 u32 val;
1660 int ret;
1661
1662 ret = smsc75xx_read_reg_nopm(dev, FCT_RX_CTL, &val);
1663 if (ret < 0) {
1664 netdev_warn(dev->net, "Error reading FCT_RX_CTL\n");
1665 return ret;
1666 }
1667
1668 if (val & FCT_RX_CTL_RXUSED) {
1669 netdev_dbg(dev->net, "rx fifo not empty in autosuspend\n");
1670 return -EBUSY;
1671 }
1672
1673 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1674 if (ret < 0) {
1675 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1676 return ret;
1677 }
1678
1679 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1680 val |= PMT_CTL_SUS_MODE_3 | PMT_CTL_RES_CLR_WKP_EN;
1681
1682 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1683 if (ret < 0) {
1684 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1685 return ret;
1686 }
1687
1688 /* clear wol status */
1689 val &= ~PMT_CTL_WUPS;
1690 val |= PMT_CTL_WUPS_WOL;
1691
1692 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1693 if (ret < 0) {
1694 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1695 return ret;
1696 }
1697
1698 pdata->suspend_flags |= SUSPEND_SUSPEND3;
1699
1700 return 0;
1701}
1702
1703static int smsc75xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
1704{
1705 struct mii_if_info *mii = &dev->mii;
1706 int ret;
1707
1708 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
1709
1710 /* read to clear */
1711 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
1712 if (ret < 0) {
1713 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n");
1714 return ret;
1715 }
1716
1717 /* enable interrupt source */
1718 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
1719 if (ret < 0) {
1720 netdev_warn(dev->net, "Error reading PHY_INT_MASK\n");
1721 return ret;
1722 }
1723
1724 ret |= mask;
1725
1726 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
1727
1728 return 0;
1729}
1730
1731static int smsc75xx_link_ok_nopm(struct usbnet *dev)
1732{
1733 struct mii_if_info *mii = &dev->mii;
1734 int ret;
1735
1736 /* first, a dummy read, needed to latch some MII phys */
1737 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
1738 if (ret < 0) {
1739 netdev_warn(dev->net, "Error reading MII_BMSR\n");
1740 return ret;
1741 }
1742
1743 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
1744 if (ret < 0) {
1745 netdev_warn(dev->net, "Error reading MII_BMSR\n");
1746 return ret;
1747 }
1748
1749 return !!(ret & BMSR_LSTATUS);
1750}
1751
1752static int smsc75xx_autosuspend(struct usbnet *dev, u32 link_up)
1753{
1754 int ret;
1755
1756 if (!netif_running(dev->net)) {
1757 /* interface is ifconfig down so fully power down hw */
1758 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
1759 return smsc75xx_enter_suspend2(dev);
1760 }
1761
1762 if (!link_up) {
1763 /* link is down so enter EDPD mode */
1764 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
1765
1766 /* enable PHY wakeup events for if cable is attached */
1767 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1768 PHY_INT_MASK_ANEG_COMP);
1769 if (ret < 0) {
1770 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1771 return ret;
1772 }
1773
1774 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1775 return smsc75xx_enter_suspend1(dev);
1776 }
1777
1778 /* enable PHY wakeup events so we remote wakeup if cable is pulled */
1779 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1780 PHY_INT_MASK_LINK_DOWN);
1781 if (ret < 0) {
1782 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1783 return ret;
1784 }
1785
1786 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
1787 return smsc75xx_enter_suspend3(dev);
1788}
1789
1790static int smsc75xx_suspend(struct usb_interface *intf, pm_message_t message)
1791{
1792 struct usbnet *dev = usb_get_intfdata(intf);
1793 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1794 u32 val, link_up;
1795 int ret;
1796
1797 ret = usbnet_suspend(intf, message);
1798 if (ret < 0) {
1799 netdev_warn(dev->net, "usbnet_suspend error\n");
1800 return ret;
1801 }
1802
1803 if (pdata->suspend_flags) {
1804 netdev_warn(dev->net, "error during last resume\n");
1805 pdata->suspend_flags = 0;
1806 }
1807
1808 /* determine if link is up using only _nopm functions */
1809 link_up = smsc75xx_link_ok_nopm(dev);
1810
1811 if (message.event == PM_EVENT_AUTO_SUSPEND) {
1812 ret = smsc75xx_autosuspend(dev, link_up);
1813 goto done;
1814 }
1815
1816 /* if we get this far we're not autosuspending */
1817 /* if no wol options set, or if link is down and we're not waking on
1818 * PHY activity, enter lowest power SUSPEND2 mode
1819 */
1820 if (!(pdata->wolopts & SUPPORTED_WAKE) ||
1821 !(link_up || (pdata->wolopts & WAKE_PHY))) {
1822 netdev_info(dev->net, "entering SUSPEND2 mode\n");
1823
1824 /* disable energy detect (link up) & wake up events */
1825 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1826 if (ret < 0) {
1827 netdev_warn(dev->net, "Error reading WUCSR\n");
1828 goto done;
1829 }
1830
1831 val &= ~(WUCSR_MPEN | WUCSR_WUEN);
1832
1833 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1834 if (ret < 0) {
1835 netdev_warn(dev->net, "Error writing WUCSR\n");
1836 goto done;
1837 }
1838
1839 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1840 if (ret < 0) {
1841 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1842 goto done;
1843 }
1844
1845 val &= ~(PMT_CTL_ED_EN | PMT_CTL_WOL_EN);
1846
1847 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1848 if (ret < 0) {
1849 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1850 goto done;
1851 }
1852
1853 ret = smsc75xx_enter_suspend2(dev);
1854 goto done;
1855 }
1856
1857 if (pdata->wolopts & WAKE_PHY) {
1858 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1859 (PHY_INT_MASK_ANEG_COMP | PHY_INT_MASK_LINK_DOWN));
1860 if (ret < 0) {
1861 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1862 goto done;
1863 }
1864
1865 /* if link is down then configure EDPD and enter SUSPEND1,
1866 * otherwise enter SUSPEND0 below
1867 */
1868 if (!link_up) {
1869 struct mii_if_info *mii = &dev->mii;
1870 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1871
1872 /* enable energy detect power-down mode */
1873 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id,
1874 PHY_MODE_CTRL_STS);
1875 if (ret < 0) {
1876 netdev_warn(dev->net, "Error reading PHY_MODE_CTRL_STS\n");
1877 goto done;
1878 }
1879
1880 ret |= MODE_CTRL_STS_EDPWRDOWN;
1881
1882 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id,
1883 PHY_MODE_CTRL_STS, ret);
1884
1885 /* enter SUSPEND1 mode */
1886 ret = smsc75xx_enter_suspend1(dev);
1887 goto done;
1888 }
1889 }
1890
1891 if (pdata->wolopts & (WAKE_MCAST | WAKE_ARP)) {
1892 int i, filter = 0;
1893
1894 /* disable all filters */
1895 for (i = 0; i < WUF_NUM; i++) {
1896 ret = smsc75xx_write_reg_nopm(dev, WUF_CFGX + i * 4, 0);
1897 if (ret < 0) {
1898 netdev_warn(dev->net, "Error writing WUF_CFGX\n");
1899 goto done;
1900 }
1901 }
1902
1903 if (pdata->wolopts & WAKE_MCAST) {
1904 const u8 mcast[] = {0x01, 0x00, 0x5E};
1905 netdev_info(dev->net, "enabling multicast detection\n");
1906
1907 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_MULTICAST
1908 | smsc_crc(mcast, 3);
1909 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0007);
1910 if (ret < 0) {
1911 netdev_warn(dev->net, "Error writing wakeup filter\n");
1912 goto done;
1913 }
1914 }
1915
1916 if (pdata->wolopts & WAKE_ARP) {
1917 const u8 arp[] = {0x08, 0x06};
1918 netdev_info(dev->net, "enabling ARP detection\n");
1919
1920 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_ALL | (0x0C << 16)
1921 | smsc_crc(arp, 2);
1922 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0003);
1923 if (ret < 0) {
1924 netdev_warn(dev->net, "Error writing wakeup filter\n");
1925 goto done;
1926 }
1927 }
1928
1929 /* clear any pending pattern match packet status */
1930 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1931 if (ret < 0) {
1932 netdev_warn(dev->net, "Error reading WUCSR\n");
1933 goto done;
1934 }
1935
1936 val |= WUCSR_WUFR;
1937
1938 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1939 if (ret < 0) {
1940 netdev_warn(dev->net, "Error writing WUCSR\n");
1941 goto done;
1942 }
1943
1944 netdev_info(dev->net, "enabling packet match detection\n");
1945 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1946 if (ret < 0) {
1947 netdev_warn(dev->net, "Error reading WUCSR\n");
1948 goto done;
1949 }
1950
1951 val |= WUCSR_WUEN;
1952
1953 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1954 if (ret < 0) {
1955 netdev_warn(dev->net, "Error writing WUCSR\n");
1956 goto done;
1957 }
1958 } else {
1959 netdev_info(dev->net, "disabling packet match detection\n");
1960 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1961 if (ret < 0) {
1962 netdev_warn(dev->net, "Error reading WUCSR\n");
1963 goto done;
1964 }
1965
1966 val &= ~WUCSR_WUEN;
1967
1968 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1969 if (ret < 0) {
1970 netdev_warn(dev->net, "Error writing WUCSR\n");
1971 goto done;
1972 }
1973 }
1974
1975 /* disable magic, bcast & unicast wakeup sources */
1976 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1977 if (ret < 0) {
1978 netdev_warn(dev->net, "Error reading WUCSR\n");
1979 goto done;
1980 }
1981
1982 val &= ~(WUCSR_MPEN | WUCSR_BCST_EN | WUCSR_PFDA_EN);
1983
1984 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1985 if (ret < 0) {
1986 netdev_warn(dev->net, "Error writing WUCSR\n");
1987 goto done;
1988 }
1989
1990 if (pdata->wolopts & WAKE_PHY) {
1991 netdev_info(dev->net, "enabling PHY wakeup\n");
1992
1993 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1994 if (ret < 0) {
1995 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1996 goto done;
1997 }
1998
1999 /* clear wol status, enable energy detection */
2000 val &= ~PMT_CTL_WUPS;
2001 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN);
2002
2003 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
2004 if (ret < 0) {
2005 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2006 goto done;
2007 }
2008 }
2009
2010 if (pdata->wolopts & WAKE_MAGIC) {
2011 netdev_info(dev->net, "enabling magic packet wakeup\n");
2012 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2013 if (ret < 0) {
2014 netdev_warn(dev->net, "Error reading WUCSR\n");
2015 goto done;
2016 }
2017
2018 /* clear any pending magic packet status */
2019 val |= WUCSR_MPR | WUCSR_MPEN;
2020
2021 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2022 if (ret < 0) {
2023 netdev_warn(dev->net, "Error writing WUCSR\n");
2024 goto done;
2025 }
2026 }
2027
2028 if (pdata->wolopts & WAKE_BCAST) {
2029 netdev_info(dev->net, "enabling broadcast detection\n");
2030 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2031 if (ret < 0) {
2032 netdev_warn(dev->net, "Error reading WUCSR\n");
2033 goto done;
2034 }
2035
2036 val |= WUCSR_BCAST_FR | WUCSR_BCST_EN;
2037
2038 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2039 if (ret < 0) {
2040 netdev_warn(dev->net, "Error writing WUCSR\n");
2041 goto done;
2042 }
2043 }
2044
2045 if (pdata->wolopts & WAKE_UCAST) {
2046 netdev_info(dev->net, "enabling unicast detection\n");
2047 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2048 if (ret < 0) {
2049 netdev_warn(dev->net, "Error reading WUCSR\n");
2050 goto done;
2051 }
2052
2053 val |= WUCSR_WUFR | WUCSR_PFDA_EN;
2054
2055 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2056 if (ret < 0) {
2057 netdev_warn(dev->net, "Error writing WUCSR\n");
2058 goto done;
2059 }
2060 }
2061
2062 /* enable receiver to enable frame reception */
2063 ret = smsc75xx_read_reg_nopm(dev, MAC_RX, &val);
2064 if (ret < 0) {
2065 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
2066 goto done;
2067 }
2068
2069 val |= MAC_RX_RXEN;
2070
2071 ret = smsc75xx_write_reg_nopm(dev, MAC_RX, val);
2072 if (ret < 0) {
2073 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
2074 goto done;
2075 }
2076
2077 /* some wol options are enabled, so enter SUSPEND0 */
2078 netdev_info(dev->net, "entering SUSPEND0 mode\n");
2079 ret = smsc75xx_enter_suspend0(dev);
2080
2081done:
2082 /*
2083 * TODO: resume() might need to handle the suspend failure
2084 * in system sleep
2085 */
2086 if (ret && PMSG_IS_AUTO(message))
2087 usbnet_resume(intf);
2088 return ret;
2089}
2090
2091static int smsc75xx_resume(struct usb_interface *intf)
2092{
2093 struct usbnet *dev = usb_get_intfdata(intf);
2094 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
2095 u8 suspend_flags = pdata->suspend_flags;
2096 int ret;
2097 u32 val;
2098
2099 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
2100
2101 /* do this first to ensure it's cleared even in error case */
2102 pdata->suspend_flags = 0;
2103
2104 if (suspend_flags & SUSPEND_ALLMODES) {
2105 /* Disable wakeup sources */
2106 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2107 if (ret < 0) {
2108 netdev_warn(dev->net, "Error reading WUCSR\n");
2109 return ret;
2110 }
2111
2112 val &= ~(WUCSR_WUEN | WUCSR_MPEN | WUCSR_PFDA_EN
2113 | WUCSR_BCST_EN);
2114
2115 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2116 if (ret < 0) {
2117 netdev_warn(dev->net, "Error writing WUCSR\n");
2118 return ret;
2119 }
2120
2121 /* clear wake-up status */
2122 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
2123 if (ret < 0) {
2124 netdev_warn(dev->net, "Error reading PMT_CTL\n");
2125 return ret;
2126 }
2127
2128 val &= ~PMT_CTL_WOL_EN;
2129 val |= PMT_CTL_WUPS;
2130
2131 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
2132 if (ret < 0) {
2133 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2134 return ret;
2135 }
2136 }
2137
2138 if (suspend_flags & SUSPEND_SUSPEND2) {
2139 netdev_info(dev->net, "resuming from SUSPEND2\n");
2140
2141 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
2142 if (ret < 0) {
2143 netdev_warn(dev->net, "Error reading PMT_CTL\n");
2144 return ret;
2145 }
2146
2147 val |= PMT_CTL_PHY_PWRUP;
2148
2149 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
2150 if (ret < 0) {
2151 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2152 return ret;
2153 }
2154 }
2155
2156 ret = smsc75xx_wait_ready(dev, 1);
2157 if (ret < 0) {
2158 netdev_warn(dev->net, "device not ready in smsc75xx_resume\n");
2159 return ret;
2160 }
2161
2162 return usbnet_resume(intf);
2163}
2164
2165static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
2166 u32 rx_cmd_a, u32 rx_cmd_b)
2167{
2168 if (!(dev->net->features & NETIF_F_RXCSUM) ||
2169 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
2170 skb->ip_summed = CHECKSUM_NONE;
2171 } else {
2172 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
2173 skb->ip_summed = CHECKSUM_COMPLETE;
2174 }
2175}
2176
2177static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
2178{
2179 /* This check is no longer done by usbnet */
2180 if (skb->len < dev->net->hard_header_len)
2181 return 0;
2182
2183 while (skb->len > 0) {
2184 u32 rx_cmd_a, rx_cmd_b, align_count, size;
2185 struct sk_buff *ax_skb;
2186 unsigned char *packet;
2187
2188 rx_cmd_a = get_unaligned_le32(skb->data);
2189 skb_pull(skb, 4);
2190
2191 rx_cmd_b = get_unaligned_le32(skb->data);
2192 skb_pull(skb, 4 + RXW_PADDING);
2193
2194 packet = skb->data;
2195
2196 /* get the packet length */
2197 size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING;
2198 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
2199
2200 if (unlikely(size > skb->len)) {
2201 netif_dbg(dev, rx_err, dev->net,
2202 "size err rx_cmd_a=0x%08x\n",
2203 rx_cmd_a);
2204 return 0;
2205 }
2206
2207 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
2208 netif_dbg(dev, rx_err, dev->net,
2209 "Error rx_cmd_a=0x%08x\n", rx_cmd_a);
2210 dev->net->stats.rx_errors++;
2211 dev->net->stats.rx_dropped++;
2212
2213 if (rx_cmd_a & RX_CMD_A_FCS)
2214 dev->net->stats.rx_crc_errors++;
2215 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
2216 dev->net->stats.rx_frame_errors++;
2217 } else {
2218 /* MAX_SINGLE_PACKET_SIZE + 4(CRC) + 2(COE) + 4(Vlan) */
2219 if (unlikely(size > (MAX_SINGLE_PACKET_SIZE + ETH_HLEN + 12))) {
2220 netif_dbg(dev, rx_err, dev->net,
2221 "size err rx_cmd_a=0x%08x\n",
2222 rx_cmd_a);
2223 return 0;
2224 }
2225
2226 /* last frame in this batch */
2227 if (skb->len == size) {
2228 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
2229 rx_cmd_b);
2230
2231 skb_trim(skb, skb->len - 4); /* remove fcs */
2232
2233 return 1;
2234 }
2235
2236 /* Use "size - 4" to remove fcs */
2237 ax_skb = netdev_alloc_skb_ip_align(dev->net, size - 4);
2238 if (unlikely(!ax_skb)) {
2239 netdev_warn(dev->net, "Error allocating skb\n");
2240 return 0;
2241 }
2242
2243 skb_put(ax_skb, size - 4);
2244 memcpy(ax_skb->data, packet, size - 4);
2245
2246 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
2247 rx_cmd_b);
2248
2249 usbnet_skb_return(dev, ax_skb);
2250 }
2251
2252 skb_pull(skb, size);
2253
2254 /* padding bytes before the next frame starts */
2255 if (skb->len)
2256 skb_pull(skb, align_count);
2257 }
2258
2259 return 1;
2260}
2261
2262static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
2263 struct sk_buff *skb, gfp_t flags)
2264{
2265 u32 tx_cmd_a, tx_cmd_b;
2266 void *ptr;
2267
2268 if (skb_cow_head(skb, SMSC75XX_TX_OVERHEAD)) {
2269 dev_kfree_skb_any(skb);
2270 return NULL;
2271 }
2272
2273 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
2274
2275 if (skb->ip_summed == CHECKSUM_PARTIAL)
2276 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
2277
2278 if (skb_is_gso(skb)) {
2279 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
2280 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
2281
2282 tx_cmd_a |= TX_CMD_A_LSO;
2283 } else {
2284 tx_cmd_b = 0;
2285 }
2286
2287 ptr = skb_push(skb, 8);
2288 put_unaligned_le32(tx_cmd_a, ptr);
2289 put_unaligned_le32(tx_cmd_b, ptr + 4);
2290
2291 return skb;
2292}
2293
2294static int smsc75xx_manage_power(struct usbnet *dev, int on)
2295{
2296 dev->intf->needs_remote_wakeup = on;
2297 return 0;
2298}
2299
2300static const struct driver_info smsc75xx_info = {
2301 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
2302 .bind = smsc75xx_bind,
2303 .unbind = smsc75xx_unbind,
2304 .link_reset = smsc75xx_link_reset,
2305 .reset = smsc75xx_reset,
2306 .rx_fixup = smsc75xx_rx_fixup,
2307 .tx_fixup = smsc75xx_tx_fixup,
2308 .status = smsc75xx_status,
2309 .manage_power = smsc75xx_manage_power,
2310 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
2311};
2312
2313static const struct usb_device_id products[] = {
2314 {
2315 /* SMSC7500 USB Gigabit Ethernet Device */
2316 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
2317 .driver_info = (unsigned long) &smsc75xx_info,
2318 },
2319 {
2320 /* SMSC7500 USB Gigabit Ethernet Device */
2321 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
2322 .driver_info = (unsigned long) &smsc75xx_info,
2323 },
2324 { }, /* END */
2325};
2326MODULE_DEVICE_TABLE(usb, products);
2327
2328static struct usb_driver smsc75xx_driver = {
2329 .name = SMSC_CHIPNAME,
2330 .id_table = products,
2331 .probe = usbnet_probe,
2332 .suspend = smsc75xx_suspend,
2333 .resume = smsc75xx_resume,
2334 .reset_resume = smsc75xx_resume,
2335 .disconnect = usbnet_disconnect,
2336 .disable_hub_initiated_lpm = 1,
2337 .supports_autosuspend = 1,
2338};
2339
2340module_usb_driver(smsc75xx_driver);
2341
2342MODULE_AUTHOR("Nancy Lin");
2343MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
2344MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
2345MODULE_LICENSE("GPL");