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1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2010 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
18 *
19 *****************************************************************************/
20
21#include <linux/module.h>
22#include <linux/kmod.h>
23#include <linux/init.h>
24#include <linux/netdevice.h>
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/mii.h>
28#include <linux/usb.h>
29#include <linux/crc32.h>
30#include <linux/usb/usbnet.h>
31#include <linux/slab.h>
32#include "smsc75xx.h"
33
34#define SMSC_CHIPNAME "smsc75xx"
35#define SMSC_DRIVER_VERSION "1.0.0"
36#define HS_USB_PKT_SIZE (512)
37#define FS_USB_PKT_SIZE (64)
38#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
39#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
40#define DEFAULT_BULK_IN_DELAY (0x00002000)
41#define MAX_SINGLE_PACKET_SIZE (9000)
42#define LAN75XX_EEPROM_MAGIC (0x7500)
43#define EEPROM_MAC_OFFSET (0x01)
44#define DEFAULT_TX_CSUM_ENABLE (true)
45#define DEFAULT_RX_CSUM_ENABLE (true)
46#define DEFAULT_TSO_ENABLE (true)
47#define SMSC75XX_INTERNAL_PHY_ID (1)
48#define SMSC75XX_TX_OVERHEAD (8)
49#define MAX_RX_FIFO_SIZE (20 * 1024)
50#define MAX_TX_FIFO_SIZE (12 * 1024)
51#define USB_VENDOR_ID_SMSC (0x0424)
52#define USB_PRODUCT_ID_LAN7500 (0x7500)
53#define USB_PRODUCT_ID_LAN7505 (0x7505)
54
55#define check_warn(ret, fmt, args...) \
56 ({ if (ret < 0) netdev_warn(dev->net, fmt, ##args); })
57
58#define check_warn_return(ret, fmt, args...) \
59 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); return ret; } })
60
61#define check_warn_goto_done(ret, fmt, args...) \
62 ({ if (ret < 0) { netdev_warn(dev->net, fmt, ##args); goto done; } })
63
64struct smsc75xx_priv {
65 struct usbnet *dev;
66 u32 rfe_ctl;
67 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
68 struct mutex dataport_mutex;
69 spinlock_t rfe_ctl_lock;
70 struct work_struct set_multicast;
71};
72
73struct usb_context {
74 struct usb_ctrlrequest req;
75 struct usbnet *dev;
76};
77
78static int turbo_mode = true;
79module_param(turbo_mode, bool, 0644);
80MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
81
82static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
83 u32 *data)
84{
85 u32 *buf = kmalloc(4, GFP_KERNEL);
86 int ret;
87
88 BUG_ON(!dev);
89
90 if (!buf)
91 return -ENOMEM;
92
93 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0),
94 USB_VENDOR_REQUEST_READ_REGISTER,
95 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
96 00, index, buf, 4, USB_CTRL_GET_TIMEOUT);
97
98 if (unlikely(ret < 0))
99 netdev_warn(dev->net,
100 "Failed to read register index 0x%08x", index);
101
102 le32_to_cpus(buf);
103 *data = *buf;
104 kfree(buf);
105
106 return ret;
107}
108
109static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
110 u32 data)
111{
112 u32 *buf = kmalloc(4, GFP_KERNEL);
113 int ret;
114
115 BUG_ON(!dev);
116
117 if (!buf)
118 return -ENOMEM;
119
120 *buf = data;
121 cpu_to_le32s(buf);
122
123 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
124 USB_VENDOR_REQUEST_WRITE_REGISTER,
125 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
126 00, index, buf, 4, USB_CTRL_SET_TIMEOUT);
127
128 if (unlikely(ret < 0))
129 netdev_warn(dev->net,
130 "Failed to write register index 0x%08x", index);
131
132 kfree(buf);
133
134 return ret;
135}
136
137/* Loop until the read is completed with timeout
138 * called with phy_mutex held */
139static int smsc75xx_phy_wait_not_busy(struct usbnet *dev)
140{
141 unsigned long start_time = jiffies;
142 u32 val;
143 int ret;
144
145 do {
146 ret = smsc75xx_read_reg(dev, MII_ACCESS, &val);
147 check_warn_return(ret, "Error reading MII_ACCESS");
148
149 if (!(val & MII_ACCESS_BUSY))
150 return 0;
151 } while (!time_after(jiffies, start_time + HZ));
152
153 return -EIO;
154}
155
156static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
157{
158 struct usbnet *dev = netdev_priv(netdev);
159 u32 val, addr;
160 int ret;
161
162 mutex_lock(&dev->phy_mutex);
163
164 /* confirm MII not busy */
165 ret = smsc75xx_phy_wait_not_busy(dev);
166 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_read");
167
168 /* set the address, index & direction (read from PHY) */
169 phy_id &= dev->mii.phy_id_mask;
170 idx &= dev->mii.reg_num_mask;
171 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
172 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
173 | MII_ACCESS_READ;
174 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
175 check_warn_goto_done(ret, "Error writing MII_ACCESS");
176
177 ret = smsc75xx_phy_wait_not_busy(dev);
178 check_warn_goto_done(ret, "Timed out reading MII reg %02X", idx);
179
180 ret = smsc75xx_read_reg(dev, MII_DATA, &val);
181 check_warn_goto_done(ret, "Error reading MII_DATA");
182
183 ret = (u16)(val & 0xFFFF);
184
185done:
186 mutex_unlock(&dev->phy_mutex);
187 return ret;
188}
189
190static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
191 int regval)
192{
193 struct usbnet *dev = netdev_priv(netdev);
194 u32 val, addr;
195 int ret;
196
197 mutex_lock(&dev->phy_mutex);
198
199 /* confirm MII not busy */
200 ret = smsc75xx_phy_wait_not_busy(dev);
201 check_warn_goto_done(ret, "MII is busy in smsc75xx_mdio_write");
202
203 val = regval;
204 ret = smsc75xx_write_reg(dev, MII_DATA, val);
205 check_warn_goto_done(ret, "Error writing MII_DATA");
206
207 /* set the address, index & direction (write to PHY) */
208 phy_id &= dev->mii.phy_id_mask;
209 idx &= dev->mii.reg_num_mask;
210 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
211 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
212 | MII_ACCESS_WRITE;
213 ret = smsc75xx_write_reg(dev, MII_ACCESS, addr);
214 check_warn_goto_done(ret, "Error writing MII_ACCESS");
215
216 ret = smsc75xx_phy_wait_not_busy(dev);
217 check_warn_goto_done(ret, "Timed out writing MII reg %02X", idx);
218
219done:
220 mutex_unlock(&dev->phy_mutex);
221}
222
223static int smsc75xx_wait_eeprom(struct usbnet *dev)
224{
225 unsigned long start_time = jiffies;
226 u32 val;
227 int ret;
228
229 do {
230 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
231 check_warn_return(ret, "Error reading E2P_CMD");
232
233 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
234 break;
235 udelay(40);
236 } while (!time_after(jiffies, start_time + HZ));
237
238 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
239 netdev_warn(dev->net, "EEPROM read operation timeout");
240 return -EIO;
241 }
242
243 return 0;
244}
245
246static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
247{
248 unsigned long start_time = jiffies;
249 u32 val;
250 int ret;
251
252 do {
253 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
254 check_warn_return(ret, "Error reading E2P_CMD");
255
256 if (!(val & E2P_CMD_BUSY))
257 return 0;
258
259 udelay(40);
260 } while (!time_after(jiffies, start_time + HZ));
261
262 netdev_warn(dev->net, "EEPROM is busy");
263 return -EIO;
264}
265
266static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
267 u8 *data)
268{
269 u32 val;
270 int i, ret;
271
272 BUG_ON(!dev);
273 BUG_ON(!data);
274
275 ret = smsc75xx_eeprom_confirm_not_busy(dev);
276 if (ret)
277 return ret;
278
279 for (i = 0; i < length; i++) {
280 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
281 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
282 check_warn_return(ret, "Error writing E2P_CMD");
283
284 ret = smsc75xx_wait_eeprom(dev);
285 if (ret < 0)
286 return ret;
287
288 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
289 check_warn_return(ret, "Error reading E2P_DATA");
290
291 data[i] = val & 0xFF;
292 offset++;
293 }
294
295 return 0;
296}
297
298static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
299 u8 *data)
300{
301 u32 val;
302 int i, ret;
303
304 BUG_ON(!dev);
305 BUG_ON(!data);
306
307 ret = smsc75xx_eeprom_confirm_not_busy(dev);
308 if (ret)
309 return ret;
310
311 /* Issue write/erase enable command */
312 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
313 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
314 check_warn_return(ret, "Error writing E2P_CMD");
315
316 ret = smsc75xx_wait_eeprom(dev);
317 if (ret < 0)
318 return ret;
319
320 for (i = 0; i < length; i++) {
321
322 /* Fill data register */
323 val = data[i];
324 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
325 check_warn_return(ret, "Error writing E2P_DATA");
326
327 /* Send "write" command */
328 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
329 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
330 check_warn_return(ret, "Error writing E2P_CMD");
331
332 ret = smsc75xx_wait_eeprom(dev);
333 if (ret < 0)
334 return ret;
335
336 offset++;
337 }
338
339 return 0;
340}
341
342static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
343{
344 int i, ret;
345
346 for (i = 0; i < 100; i++) {
347 u32 dp_sel;
348 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
349 check_warn_return(ret, "Error reading DP_SEL");
350
351 if (dp_sel & DP_SEL_DPRDY)
352 return 0;
353
354 udelay(40);
355 }
356
357 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out");
358
359 return -EIO;
360}
361
362static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
363 u32 length, u32 *buf)
364{
365 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
366 u32 dp_sel;
367 int i, ret;
368
369 mutex_lock(&pdata->dataport_mutex);
370
371 ret = smsc75xx_dataport_wait_not_busy(dev);
372 check_warn_goto_done(ret, "smsc75xx_dataport_write busy on entry");
373
374 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
375 check_warn_goto_done(ret, "Error reading DP_SEL");
376
377 dp_sel &= ~DP_SEL_RSEL;
378 dp_sel |= ram_select;
379 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
380 check_warn_goto_done(ret, "Error writing DP_SEL");
381
382 for (i = 0; i < length; i++) {
383 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
384 check_warn_goto_done(ret, "Error writing DP_ADDR");
385
386 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
387 check_warn_goto_done(ret, "Error writing DP_DATA");
388
389 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
390 check_warn_goto_done(ret, "Error writing DP_CMD");
391
392 ret = smsc75xx_dataport_wait_not_busy(dev);
393 check_warn_goto_done(ret, "smsc75xx_dataport_write timeout");
394 }
395
396done:
397 mutex_unlock(&pdata->dataport_mutex);
398 return ret;
399}
400
401/* returns hash bit number for given MAC address */
402static u32 smsc75xx_hash(char addr[ETH_ALEN])
403{
404 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
405}
406
407static void smsc75xx_deferred_multicast_write(struct work_struct *param)
408{
409 struct smsc75xx_priv *pdata =
410 container_of(param, struct smsc75xx_priv, set_multicast);
411 struct usbnet *dev = pdata->dev;
412 int ret;
413
414 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x",
415 pdata->rfe_ctl);
416
417 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
418 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
419
420 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
421 check_warn(ret, "Error writing RFE_CRL");
422}
423
424static void smsc75xx_set_multicast(struct net_device *netdev)
425{
426 struct usbnet *dev = netdev_priv(netdev);
427 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
428 unsigned long flags;
429 int i;
430
431 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
432
433 pdata->rfe_ctl &=
434 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
435 pdata->rfe_ctl |= RFE_CTL_AB;
436
437 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
438 pdata->multicast_hash_table[i] = 0;
439
440 if (dev->net->flags & IFF_PROMISC) {
441 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled");
442 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
443 } else if (dev->net->flags & IFF_ALLMULTI) {
444 netif_dbg(dev, drv, dev->net, "receive all multicast enabled");
445 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
446 } else if (!netdev_mc_empty(dev->net)) {
447 struct netdev_hw_addr *ha;
448
449 netif_dbg(dev, drv, dev->net, "receive multicast hash filter");
450
451 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
452
453 netdev_for_each_mc_addr(ha, netdev) {
454 u32 bitnum = smsc75xx_hash(ha->addr);
455 pdata->multicast_hash_table[bitnum / 32] |=
456 (1 << (bitnum % 32));
457 }
458 } else {
459 netif_dbg(dev, drv, dev->net, "receive own packets only");
460 pdata->rfe_ctl |= RFE_CTL_DPF;
461 }
462
463 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
464
465 /* defer register writes to a sleepable context */
466 schedule_work(&pdata->set_multicast);
467}
468
469static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
470 u16 lcladv, u16 rmtadv)
471{
472 u32 flow = 0, fct_flow = 0;
473 int ret;
474
475 if (duplex == DUPLEX_FULL) {
476 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
477
478 if (cap & FLOW_CTRL_TX) {
479 flow = (FLOW_TX_FCEN | 0xFFFF);
480 /* set fct_flow thresholds to 20% and 80% */
481 fct_flow = (8 << 8) | 32;
482 }
483
484 if (cap & FLOW_CTRL_RX)
485 flow |= FLOW_RX_FCEN;
486
487 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s",
488 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
489 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
490 } else {
491 netif_dbg(dev, link, dev->net, "half duplex");
492 }
493
494 ret = smsc75xx_write_reg(dev, FLOW, flow);
495 check_warn_return(ret, "Error writing FLOW");
496
497 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
498 check_warn_return(ret, "Error writing FCT_FLOW");
499
500 return 0;
501}
502
503static int smsc75xx_link_reset(struct usbnet *dev)
504{
505 struct mii_if_info *mii = &dev->mii;
506 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
507 u16 lcladv, rmtadv;
508 int ret;
509
510 /* clear interrupt status */
511 ret = smsc75xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
512 check_warn_return(ret, "Error reading PHY_INT_SRC");
513
514 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
515 check_warn_return(ret, "Error writing INT_STS");
516
517 mii_check_media(mii, 1, 1);
518 mii_ethtool_gset(&dev->mii, &ecmd);
519 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
520 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
521
522 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x"
523 " rmtadv: %04x", ethtool_cmd_speed(&ecmd),
524 ecmd.duplex, lcladv, rmtadv);
525
526 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
527}
528
529static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
530{
531 u32 intdata;
532
533 if (urb->actual_length != 4) {
534 netdev_warn(dev->net,
535 "unexpected urb length %d", urb->actual_length);
536 return;
537 }
538
539 memcpy(&intdata, urb->transfer_buffer, 4);
540 le32_to_cpus(&intdata);
541
542 netif_dbg(dev, link, dev->net, "intdata: 0x%08X", intdata);
543
544 if (intdata & INT_ENP_PHY_INT)
545 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
546 else
547 netdev_warn(dev->net,
548 "unexpected interrupt, intdata=0x%08X", intdata);
549}
550
551static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
552{
553 return MAX_EEPROM_SIZE;
554}
555
556static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
557 struct ethtool_eeprom *ee, u8 *data)
558{
559 struct usbnet *dev = netdev_priv(netdev);
560
561 ee->magic = LAN75XX_EEPROM_MAGIC;
562
563 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
564}
565
566static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
567 struct ethtool_eeprom *ee, u8 *data)
568{
569 struct usbnet *dev = netdev_priv(netdev);
570
571 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
572 netdev_warn(dev->net,
573 "EEPROM: magic value mismatch: 0x%x", ee->magic);
574 return -EINVAL;
575 }
576
577 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
578}
579
580static const struct ethtool_ops smsc75xx_ethtool_ops = {
581 .get_link = usbnet_get_link,
582 .nway_reset = usbnet_nway_reset,
583 .get_drvinfo = usbnet_get_drvinfo,
584 .get_msglevel = usbnet_get_msglevel,
585 .set_msglevel = usbnet_set_msglevel,
586 .get_settings = usbnet_get_settings,
587 .set_settings = usbnet_set_settings,
588 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
589 .get_eeprom = smsc75xx_ethtool_get_eeprom,
590 .set_eeprom = smsc75xx_ethtool_set_eeprom,
591};
592
593static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
594{
595 struct usbnet *dev = netdev_priv(netdev);
596
597 if (!netif_running(netdev))
598 return -EINVAL;
599
600 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
601}
602
603static void smsc75xx_init_mac_address(struct usbnet *dev)
604{
605 /* try reading mac address from EEPROM */
606 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
607 dev->net->dev_addr) == 0) {
608 if (is_valid_ether_addr(dev->net->dev_addr)) {
609 /* eeprom values are valid so use them */
610 netif_dbg(dev, ifup, dev->net,
611 "MAC address read from EEPROM");
612 return;
613 }
614 }
615
616 /* no eeprom, or eeprom values are invalid. generate random MAC */
617 random_ether_addr(dev->net->dev_addr);
618 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr");
619}
620
621static int smsc75xx_set_mac_address(struct usbnet *dev)
622{
623 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
624 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
625 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
626
627 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
628 check_warn_return(ret, "Failed to write RX_ADDRH: %d", ret);
629
630 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
631 check_warn_return(ret, "Failed to write RX_ADDRL: %d", ret);
632
633 addr_hi |= ADDR_FILTX_FB_VALID;
634 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
635 check_warn_return(ret, "Failed to write ADDR_FILTX: %d", ret);
636
637 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
638 check_warn_return(ret, "Failed to write ADDR_FILTX+4: %d", ret);
639
640 return 0;
641}
642
643static int smsc75xx_phy_initialize(struct usbnet *dev)
644{
645 int bmcr, timeout = 0;
646
647 /* Initialize MII structure */
648 dev->mii.dev = dev->net;
649 dev->mii.mdio_read = smsc75xx_mdio_read;
650 dev->mii.mdio_write = smsc75xx_mdio_write;
651 dev->mii.phy_id_mask = 0x1f;
652 dev->mii.reg_num_mask = 0x1f;
653 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
654
655 /* reset phy and wait for reset to complete */
656 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
657
658 do {
659 msleep(10);
660 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
661 check_warn_return(bmcr, "Error reading MII_BMCR");
662 timeout++;
663 } while ((bmcr & MII_BMCR) && (timeout < 100));
664
665 if (timeout >= 100) {
666 netdev_warn(dev->net, "timeout on PHY Reset");
667 return -EIO;
668 }
669
670 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
671 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
672 ADVERTISE_PAUSE_ASYM);
673
674 /* read to clear */
675 smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
676 check_warn_return(bmcr, "Error reading PHY_INT_SRC");
677
678 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
679 PHY_INT_MASK_DEFAULT);
680 mii_nway_restart(&dev->mii);
681
682 netif_dbg(dev, ifup, dev->net, "phy initialised successfully");
683 return 0;
684}
685
686static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
687{
688 int ret = 0;
689 u32 buf;
690 bool rxenabled;
691
692 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
693 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
694
695 rxenabled = ((buf & MAC_RX_RXEN) != 0);
696
697 if (rxenabled) {
698 buf &= ~MAC_RX_RXEN;
699 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
700 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
701 }
702
703 /* add 4 to size for FCS */
704 buf &= ~MAC_RX_MAX_SIZE;
705 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
706
707 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
708 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
709
710 if (rxenabled) {
711 buf |= MAC_RX_RXEN;
712 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
713 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
714 }
715
716 return 0;
717}
718
719static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
720{
721 struct usbnet *dev = netdev_priv(netdev);
722
723 int ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu);
724 check_warn_return(ret, "Failed to set mac rx frame length");
725
726 return usbnet_change_mtu(netdev, new_mtu);
727}
728
729/* Enable or disable Rx checksum offload engine */
730static int smsc75xx_set_features(struct net_device *netdev, u32 features)
731{
732 struct usbnet *dev = netdev_priv(netdev);
733 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
734 unsigned long flags;
735 int ret;
736
737 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
738
739 if (features & NETIF_F_RXCSUM)
740 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
741 else
742 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
743
744 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
745 /* it's racing here! */
746
747 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
748 check_warn_return(ret, "Error writing RFE_CTL");
749
750 return 0;
751}
752
753static int smsc75xx_reset(struct usbnet *dev)
754{
755 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
756 u32 buf;
757 int ret = 0, timeout;
758
759 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset");
760
761 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
762 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
763
764 buf |= HW_CFG_LRST;
765
766 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
767 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
768
769 timeout = 0;
770 do {
771 msleep(10);
772 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
773 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
774 timeout++;
775 } while ((buf & HW_CFG_LRST) && (timeout < 100));
776
777 if (timeout >= 100) {
778 netdev_warn(dev->net, "timeout on completion of Lite Reset");
779 return -EIO;
780 }
781
782 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY");
783
784 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
785 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
786
787 buf |= PMT_CTL_PHY_RST;
788
789 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
790 check_warn_return(ret, "Failed to write PMT_CTL: %d", ret);
791
792 timeout = 0;
793 do {
794 msleep(10);
795 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
796 check_warn_return(ret, "Failed to read PMT_CTL: %d", ret);
797 timeout++;
798 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
799
800 if (timeout >= 100) {
801 netdev_warn(dev->net, "timeout waiting for PHY Reset");
802 return -EIO;
803 }
804
805 netif_dbg(dev, ifup, dev->net, "PHY reset complete");
806
807 smsc75xx_init_mac_address(dev);
808
809 ret = smsc75xx_set_mac_address(dev);
810 check_warn_return(ret, "Failed to set mac address");
811
812 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM", dev->net->dev_addr);
813
814 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
815 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
816
817 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x", buf);
818
819 buf |= HW_CFG_BIR;
820
821 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
822 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
823
824 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
825 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
826
827 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after "
828 "writing HW_CFG_BIR: 0x%08x", buf);
829
830 if (!turbo_mode) {
831 buf = 0;
832 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
833 } else if (dev->udev->speed == USB_SPEED_HIGH) {
834 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
835 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
836 } else {
837 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
838 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
839 }
840
841 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld",
842 (ulong)dev->rx_urb_size);
843
844 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
845 check_warn_return(ret, "Failed to write BURST_CAP: %d", ret);
846
847 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
848 check_warn_return(ret, "Failed to read BURST_CAP: %d", ret);
849
850 netif_dbg(dev, ifup, dev->net,
851 "Read Value from BURST_CAP after writing: 0x%08x", buf);
852
853 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
854 check_warn_return(ret, "Failed to write BULK_IN_DLY: %d", ret);
855
856 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
857 check_warn_return(ret, "Failed to read BULK_IN_DLY: %d", ret);
858
859 netif_dbg(dev, ifup, dev->net,
860 "Read Value from BULK_IN_DLY after writing: 0x%08x", buf);
861
862 if (turbo_mode) {
863 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
864 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
865
866 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
867
868 buf |= (HW_CFG_MEF | HW_CFG_BCE);
869
870 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
871 check_warn_return(ret, "Failed to write HW_CFG: %d", ret);
872
873 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
874 check_warn_return(ret, "Failed to read HW_CFG: %d", ret);
875
876 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x", buf);
877 }
878
879 /* set FIFO sizes */
880 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
881 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
882 check_warn_return(ret, "Failed to write FCT_RX_FIFO_END: %d", ret);
883
884 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x", buf);
885
886 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
887 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
888 check_warn_return(ret, "Failed to write FCT_TX_FIFO_END: %d", ret);
889
890 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x", buf);
891
892 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
893 check_warn_return(ret, "Failed to write INT_STS: %d", ret);
894
895 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
896 check_warn_return(ret, "Failed to read ID_REV: %d", ret);
897
898 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x", buf);
899
900 /* Configure GPIO pins as LED outputs */
901 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
902 check_warn_return(ret, "Failed to read LED_GPIO_CFG: %d", ret);
903
904 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
905 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
906
907 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
908 check_warn_return(ret, "Failed to write LED_GPIO_CFG: %d", ret);
909
910 ret = smsc75xx_write_reg(dev, FLOW, 0);
911 check_warn_return(ret, "Failed to write FLOW: %d", ret);
912
913 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
914 check_warn_return(ret, "Failed to write FCT_FLOW: %d", ret);
915
916 /* Don't need rfe_ctl_lock during initialisation */
917 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
918 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
919
920 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
921
922 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
923 check_warn_return(ret, "Failed to write RFE_CTL: %d", ret);
924
925 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
926 check_warn_return(ret, "Failed to read RFE_CTL: %d", ret);
927
928 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x", pdata->rfe_ctl);
929
930 /* Enable or disable checksum offload engines */
931 smsc75xx_set_features(dev->net, dev->net->features);
932
933 smsc75xx_set_multicast(dev->net);
934
935 ret = smsc75xx_phy_initialize(dev);
936 check_warn_return(ret, "Failed to initialize PHY: %d", ret);
937
938 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
939 check_warn_return(ret, "Failed to read INT_EP_CTL: %d", ret);
940
941 /* enable PHY interrupts */
942 buf |= INT_ENP_PHY_INT;
943
944 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
945 check_warn_return(ret, "Failed to write INT_EP_CTL: %d", ret);
946
947 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
948 check_warn_return(ret, "Failed to read MAC_TX: %d", ret);
949
950 buf |= MAC_TX_TXEN;
951
952 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
953 check_warn_return(ret, "Failed to write MAC_TX: %d", ret);
954
955 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x", buf);
956
957 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
958 check_warn_return(ret, "Failed to read FCT_TX_CTL: %d", ret);
959
960 buf |= FCT_TX_CTL_EN;
961
962 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
963 check_warn_return(ret, "Failed to write FCT_TX_CTL: %d", ret);
964
965 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x", buf);
966
967 ret = smsc75xx_set_rx_max_frame_length(dev, 1514);
968 check_warn_return(ret, "Failed to set max rx frame length");
969
970 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
971 check_warn_return(ret, "Failed to read MAC_RX: %d", ret);
972
973 buf |= MAC_RX_RXEN;
974
975 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
976 check_warn_return(ret, "Failed to write MAC_RX: %d", ret);
977
978 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x", buf);
979
980 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
981 check_warn_return(ret, "Failed to read FCT_RX_CTL: %d", ret);
982
983 buf |= FCT_RX_CTL_EN;
984
985 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
986 check_warn_return(ret, "Failed to write FCT_RX_CTL: %d", ret);
987
988 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x", buf);
989
990 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0");
991 return 0;
992}
993
994static const struct net_device_ops smsc75xx_netdev_ops = {
995 .ndo_open = usbnet_open,
996 .ndo_stop = usbnet_stop,
997 .ndo_start_xmit = usbnet_start_xmit,
998 .ndo_tx_timeout = usbnet_tx_timeout,
999 .ndo_change_mtu = smsc75xx_change_mtu,
1000 .ndo_set_mac_address = eth_mac_addr,
1001 .ndo_validate_addr = eth_validate_addr,
1002 .ndo_do_ioctl = smsc75xx_ioctl,
1003 .ndo_set_multicast_list = smsc75xx_set_multicast,
1004 .ndo_set_features = smsc75xx_set_features,
1005};
1006
1007static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1008{
1009 struct smsc75xx_priv *pdata = NULL;
1010 int ret;
1011
1012 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1013
1014 ret = usbnet_get_endpoints(dev, intf);
1015 check_warn_return(ret, "usbnet_get_endpoints failed: %d", ret);
1016
1017 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
1018 GFP_KERNEL);
1019
1020 pdata = (struct smsc75xx_priv *)(dev->data[0]);
1021 if (!pdata) {
1022 netdev_warn(dev->net, "Unable to allocate smsc75xx_priv");
1023 return -ENOMEM;
1024 }
1025
1026 pdata->dev = dev;
1027
1028 spin_lock_init(&pdata->rfe_ctl_lock);
1029 mutex_init(&pdata->dataport_mutex);
1030
1031 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1032
1033 if (DEFAULT_TX_CSUM_ENABLE) {
1034 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1035 if (DEFAULT_TSO_ENABLE)
1036 dev->net->features |= NETIF_F_SG |
1037 NETIF_F_TSO | NETIF_F_TSO6;
1038 }
1039 if (DEFAULT_RX_CSUM_ENABLE)
1040 dev->net->features |= NETIF_F_RXCSUM;
1041
1042 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1043 NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_RXCSUM;
1044
1045 /* Init all registers */
1046 ret = smsc75xx_reset(dev);
1047
1048 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1049 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1050 dev->net->flags |= IFF_MULTICAST;
1051 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
1052 return 0;
1053}
1054
1055static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1056{
1057 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1058 if (pdata) {
1059 netif_dbg(dev, ifdown, dev->net, "free pdata");
1060 kfree(pdata);
1061 pdata = NULL;
1062 dev->data[0] = 0;
1063 }
1064}
1065
1066static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
1067 u32 rx_cmd_a, u32 rx_cmd_b)
1068{
1069 if (!(dev->net->features & NETIF_F_RXCSUM) ||
1070 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
1071 skb->ip_summed = CHECKSUM_NONE;
1072 } else {
1073 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
1074 skb->ip_summed = CHECKSUM_COMPLETE;
1075 }
1076}
1077
1078static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1079{
1080 while (skb->len > 0) {
1081 u32 rx_cmd_a, rx_cmd_b, align_count, size;
1082 struct sk_buff *ax_skb;
1083 unsigned char *packet;
1084
1085 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a));
1086 le32_to_cpus(&rx_cmd_a);
1087 skb_pull(skb, 4);
1088
1089 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b));
1090 le32_to_cpus(&rx_cmd_b);
1091 skb_pull(skb, 4 + NET_IP_ALIGN);
1092
1093 packet = skb->data;
1094
1095 /* get the packet length */
1096 size = (rx_cmd_a & RX_CMD_A_LEN) - NET_IP_ALIGN;
1097 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1098
1099 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
1100 netif_dbg(dev, rx_err, dev->net,
1101 "Error rx_cmd_a=0x%08x", rx_cmd_a);
1102 dev->net->stats.rx_errors++;
1103 dev->net->stats.rx_dropped++;
1104
1105 if (rx_cmd_a & RX_CMD_A_FCS)
1106 dev->net->stats.rx_crc_errors++;
1107 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
1108 dev->net->stats.rx_frame_errors++;
1109 } else {
1110 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1111 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
1112 netif_dbg(dev, rx_err, dev->net,
1113 "size err rx_cmd_a=0x%08x", rx_cmd_a);
1114 return 0;
1115 }
1116
1117 /* last frame in this batch */
1118 if (skb->len == size) {
1119 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
1120 rx_cmd_b);
1121
1122 skb_trim(skb, skb->len - 4); /* remove fcs */
1123 skb->truesize = size + sizeof(struct sk_buff);
1124
1125 return 1;
1126 }
1127
1128 ax_skb = skb_clone(skb, GFP_ATOMIC);
1129 if (unlikely(!ax_skb)) {
1130 netdev_warn(dev->net, "Error allocating skb");
1131 return 0;
1132 }
1133
1134 ax_skb->len = size;
1135 ax_skb->data = packet;
1136 skb_set_tail_pointer(ax_skb, size);
1137
1138 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
1139 rx_cmd_b);
1140
1141 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
1142 ax_skb->truesize = size + sizeof(struct sk_buff);
1143
1144 usbnet_skb_return(dev, ax_skb);
1145 }
1146
1147 skb_pull(skb, size);
1148
1149 /* padding bytes before the next frame starts */
1150 if (skb->len)
1151 skb_pull(skb, align_count);
1152 }
1153
1154 if (unlikely(skb->len < 0)) {
1155 netdev_warn(dev->net, "invalid rx length<0 %d", skb->len);
1156 return 0;
1157 }
1158
1159 return 1;
1160}
1161
1162static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
1163 struct sk_buff *skb, gfp_t flags)
1164{
1165 u32 tx_cmd_a, tx_cmd_b;
1166
1167 skb_linearize(skb);
1168
1169 if (skb_headroom(skb) < SMSC75XX_TX_OVERHEAD) {
1170 struct sk_buff *skb2 =
1171 skb_copy_expand(skb, SMSC75XX_TX_OVERHEAD, 0, flags);
1172 dev_kfree_skb_any(skb);
1173 skb = skb2;
1174 if (!skb)
1175 return NULL;
1176 }
1177
1178 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
1179
1180 if (skb->ip_summed == CHECKSUM_PARTIAL)
1181 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
1182
1183 if (skb_is_gso(skb)) {
1184 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
1185 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
1186
1187 tx_cmd_a |= TX_CMD_A_LSO;
1188 } else {
1189 tx_cmd_b = 0;
1190 }
1191
1192 skb_push(skb, 4);
1193 cpu_to_le32s(&tx_cmd_b);
1194 memcpy(skb->data, &tx_cmd_b, 4);
1195
1196 skb_push(skb, 4);
1197 cpu_to_le32s(&tx_cmd_a);
1198 memcpy(skb->data, &tx_cmd_a, 4);
1199
1200 return skb;
1201}
1202
1203static const struct driver_info smsc75xx_info = {
1204 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
1205 .bind = smsc75xx_bind,
1206 .unbind = smsc75xx_unbind,
1207 .link_reset = smsc75xx_link_reset,
1208 .reset = smsc75xx_reset,
1209 .rx_fixup = smsc75xx_rx_fixup,
1210 .tx_fixup = smsc75xx_tx_fixup,
1211 .status = smsc75xx_status,
1212 .flags = FLAG_ETHER | FLAG_SEND_ZLP,
1213};
1214
1215static const struct usb_device_id products[] = {
1216 {
1217 /* SMSC7500 USB Gigabit Ethernet Device */
1218 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
1219 .driver_info = (unsigned long) &smsc75xx_info,
1220 },
1221 {
1222 /* SMSC7500 USB Gigabit Ethernet Device */
1223 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
1224 .driver_info = (unsigned long) &smsc75xx_info,
1225 },
1226 { }, /* END */
1227};
1228MODULE_DEVICE_TABLE(usb, products);
1229
1230static struct usb_driver smsc75xx_driver = {
1231 .name = SMSC_CHIPNAME,
1232 .id_table = products,
1233 .probe = usbnet_probe,
1234 .suspend = usbnet_suspend,
1235 .resume = usbnet_resume,
1236 .disconnect = usbnet_disconnect,
1237};
1238
1239static int __init smsc75xx_init(void)
1240{
1241 return usb_register(&smsc75xx_driver);
1242}
1243module_init(smsc75xx_init);
1244
1245static void __exit smsc75xx_exit(void)
1246{
1247 usb_deregister(&smsc75xx_driver);
1248}
1249module_exit(smsc75xx_exit);
1250
1251MODULE_AUTHOR("Nancy Lin");
1252MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>");
1253MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
1254MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2 /***************************************************************************
3 *
4 * Copyright (C) 2007-2010 SMSC
5 *
6 *****************************************************************************/
7
8#include <linux/module.h>
9#include <linux/kmod.h>
10#include <linux/netdevice.h>
11#include <linux/etherdevice.h>
12#include <linux/ethtool.h>
13#include <linux/mii.h>
14#include <linux/usb.h>
15#include <linux/bitrev.h>
16#include <linux/crc16.h>
17#include <linux/crc32.h>
18#include <linux/usb/usbnet.h>
19#include <linux/slab.h>
20#include <linux/of_net.h>
21#include "smsc75xx.h"
22
23#define SMSC_CHIPNAME "smsc75xx"
24#define SMSC_DRIVER_VERSION "1.0.0"
25#define HS_USB_PKT_SIZE (512)
26#define FS_USB_PKT_SIZE (64)
27#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
28#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
29#define DEFAULT_BULK_IN_DELAY (0x00002000)
30#define MAX_SINGLE_PACKET_SIZE (9000)
31#define LAN75XX_EEPROM_MAGIC (0x7500)
32#define EEPROM_MAC_OFFSET (0x01)
33#define DEFAULT_TX_CSUM_ENABLE (true)
34#define DEFAULT_RX_CSUM_ENABLE (true)
35#define SMSC75XX_INTERNAL_PHY_ID (1)
36#define SMSC75XX_TX_OVERHEAD (8)
37#define MAX_RX_FIFO_SIZE (20 * 1024)
38#define MAX_TX_FIFO_SIZE (12 * 1024)
39#define USB_VENDOR_ID_SMSC (0x0424)
40#define USB_PRODUCT_ID_LAN7500 (0x7500)
41#define USB_PRODUCT_ID_LAN7505 (0x7505)
42#define RXW_PADDING 2
43#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
44 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
45
46#define SUSPEND_SUSPEND0 (0x01)
47#define SUSPEND_SUSPEND1 (0x02)
48#define SUSPEND_SUSPEND2 (0x04)
49#define SUSPEND_SUSPEND3 (0x08)
50#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
51 SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
52
53struct smsc75xx_priv {
54 struct usbnet *dev;
55 u32 rfe_ctl;
56 u32 wolopts;
57 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN];
58 struct mutex dataport_mutex;
59 spinlock_t rfe_ctl_lock;
60 struct work_struct set_multicast;
61 u8 suspend_flags;
62};
63
64struct usb_context {
65 struct usb_ctrlrequest req;
66 struct usbnet *dev;
67};
68
69static bool turbo_mode = true;
70module_param(turbo_mode, bool, 0644);
71MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
72
73static int smsc75xx_link_ok_nopm(struct usbnet *dev);
74static int smsc75xx_phy_gig_workaround(struct usbnet *dev);
75
76static int __must_check __smsc75xx_read_reg(struct usbnet *dev, u32 index,
77 u32 *data, int in_pm)
78{
79 u32 buf;
80 int ret;
81 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
82
83 BUG_ON(!dev);
84
85 if (!in_pm)
86 fn = usbnet_read_cmd;
87 else
88 fn = usbnet_read_cmd_nopm;
89
90 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
91 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
92 0, index, &buf, 4);
93 if (unlikely(ret < 0)) {
94 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
95 index, ret);
96 return ret;
97 }
98
99 le32_to_cpus(&buf);
100 *data = buf;
101
102 return ret;
103}
104
105static int __must_check __smsc75xx_write_reg(struct usbnet *dev, u32 index,
106 u32 data, int in_pm)
107{
108 u32 buf;
109 int ret;
110 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
111
112 BUG_ON(!dev);
113
114 if (!in_pm)
115 fn = usbnet_write_cmd;
116 else
117 fn = usbnet_write_cmd_nopm;
118
119 buf = data;
120 cpu_to_le32s(&buf);
121
122 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
123 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
124 0, index, &buf, 4);
125 if (unlikely(ret < 0))
126 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
127 index, ret);
128
129 return ret;
130}
131
132static int __must_check smsc75xx_read_reg_nopm(struct usbnet *dev, u32 index,
133 u32 *data)
134{
135 return __smsc75xx_read_reg(dev, index, data, 1);
136}
137
138static int __must_check smsc75xx_write_reg_nopm(struct usbnet *dev, u32 index,
139 u32 data)
140{
141 return __smsc75xx_write_reg(dev, index, data, 1);
142}
143
144static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index,
145 u32 *data)
146{
147 return __smsc75xx_read_reg(dev, index, data, 0);
148}
149
150static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index,
151 u32 data)
152{
153 return __smsc75xx_write_reg(dev, index, data, 0);
154}
155
156/* Loop until the read is completed with timeout
157 * called with phy_mutex held */
158static __must_check int __smsc75xx_phy_wait_not_busy(struct usbnet *dev,
159 int in_pm)
160{
161 unsigned long start_time = jiffies;
162 u32 val;
163 int ret;
164
165 do {
166 ret = __smsc75xx_read_reg(dev, MII_ACCESS, &val, in_pm);
167 if (ret < 0) {
168 netdev_warn(dev->net, "Error reading MII_ACCESS\n");
169 return ret;
170 }
171
172 if (!(val & MII_ACCESS_BUSY))
173 return 0;
174 } while (!time_after(jiffies, start_time + HZ));
175
176 return -EIO;
177}
178
179static int __smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
180 int in_pm)
181{
182 struct usbnet *dev = netdev_priv(netdev);
183 u32 val, addr;
184 int ret;
185
186 mutex_lock(&dev->phy_mutex);
187
188 /* confirm MII not busy */
189 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
190 if (ret < 0) {
191 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_read\n");
192 goto done;
193 }
194
195 /* set the address, index & direction (read from PHY) */
196 phy_id &= dev->mii.phy_id_mask;
197 idx &= dev->mii.reg_num_mask;
198 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
199 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
200 | MII_ACCESS_READ | MII_ACCESS_BUSY;
201 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm);
202 if (ret < 0) {
203 netdev_warn(dev->net, "Error writing MII_ACCESS\n");
204 goto done;
205 }
206
207 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
208 if (ret < 0) {
209 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
210 goto done;
211 }
212
213 ret = __smsc75xx_read_reg(dev, MII_DATA, &val, in_pm);
214 if (ret < 0) {
215 netdev_warn(dev->net, "Error reading MII_DATA\n");
216 goto done;
217 }
218
219 ret = (u16)(val & 0xFFFF);
220
221done:
222 mutex_unlock(&dev->phy_mutex);
223 return ret;
224}
225
226static void __smsc75xx_mdio_write(struct net_device *netdev, int phy_id,
227 int idx, int regval, int in_pm)
228{
229 struct usbnet *dev = netdev_priv(netdev);
230 u32 val, addr;
231 int ret;
232
233 mutex_lock(&dev->phy_mutex);
234
235 /* confirm MII not busy */
236 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
237 if (ret < 0) {
238 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_write\n");
239 goto done;
240 }
241
242 val = regval;
243 ret = __smsc75xx_write_reg(dev, MII_DATA, val, in_pm);
244 if (ret < 0) {
245 netdev_warn(dev->net, "Error writing MII_DATA\n");
246 goto done;
247 }
248
249 /* set the address, index & direction (write to PHY) */
250 phy_id &= dev->mii.phy_id_mask;
251 idx &= dev->mii.reg_num_mask;
252 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR)
253 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR)
254 | MII_ACCESS_WRITE | MII_ACCESS_BUSY;
255 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm);
256 if (ret < 0) {
257 netdev_warn(dev->net, "Error writing MII_ACCESS\n");
258 goto done;
259 }
260
261 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm);
262 if (ret < 0) {
263 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
264 goto done;
265 }
266
267done:
268 mutex_unlock(&dev->phy_mutex);
269}
270
271static int smsc75xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
272 int idx)
273{
274 return __smsc75xx_mdio_read(netdev, phy_id, idx, 1);
275}
276
277static void smsc75xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
278 int idx, int regval)
279{
280 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 1);
281}
282
283static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
284{
285 return __smsc75xx_mdio_read(netdev, phy_id, idx, 0);
286}
287
288static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
289 int regval)
290{
291 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 0);
292}
293
294static int smsc75xx_wait_eeprom(struct usbnet *dev)
295{
296 unsigned long start_time = jiffies;
297 u32 val;
298 int ret;
299
300 do {
301 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
302 if (ret < 0) {
303 netdev_warn(dev->net, "Error reading E2P_CMD\n");
304 return ret;
305 }
306
307 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT))
308 break;
309 udelay(40);
310 } while (!time_after(jiffies, start_time + HZ));
311
312 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) {
313 netdev_warn(dev->net, "EEPROM read operation timeout\n");
314 return -EIO;
315 }
316
317 return 0;
318}
319
320static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev)
321{
322 unsigned long start_time = jiffies;
323 u32 val;
324 int ret;
325
326 do {
327 ret = smsc75xx_read_reg(dev, E2P_CMD, &val);
328 if (ret < 0) {
329 netdev_warn(dev->net, "Error reading E2P_CMD\n");
330 return ret;
331 }
332
333 if (!(val & E2P_CMD_BUSY))
334 return 0;
335
336 udelay(40);
337 } while (!time_after(jiffies, start_time + HZ));
338
339 netdev_warn(dev->net, "EEPROM is busy\n");
340 return -EIO;
341}
342
343static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
344 u8 *data)
345{
346 u32 val;
347 int i, ret;
348
349 BUG_ON(!dev);
350 BUG_ON(!data);
351
352 ret = smsc75xx_eeprom_confirm_not_busy(dev);
353 if (ret)
354 return ret;
355
356 for (i = 0; i < length; i++) {
357 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR);
358 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
359 if (ret < 0) {
360 netdev_warn(dev->net, "Error writing E2P_CMD\n");
361 return ret;
362 }
363
364 ret = smsc75xx_wait_eeprom(dev);
365 if (ret < 0)
366 return ret;
367
368 ret = smsc75xx_read_reg(dev, E2P_DATA, &val);
369 if (ret < 0) {
370 netdev_warn(dev->net, "Error reading E2P_DATA\n");
371 return ret;
372 }
373
374 data[i] = val & 0xFF;
375 offset++;
376 }
377
378 return 0;
379}
380
381static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
382 u8 *data)
383{
384 u32 val;
385 int i, ret;
386
387 BUG_ON(!dev);
388 BUG_ON(!data);
389
390 ret = smsc75xx_eeprom_confirm_not_busy(dev);
391 if (ret)
392 return ret;
393
394 /* Issue write/erase enable command */
395 val = E2P_CMD_BUSY | E2P_CMD_EWEN;
396 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
397 if (ret < 0) {
398 netdev_warn(dev->net, "Error writing E2P_CMD\n");
399 return ret;
400 }
401
402 ret = smsc75xx_wait_eeprom(dev);
403 if (ret < 0)
404 return ret;
405
406 for (i = 0; i < length; i++) {
407
408 /* Fill data register */
409 val = data[i];
410 ret = smsc75xx_write_reg(dev, E2P_DATA, val);
411 if (ret < 0) {
412 netdev_warn(dev->net, "Error writing E2P_DATA\n");
413 return ret;
414 }
415
416 /* Send "write" command */
417 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR);
418 ret = smsc75xx_write_reg(dev, E2P_CMD, val);
419 if (ret < 0) {
420 netdev_warn(dev->net, "Error writing E2P_CMD\n");
421 return ret;
422 }
423
424 ret = smsc75xx_wait_eeprom(dev);
425 if (ret < 0)
426 return ret;
427
428 offset++;
429 }
430
431 return 0;
432}
433
434static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev)
435{
436 int i, ret;
437
438 for (i = 0; i < 100; i++) {
439 u32 dp_sel;
440 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
441 if (ret < 0) {
442 netdev_warn(dev->net, "Error reading DP_SEL\n");
443 return ret;
444 }
445
446 if (dp_sel & DP_SEL_DPRDY)
447 return 0;
448
449 udelay(40);
450 }
451
452 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out\n");
453
454 return -EIO;
455}
456
457static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr,
458 u32 length, u32 *buf)
459{
460 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
461 u32 dp_sel;
462 int i, ret;
463
464 mutex_lock(&pdata->dataport_mutex);
465
466 ret = smsc75xx_dataport_wait_not_busy(dev);
467 if (ret < 0) {
468 netdev_warn(dev->net, "smsc75xx_dataport_write busy on entry\n");
469 goto done;
470 }
471
472 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel);
473 if (ret < 0) {
474 netdev_warn(dev->net, "Error reading DP_SEL\n");
475 goto done;
476 }
477
478 dp_sel &= ~DP_SEL_RSEL;
479 dp_sel |= ram_select;
480 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel);
481 if (ret < 0) {
482 netdev_warn(dev->net, "Error writing DP_SEL\n");
483 goto done;
484 }
485
486 for (i = 0; i < length; i++) {
487 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i);
488 if (ret < 0) {
489 netdev_warn(dev->net, "Error writing DP_ADDR\n");
490 goto done;
491 }
492
493 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]);
494 if (ret < 0) {
495 netdev_warn(dev->net, "Error writing DP_DATA\n");
496 goto done;
497 }
498
499 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE);
500 if (ret < 0) {
501 netdev_warn(dev->net, "Error writing DP_CMD\n");
502 goto done;
503 }
504
505 ret = smsc75xx_dataport_wait_not_busy(dev);
506 if (ret < 0) {
507 netdev_warn(dev->net, "smsc75xx_dataport_write timeout\n");
508 goto done;
509 }
510 }
511
512done:
513 mutex_unlock(&pdata->dataport_mutex);
514 return ret;
515}
516
517/* returns hash bit number for given MAC address */
518static u32 smsc75xx_hash(char addr[ETH_ALEN])
519{
520 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff;
521}
522
523static void smsc75xx_deferred_multicast_write(struct work_struct *param)
524{
525 struct smsc75xx_priv *pdata =
526 container_of(param, struct smsc75xx_priv, set_multicast);
527 struct usbnet *dev = pdata->dev;
528 int ret;
529
530 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n",
531 pdata->rfe_ctl);
532
533 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN,
534 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table);
535
536 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
537 if (ret < 0)
538 netdev_warn(dev->net, "Error writing RFE_CRL\n");
539}
540
541static void smsc75xx_set_multicast(struct net_device *netdev)
542{
543 struct usbnet *dev = netdev_priv(netdev);
544 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
545 unsigned long flags;
546 int i;
547
548 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
549
550 pdata->rfe_ctl &=
551 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF);
552 pdata->rfe_ctl |= RFE_CTL_AB;
553
554 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++)
555 pdata->multicast_hash_table[i] = 0;
556
557 if (dev->net->flags & IFF_PROMISC) {
558 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
559 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU;
560 } else if (dev->net->flags & IFF_ALLMULTI) {
561 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
562 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF;
563 } else if (!netdev_mc_empty(dev->net)) {
564 struct netdev_hw_addr *ha;
565
566 netif_dbg(dev, drv, dev->net, "receive multicast hash filter\n");
567
568 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF;
569
570 netdev_for_each_mc_addr(ha, netdev) {
571 u32 bitnum = smsc75xx_hash(ha->addr);
572 pdata->multicast_hash_table[bitnum / 32] |=
573 (1 << (bitnum % 32));
574 }
575 } else {
576 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
577 pdata->rfe_ctl |= RFE_CTL_DPF;
578 }
579
580 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
581
582 /* defer register writes to a sleepable context */
583 schedule_work(&pdata->set_multicast);
584}
585
586static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex,
587 u16 lcladv, u16 rmtadv)
588{
589 u32 flow = 0, fct_flow = 0;
590 int ret;
591
592 if (duplex == DUPLEX_FULL) {
593 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
594
595 if (cap & FLOW_CTRL_TX) {
596 flow = (FLOW_TX_FCEN | 0xFFFF);
597 /* set fct_flow thresholds to 20% and 80% */
598 fct_flow = (8 << 8) | 32;
599 }
600
601 if (cap & FLOW_CTRL_RX)
602 flow |= FLOW_RX_FCEN;
603
604 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
605 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"),
606 (cap & FLOW_CTRL_TX ? "enabled" : "disabled"));
607 } else {
608 netif_dbg(dev, link, dev->net, "half duplex\n");
609 }
610
611 ret = smsc75xx_write_reg(dev, FLOW, flow);
612 if (ret < 0) {
613 netdev_warn(dev->net, "Error writing FLOW\n");
614 return ret;
615 }
616
617 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow);
618 if (ret < 0) {
619 netdev_warn(dev->net, "Error writing FCT_FLOW\n");
620 return ret;
621 }
622
623 return 0;
624}
625
626static int smsc75xx_link_reset(struct usbnet *dev)
627{
628 struct mii_if_info *mii = &dev->mii;
629 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
630 u16 lcladv, rmtadv;
631 int ret;
632
633 /* write to clear phy interrupt status */
634 smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC,
635 PHY_INT_SRC_CLEAR_ALL);
636
637 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
638 if (ret < 0) {
639 netdev_warn(dev->net, "Error writing INT_STS\n");
640 return ret;
641 }
642
643 mii_check_media(mii, 1, 1);
644 mii_ethtool_gset(&dev->mii, &ecmd);
645 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
646 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
647
648 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
649 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
650
651 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
652}
653
654static void smsc75xx_status(struct usbnet *dev, struct urb *urb)
655{
656 u32 intdata;
657
658 if (urb->actual_length != 4) {
659 netdev_warn(dev->net, "unexpected urb length %d\n",
660 urb->actual_length);
661 return;
662 }
663
664 intdata = get_unaligned_le32(urb->transfer_buffer);
665
666 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
667
668 if (intdata & INT_ENP_PHY_INT)
669 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
670 else
671 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
672 intdata);
673}
674
675static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net)
676{
677 return MAX_EEPROM_SIZE;
678}
679
680static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev,
681 struct ethtool_eeprom *ee, u8 *data)
682{
683 struct usbnet *dev = netdev_priv(netdev);
684
685 ee->magic = LAN75XX_EEPROM_MAGIC;
686
687 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data);
688}
689
690static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev,
691 struct ethtool_eeprom *ee, u8 *data)
692{
693 struct usbnet *dev = netdev_priv(netdev);
694
695 if (ee->magic != LAN75XX_EEPROM_MAGIC) {
696 netdev_warn(dev->net, "EEPROM: magic value mismatch: 0x%x\n",
697 ee->magic);
698 return -EINVAL;
699 }
700
701 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data);
702}
703
704static void smsc75xx_ethtool_get_wol(struct net_device *net,
705 struct ethtool_wolinfo *wolinfo)
706{
707 struct usbnet *dev = netdev_priv(net);
708 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
709
710 wolinfo->supported = SUPPORTED_WAKE;
711 wolinfo->wolopts = pdata->wolopts;
712}
713
714static int smsc75xx_ethtool_set_wol(struct net_device *net,
715 struct ethtool_wolinfo *wolinfo)
716{
717 struct usbnet *dev = netdev_priv(net);
718 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
719 int ret;
720
721 if (wolinfo->wolopts & ~SUPPORTED_WAKE)
722 return -EINVAL;
723
724 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
725
726 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
727 if (ret < 0)
728 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
729
730 return ret;
731}
732
733static const struct ethtool_ops smsc75xx_ethtool_ops = {
734 .get_link = usbnet_get_link,
735 .nway_reset = usbnet_nway_reset,
736 .get_drvinfo = usbnet_get_drvinfo,
737 .get_msglevel = usbnet_get_msglevel,
738 .set_msglevel = usbnet_set_msglevel,
739 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len,
740 .get_eeprom = smsc75xx_ethtool_get_eeprom,
741 .set_eeprom = smsc75xx_ethtool_set_eeprom,
742 .get_wol = smsc75xx_ethtool_get_wol,
743 .set_wol = smsc75xx_ethtool_set_wol,
744 .get_link_ksettings = usbnet_get_link_ksettings_mii,
745 .set_link_ksettings = usbnet_set_link_ksettings_mii,
746};
747
748static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
749{
750 struct usbnet *dev = netdev_priv(netdev);
751
752 if (!netif_running(netdev))
753 return -EINVAL;
754
755 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
756}
757
758static void smsc75xx_init_mac_address(struct usbnet *dev)
759{
760 /* maybe the boot loader passed the MAC address in devicetree */
761 if (!eth_platform_get_mac_address(&dev->udev->dev,
762 dev->net->dev_addr)) {
763 if (is_valid_ether_addr(dev->net->dev_addr)) {
764 /* device tree values are valid so use them */
765 netif_dbg(dev, ifup, dev->net, "MAC address read from the device tree\n");
766 return;
767 }
768 }
769
770 /* try reading mac address from EEPROM */
771 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
772 dev->net->dev_addr) == 0) {
773 if (is_valid_ether_addr(dev->net->dev_addr)) {
774 /* eeprom values are valid so use them */
775 netif_dbg(dev, ifup, dev->net,
776 "MAC address read from EEPROM\n");
777 return;
778 }
779 }
780
781 /* no useful static MAC address found. generate a random one */
782 eth_hw_addr_random(dev->net);
783 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
784}
785
786static int smsc75xx_set_mac_address(struct usbnet *dev)
787{
788 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
789 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
790 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
791
792 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi);
793 if (ret < 0) {
794 netdev_warn(dev->net, "Failed to write RX_ADDRH: %d\n", ret);
795 return ret;
796 }
797
798 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo);
799 if (ret < 0) {
800 netdev_warn(dev->net, "Failed to write RX_ADDRL: %d\n", ret);
801 return ret;
802 }
803
804 addr_hi |= ADDR_FILTX_FB_VALID;
805 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi);
806 if (ret < 0) {
807 netdev_warn(dev->net, "Failed to write ADDR_FILTX: %d\n", ret);
808 return ret;
809 }
810
811 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo);
812 if (ret < 0)
813 netdev_warn(dev->net, "Failed to write ADDR_FILTX+4: %d\n", ret);
814
815 return ret;
816}
817
818static int smsc75xx_phy_initialize(struct usbnet *dev)
819{
820 int bmcr, ret, timeout = 0;
821
822 /* Initialize MII structure */
823 dev->mii.dev = dev->net;
824 dev->mii.mdio_read = smsc75xx_mdio_read;
825 dev->mii.mdio_write = smsc75xx_mdio_write;
826 dev->mii.phy_id_mask = 0x1f;
827 dev->mii.reg_num_mask = 0x1f;
828 dev->mii.supports_gmii = 1;
829 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID;
830
831 /* reset phy and wait for reset to complete */
832 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
833
834 do {
835 msleep(10);
836 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
837 if (bmcr < 0) {
838 netdev_warn(dev->net, "Error reading MII_BMCR\n");
839 return bmcr;
840 }
841 timeout++;
842 } while ((bmcr & BMCR_RESET) && (timeout < 100));
843
844 if (timeout >= 100) {
845 netdev_warn(dev->net, "timeout on PHY Reset\n");
846 return -EIO;
847 }
848
849 /* phy workaround for gig link */
850 smsc75xx_phy_gig_workaround(dev);
851
852 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
853 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
854 ADVERTISE_PAUSE_ASYM);
855 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000,
856 ADVERTISE_1000FULL);
857
858 /* read and write to clear phy interrupt status */
859 ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
860 if (ret < 0) {
861 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n");
862 return ret;
863 }
864
865 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff);
866
867 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
868 PHY_INT_MASK_DEFAULT);
869 mii_nway_restart(&dev->mii);
870
871 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
872 return 0;
873}
874
875static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size)
876{
877 int ret = 0;
878 u32 buf;
879 bool rxenabled;
880
881 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
882 if (ret < 0) {
883 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
884 return ret;
885 }
886
887 rxenabled = ((buf & MAC_RX_RXEN) != 0);
888
889 if (rxenabled) {
890 buf &= ~MAC_RX_RXEN;
891 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
892 if (ret < 0) {
893 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
894 return ret;
895 }
896 }
897
898 /* add 4 to size for FCS */
899 buf &= ~MAC_RX_MAX_SIZE;
900 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE);
901
902 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
903 if (ret < 0) {
904 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
905 return ret;
906 }
907
908 if (rxenabled) {
909 buf |= MAC_RX_RXEN;
910 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
911 if (ret < 0) {
912 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
913 return ret;
914 }
915 }
916
917 return 0;
918}
919
920static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu)
921{
922 struct usbnet *dev = netdev_priv(netdev);
923 int ret;
924
925 ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN);
926 if (ret < 0) {
927 netdev_warn(dev->net, "Failed to set mac rx frame length\n");
928 return ret;
929 }
930
931 return usbnet_change_mtu(netdev, new_mtu);
932}
933
934/* Enable or disable Rx checksum offload engine */
935static int smsc75xx_set_features(struct net_device *netdev,
936 netdev_features_t features)
937{
938 struct usbnet *dev = netdev_priv(netdev);
939 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
940 unsigned long flags;
941 int ret;
942
943 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags);
944
945 if (features & NETIF_F_RXCSUM)
946 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM;
947 else
948 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM);
949
950 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags);
951 /* it's racing here! */
952
953 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
954 if (ret < 0) {
955 netdev_warn(dev->net, "Error writing RFE_CTL\n");
956 return ret;
957 }
958 return 0;
959}
960
961static int smsc75xx_wait_ready(struct usbnet *dev, int in_pm)
962{
963 int timeout = 0;
964
965 do {
966 u32 buf;
967 int ret;
968
969 ret = __smsc75xx_read_reg(dev, PMT_CTL, &buf, in_pm);
970
971 if (ret < 0) {
972 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
973 return ret;
974 }
975
976 if (buf & PMT_CTL_DEV_RDY)
977 return 0;
978
979 msleep(10);
980 timeout++;
981 } while (timeout < 100);
982
983 netdev_warn(dev->net, "timeout waiting for device ready\n");
984 return -EIO;
985}
986
987static int smsc75xx_phy_gig_workaround(struct usbnet *dev)
988{
989 struct mii_if_info *mii = &dev->mii;
990 int ret = 0, timeout = 0;
991 u32 buf, link_up = 0;
992
993 /* Set the phy in Gig loopback */
994 smsc75xx_mdio_write(dev->net, mii->phy_id, MII_BMCR, 0x4040);
995
996 /* Wait for the link up */
997 do {
998 link_up = smsc75xx_link_ok_nopm(dev);
999 usleep_range(10000, 20000);
1000 timeout++;
1001 } while ((!link_up) && (timeout < 1000));
1002
1003 if (timeout >= 1000) {
1004 netdev_warn(dev->net, "Timeout waiting for PHY link up\n");
1005 return -EIO;
1006 }
1007
1008 /* phy reset */
1009 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1010 if (ret < 0) {
1011 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1012 return ret;
1013 }
1014
1015 buf |= PMT_CTL_PHY_RST;
1016
1017 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
1018 if (ret < 0) {
1019 netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret);
1020 return ret;
1021 }
1022
1023 timeout = 0;
1024 do {
1025 usleep_range(10000, 20000);
1026 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1027 if (ret < 0) {
1028 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n",
1029 ret);
1030 return ret;
1031 }
1032 timeout++;
1033 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
1034
1035 if (timeout >= 100) {
1036 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
1037 return -EIO;
1038 }
1039
1040 return 0;
1041}
1042
1043static int smsc75xx_reset(struct usbnet *dev)
1044{
1045 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1046 u32 buf;
1047 int ret = 0, timeout;
1048
1049 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset\n");
1050
1051 ret = smsc75xx_wait_ready(dev, 0);
1052 if (ret < 0) {
1053 netdev_warn(dev->net, "device not ready in smsc75xx_reset\n");
1054 return ret;
1055 }
1056
1057 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1058 if (ret < 0) {
1059 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1060 return ret;
1061 }
1062
1063 buf |= HW_CFG_LRST;
1064
1065 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
1066 if (ret < 0) {
1067 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1068 return ret;
1069 }
1070
1071 timeout = 0;
1072 do {
1073 msleep(10);
1074 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1075 if (ret < 0) {
1076 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1077 return ret;
1078 }
1079 timeout++;
1080 } while ((buf & HW_CFG_LRST) && (timeout < 100));
1081
1082 if (timeout >= 100) {
1083 netdev_warn(dev->net, "timeout on completion of Lite Reset\n");
1084 return -EIO;
1085 }
1086
1087 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY\n");
1088
1089 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1090 if (ret < 0) {
1091 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1092 return ret;
1093 }
1094
1095 buf |= PMT_CTL_PHY_RST;
1096
1097 ret = smsc75xx_write_reg(dev, PMT_CTL, buf);
1098 if (ret < 0) {
1099 netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret);
1100 return ret;
1101 }
1102
1103 timeout = 0;
1104 do {
1105 msleep(10);
1106 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf);
1107 if (ret < 0) {
1108 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret);
1109 return ret;
1110 }
1111 timeout++;
1112 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100));
1113
1114 if (timeout >= 100) {
1115 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
1116 return -EIO;
1117 }
1118
1119 netif_dbg(dev, ifup, dev->net, "PHY reset complete\n");
1120
1121 ret = smsc75xx_set_mac_address(dev);
1122 if (ret < 0) {
1123 netdev_warn(dev->net, "Failed to set mac address\n");
1124 return ret;
1125 }
1126
1127 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
1128 dev->net->dev_addr);
1129
1130 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1131 if (ret < 0) {
1132 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1133 return ret;
1134 }
1135
1136 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
1137 buf);
1138
1139 buf |= HW_CFG_BIR;
1140
1141 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
1142 if (ret < 0) {
1143 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1144 return ret;
1145 }
1146
1147 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1148 if (ret < 0) {
1149 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1150 return ret;
1151 }
1152
1153 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after writing HW_CFG_BIR: 0x%08x\n",
1154 buf);
1155
1156 if (!turbo_mode) {
1157 buf = 0;
1158 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
1159 } else if (dev->udev->speed == USB_SPEED_HIGH) {
1160 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
1161 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
1162 } else {
1163 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
1164 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
1165 }
1166
1167 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
1168 (ulong)dev->rx_urb_size);
1169
1170 ret = smsc75xx_write_reg(dev, BURST_CAP, buf);
1171 if (ret < 0) {
1172 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret);
1173 return ret;
1174 }
1175
1176 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf);
1177 if (ret < 0) {
1178 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret);
1179 return ret;
1180 }
1181
1182 netif_dbg(dev, ifup, dev->net,
1183 "Read Value from BURST_CAP after writing: 0x%08x\n", buf);
1184
1185 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
1186 if (ret < 0) {
1187 netdev_warn(dev->net, "Failed to write BULK_IN_DLY: %d\n", ret);
1188 return ret;
1189 }
1190
1191 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf);
1192 if (ret < 0) {
1193 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret);
1194 return ret;
1195 }
1196
1197 netif_dbg(dev, ifup, dev->net,
1198 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", buf);
1199
1200 if (turbo_mode) {
1201 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1202 if (ret < 0) {
1203 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1204 return ret;
1205 }
1206
1207 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf);
1208
1209 buf |= (HW_CFG_MEF | HW_CFG_BCE);
1210
1211 ret = smsc75xx_write_reg(dev, HW_CFG, buf);
1212 if (ret < 0) {
1213 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret);
1214 return ret;
1215 }
1216
1217 ret = smsc75xx_read_reg(dev, HW_CFG, &buf);
1218 if (ret < 0) {
1219 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret);
1220 return ret;
1221 }
1222
1223 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf);
1224 }
1225
1226 /* set FIFO sizes */
1227 buf = (MAX_RX_FIFO_SIZE - 512) / 512;
1228 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf);
1229 if (ret < 0) {
1230 netdev_warn(dev->net, "Failed to write FCT_RX_FIFO_END: %d\n", ret);
1231 return ret;
1232 }
1233
1234 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x\n", buf);
1235
1236 buf = (MAX_TX_FIFO_SIZE - 512) / 512;
1237 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf);
1238 if (ret < 0) {
1239 netdev_warn(dev->net, "Failed to write FCT_TX_FIFO_END: %d\n", ret);
1240 return ret;
1241 }
1242
1243 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x\n", buf);
1244
1245 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL);
1246 if (ret < 0) {
1247 netdev_warn(dev->net, "Failed to write INT_STS: %d\n", ret);
1248 return ret;
1249 }
1250
1251 ret = smsc75xx_read_reg(dev, ID_REV, &buf);
1252 if (ret < 0) {
1253 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret);
1254 return ret;
1255 }
1256
1257 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", buf);
1258
1259 ret = smsc75xx_read_reg(dev, E2P_CMD, &buf);
1260 if (ret < 0) {
1261 netdev_warn(dev->net, "Failed to read E2P_CMD: %d\n", ret);
1262 return ret;
1263 }
1264
1265 /* only set default GPIO/LED settings if no EEPROM is detected */
1266 if (!(buf & E2P_CMD_LOADED)) {
1267 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf);
1268 if (ret < 0) {
1269 netdev_warn(dev->net, "Failed to read LED_GPIO_CFG: %d\n", ret);
1270 return ret;
1271 }
1272
1273 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL);
1274 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL;
1275
1276 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf);
1277 if (ret < 0) {
1278 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG: %d\n", ret);
1279 return ret;
1280 }
1281 }
1282
1283 ret = smsc75xx_write_reg(dev, FLOW, 0);
1284 if (ret < 0) {
1285 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret);
1286 return ret;
1287 }
1288
1289 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0);
1290 if (ret < 0) {
1291 netdev_warn(dev->net, "Failed to write FCT_FLOW: %d\n", ret);
1292 return ret;
1293 }
1294
1295 /* Don't need rfe_ctl_lock during initialisation */
1296 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
1297 if (ret < 0) {
1298 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret);
1299 return ret;
1300 }
1301
1302 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF;
1303
1304 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl);
1305 if (ret < 0) {
1306 netdev_warn(dev->net, "Failed to write RFE_CTL: %d\n", ret);
1307 return ret;
1308 }
1309
1310 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl);
1311 if (ret < 0) {
1312 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret);
1313 return ret;
1314 }
1315
1316 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x\n",
1317 pdata->rfe_ctl);
1318
1319 /* Enable or disable checksum offload engines */
1320 smsc75xx_set_features(dev->net, dev->net->features);
1321
1322 smsc75xx_set_multicast(dev->net);
1323
1324 ret = smsc75xx_phy_initialize(dev);
1325 if (ret < 0) {
1326 netdev_warn(dev->net, "Failed to initialize PHY: %d\n", ret);
1327 return ret;
1328 }
1329
1330 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf);
1331 if (ret < 0) {
1332 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret);
1333 return ret;
1334 }
1335
1336 /* enable PHY interrupts */
1337 buf |= INT_ENP_PHY_INT;
1338
1339 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf);
1340 if (ret < 0) {
1341 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret);
1342 return ret;
1343 }
1344
1345 /* allow mac to detect speed and duplex from phy */
1346 ret = smsc75xx_read_reg(dev, MAC_CR, &buf);
1347 if (ret < 0) {
1348 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret);
1349 return ret;
1350 }
1351
1352 buf |= (MAC_CR_ADD | MAC_CR_ASD);
1353 ret = smsc75xx_write_reg(dev, MAC_CR, buf);
1354 if (ret < 0) {
1355 netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret);
1356 return ret;
1357 }
1358
1359 ret = smsc75xx_read_reg(dev, MAC_TX, &buf);
1360 if (ret < 0) {
1361 netdev_warn(dev->net, "Failed to read MAC_TX: %d\n", ret);
1362 return ret;
1363 }
1364
1365 buf |= MAC_TX_TXEN;
1366
1367 ret = smsc75xx_write_reg(dev, MAC_TX, buf);
1368 if (ret < 0) {
1369 netdev_warn(dev->net, "Failed to write MAC_TX: %d\n", ret);
1370 return ret;
1371 }
1372
1373 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x\n", buf);
1374
1375 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf);
1376 if (ret < 0) {
1377 netdev_warn(dev->net, "Failed to read FCT_TX_CTL: %d\n", ret);
1378 return ret;
1379 }
1380
1381 buf |= FCT_TX_CTL_EN;
1382
1383 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf);
1384 if (ret < 0) {
1385 netdev_warn(dev->net, "Failed to write FCT_TX_CTL: %d\n", ret);
1386 return ret;
1387 }
1388
1389 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x\n", buf);
1390
1391 ret = smsc75xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN);
1392 if (ret < 0) {
1393 netdev_warn(dev->net, "Failed to set max rx frame length\n");
1394 return ret;
1395 }
1396
1397 ret = smsc75xx_read_reg(dev, MAC_RX, &buf);
1398 if (ret < 0) {
1399 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
1400 return ret;
1401 }
1402
1403 buf |= MAC_RX_RXEN;
1404
1405 ret = smsc75xx_write_reg(dev, MAC_RX, buf);
1406 if (ret < 0) {
1407 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
1408 return ret;
1409 }
1410
1411 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x\n", buf);
1412
1413 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf);
1414 if (ret < 0) {
1415 netdev_warn(dev->net, "Failed to read FCT_RX_CTL: %d\n", ret);
1416 return ret;
1417 }
1418
1419 buf |= FCT_RX_CTL_EN;
1420
1421 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf);
1422 if (ret < 0) {
1423 netdev_warn(dev->net, "Failed to write FCT_RX_CTL: %d\n", ret);
1424 return ret;
1425 }
1426
1427 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x\n", buf);
1428
1429 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0\n");
1430 return 0;
1431}
1432
1433static const struct net_device_ops smsc75xx_netdev_ops = {
1434 .ndo_open = usbnet_open,
1435 .ndo_stop = usbnet_stop,
1436 .ndo_start_xmit = usbnet_start_xmit,
1437 .ndo_tx_timeout = usbnet_tx_timeout,
1438 .ndo_get_stats64 = dev_get_tstats64,
1439 .ndo_change_mtu = smsc75xx_change_mtu,
1440 .ndo_set_mac_address = eth_mac_addr,
1441 .ndo_validate_addr = eth_validate_addr,
1442 .ndo_do_ioctl = smsc75xx_ioctl,
1443 .ndo_set_rx_mode = smsc75xx_set_multicast,
1444 .ndo_set_features = smsc75xx_set_features,
1445};
1446
1447static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf)
1448{
1449 struct smsc75xx_priv *pdata = NULL;
1450 int ret;
1451
1452 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1453
1454 ret = usbnet_get_endpoints(dev, intf);
1455 if (ret < 0) {
1456 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1457 return ret;
1458 }
1459
1460 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv),
1461 GFP_KERNEL);
1462
1463 pdata = (struct smsc75xx_priv *)(dev->data[0]);
1464 if (!pdata)
1465 return -ENOMEM;
1466
1467 pdata->dev = dev;
1468
1469 spin_lock_init(&pdata->rfe_ctl_lock);
1470 mutex_init(&pdata->dataport_mutex);
1471
1472 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write);
1473
1474 if (DEFAULT_TX_CSUM_ENABLE)
1475 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1476
1477 if (DEFAULT_RX_CSUM_ENABLE)
1478 dev->net->features |= NETIF_F_RXCSUM;
1479
1480 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
1481 NETIF_F_RXCSUM;
1482
1483 ret = smsc75xx_wait_ready(dev, 0);
1484 if (ret < 0) {
1485 netdev_warn(dev->net, "device not ready in smsc75xx_bind\n");
1486 goto free_pdata;
1487 }
1488
1489 smsc75xx_init_mac_address(dev);
1490
1491 /* Init all registers */
1492 ret = smsc75xx_reset(dev);
1493 if (ret < 0) {
1494 netdev_warn(dev->net, "smsc75xx_reset error %d\n", ret);
1495 goto cancel_work;
1496 }
1497
1498 dev->net->netdev_ops = &smsc75xx_netdev_ops;
1499 dev->net->ethtool_ops = &smsc75xx_ethtool_ops;
1500 dev->net->flags |= IFF_MULTICAST;
1501 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD;
1502 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
1503 dev->net->max_mtu = MAX_SINGLE_PACKET_SIZE;
1504 return 0;
1505
1506cancel_work:
1507 cancel_work_sync(&pdata->set_multicast);
1508free_pdata:
1509 kfree(pdata);
1510 dev->data[0] = 0;
1511 return ret;
1512}
1513
1514static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1515{
1516 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1517 if (pdata) {
1518 cancel_work_sync(&pdata->set_multicast);
1519 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
1520 kfree(pdata);
1521 dev->data[0] = 0;
1522 }
1523}
1524
1525static u16 smsc_crc(const u8 *buffer, size_t len)
1526{
1527 return bitrev16(crc16(0xFFFF, buffer, len));
1528}
1529
1530static int smsc75xx_write_wuff(struct usbnet *dev, int filter, u32 wuf_cfg,
1531 u32 wuf_mask1)
1532{
1533 int cfg_base = WUF_CFGX + filter * 4;
1534 int mask_base = WUF_MASKX + filter * 16;
1535 int ret;
1536
1537 ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg);
1538 if (ret < 0) {
1539 netdev_warn(dev->net, "Error writing WUF_CFGX\n");
1540 return ret;
1541 }
1542
1543 ret = smsc75xx_write_reg(dev, mask_base, wuf_mask1);
1544 if (ret < 0) {
1545 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1546 return ret;
1547 }
1548
1549 ret = smsc75xx_write_reg(dev, mask_base + 4, 0);
1550 if (ret < 0) {
1551 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1552 return ret;
1553 }
1554
1555 ret = smsc75xx_write_reg(dev, mask_base + 8, 0);
1556 if (ret < 0) {
1557 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1558 return ret;
1559 }
1560
1561 ret = smsc75xx_write_reg(dev, mask_base + 12, 0);
1562 if (ret < 0) {
1563 netdev_warn(dev->net, "Error writing WUF_MASKX\n");
1564 return ret;
1565 }
1566
1567 return 0;
1568}
1569
1570static int smsc75xx_enter_suspend0(struct usbnet *dev)
1571{
1572 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1573 u32 val;
1574 int ret;
1575
1576 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1577 if (ret < 0) {
1578 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1579 return ret;
1580 }
1581
1582 val &= (~(PMT_CTL_SUS_MODE | PMT_CTL_PHY_RST));
1583 val |= PMT_CTL_SUS_MODE_0 | PMT_CTL_WOL_EN | PMT_CTL_WUPS;
1584
1585 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1586 if (ret < 0) {
1587 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1588 return ret;
1589 }
1590
1591 pdata->suspend_flags |= SUSPEND_SUSPEND0;
1592
1593 return 0;
1594}
1595
1596static int smsc75xx_enter_suspend1(struct usbnet *dev)
1597{
1598 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1599 u32 val;
1600 int ret;
1601
1602 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1603 if (ret < 0) {
1604 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1605 return ret;
1606 }
1607
1608 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1609 val |= PMT_CTL_SUS_MODE_1;
1610
1611 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1612 if (ret < 0) {
1613 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1614 return ret;
1615 }
1616
1617 /* clear wol status, enable energy detection */
1618 val &= ~PMT_CTL_WUPS;
1619 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN);
1620
1621 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1622 if (ret < 0) {
1623 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1624 return ret;
1625 }
1626
1627 pdata->suspend_flags |= SUSPEND_SUSPEND1;
1628
1629 return 0;
1630}
1631
1632static int smsc75xx_enter_suspend2(struct usbnet *dev)
1633{
1634 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1635 u32 val;
1636 int ret;
1637
1638 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1639 if (ret < 0) {
1640 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1641 return ret;
1642 }
1643
1644 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1645 val |= PMT_CTL_SUS_MODE_2;
1646
1647 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1648 if (ret < 0) {
1649 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1650 return ret;
1651 }
1652
1653 pdata->suspend_flags |= SUSPEND_SUSPEND2;
1654
1655 return 0;
1656}
1657
1658static int smsc75xx_enter_suspend3(struct usbnet *dev)
1659{
1660 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1661 u32 val;
1662 int ret;
1663
1664 ret = smsc75xx_read_reg_nopm(dev, FCT_RX_CTL, &val);
1665 if (ret < 0) {
1666 netdev_warn(dev->net, "Error reading FCT_RX_CTL\n");
1667 return ret;
1668 }
1669
1670 if (val & FCT_RX_CTL_RXUSED) {
1671 netdev_dbg(dev->net, "rx fifo not empty in autosuspend\n");
1672 return -EBUSY;
1673 }
1674
1675 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1676 if (ret < 0) {
1677 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1678 return ret;
1679 }
1680
1681 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST);
1682 val |= PMT_CTL_SUS_MODE_3 | PMT_CTL_RES_CLR_WKP_EN;
1683
1684 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1685 if (ret < 0) {
1686 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1687 return ret;
1688 }
1689
1690 /* clear wol status */
1691 val &= ~PMT_CTL_WUPS;
1692 val |= PMT_CTL_WUPS_WOL;
1693
1694 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1695 if (ret < 0) {
1696 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1697 return ret;
1698 }
1699
1700 pdata->suspend_flags |= SUSPEND_SUSPEND3;
1701
1702 return 0;
1703}
1704
1705static int smsc75xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
1706{
1707 struct mii_if_info *mii = &dev->mii;
1708 int ret;
1709
1710 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
1711
1712 /* read to clear */
1713 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
1714 if (ret < 0) {
1715 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n");
1716 return ret;
1717 }
1718
1719 /* enable interrupt source */
1720 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
1721 if (ret < 0) {
1722 netdev_warn(dev->net, "Error reading PHY_INT_MASK\n");
1723 return ret;
1724 }
1725
1726 ret |= mask;
1727
1728 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
1729
1730 return 0;
1731}
1732
1733static int smsc75xx_link_ok_nopm(struct usbnet *dev)
1734{
1735 struct mii_if_info *mii = &dev->mii;
1736 int ret;
1737
1738 /* first, a dummy read, needed to latch some MII phys */
1739 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
1740 if (ret < 0) {
1741 netdev_warn(dev->net, "Error reading MII_BMSR\n");
1742 return ret;
1743 }
1744
1745 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
1746 if (ret < 0) {
1747 netdev_warn(dev->net, "Error reading MII_BMSR\n");
1748 return ret;
1749 }
1750
1751 return !!(ret & BMSR_LSTATUS);
1752}
1753
1754static int smsc75xx_autosuspend(struct usbnet *dev, u32 link_up)
1755{
1756 int ret;
1757
1758 if (!netif_running(dev->net)) {
1759 /* interface is ifconfig down so fully power down hw */
1760 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
1761 return smsc75xx_enter_suspend2(dev);
1762 }
1763
1764 if (!link_up) {
1765 /* link is down so enter EDPD mode */
1766 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
1767
1768 /* enable PHY wakeup events for if cable is attached */
1769 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1770 PHY_INT_MASK_ANEG_COMP);
1771 if (ret < 0) {
1772 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1773 return ret;
1774 }
1775
1776 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1777 return smsc75xx_enter_suspend1(dev);
1778 }
1779
1780 /* enable PHY wakeup events so we remote wakeup if cable is pulled */
1781 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1782 PHY_INT_MASK_LINK_DOWN);
1783 if (ret < 0) {
1784 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1785 return ret;
1786 }
1787
1788 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
1789 return smsc75xx_enter_suspend3(dev);
1790}
1791
1792static int smsc75xx_suspend(struct usb_interface *intf, pm_message_t message)
1793{
1794 struct usbnet *dev = usb_get_intfdata(intf);
1795 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
1796 u32 val, link_up;
1797 int ret;
1798
1799 ret = usbnet_suspend(intf, message);
1800 if (ret < 0) {
1801 netdev_warn(dev->net, "usbnet_suspend error\n");
1802 return ret;
1803 }
1804
1805 if (pdata->suspend_flags) {
1806 netdev_warn(dev->net, "error during last resume\n");
1807 pdata->suspend_flags = 0;
1808 }
1809
1810 /* determine if link is up using only _nopm functions */
1811 link_up = smsc75xx_link_ok_nopm(dev);
1812
1813 if (message.event == PM_EVENT_AUTO_SUSPEND) {
1814 ret = smsc75xx_autosuspend(dev, link_up);
1815 goto done;
1816 }
1817
1818 /* if we get this far we're not autosuspending */
1819 /* if no wol options set, or if link is down and we're not waking on
1820 * PHY activity, enter lowest power SUSPEND2 mode
1821 */
1822 if (!(pdata->wolopts & SUPPORTED_WAKE) ||
1823 !(link_up || (pdata->wolopts & WAKE_PHY))) {
1824 netdev_info(dev->net, "entering SUSPEND2 mode\n");
1825
1826 /* disable energy detect (link up) & wake up events */
1827 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1828 if (ret < 0) {
1829 netdev_warn(dev->net, "Error reading WUCSR\n");
1830 goto done;
1831 }
1832
1833 val &= ~(WUCSR_MPEN | WUCSR_WUEN);
1834
1835 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1836 if (ret < 0) {
1837 netdev_warn(dev->net, "Error writing WUCSR\n");
1838 goto done;
1839 }
1840
1841 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1842 if (ret < 0) {
1843 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1844 goto done;
1845 }
1846
1847 val &= ~(PMT_CTL_ED_EN | PMT_CTL_WOL_EN);
1848
1849 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
1850 if (ret < 0) {
1851 netdev_warn(dev->net, "Error writing PMT_CTL\n");
1852 goto done;
1853 }
1854
1855 ret = smsc75xx_enter_suspend2(dev);
1856 goto done;
1857 }
1858
1859 if (pdata->wolopts & WAKE_PHY) {
1860 ret = smsc75xx_enable_phy_wakeup_interrupts(dev,
1861 (PHY_INT_MASK_ANEG_COMP | PHY_INT_MASK_LINK_DOWN));
1862 if (ret < 0) {
1863 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1864 goto done;
1865 }
1866
1867 /* if link is down then configure EDPD and enter SUSPEND1,
1868 * otherwise enter SUSPEND0 below
1869 */
1870 if (!link_up) {
1871 struct mii_if_info *mii = &dev->mii;
1872 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1873
1874 /* enable energy detect power-down mode */
1875 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id,
1876 PHY_MODE_CTRL_STS);
1877 if (ret < 0) {
1878 netdev_warn(dev->net, "Error reading PHY_MODE_CTRL_STS\n");
1879 goto done;
1880 }
1881
1882 ret |= MODE_CTRL_STS_EDPWRDOWN;
1883
1884 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id,
1885 PHY_MODE_CTRL_STS, ret);
1886
1887 /* enter SUSPEND1 mode */
1888 ret = smsc75xx_enter_suspend1(dev);
1889 goto done;
1890 }
1891 }
1892
1893 if (pdata->wolopts & (WAKE_MCAST | WAKE_ARP)) {
1894 int i, filter = 0;
1895
1896 /* disable all filters */
1897 for (i = 0; i < WUF_NUM; i++) {
1898 ret = smsc75xx_write_reg_nopm(dev, WUF_CFGX + i * 4, 0);
1899 if (ret < 0) {
1900 netdev_warn(dev->net, "Error writing WUF_CFGX\n");
1901 goto done;
1902 }
1903 }
1904
1905 if (pdata->wolopts & WAKE_MCAST) {
1906 const u8 mcast[] = {0x01, 0x00, 0x5E};
1907 netdev_info(dev->net, "enabling multicast detection\n");
1908
1909 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_MULTICAST
1910 | smsc_crc(mcast, 3);
1911 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0007);
1912 if (ret < 0) {
1913 netdev_warn(dev->net, "Error writing wakeup filter\n");
1914 goto done;
1915 }
1916 }
1917
1918 if (pdata->wolopts & WAKE_ARP) {
1919 const u8 arp[] = {0x08, 0x06};
1920 netdev_info(dev->net, "enabling ARP detection\n");
1921
1922 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_ALL | (0x0C << 16)
1923 | smsc_crc(arp, 2);
1924 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0003);
1925 if (ret < 0) {
1926 netdev_warn(dev->net, "Error writing wakeup filter\n");
1927 goto done;
1928 }
1929 }
1930
1931 /* clear any pending pattern match packet status */
1932 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1933 if (ret < 0) {
1934 netdev_warn(dev->net, "Error reading WUCSR\n");
1935 goto done;
1936 }
1937
1938 val |= WUCSR_WUFR;
1939
1940 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1941 if (ret < 0) {
1942 netdev_warn(dev->net, "Error writing WUCSR\n");
1943 goto done;
1944 }
1945
1946 netdev_info(dev->net, "enabling packet match detection\n");
1947 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1948 if (ret < 0) {
1949 netdev_warn(dev->net, "Error reading WUCSR\n");
1950 goto done;
1951 }
1952
1953 val |= WUCSR_WUEN;
1954
1955 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1956 if (ret < 0) {
1957 netdev_warn(dev->net, "Error writing WUCSR\n");
1958 goto done;
1959 }
1960 } else {
1961 netdev_info(dev->net, "disabling packet match detection\n");
1962 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1963 if (ret < 0) {
1964 netdev_warn(dev->net, "Error reading WUCSR\n");
1965 goto done;
1966 }
1967
1968 val &= ~WUCSR_WUEN;
1969
1970 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1971 if (ret < 0) {
1972 netdev_warn(dev->net, "Error writing WUCSR\n");
1973 goto done;
1974 }
1975 }
1976
1977 /* disable magic, bcast & unicast wakeup sources */
1978 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
1979 if (ret < 0) {
1980 netdev_warn(dev->net, "Error reading WUCSR\n");
1981 goto done;
1982 }
1983
1984 val &= ~(WUCSR_MPEN | WUCSR_BCST_EN | WUCSR_PFDA_EN);
1985
1986 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
1987 if (ret < 0) {
1988 netdev_warn(dev->net, "Error writing WUCSR\n");
1989 goto done;
1990 }
1991
1992 if (pdata->wolopts & WAKE_PHY) {
1993 netdev_info(dev->net, "enabling PHY wakeup\n");
1994
1995 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
1996 if (ret < 0) {
1997 netdev_warn(dev->net, "Error reading PMT_CTL\n");
1998 goto done;
1999 }
2000
2001 /* clear wol status, enable energy detection */
2002 val &= ~PMT_CTL_WUPS;
2003 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN);
2004
2005 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
2006 if (ret < 0) {
2007 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2008 goto done;
2009 }
2010 }
2011
2012 if (pdata->wolopts & WAKE_MAGIC) {
2013 netdev_info(dev->net, "enabling magic packet wakeup\n");
2014 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2015 if (ret < 0) {
2016 netdev_warn(dev->net, "Error reading WUCSR\n");
2017 goto done;
2018 }
2019
2020 /* clear any pending magic packet status */
2021 val |= WUCSR_MPR | WUCSR_MPEN;
2022
2023 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2024 if (ret < 0) {
2025 netdev_warn(dev->net, "Error writing WUCSR\n");
2026 goto done;
2027 }
2028 }
2029
2030 if (pdata->wolopts & WAKE_BCAST) {
2031 netdev_info(dev->net, "enabling broadcast detection\n");
2032 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2033 if (ret < 0) {
2034 netdev_warn(dev->net, "Error reading WUCSR\n");
2035 goto done;
2036 }
2037
2038 val |= WUCSR_BCAST_FR | WUCSR_BCST_EN;
2039
2040 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2041 if (ret < 0) {
2042 netdev_warn(dev->net, "Error writing WUCSR\n");
2043 goto done;
2044 }
2045 }
2046
2047 if (pdata->wolopts & WAKE_UCAST) {
2048 netdev_info(dev->net, "enabling unicast detection\n");
2049 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2050 if (ret < 0) {
2051 netdev_warn(dev->net, "Error reading WUCSR\n");
2052 goto done;
2053 }
2054
2055 val |= WUCSR_WUFR | WUCSR_PFDA_EN;
2056
2057 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2058 if (ret < 0) {
2059 netdev_warn(dev->net, "Error writing WUCSR\n");
2060 goto done;
2061 }
2062 }
2063
2064 /* enable receiver to enable frame reception */
2065 ret = smsc75xx_read_reg_nopm(dev, MAC_RX, &val);
2066 if (ret < 0) {
2067 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret);
2068 goto done;
2069 }
2070
2071 val |= MAC_RX_RXEN;
2072
2073 ret = smsc75xx_write_reg_nopm(dev, MAC_RX, val);
2074 if (ret < 0) {
2075 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret);
2076 goto done;
2077 }
2078
2079 /* some wol options are enabled, so enter SUSPEND0 */
2080 netdev_info(dev->net, "entering SUSPEND0 mode\n");
2081 ret = smsc75xx_enter_suspend0(dev);
2082
2083done:
2084 /*
2085 * TODO: resume() might need to handle the suspend failure
2086 * in system sleep
2087 */
2088 if (ret && PMSG_IS_AUTO(message))
2089 usbnet_resume(intf);
2090 return ret;
2091}
2092
2093static int smsc75xx_resume(struct usb_interface *intf)
2094{
2095 struct usbnet *dev = usb_get_intfdata(intf);
2096 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]);
2097 u8 suspend_flags = pdata->suspend_flags;
2098 int ret;
2099 u32 val;
2100
2101 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
2102
2103 /* do this first to ensure it's cleared even in error case */
2104 pdata->suspend_flags = 0;
2105
2106 if (suspend_flags & SUSPEND_ALLMODES) {
2107 /* Disable wakeup sources */
2108 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val);
2109 if (ret < 0) {
2110 netdev_warn(dev->net, "Error reading WUCSR\n");
2111 return ret;
2112 }
2113
2114 val &= ~(WUCSR_WUEN | WUCSR_MPEN | WUCSR_PFDA_EN
2115 | WUCSR_BCST_EN);
2116
2117 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val);
2118 if (ret < 0) {
2119 netdev_warn(dev->net, "Error writing WUCSR\n");
2120 return ret;
2121 }
2122
2123 /* clear wake-up status */
2124 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
2125 if (ret < 0) {
2126 netdev_warn(dev->net, "Error reading PMT_CTL\n");
2127 return ret;
2128 }
2129
2130 val &= ~PMT_CTL_WOL_EN;
2131 val |= PMT_CTL_WUPS;
2132
2133 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
2134 if (ret < 0) {
2135 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2136 return ret;
2137 }
2138 }
2139
2140 if (suspend_flags & SUSPEND_SUSPEND2) {
2141 netdev_info(dev->net, "resuming from SUSPEND2\n");
2142
2143 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val);
2144 if (ret < 0) {
2145 netdev_warn(dev->net, "Error reading PMT_CTL\n");
2146 return ret;
2147 }
2148
2149 val |= PMT_CTL_PHY_PWRUP;
2150
2151 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val);
2152 if (ret < 0) {
2153 netdev_warn(dev->net, "Error writing PMT_CTL\n");
2154 return ret;
2155 }
2156 }
2157
2158 ret = smsc75xx_wait_ready(dev, 1);
2159 if (ret < 0) {
2160 netdev_warn(dev->net, "device not ready in smsc75xx_resume\n");
2161 return ret;
2162 }
2163
2164 return usbnet_resume(intf);
2165}
2166
2167static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb,
2168 u32 rx_cmd_a, u32 rx_cmd_b)
2169{
2170 if (!(dev->net->features & NETIF_F_RXCSUM) ||
2171 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) {
2172 skb->ip_summed = CHECKSUM_NONE;
2173 } else {
2174 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT));
2175 skb->ip_summed = CHECKSUM_COMPLETE;
2176 }
2177}
2178
2179static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
2180{
2181 /* This check is no longer done by usbnet */
2182 if (skb->len < dev->net->hard_header_len)
2183 return 0;
2184
2185 while (skb->len > 0) {
2186 u32 rx_cmd_a, rx_cmd_b, align_count, size;
2187 struct sk_buff *ax_skb;
2188 unsigned char *packet;
2189
2190 rx_cmd_a = get_unaligned_le32(skb->data);
2191 skb_pull(skb, 4);
2192
2193 rx_cmd_b = get_unaligned_le32(skb->data);
2194 skb_pull(skb, 4 + RXW_PADDING);
2195
2196 packet = skb->data;
2197
2198 /* get the packet length */
2199 size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING;
2200 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4;
2201
2202 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) {
2203 netif_dbg(dev, rx_err, dev->net,
2204 "Error rx_cmd_a=0x%08x\n", rx_cmd_a);
2205 dev->net->stats.rx_errors++;
2206 dev->net->stats.rx_dropped++;
2207
2208 if (rx_cmd_a & RX_CMD_A_FCS)
2209 dev->net->stats.rx_crc_errors++;
2210 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT))
2211 dev->net->stats.rx_frame_errors++;
2212 } else {
2213 /* MAX_SINGLE_PACKET_SIZE + 4(CRC) + 2(COE) + 4(Vlan) */
2214 if (unlikely(size > (MAX_SINGLE_PACKET_SIZE + ETH_HLEN + 12))) {
2215 netif_dbg(dev, rx_err, dev->net,
2216 "size err rx_cmd_a=0x%08x\n",
2217 rx_cmd_a);
2218 return 0;
2219 }
2220
2221 /* last frame in this batch */
2222 if (skb->len == size) {
2223 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a,
2224 rx_cmd_b);
2225
2226 skb_trim(skb, skb->len - 4); /* remove fcs */
2227 skb->truesize = size + sizeof(struct sk_buff);
2228
2229 return 1;
2230 }
2231
2232 ax_skb = skb_clone(skb, GFP_ATOMIC);
2233 if (unlikely(!ax_skb)) {
2234 netdev_warn(dev->net, "Error allocating skb\n");
2235 return 0;
2236 }
2237
2238 ax_skb->len = size;
2239 ax_skb->data = packet;
2240 skb_set_tail_pointer(ax_skb, size);
2241
2242 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a,
2243 rx_cmd_b);
2244
2245 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
2246 ax_skb->truesize = size + sizeof(struct sk_buff);
2247
2248 usbnet_skb_return(dev, ax_skb);
2249 }
2250
2251 skb_pull(skb, size);
2252
2253 /* padding bytes before the next frame starts */
2254 if (skb->len)
2255 skb_pull(skb, align_count);
2256 }
2257
2258 return 1;
2259}
2260
2261static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev,
2262 struct sk_buff *skb, gfp_t flags)
2263{
2264 u32 tx_cmd_a, tx_cmd_b;
2265 void *ptr;
2266
2267 if (skb_cow_head(skb, SMSC75XX_TX_OVERHEAD)) {
2268 dev_kfree_skb_any(skb);
2269 return NULL;
2270 }
2271
2272 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS;
2273
2274 if (skb->ip_summed == CHECKSUM_PARTIAL)
2275 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE;
2276
2277 if (skb_is_gso(skb)) {
2278 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN);
2279 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS;
2280
2281 tx_cmd_a |= TX_CMD_A_LSO;
2282 } else {
2283 tx_cmd_b = 0;
2284 }
2285
2286 ptr = skb_push(skb, 8);
2287 put_unaligned_le32(tx_cmd_a, ptr);
2288 put_unaligned_le32(tx_cmd_b, ptr + 4);
2289
2290 return skb;
2291}
2292
2293static int smsc75xx_manage_power(struct usbnet *dev, int on)
2294{
2295 dev->intf->needs_remote_wakeup = on;
2296 return 0;
2297}
2298
2299static const struct driver_info smsc75xx_info = {
2300 .description = "smsc75xx USB 2.0 Gigabit Ethernet",
2301 .bind = smsc75xx_bind,
2302 .unbind = smsc75xx_unbind,
2303 .link_reset = smsc75xx_link_reset,
2304 .reset = smsc75xx_reset,
2305 .rx_fixup = smsc75xx_rx_fixup,
2306 .tx_fixup = smsc75xx_tx_fixup,
2307 .status = smsc75xx_status,
2308 .manage_power = smsc75xx_manage_power,
2309 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
2310};
2311
2312static const struct usb_device_id products[] = {
2313 {
2314 /* SMSC7500 USB Gigabit Ethernet Device */
2315 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500),
2316 .driver_info = (unsigned long) &smsc75xx_info,
2317 },
2318 {
2319 /* SMSC7500 USB Gigabit Ethernet Device */
2320 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505),
2321 .driver_info = (unsigned long) &smsc75xx_info,
2322 },
2323 { }, /* END */
2324};
2325MODULE_DEVICE_TABLE(usb, products);
2326
2327static struct usb_driver smsc75xx_driver = {
2328 .name = SMSC_CHIPNAME,
2329 .id_table = products,
2330 .probe = usbnet_probe,
2331 .suspend = smsc75xx_suspend,
2332 .resume = smsc75xx_resume,
2333 .reset_resume = smsc75xx_resume,
2334 .disconnect = usbnet_disconnect,
2335 .disable_hub_initiated_lpm = 1,
2336 .supports_autosuspend = 1,
2337};
2338
2339module_usb_driver(smsc75xx_driver);
2340
2341MODULE_AUTHOR("Nancy Lin");
2342MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
2343MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices");
2344MODULE_LICENSE("GPL");