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  1/**
  2 * Copyright (c) 2014 Redpine Signals Inc.
  3 *
  4 * Permission to use, copy, modify, and/or distribute this software for any
  5 * purpose with or without fee is hereby granted, provided that the above
  6 * copyright notice and this permission notice appear in all copies.
  7 *
  8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
 15 */
 16
 17#ifndef __RSI_MAIN_H__
 18#define __RSI_MAIN_H__
 19
 20#include <linux/string.h>
 21#include <linux/skbuff.h>
 22#include <net/mac80211.h>
 23#include <net/rsi_91x.h>
 24
 25struct rsi_sta {
 26	struct ieee80211_sta *sta;
 27	s16 sta_id;
 28	u16 seq_start[IEEE80211_NUM_TIDS];
 29	bool start_tx_aggr[IEEE80211_NUM_TIDS];
 30};
 31
 32struct rsi_hw;
 33
 34#include "rsi_ps.h"
 35
 36#define ERR_ZONE                        BIT(0)  /* For Error Msgs             */
 37#define INFO_ZONE                       BIT(1)  /* For General Status Msgs    */
 38#define INIT_ZONE                       BIT(2)  /* For Driver Init Seq Msgs   */
 39#define MGMT_TX_ZONE                    BIT(3)  /* For TX Mgmt Path Msgs      */
 40#define MGMT_RX_ZONE                    BIT(4)  /* For RX Mgmt Path Msgs      */
 41#define DATA_TX_ZONE                    BIT(5)  /* For TX Data Path Msgs      */
 42#define DATA_RX_ZONE                    BIT(6)  /* For RX Data Path Msgs      */
 43#define FSM_ZONE                        BIT(7)  /* For State Machine Msgs     */
 44#define ISR_ZONE                        BIT(8)  /* For Interrupt Msgs         */
 45
 46enum RSI_FSM_STATES {
 47	FSM_FW_NOT_LOADED,
 48	FSM_CARD_NOT_READY,
 49	FSM_COMMON_DEV_PARAMS_SENT,
 50	FSM_BOOT_PARAMS_SENT,
 51	FSM_EEPROM_READ_MAC_ADDR,
 52	FSM_EEPROM_READ_RF_TYPE,
 53	FSM_RESET_MAC_SENT,
 54	FSM_RADIO_CAPS_SENT,
 55	FSM_BB_RF_PROG_SENT,
 56	FSM_MAC_INIT_DONE,
 57
 58	NUM_FSM_STATES
 59};
 60
 61extern u32 rsi_zone_enabled;
 62extern __printf(2, 3) void rsi_dbg(u32 zone, const char *fmt, ...);
 63
 64#define RSI_MAX_VIFS                    3
 65#define NUM_EDCA_QUEUES                 4
 66#define IEEE80211_ADDR_LEN              6
 67#define FRAME_DESC_SZ                   16
 68#define MIN_802_11_HDR_LEN              24
 69#define RSI_DEF_KEEPALIVE               90
 70#define RSI_WOW_KEEPALIVE                5
 71#define RSI_BCN_MISS_THRESHOLD           24
 72
 73#define DATA_QUEUE_WATER_MARK           400
 74#define MIN_DATA_QUEUE_WATER_MARK       300
 75#define MULTICAST_WATER_MARK            200
 76#define MAC_80211_HDR_FRAME_CONTROL     0
 77#define WME_NUM_AC                      4
 78#define NUM_SOFT_QUEUES                 6
 79#define MAX_HW_QUEUES                   12
 80#define INVALID_QUEUE                   0xff
 81#define MAX_CONTINUOUS_VO_PKTS          8
 82#define MAX_CONTINUOUS_VI_PKTS          4
 83
 84/* Hardware queue info */
 85#define BROADCAST_HW_Q			9
 86#define MGMT_HW_Q			10
 87#define BEACON_HW_Q			11
 88
 89#define IEEE80211_MGMT_FRAME            0x00
 90#define IEEE80211_CTL_FRAME             0x04
 91
 92#define RSI_MAX_ASSOC_STAS		32
 93#define IEEE80211_QOS_TID               0x0f
 94#define IEEE80211_NONQOS_TID            16
 95
 96#define MAX_DEBUGFS_ENTRIES             4
 97
 98#define TID_TO_WME_AC(_tid) (      \
 99	((_tid) == 0 || (_tid) == 3) ? BE_Q : \
100	((_tid) < 3) ? BK_Q : \
101	((_tid) < 6) ? VI_Q : \
102	VO_Q)
103
104#define WME_AC(_q) (    \
105	((_q) == BK_Q) ? IEEE80211_AC_BK : \
106	((_q) == BE_Q) ? IEEE80211_AC_BE : \
107	((_q) == VI_Q) ? IEEE80211_AC_VI : \
108	IEEE80211_AC_VO)
109
110/* WoWLAN flags */
111#define RSI_WOW_ENABLED			BIT(0)
112#define RSI_WOW_NO_CONNECTION		BIT(1)
113
114#define RSI_MAX_RX_PKTS		64
115
116enum rsi_dev_model {
117	RSI_DEV_9113 = 0,
118	RSI_DEV_9116
119};
120
121struct version_info {
122	u16 major;
123	u16 minor;
124	u8 release_num;
125	u8 patch_num;
126	union {
127		struct {
128			u8 fw_ver[8];
129		} info;
130	} ver;
131} __packed;
132
133struct skb_info {
134	s8 rssi;
135	u32 flags;
136	u16 channel;
137	s8 tid;
138	s8 sta_id;
139	u8 internal_hdr_size;
140	struct ieee80211_vif *vif;
141	u8 vap_id;
142};
143
144enum edca_queue {
145	BK_Q,
146	BE_Q,
147	VI_Q,
148	VO_Q,
149	MGMT_SOFT_Q,
150	MGMT_BEACON_Q
151};
152
153struct security_info {
154	bool security_enable;
155	u32 ptk_cipher;
156	u32 gtk_cipher;
157};
158
159struct wmm_qinfo {
160	s32 weight;
161	s32 wme_params;
162	s32 pkt_contended;
163	s32 txop;
164};
165
166struct transmit_q_stats {
167	u32 total_tx_pkt_send[NUM_EDCA_QUEUES + 2];
168	u32 total_tx_pkt_freed[NUM_EDCA_QUEUES + 2];
169};
170
171#define MAX_BGSCAN_CHANNELS_DUAL_BAND	38
172#define MAX_BGSCAN_PROBE_REQ_LEN	0x64
173#define RSI_DEF_BGSCAN_THRLD		0x0
174#define RSI_DEF_ROAM_THRLD		0xa
175#define RSI_BGSCAN_PERIODICITY		0x1e
176#define RSI_ACTIVE_SCAN_TIME		0x14
177#define RSI_PASSIVE_SCAN_TIME		0x46
178#define RSI_CHANNEL_SCAN_TIME		20
179struct rsi_bgscan_params {
180	u16 bgscan_threshold;
181	u16 roam_threshold;
182	u16 bgscan_periodicity;
183	u8 num_bgscan_channels;
184	u8 two_probe;
185	u16 active_scan_duration;
186	u16 passive_scan_duration;
187};
188
189struct vif_priv {
190	bool is_ht;
191	bool sgi;
192	u16 seq_start;
193	int vap_id;
194};
195
196struct rsi_event {
197	atomic_t event_condition;
198	wait_queue_head_t event_queue;
199};
200
201struct rsi_thread {
202	void (*thread_function)(void *);
203	struct completion completion;
204	struct task_struct *task;
205	struct rsi_event event;
206	atomic_t thread_done;
207};
208
209struct cqm_info {
210	s8 last_cqm_event_rssi;
211	int rssi_thold;
212	u32 rssi_hyst;
213};
214
215enum rsi_dfs_regions {
216	RSI_REGION_FCC = 0,
217	RSI_REGION_ETSI,
218	RSI_REGION_TELEC,
219	RSI_REGION_WORLD
220};
221
222struct rsi_9116_features {
223	u8 pll_mode;
224	u8 rf_type;
225	u8 wireless_mode;
226	u8 afe_type;
227	u8 enable_ppe;
228	u8 dpd;
229	u32 sifs_tx_enable;
230	u32 ps_options;
231};
232
233struct rsi_common {
234	struct rsi_hw *priv;
235	struct vif_priv vif_info[RSI_MAX_VIFS];
236
237	void *coex_cb;
238	bool mgmt_q_block;
239	struct version_info lmac_ver;
240
241	struct rsi_thread tx_thread;
242	struct sk_buff_head tx_queue[NUM_EDCA_QUEUES + 2];
243	struct completion wlan_init_completion;
244	/* Mutex declaration */
245	struct mutex mutex;
246	/* Mutex used for tx thread */
247	struct mutex tx_lock;
248	/* Mutex used for rx thread */
249	struct mutex rx_lock;
250	u8 endpoint;
251
252	/* Channel/band related */
253	u8 band;
254	u8 num_supp_bands;
255	u8 channel_width;
256
257	u16 rts_threshold;
258	u16 bitrate_mask[2];
259	u32 fixedrate_mask[2];
260
261	u8 rf_reset;
262	struct transmit_q_stats tx_stats;
263	struct security_info secinfo;
264	struct wmm_qinfo tx_qinfo[NUM_EDCA_QUEUES];
265	struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES];
266	u8 mac_addr[IEEE80211_ADDR_LEN];
267
268	/* state related */
269	u32 fsm_state;
270	bool init_done;
271	u8 bb_rf_prog_count;
272	bool iface_down;
273
274	/* Generic */
275	u8 channel;
276	u8 *rx_data_pkt;
277	u8 mac_id;
278	u8 radio_id;
279	u16 rate_pwr[20];
280	u16 min_rate;
281
282	/* WMM algo related */
283	u8 selected_qnum;
284	u32 pkt_cnt;
285	u8 min_weight;
286
287	/* bgscan related */
288	struct cqm_info cqm_info;
289
290	bool hw_data_qs_blocked;
291	u8 driver_mode;
292	u8 coex_mode;
293	u16 oper_mode;
294	u8 lp_ps_handshake_mode;
295	u8 ulp_ps_handshake_mode;
296	u8 uapsd_bitmap;
297	u8 rf_power_val;
298	u8 wlan_rf_power_mode;
299	u8 obm_ant_sel_val;
300	int tx_power;
301	u8 ant_in_use;
302	/* Mutex used for writing packet to bus */
303	struct mutex tx_bus_mutex;
304	bool hibernate_resume;
305	bool reinit_hw;
306	u8 wow_flags;
307	u16 beacon_interval;
308	u8 dtim_cnt;
309
310	/* AP mode parameters */
311	u8 beacon_enabled;
312	u16 beacon_cnt;
313	struct rsi_sta stations[RSI_MAX_ASSOC_STAS + 1];
314	int num_stations;
315	int max_stations;
316	struct ieee80211_key_conf *key;
317
318	/* Wi-Fi direct mode related */
319	bool p2p_enabled;
320	struct timer_list roc_timer;
321	struct ieee80211_vif *roc_vif;
322
323	bool eapol4_confirm;
324	void *bt_adapter;
325
326	struct cfg80211_scan_request *hwscan;
327	struct rsi_bgscan_params bgscan;
328	struct rsi_9116_features w9116_features;
329	u8 bgscan_en;
330	u8 mac_ops_resumed;
331};
332
333struct eepromrw_info {
334	u32 offset;
335	u32 length;
336	u8  write;
337	u16 eeprom_erase;
338	u8 data[480];
339};
340
341struct eeprom_read {
342	u16 length;
343	u16 off_set;
344};
345
346struct rsi_hw {
347	struct rsi_common *priv;
348	enum rsi_dev_model device_model;
349	struct ieee80211_hw *hw;
350	struct ieee80211_vif *vifs[RSI_MAX_VIFS];
351	struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES];
352	struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
353
354	struct device *device;
355	u8 sc_nvifs;
356
357	enum rsi_host_intf rsi_host_intf;
358	u16 block_size;
359	enum ps_state ps_state;
360	struct rsi_ps_info ps_info;
361	spinlock_t ps_lock; /*To protect power save config*/
362	u32 usb_buffer_status_reg;
363#ifdef CONFIG_RSI_DEBUGFS
364	struct rsi_debugfs *dfsentry;
365	u8 num_debugfs_entries;
366#endif
367	char *fw_file_name;
368	struct timer_list bl_cmd_timer;
369	bool blcmd_timer_expired;
370	u32 flash_capacity;
371	struct eepromrw_info eeprom;
372	u32 interrupt_status;
373	u8 dfs_region;
374	char country[2];
375	void *rsi_dev;
376	struct rsi_host_intf_ops *host_intf_ops;
377	int (*check_hw_queue_status)(struct rsi_hw *adapter, u8 q_num);
378	int (*determine_event_timeout)(struct rsi_hw *adapter);
379};
380
381void rsi_print_version(struct rsi_common *common);
382
383struct rsi_host_intf_ops {
384	int (*read_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len);
385	int (*write_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len);
386	int (*master_access_msword)(struct rsi_hw *adapter, u16 ms_word);
387	int (*read_reg_multiple)(struct rsi_hw *adapter, u32 addr,
388				 u8 *data, u16 count);
389	int (*write_reg_multiple)(struct rsi_hw *adapter, u32 addr,
390				  u8 *data, u16 count);
391	int (*master_reg_read)(struct rsi_hw *adapter, u32 addr,
392			       u32 *read_buf, u16 size);
393	int (*master_reg_write)(struct rsi_hw *adapter,
394				unsigned long addr, unsigned long data,
395				u16 size);
396	int (*load_data_master_write)(struct rsi_hw *adapter, u32 addr,
397				      u32 instructions_size, u16 block_size,
398				      u8 *fw);
399	int (*reinit_device)(struct rsi_hw *adapter);
400	int (*ta_reset)(struct rsi_hw *adapter);
401};
402
403enum rsi_host_intf rsi_get_host_intf(void *priv);
404void rsi_set_bt_context(void *priv, void *bt_context);
405
406#endif