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1/**
2 * Copyright (c) 2014 Redpine Signals Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#ifndef __RSI_MAIN_H__
18#define __RSI_MAIN_H__
19
20#include <linux/string.h>
21#include <linux/skbuff.h>
22#include <net/mac80211.h>
23
24#define ERR_ZONE BIT(0) /* For Error Msgs */
25#define INFO_ZONE BIT(1) /* For General Status Msgs */
26#define INIT_ZONE BIT(2) /* For Driver Init Seq Msgs */
27#define MGMT_TX_ZONE BIT(3) /* For TX Mgmt Path Msgs */
28#define MGMT_RX_ZONE BIT(4) /* For RX Mgmt Path Msgs */
29#define DATA_TX_ZONE BIT(5) /* For TX Data Path Msgs */
30#define DATA_RX_ZONE BIT(6) /* For RX Data Path Msgs */
31#define FSM_ZONE BIT(7) /* For State Machine Msgs */
32#define ISR_ZONE BIT(8) /* For Interrupt Msgs */
33
34#define FSM_CARD_NOT_READY 0
35#define FSM_BOOT_PARAMS_SENT 1
36#define FSM_EEPROM_READ_MAC_ADDR 2
37#define FSM_RESET_MAC_SENT 3
38#define FSM_RADIO_CAPS_SENT 4
39#define FSM_BB_RF_PROG_SENT 5
40#define FSM_MAC_INIT_DONE 6
41
42extern u32 rsi_zone_enabled;
43extern __printf(2, 3) void rsi_dbg(u32 zone, const char *fmt, ...);
44
45#define RSI_MAX_VIFS 1
46#define NUM_EDCA_QUEUES 4
47#define IEEE80211_ADDR_LEN 6
48#define FRAME_DESC_SZ 16
49#define MIN_802_11_HDR_LEN 24
50
51#define DATA_QUEUE_WATER_MARK 400
52#define MIN_DATA_QUEUE_WATER_MARK 300
53#define MULTICAST_WATER_MARK 200
54#define MAC_80211_HDR_FRAME_CONTROL 0
55#define WME_NUM_AC 4
56#define NUM_SOFT_QUEUES 5
57#define MAX_HW_QUEUES 8
58#define INVALID_QUEUE 0xff
59#define MAX_CONTINUOUS_VO_PKTS 8
60#define MAX_CONTINUOUS_VI_PKTS 4
61
62/* Queue information */
63#define RSI_WIFI_MGMT_Q 0x4
64#define RSI_WIFI_DATA_Q 0x5
65#define IEEE80211_MGMT_FRAME 0x00
66#define IEEE80211_CTL_FRAME 0x04
67
68#define IEEE80211_QOS_TID 0x0f
69#define IEEE80211_NONQOS_TID 16
70
71#define MAX_DEBUGFS_ENTRIES 4
72
73#define TID_TO_WME_AC(_tid) ( \
74 ((_tid) == 0 || (_tid) == 3) ? BE_Q : \
75 ((_tid) < 3) ? BK_Q : \
76 ((_tid) < 6) ? VI_Q : \
77 VO_Q)
78
79#define WME_AC(_q) ( \
80 ((_q) == BK_Q) ? IEEE80211_AC_BK : \
81 ((_q) == BE_Q) ? IEEE80211_AC_BE : \
82 ((_q) == VI_Q) ? IEEE80211_AC_VI : \
83 IEEE80211_AC_VO)
84
85struct version_info {
86 u16 major;
87 u16 minor;
88 u16 release_num;
89 u16 patch_num;
90} __packed;
91
92struct skb_info {
93 s8 rssi;
94 u32 flags;
95 u16 channel;
96 s8 tid;
97 s8 sta_id;
98};
99
100enum edca_queue {
101 BK_Q,
102 BE_Q,
103 VI_Q,
104 VO_Q,
105 MGMT_SOFT_Q
106};
107
108struct security_info {
109 bool security_enable;
110 u32 ptk_cipher;
111 u32 gtk_cipher;
112};
113
114struct wmm_qinfo {
115 s32 weight;
116 s32 wme_params;
117 s32 pkt_contended;
118};
119
120struct transmit_q_stats {
121 u32 total_tx_pkt_send[NUM_EDCA_QUEUES + 1];
122 u32 total_tx_pkt_freed[NUM_EDCA_QUEUES + 1];
123};
124
125struct vif_priv {
126 bool is_ht;
127 bool sgi;
128 u16 seq_start;
129};
130
131struct rsi_event {
132 atomic_t event_condition;
133 wait_queue_head_t event_queue;
134};
135
136struct rsi_thread {
137 void (*thread_function)(void *);
138 struct completion completion;
139 struct task_struct *task;
140 struct rsi_event event;
141 atomic_t thread_done;
142};
143
144struct rsi_hw;
145
146struct rsi_common {
147 struct rsi_hw *priv;
148 struct vif_priv vif_info[RSI_MAX_VIFS];
149
150 bool mgmt_q_block;
151 struct version_info driver_ver;
152 struct version_info fw_ver;
153
154 struct rsi_thread tx_thread;
155 struct sk_buff_head tx_queue[NUM_EDCA_QUEUES + 1];
156 /* Mutex declaration */
157 struct mutex mutex;
158 /* Mutex used between tx/rx threads */
159 struct mutex tx_rxlock;
160 u8 endpoint;
161
162 /* Channel/band related */
163 u8 band;
164 u8 channel_width;
165
166 u16 rts_threshold;
167 u16 bitrate_mask[2];
168 u32 fixedrate_mask[2];
169
170 u8 rf_reset;
171 struct transmit_q_stats tx_stats;
172 struct security_info secinfo;
173 struct wmm_qinfo tx_qinfo[NUM_EDCA_QUEUES];
174 struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES];
175 u8 mac_addr[IEEE80211_ADDR_LEN];
176
177 /* state related */
178 u32 fsm_state;
179 bool init_done;
180 u8 bb_rf_prog_count;
181 bool iface_down;
182
183 /* Generic */
184 u8 channel;
185 u8 *rx_data_pkt;
186 u8 mac_id;
187 u8 radio_id;
188 u16 rate_pwr[20];
189 u16 min_rate;
190
191 /* WMM algo related */
192 u8 selected_qnum;
193 u32 pkt_cnt;
194 u8 min_weight;
195};
196
197struct rsi_hw {
198 struct rsi_common *priv;
199 struct ieee80211_hw *hw;
200 struct ieee80211_vif *vifs[RSI_MAX_VIFS];
201 struct ieee80211_tx_queue_params edca_params[NUM_EDCA_QUEUES];
202 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS];
203
204 struct device *device;
205 u8 sc_nvifs;
206
207#ifdef CONFIG_RSI_DEBUGFS
208 struct rsi_debugfs *dfsentry;
209 u8 num_debugfs_entries;
210#endif
211 void *rsi_dev;
212 int (*host_intf_read_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len);
213 int (*host_intf_write_pkt)(struct rsi_hw *adapter, u8 *pkt, u32 len);
214 int (*check_hw_queue_status)(struct rsi_hw *adapter, u8 q_num);
215 int (*rx_urb_submit)(struct rsi_hw *adapter);
216 int (*determine_event_timeout)(struct rsi_hw *adapter);
217};
218#endif