1/* SPDX-License-Identifier: GPL-2.0 */
 2/*
 3 * ZynqMP Display Driver
 4 *
 5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
 6 *
 7 * Authors:
 8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
 9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 */
11
12#ifndef _ZYNQMP_DISP_H_
13#define _ZYNQMP_DISP_H_
14
15#include <linux/types.h>
16
17/*
18 * 3840x2160 is advertised as the maximum resolution, but almost any
19 * resolutions under a 300Mhz pixel rate would work. Pick 4096x4096.
20 */
21#define ZYNQMP_DISP_MAX_WIDTH				4096
22#define ZYNQMP_DISP_MAX_HEIGHT				4096
23
24/* The DPDMA is limited to 44 bit addressing. */
25#define ZYNQMP_DISP_MAX_DMA_BIT				44
26
27struct device;
28struct drm_device;
29struct platform_device;
30struct zynqmp_disp;
31struct zynqmp_dpsub;
32
33void zynqmp_disp_handle_vblank(struct zynqmp_disp *disp);
34bool zynqmp_disp_audio_enabled(struct zynqmp_disp *disp);
35unsigned int zynqmp_disp_get_audio_clk_rate(struct zynqmp_disp *disp);
36uint32_t zynqmp_disp_get_crtc_mask(struct zynqmp_disp *disp);
37
38int zynqmp_disp_drm_init(struct zynqmp_dpsub *dpsub);
39int zynqmp_disp_probe(struct zynqmp_dpsub *dpsub, struct drm_device *drm);
40void zynqmp_disp_remove(struct zynqmp_dpsub *dpsub);
41
42#endif /* _ZYNQMP_DISP_H_ */