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1/*
2 * Renesas USB driver
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
15 *
16 */
17#include <linux/delay.h>
18#include <linux/io.h>
19#include <linux/scatterlist.h>
20#include "./common.h"
21#include "./pipe.h"
22
23#define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo))
24#define usbhsf_get_d0fifo(p) (&((p)->fifo_info.d0fifo))
25#define usbhsf_get_d1fifo(p) (&((p)->fifo_info.d1fifo))
26
27#define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
28
29/*
30 * packet initialize
31 */
32void usbhs_pkt_init(struct usbhs_pkt *pkt)
33{
34 pkt->dma = DMA_ADDR_INVALID;
35 INIT_LIST_HEAD(&pkt->node);
36}
37
38/*
39 * packet control function
40 */
41static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
42{
43 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
44 struct device *dev = usbhs_priv_to_dev(priv);
45
46 dev_err(dev, "null handler\n");
47
48 return -EINVAL;
49}
50
51static struct usbhs_pkt_handle usbhsf_null_handler = {
52 .prepare = usbhsf_null_handle,
53 .try_run = usbhsf_null_handle,
54};
55
56void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
57 struct usbhs_pkt_handle *handler,
58 void *buf, int len, int zero)
59{
60 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
61 struct device *dev = usbhs_priv_to_dev(priv);
62 unsigned long flags;
63
64 /******************** spin lock ********************/
65 usbhs_lock(priv, flags);
66
67 if (!handler) {
68 dev_err(dev, "no handler function\n");
69 handler = &usbhsf_null_handler;
70 }
71
72 list_del_init(&pkt->node);
73 list_add_tail(&pkt->node, &pipe->list);
74
75 pkt->pipe = pipe;
76 pkt->buf = buf;
77 pkt->handler = handler;
78 pkt->length = len;
79 pkt->zero = zero;
80 pkt->actual = 0;
81
82 usbhs_unlock(priv, flags);
83 /******************** spin unlock ******************/
84
85 usbhs_pkt_start(pipe);
86}
87
88static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
89{
90 list_del_init(&pkt->node);
91}
92
93static struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
94{
95 if (list_empty(&pipe->list))
96 return NULL;
97
98 return list_entry(pipe->list.next, struct usbhs_pkt, node);
99}
100
101struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
102{
103 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
104 unsigned long flags;
105
106 /******************** spin lock ********************/
107 usbhs_lock(priv, flags);
108
109 if (!pkt)
110 pkt = __usbhsf_pkt_get(pipe);
111
112 if (pkt)
113 __usbhsf_pkt_del(pkt);
114
115 usbhs_unlock(priv, flags);
116 /******************** spin unlock ******************/
117
118 return pkt;
119}
120
121int __usbhs_pkt_handler(struct usbhs_pipe *pipe, int type)
122{
123 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
124 struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
125 struct usbhs_pkt *pkt;
126 struct device *dev = usbhs_priv_to_dev(priv);
127 int (*func)(struct usbhs_pkt *pkt, int *is_done);
128 unsigned long flags;
129 int ret = 0;
130 int is_done = 0;
131
132 /******************** spin lock ********************/
133 usbhs_lock(priv, flags);
134
135 pkt = __usbhsf_pkt_get(pipe);
136 if (!pkt)
137 goto __usbhs_pkt_handler_end;
138
139 switch (type) {
140 case USBHSF_PKT_PREPARE:
141 func = pkt->handler->prepare;
142 break;
143 case USBHSF_PKT_TRY_RUN:
144 func = pkt->handler->try_run;
145 break;
146 case USBHSF_PKT_DMA_DONE:
147 func = pkt->handler->dma_done;
148 break;
149 default:
150 dev_err(dev, "unknown pkt hander\n");
151 goto __usbhs_pkt_handler_end;
152 }
153
154 ret = func(pkt, &is_done);
155
156 if (is_done)
157 __usbhsf_pkt_del(pkt);
158
159__usbhs_pkt_handler_end:
160 usbhs_unlock(priv, flags);
161 /******************** spin unlock ******************/
162
163 if (is_done) {
164 info->done(pkt);
165 usbhs_pkt_start(pipe);
166 }
167
168 return ret;
169}
170
171/*
172 * irq enable/disable function
173 */
174#define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, bempsts, e)
175#define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, brdysts, e)
176#define usbhsf_irq_callback_ctrl(pipe, status, enable) \
177 ({ \
178 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \
179 struct usbhs_mod *mod = usbhs_mod_get_current(priv); \
180 u16 status = (1 << usbhs_pipe_number(pipe)); \
181 if (!mod) \
182 return; \
183 if (enable) \
184 mod->irq_##status |= status; \
185 else \
186 mod->irq_##status &= ~status; \
187 usbhs_irq_callback_update(priv, mod); \
188 })
189
190static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
191{
192 /*
193 * And DCP pipe can NOT use "ready interrupt" for "send"
194 * it should use "empty" interrupt.
195 * see
196 * "Operation" - "Interrupt Function" - "BRDY Interrupt"
197 *
198 * on the other hand, normal pipe can use "ready interrupt" for "send"
199 * even though it is single/double buffer
200 */
201 if (usbhs_pipe_is_dcp(pipe))
202 usbhsf_irq_empty_ctrl(pipe, enable);
203 else
204 usbhsf_irq_ready_ctrl(pipe, enable);
205}
206
207static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
208{
209 usbhsf_irq_ready_ctrl(pipe, enable);
210}
211
212/*
213 * FIFO ctrl
214 */
215static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
216 struct usbhs_fifo *fifo)
217{
218 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
219
220 usbhs_bset(priv, fifo->ctr, BVAL, BVAL);
221}
222
223static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
224 struct usbhs_fifo *fifo)
225{
226 int timeout = 1024;
227
228 do {
229 /* The FIFO port is accessible */
230 if (usbhs_read(priv, fifo->ctr) & FRDY)
231 return 0;
232
233 udelay(10);
234 } while (timeout--);
235
236 return -EBUSY;
237}
238
239static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
240 struct usbhs_fifo *fifo)
241{
242 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
243
244 if (!usbhs_pipe_is_dcp(pipe))
245 usbhsf_fifo_barrier(priv, fifo);
246
247 usbhs_write(priv, fifo->ctr, BCLR);
248}
249
250static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv,
251 struct usbhs_fifo *fifo)
252{
253 return usbhs_read(priv, fifo->ctr) & DTLN_MASK;
254}
255
256static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
257 struct usbhs_fifo *fifo)
258{
259 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
260
261 usbhs_pipe_select_fifo(pipe, NULL);
262 usbhs_write(priv, fifo->sel, 0);
263}
264
265static int usbhsf_fifo_select(struct usbhs_pipe *pipe,
266 struct usbhs_fifo *fifo,
267 int write)
268{
269 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
270 struct device *dev = usbhs_priv_to_dev(priv);
271 int timeout = 1024;
272 u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */
273 u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
274
275 if (usbhs_pipe_is_busy(pipe) ||
276 usbhsf_fifo_is_busy(fifo))
277 return -EBUSY;
278
279 if (usbhs_pipe_is_dcp(pipe))
280 base |= (1 == write) << 5; /* ISEL */
281
282 /* "base" will be used below */
283 usbhs_write(priv, fifo->sel, base | MBW_32);
284
285 /* check ISEL and CURPIPE value */
286 while (timeout--) {
287 if (base == (mask & usbhs_read(priv, fifo->sel))) {
288 usbhs_pipe_select_fifo(pipe, fifo);
289 return 0;
290 }
291 udelay(10);
292 }
293
294 dev_err(dev, "fifo select error\n");
295
296 return -EIO;
297}
298
299/*
300 * PIO push handler
301 */
302static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
303{
304 struct usbhs_pipe *pipe = pkt->pipe;
305 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
306 struct device *dev = usbhs_priv_to_dev(priv);
307 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
308 void __iomem *addr = priv->base + fifo->port;
309 u8 *buf;
310 int maxp = usbhs_pipe_get_maxpacket(pipe);
311 int total_len;
312 int i, ret, len;
313 int is_short;
314
315 ret = usbhsf_fifo_select(pipe, fifo, 1);
316 if (ret < 0)
317 return 0;
318
319 ret = usbhs_pipe_is_accessible(pipe);
320 if (ret < 0) {
321 /* inaccessible pipe is not an error */
322 ret = 0;
323 goto usbhs_fifo_write_busy;
324 }
325
326 ret = usbhsf_fifo_barrier(priv, fifo);
327 if (ret < 0)
328 goto usbhs_fifo_write_busy;
329
330 buf = pkt->buf + pkt->actual;
331 len = pkt->length - pkt->actual;
332 len = min(len, maxp);
333 total_len = len;
334 is_short = total_len < maxp;
335
336 /*
337 * FIXME
338 *
339 * 32-bit access only
340 */
341 if (len >= 4 && !((unsigned long)buf & 0x03)) {
342 iowrite32_rep(addr, buf, len / 4);
343 len %= 4;
344 buf += total_len - len;
345 }
346
347 /* the rest operation */
348 for (i = 0; i < len; i++)
349 iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
350
351 /*
352 * variable update
353 */
354 pkt->actual += total_len;
355
356 if (pkt->actual < pkt->length)
357 *is_done = 0; /* there are remainder data */
358 else if (is_short)
359 *is_done = 1; /* short packet */
360 else
361 *is_done = !pkt->zero; /* send zero packet ? */
362
363 /*
364 * pipe/irq handling
365 */
366 if (is_short)
367 usbhsf_send_terminator(pipe, fifo);
368
369 usbhsf_tx_irq_ctrl(pipe, !*is_done);
370 usbhs_pipe_enable(pipe);
371
372 dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n",
373 usbhs_pipe_number(pipe),
374 pkt->length, pkt->actual, *is_done, pkt->zero);
375
376 /*
377 * Transmission end
378 */
379 if (*is_done) {
380 if (usbhs_pipe_is_dcp(pipe))
381 usbhs_dcp_control_transfer_done(pipe);
382 }
383
384 usbhsf_fifo_unselect(pipe, fifo);
385
386 return 0;
387
388usbhs_fifo_write_busy:
389 usbhsf_fifo_unselect(pipe, fifo);
390
391 /*
392 * pipe is busy.
393 * retry in interrupt
394 */
395 usbhsf_tx_irq_ctrl(pipe, 1);
396
397 return ret;
398}
399
400struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
401 .prepare = usbhsf_pio_try_push,
402 .try_run = usbhsf_pio_try_push,
403};
404
405/*
406 * PIO pop handler
407 */
408static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
409{
410 struct usbhs_pipe *pipe = pkt->pipe;
411
412 if (usbhs_pipe_is_busy(pipe))
413 return 0;
414
415 /*
416 * pipe enable to prepare packet receive
417 */
418
419 usbhs_pipe_enable(pipe);
420 usbhsf_rx_irq_ctrl(pipe, 1);
421
422 return 0;
423}
424
425static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
426{
427 struct usbhs_pipe *pipe = pkt->pipe;
428 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
429 struct device *dev = usbhs_priv_to_dev(priv);
430 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
431 void __iomem *addr = priv->base + fifo->port;
432 u8 *buf;
433 u32 data = 0;
434 int maxp = usbhs_pipe_get_maxpacket(pipe);
435 int rcv_len, len;
436 int i, ret;
437 int total_len = 0;
438
439 ret = usbhsf_fifo_select(pipe, fifo, 0);
440 if (ret < 0)
441 return 0;
442
443 ret = usbhsf_fifo_barrier(priv, fifo);
444 if (ret < 0)
445 goto usbhs_fifo_read_busy;
446
447 rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
448
449 buf = pkt->buf + pkt->actual;
450 len = pkt->length - pkt->actual;
451 len = min(len, rcv_len);
452 total_len = len;
453
454 /*
455 * Buffer clear if Zero-Length packet
456 *
457 * see
458 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
459 */
460 if (0 == rcv_len) {
461 usbhsf_fifo_clear(pipe, fifo);
462 goto usbhs_fifo_read_end;
463 }
464
465 /*
466 * FIXME
467 *
468 * 32-bit access only
469 */
470 if (len >= 4 && !((unsigned long)buf & 0x03)) {
471 ioread32_rep(addr, buf, len / 4);
472 len %= 4;
473 buf += total_len - len;
474 }
475
476 /* the rest operation */
477 for (i = 0; i < len; i++) {
478 if (!(i & 0x03))
479 data = ioread32(addr);
480
481 buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
482 }
483
484 pkt->actual += total_len;
485
486usbhs_fifo_read_end:
487 if ((pkt->actual == pkt->length) || /* receive all data */
488 (total_len < maxp)) { /* short packet */
489 *is_done = 1;
490 usbhsf_rx_irq_ctrl(pipe, 0);
491 usbhs_pipe_disable(pipe);
492 }
493
494 dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n",
495 usbhs_pipe_number(pipe),
496 pkt->length, pkt->actual, *is_done, pkt->zero);
497
498usbhs_fifo_read_busy:
499 usbhsf_fifo_unselect(pipe, fifo);
500
501 return ret;
502}
503
504struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
505 .prepare = usbhsf_prepare_pop,
506 .try_run = usbhsf_pio_try_pop,
507};
508
509/*
510 * DCP ctrol statge handler
511 */
512static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
513{
514 usbhs_dcp_control_transfer_done(pkt->pipe);
515
516 *is_done = 1;
517
518 return 0;
519}
520
521struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
522 .prepare = usbhsf_ctrl_stage_end,
523 .try_run = usbhsf_ctrl_stage_end,
524};
525
526/*
527 * DMA fifo functions
528 */
529static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
530 struct usbhs_pkt *pkt)
531{
532 if (&usbhs_fifo_dma_push_handler == pkt->handler)
533 return fifo->tx_chan;
534
535 if (&usbhs_fifo_dma_pop_handler == pkt->handler)
536 return fifo->rx_chan;
537
538 return NULL;
539}
540
541static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv,
542 struct usbhs_pkt *pkt)
543{
544 struct usbhs_fifo *fifo;
545
546 /* DMA :: D0FIFO */
547 fifo = usbhsf_get_d0fifo(priv);
548 if (usbhsf_dma_chan_get(fifo, pkt) &&
549 !usbhsf_fifo_is_busy(fifo))
550 return fifo;
551
552 /* DMA :: D1FIFO */
553 fifo = usbhsf_get_d1fifo(priv);
554 if (usbhsf_dma_chan_get(fifo, pkt) &&
555 !usbhsf_fifo_is_busy(fifo))
556 return fifo;
557
558 return NULL;
559}
560
561#define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE)
562#define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0)
563static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,
564 struct usbhs_fifo *fifo,
565 u16 dreqe)
566{
567 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
568
569 usbhs_bset(priv, fifo->sel, DREQE, dreqe);
570}
571
572#define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1)
573#define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0)
574static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map)
575{
576 struct usbhs_pipe *pipe = pkt->pipe;
577 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
578 struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
579
580 return info->dma_map_ctrl(pkt, map);
581}
582
583static void usbhsf_dma_complete(void *arg);
584static void usbhsf_dma_prepare_tasklet(unsigned long data)
585{
586 struct usbhs_pkt *pkt = (struct usbhs_pkt *)data;
587 struct usbhs_pipe *pipe = pkt->pipe;
588 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
589 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
590 struct scatterlist sg;
591 struct dma_async_tx_descriptor *desc;
592 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
593 struct device *dev = usbhs_priv_to_dev(priv);
594 enum dma_data_direction dir;
595 dma_cookie_t cookie;
596
597 dir = usbhs_pipe_is_dir_in(pipe) ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
598
599 sg_init_table(&sg, 1);
600 sg_set_page(&sg, virt_to_page(pkt->dma),
601 pkt->length, offset_in_page(pkt->dma));
602 sg_dma_address(&sg) = pkt->dma + pkt->actual;
603 sg_dma_len(&sg) = pkt->trans;
604
605 desc = chan->device->device_prep_slave_sg(chan, &sg, 1, dir,
606 DMA_PREP_INTERRUPT |
607 DMA_CTRL_ACK);
608 if (!desc)
609 return;
610
611 desc->callback = usbhsf_dma_complete;
612 desc->callback_param = pipe;
613
614 cookie = desc->tx_submit(desc);
615 if (cookie < 0) {
616 dev_err(dev, "Failed to submit dma descriptor\n");
617 return;
618 }
619
620 dev_dbg(dev, " %s %d (%d/ %d)\n",
621 fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
622
623 usbhsf_dma_start(pipe, fifo);
624 dma_async_issue_pending(chan);
625}
626
627/*
628 * DMA push handler
629 */
630static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done)
631{
632 struct usbhs_pipe *pipe = pkt->pipe;
633 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
634 struct usbhs_fifo *fifo;
635 int len = pkt->length - pkt->actual;
636 int ret;
637
638 if (usbhs_pipe_is_busy(pipe))
639 return 0;
640
641 /* use PIO if packet is less than pio_dma_border or pipe is DCP */
642 if ((len < usbhs_get_dparam(priv, pio_dma_border)) ||
643 usbhs_pipe_is_dcp(pipe))
644 goto usbhsf_pio_prepare_push;
645
646 if (len % 4) /* 32bit alignment */
647 goto usbhsf_pio_prepare_push;
648
649 if (((u32)pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
650 goto usbhsf_pio_prepare_push;
651
652 /* get enable DMA fifo */
653 fifo = usbhsf_get_dma_fifo(priv, pkt);
654 if (!fifo)
655 goto usbhsf_pio_prepare_push;
656
657 if (usbhsf_dma_map(pkt) < 0)
658 goto usbhsf_pio_prepare_push;
659
660 ret = usbhsf_fifo_select(pipe, fifo, 0);
661 if (ret < 0)
662 goto usbhsf_pio_prepare_push_unmap;
663
664 pkt->trans = len;
665
666 tasklet_init(&fifo->tasklet,
667 usbhsf_dma_prepare_tasklet,
668 (unsigned long)pkt);
669
670 tasklet_schedule(&fifo->tasklet);
671
672 return 0;
673
674usbhsf_pio_prepare_push_unmap:
675 usbhsf_dma_unmap(pkt);
676usbhsf_pio_prepare_push:
677 /*
678 * change handler to PIO
679 */
680 pkt->handler = &usbhs_fifo_pio_push_handler;
681
682 return pkt->handler->prepare(pkt, is_done);
683}
684
685static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
686{
687 struct usbhs_pipe *pipe = pkt->pipe;
688
689 pkt->actual = pkt->trans;
690
691 *is_done = !pkt->zero; /* send zero packet ? */
692
693 usbhsf_dma_stop(pipe, pipe->fifo);
694 usbhsf_dma_unmap(pkt);
695 usbhsf_fifo_unselect(pipe, pipe->fifo);
696
697 return 0;
698}
699
700struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
701 .prepare = usbhsf_dma_prepare_push,
702 .dma_done = usbhsf_dma_push_done,
703};
704
705/*
706 * DMA pop handler
707 */
708static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
709{
710 struct usbhs_pipe *pipe = pkt->pipe;
711 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
712 struct usbhs_fifo *fifo;
713 int len, ret;
714
715 if (usbhs_pipe_is_busy(pipe))
716 return 0;
717
718 if (usbhs_pipe_is_dcp(pipe))
719 goto usbhsf_pio_prepare_pop;
720
721 /* get enable DMA fifo */
722 fifo = usbhsf_get_dma_fifo(priv, pkt);
723 if (!fifo)
724 goto usbhsf_pio_prepare_pop;
725
726 if (((u32)pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
727 goto usbhsf_pio_prepare_pop;
728
729 ret = usbhsf_fifo_select(pipe, fifo, 0);
730 if (ret < 0)
731 goto usbhsf_pio_prepare_pop;
732
733 /* use PIO if packet is less than pio_dma_border */
734 len = usbhsf_fifo_rcv_len(priv, fifo);
735 len = min(pkt->length - pkt->actual, len);
736 if (len % 4) /* 32bit alignment */
737 goto usbhsf_pio_prepare_pop_unselect;
738
739 if (len < usbhs_get_dparam(priv, pio_dma_border))
740 goto usbhsf_pio_prepare_pop_unselect;
741
742 ret = usbhsf_fifo_barrier(priv, fifo);
743 if (ret < 0)
744 goto usbhsf_pio_prepare_pop_unselect;
745
746 if (usbhsf_dma_map(pkt) < 0)
747 goto usbhsf_pio_prepare_pop_unselect;
748
749 /* DMA */
750
751 /*
752 * usbhs_fifo_dma_pop_handler :: prepare
753 * enabled irq to come here.
754 * but it is no longer needed for DMA. disable it.
755 */
756 usbhsf_rx_irq_ctrl(pipe, 0);
757
758 pkt->trans = len;
759
760 tasklet_init(&fifo->tasklet,
761 usbhsf_dma_prepare_tasklet,
762 (unsigned long)pkt);
763
764 tasklet_schedule(&fifo->tasklet);
765
766 return 0;
767
768usbhsf_pio_prepare_pop_unselect:
769 usbhsf_fifo_unselect(pipe, fifo);
770usbhsf_pio_prepare_pop:
771
772 /*
773 * change handler to PIO
774 */
775 pkt->handler = &usbhs_fifo_pio_pop_handler;
776
777 return pkt->handler->try_run(pkt, is_done);
778}
779
780static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
781{
782 struct usbhs_pipe *pipe = pkt->pipe;
783 int maxp = usbhs_pipe_get_maxpacket(pipe);
784
785 usbhsf_dma_stop(pipe, pipe->fifo);
786 usbhsf_dma_unmap(pkt);
787 usbhsf_fifo_unselect(pipe, pipe->fifo);
788
789 pkt->actual += pkt->trans;
790
791 if ((pkt->actual == pkt->length) || /* receive all data */
792 (pkt->trans < maxp)) { /* short packet */
793 *is_done = 1;
794 } else {
795 /* re-enable */
796 usbhsf_prepare_pop(pkt, is_done);
797 }
798
799 return 0;
800}
801
802struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
803 .prepare = usbhsf_prepare_pop,
804 .try_run = usbhsf_dma_try_pop,
805 .dma_done = usbhsf_dma_pop_done
806};
807
808/*
809 * DMA setting
810 */
811static bool usbhsf_dma_filter(struct dma_chan *chan, void *param)
812{
813 struct sh_dmae_slave *slave = param;
814
815 /*
816 * FIXME
817 *
818 * usbhs doesn't recognize id = 0 as valid DMA
819 */
820 if (0 == slave->slave_id)
821 return false;
822
823 chan->private = slave;
824
825 return true;
826}
827
828static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo)
829{
830 if (fifo->tx_chan)
831 dma_release_channel(fifo->tx_chan);
832 if (fifo->rx_chan)
833 dma_release_channel(fifo->rx_chan);
834
835 fifo->tx_chan = NULL;
836 fifo->rx_chan = NULL;
837}
838
839static void usbhsf_dma_init(struct usbhs_priv *priv,
840 struct usbhs_fifo *fifo)
841{
842 struct device *dev = usbhs_priv_to_dev(priv);
843 dma_cap_mask_t mask;
844
845 dma_cap_zero(mask);
846 dma_cap_set(DMA_SLAVE, mask);
847 fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter,
848 &fifo->tx_slave);
849
850 dma_cap_zero(mask);
851 dma_cap_set(DMA_SLAVE, mask);
852 fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter,
853 &fifo->rx_slave);
854
855 if (fifo->tx_chan || fifo->rx_chan)
856 dev_dbg(dev, "enable DMAEngine (%s%s%s)\n",
857 fifo->name,
858 fifo->tx_chan ? "[TX]" : " ",
859 fifo->rx_chan ? "[RX]" : " ");
860}
861
862/*
863 * irq functions
864 */
865static int usbhsf_irq_empty(struct usbhs_priv *priv,
866 struct usbhs_irq_state *irq_state)
867{
868 struct usbhs_pipe *pipe;
869 struct device *dev = usbhs_priv_to_dev(priv);
870 int i, ret;
871
872 if (!irq_state->bempsts) {
873 dev_err(dev, "debug %s !!\n", __func__);
874 return -EIO;
875 }
876
877 dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
878
879 /*
880 * search interrupted "pipe"
881 * not "uep".
882 */
883 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
884 if (!(irq_state->bempsts & (1 << i)))
885 continue;
886
887 ret = usbhs_pkt_run(pipe);
888 if (ret < 0)
889 dev_err(dev, "irq_empty run_error %d : %d\n", i, ret);
890 }
891
892 return 0;
893}
894
895static int usbhsf_irq_ready(struct usbhs_priv *priv,
896 struct usbhs_irq_state *irq_state)
897{
898 struct usbhs_pipe *pipe;
899 struct device *dev = usbhs_priv_to_dev(priv);
900 int i, ret;
901
902 if (!irq_state->brdysts) {
903 dev_err(dev, "debug %s !!\n", __func__);
904 return -EIO;
905 }
906
907 dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
908
909 /*
910 * search interrupted "pipe"
911 * not "uep".
912 */
913 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
914 if (!(irq_state->brdysts & (1 << i)))
915 continue;
916
917 ret = usbhs_pkt_run(pipe);
918 if (ret < 0)
919 dev_err(dev, "irq_ready run_error %d : %d\n", i, ret);
920 }
921
922 return 0;
923}
924
925static void usbhsf_dma_complete(void *arg)
926{
927 struct usbhs_pipe *pipe = arg;
928 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
929 struct device *dev = usbhs_priv_to_dev(priv);
930 int ret;
931
932 ret = usbhs_pkt_dmadone(pipe);
933 if (ret < 0)
934 dev_err(dev, "dma_complete run_error %d : %d\n",
935 usbhs_pipe_number(pipe), ret);
936}
937
938/*
939 * fifo init
940 */
941void usbhs_fifo_init(struct usbhs_priv *priv)
942{
943 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
944 struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv);
945 struct usbhs_fifo *d0fifo = usbhsf_get_d0fifo(priv);
946 struct usbhs_fifo *d1fifo = usbhsf_get_d1fifo(priv);
947
948 mod->irq_empty = usbhsf_irq_empty;
949 mod->irq_ready = usbhsf_irq_ready;
950 mod->irq_bempsts = 0;
951 mod->irq_brdysts = 0;
952
953 cfifo->pipe = NULL;
954 cfifo->tx_chan = NULL;
955 cfifo->rx_chan = NULL;
956
957 d0fifo->pipe = NULL;
958 d0fifo->tx_chan = NULL;
959 d0fifo->rx_chan = NULL;
960
961 d1fifo->pipe = NULL;
962 d1fifo->tx_chan = NULL;
963 d1fifo->rx_chan = NULL;
964
965 usbhsf_dma_init(priv, usbhsf_get_d0fifo(priv));
966 usbhsf_dma_init(priv, usbhsf_get_d1fifo(priv));
967}
968
969void usbhs_fifo_quit(struct usbhs_priv *priv)
970{
971 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
972
973 mod->irq_empty = NULL;
974 mod->irq_ready = NULL;
975 mod->irq_bempsts = 0;
976 mod->irq_brdysts = 0;
977
978 usbhsf_dma_quit(priv, usbhsf_get_d0fifo(priv));
979 usbhsf_dma_quit(priv, usbhsf_get_d1fifo(priv));
980}
981
982int usbhs_fifo_probe(struct usbhs_priv *priv)
983{
984 struct usbhs_fifo *fifo;
985
986 /* CFIFO */
987 fifo = usbhsf_get_cfifo(priv);
988 fifo->name = "CFIFO";
989 fifo->port = CFIFO;
990 fifo->sel = CFIFOSEL;
991 fifo->ctr = CFIFOCTR;
992
993 /* D0FIFO */
994 fifo = usbhsf_get_d0fifo(priv);
995 fifo->name = "D0FIFO";
996 fifo->port = D0FIFO;
997 fifo->sel = D0FIFOSEL;
998 fifo->ctr = D0FIFOCTR;
999 fifo->tx_slave.slave_id = usbhs_get_dparam(priv, d0_tx_id);
1000 fifo->rx_slave.slave_id = usbhs_get_dparam(priv, d0_rx_id);
1001
1002 /* D1FIFO */
1003 fifo = usbhsf_get_d1fifo(priv);
1004 fifo->name = "D1FIFO";
1005 fifo->port = D1FIFO;
1006 fifo->sel = D1FIFOSEL;
1007 fifo->ctr = D1FIFOCTR;
1008 fifo->tx_slave.slave_id = usbhs_get_dparam(priv, d1_tx_id);
1009 fifo->rx_slave.slave_id = usbhs_get_dparam(priv, d1_rx_id);
1010
1011 return 0;
1012}
1013
1014void usbhs_fifo_remove(struct usbhs_priv *priv)
1015{
1016}
1// SPDX-License-Identifier: GPL-1.0+
2/*
3 * Renesas USB driver
4 *
5 * Copyright (C) 2011 Renesas Solutions Corp.
6 * Copyright (C) 2019 Renesas Electronics Corporation
7 * Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
8 */
9#include <linux/delay.h>
10#include <linux/io.h>
11#include <linux/scatterlist.h>
12#include "common.h"
13#include "pipe.h"
14
15#define usbhsf_get_cfifo(p) (&((p)->fifo_info.cfifo))
16
17#define usbhsf_fifo_is_busy(f) ((f)->pipe) /* see usbhs_pipe_select_fifo */
18
19/*
20 * packet initialize
21 */
22void usbhs_pkt_init(struct usbhs_pkt *pkt)
23{
24 INIT_LIST_HEAD(&pkt->node);
25}
26
27/*
28 * packet control function
29 */
30static int usbhsf_null_handle(struct usbhs_pkt *pkt, int *is_done)
31{
32 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
33 struct device *dev = usbhs_priv_to_dev(priv);
34
35 dev_err(dev, "null handler\n");
36
37 return -EINVAL;
38}
39
40static const struct usbhs_pkt_handle usbhsf_null_handler = {
41 .prepare = usbhsf_null_handle,
42 .try_run = usbhsf_null_handle,
43};
44
45void usbhs_pkt_push(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt,
46 void (*done)(struct usbhs_priv *priv,
47 struct usbhs_pkt *pkt),
48 void *buf, int len, int zero, int sequence)
49{
50 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
51 struct device *dev = usbhs_priv_to_dev(priv);
52 unsigned long flags;
53
54 if (!done) {
55 dev_err(dev, "no done function\n");
56 return;
57 }
58
59 /******************** spin lock ********************/
60 usbhs_lock(priv, flags);
61
62 if (!pipe->handler) {
63 dev_err(dev, "no handler function\n");
64 pipe->handler = &usbhsf_null_handler;
65 }
66
67 list_move_tail(&pkt->node, &pipe->list);
68
69 /*
70 * each pkt must hold own handler.
71 * because handler might be changed by its situation.
72 * dma handler -> pio handler.
73 */
74 pkt->pipe = pipe;
75 pkt->buf = buf;
76 pkt->handler = pipe->handler;
77 pkt->length = len;
78 pkt->zero = zero;
79 pkt->actual = 0;
80 pkt->done = done;
81 pkt->sequence = sequence;
82
83 usbhs_unlock(priv, flags);
84 /******************** spin unlock ******************/
85}
86
87static void __usbhsf_pkt_del(struct usbhs_pkt *pkt)
88{
89 list_del_init(&pkt->node);
90}
91
92struct usbhs_pkt *__usbhsf_pkt_get(struct usbhs_pipe *pipe)
93{
94 return list_first_entry_or_null(&pipe->list, struct usbhs_pkt, node);
95}
96
97static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
98 struct usbhs_fifo *fifo);
99static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
100 struct usbhs_pkt *pkt);
101#define usbhsf_dma_map(p) __usbhsf_dma_map_ctrl(p, 1)
102#define usbhsf_dma_unmap(p) __usbhsf_dma_map_ctrl(p, 0)
103static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map);
104struct usbhs_pkt *usbhs_pkt_pop(struct usbhs_pipe *pipe, struct usbhs_pkt *pkt)
105{
106 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
107 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
108 unsigned long flags;
109
110 /******************** spin lock ********************/
111 usbhs_lock(priv, flags);
112
113 usbhs_pipe_disable(pipe);
114
115 if (!pkt)
116 pkt = __usbhsf_pkt_get(pipe);
117
118 if (pkt) {
119 struct dma_chan *chan = NULL;
120
121 if (fifo)
122 chan = usbhsf_dma_chan_get(fifo, pkt);
123 if (chan) {
124 dmaengine_terminate_all(chan);
125 usbhsf_dma_unmap(pkt);
126 }
127
128 usbhs_pipe_clear_without_sequence(pipe, 0, 0);
129
130 __usbhsf_pkt_del(pkt);
131 }
132
133 if (fifo)
134 usbhsf_fifo_unselect(pipe, fifo);
135
136 usbhs_unlock(priv, flags);
137 /******************** spin unlock ******************/
138
139 return pkt;
140}
141
142enum {
143 USBHSF_PKT_PREPARE,
144 USBHSF_PKT_TRY_RUN,
145 USBHSF_PKT_DMA_DONE,
146};
147
148static int usbhsf_pkt_handler(struct usbhs_pipe *pipe, int type)
149{
150 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
151 struct usbhs_pkt *pkt;
152 struct device *dev = usbhs_priv_to_dev(priv);
153 int (*func)(struct usbhs_pkt *pkt, int *is_done);
154 unsigned long flags;
155 int ret = 0;
156 int is_done = 0;
157
158 /******************** spin lock ********************/
159 usbhs_lock(priv, flags);
160
161 pkt = __usbhsf_pkt_get(pipe);
162 if (!pkt)
163 goto __usbhs_pkt_handler_end;
164
165 switch (type) {
166 case USBHSF_PKT_PREPARE:
167 func = pkt->handler->prepare;
168 break;
169 case USBHSF_PKT_TRY_RUN:
170 func = pkt->handler->try_run;
171 break;
172 case USBHSF_PKT_DMA_DONE:
173 func = pkt->handler->dma_done;
174 break;
175 default:
176 dev_err(dev, "unknown pkt handler\n");
177 goto __usbhs_pkt_handler_end;
178 }
179
180 if (likely(func))
181 ret = func(pkt, &is_done);
182
183 if (is_done)
184 __usbhsf_pkt_del(pkt);
185
186__usbhs_pkt_handler_end:
187 usbhs_unlock(priv, flags);
188 /******************** spin unlock ******************/
189
190 if (is_done) {
191 pkt->done(priv, pkt);
192 usbhs_pkt_start(pipe);
193 }
194
195 return ret;
196}
197
198void usbhs_pkt_start(struct usbhs_pipe *pipe)
199{
200 usbhsf_pkt_handler(pipe, USBHSF_PKT_PREPARE);
201}
202
203/*
204 * irq enable/disable function
205 */
206#define usbhsf_irq_empty_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_bempsts, e)
207#define usbhsf_irq_ready_ctrl(p, e) usbhsf_irq_callback_ctrl(p, irq_brdysts, e)
208#define usbhsf_irq_callback_ctrl(pipe, status, enable) \
209 ({ \
210 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe); \
211 struct usbhs_mod *mod = usbhs_mod_get_current(priv); \
212 u16 status = (1 << usbhs_pipe_number(pipe)); \
213 if (!mod) \
214 return; \
215 if (enable) \
216 mod->status |= status; \
217 else \
218 mod->status &= ~status; \
219 usbhs_irq_callback_update(priv, mod); \
220 })
221
222static void usbhsf_tx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
223{
224 /*
225 * And DCP pipe can NOT use "ready interrupt" for "send"
226 * it should use "empty" interrupt.
227 * see
228 * "Operation" - "Interrupt Function" - "BRDY Interrupt"
229 *
230 * on the other hand, normal pipe can use "ready interrupt" for "send"
231 * even though it is single/double buffer
232 */
233 if (usbhs_pipe_is_dcp(pipe))
234 usbhsf_irq_empty_ctrl(pipe, enable);
235 else
236 usbhsf_irq_ready_ctrl(pipe, enable);
237}
238
239static void usbhsf_rx_irq_ctrl(struct usbhs_pipe *pipe, int enable)
240{
241 usbhsf_irq_ready_ctrl(pipe, enable);
242}
243
244/*
245 * FIFO ctrl
246 */
247static void usbhsf_send_terminator(struct usbhs_pipe *pipe,
248 struct usbhs_fifo *fifo)
249{
250 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
251
252 usbhs_bset(priv, fifo->ctr, BVAL, BVAL);
253}
254
255static int usbhsf_fifo_barrier(struct usbhs_priv *priv,
256 struct usbhs_fifo *fifo)
257{
258 /* The FIFO port is accessible */
259 if (usbhs_read(priv, fifo->ctr) & FRDY)
260 return 0;
261
262 return -EBUSY;
263}
264
265static void usbhsf_fifo_clear(struct usbhs_pipe *pipe,
266 struct usbhs_fifo *fifo)
267{
268 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
269 int ret = 0;
270
271 if (!usbhs_pipe_is_dcp(pipe)) {
272 /*
273 * This driver checks the pipe condition first to avoid -EBUSY
274 * from usbhsf_fifo_barrier() if the pipe is RX direction and
275 * empty.
276 */
277 if (usbhs_pipe_is_dir_in(pipe))
278 ret = usbhs_pipe_is_accessible(pipe);
279 if (!ret)
280 ret = usbhsf_fifo_barrier(priv, fifo);
281 }
282
283 /*
284 * if non-DCP pipe, this driver should set BCLR when
285 * usbhsf_fifo_barrier() returns 0.
286 */
287 if (!ret)
288 usbhs_write(priv, fifo->ctr, BCLR);
289}
290
291static int usbhsf_fifo_rcv_len(struct usbhs_priv *priv,
292 struct usbhs_fifo *fifo)
293{
294 return usbhs_read(priv, fifo->ctr) & DTLN_MASK;
295}
296
297static void usbhsf_fifo_unselect(struct usbhs_pipe *pipe,
298 struct usbhs_fifo *fifo)
299{
300 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
301
302 usbhs_pipe_select_fifo(pipe, NULL);
303 usbhs_write(priv, fifo->sel, 0);
304}
305
306static int usbhsf_fifo_select(struct usbhs_pipe *pipe,
307 struct usbhs_fifo *fifo,
308 int write)
309{
310 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
311 struct device *dev = usbhs_priv_to_dev(priv);
312 int timeout = 1024;
313 u16 mask = ((1 << 5) | 0xF); /* mask of ISEL | CURPIPE */
314 u16 base = usbhs_pipe_number(pipe); /* CURPIPE */
315
316 if (usbhs_pipe_is_busy(pipe) ||
317 usbhsf_fifo_is_busy(fifo))
318 return -EBUSY;
319
320 if (usbhs_pipe_is_dcp(pipe)) {
321 base |= (1 == write) << 5; /* ISEL */
322
323 if (usbhs_mod_is_host(priv))
324 usbhs_dcp_dir_for_host(pipe, write);
325 }
326
327 /* "base" will be used below */
328 usbhs_write(priv, fifo->sel, base | MBW_32);
329
330 /* check ISEL and CURPIPE value */
331 while (timeout--) {
332 if (base == (mask & usbhs_read(priv, fifo->sel))) {
333 usbhs_pipe_select_fifo(pipe, fifo);
334 return 0;
335 }
336 udelay(10);
337 }
338
339 dev_err(dev, "fifo select error\n");
340
341 return -EIO;
342}
343
344/*
345 * DCP status stage
346 */
347static int usbhs_dcp_dir_switch_to_write(struct usbhs_pkt *pkt, int *is_done)
348{
349 struct usbhs_pipe *pipe = pkt->pipe;
350 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
351 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
352 struct device *dev = usbhs_priv_to_dev(priv);
353 int ret;
354
355 usbhs_pipe_disable(pipe);
356
357 ret = usbhsf_fifo_select(pipe, fifo, 1);
358 if (ret < 0) {
359 dev_err(dev, "%s() faile\n", __func__);
360 return ret;
361 }
362
363 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
364
365 usbhsf_fifo_clear(pipe, fifo);
366 usbhsf_send_terminator(pipe, fifo);
367
368 usbhsf_fifo_unselect(pipe, fifo);
369
370 usbhsf_tx_irq_ctrl(pipe, 1);
371 usbhs_pipe_enable(pipe);
372
373 return ret;
374}
375
376static int usbhs_dcp_dir_switch_to_read(struct usbhs_pkt *pkt, int *is_done)
377{
378 struct usbhs_pipe *pipe = pkt->pipe;
379 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
380 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
381 struct device *dev = usbhs_priv_to_dev(priv);
382 int ret;
383
384 usbhs_pipe_disable(pipe);
385
386 ret = usbhsf_fifo_select(pipe, fifo, 0);
387 if (ret < 0) {
388 dev_err(dev, "%s() fail\n", __func__);
389 return ret;
390 }
391
392 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
393 usbhsf_fifo_clear(pipe, fifo);
394
395 usbhsf_fifo_unselect(pipe, fifo);
396
397 usbhsf_rx_irq_ctrl(pipe, 1);
398 usbhs_pipe_enable(pipe);
399
400 return ret;
401
402}
403
404static int usbhs_dcp_dir_switch_done(struct usbhs_pkt *pkt, int *is_done)
405{
406 struct usbhs_pipe *pipe = pkt->pipe;
407
408 if (pkt->handler == &usbhs_dcp_status_stage_in_handler)
409 usbhsf_tx_irq_ctrl(pipe, 0);
410 else
411 usbhsf_rx_irq_ctrl(pipe, 0);
412
413 pkt->actual = pkt->length;
414 *is_done = 1;
415
416 return 0;
417}
418
419const struct usbhs_pkt_handle usbhs_dcp_status_stage_in_handler = {
420 .prepare = usbhs_dcp_dir_switch_to_write,
421 .try_run = usbhs_dcp_dir_switch_done,
422};
423
424const struct usbhs_pkt_handle usbhs_dcp_status_stage_out_handler = {
425 .prepare = usbhs_dcp_dir_switch_to_read,
426 .try_run = usbhs_dcp_dir_switch_done,
427};
428
429/*
430 * DCP data stage (push)
431 */
432static int usbhsf_dcp_data_stage_try_push(struct usbhs_pkt *pkt, int *is_done)
433{
434 struct usbhs_pipe *pipe = pkt->pipe;
435
436 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
437
438 /*
439 * change handler to PIO push
440 */
441 pkt->handler = &usbhs_fifo_pio_push_handler;
442
443 return pkt->handler->prepare(pkt, is_done);
444}
445
446const struct usbhs_pkt_handle usbhs_dcp_data_stage_out_handler = {
447 .prepare = usbhsf_dcp_data_stage_try_push,
448};
449
450/*
451 * DCP data stage (pop)
452 */
453static int usbhsf_dcp_data_stage_prepare_pop(struct usbhs_pkt *pkt,
454 int *is_done)
455{
456 struct usbhs_pipe *pipe = pkt->pipe;
457 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
458 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
459
460 if (usbhs_pipe_is_busy(pipe))
461 return 0;
462
463 /*
464 * prepare pop for DCP should
465 * - change DCP direction,
466 * - clear fifo
467 * - DATA1
468 */
469 usbhs_pipe_disable(pipe);
470
471 usbhs_pipe_sequence_data1(pipe); /* DATA1 */
472
473 usbhsf_fifo_select(pipe, fifo, 0);
474 usbhsf_fifo_clear(pipe, fifo);
475 usbhsf_fifo_unselect(pipe, fifo);
476
477 /*
478 * change handler to PIO pop
479 */
480 pkt->handler = &usbhs_fifo_pio_pop_handler;
481
482 return pkt->handler->prepare(pkt, is_done);
483}
484
485const struct usbhs_pkt_handle usbhs_dcp_data_stage_in_handler = {
486 .prepare = usbhsf_dcp_data_stage_prepare_pop,
487};
488
489/*
490 * PIO push handler
491 */
492static int usbhsf_pio_try_push(struct usbhs_pkt *pkt, int *is_done)
493{
494 struct usbhs_pipe *pipe = pkt->pipe;
495 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
496 struct device *dev = usbhs_priv_to_dev(priv);
497 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
498 void __iomem *addr = priv->base + fifo->port;
499 u8 *buf;
500 int maxp = usbhs_pipe_get_maxpacket(pipe);
501 int total_len;
502 int i, ret, len;
503 int is_short;
504
505 usbhs_pipe_data_sequence(pipe, pkt->sequence);
506 pkt->sequence = -1; /* -1 sequence will be ignored */
507
508 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
509
510 ret = usbhsf_fifo_select(pipe, fifo, 1);
511 if (ret < 0)
512 return 0;
513
514 ret = usbhs_pipe_is_accessible(pipe);
515 if (ret < 0) {
516 /* inaccessible pipe is not an error */
517 ret = 0;
518 goto usbhs_fifo_write_busy;
519 }
520
521 ret = usbhsf_fifo_barrier(priv, fifo);
522 if (ret < 0)
523 goto usbhs_fifo_write_busy;
524
525 buf = pkt->buf + pkt->actual;
526 len = pkt->length - pkt->actual;
527 len = min(len, maxp);
528 total_len = len;
529 is_short = total_len < maxp;
530
531 /*
532 * FIXME
533 *
534 * 32-bit access only
535 */
536 if (len >= 4 && !((unsigned long)buf & 0x03)) {
537 iowrite32_rep(addr, buf, len / 4);
538 len %= 4;
539 buf += total_len - len;
540 }
541
542 /* the rest operation */
543 if (usbhs_get_dparam(priv, cfifo_byte_addr)) {
544 for (i = 0; i < len; i++)
545 iowrite8(buf[i], addr + (i & 0x03));
546 } else {
547 for (i = 0; i < len; i++)
548 iowrite8(buf[i], addr + (0x03 - (i & 0x03)));
549 }
550
551 /*
552 * variable update
553 */
554 pkt->actual += total_len;
555
556 if (pkt->actual < pkt->length)
557 *is_done = 0; /* there are remainder data */
558 else if (is_short)
559 *is_done = 1; /* short packet */
560 else
561 *is_done = !pkt->zero; /* send zero packet ? */
562
563 /*
564 * pipe/irq handling
565 */
566 if (is_short)
567 usbhsf_send_terminator(pipe, fifo);
568
569 usbhsf_tx_irq_ctrl(pipe, !*is_done);
570 usbhs_pipe_running(pipe, !*is_done);
571 usbhs_pipe_enable(pipe);
572
573 dev_dbg(dev, " send %d (%d/ %d/ %d/ %d)\n",
574 usbhs_pipe_number(pipe),
575 pkt->length, pkt->actual, *is_done, pkt->zero);
576
577 usbhsf_fifo_unselect(pipe, fifo);
578
579 return 0;
580
581usbhs_fifo_write_busy:
582 usbhsf_fifo_unselect(pipe, fifo);
583
584 /*
585 * pipe is busy.
586 * retry in interrupt
587 */
588 usbhsf_tx_irq_ctrl(pipe, 1);
589 usbhs_pipe_running(pipe, 1);
590
591 return ret;
592}
593
594static int usbhsf_pio_prepare_push(struct usbhs_pkt *pkt, int *is_done)
595{
596 if (usbhs_pipe_is_running(pkt->pipe))
597 return 0;
598
599 return usbhsf_pio_try_push(pkt, is_done);
600}
601
602const struct usbhs_pkt_handle usbhs_fifo_pio_push_handler = {
603 .prepare = usbhsf_pio_prepare_push,
604 .try_run = usbhsf_pio_try_push,
605};
606
607/*
608 * PIO pop handler
609 */
610static int usbhsf_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
611{
612 struct usbhs_pipe *pipe = pkt->pipe;
613 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
614 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv);
615
616 if (usbhs_pipe_is_busy(pipe))
617 return 0;
618
619 if (usbhs_pipe_is_running(pipe))
620 return 0;
621
622 /*
623 * pipe enable to prepare packet receive
624 */
625 usbhs_pipe_data_sequence(pipe, pkt->sequence);
626 pkt->sequence = -1; /* -1 sequence will be ignored */
627
628 if (usbhs_pipe_is_dcp(pipe))
629 usbhsf_fifo_clear(pipe, fifo);
630
631 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->length);
632 usbhs_pipe_enable(pipe);
633 usbhs_pipe_running(pipe, 1);
634 usbhsf_rx_irq_ctrl(pipe, 1);
635
636 return 0;
637}
638
639static int usbhsf_pio_try_pop(struct usbhs_pkt *pkt, int *is_done)
640{
641 struct usbhs_pipe *pipe = pkt->pipe;
642 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
643 struct device *dev = usbhs_priv_to_dev(priv);
644 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
645 void __iomem *addr = priv->base + fifo->port;
646 u8 *buf;
647 u32 data = 0;
648 int maxp = usbhs_pipe_get_maxpacket(pipe);
649 int rcv_len, len;
650 int i, ret;
651 int total_len = 0;
652
653 ret = usbhsf_fifo_select(pipe, fifo, 0);
654 if (ret < 0)
655 return 0;
656
657 ret = usbhsf_fifo_barrier(priv, fifo);
658 if (ret < 0)
659 goto usbhs_fifo_read_busy;
660
661 rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
662
663 buf = pkt->buf + pkt->actual;
664 len = pkt->length - pkt->actual;
665 len = min(len, rcv_len);
666 total_len = len;
667
668 /*
669 * update actual length first here to decide disable pipe.
670 * if this pipe keeps BUF status and all data were popped,
671 * then, next interrupt/token will be issued again
672 */
673 pkt->actual += total_len;
674
675 if ((pkt->actual == pkt->length) || /* receive all data */
676 (total_len < maxp)) { /* short packet */
677 *is_done = 1;
678 usbhsf_rx_irq_ctrl(pipe, 0);
679 usbhs_pipe_running(pipe, 0);
680 /*
681 * If function mode, since this controller is possible to enter
682 * Control Write status stage at this timing, this driver
683 * should not disable the pipe. If such a case happens, this
684 * controller is not able to complete the status stage.
685 */
686 if (!usbhs_mod_is_host(priv) && !usbhs_pipe_is_dcp(pipe))
687 usbhs_pipe_disable(pipe); /* disable pipe first */
688 }
689
690 /*
691 * Buffer clear if Zero-Length packet
692 *
693 * see
694 * "Operation" - "FIFO Buffer Memory" - "FIFO Port Function"
695 */
696 if (0 == rcv_len) {
697 pkt->zero = 1;
698 usbhsf_fifo_clear(pipe, fifo);
699 goto usbhs_fifo_read_end;
700 }
701
702 /*
703 * FIXME
704 *
705 * 32-bit access only
706 */
707 if (len >= 4 && !((unsigned long)buf & 0x03)) {
708 ioread32_rep(addr, buf, len / 4);
709 len %= 4;
710 buf += total_len - len;
711 }
712
713 /* the rest operation */
714 for (i = 0; i < len; i++) {
715 if (!(i & 0x03))
716 data = ioread32(addr);
717
718 buf[i] = (data >> ((i & 0x03) * 8)) & 0xff;
719 }
720
721usbhs_fifo_read_end:
722 dev_dbg(dev, " recv %d (%d/ %d/ %d/ %d)\n",
723 usbhs_pipe_number(pipe),
724 pkt->length, pkt->actual, *is_done, pkt->zero);
725
726usbhs_fifo_read_busy:
727 usbhsf_fifo_unselect(pipe, fifo);
728
729 return ret;
730}
731
732const struct usbhs_pkt_handle usbhs_fifo_pio_pop_handler = {
733 .prepare = usbhsf_prepare_pop,
734 .try_run = usbhsf_pio_try_pop,
735};
736
737/*
738 * DCP ctrol statge handler
739 */
740static int usbhsf_ctrl_stage_end(struct usbhs_pkt *pkt, int *is_done)
741{
742 usbhs_dcp_control_transfer_done(pkt->pipe);
743
744 *is_done = 1;
745
746 return 0;
747}
748
749const struct usbhs_pkt_handle usbhs_ctrl_stage_end_handler = {
750 .prepare = usbhsf_ctrl_stage_end,
751 .try_run = usbhsf_ctrl_stage_end,
752};
753
754/*
755 * DMA fifo functions
756 */
757static struct dma_chan *usbhsf_dma_chan_get(struct usbhs_fifo *fifo,
758 struct usbhs_pkt *pkt)
759{
760 if (&usbhs_fifo_dma_push_handler == pkt->handler)
761 return fifo->tx_chan;
762
763 if (&usbhs_fifo_dma_pop_handler == pkt->handler)
764 return fifo->rx_chan;
765
766 return NULL;
767}
768
769static struct usbhs_fifo *usbhsf_get_dma_fifo(struct usbhs_priv *priv,
770 struct usbhs_pkt *pkt)
771{
772 struct usbhs_fifo *fifo;
773 int i;
774
775 usbhs_for_each_dfifo(priv, fifo, i) {
776 if (usbhsf_dma_chan_get(fifo, pkt) &&
777 !usbhsf_fifo_is_busy(fifo))
778 return fifo;
779 }
780
781 return NULL;
782}
783
784#define usbhsf_dma_start(p, f) __usbhsf_dma_ctrl(p, f, DREQE)
785#define usbhsf_dma_stop(p, f) __usbhsf_dma_ctrl(p, f, 0)
786static void __usbhsf_dma_ctrl(struct usbhs_pipe *pipe,
787 struct usbhs_fifo *fifo,
788 u16 dreqe)
789{
790 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
791
792 usbhs_bset(priv, fifo->sel, DREQE, dreqe);
793}
794
795static int __usbhsf_dma_map_ctrl(struct usbhs_pkt *pkt, int map)
796{
797 struct usbhs_pipe *pipe = pkt->pipe;
798 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
799 struct usbhs_pipe_info *info = usbhs_priv_to_pipeinfo(priv);
800 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
801 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
802
803 return info->dma_map_ctrl(chan->device->dev, pkt, map);
804}
805
806static void usbhsf_dma_complete(void *arg);
807static void usbhsf_dma_xfer_preparing(struct usbhs_pkt *pkt)
808{
809 struct usbhs_pipe *pipe = pkt->pipe;
810 struct usbhs_fifo *fifo;
811 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
812 struct dma_async_tx_descriptor *desc;
813 struct dma_chan *chan;
814 struct device *dev = usbhs_priv_to_dev(priv);
815 enum dma_transfer_direction dir;
816
817 fifo = usbhs_pipe_to_fifo(pipe);
818 if (!fifo)
819 return;
820
821 chan = usbhsf_dma_chan_get(fifo, pkt);
822 dir = usbhs_pipe_is_dir_in(pipe) ? DMA_DEV_TO_MEM : DMA_MEM_TO_DEV;
823
824 desc = dmaengine_prep_slave_single(chan, pkt->dma + pkt->actual,
825 pkt->trans, dir,
826 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
827 if (!desc)
828 return;
829
830 desc->callback = usbhsf_dma_complete;
831 desc->callback_param = pipe;
832
833 pkt->cookie = dmaengine_submit(desc);
834 if (pkt->cookie < 0) {
835 dev_err(dev, "Failed to submit dma descriptor\n");
836 return;
837 }
838
839 dev_dbg(dev, " %s %d (%d/ %d)\n",
840 fifo->name, usbhs_pipe_number(pipe), pkt->length, pkt->zero);
841
842 usbhs_pipe_running(pipe, 1);
843 usbhs_pipe_set_trans_count_if_bulk(pipe, pkt->trans);
844 dma_async_issue_pending(chan);
845 usbhsf_dma_start(pipe, fifo);
846 usbhs_pipe_enable(pipe);
847}
848
849static void xfer_work(struct work_struct *work)
850{
851 struct usbhs_pkt *pkt = container_of(work, struct usbhs_pkt, work);
852 struct usbhs_pipe *pipe = pkt->pipe;
853 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
854 unsigned long flags;
855
856 usbhs_lock(priv, flags);
857 usbhsf_dma_xfer_preparing(pkt);
858 usbhs_unlock(priv, flags);
859}
860
861/*
862 * DMA push handler
863 */
864static int usbhsf_dma_prepare_push(struct usbhs_pkt *pkt, int *is_done)
865{
866 struct usbhs_pipe *pipe = pkt->pipe;
867 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
868 struct usbhs_fifo *fifo;
869 int len = pkt->length - pkt->actual;
870 int ret;
871 uintptr_t align_mask;
872
873 if (usbhs_pipe_is_busy(pipe))
874 return 0;
875
876 /* use PIO if packet is less than pio_dma_border or pipe is DCP */
877 if ((len < usbhs_get_dparam(priv, pio_dma_border)) ||
878 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
879 goto usbhsf_pio_prepare_push;
880
881 /* check data length if this driver don't use USB-DMAC */
882 if (!usbhs_get_dparam(priv, has_usb_dmac) && len & 0x7)
883 goto usbhsf_pio_prepare_push;
884
885 /* check buffer alignment */
886 align_mask = usbhs_get_dparam(priv, has_usb_dmac) ?
887 USBHS_USB_DMAC_XFER_SIZE - 1 : 0x7;
888 if ((uintptr_t)(pkt->buf + pkt->actual) & align_mask)
889 goto usbhsf_pio_prepare_push;
890
891 /* return at this time if the pipe is running */
892 if (usbhs_pipe_is_running(pipe))
893 return 0;
894
895 /* get enable DMA fifo */
896 fifo = usbhsf_get_dma_fifo(priv, pkt);
897 if (!fifo)
898 goto usbhsf_pio_prepare_push;
899
900 ret = usbhsf_fifo_select(pipe, fifo, 0);
901 if (ret < 0)
902 goto usbhsf_pio_prepare_push;
903
904 if (usbhsf_dma_map(pkt) < 0)
905 goto usbhsf_pio_prepare_push_unselect;
906
907 pkt->trans = len;
908
909 usbhsf_tx_irq_ctrl(pipe, 0);
910 /* FIXME: Workaound for usb dmac that driver can be used in atomic */
911 if (usbhs_get_dparam(priv, has_usb_dmac)) {
912 usbhsf_dma_xfer_preparing(pkt);
913 } else {
914 INIT_WORK(&pkt->work, xfer_work);
915 schedule_work(&pkt->work);
916 }
917
918 return 0;
919
920usbhsf_pio_prepare_push_unselect:
921 usbhsf_fifo_unselect(pipe, fifo);
922usbhsf_pio_prepare_push:
923 /*
924 * change handler to PIO
925 */
926 pkt->handler = &usbhs_fifo_pio_push_handler;
927
928 return pkt->handler->prepare(pkt, is_done);
929}
930
931static int usbhsf_dma_push_done(struct usbhs_pkt *pkt, int *is_done)
932{
933 struct usbhs_pipe *pipe = pkt->pipe;
934 int is_short = pkt->trans % usbhs_pipe_get_maxpacket(pipe);
935
936 pkt->actual += pkt->trans;
937
938 if (pkt->actual < pkt->length)
939 *is_done = 0; /* there are remainder data */
940 else if (is_short)
941 *is_done = 1; /* short packet */
942 else
943 *is_done = !pkt->zero; /* send zero packet? */
944
945 usbhs_pipe_running(pipe, !*is_done);
946
947 usbhsf_dma_stop(pipe, pipe->fifo);
948 usbhsf_dma_unmap(pkt);
949 usbhsf_fifo_unselect(pipe, pipe->fifo);
950
951 if (!*is_done) {
952 /* change handler to PIO */
953 pkt->handler = &usbhs_fifo_pio_push_handler;
954 return pkt->handler->try_run(pkt, is_done);
955 }
956
957 return 0;
958}
959
960const struct usbhs_pkt_handle usbhs_fifo_dma_push_handler = {
961 .prepare = usbhsf_dma_prepare_push,
962 .dma_done = usbhsf_dma_push_done,
963};
964
965/*
966 * DMA pop handler
967 */
968
969static int usbhsf_dma_prepare_pop_with_rx_irq(struct usbhs_pkt *pkt,
970 int *is_done)
971{
972 return usbhsf_prepare_pop(pkt, is_done);
973}
974
975static int usbhsf_dma_prepare_pop_with_usb_dmac(struct usbhs_pkt *pkt,
976 int *is_done)
977{
978 struct usbhs_pipe *pipe = pkt->pipe;
979 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
980 struct usbhs_fifo *fifo;
981 int ret;
982
983 if (usbhs_pipe_is_busy(pipe))
984 return 0;
985
986 /* use PIO if packet is less than pio_dma_border or pipe is DCP */
987 if ((pkt->length < usbhs_get_dparam(priv, pio_dma_border)) ||
988 usbhs_pipe_type_is(pipe, USB_ENDPOINT_XFER_ISOC))
989 goto usbhsf_pio_prepare_pop;
990
991 fifo = usbhsf_get_dma_fifo(priv, pkt);
992 if (!fifo)
993 goto usbhsf_pio_prepare_pop;
994
995 if ((uintptr_t)pkt->buf & (USBHS_USB_DMAC_XFER_SIZE - 1))
996 goto usbhsf_pio_prepare_pop;
997
998 /* return at this time if the pipe is running */
999 if (usbhs_pipe_is_running(pipe))
1000 return 0;
1001
1002 usbhs_pipe_config_change_bfre(pipe, 1);
1003
1004 ret = usbhsf_fifo_select(pipe, fifo, 0);
1005 if (ret < 0)
1006 goto usbhsf_pio_prepare_pop;
1007
1008 if (usbhsf_dma_map(pkt) < 0)
1009 goto usbhsf_pio_prepare_pop_unselect;
1010
1011 /* DMA */
1012
1013 /*
1014 * usbhs_fifo_dma_pop_handler :: prepare
1015 * enabled irq to come here.
1016 * but it is no longer needed for DMA. disable it.
1017 */
1018 usbhsf_rx_irq_ctrl(pipe, 0);
1019
1020 pkt->trans = pkt->length;
1021
1022 usbhsf_dma_xfer_preparing(pkt);
1023
1024 return 0;
1025
1026usbhsf_pio_prepare_pop_unselect:
1027 usbhsf_fifo_unselect(pipe, fifo);
1028usbhsf_pio_prepare_pop:
1029
1030 /*
1031 * change handler to PIO
1032 */
1033 pkt->handler = &usbhs_fifo_pio_pop_handler;
1034 usbhs_pipe_config_change_bfre(pipe, 0);
1035
1036 return pkt->handler->prepare(pkt, is_done);
1037}
1038
1039static int usbhsf_dma_prepare_pop(struct usbhs_pkt *pkt, int *is_done)
1040{
1041 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1042
1043 if (usbhs_get_dparam(priv, has_usb_dmac))
1044 return usbhsf_dma_prepare_pop_with_usb_dmac(pkt, is_done);
1045 else
1046 return usbhsf_dma_prepare_pop_with_rx_irq(pkt, is_done);
1047}
1048
1049static int usbhsf_dma_try_pop_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
1050{
1051 struct usbhs_pipe *pipe = pkt->pipe;
1052 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1053 struct usbhs_fifo *fifo;
1054 int len, ret;
1055
1056 if (usbhs_pipe_is_busy(pipe))
1057 return 0;
1058
1059 if (usbhs_pipe_is_dcp(pipe))
1060 goto usbhsf_pio_prepare_pop;
1061
1062 /* get enable DMA fifo */
1063 fifo = usbhsf_get_dma_fifo(priv, pkt);
1064 if (!fifo)
1065 goto usbhsf_pio_prepare_pop;
1066
1067 if ((uintptr_t)(pkt->buf + pkt->actual) & 0x7) /* 8byte alignment */
1068 goto usbhsf_pio_prepare_pop;
1069
1070 ret = usbhsf_fifo_select(pipe, fifo, 0);
1071 if (ret < 0)
1072 goto usbhsf_pio_prepare_pop;
1073
1074 /* use PIO if packet is less than pio_dma_border */
1075 len = usbhsf_fifo_rcv_len(priv, fifo);
1076 len = min(pkt->length - pkt->actual, len);
1077 if (len & 0x7) /* 8byte alignment */
1078 goto usbhsf_pio_prepare_pop_unselect;
1079
1080 if (len < usbhs_get_dparam(priv, pio_dma_border))
1081 goto usbhsf_pio_prepare_pop_unselect;
1082
1083 ret = usbhsf_fifo_barrier(priv, fifo);
1084 if (ret < 0)
1085 goto usbhsf_pio_prepare_pop_unselect;
1086
1087 if (usbhsf_dma_map(pkt) < 0)
1088 goto usbhsf_pio_prepare_pop_unselect;
1089
1090 /* DMA */
1091
1092 /*
1093 * usbhs_fifo_dma_pop_handler :: prepare
1094 * enabled irq to come here.
1095 * but it is no longer needed for DMA. disable it.
1096 */
1097 usbhsf_rx_irq_ctrl(pipe, 0);
1098
1099 pkt->trans = len;
1100
1101 INIT_WORK(&pkt->work, xfer_work);
1102 schedule_work(&pkt->work);
1103
1104 return 0;
1105
1106usbhsf_pio_prepare_pop_unselect:
1107 usbhsf_fifo_unselect(pipe, fifo);
1108usbhsf_pio_prepare_pop:
1109
1110 /*
1111 * change handler to PIO
1112 */
1113 pkt->handler = &usbhs_fifo_pio_pop_handler;
1114
1115 return pkt->handler->try_run(pkt, is_done);
1116}
1117
1118static int usbhsf_dma_try_pop(struct usbhs_pkt *pkt, int *is_done)
1119{
1120 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1121
1122 BUG_ON(usbhs_get_dparam(priv, has_usb_dmac));
1123
1124 return usbhsf_dma_try_pop_with_rx_irq(pkt, is_done);
1125}
1126
1127static int usbhsf_dma_pop_done_with_rx_irq(struct usbhs_pkt *pkt, int *is_done)
1128{
1129 struct usbhs_pipe *pipe = pkt->pipe;
1130 int maxp = usbhs_pipe_get_maxpacket(pipe);
1131
1132 usbhsf_dma_stop(pipe, pipe->fifo);
1133 usbhsf_dma_unmap(pkt);
1134 usbhsf_fifo_unselect(pipe, pipe->fifo);
1135
1136 pkt->actual += pkt->trans;
1137
1138 if ((pkt->actual == pkt->length) || /* receive all data */
1139 (pkt->trans < maxp)) { /* short packet */
1140 *is_done = 1;
1141 usbhs_pipe_running(pipe, 0);
1142 } else {
1143 /* re-enable */
1144 usbhs_pipe_running(pipe, 0);
1145 usbhsf_prepare_pop(pkt, is_done);
1146 }
1147
1148 return 0;
1149}
1150
1151static size_t usbhs_dma_calc_received_size(struct usbhs_pkt *pkt,
1152 struct dma_chan *chan, int dtln)
1153{
1154 struct usbhs_pipe *pipe = pkt->pipe;
1155 struct dma_tx_state state;
1156 size_t received_size;
1157 int maxp = usbhs_pipe_get_maxpacket(pipe);
1158
1159 dmaengine_tx_status(chan, pkt->cookie, &state);
1160 received_size = pkt->length - state.residue;
1161
1162 if (dtln) {
1163 received_size -= USBHS_USB_DMAC_XFER_SIZE;
1164 received_size &= ~(maxp - 1);
1165 received_size += dtln;
1166 }
1167
1168 return received_size;
1169}
1170
1171static int usbhsf_dma_pop_done_with_usb_dmac(struct usbhs_pkt *pkt,
1172 int *is_done)
1173{
1174 struct usbhs_pipe *pipe = pkt->pipe;
1175 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1176 struct usbhs_fifo *fifo = usbhs_pipe_to_fifo(pipe);
1177 struct dma_chan *chan = usbhsf_dma_chan_get(fifo, pkt);
1178 int rcv_len;
1179
1180 /*
1181 * Since the driver disables rx_irq in DMA mode, the interrupt handler
1182 * cannot the BRDYSTS. So, the function clears it here because the
1183 * driver may use PIO mode next time.
1184 */
1185 usbhs_xxxsts_clear(priv, BRDYSTS, usbhs_pipe_number(pipe));
1186
1187 rcv_len = usbhsf_fifo_rcv_len(priv, fifo);
1188 usbhsf_fifo_clear(pipe, fifo);
1189 pkt->actual = usbhs_dma_calc_received_size(pkt, chan, rcv_len);
1190
1191 usbhs_pipe_running(pipe, 0);
1192 usbhsf_dma_stop(pipe, fifo);
1193 usbhsf_dma_unmap(pkt);
1194 usbhsf_fifo_unselect(pipe, pipe->fifo);
1195
1196 /* The driver can assume the rx transaction is always "done" */
1197 *is_done = 1;
1198
1199 return 0;
1200}
1201
1202static int usbhsf_dma_pop_done(struct usbhs_pkt *pkt, int *is_done)
1203{
1204 struct usbhs_priv *priv = usbhs_pipe_to_priv(pkt->pipe);
1205
1206 if (usbhs_get_dparam(priv, has_usb_dmac))
1207 return usbhsf_dma_pop_done_with_usb_dmac(pkt, is_done);
1208 else
1209 return usbhsf_dma_pop_done_with_rx_irq(pkt, is_done);
1210}
1211
1212const struct usbhs_pkt_handle usbhs_fifo_dma_pop_handler = {
1213 .prepare = usbhsf_dma_prepare_pop,
1214 .try_run = usbhsf_dma_try_pop,
1215 .dma_done = usbhsf_dma_pop_done
1216};
1217
1218/*
1219 * DMA setting
1220 */
1221static bool usbhsf_dma_filter(struct dma_chan *chan, void *param)
1222{
1223 struct sh_dmae_slave *slave = param;
1224
1225 /*
1226 * FIXME
1227 *
1228 * usbhs doesn't recognize id = 0 as valid DMA
1229 */
1230 if (0 == slave->shdma_slave.slave_id)
1231 return false;
1232
1233 chan->private = slave;
1234
1235 return true;
1236}
1237
1238static void usbhsf_dma_quit(struct usbhs_priv *priv, struct usbhs_fifo *fifo)
1239{
1240 if (fifo->tx_chan)
1241 dma_release_channel(fifo->tx_chan);
1242 if (fifo->rx_chan)
1243 dma_release_channel(fifo->rx_chan);
1244
1245 fifo->tx_chan = NULL;
1246 fifo->rx_chan = NULL;
1247}
1248
1249static void usbhsf_dma_init_pdev(struct usbhs_fifo *fifo)
1250{
1251 dma_cap_mask_t mask;
1252
1253 dma_cap_zero(mask);
1254 dma_cap_set(DMA_SLAVE, mask);
1255 fifo->tx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1256 &fifo->tx_slave);
1257
1258 dma_cap_zero(mask);
1259 dma_cap_set(DMA_SLAVE, mask);
1260 fifo->rx_chan = dma_request_channel(mask, usbhsf_dma_filter,
1261 &fifo->rx_slave);
1262}
1263
1264static void usbhsf_dma_init_dt(struct device *dev, struct usbhs_fifo *fifo,
1265 int channel)
1266{
1267 char name[16];
1268
1269 /*
1270 * To avoid complex handing for DnFIFOs, the driver uses each
1271 * DnFIFO as TX or RX direction (not bi-direction).
1272 * So, the driver uses odd channels for TX, even channels for RX.
1273 */
1274 snprintf(name, sizeof(name), "ch%d", channel);
1275 if (channel & 1) {
1276 fifo->tx_chan = dma_request_slave_channel_reason(dev, name);
1277 if (IS_ERR(fifo->tx_chan))
1278 fifo->tx_chan = NULL;
1279 } else {
1280 fifo->rx_chan = dma_request_slave_channel_reason(dev, name);
1281 if (IS_ERR(fifo->rx_chan))
1282 fifo->rx_chan = NULL;
1283 }
1284}
1285
1286static void usbhsf_dma_init(struct usbhs_priv *priv, struct usbhs_fifo *fifo,
1287 int channel)
1288{
1289 struct device *dev = usbhs_priv_to_dev(priv);
1290
1291 if (dev_of_node(dev))
1292 usbhsf_dma_init_dt(dev, fifo, channel);
1293 else
1294 usbhsf_dma_init_pdev(fifo);
1295
1296 if (fifo->tx_chan || fifo->rx_chan)
1297 dev_dbg(dev, "enable DMAEngine (%s%s%s)\n",
1298 fifo->name,
1299 fifo->tx_chan ? "[TX]" : " ",
1300 fifo->rx_chan ? "[RX]" : " ");
1301}
1302
1303/*
1304 * irq functions
1305 */
1306static int usbhsf_irq_empty(struct usbhs_priv *priv,
1307 struct usbhs_irq_state *irq_state)
1308{
1309 struct usbhs_pipe *pipe;
1310 struct device *dev = usbhs_priv_to_dev(priv);
1311 int i, ret;
1312
1313 if (!irq_state->bempsts) {
1314 dev_err(dev, "debug %s !!\n", __func__);
1315 return -EIO;
1316 }
1317
1318 dev_dbg(dev, "irq empty [0x%04x]\n", irq_state->bempsts);
1319
1320 /*
1321 * search interrupted "pipe"
1322 * not "uep".
1323 */
1324 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1325 if (!(irq_state->bempsts & (1 << i)))
1326 continue;
1327
1328 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
1329 if (ret < 0)
1330 dev_err(dev, "irq_empty run_error %d : %d\n", i, ret);
1331 }
1332
1333 return 0;
1334}
1335
1336static int usbhsf_irq_ready(struct usbhs_priv *priv,
1337 struct usbhs_irq_state *irq_state)
1338{
1339 struct usbhs_pipe *pipe;
1340 struct device *dev = usbhs_priv_to_dev(priv);
1341 int i, ret;
1342
1343 if (!irq_state->brdysts) {
1344 dev_err(dev, "debug %s !!\n", __func__);
1345 return -EIO;
1346 }
1347
1348 dev_dbg(dev, "irq ready [0x%04x]\n", irq_state->brdysts);
1349
1350 /*
1351 * search interrupted "pipe"
1352 * not "uep".
1353 */
1354 usbhs_for_each_pipe_with_dcp(pipe, priv, i) {
1355 if (!(irq_state->brdysts & (1 << i)))
1356 continue;
1357
1358 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_TRY_RUN);
1359 if (ret < 0)
1360 dev_err(dev, "irq_ready run_error %d : %d\n", i, ret);
1361 }
1362
1363 return 0;
1364}
1365
1366static void usbhsf_dma_complete(void *arg)
1367{
1368 struct usbhs_pipe *pipe = arg;
1369 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1370 struct device *dev = usbhs_priv_to_dev(priv);
1371 int ret;
1372
1373 ret = usbhsf_pkt_handler(pipe, USBHSF_PKT_DMA_DONE);
1374 if (ret < 0)
1375 dev_err(dev, "dma_complete run_error %d : %d\n",
1376 usbhs_pipe_number(pipe), ret);
1377}
1378
1379void usbhs_fifo_clear_dcp(struct usbhs_pipe *pipe)
1380{
1381 struct usbhs_priv *priv = usbhs_pipe_to_priv(pipe);
1382 struct usbhs_fifo *fifo = usbhsf_get_cfifo(priv); /* CFIFO */
1383
1384 /* clear DCP FIFO of transmission */
1385 if (usbhsf_fifo_select(pipe, fifo, 1) < 0)
1386 return;
1387 usbhsf_fifo_clear(pipe, fifo);
1388 usbhsf_fifo_unselect(pipe, fifo);
1389
1390 /* clear DCP FIFO of reception */
1391 if (usbhsf_fifo_select(pipe, fifo, 0) < 0)
1392 return;
1393 usbhsf_fifo_clear(pipe, fifo);
1394 usbhsf_fifo_unselect(pipe, fifo);
1395}
1396
1397/*
1398 * fifo init
1399 */
1400void usbhs_fifo_init(struct usbhs_priv *priv)
1401{
1402 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1403 struct usbhs_fifo *cfifo = usbhsf_get_cfifo(priv);
1404 struct usbhs_fifo *dfifo;
1405 int i;
1406
1407 mod->irq_empty = usbhsf_irq_empty;
1408 mod->irq_ready = usbhsf_irq_ready;
1409 mod->irq_bempsts = 0;
1410 mod->irq_brdysts = 0;
1411
1412 cfifo->pipe = NULL;
1413 usbhs_for_each_dfifo(priv, dfifo, i)
1414 dfifo->pipe = NULL;
1415}
1416
1417void usbhs_fifo_quit(struct usbhs_priv *priv)
1418{
1419 struct usbhs_mod *mod = usbhs_mod_get_current(priv);
1420
1421 mod->irq_empty = NULL;
1422 mod->irq_ready = NULL;
1423 mod->irq_bempsts = 0;
1424 mod->irq_brdysts = 0;
1425}
1426
1427#define __USBHS_DFIFO_INIT(priv, fifo, channel, fifo_port) \
1428do { \
1429 fifo = usbhsf_get_dnfifo(priv, channel); \
1430 fifo->name = "D"#channel"FIFO"; \
1431 fifo->port = fifo_port; \
1432 fifo->sel = D##channel##FIFOSEL; \
1433 fifo->ctr = D##channel##FIFOCTR; \
1434 fifo->tx_slave.shdma_slave.slave_id = \
1435 usbhs_get_dparam(priv, d##channel##_tx_id); \
1436 fifo->rx_slave.shdma_slave.slave_id = \
1437 usbhs_get_dparam(priv, d##channel##_rx_id); \
1438 usbhsf_dma_init(priv, fifo, channel); \
1439} while (0)
1440
1441#define USBHS_DFIFO_INIT(priv, fifo, channel) \
1442 __USBHS_DFIFO_INIT(priv, fifo, channel, D##channel##FIFO)
1443#define USBHS_DFIFO_INIT_NO_PORT(priv, fifo, channel) \
1444 __USBHS_DFIFO_INIT(priv, fifo, channel, 0)
1445
1446int usbhs_fifo_probe(struct usbhs_priv *priv)
1447{
1448 struct usbhs_fifo *fifo;
1449
1450 /* CFIFO */
1451 fifo = usbhsf_get_cfifo(priv);
1452 fifo->name = "CFIFO";
1453 fifo->port = CFIFO;
1454 fifo->sel = CFIFOSEL;
1455 fifo->ctr = CFIFOCTR;
1456
1457 /* DFIFO */
1458 USBHS_DFIFO_INIT(priv, fifo, 0);
1459 USBHS_DFIFO_INIT(priv, fifo, 1);
1460 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 2);
1461 USBHS_DFIFO_INIT_NO_PORT(priv, fifo, 3);
1462
1463 return 0;
1464}
1465
1466void usbhs_fifo_remove(struct usbhs_priv *priv)
1467{
1468 struct usbhs_fifo *fifo;
1469 int i;
1470
1471 usbhs_for_each_dfifo(priv, fifo, i)
1472 usbhsf_dma_quit(priv, fifo);
1473}