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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
4 */
5#include <linux/scatterlist.h>
6#include <linux/highmem.h>
7#include <linux/sched.h>
8#include <linux/slab.h>
9#include <linux/hash.h>
10#include <linux/sort.h>
11#include <linux/io.h>
12#include <linux/nd.h>
13#include "nd-core.h"
14#include "nd.h"
15
16/*
17 * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
18 * irrelevant.
19 */
20#include <linux/io-64-nonatomic-hi-lo.h>
21
22static DEFINE_IDA(region_ida);
23static DEFINE_PER_CPU(int, flush_idx);
24
25static int nvdimm_map_flush(struct device *dev, struct nvdimm *nvdimm, int dimm,
26 struct nd_region_data *ndrd)
27{
28 int i, j;
29
30 dev_dbg(dev, "%s: map %d flush address%s\n", nvdimm_name(nvdimm),
31 nvdimm->num_flush, nvdimm->num_flush == 1 ? "" : "es");
32 for (i = 0; i < (1 << ndrd->hints_shift); i++) {
33 struct resource *res = &nvdimm->flush_wpq[i];
34 unsigned long pfn = PHYS_PFN(res->start);
35 void __iomem *flush_page;
36
37 /* check if flush hints share a page */
38 for (j = 0; j < i; j++) {
39 struct resource *res_j = &nvdimm->flush_wpq[j];
40 unsigned long pfn_j = PHYS_PFN(res_j->start);
41
42 if (pfn == pfn_j)
43 break;
44 }
45
46 if (j < i)
47 flush_page = (void __iomem *) ((unsigned long)
48 ndrd_get_flush_wpq(ndrd, dimm, j)
49 & PAGE_MASK);
50 else
51 flush_page = devm_nvdimm_ioremap(dev,
52 PFN_PHYS(pfn), PAGE_SIZE);
53 if (!flush_page)
54 return -ENXIO;
55 ndrd_set_flush_wpq(ndrd, dimm, i, flush_page
56 + (res->start & ~PAGE_MASK));
57 }
58
59 return 0;
60}
61
62int nd_region_activate(struct nd_region *nd_region)
63{
64 int i, j, num_flush = 0;
65 struct nd_region_data *ndrd;
66 struct device *dev = &nd_region->dev;
67 size_t flush_data_size = sizeof(void *);
68
69 nvdimm_bus_lock(&nd_region->dev);
70 for (i = 0; i < nd_region->ndr_mappings; i++) {
71 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
72 struct nvdimm *nvdimm = nd_mapping->nvdimm;
73
74 if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) {
75 nvdimm_bus_unlock(&nd_region->dev);
76 return -EBUSY;
77 }
78
79 /* at least one null hint slot per-dimm for the "no-hint" case */
80 flush_data_size += sizeof(void *);
81 num_flush = min_not_zero(num_flush, nvdimm->num_flush);
82 if (!nvdimm->num_flush)
83 continue;
84 flush_data_size += nvdimm->num_flush * sizeof(void *);
85 }
86 nvdimm_bus_unlock(&nd_region->dev);
87
88 ndrd = devm_kzalloc(dev, sizeof(*ndrd) + flush_data_size, GFP_KERNEL);
89 if (!ndrd)
90 return -ENOMEM;
91 dev_set_drvdata(dev, ndrd);
92
93 if (!num_flush)
94 return 0;
95
96 ndrd->hints_shift = ilog2(num_flush);
97 for (i = 0; i < nd_region->ndr_mappings; i++) {
98 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
99 struct nvdimm *nvdimm = nd_mapping->nvdimm;
100 int rc = nvdimm_map_flush(&nd_region->dev, nvdimm, i, ndrd);
101
102 if (rc)
103 return rc;
104 }
105
106 /*
107 * Clear out entries that are duplicates. This should prevent the
108 * extra flushings.
109 */
110 for (i = 0; i < nd_region->ndr_mappings - 1; i++) {
111 /* ignore if NULL already */
112 if (!ndrd_get_flush_wpq(ndrd, i, 0))
113 continue;
114
115 for (j = i + 1; j < nd_region->ndr_mappings; j++)
116 if (ndrd_get_flush_wpq(ndrd, i, 0) ==
117 ndrd_get_flush_wpq(ndrd, j, 0))
118 ndrd_set_flush_wpq(ndrd, j, 0, NULL);
119 }
120
121 return 0;
122}
123
124static void nd_region_release(struct device *dev)
125{
126 struct nd_region *nd_region = to_nd_region(dev);
127 u16 i;
128
129 for (i = 0; i < nd_region->ndr_mappings; i++) {
130 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
131 struct nvdimm *nvdimm = nd_mapping->nvdimm;
132
133 put_device(&nvdimm->dev);
134 }
135 free_percpu(nd_region->lane);
136 ida_simple_remove(®ion_ida, nd_region->id);
137 if (is_nd_blk(dev))
138 kfree(to_nd_blk_region(dev));
139 else
140 kfree(nd_region);
141}
142
143static struct device_type nd_blk_device_type = {
144 .name = "nd_blk",
145 .release = nd_region_release,
146};
147
148static struct device_type nd_pmem_device_type = {
149 .name = "nd_pmem",
150 .release = nd_region_release,
151};
152
153static struct device_type nd_volatile_device_type = {
154 .name = "nd_volatile",
155 .release = nd_region_release,
156};
157
158bool is_nd_pmem(struct device *dev)
159{
160 return dev ? dev->type == &nd_pmem_device_type : false;
161}
162
163bool is_nd_blk(struct device *dev)
164{
165 return dev ? dev->type == &nd_blk_device_type : false;
166}
167
168bool is_nd_volatile(struct device *dev)
169{
170 return dev ? dev->type == &nd_volatile_device_type : false;
171}
172
173struct nd_region *to_nd_region(struct device *dev)
174{
175 struct nd_region *nd_region = container_of(dev, struct nd_region, dev);
176
177 WARN_ON(dev->type->release != nd_region_release);
178 return nd_region;
179}
180EXPORT_SYMBOL_GPL(to_nd_region);
181
182struct device *nd_region_dev(struct nd_region *nd_region)
183{
184 if (!nd_region)
185 return NULL;
186 return &nd_region->dev;
187}
188EXPORT_SYMBOL_GPL(nd_region_dev);
189
190struct nd_blk_region *to_nd_blk_region(struct device *dev)
191{
192 struct nd_region *nd_region = to_nd_region(dev);
193
194 WARN_ON(!is_nd_blk(dev));
195 return container_of(nd_region, struct nd_blk_region, nd_region);
196}
197EXPORT_SYMBOL_GPL(to_nd_blk_region);
198
199void *nd_region_provider_data(struct nd_region *nd_region)
200{
201 return nd_region->provider_data;
202}
203EXPORT_SYMBOL_GPL(nd_region_provider_data);
204
205void *nd_blk_region_provider_data(struct nd_blk_region *ndbr)
206{
207 return ndbr->blk_provider_data;
208}
209EXPORT_SYMBOL_GPL(nd_blk_region_provider_data);
210
211void nd_blk_region_set_provider_data(struct nd_blk_region *ndbr, void *data)
212{
213 ndbr->blk_provider_data = data;
214}
215EXPORT_SYMBOL_GPL(nd_blk_region_set_provider_data);
216
217/**
218 * nd_region_to_nstype() - region to an integer namespace type
219 * @nd_region: region-device to interrogate
220 *
221 * This is the 'nstype' attribute of a region as well, an input to the
222 * MODALIAS for namespace devices, and bit number for a nvdimm_bus to match
223 * namespace devices with namespace drivers.
224 */
225int nd_region_to_nstype(struct nd_region *nd_region)
226{
227 if (is_memory(&nd_region->dev)) {
228 u16 i, alias;
229
230 for (i = 0, alias = 0; i < nd_region->ndr_mappings; i++) {
231 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
232 struct nvdimm *nvdimm = nd_mapping->nvdimm;
233
234 if (test_bit(NDD_ALIASING, &nvdimm->flags))
235 alias++;
236 }
237 if (alias)
238 return ND_DEVICE_NAMESPACE_PMEM;
239 else
240 return ND_DEVICE_NAMESPACE_IO;
241 } else if (is_nd_blk(&nd_region->dev)) {
242 return ND_DEVICE_NAMESPACE_BLK;
243 }
244
245 return 0;
246}
247EXPORT_SYMBOL(nd_region_to_nstype);
248
249static ssize_t size_show(struct device *dev,
250 struct device_attribute *attr, char *buf)
251{
252 struct nd_region *nd_region = to_nd_region(dev);
253 unsigned long long size = 0;
254
255 if (is_memory(dev)) {
256 size = nd_region->ndr_size;
257 } else if (nd_region->ndr_mappings == 1) {
258 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
259
260 size = nd_mapping->size;
261 }
262
263 return sprintf(buf, "%llu\n", size);
264}
265static DEVICE_ATTR_RO(size);
266
267static ssize_t deep_flush_show(struct device *dev,
268 struct device_attribute *attr, char *buf)
269{
270 struct nd_region *nd_region = to_nd_region(dev);
271
272 /*
273 * NOTE: in the nvdimm_has_flush() error case this attribute is
274 * not visible.
275 */
276 return sprintf(buf, "%d\n", nvdimm_has_flush(nd_region));
277}
278
279static ssize_t deep_flush_store(struct device *dev, struct device_attribute *attr,
280 const char *buf, size_t len)
281{
282 bool flush;
283 int rc = strtobool(buf, &flush);
284 struct nd_region *nd_region = to_nd_region(dev);
285
286 if (rc)
287 return rc;
288 if (!flush)
289 return -EINVAL;
290 rc = nvdimm_flush(nd_region, NULL);
291 if (rc)
292 return rc;
293
294 return len;
295}
296static DEVICE_ATTR_RW(deep_flush);
297
298static ssize_t mappings_show(struct device *dev,
299 struct device_attribute *attr, char *buf)
300{
301 struct nd_region *nd_region = to_nd_region(dev);
302
303 return sprintf(buf, "%d\n", nd_region->ndr_mappings);
304}
305static DEVICE_ATTR_RO(mappings);
306
307static ssize_t nstype_show(struct device *dev,
308 struct device_attribute *attr, char *buf)
309{
310 struct nd_region *nd_region = to_nd_region(dev);
311
312 return sprintf(buf, "%d\n", nd_region_to_nstype(nd_region));
313}
314static DEVICE_ATTR_RO(nstype);
315
316static ssize_t set_cookie_show(struct device *dev,
317 struct device_attribute *attr, char *buf)
318{
319 struct nd_region *nd_region = to_nd_region(dev);
320 struct nd_interleave_set *nd_set = nd_region->nd_set;
321 ssize_t rc = 0;
322
323 if (is_memory(dev) && nd_set)
324 /* pass, should be precluded by region_visible */;
325 else
326 return -ENXIO;
327
328 /*
329 * The cookie to show depends on which specification of the
330 * labels we are using. If there are not labels then default to
331 * the v1.1 namespace label cookie definition. To read all this
332 * data we need to wait for probing to settle.
333 */
334 nd_device_lock(dev);
335 nvdimm_bus_lock(dev);
336 wait_nvdimm_bus_probe_idle(dev);
337 if (nd_region->ndr_mappings) {
338 struct nd_mapping *nd_mapping = &nd_region->mapping[0];
339 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
340
341 if (ndd) {
342 struct nd_namespace_index *nsindex;
343
344 nsindex = to_namespace_index(ndd, ndd->ns_current);
345 rc = sprintf(buf, "%#llx\n",
346 nd_region_interleave_set_cookie(nd_region,
347 nsindex));
348 }
349 }
350 nvdimm_bus_unlock(dev);
351 nd_device_unlock(dev);
352
353 if (rc)
354 return rc;
355 return sprintf(buf, "%#llx\n", nd_set->cookie1);
356}
357static DEVICE_ATTR_RO(set_cookie);
358
359resource_size_t nd_region_available_dpa(struct nd_region *nd_region)
360{
361 resource_size_t blk_max_overlap = 0, available, overlap;
362 int i;
363
364 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
365
366 retry:
367 available = 0;
368 overlap = blk_max_overlap;
369 for (i = 0; i < nd_region->ndr_mappings; i++) {
370 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
371 struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
372
373 /* if a dimm is disabled the available capacity is zero */
374 if (!ndd)
375 return 0;
376
377 if (is_memory(&nd_region->dev)) {
378 available += nd_pmem_available_dpa(nd_region,
379 nd_mapping, &overlap);
380 if (overlap > blk_max_overlap) {
381 blk_max_overlap = overlap;
382 goto retry;
383 }
384 } else if (is_nd_blk(&nd_region->dev))
385 available += nd_blk_available_dpa(nd_region);
386 }
387
388 return available;
389}
390
391resource_size_t nd_region_allocatable_dpa(struct nd_region *nd_region)
392{
393 resource_size_t available = 0;
394 int i;
395
396 if (is_memory(&nd_region->dev))
397 available = PHYS_ADDR_MAX;
398
399 WARN_ON(!is_nvdimm_bus_locked(&nd_region->dev));
400 for (i = 0; i < nd_region->ndr_mappings; i++) {
401 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
402
403 if (is_memory(&nd_region->dev))
404 available = min(available,
405 nd_pmem_max_contiguous_dpa(nd_region,
406 nd_mapping));
407 else if (is_nd_blk(&nd_region->dev))
408 available += nd_blk_available_dpa(nd_region);
409 }
410 if (is_memory(&nd_region->dev))
411 return available * nd_region->ndr_mappings;
412 return available;
413}
414
415static ssize_t available_size_show(struct device *dev,
416 struct device_attribute *attr, char *buf)
417{
418 struct nd_region *nd_region = to_nd_region(dev);
419 unsigned long long available = 0;
420
421 /*
422 * Flush in-flight updates and grab a snapshot of the available
423 * size. Of course, this value is potentially invalidated the
424 * memory nvdimm_bus_lock() is dropped, but that's userspace's
425 * problem to not race itself.
426 */
427 nd_device_lock(dev);
428 nvdimm_bus_lock(dev);
429 wait_nvdimm_bus_probe_idle(dev);
430 available = nd_region_available_dpa(nd_region);
431 nvdimm_bus_unlock(dev);
432 nd_device_unlock(dev);
433
434 return sprintf(buf, "%llu\n", available);
435}
436static DEVICE_ATTR_RO(available_size);
437
438static ssize_t max_available_extent_show(struct device *dev,
439 struct device_attribute *attr, char *buf)
440{
441 struct nd_region *nd_region = to_nd_region(dev);
442 unsigned long long available = 0;
443
444 nd_device_lock(dev);
445 nvdimm_bus_lock(dev);
446 wait_nvdimm_bus_probe_idle(dev);
447 available = nd_region_allocatable_dpa(nd_region);
448 nvdimm_bus_unlock(dev);
449 nd_device_unlock(dev);
450
451 return sprintf(buf, "%llu\n", available);
452}
453static DEVICE_ATTR_RO(max_available_extent);
454
455static ssize_t init_namespaces_show(struct device *dev,
456 struct device_attribute *attr, char *buf)
457{
458 struct nd_region_data *ndrd = dev_get_drvdata(dev);
459 ssize_t rc;
460
461 nvdimm_bus_lock(dev);
462 if (ndrd)
463 rc = sprintf(buf, "%d/%d\n", ndrd->ns_active, ndrd->ns_count);
464 else
465 rc = -ENXIO;
466 nvdimm_bus_unlock(dev);
467
468 return rc;
469}
470static DEVICE_ATTR_RO(init_namespaces);
471
472static ssize_t namespace_seed_show(struct device *dev,
473 struct device_attribute *attr, char *buf)
474{
475 struct nd_region *nd_region = to_nd_region(dev);
476 ssize_t rc;
477
478 nvdimm_bus_lock(dev);
479 if (nd_region->ns_seed)
480 rc = sprintf(buf, "%s\n", dev_name(nd_region->ns_seed));
481 else
482 rc = sprintf(buf, "\n");
483 nvdimm_bus_unlock(dev);
484 return rc;
485}
486static DEVICE_ATTR_RO(namespace_seed);
487
488static ssize_t btt_seed_show(struct device *dev,
489 struct device_attribute *attr, char *buf)
490{
491 struct nd_region *nd_region = to_nd_region(dev);
492 ssize_t rc;
493
494 nvdimm_bus_lock(dev);
495 if (nd_region->btt_seed)
496 rc = sprintf(buf, "%s\n", dev_name(nd_region->btt_seed));
497 else
498 rc = sprintf(buf, "\n");
499 nvdimm_bus_unlock(dev);
500
501 return rc;
502}
503static DEVICE_ATTR_RO(btt_seed);
504
505static ssize_t pfn_seed_show(struct device *dev,
506 struct device_attribute *attr, char *buf)
507{
508 struct nd_region *nd_region = to_nd_region(dev);
509 ssize_t rc;
510
511 nvdimm_bus_lock(dev);
512 if (nd_region->pfn_seed)
513 rc = sprintf(buf, "%s\n", dev_name(nd_region->pfn_seed));
514 else
515 rc = sprintf(buf, "\n");
516 nvdimm_bus_unlock(dev);
517
518 return rc;
519}
520static DEVICE_ATTR_RO(pfn_seed);
521
522static ssize_t dax_seed_show(struct device *dev,
523 struct device_attribute *attr, char *buf)
524{
525 struct nd_region *nd_region = to_nd_region(dev);
526 ssize_t rc;
527
528 nvdimm_bus_lock(dev);
529 if (nd_region->dax_seed)
530 rc = sprintf(buf, "%s\n", dev_name(nd_region->dax_seed));
531 else
532 rc = sprintf(buf, "\n");
533 nvdimm_bus_unlock(dev);
534
535 return rc;
536}
537static DEVICE_ATTR_RO(dax_seed);
538
539static ssize_t read_only_show(struct device *dev,
540 struct device_attribute *attr, char *buf)
541{
542 struct nd_region *nd_region = to_nd_region(dev);
543
544 return sprintf(buf, "%d\n", nd_region->ro);
545}
546
547static ssize_t read_only_store(struct device *dev,
548 struct device_attribute *attr, const char *buf, size_t len)
549{
550 bool ro;
551 int rc = strtobool(buf, &ro);
552 struct nd_region *nd_region = to_nd_region(dev);
553
554 if (rc)
555 return rc;
556
557 nd_region->ro = ro;
558 return len;
559}
560static DEVICE_ATTR_RW(read_only);
561
562static ssize_t region_badblocks_show(struct device *dev,
563 struct device_attribute *attr, char *buf)
564{
565 struct nd_region *nd_region = to_nd_region(dev);
566 ssize_t rc;
567
568 nd_device_lock(dev);
569 if (dev->driver)
570 rc = badblocks_show(&nd_region->bb, buf, 0);
571 else
572 rc = -ENXIO;
573 nd_device_unlock(dev);
574
575 return rc;
576}
577static DEVICE_ATTR(badblocks, 0444, region_badblocks_show, NULL);
578
579static ssize_t resource_show(struct device *dev,
580 struct device_attribute *attr, char *buf)
581{
582 struct nd_region *nd_region = to_nd_region(dev);
583
584 return sprintf(buf, "%#llx\n", nd_region->ndr_start);
585}
586static DEVICE_ATTR_RO(resource);
587
588static ssize_t persistence_domain_show(struct device *dev,
589 struct device_attribute *attr, char *buf)
590{
591 struct nd_region *nd_region = to_nd_region(dev);
592
593 if (test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags))
594 return sprintf(buf, "cpu_cache\n");
595 else if (test_bit(ND_REGION_PERSIST_MEMCTRL, &nd_region->flags))
596 return sprintf(buf, "memory_controller\n");
597 else
598 return sprintf(buf, "\n");
599}
600static DEVICE_ATTR_RO(persistence_domain);
601
602static struct attribute *nd_region_attributes[] = {
603 &dev_attr_size.attr,
604 &dev_attr_nstype.attr,
605 &dev_attr_mappings.attr,
606 &dev_attr_btt_seed.attr,
607 &dev_attr_pfn_seed.attr,
608 &dev_attr_dax_seed.attr,
609 &dev_attr_deep_flush.attr,
610 &dev_attr_read_only.attr,
611 &dev_attr_set_cookie.attr,
612 &dev_attr_available_size.attr,
613 &dev_attr_max_available_extent.attr,
614 &dev_attr_namespace_seed.attr,
615 &dev_attr_init_namespaces.attr,
616 &dev_attr_badblocks.attr,
617 &dev_attr_resource.attr,
618 &dev_attr_persistence_domain.attr,
619 NULL,
620};
621
622static umode_t region_visible(struct kobject *kobj, struct attribute *a, int n)
623{
624 struct device *dev = container_of(kobj, typeof(*dev), kobj);
625 struct nd_region *nd_region = to_nd_region(dev);
626 struct nd_interleave_set *nd_set = nd_region->nd_set;
627 int type = nd_region_to_nstype(nd_region);
628
629 if (!is_memory(dev) && a == &dev_attr_pfn_seed.attr)
630 return 0;
631
632 if (!is_memory(dev) && a == &dev_attr_dax_seed.attr)
633 return 0;
634
635 if (!is_memory(dev) && a == &dev_attr_badblocks.attr)
636 return 0;
637
638 if (a == &dev_attr_resource.attr) {
639 if (is_memory(dev))
640 return 0400;
641 else
642 return 0;
643 }
644
645 if (a == &dev_attr_deep_flush.attr) {
646 int has_flush = nvdimm_has_flush(nd_region);
647
648 if (has_flush == 1)
649 return a->mode;
650 else if (has_flush == 0)
651 return 0444;
652 else
653 return 0;
654 }
655
656 if (a == &dev_attr_persistence_domain.attr) {
657 if ((nd_region->flags & (BIT(ND_REGION_PERSIST_CACHE)
658 | BIT(ND_REGION_PERSIST_MEMCTRL))) == 0)
659 return 0;
660 return a->mode;
661 }
662
663 if (a != &dev_attr_set_cookie.attr
664 && a != &dev_attr_available_size.attr)
665 return a->mode;
666
667 if ((type == ND_DEVICE_NAMESPACE_PMEM
668 || type == ND_DEVICE_NAMESPACE_BLK)
669 && a == &dev_attr_available_size.attr)
670 return a->mode;
671 else if (is_memory(dev) && nd_set)
672 return a->mode;
673
674 return 0;
675}
676
677struct attribute_group nd_region_attribute_group = {
678 .attrs = nd_region_attributes,
679 .is_visible = region_visible,
680};
681EXPORT_SYMBOL_GPL(nd_region_attribute_group);
682
683u64 nd_region_interleave_set_cookie(struct nd_region *nd_region,
684 struct nd_namespace_index *nsindex)
685{
686 struct nd_interleave_set *nd_set = nd_region->nd_set;
687
688 if (!nd_set)
689 return 0;
690
691 if (nsindex && __le16_to_cpu(nsindex->major) == 1
692 && __le16_to_cpu(nsindex->minor) == 1)
693 return nd_set->cookie1;
694 return nd_set->cookie2;
695}
696
697u64 nd_region_interleave_set_altcookie(struct nd_region *nd_region)
698{
699 struct nd_interleave_set *nd_set = nd_region->nd_set;
700
701 if (nd_set)
702 return nd_set->altcookie;
703 return 0;
704}
705
706void nd_mapping_free_labels(struct nd_mapping *nd_mapping)
707{
708 struct nd_label_ent *label_ent, *e;
709
710 lockdep_assert_held(&nd_mapping->lock);
711 list_for_each_entry_safe(label_ent, e, &nd_mapping->labels, list) {
712 list_del(&label_ent->list);
713 kfree(label_ent);
714 }
715}
716
717/*
718 * When a namespace is activated create new seeds for the next
719 * namespace, or namespace-personality to be configured.
720 */
721void nd_region_advance_seeds(struct nd_region *nd_region, struct device *dev)
722{
723 nvdimm_bus_lock(dev);
724 if (nd_region->ns_seed == dev) {
725 nd_region_create_ns_seed(nd_region);
726 } else if (is_nd_btt(dev)) {
727 struct nd_btt *nd_btt = to_nd_btt(dev);
728
729 if (nd_region->btt_seed == dev)
730 nd_region_create_btt_seed(nd_region);
731 if (nd_region->ns_seed == &nd_btt->ndns->dev)
732 nd_region_create_ns_seed(nd_region);
733 } else if (is_nd_pfn(dev)) {
734 struct nd_pfn *nd_pfn = to_nd_pfn(dev);
735
736 if (nd_region->pfn_seed == dev)
737 nd_region_create_pfn_seed(nd_region);
738 if (nd_region->ns_seed == &nd_pfn->ndns->dev)
739 nd_region_create_ns_seed(nd_region);
740 } else if (is_nd_dax(dev)) {
741 struct nd_dax *nd_dax = to_nd_dax(dev);
742
743 if (nd_region->dax_seed == dev)
744 nd_region_create_dax_seed(nd_region);
745 if (nd_region->ns_seed == &nd_dax->nd_pfn.ndns->dev)
746 nd_region_create_ns_seed(nd_region);
747 }
748 nvdimm_bus_unlock(dev);
749}
750
751static ssize_t mappingN(struct device *dev, char *buf, int n)
752{
753 struct nd_region *nd_region = to_nd_region(dev);
754 struct nd_mapping *nd_mapping;
755 struct nvdimm *nvdimm;
756
757 if (n >= nd_region->ndr_mappings)
758 return -ENXIO;
759 nd_mapping = &nd_region->mapping[n];
760 nvdimm = nd_mapping->nvdimm;
761
762 return sprintf(buf, "%s,%llu,%llu,%d\n", dev_name(&nvdimm->dev),
763 nd_mapping->start, nd_mapping->size,
764 nd_mapping->position);
765}
766
767#define REGION_MAPPING(idx) \
768static ssize_t mapping##idx##_show(struct device *dev, \
769 struct device_attribute *attr, char *buf) \
770{ \
771 return mappingN(dev, buf, idx); \
772} \
773static DEVICE_ATTR_RO(mapping##idx)
774
775/*
776 * 32 should be enough for a while, even in the presence of socket
777 * interleave a 32-way interleave set is a degenerate case.
778 */
779REGION_MAPPING(0);
780REGION_MAPPING(1);
781REGION_MAPPING(2);
782REGION_MAPPING(3);
783REGION_MAPPING(4);
784REGION_MAPPING(5);
785REGION_MAPPING(6);
786REGION_MAPPING(7);
787REGION_MAPPING(8);
788REGION_MAPPING(9);
789REGION_MAPPING(10);
790REGION_MAPPING(11);
791REGION_MAPPING(12);
792REGION_MAPPING(13);
793REGION_MAPPING(14);
794REGION_MAPPING(15);
795REGION_MAPPING(16);
796REGION_MAPPING(17);
797REGION_MAPPING(18);
798REGION_MAPPING(19);
799REGION_MAPPING(20);
800REGION_MAPPING(21);
801REGION_MAPPING(22);
802REGION_MAPPING(23);
803REGION_MAPPING(24);
804REGION_MAPPING(25);
805REGION_MAPPING(26);
806REGION_MAPPING(27);
807REGION_MAPPING(28);
808REGION_MAPPING(29);
809REGION_MAPPING(30);
810REGION_MAPPING(31);
811
812static umode_t mapping_visible(struct kobject *kobj, struct attribute *a, int n)
813{
814 struct device *dev = container_of(kobj, struct device, kobj);
815 struct nd_region *nd_region = to_nd_region(dev);
816
817 if (n < nd_region->ndr_mappings)
818 return a->mode;
819 return 0;
820}
821
822static struct attribute *mapping_attributes[] = {
823 &dev_attr_mapping0.attr,
824 &dev_attr_mapping1.attr,
825 &dev_attr_mapping2.attr,
826 &dev_attr_mapping3.attr,
827 &dev_attr_mapping4.attr,
828 &dev_attr_mapping5.attr,
829 &dev_attr_mapping6.attr,
830 &dev_attr_mapping7.attr,
831 &dev_attr_mapping8.attr,
832 &dev_attr_mapping9.attr,
833 &dev_attr_mapping10.attr,
834 &dev_attr_mapping11.attr,
835 &dev_attr_mapping12.attr,
836 &dev_attr_mapping13.attr,
837 &dev_attr_mapping14.attr,
838 &dev_attr_mapping15.attr,
839 &dev_attr_mapping16.attr,
840 &dev_attr_mapping17.attr,
841 &dev_attr_mapping18.attr,
842 &dev_attr_mapping19.attr,
843 &dev_attr_mapping20.attr,
844 &dev_attr_mapping21.attr,
845 &dev_attr_mapping22.attr,
846 &dev_attr_mapping23.attr,
847 &dev_attr_mapping24.attr,
848 &dev_attr_mapping25.attr,
849 &dev_attr_mapping26.attr,
850 &dev_attr_mapping27.attr,
851 &dev_attr_mapping28.attr,
852 &dev_attr_mapping29.attr,
853 &dev_attr_mapping30.attr,
854 &dev_attr_mapping31.attr,
855 NULL,
856};
857
858struct attribute_group nd_mapping_attribute_group = {
859 .is_visible = mapping_visible,
860 .attrs = mapping_attributes,
861};
862EXPORT_SYMBOL_GPL(nd_mapping_attribute_group);
863
864int nd_blk_region_init(struct nd_region *nd_region)
865{
866 struct device *dev = &nd_region->dev;
867 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
868
869 if (!is_nd_blk(dev))
870 return 0;
871
872 if (nd_region->ndr_mappings < 1) {
873 dev_dbg(dev, "invalid BLK region\n");
874 return -ENXIO;
875 }
876
877 return to_nd_blk_region(dev)->enable(nvdimm_bus, dev);
878}
879
880/**
881 * nd_region_acquire_lane - allocate and lock a lane
882 * @nd_region: region id and number of lanes possible
883 *
884 * A lane correlates to a BLK-data-window and/or a log slot in the BTT.
885 * We optimize for the common case where there are 256 lanes, one
886 * per-cpu. For larger systems we need to lock to share lanes. For now
887 * this implementation assumes the cost of maintaining an allocator for
888 * free lanes is on the order of the lock hold time, so it implements a
889 * static lane = cpu % num_lanes mapping.
890 *
891 * In the case of a BTT instance on top of a BLK namespace a lane may be
892 * acquired recursively. We lock on the first instance.
893 *
894 * In the case of a BTT instance on top of PMEM, we only acquire a lane
895 * for the BTT metadata updates.
896 */
897unsigned int nd_region_acquire_lane(struct nd_region *nd_region)
898{
899 unsigned int cpu, lane;
900
901 cpu = get_cpu();
902 if (nd_region->num_lanes < nr_cpu_ids) {
903 struct nd_percpu_lane *ndl_lock, *ndl_count;
904
905 lane = cpu % nd_region->num_lanes;
906 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
907 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
908 if (ndl_count->count++ == 0)
909 spin_lock(&ndl_lock->lock);
910 } else
911 lane = cpu;
912
913 return lane;
914}
915EXPORT_SYMBOL(nd_region_acquire_lane);
916
917void nd_region_release_lane(struct nd_region *nd_region, unsigned int lane)
918{
919 if (nd_region->num_lanes < nr_cpu_ids) {
920 unsigned int cpu = get_cpu();
921 struct nd_percpu_lane *ndl_lock, *ndl_count;
922
923 ndl_count = per_cpu_ptr(nd_region->lane, cpu);
924 ndl_lock = per_cpu_ptr(nd_region->lane, lane);
925 if (--ndl_count->count == 0)
926 spin_unlock(&ndl_lock->lock);
927 put_cpu();
928 }
929 put_cpu();
930}
931EXPORT_SYMBOL(nd_region_release_lane);
932
933static struct nd_region *nd_region_create(struct nvdimm_bus *nvdimm_bus,
934 struct nd_region_desc *ndr_desc, struct device_type *dev_type,
935 const char *caller)
936{
937 struct nd_region *nd_region;
938 struct device *dev;
939 void *region_buf;
940 unsigned int i;
941 int ro = 0;
942
943 for (i = 0; i < ndr_desc->num_mappings; i++) {
944 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
945 struct nvdimm *nvdimm = mapping->nvdimm;
946
947 if ((mapping->start | mapping->size) % PAGE_SIZE) {
948 dev_err(&nvdimm_bus->dev,
949 "%s: %s mapping%d is not %ld aligned\n",
950 caller, dev_name(&nvdimm->dev), i, PAGE_SIZE);
951 return NULL;
952 }
953
954 if (test_bit(NDD_UNARMED, &nvdimm->flags))
955 ro = 1;
956
957 if (test_bit(NDD_NOBLK, &nvdimm->flags)
958 && dev_type == &nd_blk_device_type) {
959 dev_err(&nvdimm_bus->dev, "%s: %s mapping%d is not BLK capable\n",
960 caller, dev_name(&nvdimm->dev), i);
961 return NULL;
962 }
963 }
964
965 if (dev_type == &nd_blk_device_type) {
966 struct nd_blk_region_desc *ndbr_desc;
967 struct nd_blk_region *ndbr;
968
969 ndbr_desc = to_blk_region_desc(ndr_desc);
970 ndbr = kzalloc(sizeof(*ndbr) + sizeof(struct nd_mapping)
971 * ndr_desc->num_mappings,
972 GFP_KERNEL);
973 if (ndbr) {
974 nd_region = &ndbr->nd_region;
975 ndbr->enable = ndbr_desc->enable;
976 ndbr->do_io = ndbr_desc->do_io;
977 }
978 region_buf = ndbr;
979 } else {
980 nd_region = kzalloc(struct_size(nd_region, mapping,
981 ndr_desc->num_mappings),
982 GFP_KERNEL);
983 region_buf = nd_region;
984 }
985
986 if (!region_buf)
987 return NULL;
988 nd_region->id = ida_simple_get(®ion_ida, 0, 0, GFP_KERNEL);
989 if (nd_region->id < 0)
990 goto err_id;
991
992 nd_region->lane = alloc_percpu(struct nd_percpu_lane);
993 if (!nd_region->lane)
994 goto err_percpu;
995
996 for (i = 0; i < nr_cpu_ids; i++) {
997 struct nd_percpu_lane *ndl;
998
999 ndl = per_cpu_ptr(nd_region->lane, i);
1000 spin_lock_init(&ndl->lock);
1001 ndl->count = 0;
1002 }
1003
1004 for (i = 0; i < ndr_desc->num_mappings; i++) {
1005 struct nd_mapping_desc *mapping = &ndr_desc->mapping[i];
1006 struct nvdimm *nvdimm = mapping->nvdimm;
1007
1008 nd_region->mapping[i].nvdimm = nvdimm;
1009 nd_region->mapping[i].start = mapping->start;
1010 nd_region->mapping[i].size = mapping->size;
1011 nd_region->mapping[i].position = mapping->position;
1012 INIT_LIST_HEAD(&nd_region->mapping[i].labels);
1013 mutex_init(&nd_region->mapping[i].lock);
1014
1015 get_device(&nvdimm->dev);
1016 }
1017 nd_region->ndr_mappings = ndr_desc->num_mappings;
1018 nd_region->provider_data = ndr_desc->provider_data;
1019 nd_region->nd_set = ndr_desc->nd_set;
1020 nd_region->num_lanes = ndr_desc->num_lanes;
1021 nd_region->flags = ndr_desc->flags;
1022 nd_region->ro = ro;
1023 nd_region->numa_node = ndr_desc->numa_node;
1024 nd_region->target_node = ndr_desc->target_node;
1025 ida_init(&nd_region->ns_ida);
1026 ida_init(&nd_region->btt_ida);
1027 ida_init(&nd_region->pfn_ida);
1028 ida_init(&nd_region->dax_ida);
1029 dev = &nd_region->dev;
1030 dev_set_name(dev, "region%d", nd_region->id);
1031 dev->parent = &nvdimm_bus->dev;
1032 dev->type = dev_type;
1033 dev->groups = ndr_desc->attr_groups;
1034 dev->of_node = ndr_desc->of_node;
1035 nd_region->ndr_size = resource_size(ndr_desc->res);
1036 nd_region->ndr_start = ndr_desc->res->start;
1037 if (ndr_desc->flush)
1038 nd_region->flush = ndr_desc->flush;
1039 else
1040 nd_region->flush = NULL;
1041
1042 nd_device_register(dev);
1043
1044 return nd_region;
1045
1046 err_percpu:
1047 ida_simple_remove(®ion_ida, nd_region->id);
1048 err_id:
1049 kfree(region_buf);
1050 return NULL;
1051}
1052
1053struct nd_region *nvdimm_pmem_region_create(struct nvdimm_bus *nvdimm_bus,
1054 struct nd_region_desc *ndr_desc)
1055{
1056 ndr_desc->num_lanes = ND_MAX_LANES;
1057 return nd_region_create(nvdimm_bus, ndr_desc, &nd_pmem_device_type,
1058 __func__);
1059}
1060EXPORT_SYMBOL_GPL(nvdimm_pmem_region_create);
1061
1062struct nd_region *nvdimm_blk_region_create(struct nvdimm_bus *nvdimm_bus,
1063 struct nd_region_desc *ndr_desc)
1064{
1065 if (ndr_desc->num_mappings > 1)
1066 return NULL;
1067 ndr_desc->num_lanes = min(ndr_desc->num_lanes, ND_MAX_LANES);
1068 return nd_region_create(nvdimm_bus, ndr_desc, &nd_blk_device_type,
1069 __func__);
1070}
1071EXPORT_SYMBOL_GPL(nvdimm_blk_region_create);
1072
1073struct nd_region *nvdimm_volatile_region_create(struct nvdimm_bus *nvdimm_bus,
1074 struct nd_region_desc *ndr_desc)
1075{
1076 ndr_desc->num_lanes = ND_MAX_LANES;
1077 return nd_region_create(nvdimm_bus, ndr_desc, &nd_volatile_device_type,
1078 __func__);
1079}
1080EXPORT_SYMBOL_GPL(nvdimm_volatile_region_create);
1081
1082int nvdimm_flush(struct nd_region *nd_region, struct bio *bio)
1083{
1084 int rc = 0;
1085
1086 if (!nd_region->flush)
1087 rc = generic_nvdimm_flush(nd_region);
1088 else {
1089 if (nd_region->flush(nd_region, bio))
1090 rc = -EIO;
1091 }
1092
1093 return rc;
1094}
1095/**
1096 * nvdimm_flush - flush any posted write queues between the cpu and pmem media
1097 * @nd_region: blk or interleaved pmem region
1098 */
1099int generic_nvdimm_flush(struct nd_region *nd_region)
1100{
1101 struct nd_region_data *ndrd = dev_get_drvdata(&nd_region->dev);
1102 int i, idx;
1103
1104 /*
1105 * Try to encourage some diversity in flush hint addresses
1106 * across cpus assuming a limited number of flush hints.
1107 */
1108 idx = this_cpu_read(flush_idx);
1109 idx = this_cpu_add_return(flush_idx, hash_32(current->pid + idx, 8));
1110
1111 /*
1112 * The first wmb() is needed to 'sfence' all previous writes
1113 * such that they are architecturally visible for the platform
1114 * buffer flush. Note that we've already arranged for pmem
1115 * writes to avoid the cache via memcpy_flushcache(). The final
1116 * wmb() ensures ordering for the NVDIMM flush write.
1117 */
1118 wmb();
1119 for (i = 0; i < nd_region->ndr_mappings; i++)
1120 if (ndrd_get_flush_wpq(ndrd, i, 0))
1121 writeq(1, ndrd_get_flush_wpq(ndrd, i, idx));
1122 wmb();
1123
1124 return 0;
1125}
1126EXPORT_SYMBOL_GPL(nvdimm_flush);
1127
1128/**
1129 * nvdimm_has_flush - determine write flushing requirements
1130 * @nd_region: blk or interleaved pmem region
1131 *
1132 * Returns 1 if writes require flushing
1133 * Returns 0 if writes do not require flushing
1134 * Returns -ENXIO if flushing capability can not be determined
1135 */
1136int nvdimm_has_flush(struct nd_region *nd_region)
1137{
1138 int i;
1139
1140 /* no nvdimm or pmem api == flushing capability unknown */
1141 if (nd_region->ndr_mappings == 0
1142 || !IS_ENABLED(CONFIG_ARCH_HAS_PMEM_API))
1143 return -ENXIO;
1144
1145 for (i = 0; i < nd_region->ndr_mappings; i++) {
1146 struct nd_mapping *nd_mapping = &nd_region->mapping[i];
1147 struct nvdimm *nvdimm = nd_mapping->nvdimm;
1148
1149 /* flush hints present / available */
1150 if (nvdimm->num_flush)
1151 return 1;
1152 }
1153
1154 /*
1155 * The platform defines dimm devices without hints, assume
1156 * platform persistence mechanism like ADR
1157 */
1158 return 0;
1159}
1160EXPORT_SYMBOL_GPL(nvdimm_has_flush);
1161
1162int nvdimm_has_cache(struct nd_region *nd_region)
1163{
1164 return is_nd_pmem(&nd_region->dev) &&
1165 !test_bit(ND_REGION_PERSIST_CACHE, &nd_region->flags);
1166}
1167EXPORT_SYMBOL_GPL(nvdimm_has_cache);
1168
1169bool is_nvdimm_sync(struct nd_region *nd_region)
1170{
1171 if (is_nd_volatile(&nd_region->dev))
1172 return true;
1173
1174 return is_nd_pmem(&nd_region->dev) &&
1175 !test_bit(ND_REGION_ASYNC, &nd_region->flags);
1176}
1177EXPORT_SYMBOL_GPL(is_nvdimm_sync);
1178
1179struct conflict_context {
1180 struct nd_region *nd_region;
1181 resource_size_t start, size;
1182};
1183
1184static int region_conflict(struct device *dev, void *data)
1185{
1186 struct nd_region *nd_region;
1187 struct conflict_context *ctx = data;
1188 resource_size_t res_end, region_end, region_start;
1189
1190 if (!is_memory(dev))
1191 return 0;
1192
1193 nd_region = to_nd_region(dev);
1194 if (nd_region == ctx->nd_region)
1195 return 0;
1196
1197 res_end = ctx->start + ctx->size;
1198 region_start = nd_region->ndr_start;
1199 region_end = region_start + nd_region->ndr_size;
1200 if (ctx->start >= region_start && ctx->start < region_end)
1201 return -EBUSY;
1202 if (res_end > region_start && res_end <= region_end)
1203 return -EBUSY;
1204 return 0;
1205}
1206
1207int nd_region_conflict(struct nd_region *nd_region, resource_size_t start,
1208 resource_size_t size)
1209{
1210 struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(&nd_region->dev);
1211 struct conflict_context ctx = {
1212 .nd_region = nd_region,
1213 .start = start,
1214 .size = size,
1215 };
1216
1217 return device_for_each_child(&nvdimm_bus->dev, &ctx, region_conflict);
1218}
1219
1220void __exit nd_region_devs_exit(void)
1221{
1222 ida_destroy(®ion_ida);
1223}